Catch ipw2200 up to equivelancy with v1.0.4
[deliverable/linux.git] / drivers / net / wireless / ipw2100.h
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1/******************************************************************************
2
3 Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************/
26#ifndef _IPW2100_H
27#define _IPW2100_H
28
29#include <linux/sched.h>
30#include <linux/interrupt.h>
31#include <linux/netdevice.h>
32#include <linux/etherdevice.h>
33#include <linux/list.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <asm/io.h>
37#include <linux/socket.h>
38#include <linux/if_arp.h>
39#include <linux/wireless.h>
40#include <linux/version.h>
41#include <net/iw_handler.h> // new driver API
42
43#include <net/ieee80211.h>
44
45#include <linux/workqueue.h>
46
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47struct ipw2100_priv;
48struct ipw2100_tx_packet;
49struct ipw2100_rx_packet;
50
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51#define IPW_DL_UNINIT 0x80000000
52#define IPW_DL_NONE 0x00000000
53#define IPW_DL_ALL 0x7FFFFFFF
54
55/*
56 * To use the debug system;
57 *
58 * If you are defining a new debug classification, simply add it to the #define
59 * list here in the form of:
60 *
61 * #define IPW_DL_xxxx VALUE
62 *
63 * shifting value to the left one bit from the previous entry. xxxx should be
64 * the name of the classification (for example, WEP)
65 *
66 * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
67 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
68 * to send output to that classification.
69 *
70 * To add your debug level to the list of levels seen when you perform
71 *
72 * % cat /proc/net/ipw2100/debug_level
73 *
74 * you simply need to add your entry to the ipw2100_debug_levels array.
75 *
76 * If you do not see debug_level in /proc/net/ipw2100 then you do not have
77 * CONFIG_IPW_DEBUG defined in your kernel configuration
78 *
79 */
80
81#define IPW_DL_ERROR (1<<0)
82#define IPW_DL_WARNING (1<<1)
83#define IPW_DL_INFO (1<<2)
84#define IPW_DL_WX (1<<3)
85#define IPW_DL_HC (1<<5)
86#define IPW_DL_STATE (1<<6)
87
88#define IPW_DL_NOTIF (1<<10)
89#define IPW_DL_SCAN (1<<11)
90#define IPW_DL_ASSOC (1<<12)
91#define IPW_DL_DROP (1<<13)
92
93#define IPW_DL_IOCTL (1<<14)
94#define IPW_DL_RF_KILL (1<<17)
95
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96#define IPW_DL_MANAGE (1<<15)
97#define IPW_DL_FW (1<<16)
98
99#define IPW_DL_FRAG (1<<21)
100#define IPW_DL_WEP (1<<22)
101#define IPW_DL_TX (1<<23)
102#define IPW_DL_RX (1<<24)
103#define IPW_DL_ISR (1<<25)
104#define IPW_DL_IO (1<<26)
105#define IPW_DL_TRACE (1<<28)
106
107#define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
108#define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
109#define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
110#define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
111#define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
112#define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
113#define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
114#define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
115#define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
116#define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
117#define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
118#define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
119#define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
120#define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
121#define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
122#define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
123#define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
124#define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
125#define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
126#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
127#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
128
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129enum {
130 IPW_HW_STATE_DISABLED = 1,
131 IPW_HW_STATE_ENABLED = 0
132};
133
134struct ssid_context {
135 char ssid[IW_ESSID_MAX_SIZE + 1];
136 int ssid_len;
137 unsigned char bssid[ETH_ALEN];
138 int port_type;
139 int channel;
140
141};
142
143extern const char *port_type_str[];
144extern const char *band_str[];
145
146#define NUMBER_OF_BD_PER_COMMAND_PACKET 1
147#define NUMBER_OF_BD_PER_DATA_PACKET 2
148
149#define IPW_MAX_BDS 6
150#define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
151#define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
152
153#define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
154 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
155
156struct bd_status {
157 union {
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158 struct {
159 u8 nlf:1, txType:2, intEnabled:1, reserved:4;
160 } fields;
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161 u8 field;
162 } info;
163} __attribute__ ((packed));
164
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165struct ipw2100_bd {
166 u32 host_addr;
167 u32 buf_length;
168 struct bd_status status;
ee8e365a 169 /* number of fragments for frame (should be set only for
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170 * 1st TBD) */
171 u8 num_fragments;
172 u8 reserved[6];
173} __attribute__ ((packed));
174
175#define IPW_BD_QUEUE_LENGTH(n) (1<<n)
176#define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
177
178#define IPW_BD_STATUS_TX_FRAME_802_3 0x00
179#define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
180#define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
181#define IPW_BD_STATUS_TX_FRAME_802_11 0x04
182#define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
183
184struct ipw2100_bd_queue {
185 /* driver (virtual) pointer to queue */
186 struct ipw2100_bd *drv;
187
188 /* firmware (physical) pointer to queue */
189 dma_addr_t nic;
190
191 /* Length of phy memory allocated for BDs */
192 u32 size;
193
194 /* Number of BDs in queue (and in array) */
195 u32 entries;
196
197 /* Number of available BDs (invalid for NIC BDs) */
198 u32 available;
199
200 /* Offset of oldest used BD in array (next one to
201 * check for completion) */
202 u32 oldest;
203
204 /* Offset of next available (unused) BD */
205 u32 next;
206};
207
208#define RX_QUEUE_LENGTH 256
209#define TX_QUEUE_LENGTH 256
210#define HW_QUEUE_LENGTH 256
211
212#define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
213
214#define STATUS_TYPE_MASK 0x0000000f
215#define COMMAND_STATUS_VAL 0
216#define STATUS_CHANGE_VAL 1
217#define P80211_DATA_VAL 2
218#define P8023_DATA_VAL 3
219#define HOST_NOTIFICATION_VAL 4
220
221#define IPW2100_RSSI_TO_DBM (-98)
222
223struct ipw2100_status {
224 u32 frame_size;
225 u16 status_fields;
226 u8 flags;
227#define IPW_STATUS_FLAG_DECRYPTED (1<<0)
228#define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
229#define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
230 u8 rssi;
231} __attribute__ ((packed));
232
233struct ipw2100_status_queue {
234 /* driver (virtual) pointer to queue */
235 struct ipw2100_status *drv;
236
237 /* firmware (physical) pointer to queue */
238 dma_addr_t nic;
239
240 /* Length of phy memory allocated for BDs */
241 u32 size;
242};
243
244#define HOST_COMMAND_PARAMS_REG_LEN 100
245#define CMD_STATUS_PARAMS_REG_LEN 3
246
247#define IPW_WPA_CAPABILITIES 0x1
248#define IPW_WPA_LISTENINTERVAL 0x2
249#define IPW_WPA_AP_ADDRESS 0x4
250
251#define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
252
253struct ipw2100_wpa_assoc_frame {
254 u16 fixed_ie_mask;
255 struct {
256 u16 capab_info;
257 u16 listen_interval;
258 u8 current_ap[ETH_ALEN];
259 } fixed_ies;
260 u32 var_ie_len;
261 u8 var_ie[IPW_MAX_VAR_IE_LEN];
262};
263
264#define IPW_BSS 1
265#define IPW_MONITOR 2
266#define IPW_IBSS 3
267
268/**
269 * @struct _tx_cmd - HWCommand
270 * @brief H/W command structure.
271 */
272struct ipw2100_cmd_header {
273 u32 host_command_reg;
274 u32 host_command_reg1;
275 u32 sequence;
276 u32 host_command_len_reg;
277 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
278 u32 cmd_status_reg;
279 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
280 u32 rxq_base_ptr;
281 u32 rxq_next_ptr;
282 u32 rxq_host_ptr;
283 u32 txq_base_ptr;
284 u32 txq_next_ptr;
285 u32 txq_host_ptr;
286 u32 tx_status_reg;
287 u32 reserved;
288 u32 status_change_reg;
289 u32 reserved1[3];
290 u32 *ordinal1_ptr;
291 u32 *ordinal2_ptr;
292} __attribute__ ((packed));
293
294struct ipw2100_data_header {
295 u32 host_command_reg;
296 u32 host_command_reg1;
ee8e365a 297 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
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298 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
299 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
ee8e365a 300 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
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301 u8 key[16];
302 u8 reserved[10]; // f/w reserved
303 u8 src_addr[ETH_ALEN];
304 u8 dst_addr[ETH_ALEN];
305 u16 fragment_size;
306} __attribute__ ((packed));
307
070d0165 308/* Host command data structure */
2c86c275 309struct host_command {
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310 u32 host_command; // COMMAND ID
311 u32 host_command1; // COMMAND ID
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312 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
313 u32 host_command_length; // LENGTH
314 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
315} __attribute__ ((packed));
316
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317typedef enum {
318 POWER_ON_RESET,
319 EXIT_POWER_DOWN_RESET,
320 SW_RESET,
321 EEPROM_RW,
322 SW_RE_INIT
323} ipw2100_reset_event;
324
325enum {
326 COMMAND = 0xCAFE,
327 DATA,
328 RX
329};
330
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331struct ipw2100_tx_packet {
332 int type;
333 int index;
334 union {
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335 struct { /* COMMAND */
336 struct ipw2100_cmd_header *cmd;
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337 dma_addr_t cmd_phys;
338 } c_struct;
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339 struct { /* DATA */
340 struct ipw2100_data_header *data;
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341 dma_addr_t data_phys;
342 struct ieee80211_txb *txb;
343 } d_struct;
344 } info;
345 int jiffy_start;
346
347 struct list_head list;
348};
349
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350struct ipw2100_rx_packet {
351 struct ipw2100_rx *rxp;
352 dma_addr_t dma_addr;
353 int jiffy_start;
354 struct sk_buff *skb;
355 struct list_head list;
356};
357
358#define FRAG_DISABLED (1<<31)
359#define RTS_DISABLED (1<<31)
360#define MAX_RTS_THRESHOLD 2304U
361#define MIN_RTS_THRESHOLD 1U
362#define DEFAULT_RTS_THRESHOLD 1000U
363
364#define DEFAULT_BEACON_INTERVAL 100U
365#define DEFAULT_SHORT_RETRY_LIMIT 7U
366#define DEFAULT_LONG_RETRY_LIMIT 4U
367
368struct ipw2100_ordinals {
369 u32 table1_addr;
370 u32 table2_addr;
371 u32 table1_size;
372 u32 table2_size;
373};
374
375/* Host Notification header */
376struct ipw2100_notification {
377 u32 hnhdr_subtype; /* type of host notification */
378 u32 hnhdr_size; /* size in bytes of data
379 or number of entries, if table.
380 Does NOT include header */
381} __attribute__ ((packed));
382
383#define MAX_KEY_SIZE 16
384#define MAX_KEYS 8
385
386#define IPW2100_WEP_ENABLE (1<<1)
387#define IPW2100_WEP_DROP_CLEAR (1<<2)
388
389#define IPW_NONE_CIPHER (1<<0)
390#define IPW_WEP40_CIPHER (1<<1)
391#define IPW_TKIP_CIPHER (1<<2)
392#define IPW_CCMP_CIPHER (1<<4)
393#define IPW_WEP104_CIPHER (1<<5)
394#define IPW_CKIP_CIPHER (1<<6)
395
396#define IPW_AUTH_OPEN 0
397#define IPW_AUTH_SHARED 1
398
399struct statistic {
400 int value;
401 int hi;
402 int lo;
403};
404
405#define INIT_STAT(x) do { \
406 (x)->value = (x)->hi = 0; \
407 (x)->lo = 0x7fffffff; \
408} while (0)
409#define SET_STAT(x,y) do { \
410 (x)->value = y; \
411 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
412 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
413} while (0)
414#define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
415while (0)
416#define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
417while (0)
418
419#define IPW2100_ERROR_QUEUE 5
420
421/* Power management code: enable or disable? */
422enum {
423#ifdef CONFIG_PM
424 IPW2100_PM_DISABLED = 0,
425 PM_STATE_SIZE = 16,
426#else
427 IPW2100_PM_DISABLED = 1,
428 PM_STATE_SIZE = 0,
429#endif
430};
431
432#define STATUS_POWERED (1<<0)
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433#define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
434#define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
435#define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
436#define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
437#define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
438#define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
439#define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
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440#define STATUS_INT_ENABLED (1<<11)
441#define STATUS_RF_KILL_HW (1<<12)
442#define STATUS_RF_KILL_SW (1<<13)
443#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
444#define STATUS_EXIT_PENDING (1<<14)
445
446#define STATUS_SCAN_PENDING (1<<23)
447#define STATUS_SCANNING (1<<24)
448#define STATUS_SCAN_ABORTING (1<<25)
449#define STATUS_SCAN_COMPLETE (1<<26)
450#define STATUS_WX_EVENT_PENDING (1<<27)
451#define STATUS_RESET_PENDING (1<<29)
ee8e365a 452#define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
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453
454/* Internal NIC states */
455#define IPW_STATE_INITIALIZED (1<<0)
456#define IPW_STATE_COUNTRY_FOUND (1<<1)
457#define IPW_STATE_ASSOCIATED (1<<2)
458#define IPW_STATE_ASSN_LOST (1<<3)
459#define IPW_STATE_ASSN_CHANGED (1<<4)
460#define IPW_STATE_SCAN_COMPLETE (1<<5)
461#define IPW_STATE_ENTERED_PSP (1<<6)
462#define IPW_STATE_LEFT_PSP (1<<7)
463#define IPW_STATE_RF_KILL (1<<8)
464#define IPW_STATE_DISABLED (1<<9)
465#define IPW_STATE_POWER_DOWN (1<<10)
466#define IPW_STATE_SCANNING (1<<11)
467
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468#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
469#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
470#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
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471#define CFG_CUSTOM_MAC (1<<3)
472#define CFG_LONG_PREAMBLE (1<<4)
473#define CFG_ASSOCIATE (1<<6)
474#define CFG_FIXED_RATE (1<<7)
475#define CFG_ADHOC_CREATE (1<<8)
476#define CFG_C3_DISABLED (1<<9)
477#define CFG_PASSIVE_SCAN (1<<10)
478
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479#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
480#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
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481
482struct ipw2100_priv {
483
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484 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
485 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
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486
487 struct ieee80211_device *ieee;
488 unsigned long status;
489 unsigned long config;
490 unsigned long capability;
491
492 /* Statistics */
493 int resets;
494 int reset_backoff;
495
496 /* Context */
497 u8 essid[IW_ESSID_MAX_SIZE];
498 u8 essid_len;
499 u8 bssid[ETH_ALEN];
500 u8 channel;
501 int last_mode;
502 int cstate_limit;
503
504 unsigned long connect_start;
505 unsigned long last_reset;
506
507 u32 channel_mask;
508 u32 fatal_error;
509 u32 fatal_errors[IPW2100_ERROR_QUEUE];
510 u32 fatal_index;
511 int eeprom_version;
512 int firmware_version;
513 unsigned long hw_features;
514 int hangs;
515 u32 last_rtc;
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516 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
517 u8 *snapshot[0x30];
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518
519 u8 mandatory_bssid_mac[ETH_ALEN];
520 u8 mac_addr[ETH_ALEN];
521
522 int power_mode;
523
524 /* WEP data */
525 struct ieee80211_security sec;
526 int messages_sent;
527
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528 int short_retry_limit;
529 int long_retry_limit;
530
531 u32 rts_threshold;
532 u32 frag_threshold;
533
534 int in_isr;
535
536 u32 tx_rates;
537 int tx_power;
538 u32 beacon_interval;
539
540 char nick[IW_ESSID_MAX_SIZE + 1];
541
542 struct ipw2100_status_queue status_queue;
543
544 struct statistic txq_stat;
545 struct statistic rxq_stat;
546 struct ipw2100_bd_queue rx_queue;
547 struct ipw2100_bd_queue tx_queue;
548 struct ipw2100_rx_packet *rx_buffers;
549
550 struct statistic fw_pend_stat;
551 struct list_head fw_pend_list;
552
553 struct statistic msg_free_stat;
554 struct statistic msg_pend_stat;
555 struct list_head msg_free_list;
556 struct list_head msg_pend_list;
557 struct ipw2100_tx_packet *msg_buffers;
558
559 struct statistic tx_free_stat;
560 struct statistic tx_pend_stat;
561 struct list_head tx_free_list;
562 struct list_head tx_pend_list;
563 struct ipw2100_tx_packet *tx_buffers;
564
565 struct ipw2100_ordinals ordinals;
566
567 struct pci_dev *pci_dev;
568
569 struct proc_dir_entry *dir_dev;
570
571 struct net_device *net_dev;
572 struct iw_statistics wstats;
573
574 struct tasklet_struct irq_tasklet;
575
576 struct workqueue_struct *workqueue;
577 struct work_struct reset_work;
578 struct work_struct security_work;
579 struct work_struct wx_event_work;
580 struct work_struct hang_check;
581 struct work_struct rf_kill;
582
583 u32 interrupts;
584 int tx_interrupts;
585 int rx_interrupts;
586 int inta_other;
587
588 spinlock_t low_lock;
589 struct semaphore action_sem;
590 struct semaphore adapter_sem;
591
592 wait_queue_head_t wait_command_queue;
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593};
594
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595/*********************************************************
596 * Host Command -> From Driver to FW
597 *********************************************************/
598
599/**
600 * Host command identifiers
601 */
602#define HOST_COMPLETE 2
603#define SYSTEM_CONFIG 6
604#define SSID 8
605#define MANDATORY_BSSID 9
606#define AUTHENTICATION_TYPE 10
607#define ADAPTER_ADDRESS 11
608#define PORT_TYPE 12
609#define INTERNATIONAL_MODE 13
610#define CHANNEL 14
611#define RTS_THRESHOLD 15
612#define FRAG_THRESHOLD 16
613#define POWER_MODE 17
614#define TX_RATES 18
615#define BASIC_TX_RATES 19
616#define WEP_KEY_INFO 20
617#define WEP_KEY_INDEX 25
618#define WEP_FLAGS 26
619#define ADD_MULTICAST 27
620#define CLEAR_ALL_MULTICAST 28
621#define BEACON_INTERVAL 29
622#define ATIM_WINDOW 30
623#define CLEAR_STATISTICS 31
624#define SEND 33
625#define TX_POWER_INDEX 36
626#define BROADCAST_SCAN 43
627#define CARD_DISABLE 44
628#define PREFERRED_BSSID 45
629#define SET_SCAN_OPTIONS 46
630#define SCAN_DWELL_TIME 47
631#define SWEEP_TABLE 48
632#define AP_OR_STATION_TABLE 49
633#define GROUP_ORDINALS 50
634#define SHORT_RETRY_LIMIT 51
635#define LONG_RETRY_LIMIT 52
636
637#define HOST_PRE_POWER_DOWN 58
638#define CARD_DISABLE_PHY_OFF 61
639#define MSDU_TX_RATES 62
640
070d0165 641/* Rogue AP Detection */
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642#define SET_STATION_STAT_BITS 64
643#define CLEAR_STATIONS_STAT_BITS 65
644#define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
645#define SET_SECURITY_INFORMATION 67
646#define DISASSOCIATION_BSSID 68
647#define SET_WPA_IE 69
648
070d0165 649/* system configuration bit mask: */
2c86c275 650#define IPW_CFG_MONITOR 0x00004
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651#define IPW_CFG_PREAMBLE_AUTO 0x00010
652#define IPW_CFG_IBSS_AUTO_START 0x00020
2c86c275 653#define IPW_CFG_LOOPBACK 0x00100
2c86c275 654#define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
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655#define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
656#define IPW_CFG_802_1x_ENABLE 0x04000
657#define IPW_CFG_BSS_MASK 0x08000
658#define IPW_CFG_IBSS_MASK 0x10000
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659
660#define IPW_SCAN_NOASSOCIATE (1<<0)
661#define IPW_SCAN_MIXED_CELL (1<<1)
662/* RESERVED (1<<2) */
663#define IPW_SCAN_PASSIVE (1<<3)
664
665#define IPW_NIC_FATAL_ERROR 0x2A7F0
666#define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
667#define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
668#define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
669#define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
670#define IPW2100_ERR_FW_LOAD (0x12 << 24)
671
672#define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
673#define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
674
675#define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
676#define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
677#define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
678#define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
679
680#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
681#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
682#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
683
684#define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
685 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
686
687#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
688 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
689
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690#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
691#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
692
693#define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
694#define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
695#define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
ee8e365a 696#define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
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697#define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
698#define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
699#define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
700#define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
701#define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
702#define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
703#define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
704
705#define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
706#define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
707#define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
708#define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
709#define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
710#define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
711#define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
712
713#define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
714#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
715#define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
716#define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
717#define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
718#define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
719#define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
720#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
721#define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
722
723#define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
724#define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
725#define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
726#define IPW_BIT_GPIO_RF_KILL 0x00010000
727
728#define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
729
730#define IPW_REG_DOMAIN_0_OFFSET 0x0000
731#define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
732
733#define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
734#define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
735#define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
736#define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
737#define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
738#define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
739#define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
740#define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
741#define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
742#define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
743#define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
744#define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
745
746#define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
747
748#define IPW_INTERRUPT_MASK 0xC1010013
749
750#define IPW2100_CONTROL_REG 0x220000
751#define IPW2100_CONTROL_PHY_OFF 0x8
752
753#define IPW2100_COMMAND 0x00300004
754#define IPW2100_COMMAND_PHY_ON 0x0
755#define IPW2100_COMMAND_PHY_OFF 0x1
756
757/* in DEBUG_AREA, values of memory always 0xd55555d5 */
758#define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
759#define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
760#define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
761
762#define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
763
764#define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
765#define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
766#define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
767
768// BD ring queue read/write difference
769#define IPW_BD_QUEUE_W_R_MIN_SPARE 2
770
771#define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
772
773#define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
774#define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
775
66b04a80 776#define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_hdr_3addr)
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777#define IPW_MAX_80211_PAYLOAD_SIZE 2304U
778#define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
779#define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
780#define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
781#define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
782 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
783 sizeof(struct ethhdr))
784
785#define IPW_802_11_FCS_LENGTH 4
786#define IPW_RX_NIC_BUFFER_LENGTH \
787 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
788 IPW_802_11_FCS_LENGTH)
789
790#define IPW_802_11_PAYLOAD_OFFSET \
66b04a80 791 (sizeof(struct ieee80211_hdr_3addr) + \
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792 sizeof(struct ieee80211_snap_hdr))
793
794struct ipw2100_rx {
795 union {
796 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
99a4b232 797 struct ieee80211_hdr_4addr header;
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798 u32 status;
799 struct ipw2100_notification notification;
800 struct ipw2100_cmd_header command;
801 } rx_data;
802} __attribute__ ((packed));
803
070d0165 804/* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */
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805#define TX_RATE_1_MBIT 0x0001
806#define TX_RATE_2_MBIT 0x0002
807#define TX_RATE_5_5_MBIT 0x0004
808#define TX_RATE_11_MBIT 0x0008
809#define TX_RATE_MASK 0x000F
810#define DEFAULT_TX_RATES 0x000F
811
812#define IPW_POWER_MODE_CAM 0x00 //(always on)
813#define IPW_POWER_INDEX_1 0x01
814#define IPW_POWER_INDEX_2 0x02
815#define IPW_POWER_INDEX_3 0x03
816#define IPW_POWER_INDEX_4 0x04
817#define IPW_POWER_INDEX_5 0x05
818#define IPW_POWER_AUTO 0x06
819#define IPW_POWER_MASK 0x0F
820#define IPW_POWER_ENABLED 0x10
821#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
822
823#define IPW_TX_POWER_AUTO 0
824#define IPW_TX_POWER_ENHANCED 1
825
826#define IPW_TX_POWER_DEFAULT 32
827#define IPW_TX_POWER_MIN 0
828#define IPW_TX_POWER_MAX 16
829#define IPW_TX_POWER_MIN_DBM (-12)
830#define IPW_TX_POWER_MAX_DBM 16
831
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832#define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
833#define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
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834
835#define REG_MIN_CHANNEL 0
836#define REG_MAX_CHANNEL 14
837
838#define REG_CHANNEL_MASK 0x00003FFF
839#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
840
841#define DIVERSITY_EITHER 0 // Use both antennas
842#define DIVERSITY_ANTENNA_A 1 // Use antenna A
843#define DIVERSITY_ANTENNA_B 2 // Use antenna B
844
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845#define HOST_COMMAND_WAIT 0
846#define HOST_COMMAND_NO_WAIT 1
847
848#define LOCK_NONE 0
849#define LOCK_DRIVER 1
850#define LOCK_FW 2
851
852#define TYPE_SWEEP_ORD 0x000D
853#define TYPE_IBSS_STTN_ORD 0x000E
854#define TYPE_BSS_AP_ORD 0x000F
855#define TYPE_RAW_BEACON_ENTRY 0x0010
856#define TYPE_CALIBRATION_DATA 0x0011
857#define TYPE_ROGUE_AP_DATA 0x0012
858#define TYPE_ASSOCIATION_REQUEST 0x0013
859#define TYPE_REASSOCIATION_REQUEST 0x0014
860
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861#define HW_FEATURE_RFKILL (0x0001)
862#define RF_KILLSWITCH_OFF (1)
863#define RF_KILLSWITCH_ON (0)
864
865#define IPW_COMMAND_POOL_SIZE 40
866
867#define IPW_START_ORD_TAB_1 1
868#define IPW_START_ORD_TAB_2 1000
869
870#define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
871
872#define IS_ORDINAL_TABLE_ONE(mgr,id) \
873 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
874#define IS_ORDINAL_TABLE_TWO(mgr,id) \
875 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
876
877#define BSS_ID_LENGTH 6
878
879// Fixed size data: Ordinal Table 1
880typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
881// Transmit statistics
ee8e365a 882 IPW_ORD_STAT_TX_HOST_REQUESTS = 1, // # of requested Host Tx's (MSDU)
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883 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
884 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
885
886 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
887 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
888 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
889 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
890 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
891
ee8e365a 892 IPW_ORD_STAT_TX_NODIR_DATA1 = 13, // # of successful Non_Directed Tx's (MSDU) @ 1MB
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893 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
894 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
895 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
896
897 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
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898 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
899 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
900 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
901 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
2c86c275 902 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
ee8e365a 903 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
2c86c275 904 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
ee8e365a 905 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
2c86c275 906 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
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907 IPW_ORD_STAT_TX_BEACON, // # of tx beacon
908 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
2c86c275 909 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
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910 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
911 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
2c86c275 912
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913 IPW_ORD_STAT_TX_TOTAL_BYTES = 41, // Total successful Tx data bytes
914 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
915 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
916 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
917 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
918 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
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919
920 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
921 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
ee8e365a 922 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP, // # of times max tries in a hop failed
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923 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
924 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
925 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
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926 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
927 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
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928 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
929
930 // Receive statistics
931 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
932 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
933 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
934 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
935 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
936 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
937 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
938
ee8e365a 939 IPW_ORD_STAT_RX_NODIR_DATA = 71, // # of nondirected packets
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940 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
941 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
942 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
943 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
944
945 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
946 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
947 IPW_ORD_STAT_RX_RTS, // # of Rx RTS
948 IPW_ORD_STAT_RX_CTS, // # of Rx CTS
949 IPW_ORD_STAT_RX_ACK, // # of Rx ACK
950 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
951 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
952 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
953 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
954 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
955 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
956 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
957 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
958 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
959 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
960 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
961 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
962 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
963
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964 IPW_ORD_STAT_RX_TOTAL_BYTES = 101, // Total rx data bytes received
965 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
966 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
967 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
968 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
969 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
2c86c275 970
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971 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
972 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
973 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
974 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
975 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
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976
977 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
978 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
979 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
980 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
981 IPW_ORD_SYS_BOOT_TIME, // # Boot time
982 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
983 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
984 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
985 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
986 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
987 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
988 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
989 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
990 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
991
992// PSP Statistics
ee8e365a 993 IPW_ORD_STAT_PSP_SUSPENSION = 137, // # of times adapter suspended
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994 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
995 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
ee8e365a 996 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT, // # of timeouts waiting for last broadcast/muticast pkt
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997 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
998 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
999 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
1000
1001// Association and roaming
1002 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
ee8e365a 1003 IPW_ORD_STAT_PERCENT_MISSED_BCNS, // current calculation of % missed beacons
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1004 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
1005 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
1006 // AP table entry. set to 0 if not associated
1007 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
1008 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
1009 IPW_ORD_STAT_AP_ASSNS, // # of associations
1010 IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1011 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
1012 IPW_ORD_STAT_FULL_SCANS, // # of full scans
1013
1014 IPW_ORD_CARD_DISABLED, // # Card Disabled
1015 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
1016 IPW_FILLER_40,
1017 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1018 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
1019 // hops or no prob_ responses in last 3 minutes
1020 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
1021 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
1022 // load at the AP
1023 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
1024 // eligible group
1025 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
1026 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
1027 IPW_FILLER_41,
1028 IPW_FILLER_42,
1029 IPW_FILLER_43,
1030 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1031 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
1032 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
1033
1034// Other statistics
1035 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
1036 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1037 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
1038 IPW_ORD_SELF_TEST_STATUS, //NS //
1039 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
1040 IPW_ORD_POWER_MGMT_INDEX, //NS //
1041 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
1042 IPW_ORD_COUNTRY_CHANNELS, // channels suported by country
1043// IPW_ORD_COUNTRY_CHANNELS:
1044// For 11b the lower 2-byte are used for channels from 1-14
1045// and the higher 2-byte are not used.
1046 IPW_ORD_RESET_CNT, // # of adapter resets (warm)
1047 IPW_ORD_BEACON_INTERVAL, // Beacon interval
1048
1049 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
1050 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
1051 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
1052 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1053 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
1054 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
1055
1056 IPW_ORD_RTC_TIME = 190, // current RTC time
1057 IPW_ORD_PORT_TYPE, // operating mode
1058 IPW_ORD_CURRENT_TX_RATE, // current tx rate
1059 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
1060 IPW_ORD_ATIM_WINDOW, // current ATIM Window
1061 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
1062 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
1063 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
1064 IPW_ORD_CAPABILITIES, // Management frame capability field
1065 IPW_ORD_AUTH_TYPE, // Type of authentication
1066 IPW_ORD_RADIO_TYPE, // Adapter card platform type
1067 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
1068 IPW_ORD_INT_MODE, // International mode
1069 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
1070 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1071 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
1072 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
1073 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
1074
1075 IPW_ORD_MAC_VERSION = 209, // MAC Version
1076 IPW_ORD_MAC_REVISION, // MAC Revision
1077 IPW_ORD_RADIO_VERSION, // Radio Version
1078 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1079 IPW_ORD_UCODE_VERSION, // Ucode Version
1080 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
1081} ORDINALTABLE1;
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1082
1083// ordinal table 2
1084// Variable length data:
1085#define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
1086
1087typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1088 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
1089 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
1090 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
1091 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
1092 IPW_FILL_1, //NS //
1093 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
1094 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
1095 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
1096 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1097 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
1098 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
1099 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
1100 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1101 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1102 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
1103 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
1104 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
1105 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1106 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1107} ORDINALTABLE2; // NS - means Not Supported by FW
1108
1109#define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
1110
1111#ifndef WIRELESS_SPY
1112#define WIRELESS_SPY // enable iwspy support
1113#endif
1114
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1115#define IPW_HOST_FW_SHARED_AREA0 0x0002f200
1116#define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
1117
1118#define IPW_HOST_FW_SHARED_AREA1 0x0002f610
1119#define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
1120
1121#define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
1122#define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
1123
1124#define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
1125#define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
1126
1127#define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
1128#define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
1129
1130struct ipw2100_fw_chunk {
1131 unsigned char *buf;
1132 long len;
1133 long pos;
1134 struct list_head list;
1135};
1136
1137struct ipw2100_fw_chunk_set {
ee8e365a 1138 const void *data;
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1139 unsigned long size;
1140};
1141
1142struct ipw2100_fw {
1143 int version;
1144 struct ipw2100_fw_chunk_set fw;
1145 struct ipw2100_fw_chunk_set uc;
1146 const struct firmware *fw_entry;
1147};
1148
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1149#define MAX_FW_VERSION_LEN 14
1150
ee8e365a 1151#endif /* _IPW2100_H */
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