iwlwifi: a few fixes in license
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / dvm / commands.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
128e63ef 8 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
b481de9c
ZY
9 *
10 * This program is free software; you can redistribute it and/or modify
01ebd063 11 * it under the terms of version 2 of the GNU General Public License as
b481de9c
ZY
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
410dc5aa 25 * in the file called COPYING.
b481de9c
ZY
26 *
27 * Contact Information:
759ef89f 28 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
128e63ef 33 * Copyright(c) 2005 - 2013 Intel Corporation. All rights reserved.
b481de9c
ZY
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
fcd427bb 63/*
1023fdc4 64 * Please use this file (commands.h) only for uCode API definitions.
767d055d 65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
1023fdc4 66 * Please use dev.h for driver implementation definitions.
fcd427bb 67 */
b481de9c 68
6a63578d
EG
69#ifndef __iwl_commands_h__
70#define __iwl_commands_h__
b481de9c 71
1f7b6172 72#include <linux/ieee80211.h>
e7a0d0c4 73#include <linux/types.h>
1f7b6172 74
4c897253 75
b481de9c
ZY
76enum {
77 REPLY_ALIVE = 0x1,
78 REPLY_ERROR = 0x2,
e80eb002 79 REPLY_ECHO = 0x3, /* test command */
b481de9c
ZY
80
81 /* RXON and QOS commands */
82 REPLY_RXON = 0x10,
83 REPLY_RXON_ASSOC = 0x11,
84 REPLY_QOS_PARAM = 0x13,
85 REPLY_RXON_TIMING = 0x14,
86
87 /* Multi-Station support */
88 REPLY_ADD_STA = 0x18,
fc66be2a 89 REPLY_REMOVE_STA = 0x19,
b481de9c 90 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
947279ee 91 REPLY_TXFIFO_FLUSH = 0x1e,
b481de9c 92
0a0bed1d
EG
93 /* Security */
94 REPLY_WEPKEY = 0x20,
95
b481de9c 96 /* RX, TX, LEDs */
b481de9c 97 REPLY_TX = 0x1c,
b481de9c 98 REPLY_LEDS_CMD = 0x48,
7f62cd17 99 REPLY_TX_LINK_QUALITY_CMD = 0x4e,
b481de9c 100
9636e583 101 /* WiMAX coexistence */
7f62cd17 102 COEX_PRIORITY_TABLE_CMD = 0x5a,
9636e583
RR
103 COEX_MEDIUM_NOTIFICATION = 0x5b,
104 COEX_EVENT_CMD = 0x5c,
105
be5d56ed 106 /* Calibration */
1a5c3d61 107 TEMPERATURE_NOTIFICATION = 0x62,
be5d56ed
TW
108 CALIBRATION_CFG_CMD = 0x65,
109 CALIBRATION_RES_NOTIFICATION = 0x66,
110 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
111
b481de9c 112 /* 802.11h related */
b481de9c
ZY
113 REPLY_QUIET_CMD = 0x71, /* not used */
114 REPLY_CHANNEL_SWITCH = 0x72,
115 CHANNEL_SWITCH_NOTIFICATION = 0x73,
116 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
117 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
118
119 /* Power Management */
120 POWER_TABLE_CMD = 0x77,
121 PM_SLEEP_NOTIFICATION = 0x7A,
122 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
123
124 /* Scan commands and notifications */
125 REPLY_SCAN_CMD = 0x80,
126 REPLY_SCAN_ABORT_CMD = 0x81,
127 SCAN_START_NOTIFICATION = 0x82,
128 SCAN_RESULTS_NOTIFICATION = 0x83,
129 SCAN_COMPLETE_NOTIFICATION = 0x84,
130
131 /* IBSS/AP commands */
132 BEACON_NOTIFICATION = 0x90,
133 REPLY_TX_BEACON = 0x91,
134 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
135
136 /* Miscellaneous commands */
76a2407a 137 REPLY_TX_POWER_DBM_CMD = 0x95,
b481de9c
ZY
138 QUIET_NOTIFICATION = 0x96, /* not used */
139 REPLY_TX_PWR_TABLE_CMD = 0x97,
76a2407a 140 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
2f748dec 141 TX_ANT_CONFIGURATION_CMD = 0x98,
b481de9c
ZY
142 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
143
a96a27f9 144 /* Bluetooth device coexistence config command */
b481de9c
ZY
145 REPLY_BT_CONFIG = 0x9b,
146
80cc0c38 147 /* Statistics */
b481de9c
ZY
148 REPLY_STATISTICS_CMD = 0x9c,
149 STATISTICS_NOTIFICATION = 0x9d,
150
151 /* RF-KILL commands and notifications */
152 REPLY_CARD_STATE_CMD = 0xa0,
153 CARD_STATE_NOTIFICATION = 0xa1,
154
155 /* Missed beacons notification */
156 MISSED_BEACONS_NOTIFICATION = 0xa2,
157
b481de9c
ZY
158 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
159 SENSITIVITY_CMD = 0xa8,
160 REPLY_PHY_CALIBRATION_CMD = 0xb0,
161 REPLY_RX_PHY_CMD = 0xc0,
162 REPLY_RX_MPDU_CMD = 0xc1,
857485c0 163 REPLY_RX = 0xc3,
b481de9c 164 REPLY_COMPRESSED_BA = 0xc5,
0288d237
JB
165
166 /* BT Coex */
167 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
168 REPLY_BT_COEX_PROT_ENV = 0xcd,
169 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
170
946ba30d
JB
171 /* PAN commands */
172 REPLY_WIPAN_PARAMS = 0xb2,
173 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
174 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
175 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
176 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
177 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
178 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
179 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
311dce71 180 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
946ba30d 181
c8ac61cf
JB
182 REPLY_WOWLAN_PATTERNS = 0xe0,
183 REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
184 REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
185 REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
186 REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
187 REPLY_WOWLAN_GET_STATUS = 0xe5,
56012409 188 REPLY_D3_CONFIG = 0xd3,
c8ac61cf 189
b481de9c
ZY
190 REPLY_MAX = 0xff
191};
192
b04db9ac
EG
193/*
194 * Minimum number of queues. MAX_NUM is defined in hw specific files.
195 * Set the minimum to accommodate
196 * - 4 standard TX queues
197 * - the command queue
198 * - 4 PAN TX queues
199 * - the PAN multicast queue, and
200 * - the AUX (TX during scan dwell) queue.
201 */
202#define IWL_MIN_NUM_QUEUES 11
203
204/*
205 * Command queue depends on iPAN support.
206 */
207#define IWL_DEFAULT_CMD_QUEUE_NUM 4
208#define IWL_IPAN_CMD_QUEUE_NUM 9
209
210#define IWL_TX_FIFO_BK 0 /* shared */
211#define IWL_TX_FIFO_BE 1
212#define IWL_TX_FIFO_VI 2 /* shared */
213#define IWL_TX_FIFO_VO 3
214#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
215#define IWL_TX_FIFO_BE_IPAN 4
216#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
217#define IWL_TX_FIFO_VO_IPAN 5
218/* re-uses the VO FIFO, uCode will properly flush/schedule */
219#define IWL_TX_FIFO_AUX 5
220#define IWL_TX_FIFO_UNUSED 255
221
222#define IWLAGN_CMD_FIFO_NUM 7
223
224/*
225 * This queue number is required for proper operation
226 * because the ucode will stop/start the scheduler as
227 * required.
228 */
229#define IWL_IPAN_MCAST_QUEUE 8
230
b481de9c
ZY
231/******************************************************************************
232 * (0)
abceddb4 233 * Commonly used structures and definitions:
80cc0c38 234 * Command header, rate_n_flags, txpower
b481de9c
ZY
235 *
236 *****************************************************************************/
237
abceddb4 238/**
5c5aa3f1 239 * iwlagn rate_n_flags bit fields
abceddb4 240 *
5c5aa3f1 241 * rate_n_flags format is used in following iwlagn commands:
857485c0 242 * REPLY_RX (response only)
5c5aa3f1 243 * REPLY_RX_MPDU (response only)
abceddb4
BC
244 * REPLY_TX (both command and response)
245 * REPLY_TX_LINK_QUALITY_CMD
246 *
247 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
248 * 2-0: 0) 6 Mbps
249 * 1) 12 Mbps
250 * 2) 18 Mbps
251 * 3) 24 Mbps
252 * 4) 36 Mbps
253 * 5) 48 Mbps
254 * 6) 54 Mbps
255 * 7) 60 Mbps
256 *
5c5aa3f1 257 * 4-3: 0) Single stream (SISO)
abceddb4 258 * 1) Dual stream (MIMO)
5c5aa3f1 259 * 2) Triple stream (MIMO)
abceddb4 260 *
7aafef1c 261 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
abceddb4
BC
262 *
263 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
264 * 3-0: 0xD) 6 Mbps
265 * 0xF) 9 Mbps
266 * 0x5) 12 Mbps
267 * 0x7) 18 Mbps
268 * 0x9) 24 Mbps
269 * 0xB) 36 Mbps
270 * 0x1) 48 Mbps
271 * 0x3) 54 Mbps
272 *
273 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
10617879 274 * 6-0: 10) 1 Mbps
abceddb4
BC
275 * 20) 2 Mbps
276 * 55) 5.5 Mbps
277 * 110) 11 Mbps
278 */
279#define RATE_MCS_CODE_MSK 0x7
5c5aa3f1
HD
280#define RATE_MCS_SPATIAL_POS 3
281#define RATE_MCS_SPATIAL_MSK 0x18
abceddb4
BC
282#define RATE_MCS_HT_DUP_POS 5
283#define RATE_MCS_HT_DUP_MSK 0x20
2520546a
DH
284/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
285#define RATE_MCS_RATE_MSK 0xff
abceddb4 286
075416cd 287/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
abceddb4
BC
288#define RATE_MCS_FLAGS_POS 8
289#define RATE_MCS_HT_POS 8
290#define RATE_MCS_HT_MSK 0x100
291
075416cd 292/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
abceddb4
BC
293#define RATE_MCS_CCK_POS 9
294#define RATE_MCS_CCK_MSK 0x200
295
075416cd 296/* Bit 10: (1) Use Green Field preamble */
abceddb4
BC
297#define RATE_MCS_GF_POS 10
298#define RATE_MCS_GF_MSK 0x400
299
7aafef1c
WYG
300/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
301#define RATE_MCS_HT40_POS 11
302#define RATE_MCS_HT40_MSK 0x800
abceddb4 303
7aafef1c 304/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
abceddb4
BC
305#define RATE_MCS_DUP_POS 12
306#define RATE_MCS_DUP_MSK 0x1000
307
075416cd 308/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
abceddb4
BC
309#define RATE_MCS_SGI_POS 13
310#define RATE_MCS_SGI_MSK 0x2000
311
312/**
76eff18b
TW
313 * rate_n_flags Tx antenna masks
314 * 4965 has 2 transmitters
315 * 5100 has 1 transmitter B
316 * 5150 has 1 transmitter A
317 * 5300 has 3 transmitters
318 * 5350 has 3 transmitters
319 * bit14:16
abceddb4 320 */
600c0e11
TW
321#define RATE_MCS_ANT_POS 14
322#define RATE_MCS_ANT_A_MSK 0x04000
323#define RATE_MCS_ANT_B_MSK 0x08000
324#define RATE_MCS_ANT_C_MSK 0x10000
325#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
326#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
76eff18b 327#define RATE_ANT_NUM 3
80cc0c38
BC
328
329#define POWER_TABLE_NUM_ENTRIES 33
330#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
331#define POWER_TABLE_CCK_ENTRY 32
332
e57f1489
WYG
333#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
334#define IWL_PWR_CCK_ENTRIES 2
335
80cc0c38
BC
336/**
337 * struct tx_power_dual_stream
338 *
339 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
340 *
341 * Same format as iwl_tx_power_dual_stream, but __le32
342 */
343struct tx_power_dual_stream {
344 __le32 dw;
ba2d3587 345} __packed;
80cc0c38 346
630fe9b6 347/**
a96a27f9 348 * Command REPLY_TX_POWER_DBM_CMD = 0x98
ab63c68a 349 * struct iwlagn_tx_power_dbm_cmd
630fe9b6 350 */
ab63c68a
WYG
351#define IWLAGN_TX_POWER_AUTO 0x7f
352#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
853554ac 353
ab63c68a 354struct iwlagn_tx_power_dbm_cmd {
630fe9b6
TW
355 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
356 u8 flags;
357 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
358 u8 reserved;
ba2d3587 359} __packed;
80cc0c38 360
2f748dec
WYG
361/**
362 * Command TX_ANT_CONFIGURATION_CMD = 0x98
363 * This command is used to configure valid Tx antenna.
364 * By default uCode concludes the valid antenna according to the radio flavor.
365 * This command enables the driver to override/modify this conclusion.
366 */
367struct iwl_tx_ant_config_cmd {
368 __le32 valid;
ba2d3587 369} __packed;
2f748dec 370
b481de9c
ZY
371/******************************************************************************
372 * (0a)
373 * Alive and Error Commands & Responses:
374 *
375 *****************************************************************************/
376
51e9bf5d 377#define UCODE_VALID_OK cpu_to_le32(0x1)
ca7966c8 378
075416cd
BC
379/**
380 * REPLY_ALIVE = 0x1 (response only, not a command)
381 *
382 * uCode issues this "alive" notification once the runtime image is ready
383 * to receive commands from the driver. This is the *second* "alive"
384 * notification that the driver will receive after rebooting uCode;
385 * this "alive" is indicated by subtype field != 9.
386 *
387 * See comments documenting "BSM" (bootstrap state machine).
388 *
389 * This response includes two pointers to structures within the device's
390 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
391 *
392 * 1) log_event_table_ptr indicates base of the event log. This traces
393 * a 256-entry history of uCode execution within a circular buffer.
394 * Its header format is:
395 *
396 * __le32 log_size; log capacity (in number of entries)
397 * __le32 type; (1) timestamp with each entry, (0) no timestamp
398 * __le32 wraps; # times uCode has wrapped to top of circular buffer
399 * __le32 write_index; next circular buffer entry that uCode would fill
400 *
401 * The header is followed by the circular buffer of log entries. Entries
402 * with timestamps have the following format:
403 *
404 * __le32 event_id; range 0 - 1500
405 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
406 * __le32 data; event_id-specific data value
407 *
408 * Entries without timestamps contain only event_id and data.
409 *
461ef382 410 *
075416cd 411 * 2) error_event_table_ptr indicates base of the error log. This contains
461ef382 412 * information about any uCode error that occurs. For agn, the format
e46f6538 413 * of the error log is defined by struct iwl_error_event_table.
075416cd
BC
414 *
415 * The Linux driver can print both logs to the system log when a uCode error
416 * occurs.
417 */
e46f6538
JB
418
419/*
420 * Note: This structure is read from the device with IO accesses,
421 * and the reading already does the endian conversion. As it is
422 * read with u32-sized accesses, any members with a different size
423 * need to be ordered correctly though!
424 */
425struct iwl_error_event_table {
426 u32 valid; /* (nonzero) valid, (0) log is empty */
427 u32 error_id; /* type of error */
428 u32 pc; /* program counter */
429 u32 blink1; /* branch link */
430 u32 blink2; /* branch link */
431 u32 ilink1; /* interrupt link */
432 u32 ilink2; /* interrupt link */
433 u32 data1; /* error-specific data */
434 u32 data2; /* error-specific data */
435 u32 line; /* source code line of error */
436 u32 bcon_time; /* beacon timer */
437 u32 tsf_low; /* network timestamp function timer */
438 u32 tsf_hi; /* network timestamp function timer */
439 u32 gp1; /* GP1 timer register */
440 u32 gp2; /* GP2 timer register */
441 u32 gp3; /* GP3 timer register */
442 u32 ucode_ver; /* uCode version */
443 u32 hw_ver; /* HW Silicon version */
444 u32 brd_ver; /* HW board version */
445 u32 log_pc; /* log program counter */
446 u32 frame_ptr; /* frame pointer */
447 u32 stack_ptr; /* stack pointer */
448 u32 hcmd; /* last host command header */
d332f591
WYG
449 u32 isr0; /* isr status register LMPM_NIC_ISR0:
450 * rxtx_flag */
451 u32 isr1; /* isr status register LMPM_NIC_ISR1:
452 * host_flag */
453 u32 isr2; /* isr status register LMPM_NIC_ISR2:
454 * enc_flag */
455 u32 isr3; /* isr status register LMPM_NIC_ISR3:
456 * time_flag */
457 u32 isr4; /* isr status register LMPM_NIC_ISR4:
458 * wico interrupt */
e46f6538
JB
459 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
460 u32 wait_event; /* wait event() caller address */
461 u32 l2p_control; /* L2pControlField */
462 u32 l2p_duration; /* L2pDurationField */
463 u32 l2p_mhvalid; /* L2pMhValidBits */
464 u32 l2p_addr_match; /* L2pAddrMatchStat */
d332f591
WYG
465 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
466 * (LMPM_PMG_SEL) */
467 u32 u_timestamp; /* indicate when the date and time of the
468 * compilation */
e46f6538 469 u32 flow_handler; /* FH read/write pointers, RX credit */
e46f6538
JB
470} __packed;
471
885ba202 472struct iwl_alive_resp {
b481de9c
ZY
473 u8 ucode_minor;
474 u8 ucode_major;
475 __le16 reserved1;
476 u8 sw_rev[8];
477 u8 ver_type;
075416cd 478 u8 ver_subtype; /* not "9" for runtime alive */
b481de9c 479 __le16 reserved2;
075416cd
BC
480 __le32 log_event_table_ptr; /* SRAM address for event log */
481 __le32 error_event_table_ptr; /* SRAM address for error log */
b481de9c
ZY
482 __le32 timestamp;
483 __le32 is_valid;
ba2d3587 484} __packed;
b481de9c 485
b481de9c
ZY
486/*
487 * REPLY_ERROR = 0x2 (response only, not a command)
488 */
885ba202 489struct iwl_error_resp {
b481de9c
ZY
490 __le32 error_type;
491 u8 cmd_id;
492 u8 reserved1;
493 __le16 bad_cmd_seq_num;
b481de9c 494 __le32 error_info;
3195c1f3 495 __le64 timestamp;
ba2d3587 496} __packed;
b481de9c
ZY
497
498/******************************************************************************
499 * (1)
500 * RXON Commands & Responses:
501 *
502 *****************************************************************************/
503
504/*
505 * Rx config defines & structure
506 */
507/* rx_config device types */
508enum {
509 RXON_DEV_TYPE_AP = 1,
510 RXON_DEV_TYPE_ESS = 3,
511 RXON_DEV_TYPE_IBSS = 4,
512 RXON_DEV_TYPE_SNIFFER = 6,
946ba30d
JB
513 RXON_DEV_TYPE_CP = 7,
514 RXON_DEV_TYPE_2STA = 8,
515 RXON_DEV_TYPE_P2P = 9,
b481de9c
ZY
516};
517
14519a0b 518
51e9bf5d 519#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
7b841727 520#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
51e9bf5d 521#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
14519a0b 522#define RXON_RX_CHAIN_VALID_POS (1)
51e9bf5d 523#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
14519a0b 524#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
51e9bf5d 525#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
14519a0b 526#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
51e9bf5d 527#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
14519a0b 528#define RXON_RX_CHAIN_CNT_POS (10)
51e9bf5d 529#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
14519a0b 530#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
51e9bf5d 531#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
14519a0b
BC
532#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
533
b481de9c
ZY
534/* rx_config flags */
535/* band & modulation selection */
51e9bf5d
HH
536#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
537#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
b481de9c 538/* auto detection enable */
51e9bf5d 539#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
b481de9c 540/* TGg protection when tx */
51e9bf5d 541#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
b481de9c 542/* cck short slot & preamble */
51e9bf5d
HH
543#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
544#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
b481de9c 545/* antenna selection */
51e9bf5d
HH
546#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
547#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
548#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
549#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 550/* radar detection enable */
51e9bf5d
HH
551#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
552#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
b481de9c
ZY
553/* rx response to host with 8-byte TSF
554* (according to ON_AIR deassertion) */
51e9bf5d 555#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
b481de9c 556
14519a0b
BC
557
558/* HT flags */
559#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
51e9bf5d 560#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
14519a0b
BC
561
562#define RXON_FLG_HT_OPERATING_MODE_POS (23)
563
51e9bf5d 564#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
7aafef1c 565#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
14519a0b
BC
566
567#define RXON_FLG_CHANNEL_MODE_POS (25)
51e9bf5d 568#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
a2b0f02e
WYG
569
570/* channel mode */
571enum {
572 CHANNEL_MODE_LEGACY = 0,
573 CHANNEL_MODE_PURE_40 = 1,
574 CHANNEL_MODE_MIXED = 2,
575 CHANNEL_MODE_RESERVED = 3,
576};
577#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
578#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
579#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
580
a326a5d0 581/* CTS to self (if spec allows) flag */
51e9bf5d 582#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
14519a0b 583
b481de9c
ZY
584/* rx_config filter flags */
585/* accept all data frames */
51e9bf5d 586#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
b481de9c 587/* pass control & management to host */
51e9bf5d 588#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
b481de9c 589/* accept multi-cast */
51e9bf5d 590#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
b481de9c 591/* don't decrypt uni-cast frames */
51e9bf5d 592#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
b481de9c 593/* don't decrypt multi-cast frames */
51e9bf5d 594#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
b481de9c 595/* STA is associated */
51e9bf5d 596#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
b481de9c 597/* transfer to host non bssid beacons in associated state */
51e9bf5d 598#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
b481de9c 599
80cc0c38 600/**
b481de9c 601 * REPLY_RXON = 0x10 (command, has simple generic response)
80cc0c38
BC
602 *
603 * RXON tunes the radio tuner to a service channel, and sets up a number
604 * of parameters that are used primarily for Rx, but also for Tx operations.
605 *
606 * NOTE: When tuning to a new channel, driver must set the
607 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
608 * info within the device, including the station tables, tx retry
609 * rate tables, and txpower tables. Driver must build a new station
610 * table and txpower table before transmitting anything on the RXON
611 * channel.
612 *
613 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
614 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
615 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
b481de9c 616 */
3d24a9f7 617
c1adf9fb
GG
618struct iwl_rxon_cmd {
619 u8 node_addr[6];
620 __le16 reserved1;
621 u8 bssid_addr[6];
622 __le16 reserved2;
623 u8 wlap_bssid_addr[6];
624 __le16 reserved3;
625 u8 dev_type;
626 u8 air_propagation;
627 __le16 rx_chain;
628 u8 ofdm_basic_rates;
629 u8 cck_basic_rates;
630 __le16 assoc_id;
631 __le32 flags;
632 __le32 filter_flags;
633 __le16 channel;
634 u8 ofdm_ht_single_stream_basic_rates;
635 u8 ofdm_ht_dual_stream_basic_rates;
636 u8 ofdm_ht_triple_stream_basic_rates;
637 u8 reserved5;
638 __le16 acquisition_data;
639 __le16 reserved6;
ba2d3587 640} __packed;
c1adf9fb 641
3d24a9f7
TW
642/*
643 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
644 */
89e746b2 645struct iwl_rxon_assoc_cmd {
b481de9c
ZY
646 __le32 flags;
647 __le32 filter_flags;
648 u8 ofdm_basic_rates;
649 u8 cck_basic_rates;
3d24a9f7 650 __le16 reserved1;
b481de9c
ZY
651 u8 ofdm_ht_single_stream_basic_rates;
652 u8 ofdm_ht_dual_stream_basic_rates;
3d24a9f7
TW
653 u8 ofdm_ht_triple_stream_basic_rates;
654 u8 reserved2;
b481de9c 655 __le16 rx_chain_select_flags;
3d24a9f7
TW
656 __le16 acquisition_data;
657 __le32 reserved3;
ba2d3587 658} __packed;
b481de9c 659
b5d7be5e 660#define IWL_CONN_MAX_LISTEN_INTERVAL 10
2c2f3b33 661#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
fe7a90c2 662
b481de9c
ZY
663/*
664 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
665 */
3195c1f3
TW
666struct iwl_rxon_time_cmd {
667 __le64 timestamp;
b481de9c
ZY
668 __le16 beacon_interval;
669 __le16 atim_window;
670 __le32 beacon_init_val;
671 __le16 listen_interval;
946ba30d
JB
672 u8 dtim_period;
673 u8 delta_cp_bss_tbtts;
ba2d3587 674} __packed;
b481de9c 675
b481de9c
ZY
676/*
677 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
678 */
e57f1489
WYG
679/**
680 * struct iwl5000_channel_switch_cmd
681 * @band: 0- 5.2GHz, 1- 2.4GHz
682 * @expect_beacon: 0- resume transmits after channel switch
683 * 1- wait for beacon to resume transmits
684 * @channel: new channel number
685 * @rxon_flags: Rx on flags
686 * @rxon_filter_flags: filtering parameters
687 * @switch_time: switch time in extended beacon format
688 * @reserved: reserved bytes
689 */
690struct iwl5000_channel_switch_cmd {
691 u8 band;
692 u8 expect_beacon;
693 __le16 channel;
694 __le32 rxon_flags;
695 __le32 rxon_filter_flags;
696 __le32 switch_time;
697 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 698} __packed;
e57f1489
WYG
699
700/**
701 * struct iwl6000_channel_switch_cmd
702 * @band: 0- 5.2GHz, 1- 2.4GHz
703 * @expect_beacon: 0- resume transmits after channel switch
704 * 1- wait for beacon to resume transmits
705 * @channel: new channel number
706 * @rxon_flags: Rx on flags
707 * @rxon_filter_flags: filtering parameters
708 * @switch_time: switch time in extended beacon format
709 * @reserved: reserved bytes
710 */
711struct iwl6000_channel_switch_cmd {
712 u8 band;
713 u8 expect_beacon;
714 __le16 channel;
715 __le32 rxon_flags;
716 __le32 rxon_filter_flags;
717 __le32 switch_time;
718 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 719} __packed;
e57f1489 720
b481de9c
ZY
721/*
722 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
723 */
2aa6ab86 724struct iwl_csa_notification {
b481de9c
ZY
725 __le16 band;
726 __le16 channel;
727 __le32 status; /* 0 - OK, 1 - fail */
ba2d3587 728} __packed;
b481de9c
ZY
729
730/******************************************************************************
731 * (2)
732 * Quality-of-Service (QOS) Commands & Responses:
733 *
734 *****************************************************************************/
2054a00b
BC
735
736/**
737 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
738 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
739 *
740 * @cw_min: Contention window, start value in numbers of slots.
741 * Should be a power-of-2, minus 1. Device's default is 0x0f.
742 * @cw_max: Contention window, max value in numbers of slots.
743 * Should be a power-of-2, minus 1. Device's default is 0x3f.
744 * @aifsn: Number of slots in Arbitration Interframe Space (before
745 * performing random backoff timing prior to Tx). Device default 1.
746 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
747 *
748 * Device will automatically increase contention window by (2*CW) + 1 for each
749 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
750 * value, to cap the CW value.
751 */
1ff50bda 752struct iwl_ac_qos {
b481de9c
ZY
753 __le16 cw_min;
754 __le16 cw_max;
755 u8 aifsn;
756 u8 reserved1;
757 __le16 edca_txop;
ba2d3587 758} __packed;
b481de9c
ZY
759
760/* QoS flags defines */
51e9bf5d
HH
761#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
762#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
763#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
b481de9c 764
2054a00b 765/* Number of Access Categories (AC) (EDCA), queues 0..3 */
b481de9c
ZY
766#define AC_NUM 4
767
768/*
769 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
2054a00b
BC
770 *
771 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
772 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
b481de9c 773 */
1ff50bda 774struct iwl_qosparam_cmd {
b481de9c 775 __le32 qos_flags;
1ff50bda 776 struct iwl_ac_qos ac[AC_NUM];
ba2d3587 777} __packed;
b481de9c
ZY
778
779/******************************************************************************
780 * (3)
781 * Add/Modify Stations Commands & Responses:
782 *
783 *****************************************************************************/
784/*
785 * Multi station support
786 */
2054a00b
BC
787
788/* Special, dedicated locations within device's station table */
b481de9c 789#define IWL_AP_ID 0
946ba30d 790#define IWL_AP_ID_PAN 1
b481de9c 791#define IWL_STA_ID 2
946ba30d 792#define IWLAGN_PAN_BCAST_ID 14
bf3c7fdd
WYG
793#define IWLAGN_BROADCAST_ID 15
794#define IWLAGN_STATION_COUNT 16
b481de9c 795
3d29dd9b 796#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
b481de9c 797
1bd14eaf
JB
798#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
799#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
946ba30d 800#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
51e9bf5d
HH
801#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
802#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
74093ddf 803#define STA_FLG_MAX_AGG_SIZE_POS (19)
51e9bf5d 804#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
7aafef1c 805#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
51e9bf5d 806#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
74093ddf 807#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
51e9bf5d 808#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
b481de9c 809
2054a00b 810/* Use in mode field. 1: modify existing entry, 0: add new station entry */
b481de9c
ZY
811#define STA_CONTROL_MODIFY_MSK 0x01
812
813/* key flags __le16*/
51e9bf5d
HH
814#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
815#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
816#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
817#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
818#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
b481de9c
ZY
819
820#define STA_KEY_FLG_KEYID_POS 8
51e9bf5d 821#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
eaaf7894 822/* wep key is either from global key (0) or from station info array (1) */
51e9bf5d 823#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
eaaf7894
EG
824
825/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
51e9bf5d
HH
826#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
827#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
deb09c43 828#define STA_KEY_MAX_NUM 8
c10afb6e 829#define STA_KEY_MAX_NUM_PAN 16
5a3d9882
JB
830/* must not match WEP_INVALID_OFFSET */
831#define IWLAGN_HW_KEY_DEFAULT 0xfe
b481de9c 832
2054a00b 833/* Flags indicate whether to modify vs. don't change various station params */
b481de9c
ZY
834#define STA_MODIFY_KEY_MASK 0x01
835#define STA_MODIFY_TID_DISABLE_TX 0x02
836#define STA_MODIFY_TX_RATE_MSK 0x04
837#define STA_MODIFY_ADDBA_TID_MSK 0x08
838#define STA_MODIFY_DELBA_TID_MSK 0x10
6ab10ff8 839#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
2054a00b
BC
840
841/* Receiver address (actually, Rx station's index into station table),
842 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
b481de9c
ZY
843#define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
844
a8029bb7 845/* agn */
133636de
TW
846struct iwl_keyinfo {
847 __le16 key_flags;
848 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
849 u8 reserved1;
850 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
851 u8 key_offset;
852 u8 reserved2;
853 u8 key[16]; /* 16-byte unicast decryption key */
854 __le64 tx_secur_seq_cnt;
855 __le64 hw_tkip_mic_rx_key;
856 __le64 hw_tkip_mic_tx_key;
ba2d3587 857} __packed;
133636de 858
2054a00b
BC
859/**
860 * struct sta_id_modify
861 * @addr[ETH_ALEN]: station's MAC address
862 * @sta_id: index of station in uCode's station table
863 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
864 *
865 * Driver selects unused table index when adding new station,
866 * or the index to a pre-existing station entry when modifying that station.
867 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
868 *
869 * modify_mask flags select which parameters to modify vs. leave alone.
870 */
b481de9c
ZY
871struct sta_id_modify {
872 u8 addr[ETH_ALEN];
873 __le16 reserved1;
874 u8 sta_id;
875 u8 modify_mask;
876 __le16 reserved2;
ba2d3587 877} __packed;
b481de9c
ZY
878
879/*
880 * REPLY_ADD_STA = 0x18 (command)
2054a00b
BC
881 *
882 * The device contains an internal table of per-station information,
883 * with info on security keys, aggregation parameters, and Tx rates for
767d055d
WYG
884 * initial Tx attempt and any retries (agn devices uses
885 * REPLY_TX_LINK_QUALITY_CMD,
2054a00b
BC
886 *
887 * REPLY_ADD_STA sets up the table entry for one station, either creating
888 * a new entry, or modifying a pre-existing one.
889 *
890 * NOTE: RXON command (without "associated" bit set) wipes the station table
891 * clean. Moving into RF_KILL state does this also. Driver must set up
892 * new station table before transmitting anything on the RXON channel
893 * (except active scans or active measurements; those commands carry
894 * their own txpower/rate setup data).
895 *
896 * When getting started on a new channel, driver must set up the
897 * IWL_BROADCAST_ID entry (last entry in the table). For a client
898 * station in a BSS, once an AP is selected, driver sets up the AP STA
899 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
900 * are all that are needed for a BSS client station. If the device is
901 * used as AP, or in an IBSS network, driver must set up station table
902 * entries for all STAs in network, starting with index IWL_STA_ID.
b481de9c 903 */
3d24a9f7 904
133636de
TW
905struct iwl_addsta_cmd {
906 u8 mode; /* 1: modify existing, 0: add new station */
907 u8 reserved[3];
908 struct sta_id_modify sta;
909 struct iwl_keyinfo key;
910 __le32 station_flags; /* STA_FLG_* */
911 __le32 station_flags_msk; /* STA_FLG_* */
912
913 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
914 * corresponding to bit (e.g. bit 5 controls TID 5).
915 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
916 __le16 tid_disable_tx;
7f62cd17 917 __le16 legacy_reserved;
133636de
TW
918
919 /* TID for which to add block-ack support.
920 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
921 u8 add_immediate_ba_tid;
922
923 /* TID for which to remove block-ack support.
924 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
925 u8 remove_immediate_ba_tid;
926
927 /* Starting Sequence Number for added block-ack support.
928 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
929 __le16 add_immediate_ba_ssn;
930
9bb487b4
JB
931 /*
932 * Number of packets OK to transmit to station even though
933 * it is asleep -- used to synchronise PS-poll and u-APSD
934 * responses while ucode keeps track of STA sleep state.
935 */
936 __le16 sleep_tx_count;
937
938 __le16 reserved2;
ba2d3587 939} __packed;
133636de
TW
940
941
2054a00b
BC
942#define ADD_STA_SUCCESS_MSK 0x1
943#define ADD_STA_NO_ROOM_IN_TABLE 0x2
944#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
945#define ADD_STA_MODIFY_NON_EXIST_STA 0x8
b481de9c
ZY
946/*
947 * REPLY_ADD_STA = 0x18 (response)
948 */
7a999bf0 949struct iwl_add_sta_resp {
2054a00b 950 u8 status; /* ADD_STA_* */
ba2d3587 951} __packed;
b481de9c 952
7a999bf0
TW
953#define REM_STA_SUCCESS_MSK 0x1
954/*
955 * REPLY_REM_STA = 0x19 (response)
956 */
957struct iwl_rem_sta_resp {
958 u8 status;
ba2d3587 959} __packed;
7a999bf0
TW
960
961/*
962 * REPLY_REM_STA = 0x19 (command)
963 */
964struct iwl_rem_sta_cmd {
965 u8 num_sta; /* number of removed stations */
966 u8 reserved[3];
967 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
968 u8 reserved2[2];
ba2d3587 969} __packed;
7a999bf0 970
f88e0ecc
WYG
971
972/* WiFi queues mask */
973#define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
974#define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
975#define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
976#define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
977#define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
978
979/* PAN queues mask */
980#define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
981#define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
982#define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
983#define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
984#define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
985#define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
986
947279ee
WYG
987#define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
988
a4dece9a 989#define IWL_DROP_ALL BIT(1)
716c74b0 990
947279ee
WYG
991/*
992 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
993 *
994 * When using full FIFO flush this command checks the scheduler HW block WR/RD
995 * pointers to check if all the frames were transferred by DMA into the
996 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
997 * empty the command can finish.
998 * This command is used to flush the TXFIFO from transmit commands, it may
999 * operate on single or multiple queues, the command queue can't be flushed by
1000 * this command. The command response is returned when all the queue flush
1001 * operations are done. Each TX command flushed return response with the FLUSH
1002 * status set in the TX response status. When FIFO flush operation is used,
1003 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1004 * are set.
1005 *
37c477dc 1006 * @queue_control: bit mask for which queues to flush
947279ee
WYG
1007 * @flush_control: flush controls
1008 * 0: Dump single MSDU
1009 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1010 * 2: Dump all FIFO
1011 */
1012struct iwl_txfifo_flush_cmd {
37c477dc 1013 __le32 queue_control;
947279ee
WYG
1014 __le16 flush_control;
1015 __le16 reserved;
0e954099 1016} __packed;
947279ee 1017
0a0bed1d
EG
1018/*
1019 * REPLY_WEP_KEY = 0x20
1020 */
1021struct iwl_wep_key {
1022 u8 key_index;
1023 u8 key_offset;
1024 u8 reserved1[2];
1025 u8 key_size;
1026 u8 reserved2[3];
1027 u8 key[16];
ba2d3587 1028} __packed;
0a0bed1d
EG
1029
1030struct iwl_wep_cmd {
1031 u8 num_keys;
1032 u8 global_key_type;
1033 u8 flags;
1034 u8 reserved;
1035 struct iwl_wep_key key[0];
ba2d3587 1036} __packed;
0a0bed1d
EG
1037
1038#define WEP_KEY_WEP_TYPE 1
1039#define WEP_KEYS_MAX 4
1040#define WEP_INVALID_OFFSET 0xff
4564ce8b 1041#define WEP_KEY_LEN_64 5
0a0bed1d 1042#define WEP_KEY_LEN_128 13
b481de9c
ZY
1043
1044/******************************************************************************
1045 * (4)
1046 * Rx Responses:
1047 *
1048 *****************************************************************************/
1049
51e9bf5d
HH
1050#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1051#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
8211ef78 1052
51e9bf5d
HH
1053#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1054#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1055#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1056#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
362b0563 1057#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70
9f30e04e 1058#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
12bf6f45 1059#define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7)
8211ef78
TW
1060
1061#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1062#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1063#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1064#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1065#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
17e476b8
EG
1066#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1067
1068#define RX_RES_STATUS_STATION_FOUND (1<<6)
1069#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
8211ef78
TW
1070
1071#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1072#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1073#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1074#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1075#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
b481de9c 1076
17e476b8
EG
1077#define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1078#define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1079#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1080#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1081
3d24a9f7 1082
7ccc896f
WYG
1083#define IWLAGN_RX_RES_PHY_CNT 8
1084#define IWLAGN_RX_RES_AGC_IDX 1
1085#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1086#define IWLAGN_RX_RES_RSSI_C_IDX 3
1087#define IWLAGN_OFDM_AGC_MSK 0xfe00
1088#define IWLAGN_OFDM_AGC_BIT_POS 9
1089#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1090#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1091#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1092#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1093#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1094#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1095#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1096#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1097#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1098
1099struct iwlagn_non_cfg_phy {
1100 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
ba2d3587 1101} __packed;
caab8f1a
TW
1102
1103
b481de9c 1104/*
857485c0 1105 * REPLY_RX = 0xc3 (response only, not a command)
b481de9c
ZY
1106 * Used only for legacy (non 11n) frames.
1107 */
caab8f1a 1108struct iwl_rx_phy_res {
b481de9c
ZY
1109 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1110 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1111 u8 stat_id; /* configurable DSP phy data set ID */
1112 u8 reserved1;
1113 __le64 timestamp; /* TSF at on air rise */
1114 __le32 beacon_time_stamp; /* beacon at on-air rise */
1115 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1116 __le16 channel; /* channel number */
caab8f1a 1117 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
52969981
BC
1118 __le32 rate_n_flags; /* RATE_MCS_* */
1119 __le16 byte_count; /* frame's byte-count */
30c1b0f7 1120 __le16 frame_time; /* frame's time on the air */
ba2d3587 1121} __packed;
b481de9c 1122
2fb291ee 1123struct iwl_rx_mpdu_res_start {
b481de9c
ZY
1124 __le16 byte_count;
1125 __le16 reserved;
ba2d3587 1126} __packed;
b481de9c
ZY
1127
1128
1129/******************************************************************************
1130 * (5)
1131 * Tx Commands & Responses:
1132 *
52969981
BC
1133 * Driver must place each REPLY_TX command into one of the prioritized Tx
1134 * queues in host DRAM, shared between driver and device (see comments for
1135 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1136 * are preparing to transmit, the device pulls the Tx command over the PCI
1137 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1138 * from which data will be transmitted.
1139 *
1140 * uCode handles all timing and protocol related to control frames
1141 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1142 * handle reception of block-acks; uCode updates the host driver via
767d055d 1143 * REPLY_COMPRESSED_BA.
52969981
BC
1144 *
1145 * uCode handles retrying Tx when an ACK is expected but not received.
1146 * This includes trying lower data rates than the one requested in the Tx
7f62cd17 1147 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
52969981
BC
1148 *
1149 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1150 * This command must be executed after every RXON command, before Tx can occur.
b481de9c
ZY
1151 *****************************************************************************/
1152
52969981
BC
1153/* REPLY_TX Tx flags field */
1154
4e3243f5
WYG
1155/*
1156 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
a326a5d0 1157 * before this frame. if CTS-to-self required check
4e3243f5 1158 * RXON_FLG_SELF_CTS_EN status.
4e3243f5
WYG
1159 */
1160#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
a326a5d0 1161
52969981
BC
1162/* 1: Expect ACK from receiving station
1163 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1164 * Set this for unicast frames, but not broadcast/multicast. */
51e9bf5d 1165#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
52969981 1166
767d055d 1167/* For agn devices:
52969981
BC
1168 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1169 * Tx command's initial_rate_index indicates first rate to try;
1170 * uCode walks through table for additional Tx attempts.
1171 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1172 * This rate will be used for all Tx attempts; it will not be scaled. */
51e9bf5d 1173#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
52969981
BC
1174
1175/* 1: Expect immediate block-ack.
1176 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
51e9bf5d 1177#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
52969981 1178
7f62cd17 1179/* Tx antenna selection field; reserved (0) for agn devices. */
51e9bf5d 1180#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
b481de9c 1181
52969981
BC
1182/* 1: Ignore Bluetooth priority for this frame.
1183 * 0: Delay Tx until Bluetooth device is done (normal usage). */
b2e8690d 1184#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
b481de9c 1185
52969981
BC
1186/* 1: uCode overrides sequence control field in MAC header.
1187 * 0: Driver provides sequence control field in MAC header.
1188 * Set this for management frames, non-QOS data frames, non-unicast frames,
1189 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
51e9bf5d 1190#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
b481de9c 1191
52969981
BC
1192/* 1: This frame is non-last MPDU; more fragments are coming.
1193 * 0: Last fragment, or not using fragmentation. */
51e9bf5d 1194#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
b481de9c 1195
52969981
BC
1196/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1197 * 0: No TSF required in outgoing frame.
1198 * Set this for transmitting beacons and probe responses. */
51e9bf5d 1199#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
b481de9c 1200
52969981
BC
1201/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1202 * alignment of frame's payload data field.
1203 * 0: No pad
1204 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1205 * field (but not both). Driver must align frame data (i.e. data following
1206 * MAC header) to DWORD boundary. */
51e9bf5d 1207#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
b481de9c 1208
8236e183
MS
1209/* accelerate aggregation support
1210 * 0 - no CCMP encryption; 1 - CCMP encryption */
51e9bf5d 1211#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
8236e183 1212
b481de9c 1213/* HCCA-AP - disable duration overwriting. */
51e9bf5d 1214#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
b481de9c 1215
52969981 1216
b481de9c
ZY
1217/*
1218 * TX command security control
1219 */
1220#define TX_CMD_SEC_WEP 0x01
1221#define TX_CMD_SEC_CCM 0x02
1222#define TX_CMD_SEC_TKIP 0x03
1223#define TX_CMD_SEC_MSK 0x03
1224#define TX_CMD_SEC_SHIFT 6
1225#define TX_CMD_SEC_KEY128 0x08
1226
3195cdb7
TW
1227/*
1228 * security overhead sizes
1229 */
1230#define WEP_IV_LEN 4
1231#define WEP_ICV_LEN 4
1232#define CCMP_MIC_LEN 8
1233#define TKIP_ICV_LEN 4
1234
3d24a9f7
TW
1235/*
1236 * REPLY_TX = 0x1c (command)
1237 */
1238
b481de9c 1239/*
52969981
BC
1240 * 4965 uCode updates these Tx attempt count values in host DRAM.
1241 * Used for managing Tx retries when expecting block-acks.
1242 * Driver should set these fields to 0.
b481de9c 1243 */
2aa6ab86 1244struct iwl_dram_scratch {
52969981
BC
1245 u8 try_cnt; /* Tx attempts */
1246 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
b481de9c 1247 __le16 reserved;
ba2d3587 1248} __packed;
b481de9c 1249
83d527d9 1250struct iwl_tx_cmd {
52969981
BC
1251 /*
1252 * MPDU byte count:
1253 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1254 * + 8 byte IV for CCM or TKIP (not used for WEP)
1255 * + Data payload
1256 * + 8-byte MIC (not used for CCM/WEP)
1257 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1258 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1259 * Range: 14-2342 bytes.
1260 */
b481de9c 1261 __le16 len;
52969981
BC
1262
1263 /*
1264 * MPDU or MSDU byte count for next frame.
1265 * Used for fragmentation and bursting, but not 11n aggregation.
1266 * Same as "len", but for next frame. Set to 0 if not applicable.
1267 */
b481de9c 1268 __le16 next_frame_len;
52969981
BC
1269
1270 __le32 tx_flags; /* TX_CMD_FLG_* */
1271
2aa6ab86 1272 /* uCode may modify this field of the Tx command (in host DRAM!).
52969981 1273 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
2aa6ab86 1274 struct iwl_dram_scratch scratch;
52969981
BC
1275
1276 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1277 __le32 rate_n_flags; /* RATE_MCS_* */
1278
1279 /* Index of destination station in uCode's station table */
b481de9c 1280 u8 sta_id;
52969981
BC
1281
1282 /* Type of security encryption: CCM or TKIP */
1283 u8 sec_ctl; /* TX_CMD_SEC_* */
1284
1285 /*
1286 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1287 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1288 * data frames, this field may be used to selectively reduce initial
1289 * rate (via non-0 value) for special frames (e.g. management), while
1290 * still supporting rate scaling for all frames.
1291 */
b481de9c
ZY
1292 u8 initial_rate_index;
1293 u8 reserved;
b481de9c 1294 u8 key[16];
b481de9c
ZY
1295 __le16 next_frame_flags;
1296 __le16 reserved2;
b481de9c
ZY
1297 union {
1298 __le32 life_time;
1299 __le32 attempt;
1300 } stop_time;
52969981
BC
1301
1302 /* Host DRAM physical address pointer to "scratch" in this command.
1303 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
b481de9c
ZY
1304 __le32 dram_lsb_ptr;
1305 u8 dram_msb_ptr;
52969981 1306
b481de9c
ZY
1307 u8 rts_retry_limit; /*byte 50 */
1308 u8 data_retry_limit; /*byte 51 */
b481de9c 1309 u8 tid_tspec;
b481de9c
ZY
1310 union {
1311 __le16 pm_frame_timeout;
1312 __le16 attempt_duration;
1313 } timeout;
52969981
BC
1314
1315 /*
1316 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1317 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1318 */
b481de9c 1319 __le16 driver_txop;
52969981
BC
1320
1321 /*
1322 * MAC header goes here, followed by 2 bytes padding if MAC header
1323 * length is 26 or 30 bytes, followed by payload data
1324 */
b481de9c
ZY
1325 u8 payload[0];
1326 struct ieee80211_hdr hdr[0];
ba2d3587 1327} __packed;
b481de9c 1328
04569cbe
WYG
1329/*
1330 * TX command response is sent after *agn* transmission attempts.
1331 *
1332 * both postpone and abort status are expected behavior from uCode. there is
1333 * no special operation required from driver; except for RFKILL_FLUSH,
1334 * which required tx flush host command to flush all the tx frames in queues
1335 */
b481de9c
ZY
1336enum {
1337 TX_STATUS_SUCCESS = 0x01,
1338 TX_STATUS_DIRECT_DONE = 0x02,
04569cbe
WYG
1339 /* postpone TX */
1340 TX_STATUS_POSTPONE_DELAY = 0x40,
1341 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1342 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1343 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1344 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1345 /* abort TX */
1346 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
b481de9c
ZY
1347 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1348 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1349 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
04569cbe
WYG
1350 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1351 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
b481de9c
ZY
1352 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1353 TX_STATUS_FAIL_DEST_PS = 0x88,
04569cbe 1354 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
b481de9c
ZY
1355 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1356 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1357 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1358 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
04569cbe 1359 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
b481de9c 1360 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1d270075
WYG
1361 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1362 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
b481de9c
ZY
1363};
1364
1365#define TX_PACKET_MODE_REGULAR 0x0000
1366#define TX_PACKET_MODE_BURST_SEQ 0x0100
1367#define TX_PACKET_MODE_BURST_FIRST 0x0200
1368
1369enum {
1370 TX_POWER_PA_NOT_ACTIVE = 0x0,
1371};
1372
1373enum {
3fd07a1e 1374 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
b481de9c
ZY
1375 TX_STATUS_DELAY_MSK = 0x00000040,
1376 TX_STATUS_ABORT_MSK = 0x00000080,
1377 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1378 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
3fd07a1e 1379 TX_RESERVED = 0x00780000, /* bits 19:22 */
b481de9c
ZY
1380 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1381 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1382};
1383
1384/* *******************************
52969981 1385 * TX aggregation status
b481de9c
ZY
1386 ******************************* */
1387
1388enum {
1389 AGG_TX_STATE_TRANSMITTED = 0x00,
1390 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1391 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1392 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1393 AGG_TX_STATE_ABORT_MSK = 0x08,
1394 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1395 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1396 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1397 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1398 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1399 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1400 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1401 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1402};
1403
e1b3fa0c
WYG
1404#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1405#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
cfe41828 1406#define AGG_TX_TRY_POS 12
e1b3fa0c 1407
3fd07a1e
TW
1408#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1409 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1410 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
b481de9c 1411
52969981 1412/* # tx attempts for first frame in aggregation */
b481de9c
ZY
1413#define AGG_TX_STATE_TRY_CNT_POS 12
1414#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1415
52969981 1416/* Command ID and sequence number of Tx command for this frame */
b481de9c
ZY
1417#define AGG_TX_STATE_SEQ_NUM_POS 16
1418#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1419
1420/*
1421 * REPLY_TX = 0x1c (response)
52969981
BC
1422 *
1423 * This response may be in one of two slightly different formats, indicated
1424 * by the frame_count field:
1425 *
1426 * 1) No aggregation (frame_count == 1). This reports Tx results for
1427 * a single frame. Multiple attempts, at various bit rates, may have
1428 * been made for this frame.
1429 *
1430 * 2) Aggregation (frame_count > 1). This reports Tx results for
1431 * 2 or more frames that used block-acknowledge. All frames were
1432 * transmitted at same rate. Rate scaling may have been used if first
1433 * frame in this new agg block failed in previous agg block(s).
1434 *
1435 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
767d055d
WYG
1436 * block-ack has not been received by the time the agn device records
1437 * this status.
52969981 1438 * This status relates to reasons the tx might have been blocked or aborted
767d055d 1439 * within the sending station (this agn device), rather than whether it was
52969981 1440 * received successfully by the destination station.
b481de9c 1441 */
001caff0
RR
1442struct agg_tx_status {
1443 __le16 status;
1444 __le16 sequence;
ba2d3587 1445} __packed;
001caff0 1446
3fd07a1e
TW
1447/*
1448 * definitions for initial rate index field
a96a27f9 1449 * bits [3:0] initial rate index
3fd07a1e
TW
1450 * bits [6:4] rate table color, used for the initial rate
1451 * bit-7 invalid rate indication
1452 * i.e. rate was not chosen from rate table
1453 * or rate table color was changed during frame retries
1454 * refer tlc rate info
1455 */
1456
1457#define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1458#define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1459#define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1460#define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1461#define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1462
1463/* refer to ra_tid */
898dade1
WYG
1464#define IWLAGN_TX_RES_TID_POS 0
1465#define IWLAGN_TX_RES_TID_MSK 0x0f
1466#define IWLAGN_TX_RES_RA_POS 4
1467#define IWLAGN_TX_RES_RA_MSK 0xf0
3fd07a1e 1468
898dade1 1469struct iwlagn_tx_resp {
001caff0
RR
1470 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1471 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1472 u8 failure_rts; /* # failures due to unsuccessful RTS */
1473 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1474
1475 /* For non-agg: Rate at which frame was successful.
1476 * For agg: Rate at which all frames were transmitted. */
1477 __le32 rate_n_flags; /* RATE_MCS_* */
1478
1479 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1480 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1481 __le16 wireless_media_time; /* uSecs */
1482
3fd07a1e
TW
1483 u8 pa_status; /* RF power amplifier measurement (not used) */
1484 u8 pa_integ_res_a[3];
1485 u8 pa_integ_res_b[3];
1486 u8 pa_integ_res_C[3];
001caff0
RR
1487
1488 __le32 tfd_info;
1489 __le16 seq_ctl;
1490 __le16 byte_cnt;
3fd07a1e
TW
1491 u8 tlc_info;
1492 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1493 __le16 frame_ctrl;
001caff0
RR
1494 /*
1495 * For non-agg: frame status TX_STATUS_*
1496 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1497 * fields follow this one, up to frame_count.
1498 * Bit fields:
1499 * 11- 0: AGG_TX_STATE_* status code
1500 * 15-12: Retry count for 1st frame in aggregation (retries
1501 * occur if tx failed for this frame when it was a
1502 * member of a previous aggregation block). If rate
1503 * scaling is used, retry count indicates the rate
1504 * table entry used for all frames in the new agg.
1505 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1506 */
1507 struct agg_tx_status status; /* TX status (in aggregation -
1508 * status of 1st frame) */
ba2d3587 1509} __packed;
b481de9c
ZY
1510/*
1511 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
52969981
BC
1512 *
1513 * Reports Block-Acknowledge from recipient station
b481de9c 1514 */
653fa4a0 1515struct iwl_compressed_ba_resp {
b481de9c
ZY
1516 __le32 sta_addr_lo32;
1517 __le16 sta_addr_hi16;
1518 __le16 reserved;
52969981
BC
1519
1520 /* Index of recipient (BA-sending) station in uCode's station table */
b481de9c
ZY
1521 u8 sta_id;
1522 u8 tid;
fe01b477
RR
1523 __le16 seq_ctl;
1524 __le64 bitmap;
b481de9c
ZY
1525 __le16 scd_flow;
1526 __le16 scd_ssn;
8829c9e2
WYG
1527 u8 txed; /* number of frames sent */
1528 u8 txed_2_done; /* number of frames acked */
ba2d3587 1529} __packed;
b481de9c
ZY
1530
1531/*
1532 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
2bdc7031 1533 *
3d24a9f7 1534 */
3d24a9f7 1535
b481de9c 1536/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
8a1b0245 1537#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
b481de9c 1538
2bdc7031 1539/* # of EDCA prioritized tx fifos */
b481de9c 1540#define LINK_QUAL_AC_NUM AC_NUM
2bdc7031
BC
1541
1542/* # entries in rate scale table to support Tx retries */
b481de9c
ZY
1543#define LINK_QUAL_MAX_RETRY_NUM 16
1544
2bdc7031 1545/* Tx antenna selection values */
8a1b0245
RC
1546#define LINK_QUAL_ANT_A_MSK (1 << 0)
1547#define LINK_QUAL_ANT_B_MSK (1 << 1)
b481de9c
ZY
1548#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1549
2bdc7031
BC
1550
1551/**
66c73db7 1552 * struct iwl_link_qual_general_params
2bdc7031
BC
1553 *
1554 * Used in REPLY_TX_LINK_QUALITY_CMD
1555 */
66c73db7 1556struct iwl_link_qual_general_params {
b481de9c 1557 u8 flags;
2bdc7031
BC
1558
1559 /* No entries at or above this (driver chosen) index contain MIMO */
b481de9c 1560 u8 mimo_delimiter;
2bdc7031
BC
1561
1562 /* Best single antenna to use for single stream (legacy, SISO). */
1563 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1564
1565 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1566 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1567
1568 /*
1569 * If driver needs to use different initial rates for different
1570 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1571 * this table will set that up, by indicating the indexes in the
1572 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1573 * Otherwise, driver should set all entries to 0.
1574 *
1575 * Entry usage:
1576 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1577 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1578 */
b481de9c 1579 u8 start_rate_index[LINK_QUAL_AC_NUM];
ba2d3587 1580} __packed;
b481de9c 1581
13c33a09 1582#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
b15826a7
WYG
1583#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1584#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
13c33a09
WYG
1585
1586#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1587#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1588#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1589
4263108c 1590#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
b623a9f7 1591#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
13c33a09
WYG
1592#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1593
2bdc7031 1594/**
66c73db7 1595 * struct iwl_link_qual_agg_params
2bdc7031
BC
1596 *
1597 * Used in REPLY_TX_LINK_QUALITY_CMD
1598 */
66c73db7 1599struct iwl_link_qual_agg_params {
2bdc7031 1600
7469701e
WYG
1601 /*
1602 *Maximum number of uSec in aggregation.
1603 * default set to 4000 (4 milliseconds) if not configured in .cfg
1604 */
b481de9c 1605 __le16 agg_time_limit;
2bdc7031
BC
1606
1607 /*
1608 * Number of Tx retries allowed for a frame, before that frame will
1609 * no longer be considered for the start of an aggregation sequence
1610 * (scheduler will then try to tx it as single frame).
1611 * Driver should set this to 3.
1612 */
b481de9c 1613 u8 agg_dis_start_th;
2bdc7031
BC
1614
1615 /*
1616 * Maximum number of frames in aggregation.
1617 * 0 = no limit (default). 1 = no aggregation.
1618 * Other values = max # frames in aggregation.
1619 */
b481de9c 1620 u8 agg_frame_cnt_limit;
2bdc7031 1621
b481de9c 1622 __le32 reserved;
ba2d3587 1623} __packed;
b481de9c
ZY
1624
1625/*
1626 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
2bdc7031 1627 *
7f62cd17 1628 * For agn devices
2bdc7031 1629 *
767d055d
WYG
1630 * Each station in the agn device's internal station table has its own table
1631 * of 16
2bdc7031
BC
1632 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1633 * an ACK is not received. This command replaces the entire table for
1634 * one station.
1635 *
767d055d
WYG
1636 * NOTE: Station must already be in agn device's station table.
1637 * Use REPLY_ADD_STA.
2bdc7031
BC
1638 *
1639 * The rate scaling procedures described below work well. Of course, other
1640 * procedures are possible, and may work better for particular environments.
1641 *
1642 *
1643 * FILLING THE RATE TABLE
1644 *
1645 * Given a particular initial rate and mode, as determined by the rate
1646 * scaling algorithm described below, the Linux driver uses the following
1647 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1648 * Link Quality command:
1649 *
1650 *
1651 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1652 * a) Use this same initial rate for first 3 entries.
1653 * b) Find next lower available rate using same mode (SISO or MIMO),
1654 * use for next 3 entries. If no lower rate available, switch to
7aafef1c 1655 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
2bdc7031
BC
1656 * c) If using MIMO, set command's mimo_delimiter to number of entries
1657 * using MIMO (3 or 6).
7aafef1c 1658 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
2bdc7031
BC
1659 * no MIMO, no short guard interval), at the next lower bit rate
1660 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1661 * legacy procedure for remaining table entries.
1662 *
1663 * 2) If using legacy initial rate:
1664 * a) Use the initial rate for only one entry.
1665 * b) For each following entry, reduce the rate to next lower available
1666 * rate, until reaching the lowest available rate.
1667 * c) When reducing rate, also switch antenna selection.
1668 * d) Once lowest available rate is reached, repeat this rate until
1669 * rate table is filled (16 entries), switching antenna each entry.
1670 *
1671 *
1672 * ACCUMULATING HISTORY
1673 *
767d055d
WYG
1674 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1675 * uses two sets of frame Tx success history: One for the current/active
1676 * modulation mode, and one for a speculative/search mode that is being
1677 * attempted. If the speculative mode turns out to be more effective (i.e.
1678 * actual transfer rate is better), then the driver continues to use the
1679 * speculative mode as the new current active mode.
2bdc7031
BC
1680 *
1681 * Each history set contains, separately for each possible rate, data for a
1682 * sliding window of the 62 most recent tx attempts at that rate. The data
1683 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1684 * and attempted frames, from which the driver can additionally calculate a
1685 * success ratio (success / attempted) and number of failures
1686 * (attempted - success), and control the size of the window (attempted).
1687 * The driver uses the bit map to remove successes from the success sum, as
1688 * the oldest tx attempts fall out of the window.
1689 *
767d055d
WYG
1690 * When the agn device makes multiple tx attempts for a given frame, each
1691 * attempt might be at a different rate, and have different modulation
1692 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1693 * up in the rate scaling table in the Link Quality command. The driver must
1694 * determine which rate table entry was used for each tx attempt, to determine
1695 * which rate-specific history to update, and record only those attempts that
2bdc7031
BC
1696 * match the modulation characteristics of the history set.
1697 *
1698 * When using block-ack (aggregation), all frames are transmitted at the same
a96a27f9 1699 * rate, since there is no per-attempt acknowledgment from the destination
2bdc7031
BC
1700 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1701 * rate_n_flags field. After receiving a block-ack, the driver can update
1702 * history for the entire block all at once.
1703 *
1704 *
1705 * FINDING BEST STARTING RATE:
1706 *
1707 * When working with a selected initial modulation mode (see below), the
1708 * driver attempts to find a best initial rate. The initial rate is the
1709 * first entry in the Link Quality command's rate table.
1710 *
1711 * 1) Calculate actual throughput (success ratio * expected throughput, see
1712 * table below) for current initial rate. Do this only if enough frames
1713 * have been attempted to make the value meaningful: at least 6 failed
1714 * tx attempts, or at least 8 successes. If not enough, don't try rate
1715 * scaling yet.
1716 *
1717 * 2) Find available rates adjacent to current initial rate. Available means:
1718 * a) supported by hardware &&
1719 * b) supported by association &&
1720 * c) within any constraints selected by user
1721 *
1722 * 3) Gather measured throughputs for adjacent rates. These might not have
1723 * enough history to calculate a throughput. That's okay, we might try
1724 * using one of them anyway!
1725 *
1726 * 4) Try decreasing rate if, for current rate:
1727 * a) success ratio is < 15% ||
1728 * b) lower adjacent rate has better measured throughput ||
1729 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1730 *
1731 * As a sanity check, if decrease was determined above, leave rate
1732 * unchanged if:
1733 * a) lower rate unavailable
1734 * b) success ratio at current rate > 85% (very good)
1735 * c) current measured throughput is better than expected throughput
1736 * of lower rate (under perfect 100% tx conditions, see table below)
1737 *
1738 * 5) Try increasing rate if, for current rate:
1739 * a) success ratio is < 15% ||
1740 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1741 * b) higher adjacent rate has better measured throughput ||
1742 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1743 *
1744 * As a sanity check, if increase was determined above, leave rate
1745 * unchanged if:
1746 * a) success ratio at current rate < 70%. This is not particularly
1747 * good performance; higher rate is sure to have poorer success.
1748 *
1749 * 6) Re-evaluate the rate after each tx frame. If working with block-
1750 * acknowledge, history and statistics may be calculated for the entire
1751 * block (including prior history that fits within the history windows),
1752 * before re-evaluation.
1753 *
1754 * FINDING BEST STARTING MODULATION MODE:
1755 *
1756 * After working with a modulation mode for a "while" (and doing rate scaling),
1757 * the driver searches for a new initial mode in an attempt to improve
1758 * throughput. The "while" is measured by numbers of attempted frames:
1759 *
1760 * For legacy mode, search for new mode after:
1761 * 480 successful frames, or 160 failed frames
1762 * For high-throughput modes (SISO or MIMO), search for new mode after:
1763 * 4500 successful frames, or 400 failed frames
1764 *
1765 * Mode switch possibilities are (3 for each mode):
1766 *
1767 * For legacy:
1768 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1769 * For SISO:
1770 * Change antenna, try MIMO, try shortened guard interval (SGI)
1771 * For MIMO:
1772 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1773 *
1774 * When trying a new mode, use the same bit rate as the old/current mode when
1775 * trying antenna switches and shortened guard interval. When switching to
1776 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1777 * for which the expected throughput (under perfect conditions) is about the
1778 * same or slightly better than the actual measured throughput delivered by
1779 * the old/current mode.
1780 *
1781 * Actual throughput can be estimated by multiplying the expected throughput
1782 * by the success ratio (successful / attempted tx frames). Frame size is
1783 * not considered in this calculation; it assumes that frame size will average
1784 * out to be fairly consistent over several samples. The following are
1785 * metric values for expected throughput assuming 100% success ratio.
1786 * Only G band has support for CCK rates:
1787 *
1788 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1789 *
1790 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1791 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1792 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1793 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1794 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1795 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1796 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1797 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1798 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1799 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1800 *
1801 * After the new mode has been tried for a short while (minimum of 6 failed
1802 * frames or 8 successful frames), compare success ratio and actual throughput
1803 * estimate of the new mode with the old. If either is better with the new
1804 * mode, continue to use the new mode.
1805 *
1806 * Continue comparing modes until all 3 possibilities have been tried.
1807 * If moving from legacy to HT, try all 3 possibilities from the new HT
1808 * mode. After trying all 3, a best mode is found. Continue to use this mode
1809 * for the longer "while" described above (e.g. 480 successful frames for
1810 * legacy), and then repeat the search process.
1811 *
b481de9c 1812 */
66c73db7 1813struct iwl_link_quality_cmd {
2bdc7031
BC
1814
1815 /* Index of destination/recipient station in uCode's station table */
b481de9c
ZY
1816 u8 sta_id;
1817 u8 reserved1;
2bdc7031 1818 __le16 control; /* not used */
66c73db7
TW
1819 struct iwl_link_qual_general_params general_params;
1820 struct iwl_link_qual_agg_params agg_params;
2bdc7031
BC
1821
1822 /*
1823 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1824 * specifies 1st Tx rate attempted, via index into this table.
767d055d 1825 * agn devices works its way through table when retrying Tx.
2bdc7031 1826 */
b481de9c 1827 struct {
2bdc7031 1828 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
b481de9c
ZY
1829 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1830 __le32 reserved2;
ba2d3587 1831} __packed;
b481de9c 1832
dab1c161
WYG
1833/*
1834 * BT configuration enable flags:
1835 * bit 0 - 1: BT channel announcement enabled
1836 * 0: disable
1837 * bit 1 - 1: priority of BT device enabled
1838 * 0: disable
1839 * bit 2 - 1: BT 2 wire support enabled
1840 * 0: disable
1841 */
456d0f76 1842#define BT_COEX_DISABLE (0x0)
dab1c161
WYG
1843#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1844#define BT_ENABLE_PRIORITY BIT(1)
1845#define BT_ENABLE_2_WIRE BIT(2)
456d0f76 1846
06702a73
WYG
1847#define BT_COEX_DISABLE (0x0)
1848#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1849
456d0f76
WYG
1850#define BT_LEAD_TIME_MIN (0x0)
1851#define BT_LEAD_TIME_DEF (0x1E)
1852#define BT_LEAD_TIME_MAX (0xFF)
1853
1854#define BT_MAX_KILL_MIN (0x1)
1855#define BT_MAX_KILL_DEF (0x5)
1856#define BT_MAX_KILL_MAX (0xFF)
1857
22bf59a0
WYG
1858#define BT_DURATION_LIMIT_DEF 625
1859#define BT_DURATION_LIMIT_MAX 1250
1860#define BT_DURATION_LIMIT_MIN 625
1861
1862#define BT_ON_THRESHOLD_DEF 4
1863#define BT_ON_THRESHOLD_MAX 1000
1864#define BT_ON_THRESHOLD_MIN 1
1865
1866#define BT_FRAG_THRESHOLD_DEF 0
1867#define BT_FRAG_THRESHOLD_MAX 0
1868#define BT_FRAG_THRESHOLD_MIN 0
1869
95a5ede3
WYG
1870#define BT_AGG_THRESHOLD_DEF 1200
1871#define BT_AGG_THRESHOLD_MAX 8000
1872#define BT_AGG_THRESHOLD_MIN 400
22bf59a0 1873
b481de9c
ZY
1874/*
1875 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
3058f021 1876 *
7f62cd17 1877 * agn devices support hardware handshake with Bluetooth device on
3058f021 1878 * same platform. Bluetooth device alerts wireless device when it will Tx;
a96a27f9 1879 * wireless device can delay or kill its own Tx to accommodate.
b481de9c 1880 */
2aa6ab86 1881struct iwl_bt_cmd {
b481de9c
ZY
1882 u8 flags;
1883 u8 lead_time;
1884 u8 max_kill;
1885 u8 reserved;
1886 __le32 kill_ack_mask;
1887 __le32 kill_cts_mask;
ba2d3587 1888} __packed;
b481de9c 1889
b6e116e8 1890#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
670245ed 1891
b6e116e8
WYG
1892#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1893#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1894#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1895#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1896#define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1897#define IWLAGN_BT_FLAG_COEX_MODE_4W 3
670245ed 1898
eeb1f83f
WYG
1899#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1900/* Disable Sync PSPoll on SCO/eSCO */
1901#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
670245ed 1902
207ecc5e
MV
1903#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1904#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1905
b6e116e8
WYG
1906#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1907#define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1908#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
e911ede7 1909#define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0
670245ed 1910
b6e116e8 1911#define IWLAGN_BT_MAX_KILL_DEFAULT 5
670245ed 1912
b6e116e8 1913#define IWLAGN_BT3_T7_DEFAULT 1
670245ed 1914
9dc4ca92
WYG
1915enum iwl_bt_kill_idx {
1916 IWL_BT_KILL_DEFAULT = 0,
1917 IWL_BT_KILL_OVERRIDE = 1,
1918 IWL_BT_KILL_REDUCE = 2,
1919};
1920
05433df2
WYG
1921#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1922#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
506aa156 1923#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
9dc4ca92 1924#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0)
670245ed 1925
b6e116e8 1926#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
670245ed 1927
b6e116e8 1928#define IWLAGN_BT3_T2_DEFAULT 0xc
670245ed 1929
b6e116e8
WYG
1930#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1931#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1932#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1933#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1934#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1935#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
9a00be04 1936#define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6))
b6e116e8 1937#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
670245ed 1938
b6e116e8
WYG
1939#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1940 IWLAGN_BT_VALID_BOOST | \
1941 IWLAGN_BT_VALID_MAX_KILL | \
1942 IWLAGN_BT_VALID_3W_TIMERS | \
1943 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1944 IWLAGN_BT_VALID_KILL_CTS_MASK | \
9a00be04 1945 IWLAGN_BT_VALID_REDUCED_TX_PWR | \
b6e116e8 1946 IWLAGN_BT_VALID_3W_LUT)
670245ed 1947
83ce21de
WYG
1948#define IWLAGN_BT_REDUCED_TX_PWR BIT(0)
1949
7edae184
WYG
1950#define IWLAGN_BT_DECISION_LUT_SIZE 12
1951
6013270a 1952struct iwl_basic_bt_cmd {
670245ed
JB
1953 u8 flags;
1954 u8 ledtime; /* unused */
1955 u8 max_kill;
1956 u8 bt3_timer_t7_value;
1957 __le32 kill_ack_mask;
1958 __le32 kill_cts_mask;
1959 u8 bt3_prio_sample_time;
1960 u8 bt3_timer_t2_value;
1961 __le16 bt4_reaction_time; /* unused */
7edae184 1962 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];
83ce21de
WYG
1963 /*
1964 * bit 0: use reduced tx power for control frame
1965 * bit 1 - 7: reserved
1966 */
310fbfd9
WYG
1967 u8 reduce_txpower;
1968 u8 reserved;
670245ed 1969 __le16 valid;
6013270a
WYG
1970};
1971
8347deb3 1972struct iwl_bt_cmd_v1 {
6013270a 1973 struct iwl_basic_bt_cmd basic;
670245ed 1974 u8 prio_boost;
b345f4da
WYG
1975 /*
1976 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1977 * if configure the following patterns
1978 */
1979 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1980 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
670245ed
JB
1981};
1982
8347deb3 1983struct iwl_bt_cmd_v2 {
6013270a 1984 struct iwl_basic_bt_cmd basic;
d6f62655
WYG
1985 __le32 prio_boost;
1986 /*
1987 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1988 * if configure the following patterns
1989 */
1990 u8 reserved;
1991 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1992 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1993};
1994
b6e116e8 1995#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
9e4afc21 1996
b6e116e8 1997struct iwlagn_bt_sco_cmd {
9e4afc21
JB
1998 __le32 flags;
1999};
2000
b481de9c
ZY
2001/******************************************************************************
2002 * (6)
2003 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2004 *
2005 *****************************************************************************/
2006
2007/*
2008 * Spectrum Management
2009 */
2010#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2011 RXON_FILTER_CTL2HOST_MSK | \
2012 RXON_FILTER_ACCEPT_GRP_MSK | \
2013 RXON_FILTER_DIS_DECRYPT_MSK | \
2014 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2015 RXON_FILTER_ASSOC_MSK | \
2016 RXON_FILTER_BCON_AWARE_MSK)
2017
2aa6ab86 2018struct iwl_measure_channel {
b481de9c
ZY
2019 __le32 duration; /* measurement duration in extended beacon
2020 * format */
2021 u8 channel; /* channel to measure */
2aa6ab86 2022 u8 type; /* see enum iwl_measure_type */
b481de9c 2023 __le16 reserved;
ba2d3587 2024} __packed;
b481de9c
ZY
2025
2026/*
2027 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2028 */
2aa6ab86 2029struct iwl_spectrum_cmd {
b481de9c
ZY
2030 __le16 len; /* number of bytes starting from token */
2031 u8 token; /* token id */
2032 u8 id; /* measurement id -- 0 or 1 */
2033 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2034 u8 periodic; /* 1 = periodic */
2035 __le16 path_loss_timeout;
2036 __le32 start_time; /* start time in extended beacon format */
2037 __le32 reserved2;
2038 __le32 flags; /* rxon flags */
2039 __le32 filter_flags; /* rxon filter flags */
2040 __le16 channel_count; /* minimum 1, maximum 10 */
2041 __le16 reserved3;
2aa6ab86 2042 struct iwl_measure_channel channels[10];
ba2d3587 2043} __packed;
b481de9c
ZY
2044
2045/*
2046 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2047 */
2aa6ab86 2048struct iwl_spectrum_resp {
b481de9c
ZY
2049 u8 token;
2050 u8 id; /* id of the prior command replaced, or 0xff */
2051 __le16 status; /* 0 - command will be handled
2052 * 1 - cannot handle (conflicts with another
2053 * measurement) */
ba2d3587 2054} __packed;
b481de9c 2055
2aa6ab86 2056enum iwl_measurement_state {
b481de9c
ZY
2057 IWL_MEASUREMENT_START = 0,
2058 IWL_MEASUREMENT_STOP = 1,
2059};
2060
2aa6ab86 2061enum iwl_measurement_status {
b481de9c
ZY
2062 IWL_MEASUREMENT_OK = 0,
2063 IWL_MEASUREMENT_CONCURRENT = 1,
2064 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2065 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2066 /* 4-5 reserved */
2067 IWL_MEASUREMENT_STOPPED = 6,
2068 IWL_MEASUREMENT_TIMEOUT = 7,
2069 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2070};
2071
2072#define NUM_ELEMENTS_IN_HISTOGRAM 8
2073
2aa6ab86 2074struct iwl_measurement_histogram {
b481de9c
ZY
2075 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2076 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
ba2d3587 2077} __packed;
b481de9c
ZY
2078
2079/* clear channel availability counters */
2aa6ab86 2080struct iwl_measurement_cca_counters {
b481de9c
ZY
2081 __le32 ofdm;
2082 __le32 cck;
ba2d3587 2083} __packed;
b481de9c 2084
2aa6ab86 2085enum iwl_measure_type {
b481de9c
ZY
2086 IWL_MEASURE_BASIC = (1 << 0),
2087 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2088 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2089 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2090 IWL_MEASURE_FRAME = (1 << 4),
2091 /* bits 5:6 are reserved */
2092 IWL_MEASURE_IDLE = (1 << 7),
2093};
2094
2095/*
2096 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2097 */
2aa6ab86 2098struct iwl_spectrum_notification {
b481de9c
ZY
2099 u8 id; /* measurement id -- 0 or 1 */
2100 u8 token;
2101 u8 channel_index; /* index in measurement channel list */
2102 u8 state; /* 0 - start, 1 - stop */
2103 __le32 start_time; /* lower 32-bits of TSF */
2104 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2105 u8 channel;
2aa6ab86 2106 u8 type; /* see enum iwl_measurement_type */
b481de9c
ZY
2107 u8 reserved1;
2108 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2109 * valid if applicable for measurement type requested. */
2110 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2111 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2112 __le32 cca_time; /* channel load time in usecs */
2113 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2114 * unidentified */
2115 u8 reserved2[3];
2aa6ab86 2116 struct iwl_measurement_histogram histogram;
b481de9c 2117 __le32 stop_time; /* lower 32-bits of TSF */
2aa6ab86 2118 __le32 status; /* see iwl_measurement_status */
ba2d3587 2119} __packed;
b481de9c
ZY
2120
2121/******************************************************************************
2122 * (7)
2123 * Power Management Commands, Responses, Notifications:
2124 *
2125 *****************************************************************************/
2126
2127/**
ca579617 2128 * struct iwl_powertable_cmd - Power Table Command
b481de9c
ZY
2129 * @flags: See below:
2130 *
2131 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2132 *
2133 * PM allow:
2134 * bit 0 - '0' Driver not allow power management
2135 * '1' Driver allow PM (use rest of parameters)
e312c24c 2136 *
b481de9c
ZY
2137 * uCode send sleep notifications:
2138 * bit 1 - '0' Don't send sleep notification
2139 * '1' send sleep notification (SEND_PM_NOTIFICATION)
e312c24c 2140 *
b481de9c
ZY
2141 * Sleep over DTIM
2142 * bit 2 - '0' PM have to walk up every DTIM
2143 * '1' PM could sleep over DTIM till listen Interval.
e312c24c 2144 *
b481de9c 2145 * PCI power managed
e7b63581
TW
2146 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2147 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
e312c24c
JB
2148 *
2149 * Fast PD
2150 * bit 4 - '1' Put radio to sleep when receiving frame for others
2151 *
b481de9c
ZY
2152 * Force sleep Modes
2153 * bit 31/30- '00' use both mac/xtal sleeps
2154 * '01' force Mac sleep
2155 * '10' force xtal sleep
2156 * '11' Illegal set
2157 *
2158 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
a96a27f9 2159 * ucode assume sleep over DTIM is allowed and we don't need to wake up
b481de9c
ZY
2160 * for every DTIM.
2161 */
2162#define IWL_POWER_VEC_SIZE 5
2163
600c0e11 2164#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
35162ba7
WYG
2165#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2166#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
600c0e11
TW
2167#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2168#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2169#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
97badb0e
WYG
2170#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2171#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2172#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2173#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
35162ba7 2174#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
600c0e11 2175
ca579617 2176struct iwl_powertable_cmd {
b481de9c 2177 __le16 flags;
7f62cd17
WYG
2178 u8 keep_alive_seconds;
2179 u8 debug_flags;
b481de9c
ZY
2180 __le32 rx_data_timeout;
2181 __le32 tx_data_timeout;
2182 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2183 __le32 keep_alive_beacons;
ba2d3587 2184} __packed;
b481de9c
ZY
2185
2186/*
2187 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
767d055d 2188 * all devices identical.
b481de9c 2189 */
2aa6ab86 2190struct iwl_sleep_notification {
b481de9c
ZY
2191 u8 pm_sleep_mode;
2192 u8 pm_wakeup_src;
2193 __le16 reserved;
2194 __le32 sleep_time;
2195 __le32 tsf_low;
2196 __le32 bcon_timer;
ba2d3587 2197} __packed;
b481de9c 2198
767d055d 2199/* Sleep states. all devices identical. */
b481de9c
ZY
2200enum {
2201 IWL_PM_NO_SLEEP = 0,
2202 IWL_PM_SLP_MAC = 1,
2203 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2204 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2205 IWL_PM_SLP_PHY = 4,
2206 IWL_PM_SLP_REPENT = 5,
2207 IWL_PM_WAKEUP_BY_TIMER = 6,
2208 IWL_PM_WAKEUP_BY_DRIVER = 7,
2209 IWL_PM_WAKEUP_BY_RFKILL = 8,
2210 /* 3 reserved */
2211 IWL_PM_NUM_OF_MODES = 12,
2212};
2213
2214/*
2215 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2216 */
2217#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2218#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2219#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2aa6ab86 2220struct iwl_card_state_cmd {
b481de9c 2221 __le32 status; /* CARD_STATE_CMD_* request new power state */
ba2d3587 2222} __packed;
b481de9c
ZY
2223
2224/*
2225 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2226 */
2aa6ab86 2227struct iwl_card_state_notif {
b481de9c 2228 __le32 flags;
ba2d3587 2229} __packed;
b481de9c
ZY
2230
2231#define HW_CARD_DISABLED 0x01
2232#define SW_CARD_DISABLED 0x02
3a41bbd5 2233#define CT_CARD_DISABLED 0x04
b481de9c
ZY
2234#define RXON_CARD_DISABLED 0x10
2235
47f4a587 2236struct iwl_ct_kill_config {
b481de9c
ZY
2237 __le32 reserved;
2238 __le32 critical_temperature_M;
2239 __le32 critical_temperature_R;
ba2d3587 2240} __packed;
b481de9c 2241
672639de
WYG
2242/* 1000, and 6x00 */
2243struct iwl_ct_kill_throttling_config {
2244 __le32 critical_temperature_exit;
2245 __le32 reserved;
2246 __le32 critical_temperature_enter;
ba2d3587 2247} __packed;
672639de 2248
b481de9c
ZY
2249/******************************************************************************
2250 * (8)
2251 * Scan Commands, Responses, Notifications:
2252 *
2253 *****************************************************************************/
2254
51e9bf5d
HH
2255#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2256#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
d16dc48a 2257
3058f021 2258/**
2a421b91 2259 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
3058f021
BC
2260 *
2261 * One for each channel in the scan list.
2262 * Each channel can independently select:
2263 * 1) SSID for directed active scans
2264 * 2) Txpower setting (for rate specified within Tx command)
2265 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2266 * quiet_plcp_th, good_CRC_th)
2267 *
2268 * To avoid uCode errors, make sure the following are true (see comments
2a421b91 2269 * under struct iwl_scan_cmd about max_out_time and quiet_time):
3058f021
BC
2270 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2271 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2272 * 2) quiet_time <= active_dwell
2273 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2274 * passive_dwell < max_out_time
2275 * active_dwell < max_out_time
2276 */
3d24a9f7 2277
2a421b91 2278struct iwl_scan_channel {
3058f021
BC
2279 /*
2280 * type is defined as:
2281 * 0:0 1 = active, 0 = passive
d16dc48a 2282 * 1:20 SSID direct bit map; if a bit is set, then corresponding
3058f021 2283 * SSID IE is transmitted in probe request.
d16dc48a 2284 * 21:31 reserved
b481de9c 2285 */
d16dc48a
TW
2286 __le32 type;
2287 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
f53696de
TW
2288 u8 tx_gain; /* gain for analog radio */
2289 u8 dsp_atten; /* gain for DSP */
3058f021
BC
2290 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2291 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
ba2d3587 2292} __packed;
b481de9c 2293
0d21044e
WT
2294/* set number of direct probes __le32 type */
2295#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2296
3058f021 2297/**
2a421b91 2298 * struct iwl_ssid_ie - directed scan network information element
3058f021 2299 *
7f62cd17
WYG
2300 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2301 * selected by "type" bit field in struct iwl_scan_channel;
2302 * each channel may select different ssids from among the 20 entries.
2a3b793d 2303 * SSID IEs get transmitted in reverse order of entry.
3058f021 2304 */
2a421b91 2305struct iwl_ssid_ie {
b481de9c
ZY
2306 u8 id;
2307 u8 len;
2308 u8 ssid[32];
ba2d3587 2309} __packed;
b481de9c 2310
9b3bf06a 2311#define PROBE_OPTION_MAX 20
51e9bf5d 2312#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
96ff5641
JB
2313#define IWL_GOOD_CRC_TH_DISABLED 0
2314#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2315#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
89612124 2316#define IWL_MAX_CMD_SIZE 4096
b481de9c
ZY
2317
2318/*
2319 * REPLY_SCAN_CMD = 0x80 (command)
3058f021
BC
2320 *
2321 * The hardware scan command is very powerful; the driver can set it up to
2322 * maintain (relatively) normal network traffic while doing a scan in the
2323 * background. The max_out_time and suspend_time control the ratio of how
2324 * long the device stays on an associated network channel ("service channel")
2325 * vs. how long it's away from the service channel, i.e. tuned to other channels
2326 * for scanning.
2327 *
2328 * max_out_time is the max time off-channel (in usec), and suspend_time
2329 * is how long (in "extended beacon" format) that the scan is "suspended"
2330 * after returning to the service channel. That is, suspend_time is the
2331 * time that we stay on the service channel, doing normal work, between
2332 * scan segments. The driver may set these parameters differently to support
2333 * scanning when associated vs. not associated, and light vs. heavy traffic
2334 * loads when associated.
2335 *
2336 * After receiving this command, the device's scan engine does the following;
2337 *
2338 * 1) Sends SCAN_START notification to driver
2339 * 2) Checks to see if it has time to do scan for one channel
2340 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2341 * to tell AP that we're going off-channel
2342 * 4) Tunes to first channel in scan list, does active or passive scan
2343 * 5) Sends SCAN_RESULT notification to driver
2344 * 6) Checks to see if it has time to do scan on *next* channel in list
2345 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2346 * before max_out_time expires
2347 * 8) Returns to service channel
2348 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2349 * 10) Stays on service channel until suspend_time expires
2350 * 11) Repeats entire process 2-10 until list is complete
2351 * 12) Sends SCAN_COMPLETE notification
2352 *
2353 * For fast, efficient scans, the scan command also has support for staying on
2354 * a channel for just a short time, if doing active scanning and getting no
2355 * responses to the transmitted probe request. This time is controlled by
2356 * quiet_time, and the number of received packets below which a channel is
2357 * considered "quiet" is controlled by quiet_plcp_threshold.
2358 *
2359 * For active scanning on channels that have regulatory restrictions against
2360 * blindly transmitting, the scan can listen before transmitting, to make sure
2361 * that there is already legitimate activity on the channel. If enough
2362 * packets are cleanly received on the channel (controlled by good_CRC_th,
2363 * typical value 1), the scan engine starts transmitting probe requests.
2364 *
2365 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2366 *
2367 * To avoid uCode errors, see timing restrictions described under
2a421b91 2368 * struct iwl_scan_channel.
b481de9c 2369 */
3d24a9f7 2370
266af4c7
JB
2371enum iwl_scan_flags {
2372 /* BIT(0) currently unused */
2373 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2374 /* bits 2-7 reserved */
2375};
2376
2a421b91 2377struct iwl_scan_cmd {
b481de9c 2378 __le16 len;
266af4c7 2379 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
3058f021
BC
2380 u8 channel_count; /* # channels in channel list */
2381 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2382 * (only for active scan) */
2383 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2384 __le16 good_CRC_th; /* passive -> active promotion threshold */
2385 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2386 __le32 max_out_time; /* max usec to be away from associated (service)
2387 * channel */
2388 __le32 suspend_time; /* pause scan this long (in "extended beacon
2389 * format") when returning to service chnl:
3058f021
BC
2390 */
2391 __le32 flags; /* RXON_FLG_* */
2392 __le32 filter_flags; /* RXON_FILTER_* */
2393
2394 /* For active scans (set to all-0s for passive scans).
2395 * Does not include payload. Must specify Tx rate; no rate scaling. */
83d527d9 2396 struct iwl_tx_cmd tx_cmd;
3058f021
BC
2397
2398 /* For directed active scans (set to all-0s otherwise) */
2a421b91 2399 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
b481de9c 2400
b481de9c 2401 /*
3058f021
BC
2402 * Probe request frame, followed by channel list.
2403 *
2404 * Size of probe request frame is specified by byte count in tx_cmd.
2405 * Channel list follows immediately after probe request frame.
2406 * Number of channels in list is specified by channel_count.
2407 * Each channel in list is of type:
b481de9c 2408 *
2aa6ab86 2409 * struct iwl_scan_channel channels[0];
b481de9c
ZY
2410 *
2411 * NOTE: Only one band of channels can be scanned per pass. You
3058f021
BC
2412 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2413 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2414 * before requesting another scan.
b481de9c 2415 */
3058f021 2416 u8 data[0];
ba2d3587 2417} __packed;
b481de9c
ZY
2418
2419/* Can abort will notify by complete notification with abort status. */
51e9bf5d 2420#define CAN_ABORT_STATUS cpu_to_le32(0x1)
b481de9c
ZY
2421/* complete notification statuses */
2422#define ABORT_STATUS 0x2
2423
2424/*
2425 * REPLY_SCAN_CMD = 0x80 (response)
2426 */
2a421b91 2427struct iwl_scanreq_notification {
b481de9c 2428 __le32 status; /* 1: okay, 2: cannot fulfill request */
ba2d3587 2429} __packed;
b481de9c
ZY
2430
2431/*
2432 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2433 */
2a421b91 2434struct iwl_scanstart_notification {
b481de9c
ZY
2435 __le32 tsf_low;
2436 __le32 tsf_high;
2437 __le32 beacon_timer;
2438 u8 channel;
2439 u8 band;
2440 u8 reserved[2];
2441 __le32 status;
ba2d3587 2442} __packed;
b481de9c 2443
497888cf
PC
2444#define SCAN_OWNER_STATUS 0x1
2445#define MEASURE_OWNER_STATUS 0x2
b481de9c 2446
0288d237
JB
2447#define IWL_PROBE_STATUS_OK 0
2448#define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2449/* error statuses combined with TX_FAILED */
2450#define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2451#define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2452
b481de9c
ZY
2453#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2454/*
2455 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2456 */
2a421b91 2457struct iwl_scanresults_notification {
b481de9c
ZY
2458 u8 channel;
2459 u8 band;
0288d237
JB
2460 u8 probe_status;
2461 u8 num_probe_not_sent; /* not enough time to send */
b481de9c
ZY
2462 __le32 tsf_low;
2463 __le32 tsf_high;
2464 __le32 statistics[NUMBER_OF_STATISTICS];
ba2d3587 2465} __packed;
b481de9c
ZY
2466
2467/*
2468 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2469 */
2a421b91 2470struct iwl_scancomplete_notification {
b481de9c
ZY
2471 u8 scanned_channels;
2472 u8 status;
f78e5454 2473 u8 bt_status; /* BT On/Off status */
b481de9c
ZY
2474 u8 last_channel;
2475 __le32 tsf_low;
2476 __le32 tsf_high;
ba2d3587 2477} __packed;
b481de9c
ZY
2478
2479
2480/******************************************************************************
2481 * (9)
2482 * IBSS/AP Commands and Notifications:
2483 *
2484 *****************************************************************************/
2485
a85d7cca
JB
2486enum iwl_ibss_manager {
2487 IWL_NOT_IBSS_MANAGER = 0,
2488 IWL_IBSS_MANAGER = 1,
2489};
2490
b481de9c
ZY
2491/*
2492 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2493 */
3d24a9f7 2494
241887a2
JB
2495struct iwlagn_beacon_notif {
2496 struct iwlagn_tx_resp beacon_notify_hdr;
2497 __le32 low_tsf;
2498 __le32 high_tsf;
2499 __le32 ibss_mgr_status;
2500} __packed;
2501
b481de9c
ZY
2502/*
2503 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2504 */
3d24a9f7 2505
4bf64efd 2506struct iwl_tx_beacon_cmd {
83d527d9 2507 struct iwl_tx_cmd tx;
b481de9c
ZY
2508 __le16 tim_idx;
2509 u8 tim_size;
2510 u8 reserved1;
2511 struct ieee80211_hdr frame[0]; /* beacon frame */
ba2d3587 2512} __packed;
b481de9c
ZY
2513
2514/******************************************************************************
2515 * (10)
2516 * Statistics Commands and Notifications:
2517 *
2518 *****************************************************************************/
2519
2520#define IWL_TEMP_CONVERT 260
2521
2522#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2523#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2524#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2525
2526/* Used for passing to driver number of successes and failures per rate */
2527struct rate_histogram {
2528 union {
2529 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2530 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2531 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2532 } success;
2533 union {
2534 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2535 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2536 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2537 } failed;
ba2d3587 2538} __packed;
b481de9c
ZY
2539
2540/* statistics command response */
2541
3d24a9f7
TW
2542struct statistics_dbg {
2543 __le32 burst_check;
2544 __le32 burst_count;
7c094c5c
WYG
2545 __le32 wait_for_silence_timeout_cnt;
2546 __le32 reserved[3];
ba2d3587 2547} __packed;
3d24a9f7 2548
b481de9c
ZY
2549struct statistics_rx_phy {
2550 __le32 ina_cnt;
2551 __le32 fina_cnt;
2552 __le32 plcp_err;
2553 __le32 crc32_err;
2554 __le32 overrun_err;
2555 __le32 early_overrun_err;
2556 __le32 crc32_good;
2557 __le32 false_alarm_cnt;
2558 __le32 fina_sync_err_cnt;
2559 __le32 sfd_timeout;
2560 __le32 fina_timeout;
2561 __le32 unresponded_rts;
2562 __le32 rxe_frame_limit_overrun;
2563 __le32 sent_ack_cnt;
2564 __le32 sent_cts_cnt;
b481de9c
ZY
2565 __le32 sent_ba_rsp_cnt;
2566 __le32 dsp_self_kill;
2567 __le32 mh_format_err;
2568 __le32 re_acq_main_rssi_sum;
2569 __le32 reserved3;
ba2d3587 2570} __packed;
b481de9c 2571
b481de9c
ZY
2572struct statistics_rx_ht_phy {
2573 __le32 plcp_err;
2574 __le32 overrun_err;
2575 __le32 early_overrun_err;
2576 __le32 crc32_good;
2577 __le32 crc32_err;
2578 __le32 mh_format_err;
2579 __le32 agg_crc32_good;
2580 __le32 agg_mpdu_cnt;
2581 __le32 agg_cnt;
f0118a45 2582 __le32 unsupport_mcs;
ba2d3587 2583} __packed;
b481de9c 2584
c1b4aa3f 2585#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
34c22cf9 2586
b481de9c
ZY
2587struct statistics_rx_non_phy {
2588 __le32 bogus_cts; /* CTS received when not expecting CTS */
2589 __le32 bogus_ack; /* ACK received when not expecting ACK */
2590 __le32 non_bssid_frames; /* number of frames with BSSID that
2591 * doesn't belong to the STA BSSID */
2592 __le32 filtered_frames; /* count frames that were dumped in the
2593 * filtering process */
2594 __le32 non_channel_beacons; /* beacons with our bss id but not on
2595 * our serving channel */
b481de9c
ZY
2596 __le32 channel_beacons; /* beacons with our bss id and in our
2597 * serving channel */
2598 __le32 num_missed_bcon; /* number of missed beacons */
2599 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2600 * ADC was in saturation */
2601 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2602 * for INA */
2603 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2604 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2605 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2606 __le32 interference_data_flag; /* flag for interference data
2607 * availability. 1 when data is
2608 * available. */
3058f021 2609 __le32 channel_load; /* counts RX Enable time in uSec */
b481de9c
ZY
2610 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2611 * and CCK) counter */
2612 __le32 beacon_rssi_a;
2613 __le32 beacon_rssi_b;
2614 __le32 beacon_rssi_c;
2615 __le32 beacon_energy_a;
2616 __le32 beacon_energy_b;
2617 __le32 beacon_energy_c;
ba2d3587 2618} __packed;
b481de9c 2619
325322ee
WYG
2620struct statistics_rx_non_phy_bt {
2621 struct statistics_rx_non_phy common;
2622 /* additional stats for bt */
2623 __le32 num_bt_kills;
2624 __le32 reserved[2];
da22f795 2625} __packed;
325322ee 2626
b481de9c
ZY
2627struct statistics_rx {
2628 struct statistics_rx_phy ofdm;
2629 struct statistics_rx_phy cck;
2630 struct statistics_rx_non_phy general;
b481de9c 2631 struct statistics_rx_ht_phy ofdm_ht;
ba2d3587 2632} __packed;
b481de9c 2633
325322ee
WYG
2634struct statistics_rx_bt {
2635 struct statistics_rx_phy ofdm;
2636 struct statistics_rx_phy cck;
2637 struct statistics_rx_non_phy_bt general;
2638 struct statistics_rx_ht_phy ofdm_ht;
da22f795 2639} __packed;
325322ee 2640
fcbaf8b0
WYG
2641/**
2642 * struct statistics_tx_power - current tx power
2643 *
2644 * @ant_a: current tx power on chain a in 1/2 dB step
2645 * @ant_b: current tx power on chain b in 1/2 dB step
2646 * @ant_c: current tx power on chain c in 1/2 dB step
2647 */
2648struct statistics_tx_power {
2649 u8 ant_a;
2650 u8 ant_b;
2651 u8 ant_c;
2652 u8 reserved;
ba2d3587 2653} __packed;
fcbaf8b0 2654
b481de9c
ZY
2655struct statistics_tx_non_phy_agg {
2656 __le32 ba_timeout;
2657 __le32 ba_reschedule_frames;
2658 __le32 scd_query_agg_frame_cnt;
2659 __le32 scd_query_no_agg;
2660 __le32 scd_query_agg;
2661 __le32 scd_query_mismatch;
2662 __le32 frame_not_ready;
2663 __le32 underrun;
2664 __le32 bt_prio_kill;
2665 __le32 rx_ba_rsp_cnt;
ba2d3587 2666} __packed;
b481de9c
ZY
2667
2668struct statistics_tx {
2669 __le32 preamble_cnt;
2670 __le32 rx_detected_cnt;
2671 __le32 bt_prio_defer_cnt;
2672 __le32 bt_prio_kill_cnt;
2673 __le32 few_bytes_cnt;
2674 __le32 cts_timeout;
2675 __le32 ack_timeout;
2676 __le32 expected_ack_cnt;
2677 __le32 actual_ack_cnt;
b481de9c
ZY
2678 __le32 dump_msdu_cnt;
2679 __le32 burst_abort_next_frame_mismatch_cnt;
2680 __le32 burst_abort_missing_next_frame_cnt;
2681 __le32 cts_timeout_collision;
2682 __le32 ack_or_ba_timeout_collision;
2683 struct statistics_tx_non_phy_agg agg;
470356b8
WYG
2684 /*
2685 * "tx_power" are optional parameters provided by uCode,
2686 * 6000 series is the only device provide the information,
2687 * Those are reserved fields for all the other devices
2688 */
fcbaf8b0
WYG
2689 struct statistics_tx_power tx_power;
2690 __le32 reserved1;
ba2d3587 2691} __packed;
b481de9c 2692
b481de9c
ZY
2693
2694struct statistics_div {
2695 __le32 tx_on_a;
2696 __le32 tx_on_b;
2697 __le32 exec_time;
2698 __le32 probe_time;
b481de9c
ZY
2699 __le32 reserved1;
2700 __le32 reserved2;
ba2d3587 2701} __packed;
b481de9c 2702
325322ee 2703struct statistics_general_common {
f0118a45 2704 __le32 temperature; /* radio temperature */
7f62cd17 2705 __le32 temperature_m; /* radio voltage */
b481de9c
ZY
2706 struct statistics_dbg dbg;
2707 __le32 sleep_time;
2708 __le32 slots_out;
2709 __le32 slots_idle;
2710 __le32 ttl_timestamp;
2711 struct statistics_div div;
b481de9c 2712 __le32 rx_enable_counter;
11fc5249
WYG
2713 /*
2714 * num_of_sos_states:
2715 * count the number of times we have to re-tune
2716 * in order to get out of bad PHY status
2717 */
2718 __le32 num_of_sos_states;
da22f795 2719} __packed;
325322ee
WYG
2720
2721struct statistics_bt_activity {
2722 /* Tx statistics */
2723 __le32 hi_priority_tx_req_cnt;
2724 __le32 hi_priority_tx_denied_cnt;
2725 __le32 lo_priority_tx_req_cnt;
2726 __le32 lo_priority_tx_denied_cnt;
2727 /* Rx statistics */
2728 __le32 hi_priority_rx_req_cnt;
2729 __le32 hi_priority_rx_denied_cnt;
2730 __le32 lo_priority_rx_req_cnt;
2731 __le32 lo_priority_rx_denied_cnt;
da22f795 2732} __packed;
325322ee
WYG
2733
2734struct statistics_general {
2735 struct statistics_general_common common;
2736 __le32 reserved2;
2737 __le32 reserved3;
da22f795 2738} __packed;
325322ee
WYG
2739
2740struct statistics_general_bt {
2741 struct statistics_general_common common;
2742 struct statistics_bt_activity activity;
b481de9c
ZY
2743 __le32 reserved2;
2744 __le32 reserved3;
ba2d3587 2745} __packed;
b481de9c 2746
ef8d5529
WYG
2747#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2748#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2749#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2750
b481de9c
ZY
2751/*
2752 * REPLY_STATISTICS_CMD = 0x9c,
767d055d 2753 * all devices identical.
b481de9c
ZY
2754 *
2755 * This command triggers an immediate response containing uCode statistics.
2756 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2757 *
2758 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2759 * internal copy of the statistics (counters) after issuing the response.
2760 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2761 *
2762 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2763 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2764 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2765 */
51e9bf5d
HH
2766#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2767#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
8f91aecb 2768struct iwl_statistics_cmd {
b481de9c 2769 __le32 configuration_flags; /* IWL_STATS_CONF_* */
ba2d3587 2770} __packed;
b481de9c
ZY
2771
2772/*
2773 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2774 *
2775 * By default, uCode issues this notification after receiving a beacon
2776 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2777 * REPLY_STATISTICS_CMD 0x9c, above.
2778 *
2779 * Statistics counters continue to increment beacon after beacon, but are
2780 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2781 * 0x9c with CLEAR_STATS bit set (see above).
2782 *
2783 * uCode also issues this notification during scans. uCode clears statistics
2784 * appropriately so that each notification contains statistics for only the
2785 * one channel that has just been scanned.
2786 */
51e9bf5d 2787#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
7aafef1c 2788#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
3d24a9f7 2789
8f91aecb 2790struct iwl_notif_statistics {
b481de9c
ZY
2791 __le32 flag;
2792 struct statistics_rx rx;
2793 struct statistics_tx tx;
2794 struct statistics_general general;
ba2d3587 2795} __packed;
b481de9c 2796
325322ee
WYG
2797struct iwl_bt_notif_statistics {
2798 __le32 flag;
2799 struct statistics_rx_bt rx;
2800 struct statistics_tx tx;
2801 struct statistics_general_bt general;
da22f795 2802} __packed;
b481de9c
ZY
2803
2804/*
2805 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
a13d276f
WYG
2806 *
2807 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2808 * in regardless of how many missed beacons, which mean when driver receive the
2809 * notification, inside the command, it can find all the beacons information
2810 * which include number of total missed beacons, number of consecutive missed
2811 * beacons, number of beacons received and number of beacons expected to
2812 * receive.
2813 *
2814 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2815 * in order to bring the radio/PHY back to working state; which has no relation
2816 * to when driver will perform sensitivity calibration.
2817 *
2818 * Driver should set it own missed_beacon_threshold to decide when to perform
2819 * sensitivity calibration based on number of consecutive missed beacons in
2820 * order to improve overall performance, especially in noisy environment.
2821 *
b481de9c 2822 */
a13d276f
WYG
2823
2824#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2825#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2826#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
b481de9c 2827
2aa6ab86 2828struct iwl_missed_beacon_notif {
a13d276f 2829 __le32 consecutive_missed_beacons;
b481de9c
ZY
2830 __le32 total_missed_becons;
2831 __le32 num_expected_beacons;
2832 __le32 num_recvd_beacons;
ba2d3587 2833} __packed;
b481de9c 2834
f7d09d7c 2835
b481de9c
ZY
2836/******************************************************************************
2837 * (11)
2838 * Rx Calibration Commands:
2839 *
f7d09d7c
BC
2840 * With the uCode used for open source drivers, most Tx calibration (except
2841 * for Tx Power) and most Rx calibration is done by uCode during the
2842 * "initialize" phase of uCode boot. Driver must calibrate only:
2843 *
2844 * 1) Tx power (depends on temperature), described elsewhere
2845 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2846 * 3) Receiver sensitivity (to optimize signal detection)
2847 *
b481de9c
ZY
2848 *****************************************************************************/
2849
f7d09d7c
BC
2850/**
2851 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2852 *
2853 * This command sets up the Rx signal detector for a sensitivity level that
2854 * is high enough to lock onto all signals within the associated network,
2855 * but low enough to ignore signals that are below a certain threshold, so as
2856 * not to have too many "false alarms". False alarms are signals that the
2857 * Rx DSP tries to lock onto, but then discards after determining that they
2858 * are noise.
2859 *
2860 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2861 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2862 * time listening, not transmitting). Driver must adjust sensitivity so that
2863 * the ratio of actual false alarms to actual Rx time falls within this range.
2864 *
2865 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2866 * received beacon. These provide information to the driver to analyze the
2867 * sensitivity. Don't analyze statistics that come in from scanning, or any
2868 * other non-associated-network source. Pertinent statistics include:
2869 *
2870 * From "general" statistics (struct statistics_rx_non_phy):
2871 *
2872 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2873 * Measure of energy of desired signal. Used for establishing a level
2874 * below which the device does not detect signals.
2875 *
2876 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2877 * Measure of background noise in silent period after beacon.
2878 *
2879 * channel_load
2880 * uSecs of actual Rx time during beacon period (varies according to
2881 * how much time was spent transmitting).
2882 *
2883 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2884 *
2885 * false_alarm_cnt
2886 * Signal locks abandoned early (before phy-level header).
2887 *
2888 * plcp_err
2889 * Signal locks abandoned late (during phy-level header).
2890 *
2891 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2892 * beacon to beacon, i.e. each value is an accumulation of all errors
2893 * before and including the latest beacon. Values will wrap around to 0
2894 * after counting up to 2^32 - 1. Driver must differentiate vs.
2895 * previous beacon's values to determine # false alarms in the current
2896 * beacon period.
2897 *
2898 * Total number of false alarms = false_alarms + plcp_errs
2899 *
2900 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2901 * (notice that the start points for OFDM are at or close to settings for
2902 * maximum sensitivity):
2903 *
2904 * START / MIN / MAX
2905 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2906 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2907 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2908 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2909 *
2910 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2911 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2912 * by *adding* 1 to all 4 of the table entries above, up to the max for
2913 * each entry. Conversely, if false alarm rate is too low (less than 5
2914 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2915 * increase sensitivity.
2916 *
2917 * For CCK sensitivity, keep track of the following:
2918 *
2919 * 1). 20-beacon history of maximum background noise, indicated by
2920 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2921 * 3 receivers. For any given beacon, the "silence reference" is
2922 * the maximum of last 60 samples (20 beacons * 3 receivers).
2923 *
2924 * 2). 10-beacon history of strongest signal level, as indicated
2925 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2926 * i.e. the strength of the signal through the best receiver at the
2927 * moment. These measurements are "upside down", with lower values
2928 * for stronger signals, so max energy will be *minimum* value.
2929 *
2930 * Then for any given beacon, the driver must determine the *weakest*
2931 * of the strongest signals; this is the minimum level that needs to be
2932 * successfully detected, when using the best receiver at the moment.
2933 * "Max cck energy" is the maximum (higher value means lower energy!)
2934 * of the last 10 minima. Once this is determined, driver must add
2935 * a little margin by adding "6" to it.
2936 *
2937 * 3). Number of consecutive beacon periods with too few false alarms.
2938 * Reset this to 0 at the first beacon period that falls within the
2939 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2940 *
2941 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2942 * (notice that the start points for CCK are at maximum sensitivity):
2943 *
2944 * START / MIN / MAX
2945 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2946 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2947 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2948 *
2949 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2950 * (greater than 50 for each 204.8 msecs listening), method for reducing
2951 * sensitivity is:
2952 *
2953 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2954 * up to max 400.
2955 *
2956 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2957 * sensitivity has been reduced a significant amount; bring it up to
2958 * a moderate 161. Otherwise, *add* 3, up to max 200.
2959 *
2960 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2961 * sensitivity has been reduced only a moderate or small amount;
2962 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2963 * down to min 0. Otherwise (if gain has been significantly reduced),
2964 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2965 *
2966 * b) Save a snapshot of the "silence reference".
2967 *
2968 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2969 * (less than 5 for each 204.8 msecs listening), method for increasing
2970 * sensitivity is used only if:
2971 *
2972 * 1a) Previous beacon did not have too many false alarms
2973 * 1b) AND difference between previous "silence reference" and current
2974 * "silence reference" (prev - current) is 2 or more,
2975 * OR 2) 100 or more consecutive beacon periods have had rate of
2976 * less than 5 false alarms per 204.8 milliseconds rx time.
2977 *
2978 * Method for increasing sensitivity:
2979 *
2980 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2981 * down to min 125.
2982 *
2983 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2984 * down to min 200.
2985 *
2986 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2987 *
2988 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
2989 * (between 5 and 50 for each 204.8 msecs listening):
2990 *
2991 * 1) Save a snapshot of the silence reference.
2992 *
2993 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
2994 * give some extra margin to energy threshold by *subtracting* 8
2995 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2996 *
2997 * For all cases (too few, too many, good range), make sure that the CCK
2998 * detection threshold (energy) is below the energy level for robust
2999 * detection over the past 10 beacon periods, the "Max cck energy".
3000 * Lower values mean higher energy; this means making sure that the value
3001 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3002 *
f7d09d7c
BC
3003 */
3004
3005/*
f0832f13 3006 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
f7d09d7c
BC
3007 */
3008#define HD_TABLE_SIZE (11) /* number of entries */
3009#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3010#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3011#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3012#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3013#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3014#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3015#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3016#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3017#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3018#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3019#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3020
c8312fac
WYG
3021/*
3022 * Additional table entries in enhance SENSITIVITY_CMD
3023 */
3024#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3025#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3026#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3027#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3028#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3029#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3030#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3031#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3032#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3033#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3034#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3035#define HD_RESERVED (22)
3036
3037/* number of entries for enhanced tbl */
3038#define ENHANCE_HD_TABLE_SIZE (23)
3039
3040/* number of additional entries for enhanced tbl */
3041#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3042
ae7f9a74
WYG
3043#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0)
3044#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0)
3045#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0)
3046#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668)
3047#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3048#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486)
3049#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37)
3050#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853)
3051#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3052#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476)
3053#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99)
3054
3055#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1)
3056#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1)
3057#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1)
3058#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600)
3059#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40)
3060#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486)
3061#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45)
3062#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853)
3063#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60)
3064#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476)
3065#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99)
c8312fac
WYG
3066
3067
f0832f13 3068/* Control field in struct iwl_sensitivity_cmd */
51e9bf5d
HH
3069#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3070#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
b481de9c 3071
f7d09d7c 3072/**
f0832f13 3073 * struct iwl_sensitivity_cmd
f7d09d7c
BC
3074 * @control: (1) updates working table, (0) updates default table
3075 * @table: energy threshold values, use HD_* as index into table
3076 *
3077 * Always use "1" in "control" to update uCode's working table and DSP.
3078 */
f0832f13 3079struct iwl_sensitivity_cmd {
f7d09d7c
BC
3080 __le16 control; /* always use "1" */
3081 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
ba2d3587 3082} __packed;
b481de9c 3083
c8312fac
WYG
3084/*
3085 *
3086 */
3087struct iwl_enhance_sensitivity_cmd {
3088 __le16 control; /* always use "1" */
3089 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
0e954099 3090} __packed;
c8312fac 3091
f7d09d7c
BC
3092
3093/**
3094 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3095 *
767d055d 3096 * This command sets the relative gains of agn device's 3 radio receiver chains.
f7d09d7c
BC
3097 *
3098 * After the first association, driver should accumulate signal and noise
3099 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3100 * beacons from the associated network (don't collect statistics that come
3101 * in from scanning, or any other non-network source).
3102 *
3103 * DISCONNECTED ANTENNA:
3104 *
3105 * Driver should determine which antennas are actually connected, by comparing
3106 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3107 * following values over 20 beacons, one accumulator for each of the chains
3108 * a/b/c, from struct statistics_rx_non_phy:
3109 *
3110 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3111 *
3112 * Find the strongest signal from among a/b/c. Compare the other two to the
3113 * strongest. If any signal is more than 15 dB (times 20, unless you
3114 * divide the accumulated values by 20) below the strongest, the driver
3115 * considers that antenna to be disconnected, and should not try to use that
3116 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3117 * driver should declare the stronger one as connected, and attempt to use it
3118 * (A and B are the only 2 Tx chains!).
3119 *
3120 *
3121 * RX BALANCE:
3122 *
3123 * Driver should balance the 3 receivers (but just the ones that are connected
3124 * to antennas, see above) for gain, by comparing the average signal levels
3125 * detected during the silence after each beacon (background noise).
3126 * Accumulate (add) the following values over 20 beacons, one accumulator for
3127 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3128 *
3129 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3130 *
3131 * Find the weakest background noise level from among a/b/c. This Rx chain
3132 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3133 * finding noise difference:
3134 *
3135 * (accum_noise[i] - accum_noise[reference]) / 30
3136 *
3137 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3138 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3139 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3140 * and set bit 2 to indicate "reduce gain". The value for the reference
3141 * (weakest) chain should be "0".
3142 *
3143 * diff_gain_[abc] bit fields:
3144 * 2: (1) reduce gain, (0) increase gain
3145 * 1-0: amount of gain, units of 1.5 dB
3146 */
3147
f69f42a6 3148/* Phy calibration command for series */
33fd5033 3149enum {
f69f42a6
TW
3150 IWL_PHY_CALIBRATE_DC_CMD = 8,
3151 IWL_PHY_CALIBRATE_LO_CMD = 9,
f69f42a6 3152 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
f69f42a6
TW
3153 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3154 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3155 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
bf53f939 3156 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
33fd5033
EG
3157};
3158
6d6a1afd
SZ
3159/* This enum defines the bitmap of various calibrations to enable in both
3160 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3161 */
3162enum iwl_ucode_calib_cfg {
45d50024
WYG
3163 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3164 IWL_CALIB_CFG_DC_IDX = BIT(1),
3165 IWL_CALIB_CFG_LO_IDX = BIT(2),
3166 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3167 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3168 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3169 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3170 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3171 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3172 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3173 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
6d6a1afd
SZ
3174};
3175
ad3f7124
WYG
3176#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3177 IWL_CALIB_CFG_DC_IDX | \
3178 IWL_CALIB_CFG_LO_IDX | \
3179 IWL_CALIB_CFG_TX_IQ_IDX | \
3180 IWL_CALIB_CFG_RX_IQ_IDX | \
a944aa9d 3181 IWL_CALIB_CFG_CRYSTAL_IDX)
ad3f7124 3182
af4dc88c
WYG
3183#define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3184 IWL_CALIB_CFG_DC_IDX | \
3185 IWL_CALIB_CFG_LO_IDX | \
3186 IWL_CALIB_CFG_TX_IQ_IDX | \
3187 IWL_CALIB_CFG_RX_IQ_IDX | \
3188 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3189 IWL_CALIB_CFG_PAPD_IDX | \
3190 IWL_CALIB_CFG_TX_PWR_IDX | \
3191 IWL_CALIB_CFG_CRYSTAL_IDX)
3192
ad3f7124 3193#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
6d6a1afd 3194
7c616cba
TW
3195struct iwl_calib_cfg_elmnt_s {
3196 __le32 is_enable;
3197 __le32 start;
3198 __le32 send_res;
3199 __le32 apply_res;
3200 __le32 reserved;
ba2d3587 3201} __packed;
7c616cba
TW
3202
3203struct iwl_calib_cfg_status_s {
3204 struct iwl_calib_cfg_elmnt_s once;
3205 struct iwl_calib_cfg_elmnt_s perd;
3206 __le32 flags;
ba2d3587 3207} __packed;
7c616cba 3208
f69f42a6 3209struct iwl_calib_cfg_cmd {
7c616cba
TW
3210 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3211 struct iwl_calib_cfg_status_s drv_calib_cfg;
3212 __le32 reserved1;
ba2d3587 3213} __packed;
7c616cba 3214
f69f42a6 3215struct iwl_calib_hdr {
7c616cba
TW
3216 u8 op_code;
3217 u8 first_group;
3218 u8 groups_num;
3219 u8 data_valid;
ba2d3587 3220} __packed;
7c616cba 3221
f69f42a6
TW
3222struct iwl_calib_cmd {
3223 struct iwl_calib_hdr hdr;
be5d56ed 3224 u8 data[0];
ba2d3587 3225} __packed;
be5d56ed 3226
0d950d84
TW
3227struct iwl_calib_xtal_freq_cmd {
3228 struct iwl_calib_hdr hdr;
3229 u8 cap_pin1;
3230 u8 cap_pin2;
3231 u8 pad[2];
ba2d3587 3232} __packed;
33fd5033 3233
2e277996 3234#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
bf53f939
SZ
3235struct iwl_calib_temperature_offset_cmd {
3236 struct iwl_calib_hdr hdr;
2e277996
WYG
3237 __le16 radio_sensor_offset;
3238 __le16 reserved;
bf53f939
SZ
3239} __packed;
3240
c6f30347
WYG
3241struct iwl_calib_temperature_offset_v2_cmd {
3242 struct iwl_calib_hdr hdr;
3243 __le16 radio_sensor_offset_high;
3244 __le16 radio_sensor_offset_low;
3245 __le16 burntVoltageRef;
3246 __le16 reserved;
3247} __packed;
3248
0d950d84
TW
3249/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3250struct iwl_calib_chain_noise_reset_cmd {
3251 struct iwl_calib_hdr hdr;
3252 u8 data[0];
3253};
3254
3255/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
f69f42a6 3256struct iwl_calib_chain_noise_gain_cmd {
0d950d84 3257 struct iwl_calib_hdr hdr;
33fd5033
EG
3258 u8 delta_gain_1;
3259 u8 delta_gain_2;
0d950d84 3260 u8 pad[2];
ba2d3587 3261} __packed;
33fd5033 3262
b481de9c
ZY
3263/******************************************************************************
3264 * (12)
3265 * Miscellaneous Commands:
3266 *
3267 *****************************************************************************/
3268
3269/*
3270 * LEDs Command & Response
3271 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3272 *
3273 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3274 * this command turns it on or off, or sets up a periodic blinking cycle.
3275 */
ec1a7460 3276struct iwl_led_cmd {
b481de9c
ZY
3277 __le32 interval; /* "interval" in uSec */
3278 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3279 u8 off; /* # intervals off while blinking;
3280 * "0", with >0 "on" value, turns LED on */
3281 u8 on; /* # intervals on while blinking;
3282 * "0", regardless of "off", turns LED off */
3283 u8 reserved;
ba2d3587 3284} __packed;
b481de9c 3285
9636e583 3286/*
fe1bcbfd
WYG
3287 * station priority table entries
3288 * also used as potential "events" value for both
3289 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
9636e583 3290 */
1933ac4d
WYG
3291
3292/*
3293 * COEX events entry flag masks
3294 * RP - Requested Priority
3295 * WP - Win Medium Priority: priority assigned when the contention has been won
3296 */
3297#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3298#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3299#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3300
3301#define COEX_CU_UNASSOC_IDLE_RP 4
3302#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3303#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3304#define COEX_CU_CALIBRATION_RP 4
3305#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3306#define COEX_CU_CONNECTION_ESTAB_RP 4
3307#define COEX_CU_ASSOCIATED_IDLE_RP 4
3308#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3309#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3310#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3311#define COEX_CU_RF_ON_RP 6
3312#define COEX_CU_RF_OFF_RP 4
3313#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3314#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3315#define COEX_CU_RSRVD1_RP 4
3316#define COEX_CU_RSRVD2_RP 4
3317
3318#define COEX_CU_UNASSOC_IDLE_WP 3
3319#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3320#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3321#define COEX_CU_CALIBRATION_WP 3
3322#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3323#define COEX_CU_CONNECTION_ESTAB_WP 3
3324#define COEX_CU_ASSOCIATED_IDLE_WP 3
3325#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3326#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3327#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3328#define COEX_CU_RF_ON_WP 3
3329#define COEX_CU_RF_OFF_WP 3
3330#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3331#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3332#define COEX_CU_RSRVD1_WP 3
3333#define COEX_CU_RSRVD2_WP 3
3334
3335#define COEX_UNASSOC_IDLE_FLAGS 0
3336#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3337 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3338 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3339#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3340 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3341 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3342#define COEX_CALIBRATION_FLAGS \
3343 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3344 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3345#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3346/*
3347 * COEX_CONNECTION_ESTAB:
3348 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3349 */
3350#define COEX_CONNECTION_ESTAB_FLAGS \
3351 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3352 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3353 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3354#define COEX_ASSOCIATED_IDLE_FLAGS 0
3355#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3356 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3357 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3358#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3359 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3360 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3361#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3362#define COEX_RF_ON_FLAGS 0
3363#define COEX_RF_OFF_FLAGS 0
3364#define COEX_STAND_ALONE_DEBUG_FLAGS \
3365 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3366 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3367#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3368 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3369 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3370 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3371#define COEX_RSRVD1_FLAGS 0
3372#define COEX_RSRVD2_FLAGS 0
3373/*
3374 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3375 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3376 */
3377#define COEX_CU_RF_ON_FLAGS \
3378 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3379 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3380 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3381
3382
9636e583 3383enum {
fe1bcbfd 3384 /* un-association part */
9636e583
RR
3385 COEX_UNASSOC_IDLE = 0,
3386 COEX_UNASSOC_MANUAL_SCAN = 1,
3387 COEX_UNASSOC_AUTO_SCAN = 2,
fe1bcbfd 3388 /* calibration */
9636e583
RR
3389 COEX_CALIBRATION = 3,
3390 COEX_PERIODIC_CALIBRATION = 4,
fe1bcbfd 3391 /* connection */
9636e583 3392 COEX_CONNECTION_ESTAB = 5,
fe1bcbfd 3393 /* association part */
9636e583
RR
3394 COEX_ASSOCIATED_IDLE = 6,
3395 COEX_ASSOC_MANUAL_SCAN = 7,
3396 COEX_ASSOC_AUTO_SCAN = 8,
3397 COEX_ASSOC_ACTIVE_LEVEL = 9,
fe1bcbfd 3398 /* RF ON/OFF */
9636e583
RR
3399 COEX_RF_ON = 10,
3400 COEX_RF_OFF = 11,
3401 COEX_STAND_ALONE_DEBUG = 12,
fe1bcbfd 3402 /* IPAN */
9636e583 3403 COEX_IPAN_ASSOC_LEVEL = 13,
fe1bcbfd 3404 /* reserved */
9636e583
RR
3405 COEX_RSRVD1 = 14,
3406 COEX_RSRVD2 = 15,
3407 COEX_NUM_OF_EVENTS = 16
3408};
3409
fe1bcbfd
WYG
3410/*
3411 * Coexistence WIFI/WIMAX Command
3412 * COEX_PRIORITY_TABLE_CMD = 0x5a
3413 *
3414 */
9636e583
RR
3415struct iwl_wimax_coex_event_entry {
3416 u8 request_prio;
3417 u8 win_medium_prio;
3418 u8 reserved;
3419 u8 flags;
ba2d3587 3420} __packed;
9636e583
RR
3421
3422/* COEX flag masks */
3423
a96a27f9 3424/* Station table is valid */
9636e583 3425#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
a96a27f9 3426/* UnMask wake up src at unassociated sleep */
9636e583 3427#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
a96a27f9 3428/* UnMask wake up src at associated sleep */
9636e583
RR
3429#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3430/* Enable CoEx feature. */
3431#define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3432
3433struct iwl_wimax_coex_cmd {
3434 u8 flags;
3435 u8 reserved[3];
3436 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
ba2d3587 3437} __packed;
9636e583 3438
fe1bcbfd
WYG
3439/*
3440 * Coexistence MEDIUM NOTIFICATION
3441 * COEX_MEDIUM_NOTIFICATION = 0x5b
3442 *
3443 * notification from uCode to host to indicate medium changes
3444 *
3445 */
3446/*
3447 * status field
3448 * bit 0 - 2: medium status
3449 * bit 3: medium change indication
3450 * bit 4 - 31: reserved
3451 */
3452/* status option values, (0 - 2 bits) */
3453#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3454#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3455#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3456#define COEX_MEDIUM_MSK (0x7)
3457
3458/* send notification status (1 bit) */
3459#define COEX_MEDIUM_CHANGED (0x8)
3460#define COEX_MEDIUM_CHANGED_MSK (0x8)
3461#define COEX_MEDIUM_SHIFT (3)
3462
3463struct iwl_coex_medium_notification {
3464 __le32 status;
3465 __le32 events;
ba2d3587 3466} __packed;
fe1bcbfd
WYG
3467
3468/*
3469 * Coexistence EVENT Command
3470 * COEX_EVENT_CMD = 0x5c
3471 *
3472 * send from host to uCode for coex event request.
3473 */
3474/* flags options */
3475#define COEX_EVENT_REQUEST_MSK (0x1)
3476
3477struct iwl_coex_event_cmd {
3478 u8 flags;
3479 u8 event;
3480 __le16 reserved;
ba2d3587 3481} __packed;
fe1bcbfd
WYG
3482
3483struct iwl_coex_event_resp {
3484 __le32 status;
ba2d3587 3485} __packed;
fe1bcbfd
WYG
3486
3487
0288d237
JB
3488/******************************************************************************
3489 * Bluetooth Coexistence commands
3490 *
3491 *****************************************************************************/
3492
3493/*
3494 * BT Status notification
fbba9410 3495 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
0288d237
JB
3496 */
3497enum iwl_bt_coex_profile_traffic_load {
3498 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3499 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3500 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3501 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3502/*
3503 * There are no more even though below is a u8, the
3504 * indication from the BT device only has two bits.
3505 */
3506};
3507
6013270a
WYG
3508#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3509#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3510
d7220f0d 3511/* BT UART message - Share Part (BT -> WiFi) */
fbba9410
WYG
3512#define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3513#define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3514 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3515#define BT_UART_MSG_FRAME1SSN_POS (3)
3516#define BT_UART_MSG_FRAME1SSN_MSK \
3517 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3518#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3519#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3520 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3521#define BT_UART_MSG_FRAME1RESERVED_POS (6)
3522#define BT_UART_MSG_FRAME1RESERVED_MSK \
3523 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3524
3525#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3526#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3527 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3528#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3529#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3530 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3531#define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3532#define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3533 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3534#define BT_UART_MSG_FRAME2INBAND_POS (5)
3535#define BT_UART_MSG_FRAME2INBAND_MSK \
3536 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3537#define BT_UART_MSG_FRAME2RESERVED_POS (6)
3538#define BT_UART_MSG_FRAME2RESERVED_MSK \
3539 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3540
3541#define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3542#define BT_UART_MSG_FRAME3SCOESCO_MSK \
3543 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3544#define BT_UART_MSG_FRAME3SNIFF_POS (1)
3545#define BT_UART_MSG_FRAME3SNIFF_MSK \
3546 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3547#define BT_UART_MSG_FRAME3A2DP_POS (2)
3548#define BT_UART_MSG_FRAME3A2DP_MSK \
3549 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3550#define BT_UART_MSG_FRAME3ACL_POS (3)
3551#define BT_UART_MSG_FRAME3ACL_MSK \
3552 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3553#define BT_UART_MSG_FRAME3MASTER_POS (4)
3554#define BT_UART_MSG_FRAME3MASTER_MSK \
3555 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3556#define BT_UART_MSG_FRAME3OBEX_POS (5)
3557#define BT_UART_MSG_FRAME3OBEX_MSK \
3558 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3559#define BT_UART_MSG_FRAME3RESERVED_POS (6)
3560#define BT_UART_MSG_FRAME3RESERVED_MSK \
3561 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3562
3563#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3564#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3565 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3566#define BT_UART_MSG_FRAME4RESERVED_POS (6)
3567#define BT_UART_MSG_FRAME4RESERVED_MSK \
3568 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3569
3570#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3571#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3572 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3573#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3574#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3575 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3576#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3577#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3578 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3579#define BT_UART_MSG_FRAME5RESERVED_POS (6)
3580#define BT_UART_MSG_FRAME5RESERVED_MSK \
3581 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3582
3583#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3584#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3585 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3586#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3587#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3588 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3589#define BT_UART_MSG_FRAME6RESERVED_POS (6)
3590#define BT_UART_MSG_FRAME6RESERVED_MSK \
3591 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3592
3593#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3594#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3595 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
399f66fd
WYG
3596#define BT_UART_MSG_FRAME7PAGE_POS (3)
3597#define BT_UART_MSG_FRAME7PAGE_MSK \
3598 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3599#define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3600#define BT_UART_MSG_FRAME7INQUIRY_MSK \
3601 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
fbba9410
WYG
3602#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3603#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3604 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3605#define BT_UART_MSG_FRAME7RESERVED_POS (6)
3606#define BT_UART_MSG_FRAME7RESERVED_MSK \
3607 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3608
d7220f0d
WYG
3609/* BT Session Activity 2 UART message (BT -> WiFi) */
3610#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3611#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3612 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3613#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3614#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3615 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3616
3617#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3618#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3619 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3620#define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3621#define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3622 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3623
3624#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3625#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3626 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3627#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3628#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3629 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3630#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3631#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3632 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3633#define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3634#define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3635 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3636
3637#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3638#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3639 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3640#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3641#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3642 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3643#define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3644#define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3645 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3646
3647#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3648#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3649 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3650#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3651#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3652 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3653#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3654#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3655 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3656#define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3657#define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3658 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3659
3660#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3661#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3662 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3663#define BT_UART_MSG_2_FRAME6RFU_POS (5)
3664#define BT_UART_MSG_2_FRAME6RFU_MSK \
3665 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3666#define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3667#define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3668 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3669
3670#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3671#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3672 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3673#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3674#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3675 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3676#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3677#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3678 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3679#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3680#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3681 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3682#define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3683#define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3684 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3685
fbba9410 3686
4aa79d91
WYG
3687#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62)
3688#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65)
3689
fbba9410
WYG
3690struct iwl_bt_uart_msg {
3691 u8 header;
3692 u8 frame1;
3693 u8 frame2;
3694 u8 frame3;
3695 u8 frame4;
3696 u8 frame5;
3697 u8 frame6;
3698 u8 frame7;
f317243a 3699} __packed;
fbba9410 3700
0288d237 3701struct iwl_bt_coex_profile_notif {
fbba9410 3702 struct iwl_bt_uart_msg last_bt_uart_msg;
0288d237
JB
3703 u8 bt_status; /* 0 - off, 1 - on */
3704 u8 bt_traffic_load; /* 0 .. 3? */
3705 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3706 u8 reserved;
f317243a 3707} __packed;
0288d237 3708
aeb4a2ee
WYG
3709#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3710#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3711#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3712#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3713#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3714#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3715#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
0288d237
JB
3716
3717/*
3718 * BT Coexistence Priority table
3719 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3720 */
aeb4a2ee
WYG
3721enum bt_coex_prio_table_events {
3722 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3723 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3724 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3725 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3726 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3727 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3728 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3729 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3730 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3731 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3732 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3733 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3734 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3735 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3736 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3737 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3738 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3739 BT_COEX_PRIO_TBL_EVT_MAX,
3740};
3741
3742enum bt_coex_prio_table_priorities {
3743 BT_COEX_PRIO_TBL_DISABLED = 0,
3744 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3745 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3746 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3747 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3748 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3749 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3750 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3751 BT_COEX_PRIO_TBL_MAX,
3752};
3753
0288d237 3754struct iwl_bt_coex_prio_table_cmd {
aeb4a2ee 3755 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
f317243a 3756} __packed;
0288d237 3757
aeb4a2ee
WYG
3758#define IWL_BT_COEX_ENV_CLOSE 0
3759#define IWL_BT_COEX_ENV_OPEN 1
0288d237
JB
3760/*
3761 * BT Protection Envelope
3762 * REPLY_BT_COEX_PROT_ENV = 0xcd
3763 */
3764struct iwl_bt_coex_prot_env_cmd {
aeb4a2ee 3765 u8 action; /* 0 = closed, 1 = open */
0288d237
JB
3766 u8 type; /* 0 .. 15 */
3767 u8 reserved[2];
f317243a 3768} __packed;
0288d237 3769
56012409
JB
3770/*
3771 * REPLY_D3_CONFIG
3772 */
3773enum iwlagn_d3_wakeup_filters {
3774 IWLAGN_D3_WAKEUP_RFKILL = BIT(0),
3775 IWLAGN_D3_WAKEUP_SYSASSERT = BIT(1),
3776};
3777
3778struct iwlagn_d3_config_cmd {
3779 __le32 min_sleep_time;
3780 __le32 wakeup_flags;
3781} __packed;
3782
c8ac61cf
JB
3783/*
3784 * REPLY_WOWLAN_PATTERNS
3785 */
3786#define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3787#define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3788
3789struct iwlagn_wowlan_pattern {
3790 u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3791 u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3792 u8 mask_size;
3793 u8 pattern_size;
3794 __le16 reserved;
3795} __packed;
3796
3797#define IWLAGN_WOWLAN_MAX_PATTERNS 20
3798
3799struct iwlagn_wowlan_patterns_cmd {
3800 __le32 n_patterns;
3801 struct iwlagn_wowlan_pattern patterns[];
3802} __packed;
3803
3804/*
3805 * REPLY_WOWLAN_WAKEUP_FILTER
3806 */
3807enum iwlagn_wowlan_wakeup_filters {
3808 IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET = BIT(0),
3809 IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH = BIT(1),
3810 IWLAGN_WOWLAN_WAKEUP_BEACON_MISS = BIT(2),
3811 IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE = BIT(3),
3812 IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL = BIT(4),
56012409
JB
3813 IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ = BIT(5),
3814 IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE = BIT(6),
3815 IWLAGN_WOWLAN_WAKEUP_ALWAYS = BIT(7),
3816 IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT = BIT(8),
c8ac61cf
JB
3817};
3818
3819struct iwlagn_wowlan_wakeup_filter_cmd {
3820 __le32 enabled;
3821 __le16 non_qos_seq;
56012409 3822 __le16 reserved;
c8ac61cf
JB
3823 __le16 qos_seq[8];
3824};
3825
3826/*
3827 * REPLY_WOWLAN_TSC_RSC_PARAMS
3828 */
3829#define IWLAGN_NUM_RSC 16
3830
3831struct tkip_sc {
3832 __le16 iv16;
3833 __le16 pad;
3834 __le32 iv32;
3835} __packed;
3836
3837struct iwlagn_tkip_rsc_tsc {
3838 struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3839 struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3840 struct tkip_sc tsc;
3841} __packed;
3842
3843struct aes_sc {
3844 __le64 pn;
3845} __packed;
3846
3847struct iwlagn_aes_rsc_tsc {
3848 struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3849 struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3850 struct aes_sc tsc;
3851} __packed;
3852
3853union iwlagn_all_tsc_rsc {
3854 struct iwlagn_tkip_rsc_tsc tkip;
3855 struct iwlagn_aes_rsc_tsc aes;
3856};
3857
3858struct iwlagn_wowlan_rsc_tsc_params_cmd {
3859 union iwlagn_all_tsc_rsc all_tsc_rsc;
3860} __packed;
3861
3862/*
3863 * REPLY_WOWLAN_TKIP_PARAMS
3864 */
3865#define IWLAGN_MIC_KEY_SIZE 8
3866#define IWLAGN_P1K_SIZE 5
3867struct iwlagn_mic_keys {
3868 u8 tx[IWLAGN_MIC_KEY_SIZE];
3869 u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3870 u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3871} __packed;
3872
3873struct iwlagn_p1k_cache {
3874 __le16 p1k[IWLAGN_P1K_SIZE];
3875} __packed;
3876
3877#define IWLAGN_NUM_RX_P1K_CACHE 2
3878
3879struct iwlagn_wowlan_tkip_params_cmd {
3880 struct iwlagn_mic_keys mic_keys;
3881 struct iwlagn_p1k_cache tx;
3882 struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3883 struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3884} __packed;
3885
3886/*
3887 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3888 */
3889
3890#define IWLAGN_KCK_MAX_SIZE 32
3891#define IWLAGN_KEK_MAX_SIZE 32
3892
3893struct iwlagn_wowlan_kek_kck_material_cmd {
3894 u8 kck[IWLAGN_KCK_MAX_SIZE];
3895 u8 kek[IWLAGN_KEK_MAX_SIZE];
3896 __le16 kck_len;
3897 __le16 kek_len;
3898 __le64 replay_ctr;
3899} __packed;
3900
5718d27f
JB
3901#define RF_KILL_INDICATOR_FOR_WOWLAN 0x87
3902
3903/*
3904 * REPLY_WOWLAN_GET_STATUS = 0xe5
3905 */
3906struct iwlagn_wowlan_status {
3907 __le64 replay_ctr;
3908 __le32 rekey_status;
3909 __le32 wakeup_reason;
3910 u8 pattern_number;
3911 u8 reserved1;
3912 __le16 qos_seq_ctr[8];
3913 __le16 non_qos_seq_ctr;
3914 __le16 reserved2;
3915 union iwlagn_all_tsc_rsc tsc_rsc;
3916 __le16 reserved3;
3917} __packed;
3918
946ba30d
JB
3919/*
3920 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3921 */
3922
94073919
JB
3923/*
3924 * Minimum slot time in TU
3925 */
3926#define IWL_MIN_SLOT_TIME 20
3927
946ba30d
JB
3928/**
3929 * struct iwl_wipan_slot
3930 * @width: Time in TU
3931 * @type:
3932 * 0 - BSS
3933 * 1 - PAN
3934 */
3935struct iwl_wipan_slot {
3936 __le16 width;
3937 u8 type;
3938 u8 reserved;
3939} __packed;
3940
3941#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3942#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3943#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3944#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3945#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3946
3947/**
3948 * struct iwl_wipan_params_cmd
3949 * @flags:
3950 * bit0: reserved
3951 * bit1: CP leave channel with CTS
3952 * bit2: CP leave channel qith Quiet
3953 * bit3: slotted mode
3954 * 1 - work in slotted mode
3955 * 0 - work in non slotted mode
3956 * bit4: filter beacon notification
3957 * bit5: full tx slotted mode. if this flag is set,
3958 * uCode will perform leaving channel methods in context switch
3959 * also when working in same channel mode
3960 * @num_slots: 1 - 10
3961 */
3962struct iwl_wipan_params_cmd {
3963 __le16 flags;
3964 u8 reserved;
3965 u8 num_slots;
3966 struct iwl_wipan_slot slots[10];
3967} __packed;
3968
3969/*
3970 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3971 *
3972 * TODO: Figure out what this is used for,
3973 * it can only switch between 2.4 GHz
3974 * channels!!
3975 */
3976
3977struct iwl_wipan_p2p_channel_switch_cmd {
3978 __le16 channel;
3979 __le16 reserved;
3980};
3981
3982/*
3983 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3984 *
3985 * This is used by the device to notify us of the
3986 * NoA schedule it determined so we can forward it
3987 * to userspace for inclusion in probe responses.
3988 *
3989 * In beacons, the NoA schedule is simply appended
3990 * to the frame we give the device.
3991 */
3992
3993struct iwl_wipan_noa_descriptor {
3994 u8 count;
3995 __le32 duration;
3996 __le32 interval;
3997 __le32 starttime;
3998} __packed;
3999
4000struct iwl_wipan_noa_attribute {
4001 u8 id;
4002 __le16 length;
4003 u8 index;
4004 u8 ct_window;
4005 struct iwl_wipan_noa_descriptor descr0, descr1;
4006 u8 reserved;
4007} __packed;
4008
4009struct iwl_wipan_noa_notification {
4010 u32 noa_active;
4011 struct iwl_wipan_noa_attribute noa_attribute;
4012} __packed;
4013
6a63578d 4014#endif /* __iwl_commands_h__ */
This page took 2.008786 seconds and 5 git commands to generate.