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iwlwifi: Legacy isr only used by legacy devices
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-1000.c
CommitLineData
c5d05698
JS		 1/******************************************************************************
2 *
1f447808 3 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
c5d05698
JS		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/skbuff.h>
34#include <linux/netdevice.h>
35#include <linux/wireless.h>
36#include <net/mac80211.h>
37#include <linux/etherdevice.h>
38#include <asm/unaligned.h>
39
40#include "iwl-eeprom.h"
41#include "iwl-dev.h"
42#include "iwl-core.h"
43#include "iwl-io.h"
44#include "iwl-sta.h"
a1175124 45#include "iwl-agn.h"
c5d05698 46#include "iwl-helpers.h"
19e6cda0 47#include "iwl-agn-hw.h"
e932a609 48#include "iwl-agn-led.h"
b8c76267 49#include "iwl-agn-debugfs.h"
c5d05698
JS		 50
51/* Highest firmware API version supported */
cce53aa3 52#define IWL1000_UCODE_API_MAX 3
1de19ecc 53#define IWL100_UCODE_API_MAX 5
c5d05698
JS		 54
55/* Lowest firmware API version supported */
77dcb6a9 56#define IWL1000_UCODE_API_MIN 1
1de19ecc 57#define IWL100_UCODE_API_MIN 5
c5d05698 58
77dcb6a9
JS		 59#define IWL1000_FW_PRE "iwlwifi-1000-"
60#define _IWL1000_MODULE_FIRMWARE(api) IWL1000_FW_PRE #api ".ucode"
61#define IWL1000_MODULE_FIRMWARE(api) _IWL1000_MODULE_FIRMWARE(api)
c5d05698 62
1de19ecc
JS		 63#define IWL100_FW_PRE "iwlwifi-100-"
64#define _IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE #api ".ucode"
65#define IWL100_MODULE_FIRMWARE(api) _IWL100_MODULE_FIRMWARE(api)
66
672639de
WYG		 67
68/*
69 * For 1000, use advance thermal throttling critical temperature threshold,
70 * but legacy thermal management implementation for now.
71 * This is for the reason of 1000 uCode using advance thermal throttling API
72 * but not implement ct_kill_exit based on ct_kill exit temperature
73 * so the thermal throttling will still based on legacy thermal throttling
74 * management.
75 * The code here need to be modified once 1000 uCode has the advanced thermal
76 * throttling algorithm in place
77 */
78static void iwl1000_set_ct_threshold(struct iwl_priv *priv)
79{
80 /* want Celsius */
81 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;
82 priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;
83}
84
65b7998a
WYG		 85/* NIC configuration for 1000 series */
86static void iwl1000_nic_config(struct iwl_priv *priv)
87{
9371d4ed
WYG		 88 /* set CSR_HW_CONFIG_REG for uCode use */
89 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
90 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
91 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
65b7998a
WYG		 92
93 /* Setting digital SVR for 1000 card to 1.32V */
94 /* locking is acquired in iwl_set_bits_mask_prph() function */
95 iwl_set_bits_mask_prph(priv, APMG_DIGITAL_SVR_REG,
96 APMG_SVR_DIGITAL_VOLTAGE_1_32,
97 ~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);
98}
99
fac06108
WYG		 100static struct iwl_sensitivity_ranges iwl1000_sensitivity = {
101 .min_nrg_cck = 95,
102 .max_nrg_cck = 0, /* not used, set to 0 */
103 .auto_corr_min_ofdm = 90,
104 .auto_corr_min_ofdm_mrc = 170,
105 .auto_corr_min_ofdm_x1 = 120,
106 .auto_corr_min_ofdm_mrc_x1 = 240,
107
108 .auto_corr_max_ofdm = 120,
109 .auto_corr_max_ofdm_mrc = 210,
110 .auto_corr_max_ofdm_x1 = 155,
111 .auto_corr_max_ofdm_mrc_x1 = 290,
112
113 .auto_corr_min_cck = 125,
114 .auto_corr_max_cck = 200,
115 .auto_corr_min_cck_mrc = 170,
116 .auto_corr_max_cck_mrc = 400,
117 .nrg_th_cck = 95,
118 .nrg_th_ofdm = 95,
119
120 .barker_corr_th_min = 190,
121 .barker_corr_th_min_mrc = 390,
122 .nrg_th_cca = 62,
123};
124
125static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
126{
127 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
19e6cda0 128 priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES)
7cb1b088 129 priv->cfg->base_params->num_of_queues =
fac06108
WYG		 130 priv->cfg->mod_params->num_of_queues;
131
7cb1b088 132 priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
fac06108
WYG		 133 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
134 priv->hw_params.scd_bc_tbls_size =
7cb1b088 135 priv->cfg->base_params->num_of_queues *
19e6cda0 136 sizeof(struct iwlagn_scd_bc_tbl);
fac06108 137 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
bf3c7fdd 138 priv->hw_params.max_stations = IWLAGN_STATION_COUNT;
a194e324 139 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
fac06108 140
19e6cda0
WYG		 141 priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE;
142 priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE;
fac06108
WYG		 143
144 priv->hw_params.max_bsm_size = 0;
145 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
146 BIT(IEEE80211_BAND_5GHZ);
147 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
148
149 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
150 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
151 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
152 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
153
0453674c 154 iwl1000_set_ct_threshold(priv);
fac06108
WYG		 155
156 /* Set initial sensitivity parameters */
157 /* Set initial calibration set */
158 priv->hw_params.sens = &iwl1000_sensitivity;
159 priv->hw_params.calib_init_cfg =
160 BIT(IWL_CALIB_XTAL) |
161 BIT(IWL_CALIB_LO) |
162 BIT(IWL_CALIB_TX_IQ) |
163 BIT(IWL_CALIB_TX_IQ_PERD) |
164 BIT(IWL_CALIB_BASE_BAND);
178d1596
WYG		 165 if (priv->cfg->need_dc_calib)
166 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_DC);
fac06108 167
a0ee74cf
WYG		 168 priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
169
fac06108
WYG		 170 return 0;
171}
172
672639de 173static struct iwl_lib_ops iwl1000_lib = {
fac06108 174 .set_hw_params = iwl1000_hw_set_hw_params,
b305a080
WYG		 175 .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
176 .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
177 .txq_set_sched = iwlagn_txq_set_sched,
178 .txq_agg_enable = iwlagn_txq_agg_enable,
179 .txq_agg_disable = iwlagn_txq_agg_disable,
672639de
WYG		 180 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
181 .txq_free_tfd = iwl_hw_txq_free_tfd,
182 .txq_init = iwl_hw_tx_queue_init,
e04ed0a5
WYG		 183 .rx_handler_setup = iwlagn_rx_handler_setup,
184 .setup_deferred_work = iwlagn_setup_deferred_work,
185 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
81b8176e 186 .load_ucode = iwlagn_load_ucode,
b7a79404
RC		 187 .dump_nic_event_log = iwl_dump_nic_event_log,
188 .dump_nic_error_log = iwl_dump_nic_error_log,
696bdee3 189 .dump_csr = iwl_dump_csr,
1b3eb823 190 .dump_fh = iwl_dump_fh,
741a6266
WYG		 191 .init_alive_start = iwlagn_init_alive_start,
192 .alive_notify = iwlagn_alive_notify,
e04ed0a5 193 .send_tx_power = iwlagn_send_tx_power,
672639de
WYG		 194 .update_chain_flags = iwl_update_chain_flags,
195 .apm_ops = {
fadb3582 196 .init = iwl_apm_init,
65b7998a 197 .config = iwl1000_nic_config,
672639de
WYG		 198 },
199 .eeprom_ops = {
200 .regulatory_bands = {
e04ed0a5
WYG		 201 EEPROM_REG_BAND_1_CHANNELS,
202 EEPROM_REG_BAND_2_CHANNELS,
203 EEPROM_REG_BAND_3_CHANNELS,
204 EEPROM_REG_BAND_4_CHANNELS,
205 EEPROM_REG_BAND_5_CHANNELS,
206 EEPROM_REG_BAND_24_HT40_CHANNELS,
207 EEPROM_REG_BAND_52_HT40_CHANNELS
672639de 208 },
672639de
WYG		 209 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
210 .release_semaphore = iwlcore_eeprom_release_semaphore,
e04ed0a5
WYG		 211 .calib_version = iwlagn_eeprom_calib_version,
212 .query_addr = iwlagn_eeprom_query_addr,
672639de 213 },
672639de 214 .isr = iwl_isr_ict,
672639de 215 .temp_ops = {
e04ed0a5 216 .temperature = iwlagn_temperature,
672639de 217 },
b8c76267
AK		 218 .debugfs_ops = {
219 .rx_stats_read = iwl_ucode_rx_stats_read,
220 .tx_stats_read = iwl_ucode_tx_stats_read,
221 .general_stats_read = iwl_ucode_general_stats_read,
ffb7d896 222 .bt_stats_read = iwl_ucode_bt_stats_read,
54a9aa65 223 .reply_tx_error = iwl_reply_tx_error_read,
b8c76267 224 },
b74e31a9 225 .recover_from_tx_stall = iwl_bg_monitor_recover,
fa8f130c
WYG		 226 .check_plcp_health = iwl_good_plcp_health,
227 .check_ack_health = iwl_good_ack_health,
716c74b0 228 .txfifo_flush = iwlagn_txfifo_flush,
65550636 229 .dev_txfifo_flush = iwlagn_dev_txfifo_flush,
0975cc8f
WYG		 230 .tt_ops = {
231 .lower_power_detection = iwl_tt_is_low_power_state,
232 .tt_power_mode = iwl_tt_current_power_mode,
233 .ct_kill_check = iwl_check_for_ct_kill,
234 }
672639de
WYG		 235};
236
45d5d805 237static const struct iwl_ops iwl1000_ops = {
672639de 238 .lib = &iwl1000_lib,
7dc77dba
WYG		 239 .hcmd = &iwlagn_hcmd,
240 .utils = &iwlagn_hcmd_utils,
e932a609 241 .led = &iwlagn_led_ops,
dc21b545 242 .ieee80211_ops = &iwlagn_hw_ops,
672639de
WYG		 243};
244
7cb1b088 245static struct iwl_base_params iwl1000_base_params = {
19e6cda0
WYG		 246 .num_of_queues = IWLAGN_NUM_QUEUES,
247 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
7cb1b088 248 .eeprom_size = OTP_LOW_IMAGE_SIZE,
fadb3582 249 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
a6c5c731 250 .set_l0s = true,
fadb3582 251 .use_bsm = false,
415e4993
WYG		 252 .max_ll_items = OTP_MAX_LL_ITEMS_1000,
253 .shadow_ram_support = false,
f2d0d0e2 254 .led_compensation = 51,
d8c07e7a 255 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
480e8407 256 .support_ct_kill_exit = true,
6c3872e1 257 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF,
d4fe5ac9 258 .chain_noise_scale = 1000,
ce60659a 259 .monitor_recover_period = IWL_DEF_MONITORING_PERIOD,
678b385d 260 .max_event_log_size = 128,
6e5c800e 261 .ucode_tracing = true,
65d1f896
WYG		 262 .sensitivity_calib_by_driver = true,
263 .chain_noise_calib_by_driver = true,
c5d05698 264};
7cb1b088
WYG		 265static struct iwl_ht_params iwl1000_ht_params = {
266 .ht_greenfield_support = true,
267 .use_rts_for_aggregation = true, /* use rts/cts protection */
268};
269
270struct iwl_cfg iwl1000_bgn_cfg = {
271 .name = "Intel(R) Centrino(R) Wireless-N 1000 BGN",
272 .fw_name_pre = IWL1000_FW_PRE,
273 .ucode_api_max = IWL1000_UCODE_API_MAX,
274 .ucode_api_min = IWL1000_UCODE_API_MIN,
275 .sku = IWL_SKU_G|IWL_SKU_N,
276 .valid_tx_ant = ANT_A,
277 .valid_rx_ant = ANT_AB,
278 .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
279 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
280 .ops = &iwl1000_ops,
281 .mod_params = &iwlagn_mod_params,
282 .base_params = &iwl1000_base_params,
283 .ht_params = &iwl1000_ht_params,
284};
c5d05698 285
4bd0914f 286struct iwl_cfg iwl1000_bg_cfg = {
c11362c0 287 .name = "Intel(R) Centrino(R) Wireless-N 1000 BG",
4bd0914f
WYG		 288 .fw_name_pre = IWL1000_FW_PRE,
289 .ucode_api_max = IWL1000_UCODE_API_MAX,
290 .ucode_api_min = IWL1000_UCODE_API_MIN,
291 .sku = IWL_SKU_G,
7cb1b088
WYG		 292 .valid_tx_ant = ANT_A,
293 .valid_rx_ant = ANT_AB,
4bd0914f 294 .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
00e70590 295 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
7cb1b088 296 .ops = &iwl1000_ops,
348ee7cd 297 .mod_params = &iwlagn_mod_params,
7cb1b088 298 .base_params = &iwl1000_base_params,
4bd0914f
WYG		 299};
300
1de19ecc
JS		 301struct iwl_cfg iwl100_bgn_cfg = {
302 .name = "Intel(R) 100 Series 1x1 BGN",
303 .fw_name_pre = IWL100_FW_PRE,
304 .ucode_api_max = IWL100_UCODE_API_MAX,
305 .ucode_api_min = IWL100_UCODE_API_MIN,
306 .sku = IWL_SKU_G|IWL_SKU_N,
7cb1b088
WYG		 307 .valid_tx_ant = ANT_A,
308 .valid_rx_ant = ANT_A,
1de19ecc
JS		 309 .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
310 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
7cb1b088 311 .ops = &iwl1000_ops,
1de19ecc 312 .mod_params = &iwlagn_mod_params,
7cb1b088
WYG		 313 .base_params = &iwl1000_base_params,
314 .ht_params = &iwl1000_ht_params,
1de19ecc
JS		 315};
316
317struct iwl_cfg iwl100_bg_cfg = {
318 .name = "Intel(R) 100 Series 1x1 BG",
319 .fw_name_pre = IWL100_FW_PRE,
320 .ucode_api_max = IWL100_UCODE_API_MAX,
321 .ucode_api_min = IWL100_UCODE_API_MIN,
322 .sku = IWL_SKU_G,
7cb1b088
WYG		 323 .valid_tx_ant = ANT_A,
324 .valid_rx_ant = ANT_A,
1de19ecc
JS		 325 .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
326 .eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,
7cb1b088 327 .ops = &iwl1000_ops,
1de19ecc 328 .mod_params = &iwlagn_mod_params,
7cb1b088 329 .base_params = &iwl1000_base_params,
1de19ecc
JS		 330};
331
9554b34a 332MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX));
1de19ecc 333MODULE_FIRMWARE(IWL100_MODULE_FIRMWARE(IWL100_UCODE_API_MAX));
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