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iwlwifi: cleanup namespace
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-4965.h
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b481de9c
ZY		 1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26#ifndef __iwl_4965_h__
27#define __iwl_4965_h__
28
5d08cd1d
CH		 29#include <linux/pci.h> /* for struct pci_device_id */
30#include <linux/kernel.h>
31#include <net/ieee80211_radiotap.h>
32
bb8c093b 33struct iwl4965_priv;
5d08cd1d
CH		 34
35/* Hardware specific file defines the PCI IDs table for that hardware module */
bb8c093b 36extern struct pci_device_id iwl4965_hw_card_ids[];
5d08cd1d
CH		 37
38#define DRV_NAME "iwl4965"
39#include "iwl-4965-hw.h"
40#include "iwl-prph.h"
41#include "iwl-4965-debug.h"
42
43/* Default noise level to report when noise measurement is not available.
44 * This may be because we're:
45 * 1) Not associated (4965, no beacon statistics being sent to driver)
46 * 2) Scanning (noise measurement does not apply to associated channel)
47 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
48 * Use default noise value of -127 ... this is below the range of measurable
49 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
50 * Also, -127 works better than 0 when averaging frames with/without
51 * noise info (e.g. averaging might be done in app); measured dBm values are
52 * always negative ... using a negative value as the default keeps all
53 * averages within an s8's (used in some apps) range of negative values. */
54#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
55
56/* Module parameters accessible from iwl-*.c */
bb8c093b
CH		 57extern int iwl4965_param_hwcrypto;
58extern int iwl4965_param_queues_num;
5d08cd1d 59
bb8c093b 60enum iwl4965_antenna {
5d08cd1d
CH		 61 IWL_ANTENNA_DIVERSITY,
62 IWL_ANTENNA_MAIN,
63 IWL_ANTENNA_AUX
64};
65
66/*
67 * RTS threshold here is total size [2347] minus 4 FCS bytes
68 * Per spec:
69 * a value of 0 means RTS on all data/management packets
70 * a value > max MSDU size means no RTS
71 * else RTS for data/management frames where MPDU is larger
72 * than RTS value.
73 */
74#define DEFAULT_RTS_THRESHOLD 2347U
75#define MIN_RTS_THRESHOLD 0U
76#define MAX_RTS_THRESHOLD 2347U
77#define MAX_MSDU_SIZE 2304U
78#define MAX_MPDU_SIZE 2346U
79#define DEFAULT_BEACON_INTERVAL 100U
80#define DEFAULT_SHORT_RETRY_LIMIT 7U
81#define DEFAULT_LONG_RETRY_LIMIT 4U
82
bb8c093b 83struct iwl4965_rx_mem_buffer {
5d08cd1d
CH		 84 dma_addr_t dma_addr;
85 struct sk_buff *skb;
86 struct list_head list;
87};
88
bb8c093b 89struct iwl4965_rt_rx_hdr {
5d08cd1d
CH		 90 struct ieee80211_radiotap_header rt_hdr;
91 __le64 rt_tsf; /* TSF */
92 u8 rt_flags; /* radiotap packet flags */
93 u8 rt_rate; /* rate in 500kb/s */
94 __le16 rt_channelMHz; /* channel in MHz */
95 __le16 rt_chbitmask; /* channel bitfield */
96 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
97 s8 rt_dbmnoise;
98 u8 rt_antenna; /* antenna number */
99 u8 payload[0]; /* payload... */
100} __attribute__ ((packed));
101
bb8c093b 102struct iwl4965_rt_tx_hdr {
5d08cd1d
CH		 103 struct ieee80211_radiotap_header rt_hdr;
104 u8 rt_rate; /* rate in 500kb/s */
105 __le16 rt_channel; /* channel in mHz */
106 __le16 rt_chbitmask; /* channel bitfield */
107 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
108 u8 rt_antenna; /* antenna number */
109 u8 payload[0]; /* payload... */
110} __attribute__ ((packed));
111
112/*
113 * Generic queue structure
114 *
115 * Contains common data for Rx and Tx queues
116 */
bb8c093b 117struct iwl4965_queue {
5d08cd1d
CH		 118 int n_bd; /* number of BDs in this queue */
119 int write_ptr; /* 1-st empty entry (index) host_w*/
120 int read_ptr; /* last used entry (index) host_r*/
121 dma_addr_t dma_addr; /* physical addr for BD's */
122 int n_window; /* safe queue window */
123 u32 id;
124 int low_mark; /* low watermark, resume queue if free
125 * space more than this */
126 int high_mark; /* high watermark, stop queue if free
127 * space less than this */
128} __attribute__ ((packed));
129
130#define MAX_NUM_OF_TBS (20)
131
bb8c093b 132struct iwl4965_tx_info {
5d08cd1d
CH		 133 struct ieee80211_tx_status status;
134 struct sk_buff *skb[MAX_NUM_OF_TBS];
135};
136
137/**
bb8c093b 138 * struct iwl4965_tx_queue - Tx Queue for DMA
5d08cd1d
CH		 139 * @need_update: need to update read/write index
140 * @shed_retry: queue is HT AGG enabled
141 *
142 * Queue consists of circular buffer of BD's and required locking structures.
143 */
bb8c093b
CH		 144struct iwl4965_tx_queue {
145 struct iwl4965_queue q;
146 struct iwl4965_tfd_frame *bd;
147 struct iwl4965_cmd *cmd;
5d08cd1d 148 dma_addr_t dma_addr_cmd;
bb8c093b 149 struct iwl4965_tx_info *txb;
5d08cd1d
CH		 150 int need_update;
151 int sched_retry;
152 int active;
153};
154
155#define IWL_NUM_SCAN_RATES (2)
156
bb8c093b 157struct iwl4965_channel_tgd_info {
5d08cd1d
CH		 158 u8 type;
159 s8 max_power;
160};
161
bb8c093b 162struct iwl4965_channel_tgh_info {
5d08cd1d
CH		 163 s64 last_radar_time;
164};
165
166/* current Tx power values to use, one for each rate for each channel.
167 * requested power is limited by:
168 * -- regulatory EEPROM limits for this channel
169 * -- hardware capabilities (clip-powers)
170 * -- spectrum management
171 * -- user preference (e.g. iwconfig)
172 * when requested power is set, base power index must also be set. */
bb8c093b
CH		 173struct iwl4965_channel_power_info {
174 struct iwl4965_tx_power tpc; /* actual radio and DSP gain settings */
5d08cd1d
CH		 175 s8 power_table_index; /* actual (compenst'd) index into gain table */
176 s8 base_power_index; /* gain index for power at factory temp. */
177 s8 requested_power; /* power (dBm) requested for this chnl/rate */
178};
179
180/* current scan Tx power values to use, one for each scan rate for each
181 * channel. */
bb8c093b
CH		 182struct iwl4965_scan_power_info {
183 struct iwl4965_tx_power tpc; /* actual radio and DSP gain settings */
5d08cd1d
CH		 184 s8 power_table_index; /* actual (compenst'd) index into gain table */
185 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
186};
187
188/* Channel unlock period is 15 seconds. If no beacon or probe response
189 * has been received within 15 seconds on a locked channel then the channel
190 * remains locked. */
191#define TX_UNLOCK_PERIOD 15
192
193/* CSA lock period is 15 seconds. If a CSA has been received on a channel in
194 * the last 15 seconds, the channel is locked */
195#define CSA_LOCK_PERIOD 15
196/*
197 * One for each channel, holds all channel setup data
198 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
199 * with one another!
200 */
201#define IWL4965_MAX_RATE (33)
202
bb8c093b
CH		 203struct iwl4965_channel_info {
204 struct iwl4965_channel_tgd_info tgd;
205 struct iwl4965_channel_tgh_info tgh;
206 struct iwl4965_eeprom_channel eeprom; /* EEPROM regulatory limit */
207 struct iwl4965_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
5d08cd1d
CH		 208 * FAT channel */
209
210 u8 channel; /* channel number */
211 u8 flags; /* flags copied from EEPROM */
212 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
213 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
214 s8 min_power; /* always 0 */
215 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
216
217 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
218 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
219 u8 phymode; /* MODE_IEEE80211{A,B,G} */
220
221 /* Radio/DSP gain settings for each "normal" data Tx rate.
222 * These include, in addition to RF and DSP gain, a few fields for
223 * remembering/modifying gain settings (indexes). */
bb8c093b 224 struct iwl4965_channel_power_info power_info[IWL4965_MAX_RATE];
5d08cd1d
CH		 225
226 /* FAT channel info */
227 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
228 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
229 s8 fat_min_power; /* always 0 */
230 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
231 u8 fat_flags; /* flags copied from EEPROM */
232 u8 fat_extension_channel;
233
234 /* Radio/DSP gain settings for each scan rate, for directed scans. */
bb8c093b 235 struct iwl4965_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
5d08cd1d
CH		 236};
237
bb8c093b 238struct iwl4965_clip_group {
5d08cd1d
CH		 239 /* maximum power level to prevent clipping for each rate, derived by
240 * us from this band's saturation power in EEPROM */
241 const s8 clip_powers[IWL_MAX_RATES];
242};
243
244#include "iwl-4965-rs.h"
245
246#define IWL_TX_FIFO_AC0 0
247#define IWL_TX_FIFO_AC1 1
248#define IWL_TX_FIFO_AC2 2
249#define IWL_TX_FIFO_AC3 3
250#define IWL_TX_FIFO_HCCA_1 5
251#define IWL_TX_FIFO_HCCA_2 6
252#define IWL_TX_FIFO_NONE 7
253
254/* Minimum number of queues. MAX_NUM is defined in hw specific files */
255#define IWL_MIN_NUM_QUEUES 4
256
257/* Power management (not Tx power) structures */
258
bb8c093b
CH		 259struct iwl4965_power_vec_entry {
260 struct iwl4965_powertable_cmd cmd;
5d08cd1d
CH		 261 u8 no_dtim;
262};
263#define IWL_POWER_RANGE_0 (0)
264#define IWL_POWER_RANGE_1 (1)
265
266#define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */
267#define IWL_POWER_INDEX_3 0x03
268#define IWL_POWER_INDEX_5 0x05
269#define IWL_POWER_AC 0x06
270#define IWL_POWER_BATTERY 0x07
271#define IWL_POWER_LIMIT 0x07
272#define IWL_POWER_MASK 0x0F
273#define IWL_POWER_ENABLED 0x10
274#define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK)
275
bb8c093b 276struct iwl4965_power_mgr {
5d08cd1d 277 spinlock_t lock;
bb8c093b
CH		 278 struct iwl4965_power_vec_entry pwr_range_0[IWL_POWER_AC];
279 struct iwl4965_power_vec_entry pwr_range_1[IWL_POWER_AC];
5d08cd1d
CH		 280 u8 active_index;
281 u32 dtim_val;
282};
283
284#define IEEE80211_DATA_LEN 2304
285#define IEEE80211_4ADDR_LEN 30
286#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
287#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
288
bb8c093b 289struct iwl4965_frame {
5d08cd1d
CH		 290 union {
291 struct ieee80211_hdr frame;
bb8c093b 292 struct iwl4965_tx_beacon_cmd beacon;
5d08cd1d
CH		 293 u8 raw[IEEE80211_FRAME_LEN];
294 u8 cmd[360];
295 } u;
296 struct list_head list;
297};
298
299#define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf)
300#define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8)
301#define SEQ_TO_INDEX(x) (x & 0xff)
302#define INDEX_TO_SEQ(x) (x & 0xff)
303#define SEQ_HUGE_FRAME (0x4000)
304#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
305#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
306#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
307#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
308
309enum {
310 /* CMD_SIZE_NORMAL = 0, */
311 CMD_SIZE_HUGE = (1 << 0),
312 /* CMD_SYNC = 0, */
313 CMD_ASYNC = (1 << 1),
314 /* CMD_NO_SKB = 0, */
315 CMD_WANT_SKB = (1 << 2),
316};
317
bb8c093b
CH		 318struct iwl4965_cmd;
319struct iwl4965_priv;
5d08cd1d 320
bb8c093b
CH		 321struct iwl4965_cmd_meta {
322 struct iwl4965_cmd_meta *source;
5d08cd1d
CH		 323 union {
324 struct sk_buff *skb;
bb8c093b
CH		 325 int (*callback)(struct iwl4965_priv *priv,
326 struct iwl4965_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH		 327 } __attribute__ ((packed)) u;
328
329 /* The CMD_SIZE_HUGE flag bit indicates that the command
330 * structure is stored at the end of the shared queue memory. */
331 u32 flags;
332
333} __attribute__ ((packed));
334
bb8c093b
CH		 335struct iwl4965_cmd {
336 struct iwl4965_cmd_meta meta;
337 struct iwl4965_cmd_header hdr;
5d08cd1d 338 union {
bb8c093b
CH		 339 struct iwl4965_addsta_cmd addsta;
340 struct iwl4965_led_cmd led;
5d08cd1d
CH		 341 u32 flags;
342 u8 val8;
343 u16 val16;
344 u32 val32;
bb8c093b
CH		 345 struct iwl4965_bt_cmd bt;
346 struct iwl4965_rxon_time_cmd rxon_time;
347 struct iwl4965_powertable_cmd powertable;
348 struct iwl4965_qosparam_cmd qosparam;
349 struct iwl4965_tx_cmd tx;
350 struct iwl4965_tx_beacon_cmd tx_beacon;
351 struct iwl4965_rxon_assoc_cmd rxon_assoc;
5d08cd1d
CH		 352 u8 *indirect;
353 u8 payload[360];
354 } __attribute__ ((packed)) cmd;
355} __attribute__ ((packed));
356
bb8c093b 357struct iwl4965_host_cmd {
5d08cd1d
CH		 358 u8 id;
359 u16 len;
bb8c093b 360 struct iwl4965_cmd_meta meta;
5d08cd1d
CH		 361 const void *data;
362};
363
bb8c093b
CH		 364#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl4965_cmd) - \
365 sizeof(struct iwl4965_cmd_meta))
5d08cd1d
CH		 366
367/*
368 * RX related structures and functions
369 */
370#define RX_FREE_BUFFERS 64
371#define RX_LOW_WATERMARK 8
372
373#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
374#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
375#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
376
377/**
bb8c093b 378 * struct iwl4965_rx_queue - Rx queue
5d08cd1d
CH		 379 * @processed: Internal index to last handled Rx packet
380 * @read: Shared index to newest available Rx buffer
381 * @write: Shared index to oldest written Rx packet
382 * @free_count: Number of pre-allocated buffers in rx_free
383 * @rx_free: list of free SKBs for use
384 * @rx_used: List of Rx buffers with no SKB
385 * @need_update: flag to indicate we need to update read/write index
386 *
bb8c093b 387 * NOTE: rx_free and rx_used are used as a FIFO for iwl4965_rx_mem_buffers
5d08cd1d 388 */
bb8c093b 389struct iwl4965_rx_queue {
5d08cd1d
CH		 390 __le32 *bd;
391 dma_addr_t dma_addr;
bb8c093b
CH		 392 struct iwl4965_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
393 struct iwl4965_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH		 394 u32 processed;
395 u32 read;
396 u32 write;
397 u32 free_count;
398 struct list_head rx_free;
399 struct list_head rx_used;
400 int need_update;
401 spinlock_t lock;
402};
403
404#define IWL_SUPPORTED_RATES_IE_LEN 8
405
406#define SCAN_INTERVAL 100
407
408#define MAX_A_CHANNELS 252
409#define MIN_A_CHANNELS 7
410
411#define MAX_B_CHANNELS 14
412#define MIN_B_CHANNELS 1
413
414#define STATUS_HCMD_ACTIVE 0 /* host command in progress */
415#define STATUS_INT_ENABLED 1
416#define STATUS_RF_KILL_HW 2
417#define STATUS_RF_KILL_SW 3
418#define STATUS_INIT 4
419#define STATUS_ALIVE 5
420#define STATUS_READY 6
421#define STATUS_TEMPERATURE 7
422#define STATUS_GEO_CONFIGURED 8
423#define STATUS_EXIT_PENDING 9
424#define STATUS_IN_SUSPEND 10
425#define STATUS_STATISTICS 11
426#define STATUS_SCANNING 12
427#define STATUS_SCAN_ABORTING 13
428#define STATUS_SCAN_HW 14
429#define STATUS_POWER_PMI 15
430#define STATUS_FW_ERROR 16
431
432#define MAX_TID_COUNT 9
433
434#define IWL_INVALID_RATE 0xFF
435#define IWL_INVALID_VALUE -1
436
c8b0e6e1
CH		 437#ifdef CONFIG_IWL4965_HT
438#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 439struct iwl4965_ht_agg {
5d08cd1d
CH		 440 u16 txq_id;
441 u16 frame_count;
442 u16 wait_for_ba;
443 u16 start_idx;
444 u32 bitmap0;
445 u32 bitmap1;
446 u32 rate_n_flags;
447};
c8b0e6e1
CH		 448#endif /* CONFIG_IWL4965_HT_AGG */
449#endif /* CONFIG_IWL4965_HT */
5d08cd1d 450
bb8c093b 451struct iwl4965_tid_data {
5d08cd1d 452 u16 seq_number;
c8b0e6e1
CH		 453#ifdef CONFIG_IWL4965_HT
454#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 455 struct iwl4965_ht_agg agg;
c8b0e6e1
CH		 456#endif /* CONFIG_IWL4965_HT_AGG */
457#endif /* CONFIG_IWL4965_HT */
5d08cd1d
CH		 458};
459
bb8c093b 460struct iwl4965_hw_key {
5d08cd1d
CH		 461 enum ieee80211_key_alg alg;
462 int keylen;
463 u8 key[32];
464};
465
bb8c093b 466union iwl4965_ht_rate_supp {
5d08cd1d
CH		 467 u16 rates;
468 struct {
469 u8 siso_rate;
470 u8 mimo_rate;
471 };
472};
473
c8b0e6e1 474#ifdef CONFIG_IWL4965_HT
5d08cd1d
CH		 475#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
476#define HT_IE_MAX_AMSDU_SIZE_4K (0)
477#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
478#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
479
480struct sta_ht_info {
481 u8 is_ht;
482 u16 rx_mimo_ps_mode;
483 u16 tx_mimo_ps_mode;
484 u16 control_channel;
485 u8 max_amsdu_size;
486 u8 ampdu_factor;
487 u8 mpdu_density;
488 u8 operating_mode;
489 u8 supported_chan_width;
490 u8 extension_chan_offset;
491 u8 is_green_field;
492 u8 sgf;
493 u8 supp_rates[16];
494 u8 tx_chan_width;
495 u8 chan_width_cap;
496};
c8b0e6e1 497#endif /*CONFIG_IWL4965_HT */
5d08cd1d 498
c8b0e6e1 499#ifdef CONFIG_IWL4965_QOS
5d08cd1d 500
bb8c093b 501union iwl4965_qos_capabity {
5d08cd1d
CH		 502 struct {
503 u8 edca_count:4; /* bit 0-3 */
504 u8 q_ack:1; /* bit 4 */
505 u8 queue_request:1; /* bit 5 */
506 u8 txop_request:1; /* bit 6 */
507 u8 reserved:1; /* bit 7 */
508 } q_AP;
509 struct {
510 u8 acvo_APSD:1; /* bit 0 */
511 u8 acvi_APSD:1; /* bit 1 */
512 u8 ac_bk_APSD:1; /* bit 2 */
513 u8 ac_be_APSD:1; /* bit 3 */
514 u8 q_ack:1; /* bit 4 */
515 u8 max_len:2; /* bit 5-6 */
516 u8 more_data_ack:1; /* bit 7 */
517 } q_STA;
518 u8 val;
519};
520
521/* QoS structures */
bb8c093b 522struct iwl4965_qos_info {
5d08cd1d
CH		 523 int qos_enable;
524 int qos_active;
bb8c093b
CH		 525 union iwl4965_qos_capabity qos_cap;
526 struct iwl4965_qosparam_cmd def_qos_parm;
5d08cd1d 527};
c8b0e6e1 528#endif /*CONFIG_IWL4965_QOS */
5d08cd1d
CH		 529
530#define STA_PS_STATUS_WAKE 0
531#define STA_PS_STATUS_SLEEP 1
532
bb8c093b
CH		 533struct iwl4965_station_entry {
534 struct iwl4965_addsta_cmd sta;
535 struct iwl4965_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH		 536 u8 used;
537 u8 ps_status;
bb8c093b 538 struct iwl4965_hw_key keyinfo;
5d08cd1d
CH		 539};
540
541/* one for each uCode image (inst/data, boot/init/runtime) */
542struct fw_desc {
543 void *v_addr; /* access by driver */
544 dma_addr_t p_addr; /* access by card's busmaster DMA */
545 u32 len; /* bytes */
546};
547
548/* uCode file layout */
bb8c093b 549struct iwl4965_ucode {
5d08cd1d
CH		 550 __le32 ver; /* major/minor/subminor */
551 __le32 inst_size; /* bytes of runtime instructions */
552 __le32 data_size; /* bytes of runtime data */
553 __le32 init_size; /* bytes of initialization instructions */
554 __le32 init_data_size; /* bytes of initialization data */
555 __le32 boot_size; /* bytes of bootstrap instructions */
556 u8 data[0]; /* data in same order as "size" elements */
557};
558
559#define IWL_IBSS_MAC_HASH_SIZE 32
560
bb8c093b 561struct iwl4965_ibss_seq {
5d08cd1d
CH		 562 u8 mac[ETH_ALEN];
563 u16 seq_num;
564 u16 frag_num;
565 unsigned long packet_time;
566 struct list_head list;
567};
568
bb8c093b 569struct iwl4965_driver_hw_info {
5d08cd1d
CH		 570 u16 max_txq_num;
571 u16 ac_queue_count;
572 u16 tx_cmd_len;
573 u16 max_rxq_size;
574 u32 rx_buffer_size;
575 u16 max_rxq_log;
576 u8 max_stations;
577 u8 bcast_sta_id;
578 void *shared_virt;
579 dma_addr_t shared_phys;
580};
581
582
583#define STA_FLG_RTS_MIMO_PROT_MSK __constant_cpu_to_le32(1 << 17)
584#define STA_FLG_AGG_MPDU_8US_MSK __constant_cpu_to_le32(1 << 18)
585#define STA_FLG_MAX_AGG_SIZE_POS (19)
586#define STA_FLG_MAX_AGG_SIZE_MSK __constant_cpu_to_le32(3 << 19)
587#define STA_FLG_FAT_EN_MSK __constant_cpu_to_le32(1 << 21)
588#define STA_FLG_MIMO_DIS_MSK __constant_cpu_to_le32(1 << 22)
589#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
590#define STA_FLG_AGG_MPDU_DENSITY_MSK __constant_cpu_to_le32(7 << 23)
591#define HT_SHORT_GI_20MHZ_ONLY (1 << 0)
592#define HT_SHORT_GI_40MHZ_ONLY (1 << 1)
593
594
bb8c093b 595#define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\
5d08cd1d
CH		 596 x->u.rx_frame.stats.payload + \
597 x->u.rx_frame.stats.phy_count))
bb8c093b 598#define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\
5d08cd1d
CH		 599 IWL_RX_HDR(x)->payload + \
600 le16_to_cpu(IWL_RX_HDR(x)->len)))
601#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
602#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
603
604
605/******************************************************************************
606 *
607 * Functions implemented in iwl-base.c which are forward declared here
608 * for use by iwl-*.c
609 *
610 *****************************************************************************/
bb8c093b
CH		 611struct iwl4965_addsta_cmd;
612extern int iwl4965_send_add_station(struct iwl4965_priv *priv,
613 struct iwl4965_addsta_cmd *sta, u8 flags);
614extern u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *bssid,
5d08cd1d 615 int is_ap, u8 flags);
bb8c093b 616extern int iwl4965_is_network_packet(struct iwl4965_priv *priv,
5d08cd1d 617 struct ieee80211_hdr *header);
bb8c093b
CH		 618extern int iwl4965_power_init_handle(struct iwl4965_priv *priv);
619extern int iwl4965_eeprom_init(struct iwl4965_priv *priv);
c8b0e6e1 620#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 621extern void iwl4965_report_frame(struct iwl4965_priv *priv,
622 struct iwl4965_rx_packet *pkt,
5d08cd1d
CH		 623 struct ieee80211_hdr *header, int group100);
624#else
bb8c093b
CH		 625static inline void iwl4965_report_frame(struct iwl4965_priv *priv,
626 struct iwl4965_rx_packet *pkt,
5d08cd1d
CH		 627 struct ieee80211_hdr *header,
628 int group100) {}
629#endif
bb8c093b
CH		 630extern void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
631 struct iwl4965_rx_mem_buffer *rxb,
5d08cd1d
CH		 632 void *data, short len,
633 struct ieee80211_rx_status *stats,
634 u16 phy_flags);
bb8c093b
CH		 635extern int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv,
636 struct ieee80211_hdr *header);
637extern int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv);
638extern void iwl4965_rx_queue_reset(struct iwl4965_priv *priv,
639 struct iwl4965_rx_queue *rxq);
640extern int iwl4965_calc_db_from_ratio(int sig_ratio);
641extern int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm);
642extern int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
643 struct iwl4965_tx_queue *txq, int count, u32 id);
644extern void iwl4965_rx_replenish(void *data);
645extern void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq);
646extern int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len,
5d08cd1d 647 const void *data);
bb8c093b
CH		 648extern int __must_check iwl4965_send_cmd(struct iwl4965_priv *priv,
649 struct iwl4965_host_cmd *cmd);
650extern unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
5d08cd1d
CH		 651 struct ieee80211_hdr *hdr,
652 const u8 *dest, int left);
bb8c093b
CH		 653extern int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv,
654 struct iwl4965_rx_queue *q);
655extern int iwl4965_send_statistics_request(struct iwl4965_priv *priv);
656extern void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
5d08cd1d
CH		 657 u32 decrypt_res,
658 struct ieee80211_rx_status *stats);
659extern __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr);
660
bb8c093b 661extern const u8 iwl4965_broadcast_addr[ETH_ALEN];
5d08cd1d
CH		 662
663/*
664 * Currently used by iwl-3945-rs... look at restructuring so that it doesn't
665 * call this... todo... fix that.
666*/
bb8c093b 667extern u8 iwl4965_sync_station(struct iwl4965_priv *priv, int sta_id,
5d08cd1d
CH		 668 u16 tx_rate, u8 flags);
669
670/******************************************************************************
671 *
672 * Functions implemented in iwl-[34]*.c which are forward declared here
673 * for use by iwl-base.c
674 *
675 * NOTE: The implementation of these functions are hardware specific
676 * which is why they are in the hardware specific files (vs. iwl-base.c)
677 *
678 * Naming convention --
bb8c093b
CH		 679 * iwl4965_ <-- Its part of iwlwifi (should be changed to iwl4965_)
680 * iwl4965_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
5d08cd1d 681 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH		 682 * iwl4965_bg_ <-- Called from work queue context
683 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH		 684 *
685 ****************************************************************************/
bb8c093b
CH		 686extern void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv);
687extern void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv);
688extern void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv);
689extern int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv);
690extern int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv);
691extern int iwl4965_hw_nic_init(struct iwl4965_priv *priv);
692extern int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv);
693extern void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv);
694extern void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv);
695extern int iwl4965_hw_nic_reset(struct iwl4965_priv *priv);
696extern int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *tfd,
5d08cd1d 697 dma_addr_t addr, u16 len);
bb8c093b
CH		 698extern int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq);
699extern int iwl4965_hw_get_temperature(struct iwl4965_priv *priv);
700extern int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv,
701 struct iwl4965_tx_queue *txq);
702extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
703 struct iwl4965_frame *frame, u8 rate);
704extern int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv);
705extern void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
706 struct iwl4965_cmd *cmd,
5d08cd1d
CH		 707 struct ieee80211_tx_control *ctrl,
708 struct ieee80211_hdr *hdr,
709 int sta_id, int tx_id);
bb8c093b
CH		 710extern int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv);
711extern int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power);
712extern void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv,
713 struct iwl4965_rx_mem_buffer *rxb);
714extern void iwl4965_disable_events(struct iwl4965_priv *priv);
715extern int iwl4965_get_temperature(const struct iwl4965_priv *priv);
5d08cd1d
CH		 716
717/**
bb8c093b 718 * iwl4965_hw_find_station - Find station id for a given BSSID
5d08cd1d
CH		 719 * @bssid: MAC address of station ID to find
720 *
721 * NOTE: This should not be hardware specific but the code has
722 * not yet been merged into a single common layer for managing the
723 * station tables.
724 */
bb8c093b 725extern u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *bssid);
5d08cd1d 726
bb8c093b
CH		 727extern int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel);
728extern int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index);
5d08cd1d 729
bb8c093b 730struct iwl4965_priv;
b481de9c
ZY		 731struct sta_ht_info;
732
733/*
734 * Forward declare iwl-4965.c functions for iwl-base.c
735 */
bb8c093b
CH		 736extern int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv);
737extern void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv);
b481de9c 738
bb8c093b
CH		 739extern int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
740 struct iwl4965_tx_queue *txq,
b481de9c 741 u16 byte_cnt);
bb8c093b 742extern void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr,
b481de9c 743 int is_ap);
bb8c093b 744extern void iwl4965_set_rxon_ht(struct iwl4965_priv *priv,
b481de9c
ZY		 745 struct sta_ht_info *ht_info);
746
bb8c093b
CH		 747extern void iwl4965_set_rxon_chain(struct iwl4965_priv *priv);
748extern int iwl4965_tx_cmd(struct iwl4965_priv *priv, struct iwl4965_cmd *out_cmd,
b481de9c
ZY		 749 u8 sta_id, dma_addr_t txcmd_phys,
750 struct ieee80211_hdr *hdr, u8 hdr_len,
751 struct ieee80211_tx_control *ctrl, void *sta_in);
bb8c093b
CH		 752extern int iwl4965_alive_notify(struct iwl4965_priv *priv);
753extern void iwl4965_update_rate_scaling(struct iwl4965_priv *priv, u8 mode);
754extern void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index);
755
756extern void iwl4965_chain_noise_reset(struct iwl4965_priv *priv);
757extern void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags,
b481de9c 758 u8 force);
bb8c093b 759extern int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode,
b481de9c 760 u16 channel,
bb8c093b 761 const struct iwl4965_eeprom_channel *eeprom_ch,
b481de9c 762 u8 fat_extension_channel);
bb8c093b 763extern void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv);
b481de9c 764
c8b0e6e1
CH		 765#ifdef CONFIG_IWL4965_HT
766#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 767extern int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da,
b481de9c 768 u16 tid, u16 *start_seq_num);
bb8c093b 769extern int iwl4965_mac_ht_rx_agg_start(struct ieee80211_hw *hw, u8 *da,
b481de9c 770 u16 tid, u16 start_seq_num);
bb8c093b 771extern int iwl4965_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da,
b481de9c 772 u16 tid, int generator);
bb8c093b 773extern int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da,
b481de9c 774 u16 tid, int generator);
bb8c093b 775extern void iwl4965_turn_off_agg(struct iwl4965_priv *priv, u8 tid);
c8b0e6e1
CH		 776#endif /* CONFIG_IWL4965_HT_AGG */
777#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 778/* Structures, enum, and defines specific to the 4965 */
779
780#define IWL4965_KW_SIZE 0x1000 /*4k */
781
bb8c093b 782struct iwl4965_kw {
b481de9c
ZY		 783 dma_addr_t dma_addr;
784 void *v_addr;
785 size_t size;
786};
787
788#define TID_QUEUE_CELL_SPACING 50 /*mS */
789#define TID_QUEUE_MAX_SIZE 20
790#define TID_ROUND_VALUE 5 /* mS */
791#define TID_MAX_LOAD_COUNT 8
792
793#define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
794#define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
795
796#define TID_ALL_ENABLED 0x7f
797#define TID_ALL_SPECIFIED 0xff
798#define TID_AGG_TPT_THREHOLD 0x0
799
800#define IWL_CHANNEL_WIDTH_20MHZ 0
801#define IWL_CHANNEL_WIDTH_40MHZ 1
802
803#define IWL_MIMO_PS_STATIC 0
804#define IWL_MIMO_PS_NONE 3
805#define IWL_MIMO_PS_DYNAMIC 1
806#define IWL_MIMO_PS_INVALID 2
807
808#define IWL_OPERATION_MODE_AUTO 0
809#define IWL_OPERATION_MODE_HT_ONLY 1
810#define IWL_OPERATION_MODE_MIXED 2
811#define IWL_OPERATION_MODE_20MHZ 3
812
813#define IWL_EXT_CHANNEL_OFFSET_AUTO 0
814#define IWL_EXT_CHANNEL_OFFSET_ABOVE 1
815#define IWL_EXT_CHANNEL_OFFSET_ 2
816#define IWL_EXT_CHANNEL_OFFSET_BELOW 3
817#define IWL_EXT_CHANNEL_OFFSET_MAX 4
818
819#define NRG_NUM_PREV_STAT_L 20
820#define NUM_RX_CHAINS (3)
821
822#define TX_POWER_IWL_ILLEGAL_VDET -100000
823#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
824#define TX_POWER_IWL_CLOSED_LOOP_MIN_POWER 18
825#define TX_POWER_IWL_CLOSED_LOOP_MAX_POWER 34
826#define TX_POWER_IWL_VDET_SLOPE_BELOW_NOMINAL 17
827#define TX_POWER_IWL_VDET_SLOPE_ABOVE_NOMINAL 20
828#define TX_POWER_IWL_NOMINAL_POWER 26
829#define TX_POWER_IWL_CLOSED_LOOP_ITERATION_LIMIT 1
830#define TX_POWER_IWL_VOLTAGE_CODES_PER_03V 7
831#define TX_POWER_IWL_DEGREES_PER_VDET_CODE 11
832#define IWL_TX_POWER_MAX_NUM_PA_MEASUREMENTS 1
833#define IWL_TX_POWER_CCK_COMPENSATION_B_STEP (9)
834#define IWL_TX_POWER_CCK_COMPENSATION_C_STEP (5)
835
bb8c093b 836struct iwl4965_traffic_load {
b481de9c
ZY		 837 unsigned long time_stamp;
838 u32 packet_count[TID_QUEUE_MAX_SIZE];
839 u8 queue_count;
840 u8 head;
841 u32 total;
842};
843
c8b0e6e1 844#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 845struct iwl4965_agg_control {
b481de9c
ZY		 846 unsigned long next_retry;
847 u32 wait_for_agg_status;
848 u32 tid_retry;
849 u32 requested_ba;
850 u32 granted_ba;
851 u8 auto_agg;
852 u32 tid_traffic_load_threshold;
853 u32 ba_timeout;
bb8c093b 854 struct iwl4965_traffic_load traffic_load[TID_MAX_LOAD_COUNT];
b481de9c 855};
c8b0e6e1 856#endif /*CONFIG_IWL4965_HT_AGG */
b481de9c 857
bb8c093b 858struct iwl4965_lq_mngr {
c8b0e6e1 859#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b 860 struct iwl4965_agg_control agg_ctrl;
b481de9c
ZY		 861#endif
862 spinlock_t lock;
863 s32 max_window_size;
864 s32 *expected_tpt;
865 u8 *next_higher_rate;
866 u8 *next_lower_rate;
867 unsigned long stamp;
868 unsigned long stamp_last;
869 u32 flush_time;
870 u32 tx_packets;
871 u8 lq_ready;
872};
873
874
875/* Sensitivity and chain noise calibration */
876#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
877#define INITIALIZATION_VALUE 0xFFFF
878#define CAL_NUM_OF_BEACONS 20
879#define MAXIMUM_ALLOWED_PATHLOSS 15
880
881/* Param table within SENSITIVITY_CMD */
882#define HD_MIN_ENERGY_CCK_DET_INDEX (0)
883#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
884#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
885#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
886#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
887#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
888#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
889#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
890#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
891#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
892#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
893
894#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE __constant_cpu_to_le16(0)
895#define SENSITIVITY_CMD_CONTROL_WORK_TABLE __constant_cpu_to_le16(1)
896
897#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
898
899#define MAX_FA_OFDM 50
900#define MIN_FA_OFDM 5
901#define MAX_FA_CCK 50
902#define MIN_FA_CCK 5
903
904#define NRG_MIN_CCK 97
905#define NRG_MAX_CCK 0
906
907#define AUTO_CORR_MIN_OFDM 85
908#define AUTO_CORR_MIN_OFDM_MRC 170
909#define AUTO_CORR_MIN_OFDM_X1 105
910#define AUTO_CORR_MIN_OFDM_MRC_X1 220
911#define AUTO_CORR_MAX_OFDM 120
912#define AUTO_CORR_MAX_OFDM_MRC 210
913#define AUTO_CORR_MAX_OFDM_X1 140
914#define AUTO_CORR_MAX_OFDM_MRC_X1 270
915#define AUTO_CORR_STEP_OFDM 1
916
917#define AUTO_CORR_MIN_CCK (125)
918#define AUTO_CORR_MAX_CCK (200)
919#define AUTO_CORR_MIN_CCK_MRC 200
920#define AUTO_CORR_MAX_CCK_MRC 400
921#define AUTO_CORR_STEP_CCK 3
922#define AUTO_CORR_MAX_TH_CCK 160
923
924#define NRG_ALG 0
925#define AUTO_CORR_ALG 1
926#define NRG_DIFF 2
927#define NRG_STEP_CCK 2
928#define NRG_MARGIN 8
929#define MAX_NUMBER_CCK_NO_FA 100
930
931#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
932
933#define CHAIN_A 0
934#define CHAIN_B 1
935#define CHAIN_C 2
936#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
937#define ALL_BAND_FILTER 0xFF00
938#define IN_BAND_FILTER 0xFF
939#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
940
bb8c093b 941enum iwl4965_false_alarm_state {
b481de9c
ZY		 942 IWL_FA_TOO_MANY = 0,
943 IWL_FA_TOO_FEW = 1,
944 IWL_FA_GOOD_RANGE = 2,
945};
946
bb8c093b 947enum iwl4965_chain_noise_state {
b481de9c
ZY		 948 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
949 IWL_CHAIN_NOISE_ACCUMULATE = 1,
950 IWL_CHAIN_NOISE_CALIBRATED = 2,
951};
952
bb8c093b 953enum iwl4965_sensitivity_state {
b481de9c
ZY		 954 IWL_SENS_CALIB_ALLOWED = 0,
955 IWL_SENS_CALIB_NEED_REINIT = 1,
956};
957
bb8c093b 958enum iwl4965_calib_enabled_state {
b481de9c
ZY		 959 IWL_CALIB_DISABLED = 0, /* must be 0 */
960 IWL_CALIB_ENABLED = 1,
961};
962
963struct statistics_general_data {
964 u32 beacon_silence_rssi_a;
965 u32 beacon_silence_rssi_b;
966 u32 beacon_silence_rssi_c;
967 u32 beacon_energy_a;
968 u32 beacon_energy_b;
969 u32 beacon_energy_c;
970};
971
972/* Sensitivity calib data */
bb8c093b 973struct iwl4965_sensitivity_data {
b481de9c
ZY		 974 u32 auto_corr_ofdm;
975 u32 auto_corr_ofdm_mrc;
976 u32 auto_corr_ofdm_x1;
977 u32 auto_corr_ofdm_mrc_x1;
978 u32 auto_corr_cck;
979 u32 auto_corr_cck_mrc;
980
981 u32 last_bad_plcp_cnt_ofdm;
982 u32 last_fa_cnt_ofdm;
983 u32 last_bad_plcp_cnt_cck;
984 u32 last_fa_cnt_cck;
985
986 u32 nrg_curr_state;
987 u32 nrg_prev_state;
988 u32 nrg_value[10];
989 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
990 u32 nrg_silence_ref;
991 u32 nrg_energy_idx;
992 u32 nrg_silence_idx;
993 u32 nrg_th_cck;
994 s32 nrg_auto_corr_silence_diff;
995 u32 num_in_cck_no_fa;
996 u32 nrg_th_ofdm;
997
998 u8 state;
999};
1000
1001/* Chain noise (differential Rx gain) calib data */
bb8c093b 1002struct iwl4965_chain_noise_data {
b481de9c
ZY		 1003 u8 state;
1004 u16 beacon_count;
1005 u32 chain_noise_a;
1006 u32 chain_noise_b;
1007 u32 chain_noise_c;
1008 u32 chain_signal_a;
1009 u32 chain_signal_b;
1010 u32 chain_signal_c;
1011 u8 disconn_array[NUM_RX_CHAINS];
1012 u8 delta_gain_code[NUM_RX_CHAINS];
1013 u8 radio_write;
1014};
1015
1016/* IWL4965 */
1017#define RATE_MCS_CODE_MSK 0x7
1018#define RATE_MCS_MIMO_POS 3
1019#define RATE_MCS_MIMO_MSK 0x8
1020#define RATE_MCS_HT_DUP_POS 5
1021#define RATE_MCS_HT_DUP_MSK 0x20
1022#define RATE_MCS_FLAGS_POS 8
1023#define RATE_MCS_HT_POS 8
1024#define RATE_MCS_HT_MSK 0x100
1025#define RATE_MCS_CCK_POS 9
1026#define RATE_MCS_CCK_MSK 0x200
1027#define RATE_MCS_GF_POS 10
1028#define RATE_MCS_GF_MSK 0x400
1029
1030#define RATE_MCS_FAT_POS 11
1031#define RATE_MCS_FAT_MSK 0x800
1032#define RATE_MCS_DUP_POS 12
1033#define RATE_MCS_DUP_MSK 0x1000
1034#define RATE_MCS_SGI_POS 13
1035#define RATE_MCS_SGI_MSK 0x2000
1036
1037#define EEPROM_SEM_TIMEOUT 10
1038#define EEPROM_SEM_RETRY_LIMIT 1000
1039
5d08cd1d 1040
c8b0e6e1 1041#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
5d08cd1d
CH		 1042
1043enum {
1044 MEASUREMENT_READY = (1 << 0),
1045 MEASUREMENT_ACTIVE = (1 << 1),
1046};
1047
1048#endif
1049
bb8c093b 1050struct iwl4965_priv {
5d08cd1d
CH		 1051
1052 /* ieee device used by generic ieee processing code */
1053 struct ieee80211_hw *hw;
1054 struct ieee80211_channel *ieee_channels;
1055 struct ieee80211_rate *ieee_rates;
1056
1057 /* temporary frame storage list */
1058 struct list_head free_frames;
1059 int frames_count;
1060
1061 u8 phymode;
1062 int alloc_rxb_skb;
1063
bb8c093b
CH		 1064 void (*rx_handlers[REPLY_MAX])(struct iwl4965_priv *priv,
1065 struct iwl4965_rx_mem_buffer *rxb);
5d08cd1d
CH		 1066
1067 const struct ieee80211_hw_mode *modes;
1068
c8b0e6e1 1069#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
5d08cd1d 1070 /* spectrum measurement report caching */
bb8c093b 1071 struct iwl4965_spectrum_notification measure_report;
5d08cd1d
CH		 1072 u8 measurement_status;
1073#endif
1074 /* ucode beacon time */
1075 u32 ucode_beacon_time;
1076
bb8c093b 1077 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 1078 * Access via channel # using indirect index array */
bb8c093b 1079 struct iwl4965_channel_info *channel_info; /* channel info array */
5d08cd1d
CH		 1080 u8 channel_count; /* # of channels */
1081
1082 /* each calibration channel group in the EEPROM has a derived
1083 * clip setting for each rate. */
bb8c093b 1084 const struct iwl4965_clip_group clip_groups[5];
5d08cd1d
CH		 1085
1086 /* thermal calibration */
1087 s32 temperature; /* degrees Kelvin */
1088 s32 last_temperature;
1089
1090 /* Scan related variables */
1091 unsigned long last_scan_jiffies;
1092 unsigned long scan_start;
1093 unsigned long scan_pass_start;
1094 unsigned long scan_start_tsf;
1095 int scan_bands;
1096 int one_direct_scan;
1097 u8 direct_ssid_len;
1098 u8 direct_ssid[IW_ESSID_MAX_SIZE];
bb8c093b 1099 struct iwl4965_scan_cmd *scan;
5d08cd1d
CH		 1100 u8 only_active_channel;
1101
1102 /* spinlock */
1103 spinlock_t lock; /* protect general shared data */
1104 spinlock_t hcmd_lock; /* protect hcmd */
1105 struct mutex mutex;
1106
1107 /* basic pci-network driver stuff */
1108 struct pci_dev *pci_dev;
1109
1110 /* pci hardware address support */
1111 void __iomem *hw_base;
1112
1113 /* uCode images, save to reload in case of failure */
1114 struct fw_desc ucode_code; /* runtime inst */
1115 struct fw_desc ucode_data; /* runtime data original */
1116 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1117 struct fw_desc ucode_init; /* initialization inst */
1118 struct fw_desc ucode_init_data; /* initialization data */
1119 struct fw_desc ucode_boot; /* bootstrap inst */
1120
1121
bb8c093b 1122 struct iwl4965_rxon_time_cmd rxon_timing;
5d08cd1d
CH		 1123
1124 /* We declare this const so it can only be
1125 * changed via explicit cast within the
1126 * routines that actually update the physical
1127 * hardware */
bb8c093b
CH		 1128 const struct iwl4965_rxon_cmd active_rxon;
1129 struct iwl4965_rxon_cmd staging_rxon;
5d08cd1d
CH		 1130
1131 int error_recovering;
bb8c093b 1132 struct iwl4965_rxon_cmd recovery_rxon;
5d08cd1d
CH		 1133
1134 /* 1st responses from initialize and runtime uCode images.
1135 * 4965's initialize alive response contains some calibration data. */
bb8c093b
CH		 1136 struct iwl4965_init_alive_resp card_alive_init;
1137 struct iwl4965_alive_resp card_alive;
5d08cd1d
CH		 1138
1139#ifdef LED
1140 /* LED related variables */
bb8c093b 1141 struct iwl4965_activity_blink activity;
5d08cd1d
CH		 1142 unsigned long led_packets;
1143 int led_state;
1144#endif
1145
1146 u16 active_rate;
1147 u16 active_rate_basic;
1148
1149 u8 call_post_assoc_from_beacon;
1150 u8 assoc_station_added;
1151 u8 use_ant_b_for_management_frame; /* Tx antenna selection */
1152 /* HT variables */
1153 u8 is_dup;
1154 u8 is_ht_enabled;
1155 u8 channel_width; /* 0=20MHZ, 1=40MHZ */
1156 u8 current_channel_width;
1157 u8 valid_antenna; /* Bit mask of antennas actually connected */
c8b0e6e1 1158#ifdef CONFIG_IWL4965_SENSITIVITY
bb8c093b
CH		 1159 struct iwl4965_sensitivity_data sensitivity_data;
1160 struct iwl4965_chain_noise_data chain_noise_data;
5d08cd1d
CH		 1161 u8 start_calib;
1162 __le16 sensitivity_tbl[HD_TABLE_SIZE];
c8b0e6e1 1163#endif /*CONFIG_IWL4965_SENSITIVITY*/
5d08cd1d 1164
c8b0e6e1 1165#ifdef CONFIG_IWL4965_HT
5d08cd1d
CH		 1166 struct sta_ht_info current_assoc_ht;
1167#endif
1168 u8 active_rate_ht[2];
1169 u8 last_phy_res[100];
1170
1171 /* Rate scaling data */
bb8c093b 1172 struct iwl4965_lq_mngr lq_mngr;
5d08cd1d
CH		 1173
1174 /* Rate scaling data */
1175 s8 data_retry_limit;
1176 u8 retry_rate;
1177
1178 wait_queue_head_t wait_command_queue;
1179
1180 int activity_timer_active;
1181
1182 /* Rx and Tx DMA processing queues */
bb8c093b
CH		 1183 struct iwl4965_rx_queue rxq;
1184 struct iwl4965_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 1185 unsigned long txq_ctx_active_msk;
bb8c093b 1186 struct iwl4965_kw kw; /* keep warm address */
5d08cd1d
CH		 1187 u32 scd_base_addr; /* scheduler sram base address */
1188
1189 unsigned long status;
1190 u32 config;
1191
1192 int last_rx_rssi; /* From Rx packet statisitics */
1193 int last_rx_noise; /* From beacon statistics */
1194
bb8c093b 1195 struct iwl4965_power_mgr power_data;
5d08cd1d 1196
bb8c093b 1197 struct iwl4965_notif_statistics statistics;
5d08cd1d
CH		 1198 unsigned long last_statistics_time;
1199
1200 /* context information */
1201 u8 essid[IW_ESSID_MAX_SIZE];
1202 u8 essid_len;
1203 u16 rates_mask;
1204
1205 u32 power_mode;
1206 u32 antenna;
1207 u8 bssid[ETH_ALEN];
1208 u16 rts_threshold;
1209 u8 mac_addr[ETH_ALEN];
1210
1211 /*station table variables */
1212 spinlock_t sta_lock;
1213 int num_stations;
bb8c093b 1214 struct iwl4965_station_entry stations[IWL_STATION_COUNT];
5d08cd1d
CH		 1215
1216 /* Indication if ieee80211_ops->open has been called */
1217 int is_open;
1218
1219 u8 mac80211_registered;
1220 int is_abg;
1221
1222 u32 notif_missed_beacons;
1223
1224 /* Rx'd packet timing information */
1225 u32 last_beacon_time;
1226 u64 last_tsf;
1227
1228 /* Duplicate packet detection */
1229 u16 last_seq_num;
1230 u16 last_frag_num;
1231 unsigned long last_packet_time;
1232 struct list_head ibss_mac_hash[IWL_IBSS_MAC_HASH_SIZE];
1233
1234 /* eeprom */
bb8c093b 1235 struct iwl4965_eeprom eeprom;
5d08cd1d
CH		 1236
1237 int iw_mode;
1238
1239 struct sk_buff *ibss_beacon;
1240
1241 /* Last Rx'd beacon timestamp */
1242 u32 timestamp0;
1243 u32 timestamp1;
1244 u16 beacon_int;
bb8c093b 1245 struct iwl4965_driver_hw_info hw_setting;
5d08cd1d
CH		 1246 int interface_id;
1247
1248 /* Current association information needed to configure the
1249 * hardware */
1250 u16 assoc_id;
1251 u16 assoc_capability;
1252 u8 ps_mode;
1253
c8b0e6e1 1254#ifdef CONFIG_IWL4965_QOS
bb8c093b 1255 struct iwl4965_qos_info qos_data;
c8b0e6e1 1256#endif /*CONFIG_IWL4965_QOS */
5d08cd1d
CH		 1257
1258 struct workqueue_struct *workqueue;
1259
1260 struct work_struct up;
1261 struct work_struct restart;
1262 struct work_struct calibrated_work;
1263 struct work_struct scan_completed;
1264 struct work_struct rx_replenish;
1265 struct work_struct rf_kill;
1266 struct work_struct abort_scan;
1267 struct work_struct update_link_led;
1268 struct work_struct auth_work;
1269 struct work_struct report_work;
1270 struct work_struct request_scan;
1271 struct work_struct beacon_update;
1272
1273 struct tasklet_struct irq_tasklet;
1274
1275 struct delayed_work init_alive_start;
1276 struct delayed_work alive_start;
1277 struct delayed_work activity_timer;
1278 struct delayed_work thermal_periodic;
1279 struct delayed_work gather_stats;
1280 struct delayed_work scan_check;
1281 struct delayed_work post_associate;
1282
1283#define IWL_DEFAULT_TX_POWER 0x0F
1284 s8 user_txpower_limit;
1285 s8 max_channel_txpower_limit;
1286
1287#ifdef CONFIG_PM
1288 u32 pm_state[16];
1289#endif
1290
c8b0e6e1 1291#ifdef CONFIG_IWL4965_DEBUG
5d08cd1d
CH		 1292 /* debugging info */
1293 u32 framecnt_to_us;
1294 atomic_t restrict_refcnt;
1295#endif
1296
1297 struct work_struct txpower_work;
c8b0e6e1 1298#ifdef CONFIG_IWL4965_SENSITIVITY
5d08cd1d
CH		 1299 struct work_struct sensitivity_work;
1300#endif
1301 struct work_struct statistics_work;
1302 struct timer_list statistics_periodic;
1303
c8b0e6e1 1304#ifdef CONFIG_IWL4965_HT_AGG
5d08cd1d
CH		 1305 struct work_struct agg_work;
1306#endif
bb8c093b 1307}; /*iwl4965_priv */
5d08cd1d 1308
bb8c093b 1309static inline int iwl4965_is_associated(struct iwl4965_priv *priv)
5d08cd1d
CH		 1310{
1311 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1312}
1313
bb8c093b 1314static inline int is_channel_valid(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1315{
1316 if (ch_info == NULL)
1317 return 0;
1318 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1319}
1320
bb8c093b 1321static inline int is_channel_narrow(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1322{
1323 return (ch_info->flags & EEPROM_CHANNEL_NARROW) ? 1 : 0;
1324}
1325
bb8c093b 1326static inline int is_channel_radar(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1327{
1328 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1329}
1330
bb8c093b 1331static inline u8 is_channel_a_band(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1332{
1333 return ch_info->phymode == MODE_IEEE80211A;
1334}
1335
bb8c093b 1336static inline u8 is_channel_bg_band(const struct iwl4965_channel_info *ch_info)
5d08cd1d
CH		 1337{
1338 return ((ch_info->phymode == MODE_IEEE80211B) ||
1339 (ch_info->phymode == MODE_IEEE80211G));
1340}
1341
bb8c093b 1342static inline int is_channel_passive(const struct iwl4965_channel_info *ch)
5d08cd1d
CH		 1343{
1344 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1345}
1346
bb8c093b 1347static inline int is_channel_ibss(const struct iwl4965_channel_info *ch)
5d08cd1d
CH		 1348{
1349 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1350}
1351
bb8c093b
CH		 1352extern const struct iwl4965_channel_info *iwl4965_get_channel_info(
1353 const struct iwl4965_priv *priv, int phymode, u16 channel);
5d08cd1d 1354
bb8c093b 1355/* Requires full declaration of iwl4965_priv before including */
5d08cd1d
CH		 1356#include "iwl-4965-io.h"
1357
bb8c093b 1358#endif /* __iwl4965_4965_h__ */
Linux kernel - Deliverables
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