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5a6a256e TW |
1 | /****************************************************************************** |
2 | * | |
1f447808 | 3 | * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved. |
5a6a256e TW |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
23 | * | |
24 | *****************************************************************************/ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
5a6a256e TW |
28 | #include <linux/init.h> |
29 | #include <linux/pci.h> | |
30 | #include <linux/dma-mapping.h> | |
31 | #include <linux/delay.h> | |
d43c36dc | 32 | #include <linux/sched.h> |
5a6a256e TW |
33 | #include <linux/skbuff.h> |
34 | #include <linux/netdevice.h> | |
35 | #include <linux/wireless.h> | |
36 | #include <net/mac80211.h> | |
37 | #include <linux/etherdevice.h> | |
38 | #include <asm/unaligned.h> | |
39 | ||
40 | #include "iwl-eeprom.h" | |
3e0d4cb1 | 41 | #include "iwl-dev.h" |
5a6a256e TW |
42 | #include "iwl-core.h" |
43 | #include "iwl-io.h" | |
e26e47d9 | 44 | #include "iwl-sta.h" |
5a6a256e | 45 | #include "iwl-helpers.h" |
a1175124 | 46 | #include "iwl-agn.h" |
e932a609 | 47 | #include "iwl-agn-led.h" |
19e6cda0 | 48 | #include "iwl-agn-hw.h" |
5a6a256e TW |
49 | #include "iwl-5000-hw.h" |
50 | ||
a0987a8d | 51 | /* Highest firmware API version supported */ |
c9d2fbf3 | 52 | #define IWL5000_UCODE_API_MAX 2 |
39e6d225 | 53 | #define IWL5150_UCODE_API_MAX 2 |
5a6a256e | 54 | |
a0987a8d RC |
55 | /* Lowest firmware API version supported */ |
56 | #define IWL5000_UCODE_API_MIN 1 | |
57 | #define IWL5150_UCODE_API_MIN 1 | |
58 | ||
59 | #define IWL5000_FW_PRE "iwlwifi-5000-" | |
60 | #define _IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE #api ".ucode" | |
61 | #define IWL5000_MODULE_FIRMWARE(api) _IWL5000_MODULE_FIRMWARE(api) | |
62 | ||
63 | #define IWL5150_FW_PRE "iwlwifi-5150-" | |
64 | #define _IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE #api ".ucode" | |
65 | #define IWL5150_MODULE_FIRMWARE(api) _IWL5150_MODULE_FIRMWARE(api) | |
4e062f99 | 66 | |
9371d4ed | 67 | /* NIC configuration for 5000 series */ |
672639de | 68 | void iwl5000_nic_config(struct iwl_priv *priv) |
e86fe9f6 TW |
69 | { |
70 | unsigned long flags; | |
71 | u16 radio_cfg; | |
e86fe9f6 TW |
72 | |
73 | spin_lock_irqsave(&priv->lock, flags); | |
74 | ||
e86fe9f6 TW |
75 | radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG); |
76 | ||
77 | /* write radio config values to register */ | |
9371d4ed | 78 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) < EEPROM_RF_CONFIG_TYPE_MAX) |
e86fe9f6 TW |
79 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
80 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | | |
81 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | | |
82 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); | |
83 | ||
84 | /* set CSR_HW_CONFIG_REG for uCode use */ | |
85 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, | |
86 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
87 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | |
88 | ||
4c43e0d0 TW |
89 | /* W/A : NIC is stuck in a reset state after Early PCIe power off |
90 | * (PCIe power is lost before PERST# is asserted), | |
91 | * causing ME FW to lose ownership and not being able to obtain it back. | |
92 | */ | |
2d3db679 | 93 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, |
4c43e0d0 TW |
94 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, |
95 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | |
96 | ||
02c06e4a | 97 | |
e86fe9f6 TW |
98 | spin_unlock_irqrestore(&priv->lock, flags); |
99 | } | |
100 | ||
33fd5033 EG |
101 | static struct iwl_sensitivity_ranges iwl5000_sensitivity = { |
102 | .min_nrg_cck = 95, | |
fe6efb4b | 103 | .max_nrg_cck = 0, /* not used, set to 0 */ |
33fd5033 EG |
104 | .auto_corr_min_ofdm = 90, |
105 | .auto_corr_min_ofdm_mrc = 170, | |
106 | .auto_corr_min_ofdm_x1 = 120, | |
107 | .auto_corr_min_ofdm_mrc_x1 = 240, | |
108 | ||
109 | .auto_corr_max_ofdm = 120, | |
110 | .auto_corr_max_ofdm_mrc = 210, | |
9bead763 WYG |
111 | .auto_corr_max_ofdm_x1 = 120, |
112 | .auto_corr_max_ofdm_mrc_x1 = 240, | |
33fd5033 EG |
113 | |
114 | .auto_corr_min_cck = 125, | |
115 | .auto_corr_max_cck = 200, | |
116 | .auto_corr_min_cck_mrc = 170, | |
117 | .auto_corr_max_cck_mrc = 400, | |
118 | .nrg_th_cck = 95, | |
119 | .nrg_th_ofdm = 95, | |
55036d66 WYG |
120 | |
121 | .barker_corr_th_min = 190, | |
122 | .barker_corr_th_min_mrc = 390, | |
123 | .nrg_th_cca = 62, | |
33fd5033 EG |
124 | }; |
125 | ||
9d67187d WYG |
126 | static struct iwl_sensitivity_ranges iwl5150_sensitivity = { |
127 | .min_nrg_cck = 95, | |
128 | .max_nrg_cck = 0, /* not used, set to 0 */ | |
129 | .auto_corr_min_ofdm = 90, | |
130 | .auto_corr_min_ofdm_mrc = 170, | |
131 | .auto_corr_min_ofdm_x1 = 105, | |
132 | .auto_corr_min_ofdm_mrc_x1 = 220, | |
133 | ||
134 | .auto_corr_max_ofdm = 120, | |
135 | .auto_corr_max_ofdm_mrc = 210, | |
136 | /* max = min for performance bug in 5150 DSP */ | |
137 | .auto_corr_max_ofdm_x1 = 105, | |
138 | .auto_corr_max_ofdm_mrc_x1 = 220, | |
139 | ||
140 | .auto_corr_min_cck = 125, | |
141 | .auto_corr_max_cck = 200, | |
142 | .auto_corr_min_cck_mrc = 170, | |
143 | .auto_corr_max_cck_mrc = 400, | |
144 | .nrg_th_cck = 95, | |
145 | .nrg_th_ofdm = 95, | |
55036d66 WYG |
146 | |
147 | .barker_corr_th_min = 190, | |
148 | .barker_corr_th_min_mrc = 390, | |
149 | .nrg_th_cca = 62, | |
9d67187d WYG |
150 | }; |
151 | ||
62161aef | 152 | static void iwl5150_set_ct_threshold(struct iwl_priv *priv) |
339afc89 | 153 | { |
62161aef | 154 | const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF; |
672639de | 155 | s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) - |
62161aef WYG |
156 | iwl_temp_calib_to_offset(priv); |
157 | ||
158 | priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef; | |
159 | } | |
160 | ||
161 | static void iwl5000_set_ct_threshold(struct iwl_priv *priv) | |
162 | { | |
163 | /* want Celsius */ | |
672639de | 164 | priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY; |
339afc89 TW |
165 | } |
166 | ||
672639de | 167 | int iwl5000_hw_set_hw_params(struct iwl_priv *priv) |
fdd3e8a4 | 168 | { |
88804e2b | 169 | if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES && |
19e6cda0 | 170 | priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES) |
88804e2b WYG |
171 | priv->cfg->num_of_queues = |
172 | priv->cfg->mod_params->num_of_queues; | |
25ae3986 | 173 | |
88804e2b | 174 | priv->hw_params.max_txq_num = priv->cfg->num_of_queues; |
f3f911d1 | 175 | priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM; |
4ddbb7d0 | 176 | priv->hw_params.scd_bc_tbls_size = |
88804e2b | 177 | priv->cfg->num_of_queues * |
19e6cda0 | 178 | sizeof(struct iwlagn_scd_bc_tbl); |
a8e74e27 | 179 | priv->hw_params.tfd_size = sizeof(struct iwl_tfd); |
fdd3e8a4 TW |
180 | priv->hw_params.max_stations = IWL5000_STATION_COUNT; |
181 | priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID; | |
c0bac76a | 182 | |
19e6cda0 WYG |
183 | priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE; |
184 | priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE; | |
c0bac76a | 185 | |
da154e30 | 186 | priv->hw_params.max_bsm_size = 0; |
7aafef1c | 187 | priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | |
fdd3e8a4 | 188 | BIT(IEEE80211_BAND_5GHZ); |
141c43a3 WT |
189 | priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; |
190 | ||
c0bac76a JS |
191 | priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant); |
192 | priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant); | |
193 | priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant; | |
194 | priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant; | |
c031bf80 | 195 | |
62161aef WYG |
196 | if (priv->cfg->ops->lib->temp_ops.set_ct_kill) |
197 | priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); | |
c031bf80 | 198 | |
9d67187d | 199 | /* Set initial sensitivity parameters */ |
be5d56ed TW |
200 | /* Set initial calibration set */ |
201 | switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { | |
c0bac76a | 202 | case CSR_HW_REV_TYPE_5150: |
9d67187d | 203 | priv->hw_params.sens = &iwl5150_sensitivity; |
be5d56ed | 204 | priv->hw_params.calib_init_cfg = |
c0bac76a | 205 | BIT(IWL_CALIB_DC) | |
f69f42a6 | 206 | BIT(IWL_CALIB_LO) | |
201706ac | 207 | BIT(IWL_CALIB_TX_IQ) | |
201706ac | 208 | BIT(IWL_CALIB_BASE_BAND); |
c0bac76a | 209 | |
be5d56ed | 210 | break; |
c0bac76a | 211 | default: |
9d67187d | 212 | priv->hw_params.sens = &iwl5000_sensitivity; |
819500c5 | 213 | priv->hw_params.calib_init_cfg = |
c0bac76a | 214 | BIT(IWL_CALIB_XTAL) | |
7470d7f5 WT |
215 | BIT(IWL_CALIB_LO) | |
216 | BIT(IWL_CALIB_TX_IQ) | | |
c0bac76a | 217 | BIT(IWL_CALIB_TX_IQ_PERD) | |
7470d7f5 | 218 | BIT(IWL_CALIB_BASE_BAND); |
be5d56ed TW |
219 | break; |
220 | } | |
221 | ||
fdd3e8a4 TW |
222 | return 0; |
223 | } | |
d4100dd9 | 224 | |
62161aef WYG |
225 | static void iwl5150_temperature(struct iwl_priv *priv) |
226 | { | |
227 | u32 vt = 0; | |
228 | s32 offset = iwl_temp_calib_to_offset(priv); | |
229 | ||
230 | vt = le32_to_cpu(priv->statistics.general.temperature); | |
231 | vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset; | |
232 | /* now vt hold the temperature in Kelvin */ | |
233 | priv->temperature = KELVIN_TO_CELSIUS(vt); | |
15993e08 | 234 | iwl_tt_handler(priv); |
62161aef WYG |
235 | } |
236 | ||
4a56e965 WYG |
237 | static int iwl5000_hw_channel_switch(struct iwl_priv *priv, u16 channel) |
238 | { | |
239 | struct iwl5000_channel_switch_cmd cmd; | |
240 | const struct iwl_channel_info *ch_info; | |
241 | struct iwl_host_cmd hcmd = { | |
242 | .id = REPLY_CHANNEL_SWITCH, | |
243 | .len = sizeof(cmd), | |
244 | .flags = CMD_SIZE_HUGE, | |
245 | .data = &cmd, | |
246 | }; | |
247 | ||
248 | IWL_DEBUG_11H(priv, "channel switch from %d to %d\n", | |
249 | priv->active_rxon.channel, channel); | |
250 | cmd.band = priv->band == IEEE80211_BAND_2GHZ; | |
251 | cmd.channel = cpu_to_le16(channel); | |
0924e519 WYG |
252 | cmd.rxon_flags = priv->staging_rxon.flags; |
253 | cmd.rxon_filter_flags = priv->staging_rxon.filter_flags; | |
4a56e965 WYG |
254 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); |
255 | ch_info = iwl_get_channel_info(priv, priv->band, channel); | |
256 | if (ch_info) | |
257 | cmd.expect_beacon = is_channel_radar(ch_info); | |
258 | else { | |
259 | IWL_ERR(priv, "invalid channel switch from %u to %u\n", | |
260 | priv->active_rxon.channel, channel); | |
261 | return -EFAULT; | |
262 | } | |
0924e519 WYG |
263 | priv->switch_rxon.channel = cpu_to_le16(channel); |
264 | priv->switch_rxon.switch_in_progress = true; | |
4a56e965 WYG |
265 | |
266 | return iwl_send_cmd_sync(priv, &hcmd); | |
267 | } | |
268 | ||
e8c00dcb | 269 | struct iwl_lib_ops iwl5000_lib = { |
fdd3e8a4 | 270 | .set_hw_params = iwl5000_hw_set_hw_params, |
b305a080 WYG |
271 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
272 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | |
273 | .txq_set_sched = iwlagn_txq_set_sched, | |
274 | .txq_agg_enable = iwlagn_txq_agg_enable, | |
275 | .txq_agg_disable = iwlagn_txq_agg_disable, | |
7aaa1d79 SO |
276 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
277 | .txq_free_tfd = iwl_hw_txq_free_tfd, | |
a8e74e27 | 278 | .txq_init = iwl_hw_tx_queue_init, |
e04ed0a5 WYG |
279 | .rx_handler_setup = iwlagn_rx_handler_setup, |
280 | .setup_deferred_work = iwlagn_setup_deferred_work, | |
281 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | |
b7a79404 RC |
282 | .dump_nic_event_log = iwl_dump_nic_event_log, |
283 | .dump_nic_error_log = iwl_dump_nic_error_log, | |
696bdee3 | 284 | .dump_csr = iwl_dump_csr, |
1b3eb823 | 285 | .dump_fh = iwl_dump_fh, |
81b8176e | 286 | .load_ucode = iwlagn_load_ucode, |
741a6266 WYG |
287 | .init_alive_start = iwlagn_init_alive_start, |
288 | .alive_notify = iwlagn_alive_notify, | |
e04ed0a5 | 289 | .send_tx_power = iwlagn_send_tx_power, |
5b9f8cd3 | 290 | .update_chain_flags = iwl_update_chain_flags, |
4a56e965 | 291 | .set_channel_switch = iwl5000_hw_channel_switch, |
30d59260 | 292 | .apm_ops = { |
fadb3582 | 293 | .init = iwl_apm_init, |
d68b603c | 294 | .stop = iwl_apm_stop, |
5a835353 | 295 | .config = iwl5000_nic_config, |
5b9f8cd3 | 296 | .set_pwr_src = iwl_set_pwr_src, |
30d59260 | 297 | }, |
da8dec29 | 298 | .eeprom_ops = { |
25ae3986 | 299 | .regulatory_bands = { |
e04ed0a5 WYG |
300 | EEPROM_REG_BAND_1_CHANNELS, |
301 | EEPROM_REG_BAND_2_CHANNELS, | |
302 | EEPROM_REG_BAND_3_CHANNELS, | |
303 | EEPROM_REG_BAND_4_CHANNELS, | |
304 | EEPROM_REG_BAND_5_CHANNELS, | |
305 | EEPROM_REG_BAND_24_HT40_CHANNELS, | |
306 | EEPROM_REG_BAND_52_HT40_CHANNELS | |
25ae3986 | 307 | }, |
da8dec29 TW |
308 | .verify_signature = iwlcore_eeprom_verify_signature, |
309 | .acquire_semaphore = iwlcore_eeprom_acquire_semaphore, | |
310 | .release_semaphore = iwlcore_eeprom_release_semaphore, | |
e04ed0a5 WYG |
311 | .calib_version = iwlagn_eeprom_calib_version, |
312 | .query_addr = iwlagn_eeprom_query_addr, | |
da8dec29 | 313 | }, |
5bbe233b | 314 | .post_associate = iwl_post_associate, |
ef850d7c | 315 | .isr = iwl_isr_ict, |
60690a6a | 316 | .config_ap = iwl_config_ap, |
62161aef | 317 | .temp_ops = { |
e04ed0a5 | 318 | .temperature = iwlagn_temperature, |
62161aef WYG |
319 | .set_ct_kill = iwl5000_set_ct_threshold, |
320 | }, | |
3459ab5a | 321 | .add_bcast_station = iwl_add_bcast_station, |
b74e31a9 | 322 | .recover_from_tx_stall = iwl_bg_monitor_recover, |
fa8f130c WYG |
323 | .check_plcp_health = iwl_good_plcp_health, |
324 | .check_ack_health = iwl_good_ack_health, | |
62161aef WYG |
325 | }; |
326 | ||
327 | static struct iwl_lib_ops iwl5150_lib = { | |
328 | .set_hw_params = iwl5000_hw_set_hw_params, | |
b305a080 WYG |
329 | .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl, |
330 | .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl, | |
331 | .txq_set_sched = iwlagn_txq_set_sched, | |
332 | .txq_agg_enable = iwlagn_txq_agg_enable, | |
333 | .txq_agg_disable = iwlagn_txq_agg_disable, | |
62161aef WYG |
334 | .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd, |
335 | .txq_free_tfd = iwl_hw_txq_free_tfd, | |
336 | .txq_init = iwl_hw_tx_queue_init, | |
e04ed0a5 WYG |
337 | .rx_handler_setup = iwlagn_rx_handler_setup, |
338 | .setup_deferred_work = iwlagn_setup_deferred_work, | |
339 | .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr, | |
b7a79404 RC |
340 | .dump_nic_event_log = iwl_dump_nic_event_log, |
341 | .dump_nic_error_log = iwl_dump_nic_error_log, | |
696bdee3 | 342 | .dump_csr = iwl_dump_csr, |
81b8176e | 343 | .load_ucode = iwlagn_load_ucode, |
741a6266 WYG |
344 | .init_alive_start = iwlagn_init_alive_start, |
345 | .alive_notify = iwlagn_alive_notify, | |
e04ed0a5 | 346 | .send_tx_power = iwlagn_send_tx_power, |
62161aef | 347 | .update_chain_flags = iwl_update_chain_flags, |
4a56e965 | 348 | .set_channel_switch = iwl5000_hw_channel_switch, |
62161aef | 349 | .apm_ops = { |
fadb3582 | 350 | .init = iwl_apm_init, |
d68b603c | 351 | .stop = iwl_apm_stop, |
62161aef WYG |
352 | .config = iwl5000_nic_config, |
353 | .set_pwr_src = iwl_set_pwr_src, | |
354 | }, | |
355 | .eeprom_ops = { | |
356 | .regulatory_bands = { | |
e04ed0a5 WYG |
357 | EEPROM_REG_BAND_1_CHANNELS, |
358 | EEPROM_REG_BAND_2_CHANNELS, | |
359 | EEPROM_REG_BAND_3_CHANNELS, | |
360 | EEPROM_REG_BAND_4_CHANNELS, | |
361 | EEPROM_REG_BAND_5_CHANNELS, | |
362 | EEPROM_REG_BAND_24_HT40_CHANNELS, | |
363 | EEPROM_REG_BAND_52_HT40_CHANNELS | |
62161aef WYG |
364 | }, |
365 | .verify_signature = iwlcore_eeprom_verify_signature, | |
366 | .acquire_semaphore = iwlcore_eeprom_acquire_semaphore, | |
367 | .release_semaphore = iwlcore_eeprom_release_semaphore, | |
e04ed0a5 WYG |
368 | .calib_version = iwlagn_eeprom_calib_version, |
369 | .query_addr = iwlagn_eeprom_query_addr, | |
62161aef WYG |
370 | }, |
371 | .post_associate = iwl_post_associate, | |
ef850d7c | 372 | .isr = iwl_isr_ict, |
62161aef WYG |
373 | .config_ap = iwl_config_ap, |
374 | .temp_ops = { | |
375 | .temperature = iwl5150_temperature, | |
376 | .set_ct_kill = iwl5150_set_ct_threshold, | |
377 | }, | |
3459ab5a | 378 | .add_bcast_station = iwl_add_bcast_station, |
b74e31a9 | 379 | .recover_from_tx_stall = iwl_bg_monitor_recover, |
fa8f130c WYG |
380 | .check_plcp_health = iwl_good_plcp_health, |
381 | .check_ack_health = iwl_good_ack_health, | |
da8dec29 TW |
382 | }; |
383 | ||
45d5d805 | 384 | static const struct iwl_ops iwl5000_ops = { |
792bc3cb | 385 | .ucode = &iwlagn_ucode, |
da8dec29 | 386 | .lib = &iwl5000_lib, |
7dc77dba WYG |
387 | .hcmd = &iwlagn_hcmd, |
388 | .utils = &iwlagn_hcmd_utils, | |
e932a609 | 389 | .led = &iwlagn_led_ops, |
da8dec29 TW |
390 | }; |
391 | ||
45d5d805 | 392 | static const struct iwl_ops iwl5150_ops = { |
792bc3cb | 393 | .ucode = &iwlagn_ucode, |
62161aef | 394 | .lib = &iwl5150_lib, |
7dc77dba WYG |
395 | .hcmd = &iwlagn_hcmd, |
396 | .utils = &iwlagn_hcmd_utils, | |
e932a609 | 397 | .led = &iwlagn_led_ops, |
62161aef WYG |
398 | }; |
399 | ||
cec2d3f3 | 400 | struct iwl_mod_params iwl50_mod_params = { |
5a6a256e | 401 | .amsdu_size_8K = 1, |
3a1081e8 | 402 | .restart_fw = 1, |
5a6a256e TW |
403 | /* the rest are 0 by default */ |
404 | }; | |
405 | ||
406 | ||
407 | struct iwl_cfg iwl5300_agn_cfg = { | |
c11362c0 | 408 | .name = "Intel(R) Ultimate N WiFi Link 5300 AGN", |
a0987a8d RC |
409 | .fw_name_pre = IWL5000_FW_PRE, |
410 | .ucode_api_max = IWL5000_UCODE_API_MAX, | |
411 | .ucode_api_min = IWL5000_UCODE_API_MIN, | |
5a6a256e | 412 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, |
da8dec29 | 413 | .ops = &iwl5000_ops, |
19e6cda0 | 414 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
0ef2ca67 TW |
415 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
416 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | |
19e6cda0 WYG |
417 | .num_of_queues = IWLAGN_NUM_QUEUES, |
418 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
5a6a256e | 419 | .mod_params = &iwl50_mod_params, |
c0bac76a JS |
420 | .valid_tx_ant = ANT_ABC, |
421 | .valid_rx_ant = ANT_ABC, | |
fadb3582 BC |
422 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
423 | .set_l0s = true, | |
424 | .use_bsm = false, | |
b261793d | 425 | .ht_greenfield_support = true, |
f2d0d0e2 | 426 | .led_compensation = 51, |
1152dcc2 | 427 | .use_rts_for_ht = true, /* use rts/cts protection */ |
d8c07e7a | 428 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
3e4fb5fa | 429 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 430 | .chain_noise_scale = 1000, |
b74e31a9 | 431 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
5a6a256e TW |
432 | }; |
433 | ||
ac592574 | 434 | struct iwl_cfg iwl5100_bgn_cfg = { |
c11362c0 | 435 | .name = "Intel(R) WiFi Link 5100 BGN", |
a0987a8d RC |
436 | .fw_name_pre = IWL5000_FW_PRE, |
437 | .ucode_api_max = IWL5000_UCODE_API_MAX, | |
438 | .ucode_api_min = IWL5000_UCODE_API_MIN, | |
ac592574 | 439 | .sku = IWL_SKU_G|IWL_SKU_N, |
47408639 | 440 | .ops = &iwl5000_ops, |
19e6cda0 | 441 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
0ef2ca67 TW |
442 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
443 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | |
19e6cda0 WYG |
444 | .num_of_queues = IWLAGN_NUM_QUEUES, |
445 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
47408639 | 446 | .mod_params = &iwl50_mod_params, |
c0bac76a JS |
447 | .valid_tx_ant = ANT_B, |
448 | .valid_rx_ant = ANT_AB, | |
fadb3582 BC |
449 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
450 | .set_l0s = true, | |
451 | .use_bsm = false, | |
b261793d | 452 | .ht_greenfield_support = true, |
f2d0d0e2 | 453 | .led_compensation = 51, |
1152dcc2 | 454 | .use_rts_for_ht = true, /* use rts/cts protection */ |
d8c07e7a | 455 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
3e4fb5fa | 456 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 457 | .chain_noise_scale = 1000, |
b74e31a9 | 458 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
47408639 EK |
459 | }; |
460 | ||
461 | struct iwl_cfg iwl5100_abg_cfg = { | |
c11362c0 | 462 | .name = "Intel(R) WiFi Link 5100 ABG", |
a0987a8d RC |
463 | .fw_name_pre = IWL5000_FW_PRE, |
464 | .ucode_api_max = IWL5000_UCODE_API_MAX, | |
465 | .ucode_api_min = IWL5000_UCODE_API_MIN, | |
47408639 EK |
466 | .sku = IWL_SKU_A|IWL_SKU_G, |
467 | .ops = &iwl5000_ops, | |
19e6cda0 | 468 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
0ef2ca67 TW |
469 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
470 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | |
19e6cda0 WYG |
471 | .num_of_queues = IWLAGN_NUM_QUEUES, |
472 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
47408639 | 473 | .mod_params = &iwl50_mod_params, |
c0bac76a JS |
474 | .valid_tx_ant = ANT_B, |
475 | .valid_rx_ant = ANT_AB, | |
fadb3582 BC |
476 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
477 | .set_l0s = true, | |
478 | .use_bsm = false, | |
f2d0d0e2 | 479 | .led_compensation = 51, |
d8c07e7a | 480 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
3e4fb5fa | 481 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 482 | .chain_noise_scale = 1000, |
b74e31a9 | 483 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
47408639 EK |
484 | }; |
485 | ||
5a6a256e | 486 | struct iwl_cfg iwl5100_agn_cfg = { |
c11362c0 | 487 | .name = "Intel(R) WiFi Link 5100 AGN", |
a0987a8d RC |
488 | .fw_name_pre = IWL5000_FW_PRE, |
489 | .ucode_api_max = IWL5000_UCODE_API_MAX, | |
490 | .ucode_api_min = IWL5000_UCODE_API_MIN, | |
5a6a256e | 491 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, |
da8dec29 | 492 | .ops = &iwl5000_ops, |
19e6cda0 | 493 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
0ef2ca67 TW |
494 | .eeprom_ver = EEPROM_5000_EEPROM_VERSION, |
495 | .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, | |
19e6cda0 WYG |
496 | .num_of_queues = IWLAGN_NUM_QUEUES, |
497 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
5a6a256e | 498 | .mod_params = &iwl50_mod_params, |
c0bac76a JS |
499 | .valid_tx_ant = ANT_B, |
500 | .valid_rx_ant = ANT_AB, | |
fadb3582 BC |
501 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
502 | .set_l0s = true, | |
503 | .use_bsm = false, | |
b261793d | 504 | .ht_greenfield_support = true, |
f2d0d0e2 | 505 | .led_compensation = 51, |
1152dcc2 | 506 | .use_rts_for_ht = true, /* use rts/cts protection */ |
d8c07e7a | 507 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
3e4fb5fa | 508 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 509 | .chain_noise_scale = 1000, |
b74e31a9 | 510 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
5a6a256e TW |
511 | }; |
512 | ||
513 | struct iwl_cfg iwl5350_agn_cfg = { | |
c11362c0 | 514 | .name = "Intel(R) WiMAX/WiFi Link 5350 AGN", |
a0987a8d RC |
515 | .fw_name_pre = IWL5000_FW_PRE, |
516 | .ucode_api_max = IWL5000_UCODE_API_MAX, | |
517 | .ucode_api_min = IWL5000_UCODE_API_MIN, | |
5a6a256e | 518 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, |
da8dec29 | 519 | .ops = &iwl5000_ops, |
19e6cda0 | 520 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
0ef2ca67 TW |
521 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, |
522 | .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, | |
19e6cda0 WYG |
523 | .num_of_queues = IWLAGN_NUM_QUEUES, |
524 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
5a6a256e | 525 | .mod_params = &iwl50_mod_params, |
c0bac76a JS |
526 | .valid_tx_ant = ANT_ABC, |
527 | .valid_rx_ant = ANT_ABC, | |
fadb3582 BC |
528 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
529 | .set_l0s = true, | |
530 | .use_bsm = false, | |
b261793d | 531 | .ht_greenfield_support = true, |
f2d0d0e2 | 532 | .led_compensation = 51, |
1152dcc2 | 533 | .use_rts_for_ht = true, /* use rts/cts protection */ |
d8c07e7a | 534 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
3e4fb5fa | 535 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 536 | .chain_noise_scale = 1000, |
b74e31a9 | 537 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
5a6a256e TW |
538 | }; |
539 | ||
7100e924 | 540 | struct iwl_cfg iwl5150_agn_cfg = { |
c11362c0 | 541 | .name = "Intel(R) WiMAX/WiFi Link 5150 AGN", |
a0987a8d RC |
542 | .fw_name_pre = IWL5150_FW_PRE, |
543 | .ucode_api_max = IWL5150_UCODE_API_MAX, | |
544 | .ucode_api_min = IWL5150_UCODE_API_MIN, | |
7100e924 | 545 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, |
62161aef | 546 | .ops = &iwl5150_ops, |
19e6cda0 | 547 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
fd63edba TW |
548 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, |
549 | .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, | |
19e6cda0 WYG |
550 | .num_of_queues = IWLAGN_NUM_QUEUES, |
551 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
7100e924 | 552 | .mod_params = &iwl50_mod_params, |
c0bac76a JS |
553 | .valid_tx_ant = ANT_A, |
554 | .valid_rx_ant = ANT_AB, | |
fadb3582 BC |
555 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, |
556 | .set_l0s = true, | |
557 | .use_bsm = false, | |
b261793d | 558 | .ht_greenfield_support = true, |
f2d0d0e2 | 559 | .led_compensation = 51, |
1152dcc2 | 560 | .use_rts_for_ht = true, /* use rts/cts protection */ |
d8c07e7a | 561 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
3e4fb5fa | 562 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 563 | .chain_noise_scale = 1000, |
b74e31a9 | 564 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
7100e924 TW |
565 | }; |
566 | ||
ac592574 | 567 | struct iwl_cfg iwl5150_abg_cfg = { |
c11362c0 | 568 | .name = "Intel(R) WiMAX/WiFi Link 5150 ABG", |
ac592574 WYG |
569 | .fw_name_pre = IWL5150_FW_PRE, |
570 | .ucode_api_max = IWL5150_UCODE_API_MAX, | |
571 | .ucode_api_min = IWL5150_UCODE_API_MIN, | |
572 | .sku = IWL_SKU_A|IWL_SKU_G, | |
573 | .ops = &iwl5150_ops, | |
19e6cda0 | 574 | .eeprom_size = IWLAGN_EEPROM_IMG_SIZE, |
ac592574 WYG |
575 | .eeprom_ver = EEPROM_5050_EEPROM_VERSION, |
576 | .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, | |
19e6cda0 WYG |
577 | .num_of_queues = IWLAGN_NUM_QUEUES, |
578 | .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, | |
ac592574 WYG |
579 | .mod_params = &iwl50_mod_params, |
580 | .valid_tx_ant = ANT_A, | |
581 | .valid_rx_ant = ANT_AB, | |
582 | .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, | |
583 | .set_l0s = true, | |
584 | .use_bsm = false, | |
585 | .led_compensation = 51, | |
586 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | |
3e4fb5fa | 587 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
d4fe5ac9 | 588 | .chain_noise_scale = 1000, |
b74e31a9 | 589 | .monitor_recover_period = IWL_MONITORING_PERIOD, |
7100e924 TW |
590 | }; |
591 | ||
a0987a8d RC |
592 | MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX)); |
593 | MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX)); | |
c9f79ed2 | 594 | |
4e30cb69 | 595 | module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, S_IRUGO); |
5a6a256e TW |
596 | MODULE_PARM_DESC(swcrypto50, |
597 | "using software crypto engine (default 0 [hardware])\n"); | |
4e30cb69 | 598 | module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, S_IRUGO); |
5a6a256e | 599 | MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series"); |
4e30cb69 | 600 | module_param_named(11n_disable50, iwl50_mod_params.disable_11n, int, S_IRUGO); |
49779293 | 601 | MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality"); |
4e30cb69 WYG |
602 | module_param_named(amsdu_size_8K50, iwl50_mod_params.amsdu_size_8K, |
603 | int, S_IRUGO); | |
5a6a256e | 604 | MODULE_PARM_DESC(amsdu_size_8K50, "enable 8K amsdu size in 50XX series"); |
4e30cb69 | 605 | module_param_named(fw_restart50, iwl50_mod_params.restart_fw, int, S_IRUGO); |
3a1081e8 | 606 | MODULE_PARM_DESC(fw_restart50, "restart firmware in case of error"); |