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iwlagn: clean up & autodetect statistics
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-5000.c
CommitLineData
5a6a256e
TW		 1/******************************************************************************
2 *
901069c7 3 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
5a6a256e
TW		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
3d2b162e 22 * Intel Linux Wireless <ilw@linux.intel.com>
5a6a256e
TW		 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
5a6a256e
TW		 29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
d43c36dc 33#include <linux/sched.h>
5a6a256e
TW		 34#include <linux/skbuff.h>
35#include <linux/netdevice.h>
36#include <linux/wireless.h>
37#include <net/mac80211.h>
38#include <linux/etherdevice.h>
39#include <asm/unaligned.h>
40
41#include "iwl-eeprom.h"
3e0d4cb1 42#include "iwl-dev.h"
5a6a256e
TW		 43#include "iwl-core.h"
44#include "iwl-io.h"
e26e47d9 45#include "iwl-sta.h"
5a6a256e 46#include "iwl-helpers.h"
a1175124 47#include "iwl-agn.h"
e932a609 48#include "iwl-agn-led.h"
19e6cda0 49#include "iwl-agn-hw.h"
5a6a256e 50#include "iwl-5000-hw.h"
b8c76267 51#include "iwl-agn-debugfs.h"
5a6a256e 52
a0987a8d 53/* Highest firmware API version supported */
41504cce 54#define IWL5000_UCODE_API_MAX 5
39e6d225 55#define IWL5150_UCODE_API_MAX 2
5a6a256e 56
a0987a8d
RC		 57/* Lowest firmware API version supported */
58#define IWL5000_UCODE_API_MIN 1
59#define IWL5150_UCODE_API_MIN 1
60
61#define IWL5000_FW_PRE "iwlwifi-5000-"
1d5cc555 62#define IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE #api ".ucode"
a0987a8d
RC		 63
64#define IWL5150_FW_PRE "iwlwifi-5150-"
1d5cc555 65#define IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE #api ".ucode"
4e062f99 66
9371d4ed 67/* NIC configuration for 5000 series */
510cb791 68static void iwl5000_nic_config(struct iwl_priv *priv)
e86fe9f6
TW		 69{
70 unsigned long flags;
71 u16 radio_cfg;
e86fe9f6
TW		 72
73 spin_lock_irqsave(&priv->lock, flags);
74
e86fe9f6
TW		 75 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
76
77 /* write radio config values to register */
9371d4ed 78 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) < EEPROM_RF_CONFIG_TYPE_MAX)
e86fe9f6
TW		 79 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
80 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
81 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
82 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
83
84 /* set CSR_HW_CONFIG_REG for uCode use */
85 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
86 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
87 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
88
4c43e0d0
TW		 89 /* W/A : NIC is stuck in a reset state after Early PCIe power off
90 * (PCIe power is lost before PERST# is asserted),
91 * causing ME FW to lose ownership and not being able to obtain it back.
92 */
2d3db679 93 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
4c43e0d0
TW		 94 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
95 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
96
02c06e4a 97
e86fe9f6
TW		 98 spin_unlock_irqrestore(&priv->lock, flags);
99}
100
33fd5033
EG		 101static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
102 .min_nrg_cck = 95,
fe6efb4b 103 .max_nrg_cck = 0, /* not used, set to 0 */
33fd5033
EG		 104 .auto_corr_min_ofdm = 90,
105 .auto_corr_min_ofdm_mrc = 170,
106 .auto_corr_min_ofdm_x1 = 120,
107 .auto_corr_min_ofdm_mrc_x1 = 240,
108
109 .auto_corr_max_ofdm = 120,
110 .auto_corr_max_ofdm_mrc = 210,
9bead763
WYG		 111 .auto_corr_max_ofdm_x1 = 120,
112 .auto_corr_max_ofdm_mrc_x1 = 240,
33fd5033
EG		 113
114 .auto_corr_min_cck = 125,
115 .auto_corr_max_cck = 200,
116 .auto_corr_min_cck_mrc = 170,
117 .auto_corr_max_cck_mrc = 400,
118 .nrg_th_cck = 95,
119 .nrg_th_ofdm = 95,
55036d66
WYG		 120
121 .barker_corr_th_min = 190,
122 .barker_corr_th_min_mrc = 390,
123 .nrg_th_cca = 62,
33fd5033
EG		 124};
125
9d67187d
WYG		 126static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
127 .min_nrg_cck = 95,
128 .max_nrg_cck = 0, /* not used, set to 0 */
129 .auto_corr_min_ofdm = 90,
130 .auto_corr_min_ofdm_mrc = 170,
131 .auto_corr_min_ofdm_x1 = 105,
132 .auto_corr_min_ofdm_mrc_x1 = 220,
133
134 .auto_corr_max_ofdm = 120,
135 .auto_corr_max_ofdm_mrc = 210,
136 /* max = min for performance bug in 5150 DSP */
137 .auto_corr_max_ofdm_x1 = 105,
138 .auto_corr_max_ofdm_mrc_x1 = 220,
139
140 .auto_corr_min_cck = 125,
141 .auto_corr_max_cck = 200,
142 .auto_corr_min_cck_mrc = 170,
143 .auto_corr_max_cck_mrc = 400,
144 .nrg_th_cck = 95,
145 .nrg_th_ofdm = 95,
55036d66
WYG		 146
147 .barker_corr_th_min = 190,
148 .barker_corr_th_min_mrc = 390,
149 .nrg_th_cca = 62,
9d67187d
WYG		 150};
151
62161aef 152static void iwl5150_set_ct_threshold(struct iwl_priv *priv)
339afc89 153{
62161aef 154 const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;
672639de 155 s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) -
62161aef
WYG		 156 iwl_temp_calib_to_offset(priv);
157
158 priv->hw_params.ct_kill_threshold = threshold * volt2temp_coef;
159}
160
161static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
162{
163 /* want Celsius */
672639de 164 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;
339afc89
TW		 165}
166
510cb791 167static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
fdd3e8a4 168{
88804e2b 169 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
19e6cda0 170 priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES)
7cb1b088 171 priv->cfg->base_params->num_of_queues =
88804e2b 172 priv->cfg->mod_params->num_of_queues;
25ae3986 173
7cb1b088 174 priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
f3f911d1 175 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
4ddbb7d0 176 priv->hw_params.scd_bc_tbls_size =
7cb1b088 177 priv->cfg->base_params->num_of_queues *
19e6cda0 178 sizeof(struct iwlagn_scd_bc_tbl);
a8e74e27 179 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
bf3c7fdd 180 priv->hw_params.max_stations = IWLAGN_STATION_COUNT;
a194e324 181 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
c0bac76a 182
19e6cda0
WYG		 183 priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE;
184 priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE;
c0bac76a 185
7aafef1c 186 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
fdd3e8a4 187 BIT(IEEE80211_BAND_5GHZ);
141c43a3
WT		 188 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
189
c0bac76a
JS		 190 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
191 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
192 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
193 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
c031bf80 194
0453674c 195 iwl5000_set_ct_threshold(priv);
c031bf80 196
9d67187d 197 /* Set initial sensitivity parameters */
be5d56ed 198 /* Set initial calibration set */
e517736a
WYG		 199 priv->hw_params.sens = &iwl5000_sensitivity;
200 priv->hw_params.calib_init_cfg =
201 BIT(IWL_CALIB_XTAL) |
202 BIT(IWL_CALIB_LO) |
203 BIT(IWL_CALIB_TX_IQ) |
204 BIT(IWL_CALIB_TX_IQ_PERD) |
205 BIT(IWL_CALIB_BASE_BAND);
206
a0ee74cf
WYG		 207 priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
208
e517736a
WYG		 209 return 0;
210}
211
212static int iwl5150_hw_set_hw_params(struct iwl_priv *priv)
213{
214 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
215 priv->cfg->mod_params->num_of_queues <= IWLAGN_NUM_QUEUES)
7cb1b088 216 priv->cfg->base_params->num_of_queues =
e517736a
WYG		 217 priv->cfg->mod_params->num_of_queues;
218
7cb1b088 219 priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
e517736a
WYG		 220 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
221 priv->hw_params.scd_bc_tbls_size =
7cb1b088 222 priv->cfg->base_params->num_of_queues *
e517736a
WYG		 223 sizeof(struct iwlagn_scd_bc_tbl);
224 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
bf3c7fdd 225 priv->hw_params.max_stations = IWLAGN_STATION_COUNT;
a194e324 226 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
e517736a
WYG		 227
228 priv->hw_params.max_data_size = IWLAGN_RTC_DATA_SIZE;
229 priv->hw_params.max_inst_size = IWLAGN_RTC_INST_SIZE;
230
e517736a
WYG		 231 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
232 BIT(IEEE80211_BAND_5GHZ);
233 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
234
235 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
236 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
237 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
238 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
239
0453674c 240 iwl5150_set_ct_threshold(priv);
e517736a
WYG		 241
242 /* Set initial sensitivity parameters */
243 /* Set initial calibration set */
244 priv->hw_params.sens = &iwl5150_sensitivity;
245 priv->hw_params.calib_init_cfg =
e517736a
WYG		 246 BIT(IWL_CALIB_LO) |
247 BIT(IWL_CALIB_TX_IQ) |
248 BIT(IWL_CALIB_BASE_BAND);
178d1596
WYG		 249 if (priv->cfg->need_dc_calib)
250 priv->hw_params.calib_init_cfg |= BIT(IWL_CALIB_DC);
be5d56ed 251
a0ee74cf
WYG		 252 priv->hw_params.beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
253
fdd3e8a4
TW		 254 return 0;
255}
d4100dd9 256
62161aef
WYG		 257static void iwl5150_temperature(struct iwl_priv *priv)
258{
259 u32 vt = 0;
260 s32 offset = iwl_temp_calib_to_offset(priv);
261
0da0e5bf 262 vt = le32_to_cpu(priv->statistics.common.temperature);
62161aef
WYG		 263 vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;
264 /* now vt hold the temperature in Kelvin */
265 priv->temperature = KELVIN_TO_CELSIUS(vt);
15993e08 266 iwl_tt_handler(priv);
62161aef
WYG		 267}
268
79d07325
WYG		 269static int iwl5000_hw_channel_switch(struct iwl_priv *priv,
270 struct ieee80211_channel_switch *ch_switch)
4a56e965 271{
246ed355
JB		 272 /*
273 * MULTI-FIXME
274 * See iwl_mac_channel_switch.
275 */
276 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
4a56e965
WYG		 277 struct iwl5000_channel_switch_cmd cmd;
278 const struct iwl_channel_info *ch_info;
79d07325
WYG		 279 u32 switch_time_in_usec, ucode_switch_time;
280 u16 ch;
281 u32 tsf_low;
282 u8 switch_count;
246ed355 283 u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
8bd413e6 284 struct ieee80211_vif *vif = ctx->vif;
4a56e965
WYG		 285 struct iwl_host_cmd hcmd = {
286 .id = REPLY_CHANNEL_SWITCH,
287 .len = sizeof(cmd),
3839f7ce 288 .flags = CMD_SYNC,
4a56e965
WYG		 289 .data = &cmd,
290 };
291
4a56e965 292 cmd.band = priv->band == IEEE80211_BAND_2GHZ;
81e95430 293 ch = ch_switch->channel->hw_value;
79d07325 294 IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",
246ed355 295 ctx->active.channel, ch);
79d07325 296 cmd.channel = cpu_to_le16(ch);
246ed355
JB		 297 cmd.rxon_flags = ctx->staging.flags;
298 cmd.rxon_filter_flags = ctx->staging.filter_flags;
79d07325
WYG		 299 switch_count = ch_switch->count;
300 tsf_low = ch_switch->timestamp & 0x0ffffffff;
301 /*
302 * calculate the ucode channel switch time
303 * adding TSF as one of the factor for when to switch
304 */
305 if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
306 if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
307 beacon_interval)) {
308 switch_count -= (priv->ucode_beacon_time -
309 tsf_low) / beacon_interval;
310 } else
311 switch_count = 0;
312 }
313 if (switch_count <= 1)
314 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
315 else {
316 switch_time_in_usec =
317 vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
318 ucode_switch_time = iwl_usecs_to_beacons(priv,
319 switch_time_in_usec,
320 beacon_interval);
321 cmd.switch_time = iwl_add_beacon_time(priv,
322 priv->ucode_beacon_time,
323 ucode_switch_time,
324 beacon_interval);
325 }
326 IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
327 cmd.switch_time);
328 ch_info = iwl_get_channel_info(priv, priv->band, ch);
4a56e965
WYG		 329 if (ch_info)
330 cmd.expect_beacon = is_channel_radar(ch_info);
331 else {
332 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
246ed355 333 ctx->active.channel, ch);
4a56e965
WYG		 334 return -EFAULT;
335 }
79d07325 336 priv->switch_rxon.channel = cmd.channel;
0924e519 337 priv->switch_rxon.switch_in_progress = true;
4a56e965
WYG		 338
339 return iwl_send_cmd_sync(priv, &hcmd);
340}
341
510cb791 342static struct iwl_lib_ops iwl5000_lib = {
fdd3e8a4 343 .set_hw_params = iwl5000_hw_set_hw_params,
b305a080
WYG		 344 .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
345 .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
346 .txq_set_sched = iwlagn_txq_set_sched,
7aaa1d79
SO		 347 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
348 .txq_free_tfd = iwl_hw_txq_free_tfd,
a8e74e27 349 .txq_init = iwl_hw_tx_queue_init,
e04ed0a5
WYG		 350 .rx_handler_setup = iwlagn_rx_handler_setup,
351 .setup_deferred_work = iwlagn_setup_deferred_work,
352 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
e04ed0a5 353 .send_tx_power = iwlagn_send_tx_power,
5b9f8cd3 354 .update_chain_flags = iwl_update_chain_flags,
4a56e965 355 .set_channel_switch = iwl5000_hw_channel_switch,
30d59260 356 .apm_ops = {
fadb3582 357 .init = iwl_apm_init,
5a835353 358 .config = iwl5000_nic_config,
30d59260 359 },
da8dec29 360 .eeprom_ops = {
25ae3986 361 .regulatory_bands = {
e04ed0a5
WYG		 362 EEPROM_REG_BAND_1_CHANNELS,
363 EEPROM_REG_BAND_2_CHANNELS,
364 EEPROM_REG_BAND_3_CHANNELS,
365 EEPROM_REG_BAND_4_CHANNELS,
366 EEPROM_REG_BAND_5_CHANNELS,
367 EEPROM_REG_BAND_24_HT40_CHANNELS,
368 EEPROM_REG_BAND_52_HT40_CHANNELS
25ae3986 369 },
da8dec29
TW		 370 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
371 .release_semaphore = iwlcore_eeprom_release_semaphore,
e04ed0a5
WYG		 372 .calib_version = iwlagn_eeprom_calib_version,
373 .query_addr = iwlagn_eeprom_query_addr,
da8dec29 374 },
62161aef 375 .temp_ops = {
e04ed0a5 376 .temperature = iwlagn_temperature,
62161aef 377 },
b8c76267
AK		 378 .debugfs_ops = {
379 .rx_stats_read = iwl_ucode_rx_stats_read,
380 .tx_stats_read = iwl_ucode_tx_stats_read,
381 .general_stats_read = iwl_ucode_general_stats_read,
ffb7d896 382 .bt_stats_read = iwl_ucode_bt_stats_read,
54a9aa65 383 .reply_tx_error = iwl_reply_tx_error_read,
b8c76267 384 },
716c74b0 385 .txfifo_flush = iwlagn_txfifo_flush,
65550636 386 .dev_txfifo_flush = iwlagn_dev_txfifo_flush,
0975cc8f
WYG		 387 .tt_ops = {
388 .lower_power_detection = iwl_tt_is_low_power_state,
389 .tt_power_mode = iwl_tt_current_power_mode,
390 .ct_kill_check = iwl_check_for_ct_kill,
391 }
62161aef
WYG		 392};
393
394static struct iwl_lib_ops iwl5150_lib = {
e517736a 395 .set_hw_params = iwl5150_hw_set_hw_params,
b305a080
WYG		 396 .txq_update_byte_cnt_tbl = iwlagn_txq_update_byte_cnt_tbl,
397 .txq_inval_byte_cnt_tbl = iwlagn_txq_inval_byte_cnt_tbl,
398 .txq_set_sched = iwlagn_txq_set_sched,
62161aef
WYG		 399 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
400 .txq_free_tfd = iwl_hw_txq_free_tfd,
401 .txq_init = iwl_hw_tx_queue_init,
e04ed0a5
WYG		 402 .rx_handler_setup = iwlagn_rx_handler_setup,
403 .setup_deferred_work = iwlagn_setup_deferred_work,
404 .is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
e04ed0a5 405 .send_tx_power = iwlagn_send_tx_power,
62161aef 406 .update_chain_flags = iwl_update_chain_flags,
4a56e965 407 .set_channel_switch = iwl5000_hw_channel_switch,
62161aef 408 .apm_ops = {
fadb3582 409 .init = iwl_apm_init,
62161aef 410 .config = iwl5000_nic_config,
62161aef
WYG		 411 },
412 .eeprom_ops = {
413 .regulatory_bands = {
e04ed0a5
WYG		 414 EEPROM_REG_BAND_1_CHANNELS,
415 EEPROM_REG_BAND_2_CHANNELS,
416 EEPROM_REG_BAND_3_CHANNELS,
417 EEPROM_REG_BAND_4_CHANNELS,
418 EEPROM_REG_BAND_5_CHANNELS,
419 EEPROM_REG_BAND_24_HT40_CHANNELS,
420 EEPROM_REG_BAND_52_HT40_CHANNELS
62161aef 421 },
62161aef
WYG		 422 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
423 .release_semaphore = iwlcore_eeprom_release_semaphore,
e04ed0a5
WYG		 424 .calib_version = iwlagn_eeprom_calib_version,
425 .query_addr = iwlagn_eeprom_query_addr,
62161aef 426 },
62161aef
WYG		 427 .temp_ops = {
428 .temperature = iwl5150_temperature,
62161aef 429 },
b8c76267
AK		 430 .debugfs_ops = {
431 .rx_stats_read = iwl_ucode_rx_stats_read,
432 .tx_stats_read = iwl_ucode_tx_stats_read,
433 .general_stats_read = iwl_ucode_general_stats_read,
a437fbb9 434 .bt_stats_read = iwl_ucode_bt_stats_read,
54a9aa65 435 .reply_tx_error = iwl_reply_tx_error_read,
b8c76267 436 },
716c74b0 437 .txfifo_flush = iwlagn_txfifo_flush,
65550636 438 .dev_txfifo_flush = iwlagn_dev_txfifo_flush,
0975cc8f
WYG		 439 .tt_ops = {
440 .lower_power_detection = iwl_tt_is_low_power_state,
441 .tt_power_mode = iwl_tt_current_power_mode,
442 .ct_kill_check = iwl_check_for_ct_kill,
443 }
da8dec29
TW		 444};
445
45d5d805 446static const struct iwl_ops iwl5000_ops = {
da8dec29 447 .lib = &iwl5000_lib,
7dc77dba
WYG		 448 .hcmd = &iwlagn_hcmd,
449 .utils = &iwlagn_hcmd_utils,
e932a609 450 .led = &iwlagn_led_ops,
dc21b545 451 .ieee80211_ops = &iwlagn_hw_ops,
da8dec29
TW		 452};
453
45d5d805 454static const struct iwl_ops iwl5150_ops = {
62161aef 455 .lib = &iwl5150_lib,
7dc77dba
WYG		 456 .hcmd = &iwlagn_hcmd,
457 .utils = &iwlagn_hcmd_utils,
e932a609 458 .led = &iwlagn_led_ops,
dc21b545 459 .ieee80211_ops = &iwlagn_hw_ops,
62161aef
WYG		 460};
461
7cb1b088 462static struct iwl_base_params iwl5000_base_params = {
19e6cda0 463 .eeprom_size = IWLAGN_EEPROM_IMG_SIZE,
19e6cda0
WYG		 464 .num_of_queues = IWLAGN_NUM_QUEUES,
465 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
fadb3582 466 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
f2d0d0e2 467 .led_compensation = 51,
d8c07e7a 468 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
3e4fb5fa 469 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
d4fe5ac9 470 .chain_noise_scale = 1000,
22de94de 471 .wd_timeout = IWL_LONG_WD_TIMEOUT,
678b385d 472 .max_event_log_size = 512,
6e5c800e 473 .ucode_tracing = true,
5a6a256e 474};
7cb1b088
WYG		 475static struct iwl_ht_params iwl5000_ht_params = {
476 .ht_greenfield_support = true,
477 .use_rts_for_aggregation = true, /* use rts/cts protection */
478};
479
65af8dea
WYG		 480#define IWL_DEVICE_5000 \
481 .fw_name_pre = IWL5000_FW_PRE, \
482 .ucode_api_max = IWL5000_UCODE_API_MAX, \
483 .ucode_api_min = IWL5000_UCODE_API_MIN, \
484 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, \
485 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, \
486 .ops = &iwl5000_ops, \
487 .mod_params = &iwlagn_mod_params, \
488 .base_params = &iwl5000_base_params, \
489 .led_mode = IWL_LED_BLINK
490
7cb1b088
WYG		 491struct iwl_cfg iwl5300_agn_cfg = {
492 .name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
65af8dea 493 IWL_DEVICE_5000,
2845fd85
JB		 494 /* at least EEPROM 0x11A has wrong info */
495 .valid_tx_ant = ANT_ABC, /* .cfg overwrite */
496 .valid_rx_ant = ANT_ABC, /* .cfg overwrite */
7cb1b088
WYG		 497 .ht_params = &iwl5000_ht_params,
498};
5a6a256e 499
ac592574 500struct iwl_cfg iwl5100_bgn_cfg = {
c11362c0 501 .name = "Intel(R) WiFi Link 5100 BGN",
65af8dea 502 IWL_DEVICE_5000,
dbbf1755
WYG		 503 .valid_tx_ant = ANT_B, /* .cfg overwrite */
504 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
7cb1b088 505 .ht_params = &iwl5000_ht_params,
47408639
EK		 506};
507
508struct iwl_cfg iwl5100_abg_cfg = {
c11362c0 509 .name = "Intel(R) WiFi Link 5100 ABG",
65af8dea 510 IWL_DEVICE_5000,
dbbf1755
WYG		 511 .valid_tx_ant = ANT_B, /* .cfg overwrite */
512 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
47408639
EK		 513};
514
5a6a256e 515struct iwl_cfg iwl5100_agn_cfg = {
c11362c0 516 .name = "Intel(R) WiFi Link 5100 AGN",
65af8dea 517 IWL_DEVICE_5000,
dbbf1755
WYG		 518 .valid_tx_ant = ANT_B, /* .cfg overwrite */
519 .valid_rx_ant = ANT_AB, /* .cfg overwrite */
7cb1b088 520 .ht_params = &iwl5000_ht_params,
5a6a256e
TW		 521};
522
523struct iwl_cfg iwl5350_agn_cfg = {
c11362c0 524 .name = "Intel(R) WiMAX/WiFi Link 5350 AGN",
a0987a8d
RC		 525 .fw_name_pre = IWL5000_FW_PRE,
526 .ucode_api_max = IWL5000_UCODE_API_MAX,
527 .ucode_api_min = IWL5000_UCODE_API_MIN,
0ef2ca67
TW		 528 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
529 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
7cb1b088 530 .ops = &iwl5000_ops,
348ee7cd 531 .mod_params = &iwlagn_mod_params,
7cb1b088
WYG		 532 .base_params = &iwl5000_base_params,
533 .ht_params = &iwl5000_ht_params,
564b344c 534 .led_mode = IWL_LED_BLINK,
50619ac9 535 .internal_wimax_coex = true,
5a6a256e
TW		 536};
537
65af8dea
WYG		 538#define IWL_DEVICE_5150 \
539 .fw_name_pre = IWL5150_FW_PRE, \
540 .ucode_api_max = IWL5150_UCODE_API_MAX, \
541 .ucode_api_min = IWL5150_UCODE_API_MIN, \
542 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, \
543 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, \
544 .ops = &iwl5150_ops, \
545 .mod_params = &iwlagn_mod_params, \
546 .base_params = &iwl5000_base_params, \
547 .need_dc_calib = true, \
548 .led_mode = IWL_LED_BLINK, \
549 .internal_wimax_coex = true
550
7100e924 551struct iwl_cfg iwl5150_agn_cfg = {
c11362c0 552 .name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
65af8dea 553 IWL_DEVICE_5150,
7cb1b088 554 .ht_params = &iwl5000_ht_params,
65af8dea 555
7100e924
TW		 556};
557
ac592574 558struct iwl_cfg iwl5150_abg_cfg = {
c11362c0 559 .name = "Intel(R) WiMAX/WiFi Link 5150 ABG",
65af8dea 560 IWL_DEVICE_5150,
7100e924
TW		 561};
562
a0987a8d
RC		 563MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
564MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));
Linux kernel - Deliverables
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