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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
b481de9c ZY |
32 | #include <linux/init.h> |
33 | #include <linux/pci.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/skbuff.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/wireless.h> | |
39 | #include <linux/firmware.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
b481de9c ZY |
43 | #include <net/mac80211.h> |
44 | ||
45 | #include <asm/div64.h> | |
46 | ||
6bc913bd | 47 | #include "iwl-eeprom.h" |
3e0d4cb1 | 48 | #include "iwl-dev.h" |
fee1247a | 49 | #include "iwl-core.h" |
3395f6e9 | 50 | #include "iwl-io.h" |
b481de9c | 51 | #include "iwl-helpers.h" |
6974e363 | 52 | #include "iwl-sta.h" |
f0832f13 | 53 | #include "iwl-calib.h" |
b481de9c | 54 | |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
b481de9c ZY |
62 | /* |
63 | * module name, copyright, version, etc. | |
64 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
65 | */ | |
66 | ||
d783b061 | 67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 68 | |
0a6857e7 | 69 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
70 | #define VD "d" |
71 | #else | |
72 | #define VD | |
73 | #endif | |
74 | ||
4fc22b21 | 75 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
76 | #define VS "s" |
77 | #else | |
78 | #define VS | |
79 | #endif | |
80 | ||
df48c323 | 81 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 82 | |
b481de9c ZY |
83 | |
84 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
85 | MODULE_VERSION(DRV_VERSION); | |
86 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
87 | MODULE_LICENSE("GPL"); | |
4fc22b21 | 88 | MODULE_ALIAS("iwl4965"); |
b481de9c | 89 | |
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
deb09c43 EG |
99 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
100 | { | |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
bb8c093b | 111 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
c1adf9fb | 117 | static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
bb8c093b | 177 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
54559703 | 184 | * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
54559703 | 191 | static int iwl_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 195 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
b481de9c ZY |
210 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) |
211 | return 1; | |
212 | ||
213 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
214 | * be updated with the RXON_ASSOC command -- however only some | |
215 | * flag transitions are allowed using RXON_ASSOC */ | |
216 | ||
217 | /* Check if we are not switching bands */ | |
218 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
219 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
220 | return 1; | |
221 | ||
222 | /* Check if we are switching association toggle */ | |
223 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
224 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
225 | return 1; | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
b481de9c | 230 | /** |
bb8c093b | 231 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 232 | * |
01ebd063 | 233 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
234 | * the active_rxon structure is updated with the new data. This |
235 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
236 | * a HW tune is required based on the RXON structure changes. | |
237 | */ | |
c79dd5b5 | 238 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
239 | { |
240 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 241 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
43d59b32 EG |
242 | int ret; |
243 | bool new_assoc = | |
244 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 245 | |
fee1247a | 246 | if (!iwl_is_alive(priv)) |
43d59b32 | 247 | return -EBUSY; |
b481de9c ZY |
248 | |
249 | /* always get timestamp with Rx frame */ | |
250 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
a326a5d0 EG |
251 | /* allow CTS-to-self if possible. this is relevant only for |
252 | * 5000, but will not damage 4965 */ | |
253 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | |
b481de9c | 254 | |
43d59b32 EG |
255 | ret = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
256 | if (ret) { | |
b481de9c ZY |
257 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
258 | return -EINVAL; | |
259 | } | |
260 | ||
261 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 262 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 263 | * and other flags for the current radio configuration. */ |
54559703 | 264 | if (!iwl_full_rxon_required(priv)) { |
43d59b32 EG |
265 | ret = iwl_send_rxon_assoc(priv); |
266 | if (ret) { | |
267 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
268 | return ret; | |
b481de9c ZY |
269 | } |
270 | ||
271 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
272 | return 0; |
273 | } | |
274 | ||
275 | /* station table will be cleared */ | |
276 | priv->assoc_station_added = 0; | |
277 | ||
b481de9c ZY |
278 | /* If we are currently associated and the new config requires |
279 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
280 | * we must clear the associated from the active configuration | |
281 | * before we apply the new config */ | |
43d59b32 | 282 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
283 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
284 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
285 | ||
43d59b32 | 286 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 287 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
288 | &priv->active_rxon); |
289 | ||
290 | /* If the mask clearing failed then we set | |
291 | * active_rxon back to what it was previously */ | |
43d59b32 | 292 | if (ret) { |
b481de9c | 293 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
294 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
295 | return ret; | |
b481de9c | 296 | } |
b481de9c ZY |
297 | } |
298 | ||
299 | IWL_DEBUG_INFO("Sending RXON\n" | |
300 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
301 | "* channel = %d\n" | |
e174961c | 302 | "* bssid = %pM\n", |
43d59b32 | 303 | (new_assoc ? "" : "out"), |
b481de9c | 304 | le16_to_cpu(priv->staging_rxon.channel), |
e174961c | 305 | priv->staging_rxon.bssid_addr); |
b481de9c | 306 | |
099b40b7 | 307 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
308 | |
309 | /* Apply the new configuration | |
310 | * RXON unassoc clears the station table in uCode, send it before | |
311 | * we add the bcast station. If assoc bit is set, we will send RXON | |
312 | * after having added the bcast and bssid station. | |
313 | */ | |
314 | if (!new_assoc) { | |
315 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 316 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
317 | if (ret) { |
318 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
319 | return ret; | |
320 | } | |
321 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
322 | } |
323 | ||
37deb2a0 | 324 | iwl_clear_stations_table(priv); |
556f8db7 | 325 | |
b481de9c ZY |
326 | if (!priv->error_recovering) |
327 | priv->start_calib = 0; | |
328 | ||
b481de9c | 329 | /* Add the broadcast address so we can send broadcast frames */ |
4f40e4d9 | 330 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 331 | IWL_INVALID_STATION) { |
b481de9c ZY |
332 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
333 | return -EIO; | |
334 | } | |
335 | ||
336 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
337 | * add the IWL_AP_ID to the station rate table */ | |
9185159d | 338 | if (new_assoc) { |
05c914fe | 339 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
9185159d TW |
340 | ret = iwl_rxon_add_station(priv, |
341 | priv->active_rxon.bssid_addr, 1); | |
342 | if (ret == IWL_INVALID_STATION) { | |
343 | IWL_ERROR("Error adding AP address for TX.\n"); | |
344 | return -EIO; | |
345 | } | |
346 | priv->assoc_station_added = 1; | |
347 | if (priv->default_wep_key && | |
348 | iwl_send_static_wepkey_cmd(priv, 0)) | |
349 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c | 350 | } |
43d59b32 EG |
351 | |
352 | /* Apply the new configuration | |
353 | * RXON assoc doesn't clear the station table in uCode, | |
354 | */ | |
355 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
356 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
357 | if (ret) { | |
358 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
359 | return ret; | |
360 | } | |
361 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
362 | } |
363 | ||
36da7d70 ZY |
364 | iwl_init_sensitivity(priv); |
365 | ||
366 | /* If we issue a new RXON command which required a tune then we must | |
367 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
368 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | |
369 | if (ret) { | |
370 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
371 | return ret; | |
372 | } | |
373 | ||
b481de9c ZY |
374 | return 0; |
375 | } | |
376 | ||
5da4b55f MA |
377 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
378 | { | |
379 | ||
c7de35cd | 380 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
381 | iwl4965_commit_rxon(priv); |
382 | } | |
383 | ||
c79dd5b5 | 384 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 385 | { |
bb8c093b | 386 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
387 | .flags = 3, |
388 | .lead_time = 0xAA, | |
389 | .max_kill = 1, | |
390 | .kill_ack_mask = 0, | |
391 | .kill_cts_mask = 0, | |
392 | }; | |
393 | ||
857485c0 | 394 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 395 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
396 | } |
397 | ||
fcab423d | 398 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
399 | { |
400 | struct list_head *element; | |
401 | ||
402 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
403 | priv->frames_count); | |
404 | ||
405 | while (!list_empty(&priv->free_frames)) { | |
406 | element = priv->free_frames.next; | |
407 | list_del(element); | |
fcab423d | 408 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
409 | priv->frames_count--; |
410 | } | |
411 | ||
412 | if (priv->frames_count) { | |
413 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
414 | priv->frames_count); | |
415 | priv->frames_count = 0; | |
416 | } | |
417 | } | |
418 | ||
fcab423d | 419 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 420 | { |
fcab423d | 421 | struct iwl_frame *frame; |
b481de9c ZY |
422 | struct list_head *element; |
423 | if (list_empty(&priv->free_frames)) { | |
424 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
425 | if (!frame) { | |
426 | IWL_ERROR("Could not allocate frame!\n"); | |
427 | return NULL; | |
428 | } | |
429 | ||
430 | priv->frames_count++; | |
431 | return frame; | |
432 | } | |
433 | ||
434 | element = priv->free_frames.next; | |
435 | list_del(element); | |
fcab423d | 436 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
437 | } |
438 | ||
fcab423d | 439 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
440 | { |
441 | memset(frame, 0, sizeof(*frame)); | |
442 | list_add(&frame->list, &priv->free_frames); | |
443 | } | |
444 | ||
4bf64efd TW |
445 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
446 | struct ieee80211_hdr *hdr, | |
447 | const u8 *dest, int left) | |
b481de9c | 448 | { |
3109ece1 | 449 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
05c914fe JB |
450 | ((priv->iw_mode != NL80211_IFTYPE_ADHOC) && |
451 | (priv->iw_mode != NL80211_IFTYPE_AP))) | |
b481de9c ZY |
452 | return 0; |
453 | ||
454 | if (priv->ibss_beacon->len > left) | |
455 | return 0; | |
456 | ||
457 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
458 | ||
459 | return priv->ibss_beacon->len; | |
460 | } | |
461 | ||
39e88504 | 462 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 463 | { |
39e88504 GC |
464 | int i; |
465 | int rate_mask; | |
466 | ||
467 | /* Set rate mask*/ | |
468 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
469 | rate_mask = priv->active_rate_basic & 0xF; | |
470 | else | |
471 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 472 | |
39e88504 | 473 | /* Find lowest valid rate */ |
b481de9c | 474 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 475 | i = iwl_rates[i].next_ieee) { |
b481de9c | 476 | if (rate_mask & (1 << i)) |
1826dcc0 | 477 | return iwl_rates[i].plcp; |
b481de9c ZY |
478 | } |
479 | ||
39e88504 GC |
480 | /* No valid rate was found. Assign the lowest one */ |
481 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
482 | return IWL_RATE_1M_PLCP; | |
483 | else | |
484 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
485 | } |
486 | ||
a33c2f47 | 487 | static unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, |
4bf64efd TW |
488 | struct iwl_frame *frame, u8 rate) |
489 | { | |
490 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
491 | unsigned int frame_size; | |
492 | ||
493 | tx_beacon_cmd = &frame->u.beacon; | |
494 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | |
495 | ||
496 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | |
497 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
498 | ||
499 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | |
500 | iwl_bcast_addr, | |
501 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | |
502 | ||
503 | BUG_ON(frame_size > MAX_MPDU_SIZE); | |
504 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | |
505 | ||
506 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | |
507 | tx_beacon_cmd->tx.rate_n_flags = | |
508 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | |
509 | else | |
510 | tx_beacon_cmd->tx.rate_n_flags = | |
511 | iwl_hw_set_rate_n_flags(rate, 0); | |
512 | ||
513 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
514 | TX_CMD_FLG_TSF_MSK | | |
515 | TX_CMD_FLG_STA_RATE_MSK; | |
516 | ||
517 | return sizeof(*tx_beacon_cmd) + frame_size; | |
518 | } | |
c79dd5b5 | 519 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 520 | { |
fcab423d | 521 | struct iwl_frame *frame; |
b481de9c ZY |
522 | unsigned int frame_size; |
523 | int rc; | |
524 | u8 rate; | |
525 | ||
fcab423d | 526 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
527 | |
528 | if (!frame) { | |
529 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
530 | "command.\n"); | |
531 | return -ENOMEM; | |
532 | } | |
533 | ||
39e88504 | 534 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 535 | |
bb8c093b | 536 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 537 | |
857485c0 | 538 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
539 | &frame->u.cmd[0]); |
540 | ||
fcab423d | 541 | iwl_free_frame(priv, frame); |
b481de9c ZY |
542 | |
543 | return rc; | |
544 | } | |
545 | ||
b481de9c ZY |
546 | /****************************************************************************** |
547 | * | |
548 | * Misc. internal state and helper functions | |
549 | * | |
550 | ******************************************************************************/ | |
b481de9c | 551 | |
d1141dfb EG |
552 | static void iwl4965_ht_conf(struct iwl_priv *priv, |
553 | struct ieee80211_bss_conf *bss_conf) | |
554 | { | |
ae5eb026 | 555 | struct ieee80211_sta_ht_cap *ht_conf; |
d1141dfb | 556 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; |
ae5eb026 | 557 | struct ieee80211_sta *sta; |
d1141dfb EG |
558 | |
559 | IWL_DEBUG_MAC80211("enter: \n"); | |
560 | ||
d1141dfb EG |
561 | if (!iwl_conf->is_ht) |
562 | return; | |
563 | ||
ae5eb026 JB |
564 | |
565 | /* | |
566 | * It is totally wrong to base global information on something | |
567 | * that is valid only when associated, alas, this driver works | |
568 | * that way and I don't know how to fix it. | |
569 | */ | |
570 | ||
571 | rcu_read_lock(); | |
572 | sta = ieee80211_find_sta(priv->hw, priv->bssid); | |
573 | if (!sta) { | |
574 | rcu_read_unlock(); | |
575 | return; | |
576 | } | |
577 | ht_conf = &sta->ht_cap; | |
578 | ||
d1141dfb | 579 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) |
a9841013 | 580 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 581 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 582 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
583 | |
584 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
585 | iwl_conf->max_amsdu_size = | |
586 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
587 | ||
588 | iwl_conf->supported_chan_width = | |
d9fe60de | 589 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40); |
ae5eb026 JB |
590 | |
591 | iwl_conf->extension_chan_offset = bss_conf->ht.secondary_channel_offset; | |
d1141dfb | 592 | /* If no above or below channel supplied disable FAT channel */ |
d9fe60de JB |
593 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE && |
594 | iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW) { | |
595 | iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; | |
d1141dfb | 596 | iwl_conf->supported_chan_width = 0; |
963f5517 | 597 | } |
d1141dfb | 598 | |
12837be1 RR |
599 | iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2); |
600 | ||
d9fe60de | 601 | memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16); |
d1141dfb | 602 | |
ae5eb026 | 603 | iwl_conf->tx_chan_width = bss_conf->ht.width_40_ok; |
d1141dfb | 604 | iwl_conf->ht_protection = |
ae5eb026 | 605 | bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; |
d1141dfb | 606 | iwl_conf->non_GF_STA_present = |
ae5eb026 JB |
607 | !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); |
608 | ||
609 | rcu_read_unlock(); | |
d1141dfb | 610 | |
d1141dfb EG |
611 | IWL_DEBUG_MAC80211("leave\n"); |
612 | } | |
613 | ||
b481de9c ZY |
614 | /* |
615 | * QoS support | |
616 | */ | |
1ff50bda | 617 | static void iwl_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c | 618 | { |
b481de9c ZY |
619 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
620 | return; | |
621 | ||
622 | if (!priv->qos_data.qos_enable) | |
623 | return; | |
624 | ||
b481de9c ZY |
625 | priv->qos_data.def_qos_parm.qos_flags = 0; |
626 | ||
627 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
628 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
629 | priv->qos_data.def_qos_parm.qos_flags |= | |
630 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
631 | if (priv->qos_data.qos_active) |
632 | priv->qos_data.def_qos_parm.qos_flags |= | |
633 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
634 | ||
fd105e79 | 635 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 636 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 637 | |
3109ece1 | 638 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
639 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
640 | priv->qos_data.qos_active, | |
641 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 642 | |
1ff50bda EG |
643 | iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM, |
644 | sizeof(struct iwl_qosparam_cmd), | |
645 | &priv->qos_data.def_qos_parm, NULL); | |
b481de9c ZY |
646 | } |
647 | } | |
648 | ||
b481de9c | 649 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
b481de9c | 650 | |
3195c1f3 | 651 | static u16 iwl_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
652 | { |
653 | u16 new_val = 0; | |
654 | u16 beacon_factor = 0; | |
655 | ||
3195c1f3 TW |
656 | beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL) |
657 | / MAX_UCODE_BEACON_INTERVAL; | |
b481de9c ZY |
658 | new_val = beacon_val / beacon_factor; |
659 | ||
3195c1f3 | 660 | return new_val; |
b481de9c ZY |
661 | } |
662 | ||
3195c1f3 | 663 | static void iwl_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c | 664 | { |
3195c1f3 TW |
665 | u64 tsf; |
666 | s32 interval_tm, rem; | |
b481de9c ZY |
667 | unsigned long flags; |
668 | struct ieee80211_conf *conf = NULL; | |
669 | u16 beacon_int = 0; | |
670 | ||
671 | conf = ieee80211_get_hw_conf(priv->hw); | |
672 | ||
673 | spin_lock_irqsave(&priv->lock, flags); | |
3195c1f3 | 674 | priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp); |
b5d7be5e | 675 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
b481de9c | 676 | |
05c914fe | 677 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
3195c1f3 | 678 | beacon_int = iwl_adjust_beacon_interval(priv->beacon_int); |
b481de9c ZY |
679 | priv->rxon_timing.atim_window = 0; |
680 | } else { | |
3195c1f3 TW |
681 | beacon_int = iwl_adjust_beacon_interval(conf->beacon_int); |
682 | ||
b481de9c ZY |
683 | /* TODO: we need to get atim_window from upper stack |
684 | * for now we set to 0 */ | |
685 | priv->rxon_timing.atim_window = 0; | |
686 | } | |
687 | ||
3195c1f3 | 688 | priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int); |
b481de9c | 689 | |
3195c1f3 TW |
690 | tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ |
691 | interval_tm = beacon_int * 1024; | |
692 | rem = do_div(tsf, interval_tm); | |
693 | priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem); | |
694 | ||
695 | spin_unlock_irqrestore(&priv->lock, flags); | |
696 | IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n", | |
697 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
698 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
699 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
b481de9c ZY |
700 | } |
701 | ||
82a66bbb TW |
702 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
703 | enum ieee80211_band band) | |
b481de9c | 704 | { |
8318d78a | 705 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
706 | priv->staging_rxon.flags &= |
707 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
708 | | RXON_FLG_CCK_MSK); | |
709 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
710 | } else { | |
508e32e1 | 711 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
712 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
713 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
714 | else | |
715 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
716 | ||
05c914fe | 717 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
718 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
719 | ||
720 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
721 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
722 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
723 | } | |
724 | } | |
725 | ||
726 | /* | |
01ebd063 | 727 | * initialize rxon structure with default values from eeprom |
b481de9c | 728 | */ |
c79dd5b5 | 729 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 730 | { |
bf85ea4f | 731 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
732 | |
733 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
734 | ||
735 | switch (priv->iw_mode) { | |
05c914fe | 736 | case NL80211_IFTYPE_AP: |
b481de9c ZY |
737 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; |
738 | break; | |
739 | ||
05c914fe | 740 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
741 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; |
742 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
743 | break; | |
744 | ||
05c914fe | 745 | case NL80211_IFTYPE_ADHOC: |
b481de9c ZY |
746 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; |
747 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
748 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
749 | RXON_FILTER_ACCEPT_GRP_MSK; | |
750 | break; | |
751 | ||
05c914fe | 752 | case NL80211_IFTYPE_MONITOR: |
b481de9c ZY |
753 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; |
754 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
755 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
756 | break; | |
69dc5d9d TW |
757 | default: |
758 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
759 | break; | |
b481de9c ZY |
760 | } |
761 | ||
762 | #if 0 | |
763 | /* TODO: Figure out when short_preamble would be set and cache from | |
764 | * that */ | |
765 | if (!hw_to_local(priv->hw)->short_preamble) | |
766 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
767 | else | |
768 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
769 | #endif | |
770 | ||
8622e705 | 771 | ch_info = iwl_get_channel_info(priv, priv->band, |
25b3f57c | 772 | le16_to_cpu(priv->active_rxon.channel)); |
b481de9c ZY |
773 | |
774 | if (!ch_info) | |
775 | ch_info = &priv->channel_info[0]; | |
776 | ||
777 | /* | |
778 | * in some case A channels are all non IBSS | |
779 | * in this case force B/G channel | |
780 | */ | |
05c914fe | 781 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && |
b481de9c ZY |
782 | !(is_channel_ibss(ch_info))) |
783 | ch_info = &priv->channel_info[0]; | |
784 | ||
785 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 786 | priv->band = ch_info->band; |
b481de9c | 787 | |
82a66bbb | 788 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
789 | |
790 | priv->staging_rxon.ofdm_basic_rates = | |
791 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
792 | priv->staging_rxon.cck_basic_rates = | |
793 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
794 | ||
795 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
796 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
797 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
798 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
799 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
800 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 801 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
802 | } |
803 | ||
c79dd5b5 | 804 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 805 | { |
b481de9c ZY |
806 | priv->iw_mode = mode; |
807 | ||
bb8c093b | 808 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
809 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
810 | ||
37deb2a0 | 811 | iwl_clear_stations_table(priv); |
b481de9c | 812 | |
fde3571f | 813 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 814 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
815 | return -EAGAIN; |
816 | ||
817 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 818 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
819 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
820 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
821 | return -EAGAIN; | |
822 | } | |
823 | ||
bb8c093b | 824 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
825 | |
826 | return 0; | |
827 | } | |
828 | ||
c79dd5b5 | 829 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 830 | { |
8318d78a | 831 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
832 | struct ieee80211_rate *rate; |
833 | int i; | |
834 | ||
d1141dfb | 835 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
836 | if (!hw) { |
837 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
838 | return; | |
839 | } | |
b481de9c ZY |
840 | |
841 | priv->active_rate = 0; | |
842 | priv->active_rate_basic = 0; | |
843 | ||
8318d78a JB |
844 | for (i = 0; i < hw->n_bitrates; i++) { |
845 | rate = &(hw->bitrates[i]); | |
846 | if (rate->hw_value < IWL_RATE_COUNT) | |
847 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
848 | } |
849 | ||
850 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
851 | priv->active_rate, priv->active_rate_basic); | |
852 | ||
853 | /* | |
854 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
855 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
856 | * OFDM | |
857 | */ | |
858 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
859 | priv->staging_rxon.cck_basic_rates = | |
860 | ((priv->active_rate_basic & | |
861 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
862 | else | |
863 | priv->staging_rxon.cck_basic_rates = | |
864 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
865 | ||
866 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
867 | priv->staging_rxon.ofdm_basic_rates = | |
868 | ((priv->active_rate_basic & | |
869 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
870 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
871 | else | |
872 | priv->staging_rxon.ofdm_basic_rates = | |
873 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
874 | } | |
875 | ||
4fc22b21 | 876 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
877 | |
878 | #include "iwl-spectrum.h" | |
879 | ||
880 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
881 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
882 | #define TIME_UNIT 1024 | |
883 | ||
884 | /* | |
885 | * extended beacon time format | |
886 | * time in usec will be changed into a 32-bit value in 8:24 format | |
887 | * the high 1 byte is the beacon counts | |
888 | * the lower 3 bytes is the time in usec within one beacon interval | |
889 | */ | |
890 | ||
bb8c093b | 891 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
892 | { |
893 | u32 quot; | |
894 | u32 rem; | |
895 | u32 interval = beacon_interval * 1024; | |
896 | ||
897 | if (!interval || !usec) | |
898 | return 0; | |
899 | ||
900 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
901 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
902 | ||
903 | return (quot << 24) + rem; | |
904 | } | |
905 | ||
906 | /* base is usually what we get from ucode with each received frame, | |
907 | * the same as HW timer counter counting down | |
908 | */ | |
909 | ||
bb8c093b | 910 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
911 | { |
912 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
913 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
914 | u32 interval = beacon_interval * TIME_UNIT; | |
915 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
916 | (addon & BEACON_TIME_MASK_HIGH); | |
917 | ||
918 | if (base_low > addon_low) | |
919 | res += base_low - addon_low; | |
920 | else if (base_low < addon_low) { | |
921 | res += interval + base_low - addon_low; | |
922 | res += (1 << 24); | |
923 | } else | |
924 | res += (1 << 24); | |
925 | ||
926 | return cpu_to_le32(res); | |
927 | } | |
928 | ||
c79dd5b5 | 929 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
930 | struct ieee80211_measurement_params *params, |
931 | u8 type) | |
932 | { | |
bb8c093b | 933 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 934 | struct iwl_rx_packet *res; |
857485c0 | 935 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
936 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
937 | .data = (void *)&spectrum, | |
938 | .meta.flags = CMD_WANT_SKB, | |
939 | }; | |
940 | u32 add_time = le64_to_cpu(params->start_time); | |
941 | int rc; | |
942 | int spectrum_resp_status; | |
943 | int duration = le16_to_cpu(params->duration); | |
944 | ||
3109ece1 | 945 | if (iwl_is_associated(priv)) |
b481de9c | 946 | add_time = |
bb8c093b | 947 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
948 | le64_to_cpu(params->start_time) - priv->last_tsf, |
949 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
950 | ||
951 | memset(&spectrum, 0, sizeof(spectrum)); | |
952 | ||
953 | spectrum.channel_count = cpu_to_le16(1); | |
954 | spectrum.flags = | |
955 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
956 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
957 | cmd.len = sizeof(spectrum); | |
958 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
959 | ||
3109ece1 | 960 | if (iwl_is_associated(priv)) |
b481de9c | 961 | spectrum.start_time = |
bb8c093b | 962 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
963 | add_time, |
964 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
965 | else | |
966 | spectrum.start_time = 0; | |
967 | ||
968 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
969 | spectrum.channels[0].channel = params->channel; | |
970 | spectrum.channels[0].type = type; | |
971 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
972 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
973 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
974 | ||
857485c0 | 975 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
976 | if (rc) |
977 | return rc; | |
978 | ||
db11d634 | 979 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
980 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
981 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
982 | rc = -EIO; | |
983 | } | |
984 | ||
985 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
986 | switch (spectrum_resp_status) { | |
987 | case 0: /* Command will be handled */ | |
988 | if (res->u.spectrum.id != 0xff) { | |
989 | IWL_DEBUG_INFO | |
990 | ("Replaced existing measurement: %d\n", | |
991 | res->u.spectrum.id); | |
992 | priv->measurement_status &= ~MEASUREMENT_READY; | |
993 | } | |
994 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
995 | rc = 0; | |
996 | break; | |
997 | ||
998 | case 1: /* Command will not be handled */ | |
999 | rc = -EAGAIN; | |
1000 | break; | |
1001 | } | |
1002 | ||
1003 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1004 | ||
1005 | return rc; | |
1006 | } | |
1007 | #endif | |
1008 | ||
b481de9c ZY |
1009 | /****************************************************************************** |
1010 | * | |
1011 | * Generic RX handler implementations | |
1012 | * | |
1013 | ******************************************************************************/ | |
885ba202 TW |
1014 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1015 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1016 | { |
db11d634 | 1017 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1018 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1019 | struct delayed_work *pwork; |
1020 | ||
1021 | palive = &pkt->u.alive_frame; | |
1022 | ||
1023 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1024 | "0x%01X 0x%01X\n", | |
1025 | palive->is_valid, palive->ver_type, | |
1026 | palive->ver_subtype); | |
1027 | ||
1028 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1029 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1030 | memcpy(&priv->card_alive_init, | |
1031 | &pkt->u.alive_frame, | |
885ba202 | 1032 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1033 | pwork = &priv->init_alive_start; |
1034 | } else { | |
1035 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1036 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1037 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1038 | pwork = &priv->alive_start; |
1039 | } | |
1040 | ||
1041 | /* We delay the ALIVE response by 5ms to | |
1042 | * give the HW RF Kill time to activate... */ | |
1043 | if (palive->is_valid == UCODE_VALID_OK) | |
1044 | queue_delayed_work(priv->workqueue, pwork, | |
1045 | msecs_to_jiffies(5)); | |
1046 | else | |
1047 | IWL_WARNING("uCode did not respond OK.\n"); | |
1048 | } | |
1049 | ||
c79dd5b5 | 1050 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1051 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1052 | { |
db11d634 | 1053 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1054 | |
1055 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1056 | "seq 0x%04X ser 0x%08X\n", | |
1057 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1058 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1059 | pkt->u.err_resp.cmd_id, | |
1060 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1061 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1062 | } | |
1063 | ||
1064 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1065 | ||
a55360e4 | 1066 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1067 | { |
db11d634 | 1068 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1069 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1070 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1071 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1072 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1073 | rxon->channel = csa->channel; | |
1074 | priv->staging_rxon.channel = csa->channel; | |
1075 | } | |
1076 | ||
c79dd5b5 | 1077 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1078 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1079 | { |
4fc22b21 | 1080 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
db11d634 | 1081 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1082 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1083 | |
1084 | if (!report->state) { | |
f3d67999 EK |
1085 | IWL_DEBUG(IWL_DL_11H, |
1086 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1087 | return; |
1088 | } | |
1089 | ||
1090 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1091 | priv->measurement_status |= MEASUREMENT_READY; | |
1092 | #endif | |
1093 | } | |
1094 | ||
c79dd5b5 | 1095 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1096 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1097 | { |
0a6857e7 | 1098 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1099 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1100 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1101 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1102 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1103 | #endif | |
1104 | } | |
1105 | ||
c79dd5b5 | 1106 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1107 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1108 | { |
db11d634 | 1109 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1110 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1111 | "notification for %s:\n", | |
1112 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1113 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1114 | } |
1115 | ||
bb8c093b | 1116 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 1117 | { |
c79dd5b5 TW |
1118 | struct iwl_priv *priv = |
1119 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1120 | struct sk_buff *beacon; |
1121 | ||
1122 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1123 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1124 | |
1125 | if (!beacon) { | |
1126 | IWL_ERROR("update beacon failed\n"); | |
1127 | return; | |
1128 | } | |
1129 | ||
1130 | mutex_lock(&priv->mutex); | |
1131 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1132 | if (priv->ibss_beacon) | |
1133 | dev_kfree_skb(priv->ibss_beacon); | |
1134 | ||
1135 | priv->ibss_beacon = beacon; | |
1136 | mutex_unlock(&priv->mutex); | |
1137 | ||
bb8c093b | 1138 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
1139 | } |
1140 | ||
4e39317d EG |
1141 | /** |
1142 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics | |
1143 | * | |
1144 | * This callback is provided in order to send a statistics request. | |
1145 | * | |
1146 | * This timer function is continually reset to execute within | |
1147 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1148 | * was received. We need to ensure we receive the statistics in order | |
1149 | * to update the temperature used for calibrating the TXPOWER. | |
1150 | */ | |
1151 | static void iwl4965_bg_statistics_periodic(unsigned long data) | |
1152 | { | |
1153 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1154 | ||
1155 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1156 | return; | |
1157 | ||
1158 | iwl_send_statistics_request(priv, CMD_ASYNC); | |
1159 | } | |
1160 | ||
c79dd5b5 | 1161 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1162 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1163 | { |
0a6857e7 | 1164 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1165 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1166 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1167 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1168 | |
1169 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1170 | "tsf %d %d rate %d\n", | |
25a6572c | 1171 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1172 | beacon->beacon_notify_hdr.failure_frame, |
1173 | le32_to_cpu(beacon->ibss_mgr_status), | |
1174 | le32_to_cpu(beacon->high_tsf), | |
1175 | le32_to_cpu(beacon->low_tsf), rate); | |
1176 | #endif | |
1177 | ||
05c914fe | 1178 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
b481de9c ZY |
1179 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) |
1180 | queue_work(priv->workqueue, &priv->beacon_update); | |
1181 | } | |
1182 | ||
b481de9c ZY |
1183 | /* Handle notification from uCode that card's power state is changing |
1184 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 1185 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1186 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1187 | { |
db11d634 | 1188 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1189 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1190 | unsigned long status = priv->status; | |
1191 | ||
1192 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1193 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1194 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1195 | ||
1196 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1197 | RF_CARD_DISABLED)) { | |
1198 | ||
3395f6e9 | 1199 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1200 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1201 | ||
3395f6e9 TW |
1202 | if (!iwl_grab_nic_access(priv)) { |
1203 | iwl_write_direct32( | |
b481de9c ZY |
1204 | priv, HBUS_TARG_MBX_C, |
1205 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1206 | ||
3395f6e9 | 1207 | iwl_release_nic_access(priv); |
b481de9c ZY |
1208 | } |
1209 | ||
1210 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1211 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1212 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1213 | if (!iwl_grab_nic_access(priv)) { |
1214 | iwl_write_direct32( | |
b481de9c ZY |
1215 | priv, HBUS_TARG_MBX_C, |
1216 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1217 | ||
3395f6e9 | 1218 | iwl_release_nic_access(priv); |
b481de9c ZY |
1219 | } |
1220 | } | |
1221 | ||
1222 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1223 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1224 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1225 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1226 | if (!iwl_grab_nic_access(priv)) | |
1227 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1228 | } |
1229 | } | |
1230 | ||
1231 | if (flags & HW_CARD_DISABLED) | |
1232 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1233 | else | |
1234 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1235 | ||
1236 | ||
1237 | if (flags & SW_CARD_DISABLED) | |
1238 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1239 | else | |
1240 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1241 | ||
1242 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1243 | iwl_scan_cancel(priv); |
b481de9c ZY |
1244 | |
1245 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1246 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1247 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1248 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1249 | queue_work(priv->workqueue, &priv->rf_kill); | |
1250 | else | |
1251 | wake_up_interruptible(&priv->wait_command_queue); | |
1252 | } | |
1253 | ||
e2e3c57b TW |
1254 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
1255 | { | |
1256 | int ret; | |
1257 | unsigned long flags; | |
1258 | ||
1259 | spin_lock_irqsave(&priv->lock, flags); | |
1260 | ret = iwl_grab_nic_access(priv); | |
1261 | if (ret) | |
1262 | goto err; | |
1263 | ||
1264 | if (src == IWL_PWR_SRC_VAUX) { | |
1265 | u32 val; | |
e7b63581 | 1266 | ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE, |
e2e3c57b TW |
1267 | &val); |
1268 | ||
1269 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | |
1270 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1271 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | |
1272 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1273 | } else { | |
1274 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1275 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | |
1276 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1277 | } | |
1278 | ||
1279 | iwl_release_nic_access(priv); | |
1280 | err: | |
1281 | spin_unlock_irqrestore(&priv->lock, flags); | |
1282 | return ret; | |
1283 | } | |
1284 | ||
b481de9c | 1285 | /** |
bb8c093b | 1286 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1287 | * |
1288 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1289 | * to the host. | |
1290 | * | |
1291 | * This function chains into the hardware specific files for them to setup | |
1292 | * any hardware specific handlers as well. | |
1293 | */ | |
653fa4a0 | 1294 | static void iwl_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1295 | { |
885ba202 | 1296 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
bb8c093b CH |
1297 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; |
1298 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 1299 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
1300 | iwl4965_rx_spectrum_measure_notif; |
1301 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 1302 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
1303 | iwl4965_rx_pm_debug_statistics_notif; |
1304 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 1305 | |
9fbab516 BC |
1306 | /* |
1307 | * The same handler is used for both the REPLY to a discrete | |
1308 | * statistics request from the host as well as for the periodic | |
1309 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1310 | */ |
8f91aecb EG |
1311 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; |
1312 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; | |
2a421b91 TW |
1313 | |
1314 | iwl_setup_rx_scan_handlers(priv); | |
1315 | ||
37a44211 | 1316 | /* status change handler */ |
bb8c093b | 1317 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; |
b481de9c | 1318 | |
c1354754 TW |
1319 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1320 | iwl_rx_missed_beacon_notif; | |
37a44211 | 1321 | /* Rx handlers */ |
1781a07f EG |
1322 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy; |
1323 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx; | |
653fa4a0 EG |
1324 | /* block ack */ |
1325 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba; | |
9fbab516 | 1326 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1327 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1328 | } |
1329 | ||
5c0eef96 MA |
1330 | /* |
1331 | * this should be called while priv->lock is locked | |
1332 | */ | |
a55360e4 | 1333 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1334 | { |
a55360e4 TW |
1335 | iwl_rx_allocate(priv); |
1336 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1337 | } |
1338 | ||
b481de9c ZY |
1339 | |
1340 | /** | |
a55360e4 | 1341 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1342 | * |
1343 | * Uses the priv->rx_handlers callback function array to invoke | |
1344 | * the appropriate handlers, including command responses, | |
1345 | * frame-received notifications, and other notifications. | |
1346 | */ | |
a55360e4 | 1347 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1348 | { |
a55360e4 | 1349 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1350 | struct iwl_rx_packet *pkt; |
a55360e4 | 1351 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1352 | u32 r, i; |
1353 | int reclaim; | |
1354 | unsigned long flags; | |
5c0eef96 | 1355 | u8 fill_rx = 0; |
d68ab680 | 1356 | u32 count = 8; |
b481de9c | 1357 | |
6440adb5 CB |
1358 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1359 | * buffer that the driver may process (last buffer filled by ucode). */ | |
d67f5489 | 1360 | r = priv->cfg->ops->lib->shared_mem_rx_idx(priv); |
b481de9c ZY |
1361 | i = rxq->read; |
1362 | ||
1363 | /* Rx interrupt, but nothing sent from uCode */ | |
1364 | if (i == r) | |
f3d67999 | 1365 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1366 | |
a55360e4 | 1367 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1368 | fill_rx = 1; |
1369 | ||
b481de9c ZY |
1370 | while (i != r) { |
1371 | rxb = rxq->queue[i]; | |
1372 | ||
9fbab516 | 1373 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1374 | * then a bug has been introduced in the queue refilling |
1375 | * routines -- catch it here */ | |
1376 | BUG_ON(rxb == NULL); | |
1377 | ||
1378 | rxq->queue[i] = NULL; | |
1379 | ||
1380 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1381 | priv->hw_params.rx_buf_size, |
b481de9c | 1382 | PCI_DMA_FROMDEVICE); |
db11d634 | 1383 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1384 | |
1385 | /* Reclaim a command buffer only if this packet is a response | |
1386 | * to a (driver-originated) command. | |
1387 | * If the packet (e.g. Rx frame) originated from uCode, | |
1388 | * there is no command buffer to reclaim. | |
1389 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1390 | * but apparently a few don't get set; catch them here. */ | |
1391 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1392 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1393 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 1394 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1395 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1396 | (pkt->hdr.cmd != REPLY_TX); | |
1397 | ||
1398 | /* Based on type of command response or notification, | |
1399 | * handle those that need handling via function in | |
bb8c093b | 1400 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c | 1401 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1402 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1403 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1404 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1405 | } else { | |
1406 | /* No handling needed */ | |
f3d67999 | 1407 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1408 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1409 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1410 | pkt->hdr.cmd); | |
1411 | } | |
1412 | ||
1413 | if (reclaim) { | |
9fbab516 | 1414 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1415 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1416 | * as we reclaim the driver command queue */ |
1417 | if (rxb && rxb->skb) | |
17b88929 | 1418 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1419 | else |
1420 | IWL_WARNING("Claim null rxb?\n"); | |
1421 | } | |
1422 | ||
1423 | /* For now we just don't re-use anything. We can tweak this | |
1424 | * later to try and re-use notification packets and SKBs that | |
1425 | * fail to Rx correctly */ | |
1426 | if (rxb->skb != NULL) { | |
1427 | priv->alloc_rxb_skb--; | |
1428 | dev_kfree_skb_any(rxb->skb); | |
1429 | rxb->skb = NULL; | |
1430 | } | |
1431 | ||
1432 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1433 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 1434 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1435 | spin_lock_irqsave(&rxq->lock, flags); |
1436 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1437 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1438 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1439 | /* If there are a lot of unused frames, |
1440 | * restock the Rx queue so ucode wont assert. */ | |
1441 | if (fill_rx) { | |
1442 | count++; | |
1443 | if (count >= 8) { | |
1444 | priv->rxq.read = i; | |
a55360e4 | 1445 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1446 | count = 0; |
1447 | } | |
1448 | } | |
b481de9c ZY |
1449 | } |
1450 | ||
1451 | /* Backtrack one entry */ | |
1452 | priv->rxq.read = i; | |
a55360e4 TW |
1453 | iwl_rx_queue_restock(priv); |
1454 | } | |
a55360e4 | 1455 | |
0a6857e7 | 1456 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1457 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1458 | { |
c1adf9fb | 1459 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 | 1460 | |
b481de9c | 1461 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1462 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1463 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1464 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1465 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1466 | le32_to_cpu(rxon->filter_flags)); | |
1467 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1468 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1469 | rxon->ofdm_basic_rates); | |
1470 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
e174961c JB |
1471 | IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); |
1472 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); | |
b481de9c ZY |
1473 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1474 | } | |
1475 | #endif | |
1476 | ||
c79dd5b5 | 1477 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1478 | { |
1479 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1480 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1481 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1482 | } |
1483 | ||
0359facc MA |
1484 | /* call this function to flush any scheduled tasklet */ |
1485 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1486 | { | |
1487 | /* wait to make sure we flush pedding tasklet*/ | |
1488 | synchronize_irq(priv->pci_dev->irq); | |
1489 | tasklet_kill(&priv->irq_tasklet); | |
1490 | } | |
1491 | ||
c79dd5b5 | 1492 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1493 | { |
1494 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1495 | ||
1496 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1497 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1498 | |
1499 | /* acknowledge/clear/reset any interrupts still pending | |
1500 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1501 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1502 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1503 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1504 | } | |
1505 | ||
b481de9c | 1506 | |
b481de9c | 1507 | /** |
bb8c093b | 1508 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1509 | */ |
c79dd5b5 | 1510 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1511 | { |
bb8c093b | 1512 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
1513 | set_bit(STATUS_FW_ERROR, &priv->status); |
1514 | ||
1515 | /* Cancel currently queued command. */ | |
1516 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1517 | ||
0a6857e7 | 1518 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1519 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1520 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1521 | iwl_dump_nic_event_log(priv); |
bf403db8 | 1522 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
1523 | } |
1524 | #endif | |
1525 | ||
1526 | wake_up_interruptible(&priv->wait_command_queue); | |
1527 | ||
1528 | /* Keep the restart process from trying to send host | |
1529 | * commands by clearing the INIT status bit */ | |
1530 | clear_bit(STATUS_READY, &priv->status); | |
1531 | ||
1532 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1533 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1534 | "Restarting adapter due to uCode error.\n"); |
1535 | ||
3109ece1 | 1536 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1537 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1538 | sizeof(priv->recovery_rxon)); | |
1539 | priv->error_recovering = 1; | |
1540 | } | |
3a1081e8 EK |
1541 | if (priv->cfg->mod_params->restart_fw) |
1542 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1543 | } |
1544 | } | |
1545 | ||
c79dd5b5 | 1546 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1547 | { |
1548 | unsigned long flags; | |
1549 | ||
1550 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1551 | sizeof(priv->staging_rxon)); | |
1552 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 1553 | iwl4965_commit_rxon(priv); |
b481de9c | 1554 | |
4f40e4d9 | 1555 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1556 | |
1557 | spin_lock_irqsave(&priv->lock, flags); | |
1558 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1559 | priv->error_recovering = 0; | |
1560 | spin_unlock_irqrestore(&priv->lock, flags); | |
1561 | } | |
1562 | ||
c79dd5b5 | 1563 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1564 | { |
1565 | u32 inta, handled = 0; | |
1566 | u32 inta_fh; | |
1567 | unsigned long flags; | |
0a6857e7 | 1568 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1569 | u32 inta_mask; |
1570 | #endif | |
1571 | ||
1572 | spin_lock_irqsave(&priv->lock, flags); | |
1573 | ||
1574 | /* Ack/clear/reset pending uCode interrupts. | |
1575 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1576 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1577 | inta = iwl_read32(priv, CSR_INT); |
1578 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1579 | |
1580 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1581 | * Any new interrupts that happen after this, either while we're | |
1582 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1583 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1584 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1585 | |
0a6857e7 | 1586 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1587 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1588 | /* just for debug */ |
3395f6e9 | 1589 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1590 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1591 | inta, inta_mask, inta_fh); | |
1592 | } | |
1593 | #endif | |
1594 | ||
1595 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1596 | * atomic, make sure that inta covers all the interrupts that | |
1597 | * we've discovered, even if FH interrupt came in just after | |
1598 | * reading CSR_INT. */ | |
6f83eaa1 | 1599 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1600 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1601 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1602 | inta |= CSR_INT_BIT_FH_TX; |
1603 | ||
1604 | /* Now service all interrupt bits discovered above. */ | |
1605 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1606 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1607 | ||
1608 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 1609 | iwl4965_disable_interrupts(priv); |
b481de9c | 1610 | |
bb8c093b | 1611 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1612 | |
1613 | handled |= CSR_INT_BIT_HW_ERR; | |
1614 | ||
1615 | spin_unlock_irqrestore(&priv->lock, flags); | |
1616 | ||
1617 | return; | |
1618 | } | |
1619 | ||
0a6857e7 | 1620 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1621 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1622 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1623 | if (inta & CSR_INT_BIT_SCD) |
1624 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1625 | "the frame/frames.\n"); | |
b481de9c ZY |
1626 | |
1627 | /* Alive notification via Rx interrupt will do the real work */ | |
1628 | if (inta & CSR_INT_BIT_ALIVE) | |
1629 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1630 | } | |
1631 | #endif | |
1632 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1633 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1634 | |
9fbab516 | 1635 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1636 | if (inta & CSR_INT_BIT_RF_KILL) { |
1637 | int hw_rf_kill = 0; | |
3395f6e9 | 1638 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1639 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1640 | hw_rf_kill = 1; | |
1641 | ||
f3d67999 | 1642 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1643 | hw_rf_kill ? "disable radio":"enable radio"); |
1644 | ||
a9efa652 EG |
1645 | /* driver only loads ucode once setting the interface up. |
1646 | * the driver as well won't allow loading if RFKILL is set | |
1647 | * therefore no need to restart the driver from this handler | |
1648 | */ | |
1649 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) | |
53e49093 | 1650 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
b481de9c ZY |
1651 | |
1652 | handled |= CSR_INT_BIT_RF_KILL; | |
1653 | } | |
1654 | ||
9fbab516 | 1655 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1656 | if (inta & CSR_INT_BIT_CT_KILL) { |
1657 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1658 | handled |= CSR_INT_BIT_CT_KILL; | |
1659 | } | |
1660 | ||
1661 | /* Error detected by uCode */ | |
1662 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1663 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1664 | inta); | |
bb8c093b | 1665 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1666 | handled |= CSR_INT_BIT_SW_ERR; |
1667 | } | |
1668 | ||
1669 | /* uCode wakes up after power-down sleep */ | |
1670 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1671 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1672 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1673 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1674 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1675 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1676 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1677 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1678 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1679 | |
1680 | handled |= CSR_INT_BIT_WAKEUP; | |
1681 | } | |
1682 | ||
1683 | /* All uCode command responses, including Tx command responses, | |
1684 | * Rx "responses" (frame-received notification), and other | |
1685 | * notifications from uCode come through here*/ | |
1686 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1687 | iwl_rx_handle(priv); |
b481de9c ZY |
1688 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1689 | } | |
1690 | ||
1691 | if (inta & CSR_INT_BIT_FH_TX) { | |
1692 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1693 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1694 | /* FH finished to write, send event */ |
1695 | priv->ucode_write_complete = 1; | |
1696 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1697 | } |
1698 | ||
1699 | if (inta & ~handled) | |
1700 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1701 | ||
1702 | if (inta & ~CSR_INI_SET_MASK) { | |
1703 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1704 | inta & ~CSR_INI_SET_MASK); | |
1705 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1706 | } | |
1707 | ||
1708 | /* Re-enable all interrupts */ | |
0359facc MA |
1709 | /* only Re-enable if diabled by irq */ |
1710 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1711 | iwl4965_enable_interrupts(priv); | |
b481de9c | 1712 | |
0a6857e7 | 1713 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1714 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1715 | inta = iwl_read32(priv, CSR_INT); |
1716 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1717 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1718 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1719 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1720 | } | |
1721 | #endif | |
1722 | spin_unlock_irqrestore(&priv->lock, flags); | |
1723 | } | |
1724 | ||
bb8c093b | 1725 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 1726 | { |
c79dd5b5 | 1727 | struct iwl_priv *priv = data; |
b481de9c ZY |
1728 | u32 inta, inta_mask; |
1729 | u32 inta_fh; | |
1730 | if (!priv) | |
1731 | return IRQ_NONE; | |
1732 | ||
1733 | spin_lock(&priv->lock); | |
1734 | ||
1735 | /* Disable (but don't clear!) interrupts here to avoid | |
1736 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1737 | * If we have something to service, the tasklet will re-enable ints. | |
1738 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1739 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1740 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1741 | |
1742 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1743 | inta = iwl_read32(priv, CSR_INT); |
1744 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1745 | |
1746 | /* Ignore interrupt if there's nothing in NIC to service. | |
1747 | * This may be due to IRQ shared with another device, | |
1748 | * or due to sporadic interrupts thrown from our NIC. */ | |
1749 | if (!inta && !inta_fh) { | |
1750 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1751 | goto none; | |
1752 | } | |
1753 | ||
1754 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1755 | /* Hardware disappeared. It might have already raised |
1756 | * an interrupt */ | |
b481de9c | 1757 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1758 | goto unplugged; |
b481de9c ZY |
1759 | } |
1760 | ||
1761 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1762 | inta, inta_mask, inta_fh); | |
1763 | ||
25c03d8e JP |
1764 | inta &= ~CSR_INT_BIT_SCD; |
1765 | ||
bb8c093b | 1766 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1767 | if (likely(inta || inta_fh)) |
1768 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1769 | |
66fbb541 ON |
1770 | unplugged: |
1771 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1772 | return IRQ_HANDLED; |
1773 | ||
1774 | none: | |
1775 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1776 | /* only Re-enable if diabled by irq */ |
1777 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1778 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
1779 | spin_unlock(&priv->lock); |
1780 | return IRQ_NONE; | |
1781 | } | |
1782 | ||
b481de9c ZY |
1783 | /****************************************************************************** |
1784 | * | |
1785 | * uCode download functions | |
1786 | * | |
1787 | ******************************************************************************/ | |
1788 | ||
c79dd5b5 | 1789 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1790 | { |
98c92211 TW |
1791 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1792 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1793 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1794 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1795 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1796 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1797 | } |
1798 | ||
edcdf8b2 RR |
1799 | static void iwl4965_nic_start(struct iwl_priv *priv) |
1800 | { | |
1801 | /* Remove all resets to allow NIC to operate */ | |
1802 | iwl_write32(priv, CSR_RESET, 0); | |
1803 | } | |
1804 | ||
1805 | ||
b481de9c | 1806 | /** |
bb8c093b | 1807 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1808 | * |
1809 | * Copy into buffers for card to fetch via bus-mastering | |
1810 | */ | |
c79dd5b5 | 1811 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 1812 | { |
14b3d338 | 1813 | struct iwl_ucode *ucode; |
90e759d1 | 1814 | int ret; |
b481de9c | 1815 | const struct firmware *ucode_raw; |
4bf775cd | 1816 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
1817 | u8 *src; |
1818 | size_t len; | |
1819 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
1820 | ||
1821 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1822 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
1823 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
1824 | if (ret < 0) { | |
1825 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1826 | name, ret); | |
b481de9c ZY |
1827 | goto error; |
1828 | } | |
1829 | ||
1830 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1831 | name, ucode_raw->size); | |
1832 | ||
1833 | /* Make sure that we got at least our header! */ | |
1834 | if (ucode_raw->size < sizeof(*ucode)) { | |
1835 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1836 | ret = -EINVAL; |
b481de9c ZY |
1837 | goto err_release; |
1838 | } | |
1839 | ||
1840 | /* Data from ucode file: header followed by uCode images */ | |
1841 | ucode = (void *)ucode_raw->data; | |
1842 | ||
1843 | ver = le32_to_cpu(ucode->ver); | |
1844 | inst_size = le32_to_cpu(ucode->inst_size); | |
1845 | data_size = le32_to_cpu(ucode->data_size); | |
1846 | init_size = le32_to_cpu(ucode->init_size); | |
1847 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1848 | boot_size = le32_to_cpu(ucode->boot_size); | |
1849 | ||
1850 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
1851 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
1852 | inst_size); | |
1853 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1854 | data_size); | |
1855 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1856 | init_size); | |
1857 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1858 | init_data_size); | |
1859 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1860 | boot_size); | |
1861 | ||
1862 | /* Verify size of file vs. image size info in file's header */ | |
1863 | if (ucode_raw->size < sizeof(*ucode) + | |
1864 | inst_size + data_size + init_size + | |
1865 | init_data_size + boot_size) { | |
1866 | ||
1867 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1868 | (int)ucode_raw->size); | |
90e759d1 | 1869 | ret = -EINVAL; |
b481de9c ZY |
1870 | goto err_release; |
1871 | } | |
1872 | ||
1873 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1874 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1875 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1876 | inst_size); | |
1877 | ret = -EINVAL; | |
b481de9c ZY |
1878 | goto err_release; |
1879 | } | |
1880 | ||
099b40b7 | 1881 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
1882 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
1883 | data_size); | |
1884 | ret = -EINVAL; | |
b481de9c ZY |
1885 | goto err_release; |
1886 | } | |
099b40b7 | 1887 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 1888 | IWL_DEBUG_INFO |
90e759d1 TW |
1889 | ("uCode init instr len %d too large to fit in\n", |
1890 | init_size); | |
1891 | ret = -EINVAL; | |
b481de9c ZY |
1892 | goto err_release; |
1893 | } | |
099b40b7 | 1894 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 1895 | IWL_DEBUG_INFO |
90e759d1 TW |
1896 | ("uCode init data len %d too large to fit in\n", |
1897 | init_data_size); | |
1898 | ret = -EINVAL; | |
b481de9c ZY |
1899 | goto err_release; |
1900 | } | |
099b40b7 | 1901 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 1902 | IWL_DEBUG_INFO |
90e759d1 TW |
1903 | ("uCode boot instr len %d too large to fit in\n", |
1904 | boot_size); | |
1905 | ret = -EINVAL; | |
b481de9c ZY |
1906 | goto err_release; |
1907 | } | |
1908 | ||
1909 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
1910 | ||
1911 | /* Runtime instructions and 2 copies of data: | |
1912 | * 1) unmodified from disk | |
1913 | * 2) backup cache for save/restore during power-downs */ | |
1914 | priv->ucode_code.len = inst_size; | |
98c92211 | 1915 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
1916 | |
1917 | priv->ucode_data.len = data_size; | |
98c92211 | 1918 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
1919 | |
1920 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 1921 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
1922 | |
1923 | /* Initialization instructions and data */ | |
90e759d1 TW |
1924 | if (init_size && init_data_size) { |
1925 | priv->ucode_init.len = init_size; | |
98c92211 | 1926 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
1927 | |
1928 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 1929 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
1930 | |
1931 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
1932 | goto err_pci_alloc; | |
1933 | } | |
b481de9c ZY |
1934 | |
1935 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
1936 | if (boot_size) { |
1937 | priv->ucode_boot.len = boot_size; | |
98c92211 | 1938 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 1939 | |
90e759d1 TW |
1940 | if (!priv->ucode_boot.v_addr) |
1941 | goto err_pci_alloc; | |
1942 | } | |
b481de9c ZY |
1943 | |
1944 | /* Copy images into buffers for card's bus-master reads ... */ | |
1945 | ||
1946 | /* Runtime instructions (first block of data in file) */ | |
1947 | src = &ucode->data[0]; | |
1948 | len = priv->ucode_code.len; | |
90e759d1 | 1949 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
1950 | memcpy(priv->ucode_code.v_addr, src, len); |
1951 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
1952 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
1953 | ||
1954 | /* Runtime data (2nd block) | |
bb8c093b | 1955 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
1956 | src = &ucode->data[inst_size]; |
1957 | len = priv->ucode_data.len; | |
90e759d1 | 1958 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
1959 | memcpy(priv->ucode_data.v_addr, src, len); |
1960 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
1961 | ||
1962 | /* Initialization instructions (3rd block) */ | |
1963 | if (init_size) { | |
1964 | src = &ucode->data[inst_size + data_size]; | |
1965 | len = priv->ucode_init.len; | |
90e759d1 TW |
1966 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
1967 | len); | |
b481de9c ZY |
1968 | memcpy(priv->ucode_init.v_addr, src, len); |
1969 | } | |
1970 | ||
1971 | /* Initialization data (4th block) */ | |
1972 | if (init_data_size) { | |
1973 | src = &ucode->data[inst_size + data_size + init_size]; | |
1974 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
1975 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
1976 | len); | |
b481de9c ZY |
1977 | memcpy(priv->ucode_init_data.v_addr, src, len); |
1978 | } | |
1979 | ||
1980 | /* Bootstrap instructions (5th block) */ | |
1981 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
1982 | len = priv->ucode_boot.len; | |
90e759d1 | 1983 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
1984 | memcpy(priv->ucode_boot.v_addr, src, len); |
1985 | ||
1986 | /* We have our copies now, allow OS release its copies */ | |
1987 | release_firmware(ucode_raw); | |
1988 | return 0; | |
1989 | ||
1990 | err_pci_alloc: | |
1991 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 1992 | ret = -ENOMEM; |
bb8c093b | 1993 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
1994 | |
1995 | err_release: | |
1996 | release_firmware(ucode_raw); | |
1997 | ||
1998 | error: | |
90e759d1 | 1999 | return ret; |
b481de9c ZY |
2000 | } |
2001 | ||
b481de9c | 2002 | /** |
4a4a9e81 | 2003 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2004 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2005 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2006 | */ |
4a4a9e81 | 2007 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2008 | { |
57aab75a | 2009 | int ret = 0; |
b481de9c ZY |
2010 | |
2011 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2012 | ||
2013 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2014 | /* We had an error bringing up the hardware, so take it | |
2015 | * all the way back down so we can try again */ | |
2016 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2017 | goto restart; | |
2018 | } | |
2019 | ||
2020 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2021 | * This is a paranoid check, because we would not have gotten the | |
2022 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2023 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2024 | /* Runtime instruction load was bad; |
2025 | * take it all the way back down so we can try again */ | |
2026 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2027 | goto restart; | |
2028 | } | |
2029 | ||
37deb2a0 | 2030 | iwl_clear_stations_table(priv); |
57aab75a TW |
2031 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2032 | if (ret) { | |
b481de9c | 2033 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2034 | ret); |
b481de9c ZY |
2035 | goto restart; |
2036 | } | |
2037 | ||
9fbab516 | 2038 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
2039 | set_bit(STATUS_ALIVE, &priv->status); |
2040 | ||
fee1247a | 2041 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2042 | return; |
2043 | ||
36d6825b | 2044 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2045 | |
2046 | priv->active_rate = priv->rates_mask; | |
2047 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2048 | ||
3109ece1 | 2049 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2050 | struct iwl_rxon_cmd *active_rxon = |
2051 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2052 | |
2053 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2054 | sizeof(priv->staging_rxon)); | |
2055 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2056 | } else { | |
2057 | /* Initialize our rx_config data */ | |
bb8c093b | 2058 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2059 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2060 | } | |
2061 | ||
9fbab516 | 2062 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 2063 | iwl4965_send_bt_config(priv); |
b481de9c | 2064 | |
4a4a9e81 TW |
2065 | iwl_reset_run_time_calib(priv); |
2066 | ||
b481de9c | 2067 | /* Configure the adapter for unassociated operation */ |
bb8c093b | 2068 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2069 | |
2070 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2071 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2072 | |
fe00b5a5 RC |
2073 | iwl_leds_register(priv); |
2074 | ||
b481de9c | 2075 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2076 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2077 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2078 | |
2079 | if (priv->error_recovering) | |
bb8c093b | 2080 | iwl4965_error_recovery(priv); |
b481de9c | 2081 | |
58d0f361 | 2082 | iwl_power_update_mode(priv, 1); |
c46fbefa AK |
2083 | |
2084 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) | |
2085 | iwl4965_set_mode(priv, priv->iw_mode); | |
2086 | ||
b481de9c ZY |
2087 | return; |
2088 | ||
2089 | restart: | |
2090 | queue_work(priv->workqueue, &priv->restart); | |
2091 | } | |
2092 | ||
4e39317d | 2093 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2094 | |
c79dd5b5 | 2095 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2096 | { |
2097 | unsigned long flags; | |
2098 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2099 | |
2100 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2101 | ||
b481de9c ZY |
2102 | if (!exit_pending) |
2103 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2104 | ||
ab53d8af MA |
2105 | iwl_leds_unregister(priv); |
2106 | ||
37deb2a0 | 2107 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2108 | |
2109 | /* Unblock any waiting calls */ | |
2110 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2111 | ||
b481de9c ZY |
2112 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2113 | * exiting the module */ | |
2114 | if (!exit_pending) | |
2115 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2116 | ||
2117 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2118 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2119 | |
2120 | /* tell the device to stop sending interrupts */ | |
0359facc | 2121 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 2122 | iwl4965_disable_interrupts(priv); |
0359facc MA |
2123 | spin_unlock_irqrestore(&priv->lock, flags); |
2124 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2125 | |
2126 | if (priv->mac80211_registered) | |
2127 | ieee80211_stop_queues(priv->hw); | |
2128 | ||
bb8c093b | 2129 | /* If we have not previously called iwl4965_init() then |
b481de9c | 2130 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2131 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2132 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2133 | STATUS_RF_KILL_HW | | |
2134 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2135 | STATUS_RF_KILL_SW | | |
9788864e RC |
2136 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2137 | STATUS_GEO_CONFIGURED | | |
b481de9c | 2138 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
052ec3f1 MA |
2139 | STATUS_IN_SUSPEND | |
2140 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2141 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2142 | goto exit; |
2143 | } | |
2144 | ||
2145 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2146 | * SUSPEND bits and continue taking the NIC down. */ | |
2147 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2148 | STATUS_RF_KILL_HW | | |
2149 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2150 | STATUS_RF_KILL_SW | | |
9788864e RC |
2151 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2152 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2153 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2154 | STATUS_IN_SUSPEND | | |
2155 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
052ec3f1 MA |
2156 | STATUS_FW_ERROR | |
2157 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2158 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2159 | |
2160 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2161 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2162 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2163 | spin_unlock_irqrestore(&priv->lock, flags); |
2164 | ||
da1bc453 | 2165 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2166 | iwl_rxq_stop(priv); |
b481de9c ZY |
2167 | |
2168 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2169 | if (!iwl_grab_nic_access(priv)) { |
2170 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2171 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2172 | iwl_release_nic_access(priv); |
b481de9c ZY |
2173 | } |
2174 | spin_unlock_irqrestore(&priv->lock, flags); | |
2175 | ||
2176 | udelay(5); | |
2177 | ||
7f066108 | 2178 | /* FIXME: apm_ops.suspend(priv) */ |
d535311e GG |
2179 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
2180 | priv->cfg->ops->lib->apm_ops.stop(priv); | |
2181 | else | |
2182 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2183 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2184 | |
2185 | exit: | |
885ba202 | 2186 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2187 | |
2188 | if (priv->ibss_beacon) | |
2189 | dev_kfree_skb(priv->ibss_beacon); | |
2190 | priv->ibss_beacon = NULL; | |
2191 | ||
2192 | /* clear out any free frames */ | |
fcab423d | 2193 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2194 | } |
2195 | ||
c79dd5b5 | 2196 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2197 | { |
2198 | mutex_lock(&priv->mutex); | |
bb8c093b | 2199 | __iwl4965_down(priv); |
b481de9c | 2200 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2201 | |
4e39317d | 2202 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2203 | } |
2204 | ||
2205 | #define MAX_HW_RESTARTS 5 | |
2206 | ||
c79dd5b5 | 2207 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 2208 | { |
57aab75a TW |
2209 | int i; |
2210 | int ret; | |
b481de9c ZY |
2211 | |
2212 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2213 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2214 | return -EIO; | |
2215 | } | |
2216 | ||
e903fbd4 RC |
2217 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2218 | IWL_ERROR("ucode not available for device bringup\n"); | |
2219 | return -EIO; | |
2220 | } | |
2221 | ||
e655b9f0 | 2222 | /* If platform's RF_KILL switch is NOT set to KILL */ |
c1842d61 | 2223 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
e655b9f0 | 2224 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2225 | else |
e655b9f0 | 2226 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2227 | |
c1842d61 TW |
2228 | if (iwl_is_rfkill(priv)) { |
2229 | iwl4965_enable_interrupts(priv); | |
3bff19c2 EG |
2230 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2231 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | |
c1842d61 | 2232 | return 0; |
b481de9c ZY |
2233 | } |
2234 | ||
3395f6e9 | 2235 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2236 | |
399f4900 RR |
2237 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2238 | if (ret) { | |
2239 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2240 | return ret; | |
2241 | } | |
2242 | ||
1053d35f | 2243 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2244 | if (ret) { |
2245 | IWL_ERROR("Unable to init nic\n"); | |
2246 | return ret; | |
b481de9c ZY |
2247 | } |
2248 | ||
2249 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2250 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2251 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2252 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2253 | ||
2254 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2255 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 2256 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
2257 | |
2258 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2259 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2260 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2261 | |
2262 | /* Copy original ucode data image from disk into backup cache. | |
2263 | * This will be used to initialize the on-board processor's | |
2264 | * data SRAM for a clean start when the runtime program first loads. */ | |
2265 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2266 | priv->ucode_data.len); |
b481de9c | 2267 | |
b481de9c ZY |
2268 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2269 | ||
37deb2a0 | 2270 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2271 | |
2272 | /* load bootstrap state machine, | |
2273 | * load bootstrap program into processor's memory, | |
2274 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2275 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2276 | |
57aab75a TW |
2277 | if (ret) { |
2278 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2279 | continue; |
2280 | } | |
2281 | ||
f3d5b45b EG |
2282 | /* Clear out the uCode error bit if it is set */ |
2283 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2284 | ||
b481de9c | 2285 | /* start card; "initialize" will load runtime ucode */ |
edcdf8b2 | 2286 | iwl4965_nic_start(priv); |
b481de9c | 2287 | |
b481de9c ZY |
2288 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2289 | ||
2290 | return 0; | |
2291 | } | |
2292 | ||
2293 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 2294 | __iwl4965_down(priv); |
64e72c3e | 2295 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2296 | |
2297 | /* tried to restart and config the device for as long as our | |
2298 | * patience could withstand */ | |
2299 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2300 | return -EIO; | |
2301 | } | |
2302 | ||
2303 | ||
2304 | /***************************************************************************** | |
2305 | * | |
2306 | * Workqueue callbacks | |
2307 | * | |
2308 | *****************************************************************************/ | |
2309 | ||
4a4a9e81 | 2310 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2311 | { |
c79dd5b5 TW |
2312 | struct iwl_priv *priv = |
2313 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2314 | |
2315 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2316 | return; | |
2317 | ||
2318 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2319 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2320 | mutex_unlock(&priv->mutex); |
2321 | } | |
2322 | ||
4a4a9e81 | 2323 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2324 | { |
c79dd5b5 TW |
2325 | struct iwl_priv *priv = |
2326 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2327 | |
2328 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2329 | return; | |
2330 | ||
2331 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2332 | iwl_alive_start(priv); |
b481de9c | 2333 | mutex_unlock(&priv->mutex); |
10d0bd56 | 2334 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
b481de9c ZY |
2335 | } |
2336 | ||
bb8c093b | 2337 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 2338 | { |
c79dd5b5 | 2339 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2340 | |
2341 | wake_up_interruptible(&priv->wait_command_queue); | |
2342 | ||
2343 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2344 | return; | |
2345 | ||
2346 | mutex_lock(&priv->mutex); | |
2347 | ||
fee1247a | 2348 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2349 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2350 | "HW and/or SW RF Kill no longer active, restarting " |
2351 | "device\n"); | |
2352 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2353 | queue_work(priv->workqueue, &priv->restart); | |
2354 | } else { | |
ad97edd2 MA |
2355 | /* make sure mac80211 stop sending Tx frame */ |
2356 | if (priv->mac80211_registered) | |
2357 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2358 | |
2359 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2360 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2361 | "disabled by SW switch\n"); | |
2362 | else | |
2363 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2364 | "Kill switch must be turned off for " | |
2365 | "wireless networking to work.\n"); | |
2366 | } | |
2367 | mutex_unlock(&priv->mutex); | |
80fcc9e2 | 2368 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2369 | } |
2370 | ||
4419e39b AK |
2371 | static void iwl4965_bg_set_monitor(struct work_struct *work) |
2372 | { | |
2373 | struct iwl_priv *priv = container_of(work, | |
2374 | struct iwl_priv, set_monitor); | |
c46fbefa | 2375 | int ret; |
4419e39b AK |
2376 | |
2377 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2378 | ||
2379 | mutex_lock(&priv->mutex); | |
2380 | ||
05c914fe | 2381 | ret = iwl4965_set_mode(priv, NL80211_IFTYPE_MONITOR); |
c46fbefa AK |
2382 | |
2383 | if (ret) { | |
2384 | if (ret == -EAGAIN) | |
2385 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2386 | else | |
2387 | IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret); | |
2388 | } | |
4419e39b AK |
2389 | |
2390 | mutex_unlock(&priv->mutex); | |
2391 | } | |
2392 | ||
16e727e8 EG |
2393 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2394 | { | |
2395 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2396 | run_time_calib_work); | |
2397 | ||
2398 | mutex_lock(&priv->mutex); | |
2399 | ||
2400 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2401 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2402 | mutex_unlock(&priv->mutex); | |
2403 | return; | |
2404 | } | |
2405 | ||
2406 | if (priv->start_calib) { | |
2407 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2408 | ||
2409 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2410 | } | |
2411 | ||
2412 | mutex_unlock(&priv->mutex); | |
2413 | return; | |
2414 | } | |
2415 | ||
bb8c093b | 2416 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 2417 | { |
c79dd5b5 | 2418 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2419 | |
2420 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2421 | return; | |
2422 | ||
2423 | mutex_lock(&priv->mutex); | |
bb8c093b | 2424 | __iwl4965_up(priv); |
b481de9c | 2425 | mutex_unlock(&priv->mutex); |
80fcc9e2 | 2426 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2427 | } |
2428 | ||
bb8c093b | 2429 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 2430 | { |
c79dd5b5 | 2431 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2432 | |
2433 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2434 | return; | |
2435 | ||
bb8c093b | 2436 | iwl4965_down(priv); |
b481de9c ZY |
2437 | queue_work(priv->workqueue, &priv->up); |
2438 | } | |
2439 | ||
bb8c093b | 2440 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2441 | { |
c79dd5b5 TW |
2442 | struct iwl_priv *priv = |
2443 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2444 | |
2445 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2446 | return; | |
2447 | ||
2448 | mutex_lock(&priv->mutex); | |
a55360e4 | 2449 | iwl_rx_replenish(priv); |
b481de9c ZY |
2450 | mutex_unlock(&priv->mutex); |
2451 | } | |
2452 | ||
7878a5a4 MA |
2453 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2454 | ||
508e32e1 | 2455 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 2456 | { |
b481de9c | 2457 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2458 | int ret = 0; |
1ff50bda | 2459 | unsigned long flags; |
b481de9c | 2460 | |
05c914fe | 2461 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
3ac7f146 | 2462 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
b481de9c ZY |
2463 | return; |
2464 | } | |
2465 | ||
e174961c JB |
2466 | IWL_DEBUG_ASSOC("Associated as %d to: %pM\n", |
2467 | priv->assoc_id, priv->active_rxon.bssid_addr); | |
b481de9c ZY |
2468 | |
2469 | ||
2470 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2471 | return; | |
2472 | ||
b481de9c | 2473 | |
508e32e1 | 2474 | if (!priv->vif || !priv->is_open) |
948c171c | 2475 | return; |
508e32e1 | 2476 | |
c90a74ba | 2477 | iwl_power_cancel_timeout(priv); |
2a421b91 | 2478 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2479 | |
b481de9c ZY |
2480 | conf = ieee80211_get_hw_conf(priv->hw); |
2481 | ||
2482 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2483 | iwl4965_commit_rxon(priv); |
b481de9c | 2484 | |
3195c1f3 | 2485 | iwl_setup_rxon_timing(priv); |
857485c0 | 2486 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2487 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2488 | if (ret) |
b481de9c ZY |
2489 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2490 | "Attempting to continue.\n"); | |
2491 | ||
2492 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2493 | ||
42eb7c64 | 2494 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2495 | |
c7de35cd | 2496 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2497 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2498 | ||
2499 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2500 | priv->assoc_id, priv->beacon_int); | |
2501 | ||
2502 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2503 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2504 | else | |
2505 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2506 | ||
2507 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2508 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2509 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2510 | else | |
2511 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2512 | ||
05c914fe | 2513 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2514 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2515 | ||
2516 | } | |
2517 | ||
bb8c093b | 2518 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2519 | |
2520 | switch (priv->iw_mode) { | |
05c914fe | 2521 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
2522 | break; |
2523 | ||
05c914fe | 2524 | case NL80211_IFTYPE_ADHOC: |
b481de9c | 2525 | |
c46fbefa AK |
2526 | /* assume default assoc id */ |
2527 | priv->assoc_id = 1; | |
b481de9c | 2528 | |
4f40e4d9 | 2529 | iwl_rxon_add_station(priv, priv->bssid, 0); |
bb8c093b | 2530 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2531 | |
2532 | break; | |
2533 | ||
2534 | default: | |
2535 | IWL_ERROR("%s Should not be called in %d mode\n", | |
3ac7f146 | 2536 | __func__, priv->iw_mode); |
b481de9c ZY |
2537 | break; |
2538 | } | |
2539 | ||
05c914fe | 2540 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2541 | priv->assoc_station_added = 1; |
2542 | ||
1ff50bda EG |
2543 | spin_lock_irqsave(&priv->lock, flags); |
2544 | iwl_activate_qos(priv, 0); | |
2545 | spin_unlock_irqrestore(&priv->lock, flags); | |
292ae174 | 2546 | |
04816448 GE |
2547 | /* the chain noise calibration will enabled PM upon completion |
2548 | * If chain noise has already been run, then we need to enable | |
2549 | * power management here */ | |
2550 | if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE) | |
2551 | iwl_power_enable_management(priv); | |
c90a74ba EG |
2552 | |
2553 | /* Enable Rx differential gain and sensitivity calibrations */ | |
2554 | iwl_chain_noise_reset(priv); | |
2555 | priv->start_calib = 1; | |
2556 | ||
508e32e1 RC |
2557 | } |
2558 | ||
b481de9c ZY |
2559 | /***************************************************************************** |
2560 | * | |
2561 | * mac80211 entry point functions | |
2562 | * | |
2563 | *****************************************************************************/ | |
2564 | ||
154b25ce | 2565 | #define UCODE_READY_TIMEOUT (4 * HZ) |
5a66926a | 2566 | |
bb8c093b | 2567 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2568 | { |
c79dd5b5 | 2569 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2570 | int ret; |
cf88c433 | 2571 | u16 pci_cmd; |
b481de9c ZY |
2572 | |
2573 | IWL_DEBUG_MAC80211("enter\n"); | |
2574 | ||
5a66926a ZY |
2575 | if (pci_enable_device(priv->pci_dev)) { |
2576 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2577 | return -ENODEV; | |
2578 | } | |
2579 | pci_restore_state(priv->pci_dev); | |
2580 | pci_enable_msi(priv->pci_dev); | |
2581 | ||
cf88c433 TW |
2582 | /* enable interrupts if needed: hw bug w/a */ |
2583 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | |
2584 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | |
2585 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
2586 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | |
2587 | } | |
2588 | ||
5a66926a ZY |
2589 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, |
2590 | DRV_NAME, priv); | |
2591 | if (ret) { | |
2592 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2593 | goto out_disable_msi; | |
2594 | } | |
2595 | ||
b481de9c ZY |
2596 | /* we should be verifying the device is ready to be opened */ |
2597 | mutex_lock(&priv->mutex); | |
2598 | ||
c1adf9fb | 2599 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2600 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2601 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2602 | |
5a66926a ZY |
2603 | if (!priv->ucode_code.len) { |
2604 | ret = iwl4965_read_ucode(priv); | |
2605 | if (ret) { | |
2606 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2607 | mutex_unlock(&priv->mutex); | |
2608 | goto out_release_irq; | |
2609 | } | |
2610 | } | |
b481de9c | 2611 | |
e655b9f0 | 2612 | ret = __iwl4965_up(priv); |
5a66926a | 2613 | |
b481de9c | 2614 | mutex_unlock(&priv->mutex); |
5a66926a | 2615 | |
80fcc9e2 AG |
2616 | iwl_rfkill_set_hw_state(priv); |
2617 | ||
e655b9f0 ZY |
2618 | if (ret) |
2619 | goto out_release_irq; | |
2620 | ||
c1842d61 TW |
2621 | if (iwl_is_rfkill(priv)) |
2622 | goto out; | |
2623 | ||
e655b9f0 ZY |
2624 | IWL_DEBUG_INFO("Start UP work done.\n"); |
2625 | ||
2626 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2627 | return 0; | |
2628 | ||
fe9b6b72 | 2629 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2630 | * mac80211 will not be run successfully. */ |
154b25ce EG |
2631 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
2632 | test_bit(STATUS_READY, &priv->status), | |
2633 | UCODE_READY_TIMEOUT); | |
2634 | if (!ret) { | |
2635 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2636 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2637 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2638 | ret = -ETIMEDOUT; | |
2639 | goto out_release_irq; | |
5a66926a | 2640 | } |
fe9b6b72 | 2641 | } |
0a078ffa | 2642 | |
c1842d61 | 2643 | out: |
0a078ffa | 2644 | priv->is_open = 1; |
b481de9c ZY |
2645 | IWL_DEBUG_MAC80211("leave\n"); |
2646 | return 0; | |
5a66926a ZY |
2647 | |
2648 | out_release_irq: | |
2649 | free_irq(priv->pci_dev->irq, priv); | |
2650 | out_disable_msi: | |
2651 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2652 | pci_disable_device(priv->pci_dev); |
2653 | priv->is_open = 0; | |
2654 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2655 | return ret; |
b481de9c ZY |
2656 | } |
2657 | ||
bb8c093b | 2658 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2659 | { |
c79dd5b5 | 2660 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2661 | |
2662 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2663 | |
e655b9f0 ZY |
2664 | if (!priv->is_open) { |
2665 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2666 | return; | |
2667 | } | |
2668 | ||
b481de9c | 2669 | priv->is_open = 0; |
5a66926a | 2670 | |
fee1247a | 2671 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2672 | /* stop mac, cancel any scan request and clear |
2673 | * RXON_FILTER_ASSOC_MSK BIT | |
2674 | */ | |
5a66926a | 2675 | mutex_lock(&priv->mutex); |
2a421b91 | 2676 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2677 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2678 | } |
2679 | ||
5a66926a ZY |
2680 | iwl4965_down(priv); |
2681 | ||
2682 | flush_workqueue(priv->workqueue); | |
2683 | free_irq(priv->pci_dev->irq, priv); | |
2684 | pci_disable_msi(priv->pci_dev); | |
2685 | pci_save_state(priv->pci_dev); | |
2686 | pci_disable_device(priv->pci_dev); | |
948c171c | 2687 | |
b481de9c | 2688 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2689 | } |
2690 | ||
e039fa4a | 2691 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2692 | { |
c79dd5b5 | 2693 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2694 | |
f3674227 | 2695 | IWL_DEBUG_MACDUMP("enter\n"); |
b481de9c | 2696 | |
b481de9c | 2697 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
e039fa4a | 2698 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2699 | |
e039fa4a | 2700 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2701 | dev_kfree_skb_any(skb); |
2702 | ||
f3674227 | 2703 | IWL_DEBUG_MACDUMP("leave\n"); |
b481de9c ZY |
2704 | return 0; |
2705 | } | |
2706 | ||
bb8c093b | 2707 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2708 | struct ieee80211_if_init_conf *conf) |
2709 | { | |
c79dd5b5 | 2710 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2711 | unsigned long flags; |
2712 | ||
32bfd35d | 2713 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2714 | |
32bfd35d JB |
2715 | if (priv->vif) { |
2716 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2717 | return -EOPNOTSUPP; |
b481de9c ZY |
2718 | } |
2719 | ||
2720 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2721 | priv->vif = conf->vif; |
b481de9c ZY |
2722 | |
2723 | spin_unlock_irqrestore(&priv->lock, flags); | |
2724 | ||
2725 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2726 | |
2727 | if (conf->mac_addr) { | |
e174961c | 2728 | IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr); |
864792e3 TW |
2729 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
2730 | } | |
b481de9c | 2731 | |
c46fbefa AK |
2732 | if (iwl4965_set_mode(priv, conf->type) == -EAGAIN) |
2733 | /* we are not ready, will run again when ready */ | |
2734 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2735 | |
b481de9c ZY |
2736 | mutex_unlock(&priv->mutex); |
2737 | ||
5a66926a | 2738 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2739 | return 0; |
2740 | } | |
2741 | ||
2742 | /** | |
bb8c093b | 2743 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
2744 | * |
2745 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2746 | * be set inappropriately and the driver currently sets the hardware up to | |
2747 | * use it whenever needed. | |
2748 | */ | |
e8975581 | 2749 | static int iwl4965_mac_config(struct ieee80211_hw *hw, u32 changed) |
b481de9c | 2750 | { |
c79dd5b5 | 2751 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2752 | const struct iwl_channel_info *ch_info; |
e8975581 | 2753 | struct ieee80211_conf *conf = &hw->conf; |
b481de9c | 2754 | unsigned long flags; |
76bb77e0 | 2755 | int ret = 0; |
82a66bbb | 2756 | u16 channel; |
b481de9c ZY |
2757 | |
2758 | mutex_lock(&priv->mutex); | |
8318d78a | 2759 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2760 | |
ae5eb026 JB |
2761 | priv->current_ht_config.is_ht = conf->ht.enabled; |
2762 | ||
14a08a7f | 2763 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2764 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2765 | goto out; |
64e72c3e MA |
2766 | } |
2767 | ||
14a08a7f EG |
2768 | if (!conf->radio_enabled) |
2769 | iwl_radio_kill_sw_disable_radio(priv); | |
2770 | ||
fee1247a | 2771 | if (!iwl_is_ready(priv)) { |
b481de9c | 2772 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2773 | ret = -EIO; |
2774 | goto out; | |
b481de9c ZY |
2775 | } |
2776 | ||
1ea87396 | 2777 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2778 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 | 2779 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
b481de9c | 2780 | mutex_unlock(&priv->mutex); |
a0646470 | 2781 | return 0; |
b481de9c ZY |
2782 | } |
2783 | ||
82a66bbb TW |
2784 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2785 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2786 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2787 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2788 | ret = -EINVAL; |
2789 | goto out; | |
b481de9c ZY |
2790 | } |
2791 | ||
05c914fe | 2792 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
398f9e76 AK |
2793 | !is_channel_ibss(ch_info)) { |
2794 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2795 | conf->channel->hw_value, conf->channel->band); | |
2796 | ret = -EINVAL; | |
2797 | goto out; | |
2798 | } | |
2799 | ||
82a66bbb TW |
2800 | spin_lock_irqsave(&priv->lock, flags); |
2801 | ||
b5d7be5e | 2802 | |
78330fdd | 2803 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2804 | * from any ht related info since 2.4 does not |
2805 | * support ht */ | |
82a66bbb | 2806 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2807 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2808 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2809 | #endif | |
2810 | ) | |
2811 | priv->staging_rxon.flags = 0; | |
b481de9c | 2812 | |
17e72782 | 2813 | iwl_set_rxon_channel(priv, conf->channel); |
b481de9c | 2814 | |
82a66bbb | 2815 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2816 | |
2817 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2818 | * for each band; since the band may have changed, reset |
b481de9c | 2819 | * the rate mask to what mac80211 lists */ |
bb8c093b | 2820 | iwl4965_set_rate(priv); |
b481de9c ZY |
2821 | |
2822 | spin_unlock_irqrestore(&priv->lock, flags); | |
2823 | ||
2824 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2825 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 2826 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2827 | goto out; |
b481de9c ZY |
2828 | } |
2829 | #endif | |
2830 | ||
b481de9c ZY |
2831 | if (!conf->radio_enabled) { |
2832 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2833 | goto out; |
b481de9c ZY |
2834 | } |
2835 | ||
fee1247a | 2836 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2837 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2838 | ret = -EIO; |
2839 | goto out; | |
b481de9c ZY |
2840 | } |
2841 | ||
e602cb18 EK |
2842 | if (conf->flags & IEEE80211_CONF_PS) |
2843 | ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3); | |
2844 | else | |
2845 | ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM); | |
2846 | if (ret) | |
2847 | IWL_DEBUG_MAC80211("Error setting power level\n"); | |
2848 | ||
630fe9b6 TW |
2849 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2850 | priv->tx_power_user_lmt, conf->power_level); | |
2851 | ||
2852 | iwl_set_tx_power(priv, conf->power_level, false); | |
2853 | ||
bb8c093b | 2854 | iwl4965_set_rate(priv); |
b481de9c ZY |
2855 | |
2856 | if (memcmp(&priv->active_rxon, | |
2857 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 2858 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2859 | else |
2860 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
2861 | ||
2862 | IWL_DEBUG_MAC80211("leave\n"); | |
2863 | ||
a0646470 | 2864 | out: |
5a66926a | 2865 | mutex_unlock(&priv->mutex); |
76bb77e0 | 2866 | return ret; |
b481de9c ZY |
2867 | } |
2868 | ||
c79dd5b5 | 2869 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 2870 | { |
857485c0 | 2871 | int ret = 0; |
1ff50bda | 2872 | unsigned long flags; |
b481de9c | 2873 | |
d986bcd1 | 2874 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
2875 | return; |
2876 | ||
2877 | /* The following should be done only at AP bring up */ | |
3195c1f3 | 2878 | if (!iwl_is_associated(priv)) { |
b481de9c ZY |
2879 | |
2880 | /* RXON - unassoc (to set timing command) */ | |
2881 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2882 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2883 | |
2884 | /* RXON Timing */ | |
3195c1f3 | 2885 | iwl_setup_rxon_timing(priv); |
857485c0 | 2886 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2887 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2888 | if (ret) |
b481de9c ZY |
2889 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2890 | "Attempting to continue.\n"); | |
2891 | ||
c7de35cd | 2892 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2893 | |
2894 | /* FIXME: what should be the assoc_id for AP? */ | |
2895 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
2896 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2897 | priv->staging_rxon.flags |= | |
2898 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2899 | else | |
2900 | priv->staging_rxon.flags &= | |
2901 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2902 | ||
2903 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2904 | if (priv->assoc_capability & | |
2905 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2906 | priv->staging_rxon.flags |= | |
2907 | RXON_FLG_SHORT_SLOT_MSK; | |
2908 | else | |
2909 | priv->staging_rxon.flags &= | |
2910 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2911 | ||
05c914fe | 2912 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2913 | priv->staging_rxon.flags &= |
2914 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2915 | } | |
2916 | /* restore RXON assoc */ | |
2917 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2918 | iwl4965_commit_rxon(priv); |
1ff50bda EG |
2919 | spin_lock_irqsave(&priv->lock, flags); |
2920 | iwl_activate_qos(priv, 1); | |
2921 | spin_unlock_irqrestore(&priv->lock, flags); | |
4f40e4d9 | 2922 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 2923 | } |
bb8c093b | 2924 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2925 | |
2926 | /* FIXME - we need to add code here to detect a totally new | |
2927 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
2928 | * clear sta table, add BCAST sta... */ | |
2929 | } | |
2930 | ||
9d139c81 JB |
2931 | /* temporary */ |
2932 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb); | |
2933 | ||
32bfd35d JB |
2934 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
2935 | struct ieee80211_vif *vif, | |
b481de9c ZY |
2936 | struct ieee80211_if_conf *conf) |
2937 | { | |
c79dd5b5 | 2938 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2939 | unsigned long flags; |
2940 | int rc; | |
2941 | ||
2942 | if (conf == NULL) | |
2943 | return -EIO; | |
2944 | ||
b716bb91 EG |
2945 | if (priv->vif != vif) { |
2946 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
2947 | return 0; |
2948 | } | |
2949 | ||
05c914fe | 2950 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
9d139c81 JB |
2951 | conf->changed & IEEE80211_IFCC_BEACON) { |
2952 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
2953 | if (!beacon) | |
2954 | return -ENOMEM; | |
2955 | rc = iwl4965_mac_beacon_update(hw, beacon); | |
2956 | if (rc) | |
2957 | return rc; | |
2958 | } | |
2959 | ||
05c914fe | 2960 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
9d139c81 | 2961 | (!conf->ssid_len)) { |
b481de9c ZY |
2962 | IWL_DEBUG_MAC80211 |
2963 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
2964 | return 0; | |
2965 | } | |
2966 | ||
fee1247a | 2967 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
2968 | return -EAGAIN; |
2969 | ||
b481de9c ZY |
2970 | mutex_lock(&priv->mutex); |
2971 | ||
b481de9c | 2972 | if (conf->bssid) |
e174961c | 2973 | IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid); |
b481de9c | 2974 | |
4150c572 JB |
2975 | /* |
2976 | * very dubious code was here; the probe filtering flag is never set: | |
2977 | * | |
b481de9c ZY |
2978 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
2979 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 2980 | */ |
b481de9c | 2981 | |
05c914fe | 2982 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
b481de9c ZY |
2983 | if (!conf->bssid) { |
2984 | conf->bssid = priv->mac_addr; | |
2985 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
e174961c JB |
2986 | IWL_DEBUG_MAC80211("bssid was set to: %pM\n", |
2987 | conf->bssid); | |
b481de9c ZY |
2988 | } |
2989 | if (priv->ibss_beacon) | |
2990 | dev_kfree_skb(priv->ibss_beacon); | |
2991 | ||
9d139c81 | 2992 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
2993 | } |
2994 | ||
fee1247a | 2995 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
2996 | goto done; |
2997 | ||
b481de9c ZY |
2998 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
2999 | !is_multicast_ether_addr(conf->bssid)) { | |
3000 | /* If there is currently a HW scan going on in the background | |
3001 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3002 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3003 | IWL_WARNING("Aborted scan still in progress " |
3004 | "after 100ms\n"); | |
3005 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3006 | mutex_unlock(&priv->mutex); | |
3007 | return -EAGAIN; | |
3008 | } | |
3009 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3010 | ||
3011 | /* TODO: Audit driver for usage of these members and see | |
3012 | * if mac80211 deprecates them (priv->bssid looks like it | |
3013 | * shouldn't be there, but I haven't scanned the IBSS code | |
3014 | * to verify) - jpk */ | |
3015 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3016 | ||
05c914fe | 3017 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
bb8c093b | 3018 | iwl4965_config_ap(priv); |
b481de9c | 3019 | else { |
bb8c093b | 3020 | rc = iwl4965_commit_rxon(priv); |
05c914fe | 3021 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) |
4f40e4d9 | 3022 | iwl_rxon_add_station( |
b481de9c ZY |
3023 | priv, priv->active_rxon.bssid_addr, 1); |
3024 | } | |
3025 | ||
3026 | } else { | |
2a421b91 | 3027 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3028 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3029 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3030 | } |
3031 | ||
fde3571f | 3032 | done: |
b481de9c ZY |
3033 | spin_lock_irqsave(&priv->lock, flags); |
3034 | if (!conf->ssid_len) | |
3035 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3036 | else | |
3037 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
3038 | ||
3039 | priv->essid_len = conf->ssid_len; | |
3040 | spin_unlock_irqrestore(&priv->lock, flags); | |
3041 | ||
3042 | IWL_DEBUG_MAC80211("leave\n"); | |
3043 | mutex_unlock(&priv->mutex); | |
3044 | ||
3045 | return 0; | |
3046 | } | |
3047 | ||
bb8c093b | 3048 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3049 | unsigned int changed_flags, |
3050 | unsigned int *total_flags, | |
3051 | int mc_count, struct dev_addr_list *mc_list) | |
3052 | { | |
4419e39b | 3053 | struct iwl_priv *priv = hw->priv; |
25b3f57c RF |
3054 | |
3055 | if (changed_flags & (*total_flags) & FIF_OTHER_BSS) { | |
3056 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
05c914fe | 3057 | NL80211_IFTYPE_MONITOR, |
25b3f57c RF |
3058 | changed_flags, *total_flags); |
3059 | /* queue work 'cuz mac80211 is holding a lock which | |
3060 | * prevents us from issuing (synchronous) f/w cmds */ | |
3061 | queue_work(priv->workqueue, &priv->set_monitor); | |
4419e39b | 3062 | } |
25b3f57c RF |
3063 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | |
3064 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | |
4150c572 JB |
3065 | } |
3066 | ||
bb8c093b | 3067 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3068 | struct ieee80211_if_init_conf *conf) |
3069 | { | |
c79dd5b5 | 3070 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3071 | |
3072 | IWL_DEBUG_MAC80211("enter\n"); | |
3073 | ||
3074 | mutex_lock(&priv->mutex); | |
948c171c | 3075 | |
fee1247a | 3076 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3077 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f MA |
3078 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
3079 | iwl4965_commit_rxon(priv); | |
3080 | } | |
32bfd35d JB |
3081 | if (priv->vif == conf->vif) { |
3082 | priv->vif = NULL; | |
b481de9c ZY |
3083 | memset(priv->bssid, 0, ETH_ALEN); |
3084 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3085 | priv->essid_len = 0; | |
3086 | } | |
3087 | mutex_unlock(&priv->mutex); | |
3088 | ||
3089 | IWL_DEBUG_MAC80211("leave\n"); | |
3090 | ||
3091 | } | |
471b3efd | 3092 | |
3109ece1 | 3093 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
3094 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
3095 | struct ieee80211_vif *vif, | |
3096 | struct ieee80211_bss_conf *bss_conf, | |
3097 | u32 changes) | |
220173b0 | 3098 | { |
c79dd5b5 | 3099 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3100 | |
3109ece1 TW |
3101 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3102 | ||
471b3efd | 3103 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3104 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3105 | bss_conf->use_short_preamble); | |
471b3efd | 3106 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3107 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3108 | else | |
3109 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3110 | } | |
3111 | ||
471b3efd | 3112 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3113 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3114 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3115 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3116 | else | |
3117 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3118 | } | |
3119 | ||
98952d5d TW |
3120 | if (changes & BSS_CHANGED_HT) { |
3121 | iwl4965_ht_conf(priv, bss_conf); | |
c7de35cd | 3122 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3123 | } |
3124 | ||
471b3efd | 3125 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3126 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3127 | /* This should never happen as this function should |
3128 | * never be called from interrupt context. */ | |
3129 | if (WARN_ON_ONCE(in_interrupt())) | |
3130 | return; | |
3109ece1 TW |
3131 | if (bss_conf->assoc) { |
3132 | priv->assoc_id = bss_conf->aid; | |
3133 | priv->beacon_int = bss_conf->beacon_int; | |
b5d7be5e | 3134 | priv->power_data.dtim_period = bss_conf->dtim_period; |
3109ece1 TW |
3135 | priv->timestamp = bss_conf->timestamp; |
3136 | priv->assoc_capability = bss_conf->assoc_capability; | |
9ccacb86 TW |
3137 | |
3138 | /* we have just associated, don't start scan too early | |
3139 | * leave time for EAPOL exchange to complete | |
3140 | */ | |
3109ece1 TW |
3141 | priv->next_scan_jiffies = jiffies + |
3142 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
3143 | mutex_lock(&priv->mutex); |
3144 | iwl4965_post_associate(priv); | |
3145 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
3146 | } else { |
3147 | priv->assoc_id = 0; | |
3148 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3149 | } | |
3150 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3151 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3152 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3153 | } |
3154 | ||
220173b0 | 3155 | } |
b481de9c | 3156 | |
cb43dc25 | 3157 | static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len) |
b481de9c | 3158 | { |
b481de9c | 3159 | unsigned long flags; |
c79dd5b5 | 3160 | struct iwl_priv *priv = hw->priv; |
8d09a5e1 | 3161 | int ret; |
b481de9c ZY |
3162 | |
3163 | IWL_DEBUG_MAC80211("enter\n"); | |
3164 | ||
052c4b9f | 3165 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3166 | spin_lock_irqsave(&priv->lock, flags); |
3167 | ||
fee1247a | 3168 | if (!iwl_is_ready_rf(priv)) { |
cb43dc25 | 3169 | ret = -EIO; |
b481de9c ZY |
3170 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); |
3171 | goto out_unlock; | |
3172 | } | |
3173 | ||
05c914fe | 3174 | if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */ |
cb43dc25 | 3175 | ret = -EIO; |
b481de9c ZY |
3176 | IWL_ERROR("ERROR: APs don't scan\n"); |
3177 | goto out_unlock; | |
3178 | } | |
3179 | ||
8d09a5e1 TW |
3180 | /* We don't schedule scan within next_scan_jiffies period. |
3181 | * Avoid scanning during possible EAPOL exchange, return | |
3182 | * success immediately. | |
3183 | */ | |
7878a5a4 | 3184 | if (priv->next_scan_jiffies && |
cb43dc25 | 3185 | time_after(priv->next_scan_jiffies, jiffies)) { |
681c0050 | 3186 | IWL_DEBUG_SCAN("scan rejected: within next scan period\n"); |
8d09a5e1 TW |
3187 | queue_work(priv->workqueue, &priv->scan_completed); |
3188 | ret = 0; | |
7878a5a4 MA |
3189 | goto out_unlock; |
3190 | } | |
8d09a5e1 | 3191 | |
b481de9c | 3192 | /* if we just finished scan ask for delay */ |
681c0050 | 3193 | if (iwl_is_associated(priv) && priv->last_scan_jiffies && |
cb43dc25 | 3194 | time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) { |
681c0050 | 3195 | IWL_DEBUG_SCAN("scan rejected: within previous scan period\n"); |
8d09a5e1 TW |
3196 | queue_work(priv->workqueue, &priv->scan_completed); |
3197 | ret = 0; | |
b481de9c ZY |
3198 | goto out_unlock; |
3199 | } | |
8d09a5e1 | 3200 | |
cb43dc25 | 3201 | if (ssid_len) { |
b481de9c | 3202 | priv->one_direct_scan = 1; |
cb43dc25 | 3203 | priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE); |
b481de9c | 3204 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); |
cb43dc25 | 3205 | } else { |
948c171c | 3206 | priv->one_direct_scan = 0; |
cb43dc25 | 3207 | } |
b481de9c | 3208 | |
cb43dc25 | 3209 | ret = iwl_scan_initiate(priv); |
b481de9c ZY |
3210 | |
3211 | IWL_DEBUG_MAC80211("leave\n"); | |
3212 | ||
3213 | out_unlock: | |
3214 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3215 | mutex_unlock(&priv->mutex); |
b481de9c | 3216 | |
cb43dc25 | 3217 | return ret; |
b481de9c ZY |
3218 | } |
3219 | ||
ab885f8c EG |
3220 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
3221 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
3222 | u32 iv32, u16 *phase1key) | |
3223 | { | |
3224 | struct iwl_priv *priv = hw->priv; | |
3225 | u8 sta_id = IWL_INVALID_STATION; | |
3226 | unsigned long flags; | |
3227 | __le16 key_flags = 0; | |
3228 | int i; | |
ab885f8c EG |
3229 | |
3230 | IWL_DEBUG_MAC80211("enter\n"); | |
3231 | ||
947b13a7 | 3232 | sta_id = iwl_find_station(priv, addr); |
ab885f8c | 3233 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3234 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3235 | addr); | |
ab885f8c EG |
3236 | return; |
3237 | } | |
3238 | ||
2a421b91 | 3239 | iwl_scan_cancel_timeout(priv, 100); |
ab885f8c EG |
3240 | |
3241 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3242 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3243 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3244 | ||
5425e490 | 3245 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3246 | key_flags |= STA_KEY_MULTICAST_MSK; |
3247 | ||
3248 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3249 | ||
ab885f8c EG |
3250 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3251 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3252 | ||
3253 | for (i = 0; i < 5; i++) | |
3254 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3255 | cpu_to_le16(phase1key[i]); | |
3256 | ||
3257 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3258 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3259 | ||
133636de | 3260 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3261 | |
3262 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3263 | ||
3264 | IWL_DEBUG_MAC80211("leave\n"); | |
3265 | } | |
3266 | ||
bb8c093b | 3267 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3268 | const u8 *local_addr, const u8 *addr, |
3269 | struct ieee80211_key_conf *key) | |
3270 | { | |
c79dd5b5 | 3271 | struct iwl_priv *priv = hw->priv; |
deb09c43 EG |
3272 | int ret = 0; |
3273 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3274 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3275 | |
3276 | IWL_DEBUG_MAC80211("enter\n"); | |
3277 | ||
099b40b7 | 3278 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3279 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3280 | return -EOPNOTSUPP; | |
3281 | } | |
3282 | ||
3283 | if (is_zero_ether_addr(addr)) | |
3284 | /* only support pairwise keys */ | |
3285 | return -EOPNOTSUPP; | |
3286 | ||
947b13a7 | 3287 | sta_id = iwl_find_station(priv, addr); |
6974e363 | 3288 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3289 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3290 | addr); | |
6974e363 | 3291 | return -EINVAL; |
b481de9c | 3292 | |
deb09c43 | 3293 | } |
b481de9c | 3294 | |
6974e363 | 3295 | mutex_lock(&priv->mutex); |
2a421b91 | 3296 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3297 | mutex_unlock(&priv->mutex); |
3298 | ||
3299 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3300 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3301 | * in 1X mode. | |
3302 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3303 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
05c914fe | 3304 | priv->iw_mode != NL80211_IFTYPE_AP) { |
6974e363 EG |
3305 | if (cmd == SET_KEY) |
3306 | is_default_wep_key = !priv->key_mapping_key; | |
3307 | else | |
ccc038ab EG |
3308 | is_default_wep_key = |
3309 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3310 | } |
052c4b9f | 3311 | |
b481de9c | 3312 | switch (cmd) { |
deb09c43 | 3313 | case SET_KEY: |
6974e363 EG |
3314 | if (is_default_wep_key) |
3315 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3316 | else |
7480513f | 3317 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3318 | |
3319 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3320 | break; |
3321 | case DISABLE_KEY: | |
6974e363 EG |
3322 | if (is_default_wep_key) |
3323 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3324 | else |
3ec47732 | 3325 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3326 | |
3327 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3328 | break; |
3329 | default: | |
deb09c43 | 3330 | ret = -EINVAL; |
b481de9c ZY |
3331 | } |
3332 | ||
3333 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3334 | |
deb09c43 | 3335 | return ret; |
b481de9c ZY |
3336 | } |
3337 | ||
e100bb64 | 3338 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3339 | const struct ieee80211_tx_queue_params *params) |
3340 | { | |
c79dd5b5 | 3341 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3342 | unsigned long flags; |
3343 | int q; | |
b481de9c ZY |
3344 | |
3345 | IWL_DEBUG_MAC80211("enter\n"); | |
3346 | ||
fee1247a | 3347 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3348 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3349 | return -EIO; | |
3350 | } | |
3351 | ||
3352 | if (queue >= AC_NUM) { | |
3353 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3354 | return 0; | |
3355 | } | |
3356 | ||
b481de9c ZY |
3357 | if (!priv->qos_data.qos_enable) { |
3358 | priv->qos_data.qos_active = 0; | |
3359 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3360 | return 0; | |
3361 | } | |
3362 | q = AC_NUM - 1 - queue; | |
3363 | ||
3364 | spin_lock_irqsave(&priv->lock, flags); | |
3365 | ||
3366 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3367 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3368 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3369 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3370 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3371 | |
3372 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3373 | priv->qos_data.qos_active = 1; | |
3374 | ||
05c914fe | 3375 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
1ff50bda | 3376 | iwl_activate_qos(priv, 1); |
3109ece1 | 3377 | else if (priv->assoc_id && iwl_is_associated(priv)) |
1ff50bda | 3378 | iwl_activate_qos(priv, 0); |
b481de9c | 3379 | |
1ff50bda | 3380 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3381 | |
b481de9c ZY |
3382 | IWL_DEBUG_MAC80211("leave\n"); |
3383 | return 0; | |
3384 | } | |
3385 | ||
d783b061 TW |
3386 | static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, |
3387 | enum ieee80211_ampdu_mlme_action action, | |
17741cdc | 3388 | struct ieee80211_sta *sta, u16 tid, u16 *ssn) |
d783b061 TW |
3389 | { |
3390 | struct iwl_priv *priv = hw->priv; | |
d783b061 | 3391 | |
e174961c JB |
3392 | IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n", |
3393 | sta->addr, tid); | |
d783b061 TW |
3394 | |
3395 | if (!(priv->cfg->sku & IWL_SKU_N)) | |
3396 | return -EACCES; | |
3397 | ||
3398 | switch (action) { | |
3399 | case IEEE80211_AMPDU_RX_START: | |
3400 | IWL_DEBUG_HT("start Rx\n"); | |
17741cdc | 3401 | return iwl_rx_agg_start(priv, sta->addr, tid, *ssn); |
d783b061 TW |
3402 | case IEEE80211_AMPDU_RX_STOP: |
3403 | IWL_DEBUG_HT("stop Rx\n"); | |
17741cdc | 3404 | return iwl_rx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3405 | case IEEE80211_AMPDU_TX_START: |
3406 | IWL_DEBUG_HT("start Tx\n"); | |
17741cdc | 3407 | return iwl_tx_agg_start(priv, sta->addr, tid, ssn); |
d783b061 TW |
3408 | case IEEE80211_AMPDU_TX_STOP: |
3409 | IWL_DEBUG_HT("stop Tx\n"); | |
17741cdc | 3410 | return iwl_tx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3411 | default: |
3412 | IWL_DEBUG_HT("unknown\n"); | |
3413 | return -EINVAL; | |
3414 | break; | |
3415 | } | |
3416 | return 0; | |
3417 | } | |
bb8c093b | 3418 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3419 | struct ieee80211_tx_queue_stats *stats) |
3420 | { | |
c79dd5b5 | 3421 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3422 | int i, avail; |
16466903 | 3423 | struct iwl_tx_queue *txq; |
443cfd45 | 3424 | struct iwl_queue *q; |
b481de9c ZY |
3425 | unsigned long flags; |
3426 | ||
3427 | IWL_DEBUG_MAC80211("enter\n"); | |
3428 | ||
fee1247a | 3429 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3430 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3431 | return -EIO; | |
3432 | } | |
3433 | ||
3434 | spin_lock_irqsave(&priv->lock, flags); | |
3435 | ||
3436 | for (i = 0; i < AC_NUM; i++) { | |
3437 | txq = &priv->txq[i]; | |
3438 | q = &txq->q; | |
443cfd45 | 3439 | avail = iwl_queue_space(q); |
b481de9c | 3440 | |
57ffc589 JB |
3441 | stats[i].len = q->n_window - avail; |
3442 | stats[i].limit = q->n_window - q->high_mark; | |
3443 | stats[i].count = q->n_window; | |
b481de9c ZY |
3444 | |
3445 | } | |
3446 | spin_unlock_irqrestore(&priv->lock, flags); | |
3447 | ||
3448 | IWL_DEBUG_MAC80211("leave\n"); | |
3449 | ||
3450 | return 0; | |
3451 | } | |
3452 | ||
bb8c093b | 3453 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3454 | struct ieee80211_low_level_stats *stats) |
3455 | { | |
bf403db8 EK |
3456 | struct iwl_priv *priv = hw->priv; |
3457 | ||
3458 | priv = hw->priv; | |
b481de9c ZY |
3459 | IWL_DEBUG_MAC80211("enter\n"); |
3460 | IWL_DEBUG_MAC80211("leave\n"); | |
3461 | ||
3462 | return 0; | |
3463 | } | |
3464 | ||
bb8c093b | 3465 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3466 | { |
c79dd5b5 | 3467 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3468 | unsigned long flags; |
3469 | ||
3470 | mutex_lock(&priv->mutex); | |
3471 | IWL_DEBUG_MAC80211("enter\n"); | |
3472 | ||
b481de9c | 3473 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3474 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3475 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3476 | |
c7de35cd | 3477 | iwl_reset_qos(priv); |
b481de9c | 3478 | |
b481de9c ZY |
3479 | spin_lock_irqsave(&priv->lock, flags); |
3480 | priv->assoc_id = 0; | |
3481 | priv->assoc_capability = 0; | |
b481de9c ZY |
3482 | priv->assoc_station_added = 0; |
3483 | ||
3484 | /* new association get rid of ibss beacon skb */ | |
3485 | if (priv->ibss_beacon) | |
3486 | dev_kfree_skb(priv->ibss_beacon); | |
3487 | ||
3488 | priv->ibss_beacon = NULL; | |
3489 | ||
3490 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3491 | priv->timestamp = 0; |
05c914fe | 3492 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) |
b481de9c ZY |
3493 | priv->beacon_int = 0; |
3494 | ||
3495 | spin_unlock_irqrestore(&priv->lock, flags); | |
3496 | ||
fee1247a | 3497 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3498 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3499 | mutex_unlock(&priv->mutex); | |
3500 | return; | |
3501 | } | |
3502 | ||
052c4b9f | 3503 | /* we are restarting association process |
3504 | * clear RXON_FILTER_ASSOC_MSK bit | |
3505 | */ | |
05c914fe | 3506 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
2a421b91 | 3507 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3508 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3509 | iwl4965_commit_rxon(priv); |
052c4b9f | 3510 | } |
3511 | ||
5da4b55f MA |
3512 | iwl_power_update_mode(priv, 0); |
3513 | ||
b481de9c | 3514 | /* Per mac80211.h: This is only used in IBSS mode... */ |
05c914fe | 3515 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
052c4b9f | 3516 | |
c90a74ba EG |
3517 | /* switch to CAM during association period. |
3518 | * the ucode will block any association/authentication | |
3519 | * frome during assiciation period if it can not hear | |
3520 | * the AP because of PM. the timer enable PM back is | |
3521 | * association do not complete | |
3522 | */ | |
3523 | if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN | | |
3524 | IEEE80211_CHAN_RADAR)) | |
3525 | iwl_power_disable_management(priv, 3000); | |
3526 | ||
b481de9c ZY |
3527 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3528 | mutex_unlock(&priv->mutex); | |
3529 | return; | |
3530 | } | |
3531 | ||
bb8c093b | 3532 | iwl4965_set_rate(priv); |
b481de9c ZY |
3533 | |
3534 | mutex_unlock(&priv->mutex); | |
3535 | ||
3536 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3537 | } |
3538 | ||
e039fa4a | 3539 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3540 | { |
c79dd5b5 | 3541 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3542 | unsigned long flags; |
2ff75b78 | 3543 | __le64 timestamp; |
b481de9c ZY |
3544 | |
3545 | mutex_lock(&priv->mutex); | |
3546 | IWL_DEBUG_MAC80211("enter\n"); | |
3547 | ||
fee1247a | 3548 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3549 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3550 | mutex_unlock(&priv->mutex); | |
3551 | return -EIO; | |
3552 | } | |
3553 | ||
05c914fe | 3554 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
b481de9c ZY |
3555 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); |
3556 | mutex_unlock(&priv->mutex); | |
3557 | return -EIO; | |
3558 | } | |
3559 | ||
3560 | spin_lock_irqsave(&priv->lock, flags); | |
3561 | ||
3562 | if (priv->ibss_beacon) | |
3563 | dev_kfree_skb(priv->ibss_beacon); | |
3564 | ||
3565 | priv->ibss_beacon = skb; | |
3566 | ||
3567 | priv->assoc_id = 0; | |
2ff75b78 | 3568 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b94d8eea | 3569 | priv->timestamp = le64_to_cpu(timestamp); |
b481de9c ZY |
3570 | |
3571 | IWL_DEBUG_MAC80211("leave\n"); | |
3572 | spin_unlock_irqrestore(&priv->lock, flags); | |
3573 | ||
c7de35cd | 3574 | iwl_reset_qos(priv); |
b481de9c | 3575 | |
c46fbefa | 3576 | iwl4965_post_associate(priv); |
b481de9c ZY |
3577 | |
3578 | mutex_unlock(&priv->mutex); | |
3579 | ||
3580 | return 0; | |
3581 | } | |
3582 | ||
b481de9c ZY |
3583 | /***************************************************************************** |
3584 | * | |
3585 | * sysfs attributes | |
3586 | * | |
3587 | *****************************************************************************/ | |
3588 | ||
0a6857e7 | 3589 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3590 | |
3591 | /* | |
3592 | * The following adds a new attribute to the sysfs representation | |
3593 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3594 | * used for controlling the debug level. | |
3595 | * | |
3596 | * See the level definitions in iwl for details. | |
3597 | */ | |
3598 | ||
8cf769c6 EK |
3599 | static ssize_t show_debug_level(struct device *d, |
3600 | struct device_attribute *attr, char *buf) | |
b481de9c | 3601 | { |
8cf769c6 EK |
3602 | struct iwl_priv *priv = d->driver_data; |
3603 | ||
3604 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3605 | } |
8cf769c6 EK |
3606 | static ssize_t store_debug_level(struct device *d, |
3607 | struct device_attribute *attr, | |
b481de9c ZY |
3608 | const char *buf, size_t count) |
3609 | { | |
8cf769c6 | 3610 | struct iwl_priv *priv = d->driver_data; |
9257746f TW |
3611 | unsigned long val; |
3612 | int ret; | |
b481de9c | 3613 | |
9257746f TW |
3614 | ret = strict_strtoul(buf, 0, &val); |
3615 | if (ret) | |
b481de9c ZY |
3616 | printk(KERN_INFO DRV_NAME |
3617 | ": %s is not in hex or decimal form.\n", buf); | |
3618 | else | |
8cf769c6 | 3619 | priv->debug_level = val; |
b481de9c ZY |
3620 | |
3621 | return strnlen(buf, count); | |
3622 | } | |
3623 | ||
8cf769c6 EK |
3624 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3625 | show_debug_level, store_debug_level); | |
3626 | ||
b481de9c | 3627 | |
0a6857e7 | 3628 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3629 | |
b481de9c | 3630 | |
bc6f59bc TW |
3631 | static ssize_t show_version(struct device *d, |
3632 | struct device_attribute *attr, char *buf) | |
3633 | { | |
3634 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3635 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3636 | ssize_t pos = 0; |
3637 | u16 eeprom_ver; | |
bc6f59bc TW |
3638 | |
3639 | if (palive->is_valid) | |
f236a265 TW |
3640 | pos += sprintf(buf + pos, |
3641 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3642 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3643 | palive->ucode_major, palive->ucode_minor, |
3644 | palive->sw_rev[0], palive->sw_rev[1], | |
3645 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3646 | else |
f236a265 TW |
3647 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3648 | ||
3649 | if (priv->eeprom) { | |
3650 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3651 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3652 | eeprom_ver); | |
3653 | } else { | |
3654 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3655 | } | |
3656 | ||
3657 | return pos; | |
bc6f59bc TW |
3658 | } |
3659 | ||
3660 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3661 | ||
b481de9c ZY |
3662 | static ssize_t show_temperature(struct device *d, |
3663 | struct device_attribute *attr, char *buf) | |
3664 | { | |
c79dd5b5 | 3665 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3666 | |
fee1247a | 3667 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3668 | return -EAGAIN; |
3669 | ||
91dbc5bd | 3670 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3671 | } |
3672 | ||
3673 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3674 | ||
b481de9c ZY |
3675 | static ssize_t show_tx_power(struct device *d, |
3676 | struct device_attribute *attr, char *buf) | |
3677 | { | |
c79dd5b5 | 3678 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3679 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3680 | } |
3681 | ||
3682 | static ssize_t store_tx_power(struct device *d, | |
3683 | struct device_attribute *attr, | |
3684 | const char *buf, size_t count) | |
3685 | { | |
c79dd5b5 | 3686 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3687 | unsigned long val; |
3688 | int ret; | |
b481de9c | 3689 | |
9257746f TW |
3690 | ret = strict_strtoul(buf, 10, &val); |
3691 | if (ret) | |
b481de9c ZY |
3692 | printk(KERN_INFO DRV_NAME |
3693 | ": %s is not in decimal form.\n", buf); | |
3694 | else | |
630fe9b6 | 3695 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3696 | |
3697 | return count; | |
3698 | } | |
3699 | ||
3700 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3701 | ||
3702 | static ssize_t show_flags(struct device *d, | |
3703 | struct device_attribute *attr, char *buf) | |
3704 | { | |
c79dd5b5 | 3705 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3706 | |
3707 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3708 | } | |
3709 | ||
3710 | static ssize_t store_flags(struct device *d, | |
3711 | struct device_attribute *attr, | |
3712 | const char *buf, size_t count) | |
3713 | { | |
c79dd5b5 | 3714 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3715 | unsigned long val; |
3716 | u32 flags; | |
3717 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3718 | if (ret) |
9257746f TW |
3719 | return ret; |
3720 | flags = (u32)val; | |
b481de9c ZY |
3721 | |
3722 | mutex_lock(&priv->mutex); | |
3723 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3724 | /* Cancel any currently running scans... */ | |
2a421b91 | 3725 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3726 | IWL_WARNING("Could not cancel scan.\n"); |
3727 | else { | |
9257746f | 3728 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); |
b481de9c | 3729 | priv->staging_rxon.flags = cpu_to_le32(flags); |
bb8c093b | 3730 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3731 | } |
3732 | } | |
3733 | mutex_unlock(&priv->mutex); | |
3734 | ||
3735 | return count; | |
3736 | } | |
3737 | ||
3738 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3739 | ||
3740 | static ssize_t show_filter_flags(struct device *d, | |
3741 | struct device_attribute *attr, char *buf) | |
3742 | { | |
c79dd5b5 | 3743 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3744 | |
3745 | return sprintf(buf, "0x%04X\n", | |
3746 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3747 | } | |
3748 | ||
3749 | static ssize_t store_filter_flags(struct device *d, | |
3750 | struct device_attribute *attr, | |
3751 | const char *buf, size_t count) | |
3752 | { | |
c79dd5b5 | 3753 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3754 | unsigned long val; |
3755 | u32 filter_flags; | |
3756 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3757 | if (ret) |
9257746f TW |
3758 | return ret; |
3759 | filter_flags = (u32)val; | |
b481de9c ZY |
3760 | |
3761 | mutex_lock(&priv->mutex); | |
3762 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3763 | /* Cancel any currently running scans... */ | |
2a421b91 | 3764 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3765 | IWL_WARNING("Could not cancel scan.\n"); |
3766 | else { | |
3767 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3768 | "0x%04X\n", filter_flags); | |
3769 | priv->staging_rxon.filter_flags = | |
3770 | cpu_to_le32(filter_flags); | |
bb8c093b | 3771 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3772 | } |
3773 | } | |
3774 | mutex_unlock(&priv->mutex); | |
3775 | ||
3776 | return count; | |
3777 | } | |
3778 | ||
3779 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3780 | store_filter_flags); | |
3781 | ||
4fc22b21 | 3782 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3783 | |
3784 | static ssize_t show_measurement(struct device *d, | |
3785 | struct device_attribute *attr, char *buf) | |
3786 | { | |
c79dd5b5 | 3787 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3788 | struct iwl4965_spectrum_notification measure_report; |
b481de9c | 3789 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3ac7f146 | 3790 | u8 *data = (u8 *)&measure_report; |
b481de9c ZY |
3791 | unsigned long flags; |
3792 | ||
3793 | spin_lock_irqsave(&priv->lock, flags); | |
3794 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3795 | spin_unlock_irqrestore(&priv->lock, flags); | |
3796 | return 0; | |
3797 | } | |
3798 | memcpy(&measure_report, &priv->measure_report, size); | |
3799 | priv->measurement_status = 0; | |
3800 | spin_unlock_irqrestore(&priv->lock, flags); | |
3801 | ||
3802 | while (size && (PAGE_SIZE - len)) { | |
3803 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3804 | PAGE_SIZE - len, 1); | |
3805 | len = strlen(buf); | |
3806 | if (PAGE_SIZE - len) | |
3807 | buf[len++] = '\n'; | |
3808 | ||
3809 | ofs += 16; | |
3810 | size -= min(size, 16U); | |
3811 | } | |
3812 | ||
3813 | return len; | |
3814 | } | |
3815 | ||
3816 | static ssize_t store_measurement(struct device *d, | |
3817 | struct device_attribute *attr, | |
3818 | const char *buf, size_t count) | |
3819 | { | |
c79dd5b5 | 3820 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3821 | struct ieee80211_measurement_params params = { |
3822 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
3823 | .start_time = cpu_to_le64(priv->last_tsf), | |
3824 | .duration = cpu_to_le16(1), | |
3825 | }; | |
3826 | u8 type = IWL_MEASURE_BASIC; | |
3827 | u8 buffer[32]; | |
3828 | u8 channel; | |
3829 | ||
3830 | if (count) { | |
3831 | char *p = buffer; | |
3832 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
3833 | channel = simple_strtoul(p, NULL, 0); | |
3834 | if (channel) | |
3835 | params.channel = channel; | |
3836 | ||
3837 | p = buffer; | |
3838 | while (*p && *p != ' ') | |
3839 | p++; | |
3840 | if (*p) | |
3841 | type = simple_strtoul(p + 1, NULL, 0); | |
3842 | } | |
3843 | ||
3844 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
3845 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 3846 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
3847 | |
3848 | return count; | |
3849 | } | |
3850 | ||
3851 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
3852 | show_measurement, store_measurement); | |
4fc22b21 | 3853 | #endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
3854 | |
3855 | static ssize_t store_retry_rate(struct device *d, | |
3856 | struct device_attribute *attr, | |
3857 | const char *buf, size_t count) | |
3858 | { | |
c79dd5b5 | 3859 | struct iwl_priv *priv = dev_get_drvdata(d); |
9257746f TW |
3860 | long val; |
3861 | int ret = strict_strtol(buf, 10, &val); | |
3862 | if (!ret) | |
3863 | return ret; | |
b481de9c | 3864 | |
9257746f | 3865 | priv->retry_rate = (val > 0) ? val : 1; |
b481de9c ZY |
3866 | |
3867 | return count; | |
3868 | } | |
3869 | ||
3870 | static ssize_t show_retry_rate(struct device *d, | |
3871 | struct device_attribute *attr, char *buf) | |
3872 | { | |
c79dd5b5 | 3873 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3874 | return sprintf(buf, "%d", priv->retry_rate); |
3875 | } | |
3876 | ||
3877 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3878 | store_retry_rate); | |
3879 | ||
3880 | static ssize_t store_power_level(struct device *d, | |
3881 | struct device_attribute *attr, | |
3882 | const char *buf, size_t count) | |
3883 | { | |
c79dd5b5 | 3884 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 | 3885 | int ret; |
9257746f TW |
3886 | unsigned long mode; |
3887 | ||
b481de9c | 3888 | |
b481de9c ZY |
3889 | mutex_lock(&priv->mutex); |
3890 | ||
fee1247a | 3891 | if (!iwl_is_ready(priv)) { |
298df1f6 | 3892 | ret = -EAGAIN; |
b481de9c ZY |
3893 | goto out; |
3894 | } | |
3895 | ||
9257746f | 3896 | ret = strict_strtoul(buf, 10, &mode); |
926f0b2e | 3897 | if (ret) |
9257746f TW |
3898 | goto out; |
3899 | ||
298df1f6 EK |
3900 | ret = iwl_power_set_user_mode(priv, mode); |
3901 | if (ret) { | |
5da4b55f MA |
3902 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3903 | goto out; | |
b481de9c | 3904 | } |
298df1f6 | 3905 | ret = count; |
b481de9c ZY |
3906 | |
3907 | out: | |
3908 | mutex_unlock(&priv->mutex); | |
298df1f6 | 3909 | return ret; |
b481de9c ZY |
3910 | } |
3911 | ||
b481de9c ZY |
3912 | static ssize_t show_power_level(struct device *d, |
3913 | struct device_attribute *attr, char *buf) | |
3914 | { | |
c79dd5b5 | 3915 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 EK |
3916 | int mode = priv->power_data.user_power_setting; |
3917 | int system = priv->power_data.system_power_setting; | |
5da4b55f | 3918 | int level = priv->power_data.power_mode; |
b481de9c ZY |
3919 | char *p = buf; |
3920 | ||
298df1f6 EK |
3921 | switch (system) { |
3922 | case IWL_POWER_SYS_AUTO: | |
3923 | p += sprintf(p, "SYSTEM:auto"); | |
b481de9c | 3924 | break; |
298df1f6 EK |
3925 | case IWL_POWER_SYS_AC: |
3926 | p += sprintf(p, "SYSTEM:ac"); | |
3927 | break; | |
3928 | case IWL_POWER_SYS_BATTERY: | |
3929 | p += sprintf(p, "SYSTEM:battery"); | |
b481de9c | 3930 | break; |
b481de9c | 3931 | } |
298df1f6 EK |
3932 | |
3933 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto"); | |
3934 | p += sprintf(p, "\tINDEX:%d", level); | |
3935 | p += sprintf(p, "\n"); | |
3ac7f146 | 3936 | return p - buf + 1; |
b481de9c ZY |
3937 | } |
3938 | ||
3939 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
3940 | store_power_level); | |
3941 | ||
3942 | static ssize_t show_channels(struct device *d, | |
3943 | struct device_attribute *attr, char *buf) | |
3944 | { | |
5d72a1f5 EK |
3945 | |
3946 | struct iwl_priv *priv = dev_get_drvdata(d); | |
3947 | struct ieee80211_channel *channels = NULL; | |
3948 | const struct ieee80211_supported_band *supp_band = NULL; | |
3949 | int len = 0, i; | |
3950 | int count = 0; | |
3951 | ||
3952 | if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status)) | |
3953 | return -EAGAIN; | |
3954 | ||
3955 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); | |
3956 | channels = supp_band->channels; | |
3957 | count = supp_band->n_channels; | |
3958 | ||
3959 | len += sprintf(&buf[len], | |
3960 | "Displaying %d channels in 2.4GHz band " | |
3961 | "(802.11bg):\n", count); | |
3962 | ||
3963 | for (i = 0; i < count; i++) | |
3964 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3965 | ieee80211_frequency_to_channel( | |
3966 | channels[i].center_freq), | |
3967 | channels[i].max_power, | |
3968 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3969 | " (IEEE 802.11h required)" : "", | |
3970 | (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3971 | || (channels[i].flags & | |
3972 | IEEE80211_CHAN_RADAR)) ? "" : | |
3973 | ", IBSS", | |
3974 | channels[i].flags & | |
3975 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3976 | "passive only" : "active/passive"); | |
3977 | ||
3978 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); | |
3979 | channels = supp_band->channels; | |
3980 | count = supp_band->n_channels; | |
3981 | ||
3982 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
3983 | "(802.11a):\n", count); | |
3984 | ||
3985 | for (i = 0; i < count; i++) | |
3986 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3987 | ieee80211_frequency_to_channel( | |
3988 | channels[i].center_freq), | |
3989 | channels[i].max_power, | |
3990 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3991 | " (IEEE 802.11h required)" : "", | |
3992 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3993 | || (channels[i].flags & | |
3994 | IEEE80211_CHAN_RADAR)) ? "" : | |
3995 | ", IBSS", | |
3996 | channels[i].flags & | |
3997 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3998 | "passive only" : "active/passive"); | |
3999 | ||
4000 | return len; | |
b481de9c ZY |
4001 | } |
4002 | ||
4003 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4004 | ||
4005 | static ssize_t show_statistics(struct device *d, | |
4006 | struct device_attribute *attr, char *buf) | |
4007 | { | |
c79dd5b5 | 4008 | struct iwl_priv *priv = dev_get_drvdata(d); |
8f91aecb | 4009 | u32 size = sizeof(struct iwl_notif_statistics); |
b481de9c | 4010 | u32 len = 0, ofs = 0; |
3ac7f146 | 4011 | u8 *data = (u8 *)&priv->statistics; |
b481de9c ZY |
4012 | int rc = 0; |
4013 | ||
fee1247a | 4014 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4015 | return -EAGAIN; |
4016 | ||
4017 | mutex_lock(&priv->mutex); | |
49ea8596 | 4018 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4019 | mutex_unlock(&priv->mutex); |
4020 | ||
4021 | if (rc) { | |
4022 | len = sprintf(buf, | |
4023 | "Error sending statistics request: 0x%08X\n", rc); | |
4024 | return len; | |
4025 | } | |
4026 | ||
4027 | while (size && (PAGE_SIZE - len)) { | |
4028 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4029 | PAGE_SIZE - len, 1); | |
4030 | len = strlen(buf); | |
4031 | if (PAGE_SIZE - len) | |
4032 | buf[len++] = '\n'; | |
4033 | ||
4034 | ofs += 16; | |
4035 | size -= min(size, 16U); | |
4036 | } | |
4037 | ||
4038 | return len; | |
4039 | } | |
4040 | ||
4041 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4042 | ||
b481de9c ZY |
4043 | static ssize_t show_status(struct device *d, |
4044 | struct device_attribute *attr, char *buf) | |
4045 | { | |
c79dd5b5 | 4046 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4047 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4048 | return -EAGAIN; |
4049 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4050 | } | |
4051 | ||
4052 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4053 | ||
b481de9c ZY |
4054 | /***************************************************************************** |
4055 | * | |
4056 | * driver setup and teardown | |
4057 | * | |
4058 | *****************************************************************************/ | |
4059 | ||
4e39317d | 4060 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4061 | { |
4062 | priv->workqueue = create_workqueue(DRV_NAME); | |
4063 | ||
4064 | init_waitqueue_head(&priv->wait_command_queue); | |
4065 | ||
bb8c093b CH |
4066 | INIT_WORK(&priv->up, iwl4965_bg_up); |
4067 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
4068 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
bb8c093b CH |
4069 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); |
4070 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
4419e39b | 4071 | INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor); |
16e727e8 | 4072 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
4a4a9e81 TW |
4073 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4074 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 | 4075 | |
2a421b91 | 4076 | iwl_setup_scan_deferred_work(priv); |
c90a74ba | 4077 | iwl_setup_power_deferred_work(priv); |
bb8c093b | 4078 | |
4e39317d EG |
4079 | if (priv->cfg->ops->lib->setup_deferred_work) |
4080 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4081 | ||
4082 | init_timer(&priv->statistics_periodic); | |
4083 | priv->statistics_periodic.data = (unsigned long)priv; | |
4084 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; | |
b481de9c ZY |
4085 | |
4086 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4087 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4088 | } |
4089 | ||
4e39317d | 4090 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4091 | { |
4e39317d EG |
4092 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4093 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4094 | |
3ae6a054 | 4095 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c | 4096 | cancel_delayed_work(&priv->scan_check); |
c90a74ba | 4097 | cancel_delayed_work_sync(&priv->set_power_save); |
b481de9c | 4098 | cancel_delayed_work(&priv->alive_start); |
b481de9c | 4099 | cancel_work_sync(&priv->beacon_update); |
4e39317d | 4100 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4101 | } |
4102 | ||
bb8c093b | 4103 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c | 4104 | &dev_attr_channels.attr, |
b481de9c ZY |
4105 | &dev_attr_flags.attr, |
4106 | &dev_attr_filter_flags.attr, | |
4fc22b21 | 4107 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4108 | &dev_attr_measurement.attr, |
4109 | #endif | |
4110 | &dev_attr_power_level.attr, | |
4111 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4112 | &dev_attr_statistics.attr, |
4113 | &dev_attr_status.attr, | |
4114 | &dev_attr_temperature.attr, | |
b481de9c | 4115 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4116 | #ifdef CONFIG_IWLWIFI_DEBUG |
4117 | &dev_attr_debug_level.attr, | |
4118 | #endif | |
bc6f59bc | 4119 | &dev_attr_version.attr, |
b481de9c ZY |
4120 | |
4121 | NULL | |
4122 | }; | |
4123 | ||
bb8c093b | 4124 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 4125 | .name = NULL, /* put in device directory */ |
bb8c093b | 4126 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
4127 | }; |
4128 | ||
bb8c093b CH |
4129 | static struct ieee80211_ops iwl4965_hw_ops = { |
4130 | .tx = iwl4965_mac_tx, | |
4131 | .start = iwl4965_mac_start, | |
4132 | .stop = iwl4965_mac_stop, | |
4133 | .add_interface = iwl4965_mac_add_interface, | |
4134 | .remove_interface = iwl4965_mac_remove_interface, | |
4135 | .config = iwl4965_mac_config, | |
4136 | .config_interface = iwl4965_mac_config_interface, | |
4137 | .configure_filter = iwl4965_configure_filter, | |
4138 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 4139 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
4140 | .get_stats = iwl4965_mac_get_stats, |
4141 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
4142 | .conf_tx = iwl4965_mac_conf_tx, | |
bb8c093b | 4143 | .reset_tsf = iwl4965_mac_reset_tsf, |
471b3efd | 4144 | .bss_info_changed = iwl4965_bss_info_changed, |
9ab46173 | 4145 | .ampdu_action = iwl4965_mac_ampdu_action, |
cb43dc25 | 4146 | .hw_scan = iwl_mac_hw_scan |
b481de9c ZY |
4147 | }; |
4148 | ||
bb8c093b | 4149 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4150 | { |
4151 | int err = 0; | |
c79dd5b5 | 4152 | struct iwl_priv *priv; |
b481de9c | 4153 | struct ieee80211_hw *hw; |
82b9a121 | 4154 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4155 | unsigned long flags; |
b481de9c | 4156 | |
316c30d9 AK |
4157 | /************************ |
4158 | * 1. Allocating HW data | |
4159 | ************************/ | |
4160 | ||
6440adb5 CB |
4161 | /* Disabling hardware scan means that mac80211 will perform scans |
4162 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4163 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4164 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4165 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4166 | "Disabling hw_scan\n"); | |
bb8c093b | 4167 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4168 | } |
4169 | ||
1d0a082d AK |
4170 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
4171 | if (!hw) { | |
b481de9c ZY |
4172 | err = -ENOMEM; |
4173 | goto out; | |
4174 | } | |
1d0a082d AK |
4175 | priv = hw->priv; |
4176 | /* At this point both hw and priv are allocated. */ | |
4177 | ||
b481de9c ZY |
4178 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4179 | ||
4180 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4181 | priv->cfg = cfg; |
b481de9c | 4182 | priv->pci_dev = pdev; |
316c30d9 | 4183 | |
0a6857e7 | 4184 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4185 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4186 | atomic_set(&priv->restrict_refcnt, 0); |
4187 | #endif | |
b481de9c | 4188 | |
316c30d9 AK |
4189 | /************************** |
4190 | * 2. Initializing PCI bus | |
4191 | **************************/ | |
4192 | if (pci_enable_device(pdev)) { | |
4193 | err = -ENODEV; | |
4194 | goto out_ieee80211_free_hw; | |
4195 | } | |
4196 | ||
4197 | pci_set_master(pdev); | |
4198 | ||
093d874c | 4199 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36)); |
316c30d9 | 4200 | if (!err) |
093d874c | 4201 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36)); |
cc2a8ea8 | 4202 | if (err) { |
093d874c | 4203 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 4204 | if (!err) |
093d874c | 4205 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 4206 | /* both attempts failed: */ |
316c30d9 | 4207 | if (err) { |
cc2a8ea8 RR |
4208 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4209 | DRV_NAME); | |
316c30d9 | 4210 | goto out_pci_disable_device; |
cc2a8ea8 | 4211 | } |
316c30d9 AK |
4212 | } |
4213 | ||
4214 | err = pci_request_regions(pdev, DRV_NAME); | |
4215 | if (err) | |
4216 | goto out_pci_disable_device; | |
4217 | ||
4218 | pci_set_drvdata(pdev, priv); | |
4219 | ||
316c30d9 AK |
4220 | |
4221 | /*********************** | |
4222 | * 3. Read REV register | |
4223 | ***********************/ | |
4224 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4225 | if (!priv->hw_base) { | |
4226 | err = -ENODEV; | |
4227 | goto out_pci_release_regions; | |
4228 | } | |
4229 | ||
4230 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4231 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4232 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4233 | ||
b661c819 | 4234 | iwl_hw_detect(priv); |
316c30d9 | 4235 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4236 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4237 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4238 | |
e7b63581 TW |
4239 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
4240 | * PCI Tx retries from interfering with C3 CPU state */ | |
4241 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | |
4242 | ||
91238714 TW |
4243 | /* amp init */ |
4244 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4245 | if (err < 0) { |
91238714 | 4246 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4247 | goto out_iounmap; |
4248 | } | |
91238714 TW |
4249 | /***************** |
4250 | * 4. Read EEPROM | |
4251 | *****************/ | |
316c30d9 AK |
4252 | /* Read the EEPROM */ |
4253 | err = iwl_eeprom_init(priv); | |
4254 | if (err) { | |
4255 | IWL_ERROR("Unable to init EEPROM\n"); | |
4256 | goto out_iounmap; | |
4257 | } | |
8614f360 TW |
4258 | err = iwl_eeprom_check_version(priv); |
4259 | if (err) | |
4260 | goto out_iounmap; | |
4261 | ||
02883017 | 4262 | /* extract MAC Address */ |
316c30d9 | 4263 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
e174961c | 4264 | IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr); |
316c30d9 AK |
4265 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); |
4266 | ||
4267 | /************************ | |
4268 | * 5. Setup HW constants | |
4269 | ************************/ | |
da154e30 | 4270 | if (iwl_set_hw_params(priv)) { |
5425e490 | 4271 | IWL_ERROR("failed to set hw parameters\n"); |
073d3f5f | 4272 | goto out_free_eeprom; |
316c30d9 AK |
4273 | } |
4274 | ||
4275 | /******************* | |
6ba87956 | 4276 | * 6. Setup priv |
316c30d9 | 4277 | *******************/ |
b481de9c | 4278 | |
6ba87956 | 4279 | err = iwl_init_drv(priv); |
bf85ea4f | 4280 | if (err) |
399f4900 | 4281 | goto out_free_eeprom; |
bf85ea4f | 4282 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4283 | |
4284 | /********************************** | |
4285 | * 7. Initialize module parameters | |
4286 | **********************************/ | |
4287 | ||
4288 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4289 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4290 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4291 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4292 | } | |
4293 | ||
316c30d9 AK |
4294 | /******************** |
4295 | * 8. Setup services | |
4296 | ********************/ | |
0359facc | 4297 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 4298 | iwl4965_disable_interrupts(priv); |
0359facc | 4299 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
4300 | |
4301 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4302 | if (err) { | |
4303 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4304 | goto out_uninit_drv; |
316c30d9 AK |
4305 | } |
4306 | ||
316c30d9 | 4307 | |
4e39317d | 4308 | iwl_setup_deferred_work(priv); |
653fa4a0 | 4309 | iwl_setup_rx_handlers(priv); |
316c30d9 AK |
4310 | |
4311 | /******************** | |
4312 | * 9. Conclude | |
4313 | ********************/ | |
5a66926a ZY |
4314 | pci_save_state(pdev); |
4315 | pci_disable_device(pdev); | |
b481de9c | 4316 | |
6ba87956 TW |
4317 | /********************************** |
4318 | * 10. Setup and register mac80211 | |
4319 | **********************************/ | |
4320 | ||
4321 | err = iwl_setup_mac(priv); | |
4322 | if (err) | |
4323 | goto out_remove_sysfs; | |
4324 | ||
4325 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4326 | if (err) | |
4327 | IWL_ERROR("failed to create debugfs files\n"); | |
4328 | ||
58d0f361 EG |
4329 | err = iwl_rfkill_init(priv); |
4330 | if (err) | |
4331 | IWL_ERROR("Unable to initialize RFKILL system. " | |
4332 | "Ignoring error: %d\n", err); | |
4333 | iwl_power_initialize(priv); | |
b481de9c ZY |
4334 | return 0; |
4335 | ||
316c30d9 AK |
4336 | out_remove_sysfs: |
4337 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6ba87956 TW |
4338 | out_uninit_drv: |
4339 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4340 | out_free_eeprom: |
4341 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4342 | out_iounmap: |
4343 | pci_iounmap(pdev, priv->hw_base); | |
4344 | out_pci_release_regions: | |
4345 | pci_release_regions(pdev); | |
316c30d9 | 4346 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4347 | out_pci_disable_device: |
4348 | pci_disable_device(pdev); | |
b481de9c ZY |
4349 | out_ieee80211_free_hw: |
4350 | ieee80211_free_hw(priv->hw); | |
4351 | out: | |
4352 | return err; | |
4353 | } | |
4354 | ||
c83dbf68 | 4355 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 4356 | { |
c79dd5b5 | 4357 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 4358 | unsigned long flags; |
b481de9c ZY |
4359 | |
4360 | if (!priv) | |
4361 | return; | |
4362 | ||
4363 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4364 | ||
67249625 EG |
4365 | iwl_dbgfs_unregister(priv); |
4366 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4367 | ||
0b124c31 GG |
4368 | /* ieee80211_unregister_hw call wil cause iwl4965_mac_stop to |
4369 | * to be called and iwl4965_down since we are removing the device | |
4370 | * we need to set STATUS_EXIT_PENDING bit. | |
4371 | */ | |
4372 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
c4f55232 RR |
4373 | if (priv->mac80211_registered) { |
4374 | ieee80211_unregister_hw(priv->hw); | |
4375 | priv->mac80211_registered = 0; | |
0b124c31 GG |
4376 | } else { |
4377 | iwl4965_down(priv); | |
c4f55232 RR |
4378 | } |
4379 | ||
0359facc MA |
4380 | /* make sure we flush any pending irq or |
4381 | * tasklet for the driver | |
4382 | */ | |
4383 | spin_lock_irqsave(&priv->lock, flags); | |
4384 | iwl4965_disable_interrupts(priv); | |
4385 | spin_unlock_irqrestore(&priv->lock, flags); | |
4386 | ||
4387 | iwl_synchronize_irq(priv); | |
4388 | ||
58d0f361 | 4389 | iwl_rfkill_unregister(priv); |
bb8c093b | 4390 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4391 | |
4392 | if (priv->rxq.bd) | |
a55360e4 | 4393 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4394 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4395 | |
37deb2a0 | 4396 | iwl_clear_stations_table(priv); |
073d3f5f | 4397 | iwl_eeprom_free(priv); |
b481de9c | 4398 | |
b481de9c | 4399 | |
948c171c MA |
4400 | /*netif_stop_queue(dev); */ |
4401 | flush_workqueue(priv->workqueue); | |
4402 | ||
bb8c093b | 4403 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
4404 | * priv->workqueue... so we can't take down the workqueue |
4405 | * until now... */ | |
4406 | destroy_workqueue(priv->workqueue); | |
4407 | priv->workqueue = NULL; | |
4408 | ||
b481de9c ZY |
4409 | pci_iounmap(pdev, priv->hw_base); |
4410 | pci_release_regions(pdev); | |
4411 | pci_disable_device(pdev); | |
4412 | pci_set_drvdata(pdev, NULL); | |
4413 | ||
6ba87956 | 4414 | iwl_uninit_drv(priv); |
b481de9c ZY |
4415 | |
4416 | if (priv->ibss_beacon) | |
4417 | dev_kfree_skb(priv->ibss_beacon); | |
4418 | ||
4419 | ieee80211_free_hw(priv->hw); | |
4420 | } | |
4421 | ||
4422 | #ifdef CONFIG_PM | |
4423 | ||
bb8c093b | 4424 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4425 | { |
c79dd5b5 | 4426 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4427 | |
e655b9f0 ZY |
4428 | if (priv->is_open) { |
4429 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
4430 | iwl4965_mac_stop(priv->hw); | |
4431 | priv->is_open = 1; | |
4432 | } | |
b481de9c | 4433 | |
b481de9c ZY |
4434 | pci_set_power_state(pdev, PCI_D3hot); |
4435 | ||
b481de9c ZY |
4436 | return 0; |
4437 | } | |
4438 | ||
bb8c093b | 4439 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 4440 | { |
c79dd5b5 | 4441 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4442 | |
b481de9c | 4443 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4444 | |
e655b9f0 ZY |
4445 | if (priv->is_open) |
4446 | iwl4965_mac_start(priv->hw); | |
b481de9c | 4447 | |
e655b9f0 | 4448 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4449 | return 0; |
4450 | } | |
4451 | ||
4452 | #endif /* CONFIG_PM */ | |
4453 | ||
4454 | /***************************************************************************** | |
4455 | * | |
4456 | * driver and module entry point | |
4457 | * | |
4458 | *****************************************************************************/ | |
4459 | ||
fed9017e RR |
4460 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4461 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4fc22b21 | 4462 | #ifdef CONFIG_IWL4965 |
fed9017e RR |
4463 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4464 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4fc22b21 | 4465 | #endif /* CONFIG_IWL4965 */ |
5a6a256e | 4466 | #ifdef CONFIG_IWL5000 |
47408639 EK |
4467 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4468 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | |
4469 | {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, | |
4470 | {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, | |
4471 | {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, | |
4472 | {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, | |
5a6a256e | 4473 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, |
47408639 EK |
4474 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, |
4475 | {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4476 | {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
e96a8495 TW |
4477 | /* 5350 WiFi/WiMax */ |
4478 | {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, | |
4479 | {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, | |
4480 | {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, | |
5a6a256e | 4481 | #endif /* CONFIG_IWL5000 */ |
fed9017e RR |
4482 | {0} |
4483 | }; | |
4484 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4485 | ||
4486 | static struct pci_driver iwl_driver = { | |
b481de9c | 4487 | .name = DRV_NAME, |
fed9017e | 4488 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
4489 | .probe = iwl4965_pci_probe, |
4490 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 4491 | #ifdef CONFIG_PM |
bb8c093b CH |
4492 | .suspend = iwl4965_pci_suspend, |
4493 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
4494 | #endif |
4495 | }; | |
4496 | ||
bb8c093b | 4497 | static int __init iwl4965_init(void) |
b481de9c ZY |
4498 | { |
4499 | ||
4500 | int ret; | |
4501 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4502 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 | 4503 | |
e227ceac | 4504 | ret = iwlagn_rate_control_register(); |
897e1cf2 RC |
4505 | if (ret) { |
4506 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4507 | return ret; | |
4508 | } | |
4509 | ||
fed9017e | 4510 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4511 | if (ret) { |
4512 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4513 | goto error_register; |
b481de9c | 4514 | } |
b481de9c ZY |
4515 | |
4516 | return ret; | |
897e1cf2 | 4517 | |
897e1cf2 | 4518 | error_register: |
e227ceac | 4519 | iwlagn_rate_control_unregister(); |
897e1cf2 | 4520 | return ret; |
b481de9c ZY |
4521 | } |
4522 | ||
bb8c093b | 4523 | static void __exit iwl4965_exit(void) |
b481de9c | 4524 | { |
fed9017e | 4525 | pci_unregister_driver(&iwl_driver); |
e227ceac | 4526 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
4527 | } |
4528 | ||
bb8c093b CH |
4529 | module_exit(iwl4965_exit); |
4530 | module_init(iwl4965_init); |