iwl3945: Getting rid of iwl-3945-debug.h
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
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43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
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56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
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62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
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70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
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76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
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83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
5b9f8cd3 99static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
deb09c43 100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
54559703 111 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 112 * @priv: staging_rxon is compared to active_rxon
b481de9c 113 *
9fbab516
BC
114 * If the RXON structure is changing enough to require a new tune,
115 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
116 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 117 */
54559703 118static int iwl_full_rxon_required(struct iwl_priv *priv)
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119{
120
121 /* These items are only settable from the full RXON command */
5d1e2325 122 if (!(iwl_is_associated(priv)) ||
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123 compare_ether_addr(priv->staging_rxon.bssid_addr,
124 priv->active_rxon.bssid_addr) ||
125 compare_ether_addr(priv->staging_rxon.node_addr,
126 priv->active_rxon.node_addr) ||
127 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
128 priv->active_rxon.wlap_bssid_addr) ||
129 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
130 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
131 (priv->staging_rxon.air_propagation !=
132 priv->active_rxon.air_propagation) ||
133 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
134 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
135 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
136 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
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137 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
138 return 1;
139
140 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
141 * be updated with the RXON_ASSOC command -- however only some
142 * flag transitions are allowed using RXON_ASSOC */
143
144 /* Check if we are not switching bands */
145 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
146 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
147 return 1;
148
149 /* Check if we are switching association toggle */
150 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
151 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
152 return 1;
153
154 return 0;
155}
156
b481de9c 157/**
5b9f8cd3 158 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 159 *
01ebd063 160 * The RXON command in staging_rxon is committed to the hardware and
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161 * the active_rxon structure is updated with the new data. This
162 * function correctly transitions out of the RXON_ASSOC_MSK state if
163 * a HW tune is required based on the RXON structure changes.
164 */
5b9f8cd3 165static int iwl_commit_rxon(struct iwl_priv *priv)
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166{
167 /* cast away the const for active_rxon in this function */
c1adf9fb 168 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG
169 int ret;
170 bool new_assoc =
171 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 172
fee1247a 173 if (!iwl_is_alive(priv))
43d59b32 174 return -EBUSY;
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175
176 /* always get timestamp with Rx frame */
177 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
178 /* allow CTS-to-self if possible. this is relevant only for
179 * 5000, but will not damage 4965 */
180 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 181
8f5c87dc 182 ret = iwl_agn_check_rxon_cmd(&priv->staging_rxon);
43d59b32 183 if (ret) {
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184 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
185 return -EINVAL;
186 }
187
188 /* If we don't need to send a full RXON, we can use
5b9f8cd3 189 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 190 * and other flags for the current radio configuration. */
54559703 191 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG
192 ret = iwl_send_rxon_assoc(priv);
193 if (ret) {
194 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
195 return ret;
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196 }
197
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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199 return 0;
200 }
201
202 /* station table will be cleared */
203 priv->assoc_station_added = 0;
204
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205 /* If we are currently associated and the new config requires
206 * an RXON_ASSOC and the new config wants the associated mask enabled,
207 * we must clear the associated from the active configuration
208 * before we apply the new config */
43d59b32 209 if (iwl_is_associated(priv) && new_assoc) {
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210 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
211 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
212
43d59b32 213 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 214 sizeof(struct iwl_rxon_cmd),
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215 &priv->active_rxon);
216
217 /* If the mask clearing failed then we set
218 * active_rxon back to what it was previously */
43d59b32 219 if (ret) {
b481de9c 220 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
221 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
222 return ret;
b481de9c 223 }
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224 }
225
226 IWL_DEBUG_INFO("Sending RXON\n"
227 "* with%s RXON_FILTER_ASSOC_MSK\n"
228 "* channel = %d\n"
e174961c 229 "* bssid = %pM\n",
43d59b32 230 (new_assoc ? "" : "out"),
b481de9c 231 le16_to_cpu(priv->staging_rxon.channel),
e174961c 232 priv->staging_rxon.bssid_addr);
b481de9c 233
5b9f8cd3 234 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
235
236 /* Apply the new configuration
237 * RXON unassoc clears the station table in uCode, send it before
238 * we add the bcast station. If assoc bit is set, we will send RXON
239 * after having added the bcast and bssid station.
240 */
241 if (!new_assoc) {
242 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 243 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
244 if (ret) {
245 IWL_ERROR("Error setting new RXON (%d)\n", ret);
246 return ret;
247 }
248 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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249 }
250
37deb2a0 251 iwl_clear_stations_table(priv);
556f8db7 252
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253 if (!priv->error_recovering)
254 priv->start_calib = 0;
255
b481de9c 256 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 257 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 258 IWL_INVALID_STATION) {
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259 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
260 return -EIO;
261 }
262
263 /* If we have set the ASSOC_MSK and we are in BSS mode then
264 * add the IWL_AP_ID to the station rate table */
9185159d 265 if (new_assoc) {
05c914fe 266 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW
267 ret = iwl_rxon_add_station(priv,
268 priv->active_rxon.bssid_addr, 1);
269 if (ret == IWL_INVALID_STATION) {
270 IWL_ERROR("Error adding AP address for TX.\n");
271 return -EIO;
272 }
273 priv->assoc_station_added = 1;
274 if (priv->default_wep_key &&
275 iwl_send_static_wepkey_cmd(priv, 0))
276 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 277 }
43d59b32
EG
278
279 /* Apply the new configuration
280 * RXON assoc doesn't clear the station table in uCode,
281 */
282 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
283 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
284 if (ret) {
285 IWL_ERROR("Error setting new RXON (%d)\n", ret);
286 return ret;
287 }
288 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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289 }
290
36da7d70
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291 iwl_init_sensitivity(priv);
292
293 /* If we issue a new RXON command which required a tune then we must
294 * send a new TXPOWER command or we won't be able to Tx any frames */
295 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
296 if (ret) {
297 IWL_ERROR("Error sending TX power (%d)\n", ret);
298 return ret;
299 }
300
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301 return 0;
302}
303
5b9f8cd3 304void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA
305{
306
c7de35cd 307 iwl_set_rxon_chain(priv);
5b9f8cd3 308 iwl_commit_rxon(priv);
5da4b55f
MA
309}
310
5b9f8cd3 311static int iwl_send_bt_config(struct iwl_priv *priv)
b481de9c 312{
2aa6ab86 313 struct iwl_bt_cmd bt_cmd = {
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314 .flags = 3,
315 .lead_time = 0xAA,
316 .max_kill = 1,
317 .kill_ack_mask = 0,
318 .kill_cts_mask = 0,
319 };
320
857485c0 321 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2aa6ab86 322 sizeof(struct iwl_bt_cmd), &bt_cmd);
b481de9c
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323}
324
fcab423d 325static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
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326{
327 struct list_head *element;
328
329 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
330 priv->frames_count);
331
332 while (!list_empty(&priv->free_frames)) {
333 element = priv->free_frames.next;
334 list_del(element);
fcab423d 335 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
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336 priv->frames_count--;
337 }
338
339 if (priv->frames_count) {
340 IWL_WARNING("%d frames still in use. Did we lose one?\n",
341 priv->frames_count);
342 priv->frames_count = 0;
343 }
344}
345
fcab423d 346static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 347{
fcab423d 348 struct iwl_frame *frame;
b481de9c
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349 struct list_head *element;
350 if (list_empty(&priv->free_frames)) {
351 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
352 if (!frame) {
353 IWL_ERROR("Could not allocate frame!\n");
354 return NULL;
355 }
356
357 priv->frames_count++;
358 return frame;
359 }
360
361 element = priv->free_frames.next;
362 list_del(element);
fcab423d 363 return list_entry(element, struct iwl_frame, list);
b481de9c
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364}
365
fcab423d 366static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
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367{
368 memset(frame, 0, sizeof(*frame));
369 list_add(&frame->list, &priv->free_frames);
370}
371
4bf64efd
TW
372static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
373 struct ieee80211_hdr *hdr,
73ec1cc2 374 int left)
b481de9c 375{
3109ece1 376 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
377 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
378 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
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379 return 0;
380
381 if (priv->ibss_beacon->len > left)
382 return 0;
383
384 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
385
386 return priv->ibss_beacon->len;
387}
388
5b9f8cd3 389static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 390{
39e88504
GC
391 int i;
392 int rate_mask;
393
394 /* Set rate mask*/
395 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
dbce56a4 396 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
39e88504 397 else
dbce56a4 398 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
b481de9c 399
39e88504 400 /* Find lowest valid rate */
b481de9c 401 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 402 i = iwl_rates[i].next_ieee) {
b481de9c 403 if (rate_mask & (1 << i))
1826dcc0 404 return iwl_rates[i].plcp;
b481de9c
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405 }
406
39e88504
GC
407 /* No valid rate was found. Assign the lowest one */
408 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
409 return IWL_RATE_1M_PLCP;
410 else
411 return IWL_RATE_6M_PLCP;
b481de9c
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412}
413
5b9f8cd3 414static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW
415 struct iwl_frame *frame, u8 rate)
416{
417 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
418 unsigned int frame_size;
419
420 tx_beacon_cmd = &frame->u.beacon;
421 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
422
423 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
424 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
425
426 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW
427 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
428
429 BUG_ON(frame_size > MAX_MPDU_SIZE);
430 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
431
432 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
433 tx_beacon_cmd->tx.rate_n_flags =
434 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
435 else
436 tx_beacon_cmd->tx.rate_n_flags =
437 iwl_hw_set_rate_n_flags(rate, 0);
438
439 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
440 TX_CMD_FLG_TSF_MSK |
441 TX_CMD_FLG_STA_RATE_MSK;
442
443 return sizeof(*tx_beacon_cmd) + frame_size;
444}
5b9f8cd3 445static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 446{
fcab423d 447 struct iwl_frame *frame;
b481de9c
ZY
448 unsigned int frame_size;
449 int rc;
450 u8 rate;
451
fcab423d 452 frame = iwl_get_free_frame(priv);
b481de9c
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453
454 if (!frame) {
455 IWL_ERROR("Could not obtain free frame buffer for beacon "
456 "command.\n");
457 return -ENOMEM;
458 }
459
5b9f8cd3 460 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 461
5b9f8cd3 462 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 463
857485c0 464 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
465 &frame->u.cmd[0]);
466
fcab423d 467 iwl_free_frame(priv, frame);
b481de9c
ZY
468
469 return rc;
470}
471
b481de9c
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472/******************************************************************************
473 *
474 * Misc. internal state and helper functions
475 *
476 ******************************************************************************/
b481de9c 477
5b9f8cd3 478static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG
479 struct ieee80211_bss_conf *bss_conf)
480{
ae5eb026 481 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 482 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 483 struct ieee80211_sta *sta;
d1141dfb
EG
484
485 IWL_DEBUG_MAC80211("enter: \n");
486
d1141dfb
EG
487 if (!iwl_conf->is_ht)
488 return;
489
ae5eb026
JB
490
491 /*
492 * It is totally wrong to base global information on something
493 * that is valid only when associated, alas, this driver works
494 * that way and I don't know how to fix it.
495 */
496
497 rcu_read_lock();
498 sta = ieee80211_find_sta(priv->hw, priv->bssid);
499 if (!sta) {
500 rcu_read_unlock();
501 return;
502 }
503 ht_conf = &sta->ht_cap;
504
d1141dfb 505 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 506 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 507 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 508 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
509
510 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
511 iwl_conf->max_amsdu_size =
512 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
513
514 iwl_conf->supported_chan_width =
d9fe60de 515 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 516
094d05dc
S
517 /*
518 * XXX: The HT configuration needs to be moved into iwl_mac_config()
519 * to be done there correctly.
520 */
521
522 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
523 if (priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40MINUS)
524 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
525 else if(priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40PLUS)
526 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
527
d1141dfb 528 /* If no above or below channel supplied disable FAT channel */
d9fe60de 529 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 530 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG
531 iwl_conf->supported_chan_width = 0;
532
12837be1
RR
533 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
534
d9fe60de 535 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 536
094d05dc 537 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 538 iwl_conf->ht_protection =
ae5eb026 539 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 540 iwl_conf->non_GF_STA_present =
ae5eb026
JB
541 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
542
543 rcu_read_unlock();
d1141dfb 544
d1141dfb
EG
545 IWL_DEBUG_MAC80211("leave\n");
546}
547
b481de9c
ZY
548/*
549 * QoS support
550*/
1ff50bda 551static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 552{
b481de9c
ZY
553 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
554 return;
555
b481de9c
ZY
556 priv->qos_data.def_qos_parm.qos_flags = 0;
557
558 if (priv->qos_data.qos_cap.q_AP.queue_request &&
559 !priv->qos_data.qos_cap.q_AP.txop_request)
560 priv->qos_data.def_qos_parm.qos_flags |=
561 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
562 if (priv->qos_data.qos_active)
563 priv->qos_data.def_qos_parm.qos_flags |=
564 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
565
fd105e79 566 if (priv->current_ht_config.is_ht)
f1f1f5c7 567 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 568
3109ece1 569 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
570 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
571 priv->qos_data.qos_active,
572 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 573
1ff50bda
EG
574 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
575 sizeof(struct iwl_qosparam_cmd),
576 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
577 }
578}
579
b481de9c 580#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 581
3195c1f3 582static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
583{
584 u16 new_val = 0;
585 u16 beacon_factor = 0;
586
3195c1f3
TW
587 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
588 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY
589 new_val = beacon_val / beacon_factor;
590
3195c1f3 591 return new_val;
b481de9c
ZY
592}
593
3195c1f3 594static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 595{
3195c1f3
TW
596 u64 tsf;
597 s32 interval_tm, rem;
b481de9c
ZY
598 unsigned long flags;
599 struct ieee80211_conf *conf = NULL;
600 u16 beacon_int = 0;
601
602 conf = ieee80211_get_hw_conf(priv->hw);
603
604 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 605 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 606 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 607
05c914fe 608 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 609 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY
610 priv->rxon_timing.atim_window = 0;
611 } else {
3195c1f3
TW
612 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
613
b481de9c
ZY
614 /* TODO: we need to get atim_window from upper stack
615 * for now we set to 0 */
616 priv->rxon_timing.atim_window = 0;
617 }
618
3195c1f3 619 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 620
3195c1f3
TW
621 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
622 interval_tm = beacon_int * 1024;
623 rem = do_div(tsf, interval_tm);
624 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
625
626 spin_unlock_irqrestore(&priv->lock, flags);
627 IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
628 le16_to_cpu(priv->rxon_timing.beacon_interval),
629 le32_to_cpu(priv->rxon_timing.beacon_init_val),
630 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY
631}
632
82a66bbb
TW
633static void iwl_set_flags_for_band(struct iwl_priv *priv,
634 enum ieee80211_band band)
b481de9c 635{
8318d78a 636 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
637 priv->staging_rxon.flags &=
638 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
639 | RXON_FLG_CCK_MSK);
640 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
641 } else {
5b9f8cd3 642 /* Copied from iwl_post_associate() */
b481de9c
ZY
643 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
644 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
645 else
646 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
647
05c914fe 648 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
649 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
650
651 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
652 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
653 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
654 }
655}
656
657/*
01ebd063 658 * initialize rxon structure with default values from eeprom
b481de9c 659 */
5b9f8cd3 660static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
b481de9c 661{
bf85ea4f 662 const struct iwl_channel_info *ch_info;
b481de9c
ZY
663
664 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
665
60294de3 666 switch (mode) {
05c914fe 667 case NL80211_IFTYPE_AP:
b481de9c
ZY
668 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
669 break;
670
05c914fe 671 case NL80211_IFTYPE_STATION:
b481de9c
ZY
672 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
673 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
674 break;
675
05c914fe 676 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY
677 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
678 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
679 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
680 RXON_FILTER_ACCEPT_GRP_MSK;
681 break;
682
05c914fe 683 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY
684 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
685 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
686 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
687 break;
69dc5d9d 688 default:
60294de3 689 IWL_ERROR("Unsupported interface type %d\n", mode);
69dc5d9d 690 break;
b481de9c
ZY
691 }
692
693#if 0
694 /* TODO: Figure out when short_preamble would be set and cache from
695 * that */
696 if (!hw_to_local(priv->hw)->short_preamble)
697 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
698 else
699 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
700#endif
701
8622e705 702 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 703 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
704
705 if (!ch_info)
706 ch_info = &priv->channel_info[0];
707
708 /*
709 * in some case A channels are all non IBSS
710 * in this case force B/G channel
711 */
05c914fe 712 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY
713 !(is_channel_ibss(ch_info)))
714 ch_info = &priv->channel_info[0];
715
716 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 717 priv->band = ch_info->band;
b481de9c 718
82a66bbb 719 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
720
721 priv->staging_rxon.ofdm_basic_rates =
722 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
723 priv->staging_rxon.cck_basic_rates =
724 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
725
726 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
727 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
728 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
729 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
730 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
731 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 732 iwl_set_rxon_chain(priv);
b481de9c
ZY
733}
734
5b9f8cd3 735static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 736{
5b9f8cd3 737 iwl_connection_init_rx_config(priv, mode);
b481de9c
ZY
738 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
739
37deb2a0 740 iwl_clear_stations_table(priv);
b481de9c 741
fde3571f 742 /* dont commit rxon if rf-kill is on*/
fee1247a 743 if (!iwl_is_ready_rf(priv))
fde3571f
MA
744 return -EAGAIN;
745
746 cancel_delayed_work(&priv->scan_check);
2a421b91 747 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
748 IWL_WARNING("Aborted scan still in progress after 100ms\n");
749 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
750 return -EAGAIN;
751 }
752
5b9f8cd3 753 iwl_commit_rxon(priv);
b481de9c
ZY
754
755 return 0;
756}
757
5b9f8cd3 758static void iwl_set_rate(struct iwl_priv *priv)
b481de9c 759{
8318d78a 760 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
761 struct ieee80211_rate *rate;
762 int i;
763
d1141dfb 764 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
765 if (!hw) {
766 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
767 return;
768 }
b481de9c
ZY
769
770 priv->active_rate = 0;
771 priv->active_rate_basic = 0;
772
8318d78a
JB
773 for (i = 0; i < hw->n_bitrates; i++) {
774 rate = &(hw->bitrates[i]);
775 if (rate->hw_value < IWL_RATE_COUNT)
776 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
777 }
778
779 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
780 priv->active_rate, priv->active_rate_basic);
781
782 /*
783 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
784 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
785 * OFDM
786 */
787 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
788 priv->staging_rxon.cck_basic_rates =
789 ((priv->active_rate_basic &
790 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
791 else
792 priv->staging_rxon.cck_basic_rates =
793 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
794
795 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
796 priv->staging_rxon.ofdm_basic_rates =
797 ((priv->active_rate_basic &
798 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
799 IWL_FIRST_OFDM_RATE) & 0xFF;
800 else
801 priv->staging_rxon.ofdm_basic_rates =
802 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
803}
804
b481de9c 805
b481de9c
ZY
806/******************************************************************************
807 *
808 * Generic RX handler implementations
809 *
810 ******************************************************************************/
885ba202
TW
811static void iwl_rx_reply_alive(struct iwl_priv *priv,
812 struct iwl_rx_mem_buffer *rxb)
b481de9c 813{
db11d634 814 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 815 struct iwl_alive_resp *palive;
b481de9c
ZY
816 struct delayed_work *pwork;
817
818 palive = &pkt->u.alive_frame;
819
820 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
821 "0x%01X 0x%01X\n",
822 palive->is_valid, palive->ver_type,
823 palive->ver_subtype);
824
825 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
826 IWL_DEBUG_INFO("Initialization Alive received.\n");
827 memcpy(&priv->card_alive_init,
828 &pkt->u.alive_frame,
885ba202 829 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
830 pwork = &priv->init_alive_start;
831 } else {
832 IWL_DEBUG_INFO("Runtime Alive received.\n");
833 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 834 sizeof(struct iwl_alive_resp));
b481de9c
ZY
835 pwork = &priv->alive_start;
836 }
837
838 /* We delay the ALIVE response by 5ms to
839 * give the HW RF Kill time to activate... */
840 if (palive->is_valid == UCODE_VALID_OK)
841 queue_delayed_work(priv->workqueue, pwork,
842 msecs_to_jiffies(5));
843 else
844 IWL_WARNING("uCode did not respond OK.\n");
845}
846
5b9f8cd3 847static void iwl_rx_reply_error(struct iwl_priv *priv,
a55360e4 848 struct iwl_rx_mem_buffer *rxb)
b481de9c 849{
db11d634 850 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
851
852 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
853 "seq 0x%04X ser 0x%08X\n",
854 le32_to_cpu(pkt->u.err_resp.error_type),
855 get_cmd_string(pkt->u.err_resp.cmd_id),
856 pkt->u.err_resp.cmd_id,
857 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
858 le32_to_cpu(pkt->u.err_resp.error_info));
859}
860
861#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
862
5b9f8cd3 863static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 864{
db11d634 865 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 866 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
2aa6ab86 867 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
868 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
869 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
870 rxon->channel = csa->channel;
871 priv->staging_rxon.channel = csa->channel;
872}
873
5b9f8cd3 874static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 875 struct iwl_rx_mem_buffer *rxb)
b481de9c 876{
0a6857e7 877#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 878 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86 879 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
880 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
881 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
882#endif
883}
884
5b9f8cd3 885static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 886 struct iwl_rx_mem_buffer *rxb)
b481de9c 887{
db11d634 888 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
889 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
890 "notification for %s:\n",
891 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 892 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
893}
894
5b9f8cd3 895static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 896{
c79dd5b5
TW
897 struct iwl_priv *priv =
898 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
899 struct sk_buff *beacon;
900
901 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 902 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
903
904 if (!beacon) {
905 IWL_ERROR("update beacon failed\n");
906 return;
907 }
908
909 mutex_lock(&priv->mutex);
910 /* new beacon skb is allocated every time; dispose previous.*/
911 if (priv->ibss_beacon)
912 dev_kfree_skb(priv->ibss_beacon);
913
914 priv->ibss_beacon = beacon;
915 mutex_unlock(&priv->mutex);
916
5b9f8cd3 917 iwl_send_beacon_cmd(priv);
b481de9c
ZY
918}
919
4e39317d 920/**
5b9f8cd3 921 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG
922 *
923 * This callback is provided in order to send a statistics request.
924 *
925 * This timer function is continually reset to execute within
926 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
927 * was received. We need to ensure we receive the statistics in order
928 * to update the temperature used for calibrating the TXPOWER.
929 */
5b9f8cd3 930static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG
931{
932 struct iwl_priv *priv = (struct iwl_priv *)data;
933
934 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
935 return;
936
61780ee3
MA
937 /* dont send host command if rf-kill is on */
938 if (!iwl_is_ready_rf(priv))
939 return;
940
4e39317d
EG
941 iwl_send_statistics_request(priv, CMD_ASYNC);
942}
943
5b9f8cd3 944static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 945 struct iwl_rx_mem_buffer *rxb)
b481de9c 946{
0a6857e7 947#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 948 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW
949 struct iwl4965_beacon_notif *beacon =
950 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 951 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
952
953 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
954 "tsf %d %d rate %d\n",
25a6572c 955 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
956 beacon->beacon_notify_hdr.failure_frame,
957 le32_to_cpu(beacon->ibss_mgr_status),
958 le32_to_cpu(beacon->high_tsf),
959 le32_to_cpu(beacon->low_tsf), rate);
960#endif
961
05c914fe 962 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
963 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
964 queue_work(priv->workqueue, &priv->beacon_update);
965}
966
b481de9c
ZY
967/* Handle notification from uCode that card's power state is changing
968 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 969static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 970 struct iwl_rx_mem_buffer *rxb)
b481de9c 971{
db11d634 972 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
973 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
974 unsigned long status = priv->status;
975
976 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
977 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
978 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
979
980 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
981 RF_CARD_DISABLED)) {
982
3395f6e9 983 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
984 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
985
3395f6e9
TW
986 if (!iwl_grab_nic_access(priv)) {
987 iwl_write_direct32(
b481de9c
ZY
988 priv, HBUS_TARG_MBX_C,
989 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
990
3395f6e9 991 iwl_release_nic_access(priv);
b481de9c
ZY
992 }
993
994 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 995 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 996 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
997 if (!iwl_grab_nic_access(priv)) {
998 iwl_write_direct32(
b481de9c
ZY
999 priv, HBUS_TARG_MBX_C,
1000 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1001
3395f6e9 1002 iwl_release_nic_access(priv);
b481de9c
ZY
1003 }
1004 }
1005
1006 if (flags & RF_CARD_DISABLED) {
3395f6e9 1007 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1008 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1009 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1010 if (!iwl_grab_nic_access(priv))
1011 iwl_release_nic_access(priv);
b481de9c
ZY
1012 }
1013 }
1014
1015 if (flags & HW_CARD_DISABLED)
1016 set_bit(STATUS_RF_KILL_HW, &priv->status);
1017 else
1018 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1019
1020
1021 if (flags & SW_CARD_DISABLED)
1022 set_bit(STATUS_RF_KILL_SW, &priv->status);
1023 else
1024 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1025
1026 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1027 iwl_scan_cancel(priv);
b481de9c
ZY
1028
1029 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1030 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1031 (test_bit(STATUS_RF_KILL_SW, &status) !=
1032 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1033 queue_work(priv->workqueue, &priv->rf_kill);
1034 else
1035 wake_up_interruptible(&priv->wait_command_queue);
1036}
1037
5b9f8cd3 1038int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW
1039{
1040 int ret;
1041 unsigned long flags;
1042
1043 spin_lock_irqsave(&priv->lock, flags);
1044 ret = iwl_grab_nic_access(priv);
1045 if (ret)
1046 goto err;
1047
1048 if (src == IWL_PWR_SRC_VAUX) {
1049 u32 val;
e7b63581 1050 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW
1051 &val);
1052
1053 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1054 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1055 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1056 ~APMG_PS_CTRL_MSK_PWR_SRC);
1057 } else {
1058 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1059 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1060 ~APMG_PS_CTRL_MSK_PWR_SRC);
1061 }
1062
1063 iwl_release_nic_access(priv);
1064err:
1065 spin_unlock_irqrestore(&priv->lock, flags);
1066 return ret;
1067}
1068
b481de9c 1069/**
5b9f8cd3 1070 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1071 *
1072 * Setup the RX handlers for each of the reply types sent from the uCode
1073 * to the host.
1074 *
1075 * This function chains into the hardware specific files for them to setup
1076 * any hardware specific handlers as well.
1077 */
653fa4a0 1078static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1079{
885ba202 1080 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG
1081 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1082 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 1083 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1084 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG
1085 iwl_rx_pm_debug_statistics_notif;
1086 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 1087
9fbab516
BC
1088 /*
1089 * The same handler is used for both the REPLY to a discrete
1090 * statistics request from the host as well as for the periodic
1091 * statistics notifications (after received beacons) from the uCode.
b481de9c 1092 */
8f91aecb
EG
1093 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1094 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 1095
21c339bf 1096 iwl_setup_spectrum_handlers(priv);
2a421b91
TW
1097 iwl_setup_rx_scan_handlers(priv);
1098
37a44211 1099 /* status change handler */
5b9f8cd3 1100 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 1101
c1354754
TW
1102 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1103 iwl_rx_missed_beacon_notif;
37a44211 1104 /* Rx handlers */
1781a07f
EG
1105 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1106 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1107 /* block ack */
1108 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1109 /* Set up hardware specific Rx handlers */
d4789efe 1110 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1111}
1112
b481de9c 1113/**
a55360e4 1114 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1115 *
1116 * Uses the priv->rx_handlers callback function array to invoke
1117 * the appropriate handlers, including command responses,
1118 * frame-received notifications, and other notifications.
1119 */
a55360e4 1120void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1121{
a55360e4 1122 struct iwl_rx_mem_buffer *rxb;
db11d634 1123 struct iwl_rx_packet *pkt;
a55360e4 1124 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1125 u32 r, i;
1126 int reclaim;
1127 unsigned long flags;
5c0eef96 1128 u8 fill_rx = 0;
d68ab680 1129 u32 count = 8;
b481de9c 1130
6440adb5
CB
1131 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1132 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 1133 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1134 i = rxq->read;
1135
1136 /* Rx interrupt, but nothing sent from uCode */
1137 if (i == r)
f3d67999 1138 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1139
a55360e4 1140 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1141 fill_rx = 1;
1142
b481de9c
ZY
1143 while (i != r) {
1144 rxb = rxq->queue[i];
1145
9fbab516 1146 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1147 * then a bug has been introduced in the queue refilling
1148 * routines -- catch it here */
1149 BUG_ON(rxb == NULL);
1150
1151 rxq->queue[i] = NULL;
1152
e91af0af
JB
1153 dma_sync_single_range_for_cpu(
1154 &priv->pci_dev->dev, rxb->real_dma_addr,
1155 rxb->aligned_dma_addr - rxb->real_dma_addr,
1156 priv->hw_params.rx_buf_size,
1157 PCI_DMA_FROMDEVICE);
db11d634 1158 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1159
1160 /* Reclaim a command buffer only if this packet is a response
1161 * to a (driver-originated) command.
1162 * If the packet (e.g. Rx frame) originated from uCode,
1163 * there is no command buffer to reclaim.
1164 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1165 * but apparently a few don't get set; catch them here. */
1166 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1167 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1168 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1169 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1170 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1171 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1172 (pkt->hdr.cmd != REPLY_TX);
1173
1174 /* Based on type of command response or notification,
1175 * handle those that need handling via function in
5b9f8cd3 1176 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1177 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1178 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1179 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1180 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1181 } else {
1182 /* No handling needed */
f3d67999 1183 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1184 "r %d i %d No handler needed for %s, 0x%02x\n",
1185 r, i, get_cmd_string(pkt->hdr.cmd),
1186 pkt->hdr.cmd);
1187 }
1188
1189 if (reclaim) {
9fbab516 1190 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1191 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1192 * as we reclaim the driver command queue */
1193 if (rxb && rxb->skb)
17b88929 1194 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1195 else
1196 IWL_WARNING("Claim null rxb?\n");
1197 }
1198
1199 /* For now we just don't re-use anything. We can tweak this
1200 * later to try and re-use notification packets and SKBs that
1201 * fail to Rx correctly */
1202 if (rxb->skb != NULL) {
1203 priv->alloc_rxb_skb--;
1204 dev_kfree_skb_any(rxb->skb);
1205 rxb->skb = NULL;
1206 }
1207
4018517a
JB
1208 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1209 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1210 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1211 spin_lock_irqsave(&rxq->lock, flags);
1212 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1213 spin_unlock_irqrestore(&rxq->lock, flags);
1214 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1215 /* If there are a lot of unused frames,
1216 * restock the Rx queue so ucode wont assert. */
1217 if (fill_rx) {
1218 count++;
1219 if (count >= 8) {
1220 priv->rxq.read = i;
f1bc4ac6 1221 iwl_rx_queue_restock(priv);
5c0eef96
MA
1222 count = 0;
1223 }
1224 }
b481de9c
ZY
1225 }
1226
1227 /* Backtrack one entry */
1228 priv->rxq.read = i;
a55360e4
TW
1229 iwl_rx_queue_restock(priv);
1230}
a55360e4 1231
0a6857e7 1232#ifdef CONFIG_IWLWIFI_DEBUG
5b9f8cd3 1233static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1234{
c1adf9fb 1235 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57 1236
b481de9c 1237 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1238 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1239 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1240 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1241 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1242 le32_to_cpu(rxon->filter_flags));
1243 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1244 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1245 rxon->ofdm_basic_rates);
1246 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
e174961c
JB
1247 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
1248 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
b481de9c
ZY
1249 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1250}
1251#endif
1252
0359facc
MA
1253/* call this function to flush any scheduled tasklet */
1254static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1255{
a96a27f9 1256 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1257 synchronize_irq(priv->pci_dev->irq);
1258 tasklet_kill(&priv->irq_tasklet);
1259}
1260
b481de9c 1261/**
5b9f8cd3 1262 * iwl_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1263 */
5b9f8cd3 1264static void iwl_irq_handle_error(struct iwl_priv *priv)
b481de9c 1265{
5b9f8cd3 1266 /* Set the FW error flag -- cleared on iwl_down */
b481de9c
ZY
1267 set_bit(STATUS_FW_ERROR, &priv->status);
1268
1269 /* Cancel currently queued command. */
1270 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1271
0a6857e7 1272#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1273 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1274 iwl_dump_nic_error_log(priv);
189a2b59 1275 iwl_dump_nic_event_log(priv);
5b9f8cd3 1276 iwl_print_rx_config_cmd(priv);
b481de9c
ZY
1277 }
1278#endif
1279
1280 wake_up_interruptible(&priv->wait_command_queue);
1281
1282 /* Keep the restart process from trying to send host
1283 * commands by clearing the INIT status bit */
1284 clear_bit(STATUS_READY, &priv->status);
1285
1286 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1287 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1288 "Restarting adapter due to uCode error.\n");
1289
3109ece1 1290 if (iwl_is_associated(priv)) {
b481de9c
ZY
1291 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1292 sizeof(priv->recovery_rxon));
1293 priv->error_recovering = 1;
1294 }
3a1081e8
EK
1295 if (priv->cfg->mod_params->restart_fw)
1296 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1297 }
1298}
1299
5b9f8cd3 1300static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1301{
1302 unsigned long flags;
1303
1304 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1305 sizeof(priv->staging_rxon));
1306 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1307 iwl_commit_rxon(priv);
b481de9c 1308
4f40e4d9 1309 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1310
1311 spin_lock_irqsave(&priv->lock, flags);
1312 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1313 priv->error_recovering = 0;
1314 spin_unlock_irqrestore(&priv->lock, flags);
1315}
1316
5b9f8cd3 1317static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1318{
1319 u32 inta, handled = 0;
1320 u32 inta_fh;
1321 unsigned long flags;
0a6857e7 1322#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1323 u32 inta_mask;
1324#endif
1325
1326 spin_lock_irqsave(&priv->lock, flags);
1327
1328 /* Ack/clear/reset pending uCode interrupts.
1329 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1330 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1331 inta = iwl_read32(priv, CSR_INT);
1332 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1333
1334 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1335 * Any new interrupts that happen after this, either while we're
1336 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1337 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1338 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1339
0a6857e7 1340#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1341 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1342 /* just for debug */
3395f6e9 1343 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1344 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1345 inta, inta_mask, inta_fh);
1346 }
1347#endif
1348
1349 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1350 * atomic, make sure that inta covers all the interrupts that
1351 * we've discovered, even if FH interrupt came in just after
1352 * reading CSR_INT. */
6f83eaa1 1353 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1354 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1355 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1356 inta |= CSR_INT_BIT_FH_TX;
1357
1358 /* Now service all interrupt bits discovered above. */
1359 if (inta & CSR_INT_BIT_HW_ERR) {
1360 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1361
1362 /* Tell the device to stop sending interrupts */
5b9f8cd3 1363 iwl_disable_interrupts(priv);
b481de9c 1364
5b9f8cd3 1365 iwl_irq_handle_error(priv);
b481de9c
ZY
1366
1367 handled |= CSR_INT_BIT_HW_ERR;
1368
1369 spin_unlock_irqrestore(&priv->lock, flags);
1370
1371 return;
1372 }
1373
0a6857e7 1374#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1375 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1376 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1377 if (inta & CSR_INT_BIT_SCD)
1378 IWL_DEBUG_ISR("Scheduler finished to transmit "
1379 "the frame/frames.\n");
b481de9c
ZY
1380
1381 /* Alive notification via Rx interrupt will do the real work */
1382 if (inta & CSR_INT_BIT_ALIVE)
1383 IWL_DEBUG_ISR("Alive interrupt\n");
1384 }
1385#endif
1386 /* Safely ignore these bits for debug checks below */
25c03d8e 1387 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1388
9fbab516 1389 /* HW RF KILL switch toggled */
b481de9c
ZY
1390 if (inta & CSR_INT_BIT_RF_KILL) {
1391 int hw_rf_kill = 0;
3395f6e9 1392 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1393 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1394 hw_rf_kill = 1;
1395
f3d67999 1396 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
c3056065 1397 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1398
a9efa652
EG
1399 /* driver only loads ucode once setting the interface up.
1400 * the driver as well won't allow loading if RFKILL is set
1401 * therefore no need to restart the driver from this handler
1402 */
edb34228 1403 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
53e49093 1404 clear_bit(STATUS_RF_KILL_HW, &priv->status);
edb34228
MA
1405 if (priv->is_open && !iwl_is_rfkill(priv))
1406 queue_work(priv->workqueue, &priv->up);
1407 }
b481de9c
ZY
1408
1409 handled |= CSR_INT_BIT_RF_KILL;
1410 }
1411
9fbab516 1412 /* Chip got too hot and stopped itself */
b481de9c
ZY
1413 if (inta & CSR_INT_BIT_CT_KILL) {
1414 IWL_ERROR("Microcode CT kill error detected.\n");
1415 handled |= CSR_INT_BIT_CT_KILL;
1416 }
1417
1418 /* Error detected by uCode */
1419 if (inta & CSR_INT_BIT_SW_ERR) {
1420 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1421 inta);
5b9f8cd3 1422 iwl_irq_handle_error(priv);
b481de9c
ZY
1423 handled |= CSR_INT_BIT_SW_ERR;
1424 }
1425
1426 /* uCode wakes up after power-down sleep */
1427 if (inta & CSR_INT_BIT_WAKEUP) {
1428 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1429 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1430 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1431 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1432 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1433 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1434 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1435 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1436
1437 handled |= CSR_INT_BIT_WAKEUP;
1438 }
1439
1440 /* All uCode command responses, including Tx command responses,
1441 * Rx "responses" (frame-received notification), and other
1442 * notifications from uCode come through here*/
1443 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1444 iwl_rx_handle(priv);
b481de9c
ZY
1445 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1446 }
1447
1448 if (inta & CSR_INT_BIT_FH_TX) {
1449 IWL_DEBUG_ISR("Tx interrupt\n");
1450 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1451 /* FH finished to write, send event */
1452 priv->ucode_write_complete = 1;
1453 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1454 }
1455
1456 if (inta & ~handled)
1457 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1458
1459 if (inta & ~CSR_INI_SET_MASK) {
1460 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1461 inta & ~CSR_INI_SET_MASK);
1462 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1463 }
1464
1465 /* Re-enable all interrupts */
0359facc
MA
1466 /* only Re-enable if diabled by irq */
1467 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1468 iwl_enable_interrupts(priv);
b481de9c 1469
0a6857e7 1470#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1471 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1472 inta = iwl_read32(priv, CSR_INT);
1473 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1474 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1475 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1476 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1477 }
1478#endif
1479 spin_unlock_irqrestore(&priv->lock, flags);
1480}
1481
5b9f8cd3 1482static irqreturn_t iwl_isr(int irq, void *data)
b481de9c 1483{
c79dd5b5 1484 struct iwl_priv *priv = data;
b481de9c
ZY
1485 u32 inta, inta_mask;
1486 u32 inta_fh;
1487 if (!priv)
1488 return IRQ_NONE;
1489
1490 spin_lock(&priv->lock);
1491
1492 /* Disable (but don't clear!) interrupts here to avoid
1493 * back-to-back ISRs and sporadic interrupts from our NIC.
1494 * If we have something to service, the tasklet will re-enable ints.
1495 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1496 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1497 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1498
1499 /* Discover which interrupts are active/pending */
3395f6e9
TW
1500 inta = iwl_read32(priv, CSR_INT);
1501 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1502
1503 /* Ignore interrupt if there's nothing in NIC to service.
1504 * This may be due to IRQ shared with another device,
1505 * or due to sporadic interrupts thrown from our NIC. */
1506 if (!inta && !inta_fh) {
1507 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1508 goto none;
1509 }
1510
1511 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1512 /* Hardware disappeared. It might have already raised
1513 * an interrupt */
99df630c 1514 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
66fbb541 1515 goto unplugged;
b481de9c
ZY
1516 }
1517
1518 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1519 inta, inta_mask, inta_fh);
1520
25c03d8e
JP
1521 inta &= ~CSR_INT_BIT_SCD;
1522
5b9f8cd3 1523 /* iwl_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1524 if (likely(inta || inta_fh))
1525 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1526
66fbb541
ON
1527 unplugged:
1528 spin_unlock(&priv->lock);
b481de9c
ZY
1529 return IRQ_HANDLED;
1530
1531 none:
1532 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1533 /* only Re-enable if diabled by irq */
1534 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1535 iwl_enable_interrupts(priv);
b481de9c
ZY
1536 spin_unlock(&priv->lock);
1537 return IRQ_NONE;
1538}
1539
b481de9c
ZY
1540/******************************************************************************
1541 *
1542 * uCode download functions
1543 *
1544 ******************************************************************************/
1545
5b9f8cd3 1546static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1547{
98c92211
TW
1548 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1549 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1550 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1551 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1552 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1553 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1554}
1555
5b9f8cd3 1556static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR
1557{
1558 /* Remove all resets to allow NIC to operate */
1559 iwl_write32(priv, CSR_RESET, 0);
1560}
1561
1562
b481de9c 1563/**
5b9f8cd3 1564 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1565 *
1566 * Copy into buffers for card to fetch via bus-mastering
1567 */
5b9f8cd3 1568static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1569{
14b3d338 1570 struct iwl_ucode *ucode;
a0987a8d 1571 int ret = -EINVAL, index;
b481de9c 1572 const struct firmware *ucode_raw;
a0987a8d
RC
1573 const char *name_pre = priv->cfg->fw_name_pre;
1574 const unsigned int api_max = priv->cfg->ucode_api_max;
1575 const unsigned int api_min = priv->cfg->ucode_api_min;
1576 char buf[25];
b481de9c
ZY
1577 u8 *src;
1578 size_t len;
a0987a8d 1579 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
1580
1581 /* Ask kernel firmware_class module to get the boot firmware off disk.
1582 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
1583 for (index = api_max; index >= api_min; index--) {
1584 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1585 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1586 if (ret < 0) {
1587 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1588 buf, ret);
1589 if (ret == -ENOENT)
1590 continue;
1591 else
1592 goto error;
1593 } else {
1594 if (index < api_max)
1595 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
1596 buf, api_max);
1597 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1598 buf, ucode_raw->size);
1599 break;
1600 }
b481de9c
ZY
1601 }
1602
a0987a8d
RC
1603 if (ret < 0)
1604 goto error;
b481de9c
ZY
1605
1606 /* Make sure that we got at least our header! */
1607 if (ucode_raw->size < sizeof(*ucode)) {
1608 IWL_ERROR("File size way too small!\n");
90e759d1 1609 ret = -EINVAL;
b481de9c
ZY
1610 goto err_release;
1611 }
1612
1613 /* Data from ucode file: header followed by uCode images */
1614 ucode = (void *)ucode_raw->data;
1615
c02b3acd 1616 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1617 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
1618 inst_size = le32_to_cpu(ucode->inst_size);
1619 data_size = le32_to_cpu(ucode->data_size);
1620 init_size = le32_to_cpu(ucode->init_size);
1621 init_data_size = le32_to_cpu(ucode->init_data_size);
1622 boot_size = le32_to_cpu(ucode->boot_size);
1623
a0987a8d
RC
1624 /* api_ver should match the api version forming part of the
1625 * firmware filename ... but we don't check for that and only rely
1626 * on the API version read from firware header from here on forward */
1627
1628 if (api_ver < api_min || api_ver > api_max) {
1629 IWL_ERROR("Driver unable to support your firmware API. "
1630 "Driver supports v%u, firmware is v%u.\n",
1631 api_max, api_ver);
1632 priv->ucode_ver = 0;
1633 ret = -EINVAL;
1634 goto err_release;
1635 }
1636 if (api_ver != api_max)
1637 IWL_ERROR("Firmware has old API version. Expected v%u, "
1638 "got v%u. New firmware can be obtained "
1639 "from http://www.intellinuxwireless.org.\n",
1640 api_max, api_ver);
1641
1642 printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
c02b3acd
CR
1643 IWL_UCODE_MAJOR(priv->ucode_ver),
1644 IWL_UCODE_MINOR(priv->ucode_ver),
1645 IWL_UCODE_API(priv->ucode_ver),
1646 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d
RC
1647
1648 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
1649 priv->ucode_ver);
b481de9c
ZY
1650 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1651 inst_size);
1652 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1653 data_size);
1654 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1655 init_size);
1656 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1657 init_data_size);
1658 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1659 boot_size);
1660
1661 /* Verify size of file vs. image size info in file's header */
1662 if (ucode_raw->size < sizeof(*ucode) +
1663 inst_size + data_size + init_size +
1664 init_data_size + boot_size) {
1665
1666 IWL_DEBUG_INFO("uCode file size %d too small\n",
1667 (int)ucode_raw->size);
90e759d1 1668 ret = -EINVAL;
b481de9c
ZY
1669 goto err_release;
1670 }
1671
1672 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1673 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1674 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1675 inst_size);
1676 ret = -EINVAL;
b481de9c
ZY
1677 goto err_release;
1678 }
1679
099b40b7 1680 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1681 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1682 data_size);
1683 ret = -EINVAL;
b481de9c
ZY
1684 goto err_release;
1685 }
099b40b7 1686 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1687 IWL_DEBUG_INFO
90e759d1
TW
1688 ("uCode init instr len %d too large to fit in\n",
1689 init_size);
1690 ret = -EINVAL;
b481de9c
ZY
1691 goto err_release;
1692 }
099b40b7 1693 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1694 IWL_DEBUG_INFO
90e759d1
TW
1695 ("uCode init data len %d too large to fit in\n",
1696 init_data_size);
1697 ret = -EINVAL;
b481de9c
ZY
1698 goto err_release;
1699 }
099b40b7 1700 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1701 IWL_DEBUG_INFO
90e759d1
TW
1702 ("uCode boot instr len %d too large to fit in\n",
1703 boot_size);
1704 ret = -EINVAL;
b481de9c
ZY
1705 goto err_release;
1706 }
1707
1708 /* Allocate ucode buffers for card's bus-master loading ... */
1709
1710 /* Runtime instructions and 2 copies of data:
1711 * 1) unmodified from disk
1712 * 2) backup cache for save/restore during power-downs */
1713 priv->ucode_code.len = inst_size;
98c92211 1714 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1715
1716 priv->ucode_data.len = data_size;
98c92211 1717 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1718
1719 priv->ucode_data_backup.len = data_size;
98c92211 1720 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1721
1722 /* Initialization instructions and data */
90e759d1
TW
1723 if (init_size && init_data_size) {
1724 priv->ucode_init.len = init_size;
98c92211 1725 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1726
1727 priv->ucode_init_data.len = init_data_size;
98c92211 1728 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1729
1730 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1731 goto err_pci_alloc;
1732 }
b481de9c
ZY
1733
1734 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1735 if (boot_size) {
1736 priv->ucode_boot.len = boot_size;
98c92211 1737 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1738
90e759d1
TW
1739 if (!priv->ucode_boot.v_addr)
1740 goto err_pci_alloc;
1741 }
b481de9c
ZY
1742
1743 /* Copy images into buffers for card's bus-master reads ... */
1744
1745 /* Runtime instructions (first block of data in file) */
1746 src = &ucode->data[0];
1747 len = priv->ucode_code.len;
90e759d1 1748 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1749 memcpy(priv->ucode_code.v_addr, src, len);
1750 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1751 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1752
1753 /* Runtime data (2nd block)
5b9f8cd3 1754 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY
1755 src = &ucode->data[inst_size];
1756 len = priv->ucode_data.len;
90e759d1 1757 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1758 memcpy(priv->ucode_data.v_addr, src, len);
1759 memcpy(priv->ucode_data_backup.v_addr, src, len);
1760
1761 /* Initialization instructions (3rd block) */
1762 if (init_size) {
1763 src = &ucode->data[inst_size + data_size];
1764 len = priv->ucode_init.len;
90e759d1
TW
1765 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1766 len);
b481de9c
ZY
1767 memcpy(priv->ucode_init.v_addr, src, len);
1768 }
1769
1770 /* Initialization data (4th block) */
1771 if (init_data_size) {
1772 src = &ucode->data[inst_size + data_size + init_size];
1773 len = priv->ucode_init_data.len;
90e759d1
TW
1774 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1775 len);
b481de9c
ZY
1776 memcpy(priv->ucode_init_data.v_addr, src, len);
1777 }
1778
1779 /* Bootstrap instructions (5th block) */
1780 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1781 len = priv->ucode_boot.len;
90e759d1 1782 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1783 memcpy(priv->ucode_boot.v_addr, src, len);
1784
1785 /* We have our copies now, allow OS release its copies */
1786 release_firmware(ucode_raw);
1787 return 0;
1788
1789 err_pci_alloc:
1790 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1791 ret = -ENOMEM;
5b9f8cd3 1792 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY
1793
1794 err_release:
1795 release_firmware(ucode_raw);
1796
1797 error:
90e759d1 1798 return ret;
b481de9c
ZY
1799}
1800
ada17513
MA
1801/* temporary */
1802static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1803 struct sk_buff *skb);
1804
b481de9c 1805/**
4a4a9e81 1806 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1807 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1808 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1809 */
4a4a9e81 1810static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1811{
57aab75a 1812 int ret = 0;
b481de9c
ZY
1813
1814 IWL_DEBUG_INFO("Runtime Alive received.\n");
1815
1816 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1817 /* We had an error bringing up the hardware, so take it
1818 * all the way back down so we can try again */
1819 IWL_DEBUG_INFO("Alive failed.\n");
1820 goto restart;
1821 }
1822
1823 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1824 * This is a paranoid check, because we would not have gotten the
1825 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1826 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
1827 /* Runtime instruction load was bad;
1828 * take it all the way back down so we can try again */
1829 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1830 goto restart;
1831 }
1832
37deb2a0 1833 iwl_clear_stations_table(priv);
57aab75a
TW
1834 ret = priv->cfg->ops->lib->alive_notify(priv);
1835 if (ret) {
b481de9c 1836 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 1837 ret);
b481de9c
ZY
1838 goto restart;
1839 }
1840
5b9f8cd3 1841 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY
1842 set_bit(STATUS_ALIVE, &priv->status);
1843
fee1247a 1844 if (iwl_is_rfkill(priv))
b481de9c
ZY
1845 return;
1846
36d6825b 1847 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
1848
1849 priv->active_rate = priv->rates_mask;
1850 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1851
3109ece1 1852 if (iwl_is_associated(priv)) {
c1adf9fb
GG
1853 struct iwl_rxon_cmd *active_rxon =
1854 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
1855
1856 memcpy(&priv->staging_rxon, &priv->active_rxon,
1857 sizeof(priv->staging_rxon));
1858 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1859 } else {
1860 /* Initialize our rx_config data */
5b9f8cd3 1861 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
1862 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1863 }
1864
9fbab516 1865 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1866 iwl_send_bt_config(priv);
b481de9c 1867
4a4a9e81
TW
1868 iwl_reset_run_time_calib(priv);
1869
b481de9c 1870 /* Configure the adapter for unassociated operation */
5b9f8cd3 1871 iwl_commit_rxon(priv);
b481de9c
ZY
1872
1873 /* At this point, the NIC is initialized and operational */
47f4a587 1874 iwl_rf_kill_ct_config(priv);
5a66926a 1875
fe00b5a5
RC
1876 iwl_leds_register(priv);
1877
b481de9c 1878 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 1879 set_bit(STATUS_READY, &priv->status);
5a66926a 1880 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1881
1882 if (priv->error_recovering)
5b9f8cd3 1883 iwl_error_recovery(priv);
b481de9c 1884
58d0f361 1885 iwl_power_update_mode(priv, 1);
c46fbefa 1886
ada17513
MA
1887 /* reassociate for ADHOC mode */
1888 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1889 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1890 priv->vif);
1891 if (beacon)
1892 iwl_mac_beacon_update(priv->hw, beacon);
1893 }
1894
1895
c46fbefa 1896 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1897 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1898
b481de9c
ZY
1899 return;
1900
1901 restart:
1902 queue_work(priv->workqueue, &priv->restart);
1903}
1904
4e39317d 1905static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1906
5b9f8cd3 1907static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY
1908{
1909 unsigned long flags;
1910 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
1911
1912 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
1913
b481de9c
ZY
1914 if (!exit_pending)
1915 set_bit(STATUS_EXIT_PENDING, &priv->status);
1916
ab53d8af
MA
1917 iwl_leds_unregister(priv);
1918
37deb2a0 1919 iwl_clear_stations_table(priv);
b481de9c
ZY
1920
1921 /* Unblock any waiting calls */
1922 wake_up_interruptible_all(&priv->wait_command_queue);
1923
b481de9c
ZY
1924 /* Wipe out the EXIT_PENDING status bit if we are not actually
1925 * exiting the module */
1926 if (!exit_pending)
1927 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1928
1929 /* stop and reset the on-board processor */
3395f6e9 1930 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
1931
1932 /* tell the device to stop sending interrupts */
0359facc 1933 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1934 iwl_disable_interrupts(priv);
0359facc
MA
1935 spin_unlock_irqrestore(&priv->lock, flags);
1936 iwl_synchronize_irq(priv);
b481de9c
ZY
1937
1938 if (priv->mac80211_registered)
1939 ieee80211_stop_queues(priv->hw);
1940
5b9f8cd3 1941 /* If we have not previously called iwl_init() then
b481de9c 1942 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1943 if (!iwl_is_init(priv)) {
b481de9c
ZY
1944 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1945 STATUS_RF_KILL_HW |
1946 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1947 STATUS_RF_KILL_SW |
9788864e
RC
1948 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1949 STATUS_GEO_CONFIGURED |
b481de9c 1950 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
1951 STATUS_IN_SUSPEND |
1952 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1953 STATUS_EXIT_PENDING;
b481de9c
ZY
1954 goto exit;
1955 }
1956
1957 /* ...otherwise clear out all the status bits but the RF Kill and
1958 * SUSPEND bits and continue taking the NIC down. */
1959 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1960 STATUS_RF_KILL_HW |
1961 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1962 STATUS_RF_KILL_SW |
9788864e
RC
1963 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1964 STATUS_GEO_CONFIGURED |
b481de9c
ZY
1965 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1966 STATUS_IN_SUSPEND |
1967 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
1968 STATUS_FW_ERROR |
1969 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1970 STATUS_EXIT_PENDING;
b481de9c
ZY
1971
1972 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1973 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1974 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
1975 spin_unlock_irqrestore(&priv->lock, flags);
1976
da1bc453 1977 iwl_txq_ctx_stop(priv);
b3bbacb7 1978 iwl_rxq_stop(priv);
b481de9c
ZY
1979
1980 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
1981 if (!iwl_grab_nic_access(priv)) {
1982 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1983 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1984 iwl_release_nic_access(priv);
b481de9c
ZY
1985 }
1986 spin_unlock_irqrestore(&priv->lock, flags);
1987
1988 udelay(5);
1989
7f066108 1990 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG
1991 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
1992 priv->cfg->ops->lib->apm_ops.stop(priv);
1993 else
1994 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 1995 exit:
885ba202 1996 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
1997
1998 if (priv->ibss_beacon)
1999 dev_kfree_skb(priv->ibss_beacon);
2000 priv->ibss_beacon = NULL;
2001
2002 /* clear out any free frames */
fcab423d 2003 iwl_clear_free_frames(priv);
b481de9c
ZY
2004}
2005
5b9f8cd3 2006static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY
2007{
2008 mutex_lock(&priv->mutex);
5b9f8cd3 2009 __iwl_down(priv);
b481de9c 2010 mutex_unlock(&priv->mutex);
b24d22b1 2011
4e39317d 2012 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2013}
2014
2015#define MAX_HW_RESTARTS 5
2016
5b9f8cd3 2017static int __iwl_up(struct iwl_priv *priv)
b481de9c 2018{
57aab75a
TW
2019 int i;
2020 int ret;
b481de9c
ZY
2021
2022 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2023 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2024 return -EIO;
2025 }
2026
e903fbd4
RC
2027 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2028 IWL_ERROR("ucode not available for device bringup\n");
2029 return -EIO;
2030 }
2031
e655b9f0 2032 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2033 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2034 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2035 else
e655b9f0 2036 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2037
c1842d61 2038 if (iwl_is_rfkill(priv)) {
5b9f8cd3 2039 iwl_enable_interrupts(priv);
3bff19c2
EG
2040 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2041 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2042 return 0;
b481de9c
ZY
2043 }
2044
3395f6e9 2045 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2046
1053d35f 2047 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2048 if (ret) {
2049 IWL_ERROR("Unable to init nic\n");
2050 return ret;
b481de9c
ZY
2051 }
2052
2053 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2054 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2055 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2056 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2057
2058 /* clear (again), then enable host interrupts */
3395f6e9 2059 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 2060 iwl_enable_interrupts(priv);
b481de9c
ZY
2061
2062 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2063 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2064 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2065
2066 /* Copy original ucode data image from disk into backup cache.
2067 * This will be used to initialize the on-board processor's
2068 * data SRAM for a clean start when the runtime program first loads. */
2069 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2070 priv->ucode_data.len);
b481de9c 2071
b481de9c
ZY
2072 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2073
37deb2a0 2074 iwl_clear_stations_table(priv);
b481de9c
ZY
2075
2076 /* load bootstrap state machine,
2077 * load bootstrap program into processor's memory,
2078 * prepare to load the "initialize" uCode */
57aab75a 2079 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2080
57aab75a
TW
2081 if (ret) {
2082 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2083 continue;
2084 }
2085
f3d5b45b
EG
2086 /* Clear out the uCode error bit if it is set */
2087 clear_bit(STATUS_FW_ERROR, &priv->status);
2088
b481de9c 2089 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 2090 iwl_nic_start(priv);
b481de9c 2091
b481de9c
ZY
2092 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2093
2094 return 0;
2095 }
2096
2097 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 2098 __iwl_down(priv);
64e72c3e 2099 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2100
2101 /* tried to restart and config the device for as long as our
2102 * patience could withstand */
2103 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2104 return -EIO;
2105}
2106
2107
2108/*****************************************************************************
2109 *
2110 * Workqueue callbacks
2111 *
2112 *****************************************************************************/
2113
4a4a9e81 2114static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2115{
c79dd5b5
TW
2116 struct iwl_priv *priv =
2117 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2118
2119 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2120 return;
2121
2122 mutex_lock(&priv->mutex);
f3ccc08c 2123 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2124 mutex_unlock(&priv->mutex);
2125}
2126
4a4a9e81 2127static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2128{
c79dd5b5
TW
2129 struct iwl_priv *priv =
2130 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2131
2132 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2133 return;
2134
2135 mutex_lock(&priv->mutex);
4a4a9e81 2136 iwl_alive_start(priv);
b481de9c
ZY
2137 mutex_unlock(&priv->mutex);
2138}
2139
5b9f8cd3 2140static void iwl_bg_rf_kill(struct work_struct *work)
b481de9c 2141{
c79dd5b5 2142 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2143
2144 wake_up_interruptible(&priv->wait_command_queue);
2145
2146 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2147 return;
2148
2149 mutex_lock(&priv->mutex);
2150
fee1247a 2151 if (!iwl_is_rfkill(priv)) {
f3d67999 2152 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2153 "HW and/or SW RF Kill no longer active, restarting "
2154 "device\n");
2155 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2156 queue_work(priv->workqueue, &priv->restart);
2157 } else {
ad97edd2
MA
2158 /* make sure mac80211 stop sending Tx frame */
2159 if (priv->mac80211_registered)
2160 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2161
2162 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2163 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2164 "disabled by SW switch\n");
2165 else
2166 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2167 "Kill switch must be turned off for "
2168 "wireless networking to work.\n");
2169 }
2170 mutex_unlock(&priv->mutex);
80fcc9e2 2171 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2172}
2173
16e727e8
EG
2174static void iwl_bg_run_time_calib_work(struct work_struct *work)
2175{
2176 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2177 run_time_calib_work);
2178
2179 mutex_lock(&priv->mutex);
2180
2181 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2182 test_bit(STATUS_SCANNING, &priv->status)) {
2183 mutex_unlock(&priv->mutex);
2184 return;
2185 }
2186
2187 if (priv->start_calib) {
2188 iwl_chain_noise_calibration(priv, &priv->statistics);
2189
2190 iwl_sensitivity_calibration(priv, &priv->statistics);
2191 }
2192
2193 mutex_unlock(&priv->mutex);
2194 return;
2195}
2196
5b9f8cd3 2197static void iwl_bg_up(struct work_struct *data)
b481de9c 2198{
c79dd5b5 2199 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2200
2201 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2202 return;
2203
2204 mutex_lock(&priv->mutex);
5b9f8cd3 2205 __iwl_up(priv);
b481de9c 2206 mutex_unlock(&priv->mutex);
80fcc9e2 2207 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2208}
2209
5b9f8cd3 2210static void iwl_bg_restart(struct work_struct *data)
b481de9c 2211{
c79dd5b5 2212 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2213
2214 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2215 return;
2216
5b9f8cd3 2217 iwl_down(priv);
b481de9c
ZY
2218 queue_work(priv->workqueue, &priv->up);
2219}
2220
5b9f8cd3 2221static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 2222{
c79dd5b5
TW
2223 struct iwl_priv *priv =
2224 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2225
2226 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2227 return;
2228
2229 mutex_lock(&priv->mutex);
a55360e4 2230 iwl_rx_replenish(priv);
b481de9c
ZY
2231 mutex_unlock(&priv->mutex);
2232}
2233
7878a5a4
MA
2234#define IWL_DELAY_NEXT_SCAN (HZ*2)
2235
5b9f8cd3 2236static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 2237{
b481de9c 2238 struct ieee80211_conf *conf = NULL;
857485c0 2239 int ret = 0;
1ff50bda 2240 unsigned long flags;
b481de9c 2241
05c914fe 2242 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3ac7f146 2243 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2244 return;
2245 }
2246
e174961c
JB
2247 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
2248 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
2249
2250
2251 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2252 return;
2253
b481de9c 2254
508e32e1 2255 if (!priv->vif || !priv->is_open)
948c171c 2256 return;
508e32e1 2257
c90a74ba 2258 iwl_power_cancel_timeout(priv);
2a421b91 2259 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2260
b481de9c
ZY
2261 conf = ieee80211_get_hw_conf(priv->hw);
2262
2263 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2264 iwl_commit_rxon(priv);
b481de9c 2265
3195c1f3 2266 iwl_setup_rxon_timing(priv);
857485c0 2267 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2268 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2269 if (ret)
b481de9c
ZY
2270 IWL_WARNING("REPLY_RXON_TIMING failed - "
2271 "Attempting to continue.\n");
2272
2273 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2274
42eb7c64 2275 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2276
c7de35cd 2277 iwl_set_rxon_chain(priv);
b481de9c
ZY
2278 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2279
2280 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2281 priv->assoc_id, priv->beacon_int);
2282
2283 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2284 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2285 else
2286 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2287
2288 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2289 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2290 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2291 else
2292 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2293
05c914fe 2294 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2295 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2296
2297 }
2298
5b9f8cd3 2299 iwl_commit_rxon(priv);
b481de9c
ZY
2300
2301 switch (priv->iw_mode) {
05c914fe 2302 case NL80211_IFTYPE_STATION:
b481de9c
ZY
2303 break;
2304
05c914fe 2305 case NL80211_IFTYPE_ADHOC:
b481de9c 2306
c46fbefa
AK
2307 /* assume default assoc id */
2308 priv->assoc_id = 1;
b481de9c 2309
4f40e4d9 2310 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2311 iwl_send_beacon_cmd(priv);
b481de9c
ZY
2312
2313 break;
2314
2315 default:
2316 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2317 __func__, priv->iw_mode);
b481de9c
ZY
2318 break;
2319 }
2320
05c914fe 2321 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2322 priv->assoc_station_added = 1;
2323
1ff50bda
EG
2324 spin_lock_irqsave(&priv->lock, flags);
2325 iwl_activate_qos(priv, 0);
2326 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2327
04816448
GE
2328 /* the chain noise calibration will enabled PM upon completion
2329 * If chain noise has already been run, then we need to enable
2330 * power management here */
2331 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2332 iwl_power_enable_management(priv);
c90a74ba
EG
2333
2334 /* Enable Rx differential gain and sensitivity calibrations */
2335 iwl_chain_noise_reset(priv);
2336 priv->start_calib = 1;
2337
508e32e1
RC
2338}
2339
b481de9c
ZY
2340/*****************************************************************************
2341 *
2342 * mac80211 entry point functions
2343 *
2344 *****************************************************************************/
2345
154b25ce 2346#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2347
5b9f8cd3 2348static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2349{
c79dd5b5 2350 struct iwl_priv *priv = hw->priv;
5a66926a 2351 int ret;
cf88c433 2352 u16 pci_cmd;
b481de9c
ZY
2353
2354 IWL_DEBUG_MAC80211("enter\n");
2355
5a66926a
ZY
2356 if (pci_enable_device(priv->pci_dev)) {
2357 IWL_ERROR("Fail to pci_enable_device\n");
2358 return -ENODEV;
2359 }
2360 pci_restore_state(priv->pci_dev);
2361 pci_enable_msi(priv->pci_dev);
2362
cf88c433
TW
2363 /* enable interrupts if needed: hw bug w/a */
2364 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2365 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2366 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2367 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2368 }
2369
5b9f8cd3 2370 ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
5a66926a
ZY
2371 DRV_NAME, priv);
2372 if (ret) {
2373 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2374 goto out_disable_msi;
2375 }
2376
b481de9c
ZY
2377 /* we should be verifying the device is ready to be opened */
2378 mutex_lock(&priv->mutex);
2379
c1adf9fb 2380 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2381 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2382 * ucode filename and max sizes are card-specific. */
b481de9c 2383
5a66926a 2384 if (!priv->ucode_code.len) {
5b9f8cd3 2385 ret = iwl_read_ucode(priv);
5a66926a
ZY
2386 if (ret) {
2387 IWL_ERROR("Could not read microcode: %d\n", ret);
2388 mutex_unlock(&priv->mutex);
2389 goto out_release_irq;
2390 }
2391 }
b481de9c 2392
5b9f8cd3 2393 ret = __iwl_up(priv);
5a66926a 2394
b481de9c 2395 mutex_unlock(&priv->mutex);
5a66926a 2396
80fcc9e2
AG
2397 iwl_rfkill_set_hw_state(priv);
2398
e655b9f0
ZY
2399 if (ret)
2400 goto out_release_irq;
2401
c1842d61
TW
2402 if (iwl_is_rfkill(priv))
2403 goto out;
2404
e655b9f0
ZY
2405 IWL_DEBUG_INFO("Start UP work done.\n");
2406
2407 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2408 return 0;
2409
fe9b6b72 2410 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2411 * mac80211 will not be run successfully. */
154b25ce
EG
2412 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2413 test_bit(STATUS_READY, &priv->status),
2414 UCODE_READY_TIMEOUT);
2415 if (!ret) {
2416 if (!test_bit(STATUS_READY, &priv->status)) {
2417 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2418 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2419 ret = -ETIMEDOUT;
2420 goto out_release_irq;
5a66926a 2421 }
fe9b6b72 2422 }
0a078ffa 2423
c1842d61 2424out:
0a078ffa 2425 priv->is_open = 1;
b481de9c
ZY
2426 IWL_DEBUG_MAC80211("leave\n");
2427 return 0;
5a66926a
ZY
2428
2429out_release_irq:
2430 free_irq(priv->pci_dev->irq, priv);
2431out_disable_msi:
2432 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2433 pci_disable_device(priv->pci_dev);
2434 priv->is_open = 0;
2435 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2436 return ret;
b481de9c
ZY
2437}
2438
5b9f8cd3 2439static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2440{
c79dd5b5 2441 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2442
2443 IWL_DEBUG_MAC80211("enter\n");
948c171c 2444
e655b9f0
ZY
2445 if (!priv->is_open) {
2446 IWL_DEBUG_MAC80211("leave - skip\n");
2447 return;
2448 }
2449
b481de9c 2450 priv->is_open = 0;
5a66926a 2451
fee1247a 2452 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2453 /* stop mac, cancel any scan request and clear
2454 * RXON_FILTER_ASSOC_MSK BIT
2455 */
5a66926a 2456 mutex_lock(&priv->mutex);
2a421b91 2457 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2458 mutex_unlock(&priv->mutex);
fde3571f
MA
2459 }
2460
5b9f8cd3 2461 iwl_down(priv);
5a66926a
ZY
2462
2463 flush_workqueue(priv->workqueue);
2464 free_irq(priv->pci_dev->irq, priv);
2465 pci_disable_msi(priv->pci_dev);
2466 pci_save_state(priv->pci_dev);
2467 pci_disable_device(priv->pci_dev);
948c171c 2468
b481de9c 2469 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2470}
2471
5b9f8cd3 2472static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2473{
c79dd5b5 2474 struct iwl_priv *priv = hw->priv;
b481de9c 2475
f3674227 2476 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2477
b481de9c 2478 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2479 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2480
e039fa4a 2481 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2482 dev_kfree_skb_any(skb);
2483
f3674227 2484 IWL_DEBUG_MACDUMP("leave\n");
637f8837 2485 return NETDEV_TX_OK;
b481de9c
ZY
2486}
2487
5b9f8cd3 2488static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2489 struct ieee80211_if_init_conf *conf)
2490{
c79dd5b5 2491 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2492 unsigned long flags;
2493
32bfd35d 2494 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2495
32bfd35d
JB
2496 if (priv->vif) {
2497 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2498 return -EOPNOTSUPP;
b481de9c
ZY
2499 }
2500
2501 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2502 priv->vif = conf->vif;
60294de3 2503 priv->iw_mode = conf->type;
b481de9c
ZY
2504
2505 spin_unlock_irqrestore(&priv->lock, flags);
2506
2507 mutex_lock(&priv->mutex);
864792e3
TW
2508
2509 if (conf->mac_addr) {
e174961c 2510 IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
864792e3
TW
2511 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2512 }
b481de9c 2513
5b9f8cd3 2514 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK
2515 /* we are not ready, will run again when ready */
2516 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2517
b481de9c
ZY
2518 mutex_unlock(&priv->mutex);
2519
5a66926a 2520 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2521 return 0;
2522}
2523
2524/**
5b9f8cd3 2525 * iwl_mac_config - mac80211 config callback
b481de9c
ZY
2526 *
2527 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2528 * be set inappropriately and the driver currently sets the hardware up to
2529 * use it whenever needed.
2530 */
5b9f8cd3 2531static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2532{
c79dd5b5 2533 struct iwl_priv *priv = hw->priv;
bf85ea4f 2534 const struct iwl_channel_info *ch_info;
e8975581 2535 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2536 unsigned long flags;
76bb77e0 2537 int ret = 0;
82a66bbb 2538 u16 channel;
b481de9c
ZY
2539
2540 mutex_lock(&priv->mutex);
8318d78a 2541 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2542
ae5eb026
JB
2543 priv->current_ht_config.is_ht = conf->ht.enabled;
2544
14a08a7f 2545 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2546 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2547 goto out;
64e72c3e
MA
2548 }
2549
14a08a7f
EG
2550 if (!conf->radio_enabled)
2551 iwl_radio_kill_sw_disable_radio(priv);
2552
fee1247a 2553 if (!iwl_is_ready(priv)) {
b481de9c 2554 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2555 ret = -EIO;
2556 goto out;
b481de9c
ZY
2557 }
2558
1ea87396 2559 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2560 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2561 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2562 mutex_unlock(&priv->mutex);
a0646470 2563 return 0;
b481de9c
ZY
2564 }
2565
82a66bbb
TW
2566 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2567 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2568 if (!is_channel_valid(ch_info)) {
b481de9c 2569 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2570 ret = -EINVAL;
2571 goto out;
b481de9c
ZY
2572 }
2573
05c914fe 2574 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76
AK
2575 !is_channel_ibss(ch_info)) {
2576 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2577 conf->channel->hw_value, conf->channel->band);
2578 ret = -EINVAL;
2579 goto out;
2580 }
2581
82a66bbb
TW
2582 spin_lock_irqsave(&priv->lock, flags);
2583
b5d7be5e 2584
78330fdd 2585 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2586 * from any ht related info since 2.4 does not
2587 * support ht */
82a66bbb 2588 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2589#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2590 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2591#endif
2592 )
2593 priv->staging_rxon.flags = 0;
b481de9c 2594
17e72782 2595 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2596
82a66bbb 2597 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2598
2599 /* The list of supported rates and rate mask can be different
8318d78a 2600 * for each band; since the band may have changed, reset
b481de9c 2601 * the rate mask to what mac80211 lists */
5b9f8cd3 2602 iwl_set_rate(priv);
b481de9c
ZY
2603
2604 spin_unlock_irqrestore(&priv->lock, flags);
2605
2606#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2607 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2608 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2609 goto out;
b481de9c
ZY
2610 }
2611#endif
2612
b481de9c
ZY
2613 if (!conf->radio_enabled) {
2614 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2615 goto out;
b481de9c
ZY
2616 }
2617
fee1247a 2618 if (iwl_is_rfkill(priv)) {
b481de9c 2619 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2620 ret = -EIO;
2621 goto out;
b481de9c
ZY
2622 }
2623
e602cb18
EK
2624 if (conf->flags & IEEE80211_CONF_PS)
2625 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2626 else
2627 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2628 if (ret)
2629 IWL_DEBUG_MAC80211("Error setting power level\n");
2630
630fe9b6
TW
2631 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2632 priv->tx_power_user_lmt, conf->power_level);
2633
2634 iwl_set_tx_power(priv, conf->power_level, false);
2635
5b9f8cd3 2636 iwl_set_rate(priv);
b481de9c
ZY
2637
2638 if (memcmp(&priv->active_rxon,
2639 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2640 iwl_commit_rxon(priv);
b481de9c
ZY
2641 else
2642 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2643
2644 IWL_DEBUG_MAC80211("leave\n");
2645
a0646470 2646out:
5a66926a 2647 mutex_unlock(&priv->mutex);
76bb77e0 2648 return ret;
b481de9c
ZY
2649}
2650
5b9f8cd3 2651static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2652{
857485c0 2653 int ret = 0;
1ff50bda 2654 unsigned long flags;
b481de9c 2655
d986bcd1 2656 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2657 return;
2658
2659 /* The following should be done only at AP bring up */
3195c1f3 2660 if (!iwl_is_associated(priv)) {
b481de9c
ZY
2661
2662 /* RXON - unassoc (to set timing command) */
2663 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2664 iwl_commit_rxon(priv);
b481de9c
ZY
2665
2666 /* RXON Timing */
3195c1f3 2667 iwl_setup_rxon_timing(priv);
857485c0 2668 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2669 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2670 if (ret)
b481de9c
ZY
2671 IWL_WARNING("REPLY_RXON_TIMING failed - "
2672 "Attempting to continue.\n");
2673
c7de35cd 2674 iwl_set_rxon_chain(priv);
b481de9c
ZY
2675
2676 /* FIXME: what should be the assoc_id for AP? */
2677 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2678 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2679 priv->staging_rxon.flags |=
2680 RXON_FLG_SHORT_PREAMBLE_MSK;
2681 else
2682 priv->staging_rxon.flags &=
2683 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2684
2685 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2686 if (priv->assoc_capability &
2687 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2688 priv->staging_rxon.flags |=
2689 RXON_FLG_SHORT_SLOT_MSK;
2690 else
2691 priv->staging_rxon.flags &=
2692 ~RXON_FLG_SHORT_SLOT_MSK;
2693
05c914fe 2694 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2695 priv->staging_rxon.flags &=
2696 ~RXON_FLG_SHORT_SLOT_MSK;
2697 }
2698 /* restore RXON assoc */
2699 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2700 iwl_commit_rxon(priv);
1ff50bda
EG
2701 spin_lock_irqsave(&priv->lock, flags);
2702 iwl_activate_qos(priv, 1);
2703 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2704 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2705 }
5b9f8cd3 2706 iwl_send_beacon_cmd(priv);
b481de9c
ZY
2707
2708 /* FIXME - we need to add code here to detect a totally new
2709 * configuration, reset the AP, unassoc, rxon timing, assoc,
2710 * clear sta table, add BCAST sta... */
2711}
2712
9d139c81 2713
5b9f8cd3 2714static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2715 struct ieee80211_vif *vif,
b481de9c
ZY
2716 struct ieee80211_if_conf *conf)
2717{
c79dd5b5 2718 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2719 int rc;
2720
2721 if (conf == NULL)
2722 return -EIO;
2723
b716bb91
EG
2724 if (priv->vif != vif) {
2725 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2726 return 0;
2727 }
2728
05c914fe 2729 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
2730 conf->changed & IEEE80211_IFCC_BEACON) {
2731 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2732 if (!beacon)
2733 return -ENOMEM;
ada17513 2734 mutex_lock(&priv->mutex);
5b9f8cd3 2735 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2736 mutex_unlock(&priv->mutex);
9d139c81
JB
2737 if (rc)
2738 return rc;
2739 }
2740
fee1247a 2741 if (!iwl_is_alive(priv))
5a66926a
ZY
2742 return -EAGAIN;
2743
b481de9c
ZY
2744 mutex_lock(&priv->mutex);
2745
b481de9c 2746 if (conf->bssid)
e174961c 2747 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 2748
4150c572
JB
2749/*
2750 * very dubious code was here; the probe filtering flag is never set:
2751 *
b481de9c
ZY
2752 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2753 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2754 */
b481de9c 2755
05c914fe 2756 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
2757 if (!conf->bssid) {
2758 conf->bssid = priv->mac_addr;
2759 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB
2760 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
2761 conf->bssid);
b481de9c
ZY
2762 }
2763 if (priv->ibss_beacon)
2764 dev_kfree_skb(priv->ibss_beacon);
2765
9d139c81 2766 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
2767 }
2768
fee1247a 2769 if (iwl_is_rfkill(priv))
fde3571f
MA
2770 goto done;
2771
b481de9c
ZY
2772 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2773 !is_multicast_ether_addr(conf->bssid)) {
2774 /* If there is currently a HW scan going on in the background
2775 * then we need to cancel it else the RXON below will fail. */
2a421b91 2776 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
2777 IWL_WARNING("Aborted scan still in progress "
2778 "after 100ms\n");
2779 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2780 mutex_unlock(&priv->mutex);
2781 return -EAGAIN;
2782 }
2783 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2784
2785 /* TODO: Audit driver for usage of these members and see
2786 * if mac80211 deprecates them (priv->bssid looks like it
2787 * shouldn't be there, but I haven't scanned the IBSS code
2788 * to verify) - jpk */
2789 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2790
05c914fe 2791 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2792 iwl_config_ap(priv);
b481de9c 2793 else {
5b9f8cd3 2794 rc = iwl_commit_rxon(priv);
05c914fe 2795 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2796 iwl_rxon_add_station(
b481de9c
ZY
2797 priv, priv->active_rxon.bssid_addr, 1);
2798 }
2799
2800 } else {
2a421b91 2801 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2802 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2803 iwl_commit_rxon(priv);
b481de9c
ZY
2804 }
2805
fde3571f 2806 done:
b481de9c
ZY
2807 IWL_DEBUG_MAC80211("leave\n");
2808 mutex_unlock(&priv->mutex);
2809
2810 return 0;
2811}
2812
5b9f8cd3 2813static void iwl_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
2814 unsigned int changed_flags,
2815 unsigned int *total_flags,
2816 int mc_count, struct dev_addr_list *mc_list)
2817{
4419e39b 2818 struct iwl_priv *priv = hw->priv;
352bc8de
ZY
2819 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
2820
2821 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
2822 changed_flags, *total_flags);
25b3f57c 2823
352bc8de
ZY
2824 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
2825 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
2826 *filter_flags |= RXON_FILTER_PROMISC_MSK;
2827 else
2828 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
2829 }
2830 if (changed_flags & FIF_ALLMULTI) {
2831 if (*total_flags & FIF_ALLMULTI)
2832 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
2833 else
2834 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
2835 }
2836 if (changed_flags & FIF_CONTROL) {
2837 if (*total_flags & FIF_CONTROL)
2838 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
2839 else
2840 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
2841 }
2842 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2843 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
2844 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
2845 else
2846 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
4419e39b 2847 }
352bc8de
ZY
2848
2849 /* We avoid iwl_commit_rxon here to commit the new filter flags
2850 * since mac80211 will call ieee80211_hw_config immediately.
2851 * (mc_list is not supported at this time). Otherwise, we need to
2852 * queue a background iwl_commit_rxon work.
2853 */
2854
2855 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
25b3f57c 2856 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
2857}
2858
5b9f8cd3 2859static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2860 struct ieee80211_if_init_conf *conf)
2861{
c79dd5b5 2862 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2863
2864 IWL_DEBUG_MAC80211("enter\n");
2865
2866 mutex_lock(&priv->mutex);
948c171c 2867
fee1247a 2868 if (iwl_is_ready_rf(priv)) {
2a421b91 2869 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2870 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2871 iwl_commit_rxon(priv);
fde3571f 2872 }
32bfd35d
JB
2873 if (priv->vif == conf->vif) {
2874 priv->vif = NULL;
b481de9c 2875 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
2876 }
2877 mutex_unlock(&priv->mutex);
2878
2879 IWL_DEBUG_MAC80211("leave\n");
2880
2881}
471b3efd 2882
3109ece1 2883#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2884static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB
2885 struct ieee80211_vif *vif,
2886 struct ieee80211_bss_conf *bss_conf,
2887 u32 changes)
220173b0 2888{
c79dd5b5 2889 struct iwl_priv *priv = hw->priv;
220173b0 2890
3109ece1
TW
2891 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
2892
471b3efd 2893 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
2894 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
2895 bss_conf->use_short_preamble);
471b3efd 2896 if (bss_conf->use_short_preamble)
220173b0
TW
2897 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2898 else
2899 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2900 }
2901
471b3efd 2902 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 2903 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2904 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
2905 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2906 else
2907 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2908 }
2909
98952d5d 2910 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2911 iwl_ht_conf(priv, bss_conf);
c7de35cd 2912 iwl_set_rxon_chain(priv);
98952d5d
TW
2913 }
2914
471b3efd 2915 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 2916 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
2917 /* This should never happen as this function should
2918 * never be called from interrupt context. */
2919 if (WARN_ON_ONCE(in_interrupt()))
2920 return;
3109ece1
TW
2921 if (bss_conf->assoc) {
2922 priv->assoc_id = bss_conf->aid;
2923 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2924 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
2925 priv->timestamp = bss_conf->timestamp;
2926 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW
2927
2928 /* we have just associated, don't start scan too early
2929 * leave time for EAPOL exchange to complete
2930 */
3109ece1
TW
2931 priv->next_scan_jiffies = jiffies +
2932 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2933 mutex_lock(&priv->mutex);
5b9f8cd3 2934 iwl_post_associate(priv);
508e32e1 2935 mutex_unlock(&priv->mutex);
3109ece1
TW
2936 } else {
2937 priv->assoc_id = 0;
2938 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
2939 }
2940 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2941 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 2942 iwl_send_rxon_assoc(priv);
471b3efd
JB
2943 }
2944
220173b0 2945}
b481de9c 2946
cb43dc25 2947static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 2948{
b481de9c 2949 unsigned long flags;
c79dd5b5 2950 struct iwl_priv *priv = hw->priv;
8d09a5e1 2951 int ret;
b481de9c
ZY
2952
2953 IWL_DEBUG_MAC80211("enter\n");
2954
052c4b9f 2955 mutex_lock(&priv->mutex);
b481de9c
ZY
2956 spin_lock_irqsave(&priv->lock, flags);
2957
fee1247a 2958 if (!iwl_is_ready_rf(priv)) {
cb43dc25 2959 ret = -EIO;
b481de9c
ZY
2960 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
2961 goto out_unlock;
2962 }
2963
8d09a5e1
TW
2964 /* We don't schedule scan within next_scan_jiffies period.
2965 * Avoid scanning during possible EAPOL exchange, return
2966 * success immediately.
2967 */
7878a5a4 2968 if (priv->next_scan_jiffies &&
cb43dc25 2969 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 2970 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW
2971 queue_work(priv->workqueue, &priv->scan_completed);
2972 ret = 0;
7878a5a4
MA
2973 goto out_unlock;
2974 }
8d09a5e1 2975
b481de9c 2976 /* if we just finished scan ask for delay */
681c0050 2977 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 2978 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 2979 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW
2980 queue_work(priv->workqueue, &priv->scan_completed);
2981 ret = 0;
b481de9c
ZY
2982 goto out_unlock;
2983 }
8d09a5e1 2984
cb43dc25 2985 if (ssid_len) {
b481de9c 2986 priv->one_direct_scan = 1;
cb43dc25 2987 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 2988 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 2989 } else {
948c171c 2990 priv->one_direct_scan = 0;
cb43dc25 2991 }
b481de9c 2992
cb43dc25 2993 ret = iwl_scan_initiate(priv);
b481de9c
ZY
2994
2995 IWL_DEBUG_MAC80211("leave\n");
2996
2997out_unlock:
2998 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 2999 mutex_unlock(&priv->mutex);
b481de9c 3000
cb43dc25 3001 return ret;
b481de9c
ZY
3002}
3003
5b9f8cd3 3004static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG
3005 struct ieee80211_key_conf *keyconf, const u8 *addr,
3006 u32 iv32, u16 *phase1key)
3007{
ab885f8c 3008
9f58671e 3009 struct iwl_priv *priv = hw->priv;
ab885f8c
EG
3010 IWL_DEBUG_MAC80211("enter\n");
3011
9f58671e 3012 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c
EG
3013
3014 IWL_DEBUG_MAC80211("leave\n");
3015}
3016
5b9f8cd3 3017static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3018 const u8 *local_addr, const u8 *addr,
3019 struct ieee80211_key_conf *key)
3020{
c79dd5b5 3021 struct iwl_priv *priv = hw->priv;
deb09c43
EG
3022 int ret = 0;
3023 u8 sta_id = IWL_INVALID_STATION;
6974e363 3024 u8 is_default_wep_key = 0;
b481de9c
ZY
3025
3026 IWL_DEBUG_MAC80211("enter\n");
3027
099b40b7 3028 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3029 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3030 return -EOPNOTSUPP;
3031 }
3032
3033 if (is_zero_ether_addr(addr))
3034 /* only support pairwise keys */
3035 return -EOPNOTSUPP;
3036
947b13a7 3037 sta_id = iwl_find_station(priv, addr);
6974e363 3038 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB
3039 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3040 addr);
6974e363 3041 return -EINVAL;
b481de9c 3042
deb09c43 3043 }
b481de9c 3044
6974e363 3045 mutex_lock(&priv->mutex);
2a421b91 3046 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3047 mutex_unlock(&priv->mutex);
3048
3049 /* If we are getting WEP group key and we didn't receive any key mapping
3050 * so far, we are in legacy wep mode (group key only), otherwise we are
3051 * in 1X mode.
3052 * In legacy wep mode, we use another host command to the uCode */
5425e490 3053 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3054 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG
3055 if (cmd == SET_KEY)
3056 is_default_wep_key = !priv->key_mapping_key;
3057 else
ccc038ab
EG
3058 is_default_wep_key =
3059 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3060 }
052c4b9f 3061
b481de9c 3062 switch (cmd) {
deb09c43 3063 case SET_KEY:
6974e363
EG
3064 if (is_default_wep_key)
3065 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3066 else
7480513f 3067 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3068
3069 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3070 break;
3071 case DISABLE_KEY:
6974e363
EG
3072 if (is_default_wep_key)
3073 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3074 else
3ec47732 3075 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3076
3077 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3078 break;
3079 default:
deb09c43 3080 ret = -EINVAL;
b481de9c
ZY
3081 }
3082
3083 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3084
deb09c43 3085 return ret;
b481de9c
ZY
3086}
3087
5b9f8cd3 3088static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3089 const struct ieee80211_tx_queue_params *params)
3090{
c79dd5b5 3091 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3092 unsigned long flags;
3093 int q;
b481de9c
ZY
3094
3095 IWL_DEBUG_MAC80211("enter\n");
3096
fee1247a 3097 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3098 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3099 return -EIO;
3100 }
3101
3102 if (queue >= AC_NUM) {
3103 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3104 return 0;
3105 }
3106
b481de9c
ZY
3107 q = AC_NUM - 1 - queue;
3108
3109 spin_lock_irqsave(&priv->lock, flags);
3110
3111 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3112 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3113 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3114 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3115 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3116
3117 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3118 priv->qos_data.qos_active = 1;
3119
05c914fe 3120 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3121 iwl_activate_qos(priv, 1);
3109ece1 3122 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3123 iwl_activate_qos(priv, 0);
b481de9c 3124
1ff50bda 3125 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3126
b481de9c
ZY
3127 IWL_DEBUG_MAC80211("leave\n");
3128 return 0;
3129}
3130
5b9f8cd3 3131static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 3132 enum ieee80211_ampdu_mlme_action action,
17741cdc 3133 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW
3134{
3135 struct iwl_priv *priv = hw->priv;
d783b061 3136
e174961c
JB
3137 IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
3138 sta->addr, tid);
d783b061
TW
3139
3140 if (!(priv->cfg->sku & IWL_SKU_N))
3141 return -EACCES;
3142
3143 switch (action) {
3144 case IEEE80211_AMPDU_RX_START:
3145 IWL_DEBUG_HT("start Rx\n");
9f58671e 3146 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW
3147 case IEEE80211_AMPDU_RX_STOP:
3148 IWL_DEBUG_HT("stop Rx\n");
9f58671e 3149 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3150 case IEEE80211_AMPDU_TX_START:
3151 IWL_DEBUG_HT("start Tx\n");
17741cdc 3152 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW
3153 case IEEE80211_AMPDU_TX_STOP:
3154 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3155 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3156 default:
3157 IWL_DEBUG_HT("unknown\n");
3158 return -EINVAL;
3159 break;
3160 }
3161 return 0;
3162}
9f58671e 3163
5b9f8cd3 3164static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3165 struct ieee80211_tx_queue_stats *stats)
3166{
c79dd5b5 3167 struct iwl_priv *priv = hw->priv;
b481de9c 3168 int i, avail;
16466903 3169 struct iwl_tx_queue *txq;
443cfd45 3170 struct iwl_queue *q;
b481de9c
ZY
3171 unsigned long flags;
3172
3173 IWL_DEBUG_MAC80211("enter\n");
3174
fee1247a 3175 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3176 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3177 return -EIO;
3178 }
3179
3180 spin_lock_irqsave(&priv->lock, flags);
3181
3182 for (i = 0; i < AC_NUM; i++) {
3183 txq = &priv->txq[i];
3184 q = &txq->q;
443cfd45 3185 avail = iwl_queue_space(q);
b481de9c 3186
57ffc589
JB
3187 stats[i].len = q->n_window - avail;
3188 stats[i].limit = q->n_window - q->high_mark;
3189 stats[i].count = q->n_window;
b481de9c
ZY
3190
3191 }
3192 spin_unlock_irqrestore(&priv->lock, flags);
3193
3194 IWL_DEBUG_MAC80211("leave\n");
3195
3196 return 0;
3197}
3198
5b9f8cd3 3199static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3200 struct ieee80211_low_level_stats *stats)
3201{
bf403db8
EK
3202 struct iwl_priv *priv = hw->priv;
3203
3204 priv = hw->priv;
b481de9c
ZY
3205 IWL_DEBUG_MAC80211("enter\n");
3206 IWL_DEBUG_MAC80211("leave\n");
3207
3208 return 0;
3209}
3210
5b9f8cd3 3211static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3212{
c79dd5b5 3213 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3214 unsigned long flags;
3215
3216 mutex_lock(&priv->mutex);
3217 IWL_DEBUG_MAC80211("enter\n");
3218
b481de9c 3219 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3220 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3221 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3222
c7de35cd 3223 iwl_reset_qos(priv);
b481de9c 3224
b481de9c
ZY
3225 spin_lock_irqsave(&priv->lock, flags);
3226 priv->assoc_id = 0;
3227 priv->assoc_capability = 0;
b481de9c
ZY
3228 priv->assoc_station_added = 0;
3229
3230 /* new association get rid of ibss beacon skb */
3231 if (priv->ibss_beacon)
3232 dev_kfree_skb(priv->ibss_beacon);
3233
3234 priv->ibss_beacon = NULL;
3235
3236 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3237 priv->timestamp = 0;
05c914fe 3238 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
3239 priv->beacon_int = 0;
3240
3241 spin_unlock_irqrestore(&priv->lock, flags);
3242
fee1247a 3243 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3244 IWL_DEBUG_MAC80211("leave - not ready\n");
3245 mutex_unlock(&priv->mutex);
3246 return;
3247 }
3248
052c4b9f 3249 /* we are restarting association process
3250 * clear RXON_FILTER_ASSOC_MSK bit
3251 */
05c914fe 3252 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3253 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3254 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 3255 iwl_commit_rxon(priv);
052c4b9f 3256 }
3257
5da4b55f
MA
3258 iwl_power_update_mode(priv, 0);
3259
b481de9c 3260 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3261 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3262
c90a74ba
EG
3263 /* switch to CAM during association period.
3264 * the ucode will block any association/authentication
3265 * frome during assiciation period if it can not hear
3266 * the AP because of PM. the timer enable PM back is
3267 * association do not complete
3268 */
3269 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3270 IEEE80211_CHAN_RADAR))
3271 iwl_power_disable_management(priv, 3000);
3272
b481de9c
ZY
3273 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3274 mutex_unlock(&priv->mutex);
3275 return;
3276 }
3277
5b9f8cd3 3278 iwl_set_rate(priv);
b481de9c
ZY
3279
3280 mutex_unlock(&priv->mutex);
3281
3282 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3283}
3284
5b9f8cd3 3285static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3286{
c79dd5b5 3287 struct iwl_priv *priv = hw->priv;
b481de9c 3288 unsigned long flags;
2ff75b78 3289 __le64 timestamp;
b481de9c 3290
b481de9c
ZY
3291 IWL_DEBUG_MAC80211("enter\n");
3292
fee1247a 3293 if (!iwl_is_ready_rf(priv)) {
b481de9c 3294 IWL_DEBUG_MAC80211("leave - RF not ready\n");
b481de9c
ZY
3295 return -EIO;
3296 }
3297
05c914fe 3298 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c 3299 IWL_DEBUG_MAC80211("leave - not IBSS\n");
b481de9c
ZY
3300 return -EIO;
3301 }
3302
3303 spin_lock_irqsave(&priv->lock, flags);
3304
3305 if (priv->ibss_beacon)
3306 dev_kfree_skb(priv->ibss_beacon);
3307
3308 priv->ibss_beacon = skb;
3309
3310 priv->assoc_id = 0;
2ff75b78 3311 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3312 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY
3313
3314 IWL_DEBUG_MAC80211("leave\n");
3315 spin_unlock_irqrestore(&priv->lock, flags);
3316
c7de35cd 3317 iwl_reset_qos(priv);
b481de9c 3318
5b9f8cd3 3319 iwl_post_associate(priv);
b481de9c 3320
b481de9c
ZY
3321
3322 return 0;
3323}
3324
b481de9c
ZY
3325/*****************************************************************************
3326 *
3327 * sysfs attributes
3328 *
3329 *****************************************************************************/
3330
0a6857e7 3331#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3332
3333/*
3334 * The following adds a new attribute to the sysfs representation
c3a739fa 3335 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
b481de9c
ZY
3336 * used for controlling the debug level.
3337 *
3338 * See the level definitions in iwl for details.
3339 */
3340
8cf769c6
EK
3341static ssize_t show_debug_level(struct device *d,
3342 struct device_attribute *attr, char *buf)
b481de9c 3343{
8cf769c6
EK
3344 struct iwl_priv *priv = d->driver_data;
3345
3346 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3347}
8cf769c6
EK
3348static ssize_t store_debug_level(struct device *d,
3349 struct device_attribute *attr,
b481de9c
ZY
3350 const char *buf, size_t count)
3351{
8cf769c6 3352 struct iwl_priv *priv = d->driver_data;
9257746f
TW
3353 unsigned long val;
3354 int ret;
b481de9c 3355
9257746f
TW
3356 ret = strict_strtoul(buf, 0, &val);
3357 if (ret)
b481de9c
ZY
3358 printk(KERN_INFO DRV_NAME
3359 ": %s is not in hex or decimal form.\n", buf);
3360 else
8cf769c6 3361 priv->debug_level = val;
b481de9c
ZY
3362
3363 return strnlen(buf, count);
3364}
3365
8cf769c6
EK
3366static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3367 show_debug_level, store_debug_level);
3368
b481de9c 3369
0a6857e7 3370#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3371
b481de9c 3372
bc6f59bc
TW
3373static ssize_t show_version(struct device *d,
3374 struct device_attribute *attr, char *buf)
3375{
3376 struct iwl_priv *priv = d->driver_data;
885ba202 3377 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3378 ssize_t pos = 0;
3379 u16 eeprom_ver;
bc6f59bc
TW
3380
3381 if (palive->is_valid)
f236a265
TW
3382 pos += sprintf(buf + pos,
3383 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3384 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3385 palive->ucode_major, palive->ucode_minor,
3386 palive->sw_rev[0], palive->sw_rev[1],
3387 palive->ver_type, palive->ver_subtype);
bc6f59bc 3388 else
f236a265
TW
3389 pos += sprintf(buf + pos, "fw not loaded\n");
3390
3391 if (priv->eeprom) {
3392 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3393 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3394 eeprom_ver);
3395 } else {
3396 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3397 }
3398
3399 return pos;
bc6f59bc
TW
3400}
3401
3402static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3403
b481de9c
ZY
3404static ssize_t show_temperature(struct device *d,
3405 struct device_attribute *attr, char *buf)
3406{
c79dd5b5 3407 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3408
fee1247a 3409 if (!iwl_is_alive(priv))
b481de9c
ZY
3410 return -EAGAIN;
3411
91dbc5bd 3412 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3413}
3414
3415static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3416
b481de9c
ZY
3417static ssize_t show_tx_power(struct device *d,
3418 struct device_attribute *attr, char *buf)
3419{
c79dd5b5 3420 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
91f39e8e
JS
3421
3422 if (!iwl_is_ready_rf(priv))
3423 return sprintf(buf, "off\n");
3424 else
3425 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3426}
3427
3428static ssize_t store_tx_power(struct device *d,
3429 struct device_attribute *attr,
3430 const char *buf, size_t count)
3431{
c79dd5b5 3432 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3433 unsigned long val;
3434 int ret;
b481de9c 3435
9257746f
TW
3436 ret = strict_strtoul(buf, 10, &val);
3437 if (ret)
b481de9c
ZY
3438 printk(KERN_INFO DRV_NAME
3439 ": %s is not in decimal form.\n", buf);
3440 else
630fe9b6 3441 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3442
3443 return count;
3444}
3445
3446static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3447
3448static ssize_t show_flags(struct device *d,
3449 struct device_attribute *attr, char *buf)
3450{
c79dd5b5 3451 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3452
3453 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3454}
3455
3456static ssize_t store_flags(struct device *d,
3457 struct device_attribute *attr,
3458 const char *buf, size_t count)
3459{
c79dd5b5 3460 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3461 unsigned long val;
3462 u32 flags;
3463 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3464 if (ret)
9257746f
TW
3465 return ret;
3466 flags = (u32)val;
b481de9c
ZY
3467
3468 mutex_lock(&priv->mutex);
3469 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3470 /* Cancel any currently running scans... */
2a421b91 3471 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3472 IWL_WARNING("Could not cancel scan.\n");
3473 else {
9257746f 3474 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3475 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3476 iwl_commit_rxon(priv);
b481de9c
ZY
3477 }
3478 }
3479 mutex_unlock(&priv->mutex);
3480
3481 return count;
3482}
3483
3484static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3485
3486static ssize_t show_filter_flags(struct device *d,
3487 struct device_attribute *attr, char *buf)
3488{
c79dd5b5 3489 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3490
3491 return sprintf(buf, "0x%04X\n",
3492 le32_to_cpu(priv->active_rxon.filter_flags));
3493}
3494
3495static ssize_t store_filter_flags(struct device *d,
3496 struct device_attribute *attr,
3497 const char *buf, size_t count)
3498{
c79dd5b5 3499 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3500 unsigned long val;
3501 u32 filter_flags;
3502 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3503 if (ret)
9257746f
TW
3504 return ret;
3505 filter_flags = (u32)val;
b481de9c
ZY
3506
3507 mutex_lock(&priv->mutex);
3508 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3509 /* Cancel any currently running scans... */
2a421b91 3510 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3511 IWL_WARNING("Could not cancel scan.\n");
3512 else {
3513 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3514 "0x%04X\n", filter_flags);
3515 priv->staging_rxon.filter_flags =
3516 cpu_to_le32(filter_flags);
5b9f8cd3 3517 iwl_commit_rxon(priv);
b481de9c
ZY
3518 }
3519 }
3520 mutex_unlock(&priv->mutex);
3521
3522 return count;
3523}
3524
3525static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3526 store_filter_flags);
3527
b481de9c
ZY
3528static ssize_t store_power_level(struct device *d,
3529 struct device_attribute *attr,
3530 const char *buf, size_t count)
3531{
c79dd5b5 3532 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3533 int ret;
9257746f
TW
3534 unsigned long mode;
3535
b481de9c 3536
b481de9c
ZY
3537 mutex_lock(&priv->mutex);
3538
fee1247a 3539 if (!iwl_is_ready(priv)) {
298df1f6 3540 ret = -EAGAIN;
b481de9c
ZY
3541 goto out;
3542 }
3543
9257746f 3544 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3545 if (ret)
9257746f
TW
3546 goto out;
3547
298df1f6
EK
3548 ret = iwl_power_set_user_mode(priv, mode);
3549 if (ret) {
5da4b55f
MA
3550 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3551 goto out;
b481de9c 3552 }
298df1f6 3553 ret = count;
b481de9c
ZY
3554
3555 out:
3556 mutex_unlock(&priv->mutex);
298df1f6 3557 return ret;
b481de9c
ZY
3558}
3559
b481de9c
ZY
3560static ssize_t show_power_level(struct device *d,
3561 struct device_attribute *attr, char *buf)
3562{
c79dd5b5 3563 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3564 int mode = priv->power_data.user_power_setting;
3565 int system = priv->power_data.system_power_setting;
5da4b55f 3566 int level = priv->power_data.power_mode;
b481de9c
ZY
3567 char *p = buf;
3568
298df1f6
EK
3569 switch (system) {
3570 case IWL_POWER_SYS_AUTO:
3571 p += sprintf(p, "SYSTEM:auto");
b481de9c 3572 break;
298df1f6
EK
3573 case IWL_POWER_SYS_AC:
3574 p += sprintf(p, "SYSTEM:ac");
3575 break;
3576 case IWL_POWER_SYS_BATTERY:
3577 p += sprintf(p, "SYSTEM:battery");
b481de9c 3578 break;
b481de9c 3579 }
298df1f6 3580
c3056065
AK
3581 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3582 "fixed" : "auto");
298df1f6
EK
3583 p += sprintf(p, "\tINDEX:%d", level);
3584 p += sprintf(p, "\n");
3ac7f146 3585 return p - buf + 1;
b481de9c
ZY
3586}
3587
3588static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3589 store_power_level);
3590
b481de9c
ZY
3591
3592static ssize_t show_statistics(struct device *d,
3593 struct device_attribute *attr, char *buf)
3594{
c79dd5b5 3595 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3596 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3597 u32 len = 0, ofs = 0;
3ac7f146 3598 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
3599 int rc = 0;
3600
fee1247a 3601 if (!iwl_is_alive(priv))
b481de9c
ZY
3602 return -EAGAIN;
3603
3604 mutex_lock(&priv->mutex);
49ea8596 3605 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3606 mutex_unlock(&priv->mutex);
3607
3608 if (rc) {
3609 len = sprintf(buf,
3610 "Error sending statistics request: 0x%08X\n", rc);
3611 return len;
3612 }
3613
3614 while (size && (PAGE_SIZE - len)) {
3615 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3616 PAGE_SIZE - len, 1);
3617 len = strlen(buf);
3618 if (PAGE_SIZE - len)
3619 buf[len++] = '\n';
3620
3621 ofs += 16;
3622 size -= min(size, 16U);
3623 }
3624
3625 return len;
3626}
3627
3628static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3629
b481de9c 3630
b481de9c
ZY
3631/*****************************************************************************
3632 *
3633 * driver setup and teardown
3634 *
3635 *****************************************************************************/
3636
4e39317d 3637static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
3638{
3639 priv->workqueue = create_workqueue(DRV_NAME);
3640
3641 init_waitqueue_head(&priv->wait_command_queue);
3642
5b9f8cd3
EG
3643 INIT_WORK(&priv->up, iwl_bg_up);
3644 INIT_WORK(&priv->restart, iwl_bg_restart);
3645 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3646 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3647 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3648 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
3649 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3650 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3651
2a421b91 3652 iwl_setup_scan_deferred_work(priv);
c90a74ba 3653 iwl_setup_power_deferred_work(priv);
bb8c093b 3654
4e39317d
EG
3655 if (priv->cfg->ops->lib->setup_deferred_work)
3656 priv->cfg->ops->lib->setup_deferred_work(priv);
3657
3658 init_timer(&priv->statistics_periodic);
3659 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3660 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY
3661
3662 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3663 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
3664}
3665
4e39317d 3666static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3667{
4e39317d
EG
3668 if (priv->cfg->ops->lib->cancel_deferred_work)
3669 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3670
3ae6a054 3671 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3672 cancel_delayed_work(&priv->scan_check);
c90a74ba 3673 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3674 cancel_delayed_work(&priv->alive_start);
b481de9c 3675 cancel_work_sync(&priv->beacon_update);
4e39317d 3676 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
3677}
3678
5b9f8cd3 3679static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY
3680 &dev_attr_flags.attr,
3681 &dev_attr_filter_flags.attr,
b481de9c 3682 &dev_attr_power_level.attr,
b481de9c 3683 &dev_attr_statistics.attr,
b481de9c 3684 &dev_attr_temperature.attr,
b481de9c 3685 &dev_attr_tx_power.attr,
8cf769c6
EK
3686#ifdef CONFIG_IWLWIFI_DEBUG
3687 &dev_attr_debug_level.attr,
3688#endif
bc6f59bc 3689 &dev_attr_version.attr,
b481de9c
ZY
3690
3691 NULL
3692};
3693
5b9f8cd3 3694static struct attribute_group iwl_attribute_group = {
b481de9c 3695 .name = NULL, /* put in device directory */
5b9f8cd3 3696 .attrs = iwl_sysfs_entries,
b481de9c
ZY
3697};
3698
5b9f8cd3
EG
3699static struct ieee80211_ops iwl_hw_ops = {
3700 .tx = iwl_mac_tx,
3701 .start = iwl_mac_start,
3702 .stop = iwl_mac_stop,
3703 .add_interface = iwl_mac_add_interface,
3704 .remove_interface = iwl_mac_remove_interface,
3705 .config = iwl_mac_config,
3706 .config_interface = iwl_mac_config_interface,
3707 .configure_filter = iwl_configure_filter,
3708 .set_key = iwl_mac_set_key,
3709 .update_tkip_key = iwl_mac_update_tkip_key,
3710 .get_stats = iwl_mac_get_stats,
3711 .get_tx_stats = iwl_mac_get_tx_stats,
3712 .conf_tx = iwl_mac_conf_tx,
3713 .reset_tsf = iwl_mac_reset_tsf,
3714 .bss_info_changed = iwl_bss_info_changed,
3715 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3716 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
3717};
3718
5b9f8cd3 3719static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
3720{
3721 int err = 0;
c79dd5b5 3722 struct iwl_priv *priv;
b481de9c 3723 struct ieee80211_hw *hw;
82b9a121 3724 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3725 unsigned long flags;
b481de9c 3726
316c30d9
AK
3727 /************************
3728 * 1. Allocating HW data
3729 ************************/
3730
6440adb5
CB
3731 /* Disabling hardware scan means that mac80211 will perform scans
3732 * "the hard way", rather than using device's scan. */
1ea87396 3733 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
3734 if (cfg->mod_params->debug & IWL_DL_INFO)
3735 dev_printk(KERN_DEBUG, &(pdev->dev),
3736 "Disabling hw_scan\n");
5b9f8cd3 3737 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY
3738 }
3739
5b9f8cd3 3740 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3741 if (!hw) {
b481de9c
ZY
3742 err = -ENOMEM;
3743 goto out;
3744 }
1d0a082d
AK
3745 priv = hw->priv;
3746 /* At this point both hw and priv are allocated. */
3747
b481de9c
ZY
3748 SET_IEEE80211_DEV(hw, &pdev->dev);
3749
3750 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 3751 priv->cfg = cfg;
b481de9c 3752 priv->pci_dev = pdev;
316c30d9 3753
0a6857e7 3754#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3755 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
3756 atomic_set(&priv->restrict_refcnt, 0);
3757#endif
b481de9c 3758
316c30d9
AK
3759 /**************************
3760 * 2. Initializing PCI bus
3761 **************************/
3762 if (pci_enable_device(pdev)) {
3763 err = -ENODEV;
3764 goto out_ieee80211_free_hw;
3765 }
3766
3767 pci_set_master(pdev);
3768
093d874c 3769 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3770 if (!err)
093d874c 3771 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3772 if (err) {
093d874c 3773 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3774 if (!err)
093d874c 3775 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3776 /* both attempts failed: */
316c30d9 3777 if (err) {
cc2a8ea8
RR
3778 printk(KERN_WARNING "%s: No suitable DMA available.\n",
3779 DRV_NAME);
316c30d9 3780 goto out_pci_disable_device;
cc2a8ea8 3781 }
316c30d9
AK
3782 }
3783
3784 err = pci_request_regions(pdev, DRV_NAME);
3785 if (err)
3786 goto out_pci_disable_device;
3787
3788 pci_set_drvdata(pdev, priv);
3789
316c30d9
AK
3790
3791 /***********************
3792 * 3. Read REV register
3793 ***********************/
3794 priv->hw_base = pci_iomap(pdev, 0, 0);
3795 if (!priv->hw_base) {
3796 err = -ENODEV;
3797 goto out_pci_release_regions;
3798 }
3799
3800 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
3801 (unsigned long long) pci_resource_len(pdev, 0));
3802 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
3803
b661c819 3804 iwl_hw_detect(priv);
316c30d9 3805 printk(KERN_INFO DRV_NAME
b661c819
TW
3806 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3807 priv->cfg->name, priv->hw_rev);
316c30d9 3808
e7b63581
TW
3809 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3810 * PCI Tx retries from interfering with C3 CPU state */
3811 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3812
91238714
TW
3813 /* amp init */
3814 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3815 if (err < 0) {
91238714 3816 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
3817 goto out_iounmap;
3818 }
91238714
TW
3819 /*****************
3820 * 4. Read EEPROM
3821 *****************/
316c30d9
AK
3822 /* Read the EEPROM */
3823 err = iwl_eeprom_init(priv);
3824 if (err) {
3825 IWL_ERROR("Unable to init EEPROM\n");
3826 goto out_iounmap;
3827 }
8614f360
TW
3828 err = iwl_eeprom_check_version(priv);
3829 if (err)
3830 goto out_iounmap;
3831
02883017 3832 /* extract MAC Address */
316c30d9 3833 iwl_eeprom_get_mac(priv, priv->mac_addr);
e174961c 3834 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
316c30d9
AK
3835 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3836
3837 /************************
3838 * 5. Setup HW constants
3839 ************************/
da154e30 3840 if (iwl_set_hw_params(priv)) {
5425e490 3841 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 3842 goto out_free_eeprom;
316c30d9
AK
3843 }
3844
3845 /*******************
6ba87956 3846 * 6. Setup priv
316c30d9 3847 *******************/
b481de9c 3848
6ba87956 3849 err = iwl_init_drv(priv);
bf85ea4f 3850 if (err)
399f4900 3851 goto out_free_eeprom;
bf85ea4f 3852 /* At this point both hw and priv are initialized. */
316c30d9
AK
3853
3854 /**********************************
3855 * 7. Initialize module parameters
3856 **********************************/
3857
3858 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3859 if (priv->cfg->mod_params->disable) {
316c30d9
AK
3860 set_bit(STATUS_RF_KILL_SW, &priv->status);
3861 IWL_DEBUG_INFO("Radio disabled.\n");
3862 }
3863
316c30d9
AK
3864 /********************
3865 * 8. Setup services
3866 ********************/
0359facc 3867 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3868 iwl_disable_interrupts(priv);
0359facc 3869 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3870
5b9f8cd3 3871 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9
AK
3872 if (err) {
3873 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 3874 goto out_uninit_drv;
316c30d9
AK
3875 }
3876
316c30d9 3877
4e39317d 3878 iwl_setup_deferred_work(priv);
653fa4a0 3879 iwl_setup_rx_handlers(priv);
316c30d9
AK
3880
3881 /********************
3882 * 9. Conclude
3883 ********************/
5a66926a
ZY
3884 pci_save_state(pdev);
3885 pci_disable_device(pdev);
b481de9c 3886
6ba87956
TW
3887 /**********************************
3888 * 10. Setup and register mac80211
3889 **********************************/
3890
3891 err = iwl_setup_mac(priv);
3892 if (err)
3893 goto out_remove_sysfs;
3894
3895 err = iwl_dbgfs_register(priv, DRV_NAME);
3896 if (err)
3897 IWL_ERROR("failed to create debugfs files\n");
3898
58d0f361
EG
3899 err = iwl_rfkill_init(priv);
3900 if (err)
3901 IWL_ERROR("Unable to initialize RFKILL system. "
3902 "Ignoring error: %d\n", err);
3903 iwl_power_initialize(priv);
b481de9c
ZY
3904 return 0;
3905
316c30d9 3906 out_remove_sysfs:
5b9f8cd3 3907 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
6ba87956
TW
3908 out_uninit_drv:
3909 iwl_uninit_drv(priv);
073d3f5f
TW
3910 out_free_eeprom:
3911 iwl_eeprom_free(priv);
b481de9c
ZY
3912 out_iounmap:
3913 pci_iounmap(pdev, priv->hw_base);
3914 out_pci_release_regions:
3915 pci_release_regions(pdev);
316c30d9 3916 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
3917 out_pci_disable_device:
3918 pci_disable_device(pdev);
b481de9c
ZY
3919 out_ieee80211_free_hw:
3920 ieee80211_free_hw(priv->hw);
3921 out:
3922 return err;
3923}
3924
5b9f8cd3 3925static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3926{
c79dd5b5 3927 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3928 unsigned long flags;
b481de9c
ZY
3929
3930 if (!priv)
3931 return;
3932
3933 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
3934
67249625 3935 iwl_dbgfs_unregister(priv);
5b9f8cd3 3936 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3937
5b9f8cd3
EG
3938 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3939 * to be called and iwl_down since we are removing the device
0b124c31
GG
3940 * we need to set STATUS_EXIT_PENDING bit.
3941 */
3942 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR
3943 if (priv->mac80211_registered) {
3944 ieee80211_unregister_hw(priv->hw);
3945 priv->mac80211_registered = 0;
0b124c31 3946 } else {
5b9f8cd3 3947 iwl_down(priv);
c4f55232
RR
3948 }
3949
0359facc
MA
3950 /* make sure we flush any pending irq or
3951 * tasklet for the driver
3952 */
3953 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3954 iwl_disable_interrupts(priv);
0359facc
MA
3955 spin_unlock_irqrestore(&priv->lock, flags);
3956
3957 iwl_synchronize_irq(priv);
3958
58d0f361 3959 iwl_rfkill_unregister(priv);
5b9f8cd3 3960 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY
3961
3962 if (priv->rxq.bd)
a55360e4 3963 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 3964 iwl_hw_txq_ctx_free(priv);
b481de9c 3965
37deb2a0 3966 iwl_clear_stations_table(priv);
073d3f5f 3967 iwl_eeprom_free(priv);
b481de9c 3968
b481de9c 3969
948c171c
MA
3970 /*netif_stop_queue(dev); */
3971 flush_workqueue(priv->workqueue);
3972
5b9f8cd3 3973 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY
3974 * priv->workqueue... so we can't take down the workqueue
3975 * until now... */
3976 destroy_workqueue(priv->workqueue);
3977 priv->workqueue = NULL;
3978
b481de9c
ZY
3979 pci_iounmap(pdev, priv->hw_base);
3980 pci_release_regions(pdev);
3981 pci_disable_device(pdev);
3982 pci_set_drvdata(pdev, NULL);
3983
6ba87956 3984 iwl_uninit_drv(priv);
b481de9c
ZY
3985
3986 if (priv->ibss_beacon)
3987 dev_kfree_skb(priv->ibss_beacon);
3988
3989 ieee80211_free_hw(priv->hw);
3990}
3991
3992#ifdef CONFIG_PM
3993
5b9f8cd3 3994static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 3995{
c79dd5b5 3996 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 3997
e655b9f0
ZY
3998 if (priv->is_open) {
3999 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 4000 iwl_mac_stop(priv->hw);
e655b9f0
ZY
4001 priv->is_open = 1;
4002 }
b481de9c 4003
b481de9c
ZY
4004 pci_set_power_state(pdev, PCI_D3hot);
4005
b481de9c
ZY
4006 return 0;
4007}
4008
5b9f8cd3 4009static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 4010{
c79dd5b5 4011 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4012
b481de9c 4013 pci_set_power_state(pdev, PCI_D0);
b481de9c 4014
e655b9f0 4015 if (priv->is_open)
5b9f8cd3 4016 iwl_mac_start(priv->hw);
b481de9c 4017
e655b9f0 4018 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4019 return 0;
4020}
4021
4022#endif /* CONFIG_PM */
4023
4024/*****************************************************************************
4025 *
4026 * driver and module entry point
4027 *
4028 *****************************************************************************/
4029
fed9017e
RR
4030/* Hardware specific file defines the PCI IDs table for that hardware module */
4031static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4032#ifdef CONFIG_IWL4965
fed9017e
RR
4033 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4034 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4035#endif /* CONFIG_IWL4965 */
5a6a256e 4036#ifdef CONFIG_IWL5000
47408639
EK
4037 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4038 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4039 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4040 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4041 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4042 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4043 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4044 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4045 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4046 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW
4047/* 5350 WiFi/WiMax */
4048 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4049 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4050 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW
4051/* 5150 Wifi/WiMax */
4052 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
4053 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
5a6a256e 4054#endif /* CONFIG_IWL5000 */
7100e924 4055
fed9017e
RR
4056 {0}
4057};
4058MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4059
4060static struct pci_driver iwl_driver = {
b481de9c 4061 .name = DRV_NAME,
fed9017e 4062 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG
4063 .probe = iwl_pci_probe,
4064 .remove = __devexit_p(iwl_pci_remove),
b481de9c 4065#ifdef CONFIG_PM
5b9f8cd3
EG
4066 .suspend = iwl_pci_suspend,
4067 .resume = iwl_pci_resume,
b481de9c
ZY
4068#endif
4069};
4070
5b9f8cd3 4071static int __init iwl_init(void)
b481de9c
ZY
4072{
4073
4074 int ret;
4075 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4076 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4077
e227ceac 4078 ret = iwlagn_rate_control_register();
897e1cf2
RC
4079 if (ret) {
4080 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4081 return ret;
4082 }
4083
fed9017e 4084 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4085 if (ret) {
4086 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4087 goto error_register;
b481de9c 4088 }
b481de9c
ZY
4089
4090 return ret;
897e1cf2 4091
897e1cf2 4092error_register:
e227ceac 4093 iwlagn_rate_control_unregister();
897e1cf2 4094 return ret;
b481de9c
ZY
4095}
4096
5b9f8cd3 4097static void __exit iwl_exit(void)
b481de9c 4098{
fed9017e 4099 pci_unregister_driver(&iwl_driver);
e227ceac 4100 iwlagn_rate_control_unregister();
b481de9c
ZY
4101}
4102
5b9f8cd3
EG
4103module_exit(iwl_exit);
4104module_init(iwl_init);
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