Commit | Line | Data |
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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
901069c7 | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
759ef89f | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | * | |
28 | *****************************************************************************/ | |
b481de9c ZY |
29 | #include <linux/kernel.h> |
30 | #include <linux/module.h> | |
b481de9c | 31 | #include <linux/init.h> |
5a0e3ad6 | 32 | #include <linux/slab.h> |
b481de9c | 33 | #include <linux/delay.h> |
d43c36dc | 34 | #include <linux/sched.h> |
b481de9c ZY |
35 | #include <linux/skbuff.h> |
36 | #include <linux/netdevice.h> | |
b481de9c | 37 | #include <linux/firmware.h> |
b481de9c ZY |
38 | #include <linux/etherdevice.h> |
39 | #include <linux/if_arp.h> | |
40 | ||
b481de9c ZY |
41 | #include <net/mac80211.h> |
42 | ||
43 | #include <asm/div64.h> | |
44 | ||
6bc913bd | 45 | #include "iwl-eeprom.h" |
3e0d4cb1 | 46 | #include "iwl-dev.h" |
fee1247a | 47 | #include "iwl-core.h" |
3395f6e9 | 48 | #include "iwl-io.h" |
0de76736 | 49 | #include "iwl-agn-calib.h" |
a1175124 | 50 | #include "iwl-agn.h" |
48f20d35 | 51 | #include "iwl-shared.h" |
d5934110 | 52 | #include "iwl-bus.h" |
c85eb619 | 53 | #include "iwl-trans.h" |
416e1438 | 54 | |
b481de9c ZY |
55 | /****************************************************************************** |
56 | * | |
57 | * module boiler plate | |
58 | * | |
59 | ******************************************************************************/ | |
60 | ||
b481de9c ZY |
61 | /* |
62 | * module name, copyright, version, etc. | |
b481de9c | 63 | */ |
d783b061 | 64 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 65 | |
0a6857e7 | 66 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
67 | #define VD "d" |
68 | #else | |
69 | #define VD | |
70 | #endif | |
71 | ||
81963d68 | 72 | #define DRV_VERSION IWLWIFI_VERSION VD |
b481de9c | 73 | |
b481de9c ZY |
74 | |
75 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
76 | MODULE_VERSION(DRV_VERSION); | |
a7b75207 | 77 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
b481de9c | 78 | MODULE_LICENSE("GPL"); |
3c607d27 | 79 | MODULE_ALIAS("iwlagn"); |
b481de9c | 80 | |
5b9f8cd3 | 81 | void iwl_update_chain_flags(struct iwl_priv *priv) |
5da4b55f | 82 | { |
246ed355 | 83 | struct iwl_rxon_context *ctx; |
5da4b55f | 84 | |
e3f10cea WYG |
85 | for_each_context(priv, ctx) { |
86 | iwlagn_set_rxon_chain(priv, ctx); | |
87 | if (ctx->active.rx_chain != ctx->staging.rx_chain) | |
88 | iwlagn_commit_rxon(priv, ctx); | |
246ed355 | 89 | } |
5da4b55f MA |
90 | } |
91 | ||
47ff65c4 DH |
92 | /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ |
93 | static void iwl_set_beacon_tim(struct iwl_priv *priv, | |
77834543 JB |
94 | struct iwl_tx_beacon_cmd *tx_beacon_cmd, |
95 | u8 *beacon, u32 frame_size) | |
47ff65c4 DH |
96 | { |
97 | u16 tim_idx; | |
98 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; | |
99 | ||
100 | /* | |
101 | * The index is relative to frame start but we start looking at the | |
102 | * variable-length part of the beacon. | |
103 | */ | |
104 | tim_idx = mgmt->u.beacon.variable - beacon; | |
105 | ||
106 | /* Parse variable-length elements of beacon to find WLAN_EID_TIM */ | |
107 | while ((tim_idx < (frame_size - 2)) && | |
108 | (beacon[tim_idx] != WLAN_EID_TIM)) | |
109 | tim_idx += beacon[tim_idx+1] + 2; | |
110 | ||
111 | /* If TIM field was found, set variables */ | |
112 | if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) { | |
113 | tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); | |
114 | tx_beacon_cmd->tim_size = beacon[tim_idx+1]; | |
115 | } else | |
116 | IWL_WARN(priv, "Unable to find TIM Element in beacon\n"); | |
117 | } | |
118 | ||
8a98d49e | 119 | int iwlagn_send_beacon_cmd(struct iwl_priv *priv) |
4bf64efd TW |
120 | { |
121 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
8a98d49e JB |
122 | struct iwl_host_cmd cmd = { |
123 | .id = REPLY_TX_BEACON, | |
e419d62d | 124 | .flags = CMD_SYNC, |
8a98d49e | 125 | }; |
0b5b3ff1 | 126 | struct ieee80211_tx_info *info; |
47ff65c4 DH |
127 | u32 frame_size; |
128 | u32 rate_flags; | |
129 | u32 rate; | |
8a98d49e | 130 | |
47ff65c4 DH |
131 | /* |
132 | * We have to set up the TX command, the TX Beacon command, and the | |
133 | * beacon contents. | |
134 | */ | |
4bf64efd | 135 | |
6ac2f839 | 136 | lockdep_assert_held(&priv->shrd->mutex); |
76d04815 JB |
137 | |
138 | if (!priv->beacon_ctx) { | |
139 | IWL_ERR(priv, "trying to build beacon w/o beacon context!\n"); | |
950094cb | 140 | return 0; |
76d04815 JB |
141 | } |
142 | ||
8a98d49e JB |
143 | if (WARN_ON(!priv->beacon_skb)) |
144 | return -EINVAL; | |
145 | ||
4ce7cc2b JB |
146 | /* Allocate beacon command */ |
147 | if (!priv->beacon_cmd) | |
148 | priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL); | |
149 | tx_beacon_cmd = priv->beacon_cmd; | |
8a98d49e JB |
150 | if (!tx_beacon_cmd) |
151 | return -ENOMEM; | |
152 | ||
153 | frame_size = priv->beacon_skb->len; | |
4bf64efd | 154 | |
47ff65c4 | 155 | /* Set up TX command fields */ |
4bf64efd | 156 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); |
76d04815 | 157 | tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id; |
47ff65c4 DH |
158 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
159 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
160 | TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; | |
4bf64efd | 161 | |
47ff65c4 | 162 | /* Set up TX beacon command fields */ |
4ce7cc2b | 163 | iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data, |
77834543 | 164 | frame_size); |
4bf64efd | 165 | |
47ff65c4 | 166 | /* Set up packet rate and flags */ |
0b5b3ff1 JB |
167 | info = IEEE80211_SKB_CB(priv->beacon_skb); |
168 | ||
169 | /* | |
170 | * Let's set up the rate at least somewhat correctly; | |
171 | * it will currently not actually be used by the uCode, | |
172 | * it uses the broadcast station's rate instead. | |
173 | */ | |
174 | if (info->control.rates[0].idx < 0 || | |
175 | info->control.rates[0].flags & IEEE80211_TX_RC_MCS) | |
176 | rate = 0; | |
177 | else | |
178 | rate = info->control.rates[0].idx; | |
179 | ||
0e1654fa | 180 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant, |
d6189124 | 181 | hw_params(priv).valid_tx_ant); |
47ff65c4 | 182 | rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant); |
0b5b3ff1 JB |
183 | |
184 | /* In mac80211, rates for 5 GHz start at 0 */ | |
185 | if (info->band == IEEE80211_BAND_5GHZ) | |
186 | rate += IWL_FIRST_OFDM_RATE; | |
187 | else if (rate >= IWL_FIRST_CCK_RATE && rate <= IWL_LAST_CCK_RATE) | |
47ff65c4 | 188 | rate_flags |= RATE_MCS_CCK_MSK; |
0b5b3ff1 JB |
189 | |
190 | tx_beacon_cmd->tx.rate_n_flags = | |
191 | iwl_hw_set_rate_n_flags(rate, rate_flags); | |
4bf64efd | 192 | |
8a98d49e | 193 | /* Submit command */ |
4ce7cc2b | 194 | cmd.len[0] = sizeof(*tx_beacon_cmd); |
3fa50738 | 195 | cmd.data[0] = tx_beacon_cmd; |
4ce7cc2b JB |
196 | cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY; |
197 | cmd.len[1] = frame_size; | |
198 | cmd.data[1] = priv->beacon_skb->data; | |
199 | cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; | |
7aaa1d79 | 200 | |
e6bb4c9c | 201 | return iwl_trans_send_cmd(trans(priv), &cmd); |
a8e74e27 SO |
202 | } |
203 | ||
5b9f8cd3 | 204 | static void iwl_bg_beacon_update(struct work_struct *work) |
b481de9c | 205 | { |
c79dd5b5 TW |
206 | struct iwl_priv *priv = |
207 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
208 | struct sk_buff *beacon; |
209 | ||
6ac2f839 | 210 | mutex_lock(&priv->shrd->mutex); |
76d04815 JB |
211 | if (!priv->beacon_ctx) { |
212 | IWL_ERR(priv, "updating beacon w/o beacon context!\n"); | |
213 | goto out; | |
214 | } | |
b481de9c | 215 | |
60744f62 JB |
216 | if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) { |
217 | /* | |
218 | * The ucode will send beacon notifications even in | |
219 | * IBSS mode, but we don't want to process them. But | |
220 | * we need to defer the type check to here due to | |
221 | * requiring locking around the beacon_ctx access. | |
222 | */ | |
223 | goto out; | |
224 | } | |
225 | ||
76d04815 JB |
226 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ |
227 | beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif); | |
b481de9c | 228 | if (!beacon) { |
77834543 | 229 | IWL_ERR(priv, "update beacon failed -- keeping old\n"); |
76d04815 | 230 | goto out; |
b481de9c ZY |
231 | } |
232 | ||
b481de9c | 233 | /* new beacon skb is allocated every time; dispose previous.*/ |
77834543 | 234 | dev_kfree_skb(priv->beacon_skb); |
b481de9c | 235 | |
12e934dc | 236 | priv->beacon_skb = beacon; |
b481de9c | 237 | |
2295c66b | 238 | iwlagn_send_beacon_cmd(priv); |
76d04815 | 239 | out: |
6ac2f839 | 240 | mutex_unlock(&priv->shrd->mutex); |
b481de9c ZY |
241 | } |
242 | ||
fbba9410 WYG |
243 | static void iwl_bg_bt_runtime_config(struct work_struct *work) |
244 | { | |
245 | struct iwl_priv *priv = | |
246 | container_of(work, struct iwl_priv, bt_runtime_config); | |
247 | ||
63013ae3 | 248 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
fbba9410 WYG |
249 | return; |
250 | ||
251 | /* dont send host command if rf-kill is on */ | |
845a9c0d | 252 | if (!iwl_is_ready_rf(priv->shrd)) |
fbba9410 | 253 | return; |
e55b517c | 254 | iwlagn_send_advance_bt_config(priv); |
fbba9410 WYG |
255 | } |
256 | ||
bee008b7 WYG |
257 | static void iwl_bg_bt_full_concurrency(struct work_struct *work) |
258 | { | |
259 | struct iwl_priv *priv = | |
260 | container_of(work, struct iwl_priv, bt_full_concurrency); | |
246ed355 | 261 | struct iwl_rxon_context *ctx; |
bee008b7 | 262 | |
6ac2f839 | 263 | mutex_lock(&priv->shrd->mutex); |
dc1a4068 | 264 | |
63013ae3 | 265 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
dc1a4068 | 266 | goto out; |
bee008b7 WYG |
267 | |
268 | /* dont send host command if rf-kill is on */ | |
845a9c0d | 269 | if (!iwl_is_ready_rf(priv->shrd)) |
dc1a4068 | 270 | goto out; |
bee008b7 WYG |
271 | |
272 | IWL_DEBUG_INFO(priv, "BT coex in %s mode\n", | |
273 | priv->bt_full_concurrent ? | |
274 | "full concurrency" : "3-wire"); | |
275 | ||
276 | /* | |
277 | * LQ & RXON updated cmds must be sent before BT Config cmd | |
278 | * to avoid 3-wire collisions | |
279 | */ | |
246ed355 | 280 | for_each_context(priv, ctx) { |
e3f10cea | 281 | iwlagn_set_rxon_chain(priv, ctx); |
805a3b81 | 282 | iwlagn_commit_rxon(priv, ctx); |
246ed355 | 283 | } |
bee008b7 | 284 | |
e55b517c | 285 | iwlagn_send_advance_bt_config(priv); |
dc1a4068 | 286 | out: |
6ac2f839 | 287 | mutex_unlock(&priv->shrd->mutex); |
bee008b7 WYG |
288 | } |
289 | ||
4e39317d | 290 | /** |
5b9f8cd3 | 291 | * iwl_bg_statistics_periodic - Timer callback to queue statistics |
4e39317d EG |
292 | * |
293 | * This callback is provided in order to send a statistics request. | |
294 | * | |
295 | * This timer function is continually reset to execute within | |
296 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
297 | * was received. We need to ensure we receive the statistics in order | |
298 | * to update the temperature used for calibrating the TXPOWER. | |
299 | */ | |
5b9f8cd3 | 300 | static void iwl_bg_statistics_periodic(unsigned long data) |
4e39317d EG |
301 | { |
302 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
303 | ||
63013ae3 | 304 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
4e39317d EG |
305 | return; |
306 | ||
61780ee3 | 307 | /* dont send host command if rf-kill is on */ |
845a9c0d | 308 | if (!iwl_is_ready_rf(priv->shrd)) |
61780ee3 MA |
309 | return; |
310 | ||
ef8d5529 | 311 | iwl_send_statistics_request(priv, CMD_ASYNC, false); |
4e39317d EG |
312 | } |
313 | ||
a9e1cb6a WYG |
314 | |
315 | static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base, | |
316 | u32 start_idx, u32 num_events, | |
317 | u32 mode) | |
318 | { | |
319 | u32 i; | |
320 | u32 ptr; /* SRAM byte address of log data */ | |
321 | u32 ev, time, data; /* event log data */ | |
322 | unsigned long reg_flags; | |
323 | ||
324 | if (mode == 0) | |
325 | ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32)); | |
326 | else | |
327 | ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32)); | |
328 | ||
329 | /* Make sure device is powered up for SRAM reads */ | |
83ed9015 EG |
330 | spin_lock_irqsave(&bus(priv)->reg_lock, reg_flags); |
331 | if (iwl_grab_nic_access(bus(priv))) { | |
332 | spin_unlock_irqrestore(&bus(priv)->reg_lock, reg_flags); | |
a9e1cb6a WYG |
333 | return; |
334 | } | |
335 | ||
336 | /* Set starting address; reads will auto-increment */ | |
83ed9015 | 337 | iwl_write32(bus(priv), HBUS_TARG_MEM_RADDR, ptr); |
a9e1cb6a WYG |
338 | rmb(); |
339 | ||
340 | /* | |
341 | * "time" is actually "data" for mode 0 (no timestamp). | |
342 | * place event id # at far right for easier visual parsing. | |
343 | */ | |
344 | for (i = 0; i < num_events; i++) { | |
83ed9015 EG |
345 | ev = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); |
346 | time = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); | |
a9e1cb6a WYG |
347 | if (mode == 0) { |
348 | trace_iwlwifi_dev_ucode_cont_event(priv, | |
349 | 0, time, ev); | |
350 | } else { | |
83ed9015 | 351 | data = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); |
a9e1cb6a WYG |
352 | trace_iwlwifi_dev_ucode_cont_event(priv, |
353 | time, data, ev); | |
354 | } | |
355 | } | |
356 | /* Allow device to power down */ | |
83ed9015 EG |
357 | iwl_release_nic_access(bus(priv)); |
358 | spin_unlock_irqrestore(&bus(priv)->reg_lock, reg_flags); | |
a9e1cb6a WYG |
359 | } |
360 | ||
875295f1 | 361 | static void iwl_continuous_event_trace(struct iwl_priv *priv) |
a9e1cb6a WYG |
362 | { |
363 | u32 capacity; /* event log capacity in # entries */ | |
364 | u32 base; /* SRAM byte address of event log header */ | |
365 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
366 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
367 | u32 next_entry; /* index of next entry to be written by uCode */ | |
368 | ||
d7d5783c | 369 | base = priv->device_pointers.error_event_table; |
4caab328 | 370 | if (iwlagn_hw_valid_rtc_data_addr(base)) { |
83ed9015 EG |
371 | capacity = iwl_read_targ_mem(bus(priv), base); |
372 | num_wraps = iwl_read_targ_mem(bus(priv), | |
373 | base + (2 * sizeof(u32))); | |
374 | mode = iwl_read_targ_mem(bus(priv), base + (1 * sizeof(u32))); | |
375 | next_entry = iwl_read_targ_mem(bus(priv), | |
376 | base + (3 * sizeof(u32))); | |
a9e1cb6a WYG |
377 | } else |
378 | return; | |
379 | ||
380 | if (num_wraps == priv->event_log.num_wraps) { | |
381 | iwl_print_cont_event_trace(priv, | |
382 | base, priv->event_log.next_entry, | |
383 | next_entry - priv->event_log.next_entry, | |
384 | mode); | |
385 | priv->event_log.non_wraps_count++; | |
386 | } else { | |
387 | if ((num_wraps - priv->event_log.num_wraps) > 1) | |
388 | priv->event_log.wraps_more_count++; | |
389 | else | |
390 | priv->event_log.wraps_once_count++; | |
391 | trace_iwlwifi_dev_ucode_wrap_event(priv, | |
392 | num_wraps - priv->event_log.num_wraps, | |
393 | next_entry, priv->event_log.next_entry); | |
394 | if (next_entry < priv->event_log.next_entry) { | |
395 | iwl_print_cont_event_trace(priv, base, | |
396 | priv->event_log.next_entry, | |
397 | capacity - priv->event_log.next_entry, | |
398 | mode); | |
399 | ||
400 | iwl_print_cont_event_trace(priv, base, 0, | |
401 | next_entry, mode); | |
402 | } else { | |
403 | iwl_print_cont_event_trace(priv, base, | |
404 | next_entry, capacity - next_entry, | |
405 | mode); | |
406 | ||
407 | iwl_print_cont_event_trace(priv, base, 0, | |
408 | next_entry, mode); | |
409 | } | |
410 | } | |
411 | priv->event_log.num_wraps = num_wraps; | |
412 | priv->event_log.next_entry = next_entry; | |
413 | } | |
414 | ||
415 | /** | |
416 | * iwl_bg_ucode_trace - Timer callback to log ucode event | |
417 | * | |
418 | * The timer is continually set to execute every | |
419 | * UCODE_TRACE_PERIOD milliseconds after the last timer expired | |
420 | * this function is to perform continuous uCode event logging operation | |
421 | * if enabled | |
422 | */ | |
423 | static void iwl_bg_ucode_trace(unsigned long data) | |
424 | { | |
425 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
426 | ||
63013ae3 | 427 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
a9e1cb6a WYG |
428 | return; |
429 | ||
430 | if (priv->event_log.ucode_trace) { | |
431 | iwl_continuous_event_trace(priv); | |
432 | /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */ | |
433 | mod_timer(&priv->ucode_trace, | |
434 | jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD)); | |
435 | } | |
436 | } | |
437 | ||
65550636 WYG |
438 | static void iwl_bg_tx_flush(struct work_struct *work) |
439 | { | |
440 | struct iwl_priv *priv = | |
441 | container_of(work, struct iwl_priv, tx_flush); | |
442 | ||
63013ae3 | 443 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
65550636 WYG |
444 | return; |
445 | ||
446 | /* do nothing if rf-kill is on */ | |
845a9c0d | 447 | if (!iwl_is_ready_rf(priv->shrd)) |
65550636 WYG |
448 | return; |
449 | ||
c68744fb WYG |
450 | IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n"); |
451 | iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL); | |
65550636 WYG |
452 | } |
453 | ||
4d2a5d0e JB |
454 | static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags) |
455 | { | |
4d2a5d0e JB |
456 | int i; |
457 | ||
458 | /* | |
459 | * The default context is always valid, | |
460 | * the PAN context depends on uCode. | |
461 | */ | |
7a10e3e4 | 462 | priv->shrd->valid_contexts = BIT(IWL_RXON_CTX_BSS); |
4d2a5d0e | 463 | if (ucode_flags & IWL_UCODE_TLV_FLAGS_PAN) |
7a10e3e4 | 464 | priv->shrd->valid_contexts |= BIT(IWL_RXON_CTX_PAN); |
4d2a5d0e JB |
465 | |
466 | for (i = 0; i < NUM_IWL_RXON_CTX; i++) | |
467 | priv->contexts[i].ctxid = i; | |
468 | ||
469 | priv->contexts[IWL_RXON_CTX_BSS].always_active = true; | |
470 | priv->contexts[IWL_RXON_CTX_BSS].is_active = true; | |
471 | priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON; | |
472 | priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING; | |
473 | priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC; | |
474 | priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM; | |
475 | priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID; | |
476 | priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY; | |
4d2a5d0e JB |
477 | priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes = |
478 | BIT(NL80211_IFTYPE_ADHOC); | |
479 | priv->contexts[IWL_RXON_CTX_BSS].interface_modes = | |
480 | BIT(NL80211_IFTYPE_STATION); | |
481 | priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP; | |
482 | priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS; | |
483 | priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS; | |
484 | priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS; | |
485 | ||
486 | priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON; | |
487 | priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = | |
488 | REPLY_WIPAN_RXON_TIMING; | |
489 | priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = | |
490 | REPLY_WIPAN_RXON_ASSOC; | |
491 | priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM; | |
492 | priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN; | |
493 | priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY; | |
494 | priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID; | |
495 | priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION; | |
4d2a5d0e JB |
496 | priv->contexts[IWL_RXON_CTX_PAN].interface_modes = |
497 | BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP); | |
c6baf7fb JB |
498 | |
499 | if (ucode_flags & IWL_UCODE_TLV_FLAGS_P2P) | |
500 | priv->contexts[IWL_RXON_CTX_PAN].interface_modes |= | |
501 | BIT(NL80211_IFTYPE_P2P_CLIENT) | | |
502 | BIT(NL80211_IFTYPE_P2P_GO); | |
503 | ||
4d2a5d0e JB |
504 | priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP; |
505 | priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA; | |
506 | priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P; | |
507 | ||
508 | BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2); | |
509 | } | |
510 | ||
b08dfd04 | 511 | static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context); |
b08dfd04 | 512 | |
39396085 JS |
513 | #define UCODE_EXPERIMENTAL_INDEX 100 |
514 | #define UCODE_EXPERIMENTAL_TAG "exp" | |
515 | ||
b08dfd04 JB |
516 | static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first) |
517 | { | |
518 | const char *name_pre = priv->cfg->fw_name_pre; | |
39396085 | 519 | char tag[8]; |
b08dfd04 | 520 | |
39396085 JS |
521 | if (first) { |
522 | #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE | |
523 | priv->fw_index = UCODE_EXPERIMENTAL_INDEX; | |
524 | strcpy(tag, UCODE_EXPERIMENTAL_TAG); | |
525 | } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) { | |
526 | #endif | |
b08dfd04 | 527 | priv->fw_index = priv->cfg->ucode_api_max; |
39396085 JS |
528 | sprintf(tag, "%d", priv->fw_index); |
529 | } else { | |
b08dfd04 | 530 | priv->fw_index--; |
39396085 JS |
531 | sprintf(tag, "%d", priv->fw_index); |
532 | } | |
b08dfd04 JB |
533 | |
534 | if (priv->fw_index < priv->cfg->ucode_api_min) { | |
535 | IWL_ERR(priv, "no suitable firmware found!\n"); | |
536 | return -ENOENT; | |
537 | } | |
538 | ||
39396085 | 539 | sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); |
b08dfd04 | 540 | |
39396085 JS |
541 | IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n", |
542 | (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) | |
543 | ? "EXPERIMENTAL " : "", | |
b08dfd04 JB |
544 | priv->firmware_name); |
545 | ||
546 | return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name, | |
26bfc0cf | 547 | bus(priv)->dev, |
3599d39a | 548 | GFP_KERNEL, priv, iwl_ucode_callback); |
b08dfd04 JB |
549 | } |
550 | ||
0e9a44dc | 551 | struct iwlagn_firmware_pieces { |
c8ac61cf JB |
552 | const void *inst, *data, *init, *init_data, *wowlan_inst, *wowlan_data; |
553 | size_t inst_size, data_size, init_size, init_data_size, | |
554 | wowlan_inst_size, wowlan_data_size; | |
0e9a44dc JB |
555 | |
556 | u32 build; | |
b2e640d4 JB |
557 | |
558 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; | |
559 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; | |
0e9a44dc JB |
560 | }; |
561 | ||
562 | static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | |
563 | const struct firmware *ucode_raw, | |
564 | struct iwlagn_firmware_pieces *pieces) | |
565 | { | |
566 | struct iwl_ucode_header *ucode = (void *)ucode_raw->data; | |
567 | u32 api_ver, hdr_size; | |
568 | const u8 *src; | |
569 | ||
570 | priv->ucode_ver = le32_to_cpu(ucode->ver); | |
571 | api_ver = IWL_UCODE_API(priv->ucode_ver); | |
572 | ||
573 | switch (api_ver) { | |
574 | default: | |
f7d046f9 WYG |
575 | hdr_size = 28; |
576 | if (ucode_raw->size < hdr_size) { | |
577 | IWL_ERR(priv, "File size too small!\n"); | |
578 | return -EINVAL; | |
0e9a44dc | 579 | } |
f7d046f9 WYG |
580 | pieces->build = le32_to_cpu(ucode->u.v2.build); |
581 | pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size); | |
582 | pieces->data_size = le32_to_cpu(ucode->u.v2.data_size); | |
583 | pieces->init_size = le32_to_cpu(ucode->u.v2.init_size); | |
584 | pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size); | |
f7d046f9 WYG |
585 | src = ucode->u.v2.data; |
586 | break; | |
0e9a44dc JB |
587 | case 0: |
588 | case 1: | |
589 | case 2: | |
590 | hdr_size = 24; | |
591 | if (ucode_raw->size < hdr_size) { | |
592 | IWL_ERR(priv, "File size too small!\n"); | |
593 | return -EINVAL; | |
594 | } | |
595 | pieces->build = 0; | |
596 | pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size); | |
597 | pieces->data_size = le32_to_cpu(ucode->u.v1.data_size); | |
598 | pieces->init_size = le32_to_cpu(ucode->u.v1.init_size); | |
599 | pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size); | |
0e9a44dc JB |
600 | src = ucode->u.v1.data; |
601 | break; | |
602 | } | |
603 | ||
604 | /* Verify size of file vs. image size info in file's header */ | |
605 | if (ucode_raw->size != hdr_size + pieces->inst_size + | |
606 | pieces->data_size + pieces->init_size + | |
1fc35276 | 607 | pieces->init_data_size) { |
0e9a44dc JB |
608 | |
609 | IWL_ERR(priv, | |
610 | "uCode file size %d does not match expected size\n", | |
611 | (int)ucode_raw->size); | |
612 | return -EINVAL; | |
613 | } | |
614 | ||
615 | pieces->inst = src; | |
616 | src += pieces->inst_size; | |
617 | pieces->data = src; | |
618 | src += pieces->data_size; | |
619 | pieces->init = src; | |
620 | src += pieces->init_size; | |
621 | pieces->init_data = src; | |
622 | src += pieces->init_data_size; | |
0e9a44dc JB |
623 | |
624 | return 0; | |
625 | } | |
626 | ||
dd7a2509 JB |
627 | static int iwlagn_load_firmware(struct iwl_priv *priv, |
628 | const struct firmware *ucode_raw, | |
629 | struct iwlagn_firmware_pieces *pieces, | |
630 | struct iwlagn_ucode_capabilities *capa) | |
631 | { | |
632 | struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data; | |
633 | struct iwl_ucode_tlv *tlv; | |
634 | size_t len = ucode_raw->size; | |
635 | const u8 *data; | |
48f20d35 EG |
636 | int wanted_alternative = iwlagn_mod_params.wanted_ucode_alternative; |
637 | int tmp; | |
dd7a2509 | 638 | u64 alternatives; |
ad8d8333 WYG |
639 | u32 tlv_len; |
640 | enum iwl_ucode_tlv_type tlv_type; | |
641 | const u8 *tlv_data; | |
dd7a2509 | 642 | |
ad8d8333 WYG |
643 | if (len < sizeof(*ucode)) { |
644 | IWL_ERR(priv, "uCode has invalid length: %zd\n", len); | |
dd7a2509 | 645 | return -EINVAL; |
ad8d8333 | 646 | } |
dd7a2509 | 647 | |
ad8d8333 WYG |
648 | if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) { |
649 | IWL_ERR(priv, "invalid uCode magic: 0X%x\n", | |
650 | le32_to_cpu(ucode->magic)); | |
dd7a2509 | 651 | return -EINVAL; |
ad8d8333 | 652 | } |
dd7a2509 JB |
653 | |
654 | /* | |
655 | * Check which alternatives are present, and "downgrade" | |
656 | * when the chosen alternative is not present, warning | |
657 | * the user when that happens. Some files may not have | |
658 | * any alternatives, so don't warn in that case. | |
659 | */ | |
660 | alternatives = le64_to_cpu(ucode->alternatives); | |
661 | tmp = wanted_alternative; | |
662 | if (wanted_alternative > 63) | |
663 | wanted_alternative = 63; | |
664 | while (wanted_alternative && !(alternatives & BIT(wanted_alternative))) | |
665 | wanted_alternative--; | |
666 | if (wanted_alternative && wanted_alternative != tmp) | |
667 | IWL_WARN(priv, | |
668 | "uCode alternative %d not available, choosing %d\n", | |
669 | tmp, wanted_alternative); | |
670 | ||
671 | priv->ucode_ver = le32_to_cpu(ucode->ver); | |
672 | pieces->build = le32_to_cpu(ucode->build); | |
673 | data = ucode->data; | |
674 | ||
675 | len -= sizeof(*ucode); | |
676 | ||
704da534 | 677 | while (len >= sizeof(*tlv)) { |
dd7a2509 | 678 | u16 tlv_alt; |
dd7a2509 JB |
679 | |
680 | len -= sizeof(*tlv); | |
681 | tlv = (void *)data; | |
682 | ||
683 | tlv_len = le32_to_cpu(tlv->length); | |
684 | tlv_type = le16_to_cpu(tlv->type); | |
685 | tlv_alt = le16_to_cpu(tlv->alternative); | |
686 | tlv_data = tlv->data; | |
687 | ||
ad8d8333 WYG |
688 | if (len < tlv_len) { |
689 | IWL_ERR(priv, "invalid TLV len: %zd/%u\n", | |
690 | len, tlv_len); | |
dd7a2509 | 691 | return -EINVAL; |
ad8d8333 | 692 | } |
dd7a2509 JB |
693 | len -= ALIGN(tlv_len, 4); |
694 | data += sizeof(*tlv) + ALIGN(tlv_len, 4); | |
695 | ||
696 | /* | |
697 | * Alternative 0 is always valid. | |
698 | * | |
699 | * Skip alternative TLVs that are not selected. | |
700 | */ | |
701 | if (tlv_alt != 0 && tlv_alt != wanted_alternative) | |
702 | continue; | |
703 | ||
704 | switch (tlv_type) { | |
705 | case IWL_UCODE_TLV_INST: | |
706 | pieces->inst = tlv_data; | |
707 | pieces->inst_size = tlv_len; | |
708 | break; | |
709 | case IWL_UCODE_TLV_DATA: | |
710 | pieces->data = tlv_data; | |
711 | pieces->data_size = tlv_len; | |
712 | break; | |
713 | case IWL_UCODE_TLV_INIT: | |
714 | pieces->init = tlv_data; | |
715 | pieces->init_size = tlv_len; | |
716 | break; | |
717 | case IWL_UCODE_TLV_INIT_DATA: | |
718 | pieces->init_data = tlv_data; | |
719 | pieces->init_data_size = tlv_len; | |
720 | break; | |
721 | case IWL_UCODE_TLV_BOOT: | |
1fc35276 | 722 | IWL_ERR(priv, "Found unexpected BOOT ucode\n"); |
dd7a2509 JB |
723 | break; |
724 | case IWL_UCODE_TLV_PROBE_MAX_LEN: | |
704da534 JB |
725 | if (tlv_len != sizeof(u32)) |
726 | goto invalid_tlv_len; | |
727 | capa->max_probe_length = | |
ad8d8333 | 728 | le32_to_cpup((__le32 *)tlv_data); |
dd7a2509 | 729 | break; |
ece9c4ee JB |
730 | case IWL_UCODE_TLV_PAN: |
731 | if (tlv_len) | |
732 | goto invalid_tlv_len; | |
3997ff39 JB |
733 | capa->flags |= IWL_UCODE_TLV_FLAGS_PAN; |
734 | break; | |
735 | case IWL_UCODE_TLV_FLAGS: | |
736 | /* must be at least one u32 */ | |
737 | if (tlv_len < sizeof(u32)) | |
738 | goto invalid_tlv_len; | |
739 | /* and a proper number of u32s */ | |
740 | if (tlv_len % sizeof(u32)) | |
741 | goto invalid_tlv_len; | |
742 | /* | |
743 | * This driver only reads the first u32 as | |
744 | * right now no more features are defined, | |
745 | * if that changes then either the driver | |
746 | * will not work with the new firmware, or | |
747 | * it'll not take advantage of new features. | |
748 | */ | |
749 | capa->flags = le32_to_cpup((__le32 *)tlv_data); | |
ece9c4ee | 750 | break; |
b2e640d4 | 751 | case IWL_UCODE_TLV_INIT_EVTLOG_PTR: |
704da534 JB |
752 | if (tlv_len != sizeof(u32)) |
753 | goto invalid_tlv_len; | |
754 | pieces->init_evtlog_ptr = | |
ad8d8333 | 755 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
756 | break; |
757 | case IWL_UCODE_TLV_INIT_EVTLOG_SIZE: | |
704da534 JB |
758 | if (tlv_len != sizeof(u32)) |
759 | goto invalid_tlv_len; | |
760 | pieces->init_evtlog_size = | |
ad8d8333 | 761 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
762 | break; |
763 | case IWL_UCODE_TLV_INIT_ERRLOG_PTR: | |
704da534 JB |
764 | if (tlv_len != sizeof(u32)) |
765 | goto invalid_tlv_len; | |
766 | pieces->init_errlog_ptr = | |
ad8d8333 | 767 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
768 | break; |
769 | case IWL_UCODE_TLV_RUNT_EVTLOG_PTR: | |
704da534 JB |
770 | if (tlv_len != sizeof(u32)) |
771 | goto invalid_tlv_len; | |
772 | pieces->inst_evtlog_ptr = | |
ad8d8333 | 773 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
774 | break; |
775 | case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE: | |
704da534 JB |
776 | if (tlv_len != sizeof(u32)) |
777 | goto invalid_tlv_len; | |
778 | pieces->inst_evtlog_size = | |
ad8d8333 | 779 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
780 | break; |
781 | case IWL_UCODE_TLV_RUNT_ERRLOG_PTR: | |
704da534 JB |
782 | if (tlv_len != sizeof(u32)) |
783 | goto invalid_tlv_len; | |
784 | pieces->inst_errlog_ptr = | |
ad8d8333 | 785 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 | 786 | break; |
c8312fac WYG |
787 | case IWL_UCODE_TLV_ENHANCE_SENS_TBL: |
788 | if (tlv_len) | |
704da534 JB |
789 | goto invalid_tlv_len; |
790 | priv->enhance_sensitivity_table = true; | |
c8312fac | 791 | break; |
c8ac61cf JB |
792 | case IWL_UCODE_TLV_WOWLAN_INST: |
793 | pieces->wowlan_inst = tlv_data; | |
794 | pieces->wowlan_inst_size = tlv_len; | |
795 | break; | |
796 | case IWL_UCODE_TLV_WOWLAN_DATA: | |
797 | pieces->wowlan_data = tlv_data; | |
798 | pieces->wowlan_data_size = tlv_len; | |
799 | break; | |
6a822d06 | 800 | case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE: |
704da534 JB |
801 | if (tlv_len != sizeof(u32)) |
802 | goto invalid_tlv_len; | |
803 | capa->standard_phy_calibration_size = | |
6a822d06 WYG |
804 | le32_to_cpup((__le32 *)tlv_data); |
805 | break; | |
dd7a2509 | 806 | default: |
6fc3ba99 | 807 | IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type); |
dd7a2509 JB |
808 | break; |
809 | } | |
810 | } | |
811 | ||
ad8d8333 WYG |
812 | if (len) { |
813 | IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len); | |
814 | iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len); | |
704da534 | 815 | return -EINVAL; |
ad8d8333 | 816 | } |
dd7a2509 | 817 | |
704da534 JB |
818 | return 0; |
819 | ||
820 | invalid_tlv_len: | |
821 | IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len); | |
822 | iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len); | |
823 | ||
824 | return -EINVAL; | |
dd7a2509 JB |
825 | } |
826 | ||
b481de9c | 827 | /** |
b08dfd04 | 828 | * iwl_ucode_callback - callback when firmware was loaded |
b481de9c | 829 | * |
b08dfd04 JB |
830 | * If loaded successfully, copies the firmware into buffers |
831 | * for the card to fetch (via DMA). | |
b481de9c | 832 | */ |
b08dfd04 | 833 | static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) |
b481de9c | 834 | { |
b08dfd04 | 835 | struct iwl_priv *priv = context; |
cc0f555d | 836 | struct iwl_ucode_header *ucode; |
0e9a44dc JB |
837 | int err; |
838 | struct iwlagn_firmware_pieces pieces; | |
a0987a8d | 839 | const unsigned int api_max = priv->cfg->ucode_api_max; |
5d7969bf | 840 | unsigned int api_ok = priv->cfg->ucode_api_ok; |
a0987a8d | 841 | const unsigned int api_min = priv->cfg->ucode_api_min; |
0e9a44dc | 842 | u32 api_ver; |
3e4de761 | 843 | char buildstr[25]; |
0e9a44dc | 844 | u32 build; |
dd7a2509 JB |
845 | struct iwlagn_ucode_capabilities ucode_capa = { |
846 | .max_probe_length = 200, | |
6a822d06 | 847 | .standard_phy_calibration_size = |
642454cc | 848 | IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE, |
dd7a2509 | 849 | }; |
0e9a44dc | 850 | |
5d7969bf JB |
851 | if (!api_ok) |
852 | api_ok = api_max; | |
853 | ||
0e9a44dc | 854 | memset(&pieces, 0, sizeof(pieces)); |
b481de9c | 855 | |
b08dfd04 | 856 | if (!ucode_raw) { |
5d7969bf | 857 | if (priv->fw_index <= api_ok) |
39396085 JS |
858 | IWL_ERR(priv, |
859 | "request for firmware file '%s' failed.\n", | |
860 | priv->firmware_name); | |
b08dfd04 | 861 | goto try_again; |
b481de9c ZY |
862 | } |
863 | ||
b08dfd04 JB |
864 | IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n", |
865 | priv->firmware_name, ucode_raw->size); | |
b481de9c | 866 | |
22adba2a JB |
867 | /* Make sure that we got at least the API version number */ |
868 | if (ucode_raw->size < 4) { | |
15b1687c | 869 | IWL_ERR(priv, "File size way too small!\n"); |
b08dfd04 | 870 | goto try_again; |
b481de9c ZY |
871 | } |
872 | ||
873 | /* Data from ucode file: header followed by uCode images */ | |
cc0f555d | 874 | ucode = (struct iwl_ucode_header *)ucode_raw->data; |
b481de9c | 875 | |
0e9a44dc JB |
876 | if (ucode->ver) |
877 | err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces); | |
878 | else | |
dd7a2509 JB |
879 | err = iwlagn_load_firmware(priv, ucode_raw, &pieces, |
880 | &ucode_capa); | |
22adba2a | 881 | |
0e9a44dc JB |
882 | if (err) |
883 | goto try_again; | |
b481de9c | 884 | |
a0987a8d | 885 | api_ver = IWL_UCODE_API(priv->ucode_ver); |
0e9a44dc | 886 | build = pieces.build; |
a0987a8d | 887 | |
0e9a44dc JB |
888 | /* |
889 | * api_ver should match the api version forming part of the | |
890 | * firmware filename ... but we don't check for that and only rely | |
891 | * on the API version read from firmware header from here on forward | |
892 | */ | |
65cccfb0 WYG |
893 | /* no api version check required for experimental uCode */ |
894 | if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) { | |
895 | if (api_ver < api_min || api_ver > api_max) { | |
896 | IWL_ERR(priv, | |
897 | "Driver unable to support your firmware API. " | |
898 | "Driver supports v%u, firmware is v%u.\n", | |
899 | api_max, api_ver); | |
900 | goto try_again; | |
901 | } | |
b08dfd04 | 902 | |
5d7969bf JB |
903 | if (api_ver < api_ok) { |
904 | if (api_ok != api_max) | |
905 | IWL_ERR(priv, "Firmware has old API version, " | |
906 | "expected v%u through v%u, got v%u.\n", | |
907 | api_ok, api_max, api_ver); | |
908 | else | |
909 | IWL_ERR(priv, "Firmware has old API version, " | |
910 | "expected v%u, got v%u.\n", | |
911 | api_max, api_ver); | |
912 | IWL_ERR(priv, "New firmware can be obtained from " | |
913 | "http://www.intellinuxwireless.org/.\n"); | |
914 | } | |
65cccfb0 | 915 | } |
a0987a8d | 916 | |
3e4de761 | 917 | if (build) |
39396085 JS |
918 | sprintf(buildstr, " build %u%s", build, |
919 | (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) | |
920 | ? " (EXP)" : ""); | |
3e4de761 JB |
921 | else |
922 | buildstr[0] = '\0'; | |
923 | ||
924 | IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n", | |
925 | IWL_UCODE_MAJOR(priv->ucode_ver), | |
926 | IWL_UCODE_MINOR(priv->ucode_ver), | |
927 | IWL_UCODE_API(priv->ucode_ver), | |
928 | IWL_UCODE_SERIAL(priv->ucode_ver), | |
929 | buildstr); | |
a0987a8d | 930 | |
5ebeb5a6 RC |
931 | snprintf(priv->hw->wiphy->fw_version, |
932 | sizeof(priv->hw->wiphy->fw_version), | |
3e4de761 | 933 | "%u.%u.%u.%u%s", |
5ebeb5a6 RC |
934 | IWL_UCODE_MAJOR(priv->ucode_ver), |
935 | IWL_UCODE_MINOR(priv->ucode_ver), | |
936 | IWL_UCODE_API(priv->ucode_ver), | |
3e4de761 JB |
937 | IWL_UCODE_SERIAL(priv->ucode_ver), |
938 | buildstr); | |
b481de9c | 939 | |
b08dfd04 JB |
940 | /* |
941 | * For any of the failures below (before allocating pci memory) | |
942 | * we will try to load a version with a smaller API -- maybe the | |
943 | * user just got a corrupted version of the latest API. | |
944 | */ | |
945 | ||
0e9a44dc JB |
946 | IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", |
947 | priv->ucode_ver); | |
948 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n", | |
949 | pieces.inst_size); | |
950 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n", | |
951 | pieces.data_size); | |
952 | IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n", | |
953 | pieces.init_size); | |
954 | IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", | |
955 | pieces.init_data_size); | |
b481de9c ZY |
956 | |
957 | /* Verify that uCode images will fit in card's SRAM */ | |
d6189124 | 958 | if (pieces.inst_size > hw_params(priv).max_inst_size) { |
0e9a44dc JB |
959 | IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n", |
960 | pieces.inst_size); | |
b08dfd04 | 961 | goto try_again; |
b481de9c ZY |
962 | } |
963 | ||
d6189124 | 964 | if (pieces.data_size > hw_params(priv).max_data_size) { |
0e9a44dc JB |
965 | IWL_ERR(priv, "uCode data len %Zd too large to fit in\n", |
966 | pieces.data_size); | |
b08dfd04 | 967 | goto try_again; |
b481de9c | 968 | } |
0e9a44dc | 969 | |
d6189124 | 970 | if (pieces.init_size > hw_params(priv).max_inst_size) { |
0e9a44dc JB |
971 | IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n", |
972 | pieces.init_size); | |
b08dfd04 | 973 | goto try_again; |
b481de9c | 974 | } |
0e9a44dc | 975 | |
d6189124 | 976 | if (pieces.init_data_size > hw_params(priv).max_data_size) { |
0e9a44dc JB |
977 | IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n", |
978 | pieces.init_data_size); | |
b08dfd04 | 979 | goto try_again; |
b481de9c | 980 | } |
0e9a44dc | 981 | |
b481de9c ZY |
982 | /* Allocate ucode buffers for card's bus-master loading ... */ |
983 | ||
984 | /* Runtime instructions and 2 copies of data: | |
985 | * 1) unmodified from disk | |
986 | * 2) backup cache for save/restore during power-downs */ | |
de7f5f92 | 987 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_rt.code, |
dbf28e21 JB |
988 | pieces.inst, pieces.inst_size)) |
989 | goto err_pci_alloc; | |
de7f5f92 | 990 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_rt.data, |
dbf28e21 | 991 | pieces.data, pieces.data_size)) |
1f304e4e ZY |
992 | goto err_pci_alloc; |
993 | ||
b481de9c | 994 | /* Initialization instructions and data */ |
0e9a44dc | 995 | if (pieces.init_size && pieces.init_data_size) { |
de7f5f92 | 996 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_init.code, |
dbf28e21 JB |
997 | pieces.init, pieces.init_size)) |
998 | goto err_pci_alloc; | |
de7f5f92 | 999 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_init.data, |
dbf28e21 | 1000 | pieces.init_data, pieces.init_data_size)) |
90e759d1 TW |
1001 | goto err_pci_alloc; |
1002 | } | |
b481de9c | 1003 | |
c8ac61cf JB |
1004 | /* WoWLAN instructions and data */ |
1005 | if (pieces.wowlan_inst_size && pieces.wowlan_data_size) { | |
de7f5f92 DF |
1006 | if (iwl_alloc_fw_desc(bus(priv), |
1007 | &trans(priv)->ucode_wowlan.code, | |
c8ac61cf JB |
1008 | pieces.wowlan_inst, |
1009 | pieces.wowlan_inst_size)) | |
1010 | goto err_pci_alloc; | |
de7f5f92 DF |
1011 | if (iwl_alloc_fw_desc(bus(priv), |
1012 | &trans(priv)->ucode_wowlan.data, | |
c8ac61cf JB |
1013 | pieces.wowlan_data, |
1014 | pieces.wowlan_data_size)) | |
1015 | goto err_pci_alloc; | |
1016 | } | |
1017 | ||
b2e640d4 JB |
1018 | /* Now that we can no longer fail, copy information */ |
1019 | ||
1020 | /* | |
1021 | * The (size - 16) / 12 formula is based on the information recorded | |
1022 | * for each event, which is of mode 1 (including timestamp) for all | |
1023 | * new microcodes that include this information. | |
1024 | */ | |
898ed67b | 1025 | priv->init_evtlog_ptr = pieces.init_evtlog_ptr; |
b2e640d4 | 1026 | if (pieces.init_evtlog_size) |
898ed67b | 1027 | priv->init_evtlog_size = (pieces.init_evtlog_size - 16)/12; |
b2e640d4 | 1028 | else |
898ed67b | 1029 | priv->init_evtlog_size = |
7cb1b088 | 1030 | priv->cfg->base_params->max_event_log_size; |
898ed67b WYG |
1031 | priv->init_errlog_ptr = pieces.init_errlog_ptr; |
1032 | priv->inst_evtlog_ptr = pieces.inst_evtlog_ptr; | |
b2e640d4 | 1033 | if (pieces.inst_evtlog_size) |
898ed67b | 1034 | priv->inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12; |
b2e640d4 | 1035 | else |
898ed67b | 1036 | priv->inst_evtlog_size = |
7cb1b088 | 1037 | priv->cfg->base_params->max_event_log_size; |
898ed67b | 1038 | priv->inst_errlog_ptr = pieces.inst_errlog_ptr; |
b2e640d4 | 1039 | |
d2690c0d JB |
1040 | priv->new_scan_threshold_behaviour = |
1041 | !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN); | |
1042 | ||
4d2a5d0e JB |
1043 | if (!(priv->cfg->sku & EEPROM_SKU_CAP_IPAN_ENABLE)) |
1044 | ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_PAN; | |
c10afb6e | 1045 | |
c6baf7fb JB |
1046 | /* |
1047 | * if not PAN, then don't support P2P -- might be a uCode | |
1048 | * packaging bug or due to the eeprom check above | |
1049 | */ | |
1050 | if (!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN)) | |
1051 | ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_P2P; | |
1052 | ||
4d2a5d0e JB |
1053 | if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) { |
1054 | priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN; | |
cefeaa5f | 1055 | priv->shrd->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM; |
4d2a5d0e JB |
1056 | } else { |
1057 | priv->sta_key_max_num = STA_KEY_MAX_NUM; | |
cefeaa5f | 1058 | priv->shrd->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM; |
4d2a5d0e | 1059 | } |
17445b8c | 1060 | |
6a822d06 WYG |
1061 | /* |
1062 | * figure out the offset of chain noise reset and gain commands | |
1063 | * base on the size of standard phy calibration commands table size | |
1064 | */ | |
1065 | if (ucode_capa.standard_phy_calibration_size > | |
1066 | IWL_MAX_PHY_CALIBRATE_TBL_SIZE) | |
1067 | ucode_capa.standard_phy_calibration_size = | |
1068 | IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE; | |
1069 | ||
898ed67b | 1070 | priv->phy_calib_chain_noise_reset_cmd = |
6a822d06 | 1071 | ucode_capa.standard_phy_calibration_size; |
898ed67b | 1072 | priv->phy_calib_chain_noise_gain_cmd = |
6a822d06 WYG |
1073 | ucode_capa.standard_phy_calibration_size + 1; |
1074 | ||
4d2a5d0e JB |
1075 | /* initialize all valid contexts */ |
1076 | iwl_init_context(priv, ucode_capa.flags); | |
1077 | ||
b08dfd04 JB |
1078 | /************************************************** |
1079 | * This is still part of probe() in a sense... | |
1080 | * | |
1081 | * 9. Setup and register with mac80211 and debugfs | |
1082 | **************************************************/ | |
ade4c649 | 1083 | err = iwlagn_mac_setup_register(priv, &ucode_capa); |
b08dfd04 JB |
1084 | if (err) |
1085 | goto out_unbind; | |
1086 | ||
1087 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
1088 | if (err) | |
1089 | IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err); | |
1090 | ||
b481de9c ZY |
1091 | /* We have our copies now, allow OS release its copies */ |
1092 | release_firmware(ucode_raw); | |
898ed67b | 1093 | complete(&priv->firmware_loading_complete); |
b08dfd04 JB |
1094 | return; |
1095 | ||
1096 | try_again: | |
1097 | /* try next, if any */ | |
1098 | if (iwl_request_firmware(priv, false)) | |
1099 | goto out_unbind; | |
1100 | release_firmware(ucode_raw); | |
1101 | return; | |
b481de9c ZY |
1102 | |
1103 | err_pci_alloc: | |
15b1687c | 1104 | IWL_ERR(priv, "failed to allocate pci memory\n"); |
de7f5f92 | 1105 | iwl_dealloc_ucode(trans(priv)); |
b08dfd04 | 1106 | out_unbind: |
898ed67b | 1107 | complete(&priv->firmware_loading_complete); |
26bfc0cf | 1108 | device_release_driver(bus(priv)->dev); |
b481de9c | 1109 | release_firmware(ucode_raw); |
b481de9c ZY |
1110 | } |
1111 | ||
0975cc8f WYG |
1112 | static void iwl_rf_kill_ct_config(struct iwl_priv *priv) |
1113 | { | |
1114 | struct iwl_ct_kill_config cmd; | |
1115 | struct iwl_ct_kill_throttling_config adv_cmd; | |
1116 | unsigned long flags; | |
1117 | int ret = 0; | |
1118 | ||
10b15e6f | 1119 | spin_lock_irqsave(&priv->shrd->lock, flags); |
83ed9015 | 1120 | iwl_write32(bus(priv), CSR_UCODE_DRV_GP1_CLR, |
0975cc8f | 1121 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
10b15e6f | 1122 | spin_unlock_irqrestore(&priv->shrd->lock, flags); |
0975cc8f WYG |
1123 | priv->thermal_throttle.ct_kill_toggle = false; |
1124 | ||
7cb1b088 | 1125 | if (priv->cfg->base_params->support_ct_kill_exit) { |
0975cc8f | 1126 | adv_cmd.critical_temperature_enter = |
d6189124 | 1127 | cpu_to_le32(hw_params(priv).ct_kill_threshold); |
0975cc8f | 1128 | adv_cmd.critical_temperature_exit = |
d6189124 | 1129 | cpu_to_le32(hw_params(priv).ct_kill_exit_threshold); |
0975cc8f | 1130 | |
e6bb4c9c | 1131 | ret = iwl_trans_send_cmd_pdu(trans(priv), |
e419d62d EG |
1132 | REPLY_CT_KILL_CONFIG_CMD, |
1133 | CMD_SYNC, sizeof(adv_cmd), &adv_cmd); | |
0975cc8f WYG |
1134 | if (ret) |
1135 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); | |
1136 | else | |
1137 | IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " | |
d6189124 EG |
1138 | "succeeded, critical temperature enter is %d," |
1139 | "exit is %d\n", | |
1140 | hw_params(priv).ct_kill_threshold, | |
1141 | hw_params(priv).ct_kill_exit_threshold); | |
0975cc8f WYG |
1142 | } else { |
1143 | cmd.critical_temperature_R = | |
d6189124 | 1144 | cpu_to_le32(hw_params(priv).ct_kill_threshold); |
0975cc8f | 1145 | |
e6bb4c9c | 1146 | ret = iwl_trans_send_cmd_pdu(trans(priv), |
e419d62d EG |
1147 | REPLY_CT_KILL_CONFIG_CMD, |
1148 | CMD_SYNC, sizeof(cmd), &cmd); | |
0975cc8f WYG |
1149 | if (ret) |
1150 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); | |
1151 | else | |
1152 | IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " | |
d6189124 EG |
1153 | "succeeded, " |
1154 | "critical temperature is %d\n", | |
1155 | hw_params(priv).ct_kill_threshold); | |
0975cc8f WYG |
1156 | } |
1157 | } | |
1158 | ||
6d6a1afd SZ |
1159 | static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg) |
1160 | { | |
1161 | struct iwl_calib_cfg_cmd calib_cfg_cmd; | |
1162 | struct iwl_host_cmd cmd = { | |
1163 | .id = CALIBRATION_CFG_CMD, | |
3fa50738 JB |
1164 | .len = { sizeof(struct iwl_calib_cfg_cmd), }, |
1165 | .data = { &calib_cfg_cmd, }, | |
6d6a1afd SZ |
1166 | }; |
1167 | ||
1168 | memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd)); | |
af4dc88c | 1169 | calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_RT_CFG_ALL; |
7cb1b088 | 1170 | calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg); |
6d6a1afd | 1171 | |
e6bb4c9c | 1172 | return iwl_trans_send_cmd(trans(priv), &cmd); |
6d6a1afd SZ |
1173 | } |
1174 | ||
1175 | ||
e505c433 WYG |
1176 | static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant) |
1177 | { | |
1178 | struct iwl_tx_ant_config_cmd tx_ant_cmd = { | |
1179 | .valid = cpu_to_le32(valid_tx_ant), | |
1180 | }; | |
1181 | ||
1182 | if (IWL_UCODE_API(priv->ucode_ver) > 1) { | |
1183 | IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant); | |
e6bb4c9c | 1184 | return iwl_trans_send_cmd_pdu(trans(priv), |
e505c433 WYG |
1185 | TX_ANT_CONFIGURATION_CMD, |
1186 | CMD_SYNC, | |
1187 | sizeof(struct iwl_tx_ant_config_cmd), | |
1188 | &tx_ant_cmd); | |
1189 | } else { | |
1190 | IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n"); | |
1191 | return -EOPNOTSUPP; | |
1192 | } | |
1193 | } | |
1194 | ||
b481de9c | 1195 | /** |
4a4a9e81 | 1196 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 1197 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 1198 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 1199 | */ |
4613e72d | 1200 | int iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 1201 | { |
57aab75a | 1202 | int ret = 0; |
246ed355 | 1203 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; |
b481de9c | 1204 | |
1a361cd8 | 1205 | /*TODO: this should go to the transport layer */ |
6bb78847 | 1206 | iwl_reset_ict(trans(priv)); |
b481de9c | 1207 | |
ca7966c8 | 1208 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); |
6d6a1afd | 1209 | |
5b9f8cd3 | 1210 | /* After the ALIVE response, we can send host commands to the uCode */ |
63013ae3 | 1211 | set_bit(STATUS_ALIVE, &priv->shrd->status); |
b481de9c | 1212 | |
22de94de SG |
1213 | /* Enable watchdog to monitor the driver tx queues */ |
1214 | iwl_setup_watchdog(priv); | |
b74e31a9 | 1215 | |
845a9c0d | 1216 | if (iwl_is_rfkill(priv->shrd)) |
ca7966c8 | 1217 | return -ERFKILL; |
b481de9c | 1218 | |
bc795df1 | 1219 | /* download priority table before any calibration request */ |
7cb1b088 WYG |
1220 | if (priv->cfg->bt_params && |
1221 | priv->cfg->bt_params->advanced_bt_coexist) { | |
f7322f8f | 1222 | /* Configure Bluetooth device coexistence support */ |
207ecc5e MV |
1223 | if (priv->cfg->bt_params->bt_sco_disable) |
1224 | priv->bt_enable_pspoll = false; | |
1225 | else | |
1226 | priv->bt_enable_pspoll = true; | |
1227 | ||
f7322f8f WYG |
1228 | priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK; |
1229 | priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT; | |
1230 | priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT; | |
e55b517c | 1231 | iwlagn_send_advance_bt_config(priv); |
f7322f8f | 1232 | priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS; |
207ecc5e MV |
1233 | priv->cur_rssi_ctx = NULL; |
1234 | ||
a5901cbb | 1235 | iwlagn_send_prio_tbl(priv); |
f7322f8f WYG |
1236 | |
1237 | /* FIXME: w/a to force change uCode BT state machine */ | |
ca7966c8 JB |
1238 | ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN, |
1239 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); | |
1240 | if (ret) | |
1241 | return ret; | |
1242 | ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE, | |
1243 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); | |
1244 | if (ret) | |
1245 | return ret; | |
e55b517c WYG |
1246 | } else { |
1247 | /* | |
1248 | * default is 2-wire BT coexexistence support | |
1249 | */ | |
1250 | iwl_send_bt_config(priv); | |
f7322f8f | 1251 | } |
e55b517c | 1252 | |
d6189124 EG |
1253 | if (hw_params(priv).calib_rt_cfg) |
1254 | iwlagn_send_calib_cfg_rt(priv, | |
1255 | hw_params(priv).calib_rt_cfg); | |
bc795df1 | 1256 | |
36d6825b | 1257 | ieee80211_wake_queues(priv->hw); |
b481de9c | 1258 | |
470ab2dd | 1259 | priv->active_rate = IWL_RATES_MASK; |
b481de9c | 1260 | |
2f748dec | 1261 | /* Configure Tx antenna selection based on H/W config */ |
e3f10cea | 1262 | iwlagn_send_tx_ant_config(priv, priv->cfg->valid_tx_ant); |
2f748dec | 1263 | |
57210f7c | 1264 | if (iwl_is_associated_ctx(ctx) && !priv->shrd->wowlan) { |
c1adf9fb | 1265 | struct iwl_rxon_cmd *active_rxon = |
246ed355 | 1266 | (struct iwl_rxon_cmd *)&ctx->active; |
019fb97d | 1267 | /* apply any changes in staging */ |
246ed355 | 1268 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
b481de9c ZY |
1269 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
1270 | } else { | |
d0fe478c | 1271 | struct iwl_rxon_context *tmp; |
b481de9c | 1272 | /* Initialize our rx_config data */ |
d0fe478c JB |
1273 | for_each_context(priv, tmp) |
1274 | iwl_connection_init_rx_config(priv, tmp); | |
45823531 | 1275 | |
e3f10cea | 1276 | iwlagn_set_rxon_chain(priv, ctx); |
b481de9c ZY |
1277 | } |
1278 | ||
57210f7c | 1279 | if (!priv->shrd->wowlan) { |
c8ac61cf JB |
1280 | /* WoWLAN ucode will not reply in the same way, skip it */ |
1281 | iwl_reset_run_time_calib(priv); | |
1282 | } | |
4a4a9e81 | 1283 | |
63013ae3 | 1284 | set_bit(STATUS_READY, &priv->shrd->status); |
9e2e7422 | 1285 | |
b481de9c | 1286 | /* Configure the adapter for unassociated operation */ |
805a3b81 | 1287 | ret = iwlagn_commit_rxon(priv, ctx); |
ca7966c8 JB |
1288 | if (ret) |
1289 | return ret; | |
b481de9c ZY |
1290 | |
1291 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 1292 | iwl_rf_kill_ct_config(priv); |
5a66926a | 1293 | |
e1623446 | 1294 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); |
c46fbefa | 1295 | |
ca7966c8 | 1296 | return iwl_power_update_mode(priv, true); |
b481de9c ZY |
1297 | } |
1298 | ||
4e39317d | 1299 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 1300 | |
7335613a | 1301 | void __iwl_down(struct iwl_priv *priv) |
b481de9c | 1302 | { |
22dd2fd2 | 1303 | int exit_pending; |
b481de9c | 1304 | |
e1623446 | 1305 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); |
b481de9c | 1306 | |
d745d472 SG |
1307 | iwl_scan_cancel_timeout(priv, 200); |
1308 | ||
c6baf7fb JB |
1309 | /* |
1310 | * If active, scanning won't cancel it, so say it expired. | |
1311 | * No race since we hold the mutex here and a new one | |
1312 | * can't come in at this time. | |
1313 | */ | |
1314 | ieee80211_remain_on_channel_expired(priv->hw); | |
1315 | ||
63013ae3 EG |
1316 | exit_pending = |
1317 | test_and_set_bit(STATUS_EXIT_PENDING, &priv->shrd->status); | |
b481de9c | 1318 | |
b62177a0 SG |
1319 | /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set |
1320 | * to prevent rearm timer */ | |
22de94de | 1321 | del_timer_sync(&priv->watchdog); |
b62177a0 | 1322 | |
dcef732c | 1323 | iwl_clear_ucode_stations(priv, NULL); |
a194e324 | 1324 | iwl_dealloc_bcast_stations(priv); |
db125c78 | 1325 | iwl_clear_driver_stations(priv); |
b481de9c | 1326 | |
a1174138 | 1327 | /* reset BT coex data */ |
da5dbb97 | 1328 | priv->bt_status = 0; |
207ecc5e MV |
1329 | priv->cur_rssi_ctx = NULL; |
1330 | priv->bt_is_sco = 0; | |
7cb1b088 WYG |
1331 | if (priv->cfg->bt_params) |
1332 | priv->bt_traffic_load = | |
1333 | priv->cfg->bt_params->bt_init_traffic_load; | |
1334 | else | |
1335 | priv->bt_traffic_load = 0; | |
bee008b7 WYG |
1336 | priv->bt_full_concurrent = false; |
1337 | priv->bt_ci_compliance = 0; | |
a1174138 | 1338 | |
b481de9c ZY |
1339 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
1340 | * exiting the module */ | |
1341 | if (!exit_pending) | |
63013ae3 | 1342 | clear_bit(STATUS_EXIT_PENDING, &priv->shrd->status); |
b481de9c | 1343 | |
859cfb0a | 1344 | if (priv->mac80211_registered) |
b481de9c ZY |
1345 | ieee80211_stop_queues(priv->hw); |
1346 | ||
909e9b23 EG |
1347 | iwl_trans_stop_device(trans(priv)); |
1348 | ||
1a10f433 | 1349 | /* Clear out all status bits but a few that are stable across reset */ |
63013ae3 EG |
1350 | priv->shrd->status &= |
1351 | test_bit(STATUS_RF_KILL_HW, &priv->shrd->status) << | |
b481de9c | 1352 | STATUS_RF_KILL_HW | |
63013ae3 | 1353 | test_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status) << |
9788864e | 1354 | STATUS_GEO_CONFIGURED | |
63013ae3 | 1355 | test_bit(STATUS_FW_ERROR, &priv->shrd->status) << |
052ec3f1 | 1356 | STATUS_FW_ERROR | |
63013ae3 | 1357 | test_bit(STATUS_EXIT_PENDING, &priv->shrd->status) << |
052ec3f1 | 1358 | STATUS_EXIT_PENDING; |
b481de9c | 1359 | |
77834543 | 1360 | dev_kfree_skb(priv->beacon_skb); |
12e934dc | 1361 | priv->beacon_skb = NULL; |
b481de9c ZY |
1362 | } |
1363 | ||
7335613a | 1364 | void iwl_down(struct iwl_priv *priv) |
b481de9c | 1365 | { |
6ac2f839 | 1366 | mutex_lock(&priv->shrd->mutex); |
5b9f8cd3 | 1367 | __iwl_down(priv); |
6ac2f839 | 1368 | mutex_unlock(&priv->shrd->mutex); |
b24d22b1 | 1369 | |
4e39317d | 1370 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
1371 | } |
1372 | ||
b481de9c ZY |
1373 | /***************************************************************************** |
1374 | * | |
1375 | * Workqueue callbacks | |
1376 | * | |
1377 | *****************************************************************************/ | |
1378 | ||
16e727e8 EG |
1379 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
1380 | { | |
1381 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
1382 | run_time_calib_work); | |
1383 | ||
6ac2f839 | 1384 | mutex_lock(&priv->shrd->mutex); |
16e727e8 | 1385 | |
63013ae3 EG |
1386 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status) || |
1387 | test_bit(STATUS_SCANNING, &priv->shrd->status)) { | |
6ac2f839 | 1388 | mutex_unlock(&priv->shrd->mutex); |
16e727e8 EG |
1389 | return; |
1390 | } | |
1391 | ||
1392 | if (priv->start_calib) { | |
0da0e5bf JB |
1393 | iwl_chain_noise_calibration(priv); |
1394 | iwl_sensitivity_calibration(priv); | |
16e727e8 EG |
1395 | } |
1396 | ||
6ac2f839 | 1397 | mutex_unlock(&priv->shrd->mutex); |
16e727e8 EG |
1398 | } |
1399 | ||
7335613a | 1400 | void iwlagn_prepare_restart(struct iwl_priv *priv) |
e43e85c4 JB |
1401 | { |
1402 | struct iwl_rxon_context *ctx; | |
1403 | bool bt_full_concurrent; | |
1404 | u8 bt_ci_compliance; | |
1405 | u8 bt_load; | |
1406 | u8 bt_status; | |
207ecc5e | 1407 | bool bt_is_sco; |
e43e85c4 | 1408 | |
6ac2f839 | 1409 | lockdep_assert_held(&priv->shrd->mutex); |
e43e85c4 JB |
1410 | |
1411 | for_each_context(priv, ctx) | |
1412 | ctx->vif = NULL; | |
1413 | priv->is_open = 0; | |
1414 | ||
1415 | /* | |
1416 | * __iwl_down() will clear the BT status variables, | |
1417 | * which is correct, but when we restart we really | |
1418 | * want to keep them so restore them afterwards. | |
1419 | * | |
1420 | * The restart process will later pick them up and | |
1421 | * re-configure the hw when we reconfigure the BT | |
1422 | * command. | |
1423 | */ | |
1424 | bt_full_concurrent = priv->bt_full_concurrent; | |
1425 | bt_ci_compliance = priv->bt_ci_compliance; | |
1426 | bt_load = priv->bt_traffic_load; | |
1427 | bt_status = priv->bt_status; | |
207ecc5e | 1428 | bt_is_sco = priv->bt_is_sco; |
e43e85c4 JB |
1429 | |
1430 | __iwl_down(priv); | |
1431 | ||
1432 | priv->bt_full_concurrent = bt_full_concurrent; | |
1433 | priv->bt_ci_compliance = bt_ci_compliance; | |
1434 | priv->bt_traffic_load = bt_load; | |
1435 | priv->bt_status = bt_status; | |
207ecc5e | 1436 | priv->bt_is_sco = bt_is_sco; |
e43e85c4 JB |
1437 | } |
1438 | ||
5b9f8cd3 | 1439 | static void iwl_bg_restart(struct work_struct *data) |
b481de9c | 1440 | { |
c79dd5b5 | 1441 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c | 1442 | |
63013ae3 | 1443 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
b481de9c ZY |
1444 | return; |
1445 | ||
63013ae3 | 1446 | if (test_and_clear_bit(STATUS_FW_ERROR, &priv->shrd->status)) { |
6ac2f839 | 1447 | mutex_lock(&priv->shrd->mutex); |
e43e85c4 | 1448 | iwlagn_prepare_restart(priv); |
6ac2f839 | 1449 | mutex_unlock(&priv->shrd->mutex); |
a1174138 | 1450 | iwl_cancel_deferred_work(priv); |
19cc1087 JB |
1451 | ieee80211_restart_hw(priv->hw); |
1452 | } else { | |
ca7966c8 | 1453 | WARN_ON(1); |
19cc1087 | 1454 | } |
b481de9c ZY |
1455 | } |
1456 | ||
0fd09502 | 1457 | |
0fd09502 | 1458 | |
0fd09502 | 1459 | |
7335613a | 1460 | void iwlagn_disable_roc(struct iwl_priv *priv) |
f0b6e2e8 | 1461 | { |
7335613a | 1462 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN]; |
f0b6e2e8 | 1463 | |
7335613a | 1464 | lockdep_assert_held(&priv->shrd->mutex); |
f0b6e2e8 | 1465 | |
7335613a WYG |
1466 | if (!priv->hw_roc_setup) |
1467 | return; | |
f0b6e2e8 | 1468 | |
7335613a WYG |
1469 | ctx->staging.dev_type = RXON_DEV_TYPE_P2P; |
1470 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
f0b6e2e8 | 1471 | |
7335613a | 1472 | priv->hw_roc_channel = NULL; |
f0b6e2e8 | 1473 | |
7335613a | 1474 | memset(ctx->staging.node_addr, 0, ETH_ALEN); |
5ed540ae | 1475 | |
7335613a | 1476 | iwlagn_commit_rxon(priv, ctx); |
f0b6e2e8 | 1477 | |
7335613a WYG |
1478 | ctx->is_active = false; |
1479 | priv->hw_roc_setup = false; | |
f0b6e2e8 RC |
1480 | } |
1481 | ||
7335613a | 1482 | static void iwlagn_disable_roc_work(struct work_struct *work) |
b481de9c | 1483 | { |
7335613a WYG |
1484 | struct iwl_priv *priv = container_of(work, struct iwl_priv, |
1485 | hw_roc_disable_work.work); | |
b481de9c | 1486 | |
6ac2f839 | 1487 | mutex_lock(&priv->shrd->mutex); |
7335613a | 1488 | iwlagn_disable_roc(priv); |
6ac2f839 | 1489 | mutex_unlock(&priv->shrd->mutex); |
b481de9c ZY |
1490 | } |
1491 | ||
7335613a WYG |
1492 | /***************************************************************************** |
1493 | * | |
1494 | * driver setup and teardown | |
1495 | * | |
1496 | *****************************************************************************/ | |
1497 | ||
1498 | static void iwl_setup_deferred_work(struct iwl_priv *priv) | |
b481de9c | 1499 | { |
7335613a | 1500 | priv->shrd->workqueue = create_singlethread_workqueue(DRV_NAME); |
b481de9c | 1501 | |
7335613a | 1502 | init_waitqueue_head(&priv->shrd->wait_command_queue); |
948c171c | 1503 | |
7335613a WYG |
1504 | INIT_WORK(&priv->restart, iwl_bg_restart); |
1505 | INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); | |
1506 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); | |
1507 | INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush); | |
1508 | INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency); | |
1509 | INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config); | |
1510 | INIT_DELAYED_WORK(&priv->hw_roc_disable_work, | |
1511 | iwlagn_disable_roc_work); | |
e655b9f0 | 1512 | |
7335613a | 1513 | iwl_setup_scan_deferred_work(priv); |
5a66926a | 1514 | |
7335613a WYG |
1515 | if (priv->cfg->lib->bt_setup_deferred_work) |
1516 | priv->cfg->lib->bt_setup_deferred_work(priv); | |
5a66926a | 1517 | |
7335613a WYG |
1518 | init_timer(&priv->statistics_periodic); |
1519 | priv->statistics_periodic.data = (unsigned long)priv; | |
1520 | priv->statistics_periodic.function = iwl_bg_statistics_periodic; | |
6cd0b1cb | 1521 | |
7335613a WYG |
1522 | init_timer(&priv->ucode_trace); |
1523 | priv->ucode_trace.data = (unsigned long)priv; | |
1524 | priv->ucode_trace.function = iwl_bg_ucode_trace; | |
948c171c | 1525 | |
7335613a WYG |
1526 | init_timer(&priv->watchdog); |
1527 | priv->watchdog.data = (unsigned long)priv; | |
1528 | priv->watchdog.function = iwl_bg_watchdog; | |
b481de9c ZY |
1529 | } |
1530 | ||
7335613a | 1531 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
c8ac61cf | 1532 | { |
7335613a WYG |
1533 | if (priv->cfg->lib->cancel_deferred_work) |
1534 | priv->cfg->lib->cancel_deferred_work(priv); | |
c8ac61cf | 1535 | |
7335613a WYG |
1536 | cancel_work_sync(&priv->run_time_calib_work); |
1537 | cancel_work_sync(&priv->beacon_update); | |
c8ac61cf | 1538 | |
7335613a | 1539 | iwl_cancel_scan_deferred_work(priv); |
c8ac61cf | 1540 | |
7335613a WYG |
1541 | cancel_work_sync(&priv->bt_full_concurrency); |
1542 | cancel_work_sync(&priv->bt_runtime_config); | |
1543 | cancel_delayed_work_sync(&priv->hw_roc_disable_work); | |
c8ac61cf | 1544 | |
7335613a WYG |
1545 | del_timer_sync(&priv->statistics_periodic); |
1546 | del_timer_sync(&priv->ucode_trace); | |
1547 | } | |
c8ac61cf | 1548 | |
7335613a WYG |
1549 | static void iwl_init_hw_rates(struct iwl_priv *priv, |
1550 | struct ieee80211_rate *rates) | |
1551 | { | |
1552 | int i; | |
c8ac61cf | 1553 | |
7335613a WYG |
1554 | for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) { |
1555 | rates[i].bitrate = iwl_rates[i].ieee * 5; | |
1556 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | |
1557 | rates[i].hw_value_short = i; | |
1558 | rates[i].flags = 0; | |
1559 | if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) { | |
1560 | /* | |
1561 | * If CCK != 1M then set short preamble rate flag. | |
1562 | */ | |
1563 | rates[i].flags |= | |
1564 | (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ? | |
1565 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | |
1566 | } | |
c8ac61cf | 1567 | } |
c8ac61cf JB |
1568 | } |
1569 | ||
7335613a | 1570 | static int iwl_init_drv(struct iwl_priv *priv) |
c8ac61cf | 1571 | { |
7335613a | 1572 | int ret; |
c8ac61cf | 1573 | |
7335613a | 1574 | spin_lock_init(&priv->shrd->sta_lock); |
c8ac61cf | 1575 | |
7335613a | 1576 | mutex_init(&priv->shrd->mutex); |
c8ac61cf | 1577 | |
80e83da7 JB |
1578 | INIT_LIST_HEAD(&priv->calib_results); |
1579 | ||
7335613a WYG |
1580 | priv->ieee_channels = NULL; |
1581 | priv->ieee_rates = NULL; | |
1582 | priv->band = IEEE80211_BAND_2GHZ; | |
c8ac61cf | 1583 | |
7335613a WYG |
1584 | priv->iw_mode = NL80211_IFTYPE_STATION; |
1585 | priv->current_ht_config.smps = IEEE80211_SMPS_STATIC; | |
1586 | priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF; | |
1587 | priv->agg_tids_count = 0; | |
c8ac61cf | 1588 | |
7335613a WYG |
1589 | /* initialize force reset */ |
1590 | priv->force_reset[IWL_RF_RESET].reset_duration = | |
1591 | IWL_DELAY_NEXT_FORCE_RF_RESET; | |
1592 | priv->force_reset[IWL_FW_RESET].reset_duration = | |
1593 | IWL_DELAY_NEXT_FORCE_FW_RELOAD; | |
c8ac61cf | 1594 | |
7335613a | 1595 | priv->rx_statistics_jiffies = jiffies; |
c8ac61cf | 1596 | |
7335613a WYG |
1597 | /* Choose which receivers/antennas to use */ |
1598 | iwlagn_set_rxon_chain(priv, &priv->contexts[IWL_RXON_CTX_BSS]); | |
c8ac61cf | 1599 | |
7335613a | 1600 | iwl_init_scan_params(priv); |
c8ac61cf | 1601 | |
7335613a WYG |
1602 | /* init bt coex */ |
1603 | if (priv->cfg->bt_params && | |
1604 | priv->cfg->bt_params->advanced_bt_coexist) { | |
1605 | priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT; | |
1606 | priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT; | |
1607 | priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK; | |
1608 | priv->bt_on_thresh = BT_ON_THRESHOLD_DEF; | |
1609 | priv->bt_duration = BT_DURATION_LIMIT_DEF; | |
1610 | priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; | |
1611 | } | |
c8ac61cf | 1612 | |
7335613a | 1613 | ret = iwl_init_channel_map(priv); |
c8ac61cf | 1614 | if (ret) { |
7335613a WYG |
1615 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); |
1616 | goto err; | |
c8ac61cf JB |
1617 | } |
1618 | ||
7335613a WYG |
1619 | ret = iwl_init_geos(priv); |
1620 | if (ret) { | |
1621 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); | |
1622 | goto err_free_channel_map; | |
1623 | } | |
1624 | iwl_init_hw_rates(priv, priv->ieee_rates); | |
c8ac61cf | 1625 | |
7335613a | 1626 | return 0; |
c8ac61cf | 1627 | |
7335613a WYG |
1628 | err_free_channel_map: |
1629 | iwl_free_channel_map(priv); | |
1630 | err: | |
1631 | return ret; | |
1632 | } | |
c8ac61cf | 1633 | |
7335613a WYG |
1634 | static void iwl_uninit_drv(struct iwl_priv *priv) |
1635 | { | |
1636 | iwl_calib_free_results(priv); | |
1637 | iwl_free_geos(priv); | |
1638 | iwl_free_channel_map(priv); | |
1639 | if (priv->tx_cmd_pool) | |
1640 | kmem_cache_destroy(priv->tx_cmd_pool); | |
1641 | kfree(priv->scan_cmd); | |
1642 | kfree(priv->beacon_cmd); | |
1643 | kfree(rcu_dereference_raw(priv->noa_data)); | |
1644 | #ifdef CONFIG_IWLWIFI_DEBUGFS | |
1645 | kfree(priv->wowlan_sram); | |
1646 | #endif | |
1647 | } | |
c8ac61cf | 1648 | |
c8ac61cf | 1649 | |
c8ac61cf | 1650 | |
7335613a WYG |
1651 | static u32 iwl_hw_detect(struct iwl_priv *priv) |
1652 | { | |
1653 | return iwl_read32(bus(priv), CSR_HW_REV); | |
1654 | } | |
c8ac61cf | 1655 | |
7335613a WYG |
1656 | /* Size of one Rx buffer in host DRAM */ |
1657 | #define IWL_RX_BUF_SIZE_4K (4 * 1024) | |
1658 | #define IWL_RX_BUF_SIZE_8K (8 * 1024) | |
dda61a44 | 1659 | |
07d4f1ad WYG |
1660 | static int iwl_set_hw_params(struct iwl_priv *priv) |
1661 | { | |
9d143e9a | 1662 | if (iwlagn_mod_params.amsdu_size_8K) |
d6189124 EG |
1663 | hw_params(priv).rx_page_order = |
1664 | get_order(IWL_RX_BUF_SIZE_8K); | |
07d4f1ad | 1665 | else |
d6189124 EG |
1666 | hw_params(priv).rx_page_order = |
1667 | get_order(IWL_RX_BUF_SIZE_4K); | |
07d4f1ad | 1668 | |
9d143e9a | 1669 | if (iwlagn_mod_params.disable_11n) |
88950758 | 1670 | priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE; |
07d4f1ad | 1671 | |
fd656935 EG |
1672 | hw_params(priv).num_ampdu_queues = |
1673 | priv->cfg->base_params->num_of_ampdu_queues; | |
1674 | hw_params(priv).shadow_reg_enable = | |
1675 | priv->cfg->base_params->shadow_reg_enable; | |
f22be624 EG |
1676 | hw_params(priv).sku = priv->cfg->sku; |
1677 | hw_params(priv).wd_timeout = priv->cfg->base_params->wd_timeout; | |
fd656935 | 1678 | |
07d4f1ad | 1679 | /* Device-specific setup */ |
90c300cb | 1680 | return priv->cfg->lib->set_hw_params(priv); |
07d4f1ad WYG |
1681 | } |
1682 | ||
119ea186 | 1683 | |
119ea186 | 1684 | |
ebfa867d WYG |
1685 | static void iwl_debug_config(struct iwl_priv *priv) |
1686 | { | |
1687 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEBUG " | |
1688 | #ifdef CONFIG_IWLWIFI_DEBUG | |
1689 | "enabled\n"); | |
1690 | #else | |
1691 | "disabled\n"); | |
1692 | #endif | |
1693 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEBUGFS " | |
1694 | #ifdef CONFIG_IWLWIFI_DEBUGFS | |
1695 | "enabled\n"); | |
1696 | #else | |
1697 | "disabled\n"); | |
1698 | #endif | |
1699 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TRACING " | |
1700 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING | |
1701 | "enabled\n"); | |
1702 | #else | |
1703 | "disabled\n"); | |
1704 | #endif | |
1705 | ||
1706 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEVICE_SVTOOL " | |
1707 | #ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL | |
1708 | "enabled\n"); | |
1709 | #else | |
1710 | "disabled\n"); | |
1711 | #endif | |
1712 | } | |
1713 | ||
e6bb4c9c EG |
1714 | int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops, |
1715 | struct iwl_cfg *cfg) | |
b2ea345e WYG |
1716 | { |
1717 | int err = 0; | |
1718 | struct iwl_priv *priv; | |
1719 | struct ieee80211_hw *hw; | |
084dd791 | 1720 | u16 num_mac; |
b2ea345e WYG |
1721 | u32 hw_rev; |
1722 | ||
1723 | /************************ | |
1724 | * 1. Allocating HW data | |
1725 | ************************/ | |
fa06ec79 | 1726 | hw = iwl_alloc_all(); |
b2ea345e | 1727 | if (!hw) { |
fa06ec79 | 1728 | pr_err("%s: Cannot allocate network device\n", cfg->name); |
b2ea345e | 1729 | err = -ENOMEM; |
807caf26 EG |
1730 | goto out; |
1731 | } | |
1732 | ||
b2ea345e | 1733 | priv = hw->priv; |
cac988a6 | 1734 | priv->shrd = &priv->_shrd; |
18d0077f | 1735 | bus->shrd = priv->shrd; |
cac988a6 EG |
1736 | priv->shrd->bus = bus; |
1737 | priv->shrd->priv = priv; | |
a48709c5 | 1738 | |
e6bb4c9c EG |
1739 | priv->shrd->trans = trans_ops->alloc(priv->shrd); |
1740 | if (priv->shrd->trans == NULL) { | |
1741 | err = -ENOMEM; | |
1742 | goto out_free_traffic_mem; | |
1743 | } | |
1744 | ||
b2ea345e | 1745 | /* At this point both hw and priv are allocated. */ |
8f2d3d2a | 1746 | |
26bfc0cf | 1747 | SET_IEEE80211_DEV(hw, bus(priv)->dev); |
b481de9c | 1748 | |
ebfa867d WYG |
1749 | /* what debugging capabilities we have */ |
1750 | iwl_debug_config(priv); | |
1751 | ||
e1623446 | 1752 | IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); |
82b9a121 | 1753 | priv->cfg = cfg; |
316c30d9 | 1754 | |
bee008b7 WYG |
1755 | /* is antenna coupling more than 35dB ? */ |
1756 | priv->bt_ant_couple_ok = | |
48f20d35 EG |
1757 | (iwlagn_mod_params.ant_coupling > |
1758 | IWL_BT_ANTENNA_COUPLING_THRESHOLD) ? | |
1759 | true : false; | |
bee008b7 | 1760 | |
9f28ebc3 | 1761 | /* enable/disable bt channel inhibition */ |
48f20d35 | 1762 | priv->bt_ch_announce = iwlagn_mod_params.bt_ch_announce; |
9f28ebc3 WYG |
1763 | IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n", |
1764 | (priv->bt_ch_announce) ? "On" : "Off"); | |
f37837c9 | 1765 | |
20594eb0 WYG |
1766 | if (iwl_alloc_traffic_mem(priv)) |
1767 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); | |
b481de9c | 1768 | |
731a29b7 | 1769 | /* these spin locks will be used in apm_ops.init and EEPROM access |
a8b50a0a MA |
1770 | * we should init now |
1771 | */ | |
83ed9015 | 1772 | spin_lock_init(&bus(priv)->reg_lock); |
10b15e6f | 1773 | spin_lock_init(&priv->shrd->lock); |
4843b5a7 RC |
1774 | |
1775 | /* | |
1776 | * stop and reset the on-board processor just in case it is in a | |
1777 | * strange state ... like being left stranded by a primary kernel | |
1778 | * and this is now the kdump kernel trying to start up | |
1779 | */ | |
83ed9015 | 1780 | iwl_write32(bus(priv), CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
4843b5a7 | 1781 | |
084dd791 EG |
1782 | /*********************** |
1783 | * 3. Read REV register | |
1784 | ***********************/ | |
e98a1302 | 1785 | hw_rev = iwl_hw_detect(priv); |
c11362c0 | 1786 | IWL_INFO(priv, "Detected %s, REV=0x%X\n", |
e98a1302 | 1787 | priv->cfg->name, hw_rev); |
316c30d9 | 1788 | |
e6bb4c9c | 1789 | err = iwl_trans_request_irq(trans(priv)); |
1e89cbac | 1790 | if (err) |
e6bb4c9c | 1791 | goto out_free_trans; |
1e89cbac | 1792 | |
e6bb4c9c | 1793 | if (iwl_trans_prepare_card_hw(trans(priv))) { |
bcd4fe2f | 1794 | err = -EIO; |
086ed117 | 1795 | IWL_WARN(priv, "Failed, HW not ready\n"); |
1e89cbac | 1796 | goto out_free_trans; |
086ed117 MA |
1797 | } |
1798 | ||
91238714 TW |
1799 | /***************** |
1800 | * 4. Read EEPROM | |
1801 | *****************/ | |
316c30d9 | 1802 | /* Read the EEPROM */ |
e98a1302 | 1803 | err = iwl_eeprom_init(priv, hw_rev); |
316c30d9 | 1804 | if (err) { |
15b1687c | 1805 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
1e89cbac | 1806 | goto out_free_trans; |
316c30d9 | 1807 | } |
8614f360 TW |
1808 | err = iwl_eeprom_check_version(priv); |
1809 | if (err) | |
c8f16138 | 1810 | goto out_free_eeprom; |
8614f360 | 1811 | |
21a5b3c6 WYG |
1812 | err = iwl_eeprom_check_sku(priv); |
1813 | if (err) | |
1814 | goto out_free_eeprom; | |
1815 | ||
02883017 | 1816 | /* extract MAC Address */ |
c6fa17ed WYG |
1817 | iwl_eeprom_get_mac(priv, priv->addresses[0].addr); |
1818 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); | |
1819 | priv->hw->wiphy->addresses = priv->addresses; | |
1820 | priv->hw->wiphy->n_addresses = 1; | |
1821 | num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS); | |
1822 | if (num_mac > 1) { | |
1823 | memcpy(priv->addresses[1].addr, priv->addresses[0].addr, | |
1824 | ETH_ALEN); | |
1825 | priv->addresses[1].addr[5]++; | |
1826 | priv->hw->wiphy->n_addresses++; | |
1827 | } | |
316c30d9 AK |
1828 | |
1829 | /************************ | |
1830 | * 5. Setup HW constants | |
1831 | ************************/ | |
da154e30 | 1832 | if (iwl_set_hw_params(priv)) { |
084dd791 | 1833 | err = -ENOENT; |
15b1687c | 1834 | IWL_ERR(priv, "failed to set hw parameters\n"); |
073d3f5f | 1835 | goto out_free_eeprom; |
316c30d9 AK |
1836 | } |
1837 | ||
1838 | /******************* | |
6ba87956 | 1839 | * 6. Setup priv |
316c30d9 | 1840 | *******************/ |
b481de9c | 1841 | |
6ba87956 | 1842 | err = iwl_init_drv(priv); |
bf85ea4f | 1843 | if (err) |
399f4900 | 1844 | goto out_free_eeprom; |
bf85ea4f | 1845 | /* At this point both hw and priv are initialized. */ |
316c30d9 | 1846 | |
316c30d9 | 1847 | /******************** |
09f9bf79 | 1848 | * 7. Setup services |
316c30d9 | 1849 | ********************/ |
4e39317d | 1850 | iwl_setup_deferred_work(priv); |
653fa4a0 | 1851 | iwl_setup_rx_handlers(priv); |
4613e72d | 1852 | iwl_testmode_init(priv); |
316c30d9 | 1853 | |
158bea07 | 1854 | /********************************************* |
084dd791 | 1855 | * 8. Enable interrupts |
158bea07 | 1856 | *********************************************/ |
6ba87956 | 1857 | |
554d1d02 | 1858 | iwl_enable_rfkill_int(priv); |
6cd0b1cb | 1859 | |
6cd0b1cb | 1860 | /* If platform's RF_KILL switch is NOT set to KILL */ |
83ed9015 EG |
1861 | if (iwl_read32(bus(priv), |
1862 | CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | |
63013ae3 | 1863 | clear_bit(STATUS_RF_KILL_HW, &priv->shrd->status); |
6cd0b1cb | 1864 | else |
63013ae3 | 1865 | set_bit(STATUS_RF_KILL_HW, &priv->shrd->status); |
6ba87956 | 1866 | |
a60e77e5 | 1867 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, |
63013ae3 | 1868 | test_bit(STATUS_RF_KILL_HW, &priv->shrd->status)); |
6cd0b1cb | 1869 | |
58d0f361 | 1870 | iwl_power_initialize(priv); |
39b73fb1 | 1871 | iwl_tt_initialize(priv); |
158bea07 | 1872 | |
898ed67b | 1873 | init_completion(&priv->firmware_loading_complete); |
562db532 | 1874 | |
b08dfd04 | 1875 | err = iwl_request_firmware(priv, true); |
158bea07 | 1876 | if (err) |
7d47618a | 1877 | goto out_destroy_workqueue; |
158bea07 | 1878 | |
b481de9c ZY |
1879 | return 0; |
1880 | ||
34c1b7ba | 1881 | out_destroy_workqueue: |
74e28e44 EG |
1882 | destroy_workqueue(priv->shrd->workqueue); |
1883 | priv->shrd->workqueue = NULL; | |
6ba87956 | 1884 | iwl_uninit_drv(priv); |
34c1b7ba | 1885 | out_free_eeprom: |
073d3f5f | 1886 | iwl_eeprom_free(priv); |
1e89cbac | 1887 | out_free_trans: |
e6bb4c9c | 1888 | iwl_trans_free(trans(priv)); |
34c1b7ba | 1889 | out_free_traffic_mem: |
20594eb0 | 1890 | iwl_free_traffic_mem(priv); |
d7c76f4c | 1891 | ieee80211_free_hw(priv->hw); |
34c1b7ba | 1892 | out: |
b481de9c ZY |
1893 | return err; |
1894 | } | |
1895 | ||
a48709c5 | 1896 | void __devexit iwl_remove(struct iwl_priv * priv) |
b481de9c | 1897 | { |
898ed67b | 1898 | wait_for_completion(&priv->firmware_loading_complete); |
562db532 | 1899 | |
e1623446 | 1900 | IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); |
b481de9c | 1901 | |
67249625 | 1902 | iwl_dbgfs_unregister(priv); |
67249625 | 1903 | |
ade4c649 | 1904 | /* ieee80211_unregister_hw call wil cause iwlagn_mac_stop to |
5b9f8cd3 | 1905 | * to be called and iwl_down since we are removing the device |
0b124c31 GG |
1906 | * we need to set STATUS_EXIT_PENDING bit. |
1907 | */ | |
63013ae3 | 1908 | set_bit(STATUS_EXIT_PENDING, &priv->shrd->status); |
5ed540ae | 1909 | |
7a4e5281 | 1910 | iwl_testmode_cleanup(priv); |
5ed540ae WYG |
1911 | iwl_leds_exit(priv); |
1912 | ||
859cfb0a | 1913 | if (priv->mac80211_registered) { |
c4f55232 | 1914 | ieee80211_unregister_hw(priv->hw); |
859cfb0a | 1915 | priv->mac80211_registered = 0; |
c4f55232 RR |
1916 | } |
1917 | ||
39b73fb1 WYG |
1918 | iwl_tt_exit(priv); |
1919 | ||
ae2c30bf EG |
1920 | /*This will stop the queues, move the device to low power state */ |
1921 | iwl_trans_stop_device(trans(priv)); | |
0359facc | 1922 | |
de7f5f92 | 1923 | iwl_dealloc_ucode(trans(priv)); |
b481de9c | 1924 | |
073d3f5f | 1925 | iwl_eeprom_free(priv); |
b481de9c | 1926 | |
948c171c | 1927 | /*netif_stop_queue(dev); */ |
74e28e44 | 1928 | flush_workqueue(priv->shrd->workqueue); |
948c171c | 1929 | |
ade4c649 | 1930 | /* ieee80211_unregister_hw calls iwlagn_mac_stop, which flushes |
74e28e44 | 1931 | * priv->shrd->workqueue... so we can't take down the workqueue |
b481de9c | 1932 | * until now... */ |
74e28e44 EG |
1933 | destroy_workqueue(priv->shrd->workqueue); |
1934 | priv->shrd->workqueue = NULL; | |
20594eb0 | 1935 | iwl_free_traffic_mem(priv); |
b481de9c | 1936 | |
e6bb4c9c | 1937 | iwl_trans_free(trans(priv)); |
34c1b7ba | 1938 | |
6ba87956 | 1939 | iwl_uninit_drv(priv); |
b481de9c | 1940 | |
77834543 | 1941 | dev_kfree_skb(priv->beacon_skb); |
b481de9c ZY |
1942 | |
1943 | ieee80211_free_hw(priv->hw); | |
1944 | } | |
1945 | ||
b481de9c ZY |
1946 | |
1947 | /***************************************************************************** | |
1948 | * | |
1949 | * driver and module entry point | |
1950 | * | |
1951 | *****************************************************************************/ | |
5b9f8cd3 | 1952 | static int __init iwl_init(void) |
b481de9c ZY |
1953 | { |
1954 | ||
1955 | int ret; | |
c96c31e4 JP |
1956 | pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); |
1957 | pr_info(DRV_COPYRIGHT "\n"); | |
897e1cf2 | 1958 | |
e227ceac | 1959 | ret = iwlagn_rate_control_register(); |
897e1cf2 | 1960 | if (ret) { |
c96c31e4 | 1961 | pr_err("Unable to register rate control algorithm: %d\n", ret); |
897e1cf2 RC |
1962 | return ret; |
1963 | } | |
1964 | ||
48d1a211 | 1965 | ret = iwl_pci_register_driver(); |
b481de9c | 1966 | |
48d1a211 EG |
1967 | if (ret) |
1968 | goto error_register; | |
b481de9c | 1969 | return ret; |
897e1cf2 | 1970 | |
897e1cf2 | 1971 | error_register: |
e227ceac | 1972 | iwlagn_rate_control_unregister(); |
897e1cf2 | 1973 | return ret; |
b481de9c ZY |
1974 | } |
1975 | ||
5b9f8cd3 | 1976 | static void __exit iwl_exit(void) |
b481de9c | 1977 | { |
48d1a211 | 1978 | iwl_pci_unregister_driver(); |
e227ceac | 1979 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
1980 | } |
1981 | ||
5b9f8cd3 EG |
1982 | module_exit(iwl_exit); |
1983 | module_init(iwl_init); | |
a562a9dd RC |
1984 | |
1985 | #ifdef CONFIG_IWLWIFI_DEBUG | |
48f20d35 EG |
1986 | module_param_named(debug, iwlagn_mod_params.debug_level, uint, |
1987 | S_IRUGO | S_IWUSR); | |
a562a9dd RC |
1988 | MODULE_PARM_DESC(debug, "debug output mask"); |
1989 | #endif | |
1990 | ||
2b068618 WYG |
1991 | module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO); |
1992 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); | |
2b068618 WYG |
1993 | module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO); |
1994 | MODULE_PARM_DESC(queues_num, "number of hw queues."); | |
2b068618 WYG |
1995 | module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO); |
1996 | MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); | |
2b068618 WYG |
1997 | module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K, |
1998 | int, S_IRUGO); | |
1999 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); | |
2b068618 WYG |
2000 | module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO); |
2001 | MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); | |
dd7a2509 | 2002 | |
48f20d35 EG |
2003 | module_param_named(ucode_alternative, |
2004 | iwlagn_mod_params.wanted_ucode_alternative, | |
2005 | int, S_IRUGO); | |
dd7a2509 JB |
2006 | MODULE_PARM_DESC(ucode_alternative, |
2007 | "specify ucode alternative to use from ucode file"); | |
bee008b7 | 2008 | |
48f20d35 EG |
2009 | module_param_named(antenna_coupling, iwlagn_mod_params.ant_coupling, |
2010 | int, S_IRUGO); | |
bee008b7 WYG |
2011 | MODULE_PARM_DESC(antenna_coupling, |
2012 | "specify antenna coupling in dB (defualt: 0 dB)"); | |
f37837c9 | 2013 | |
48f20d35 EG |
2014 | module_param_named(bt_ch_inhibition, iwlagn_mod_params.bt_ch_announce, |
2015 | bool, S_IRUGO); | |
9f28ebc3 | 2016 | MODULE_PARM_DESC(bt_ch_inhibition, |
fee84f0d | 2017 | "Enable BT channel inhibition (default: enable)"); |
b7977ffa SG |
2018 | |
2019 | module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO); | |
2020 | MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])"); | |
2021 | ||
2022 | module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO); | |
2023 | MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])"); | |
b60eec9b | 2024 | |
9995ffe5 | 2025 | module_param_named(wd_disable, iwlagn_mod_params.wd_disable, int, S_IRUGO); |
300d0834 | 2026 | MODULE_PARM_DESC(wd_disable, |
9995ffe5 WYG |
2027 | "Disable stuck queue watchdog timer 0=system default, " |
2028 | "1=disable, 2=enable (default: 0)"); | |
300d0834 | 2029 | |
b60eec9b WYG |
2030 | /* |
2031 | * set bt_coex_active to true, uCode will do kill/defer | |
2032 | * every time the priority line is asserted (BT is sending signals on the | |
2033 | * priority line in the PCIx). | |
2034 | * set bt_coex_active to false, uCode will ignore the BT activity and | |
2035 | * perform the normal operation | |
2036 | * | |
2037 | * User might experience transmit issue on some platform due to WiFi/BT | |
2038 | * co-exist problem. The possible behaviors are: | |
2039 | * Able to scan and finding all the available AP | |
2040 | * Not able to associate with any AP | |
2041 | * On those platforms, WiFi communication can be restored by set | |
2042 | * "bt_coex_active" module parameter to "false" | |
2043 | * | |
2044 | * default: bt_coex_active = true (BT_COEX_ENABLE) | |
2045 | */ | |
2046 | module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active, | |
2047 | bool, S_IRUGO); | |
2048 | MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)"); | |
6b0184c4 WYG |
2049 | |
2050 | module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO); | |
2051 | MODULE_PARM_DESC(led_mode, "0=system default, " | |
2052 | "1=On(RF On)/Off(RF Off), 2=blinking (default: 0)"); | |
3f1e5f4a | 2053 | |
0172b029 WYG |
2054 | module_param_named(power_save, iwlagn_mod_params.power_save, |
2055 | bool, S_IRUGO); | |
2056 | MODULE_PARM_DESC(power_save, | |
2057 | "enable WiFi power management (default: disable)"); | |
2058 | ||
f7538168 WYG |
2059 | module_param_named(power_level, iwlagn_mod_params.power_level, |
2060 | int, S_IRUGO); | |
2061 | MODULE_PARM_DESC(power_level, | |
2062 | "default power save level (range from 1 - 5, default: 1)"); | |
2063 | ||
dd5b6d0a WYG |
2064 | module_param_named(auto_agg, iwlagn_mod_params.auto_agg, |
2065 | bool, S_IRUGO); | |
2066 | MODULE_PARM_DESC(auto_agg, | |
2067 | "enable agg w/o check traffic load (default: enable)"); | |
2068 | ||
3f1e5f4a WYG |
2069 | /* |
2070 | * For now, keep using power level 1 instead of automatically | |
2071 | * adjusting ... | |
2072 | */ | |
2073 | module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust, | |
2074 | bool, S_IRUGO); | |
2075 | MODULE_PARM_DESC(no_sleep_autoadjust, | |
2076 | "don't automatically adjust sleep level " | |
2077 | "according to maximum network latency (default: true)"); |