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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
b481de9c ZY |
32 | #include <linux/init.h> |
33 | #include <linux/pci.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/skbuff.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/wireless.h> | |
39 | #include <linux/firmware.h> | |
b481de9c ZY |
40 | #include <linux/etherdevice.h> |
41 | #include <linux/if_arp.h> | |
42 | ||
b481de9c ZY |
43 | #include <net/mac80211.h> |
44 | ||
45 | #include <asm/div64.h> | |
46 | ||
6bc913bd | 47 | #include "iwl-eeprom.h" |
3e0d4cb1 | 48 | #include "iwl-dev.h" |
fee1247a | 49 | #include "iwl-core.h" |
3395f6e9 | 50 | #include "iwl-io.h" |
b481de9c | 51 | #include "iwl-helpers.h" |
6974e363 | 52 | #include "iwl-sta.h" |
f0832f13 | 53 | #include "iwl-calib.h" |
b481de9c | 54 | |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
b481de9c ZY |
62 | /* |
63 | * module name, copyright, version, etc. | |
64 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
65 | */ | |
66 | ||
d783b061 | 67 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 68 | |
0a6857e7 | 69 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
70 | #define VD "d" |
71 | #else | |
72 | #define VD | |
73 | #endif | |
74 | ||
4fc22b21 | 75 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
76 | #define VS "s" |
77 | #else | |
78 | #define VS | |
79 | #endif | |
80 | ||
df48c323 | 81 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 82 | |
b481de9c ZY |
83 | |
84 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
85 | MODULE_VERSION(DRV_VERSION); | |
86 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
87 | MODULE_LICENSE("GPL"); | |
4fc22b21 | 88 | MODULE_ALIAS("iwl4965"); |
b481de9c | 89 | |
b481de9c | 90 | /*************** STATION TABLE MANAGEMENT **** |
9fbab516 | 91 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
92 | * the functionality provided here |
93 | */ | |
94 | ||
95 | /**************************************************************/ | |
96 | ||
b481de9c | 97 | |
b481de9c | 98 | |
deb09c43 EG |
99 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
100 | { | |
c1adf9fb | 101 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
deb09c43 EG |
102 | |
103 | if (hw_decrypt) | |
104 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
105 | else | |
106 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
107 | ||
108 | } | |
109 | ||
b481de9c | 110 | /** |
bb8c093b | 111 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
112 | * |
113 | * NOTE: This is really only useful during development and can eventually | |
114 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
115 | * making changes | |
116 | */ | |
c1adf9fb | 117 | static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon) |
b481de9c ZY |
118 | { |
119 | int error = 0; | |
120 | int counter = 1; | |
121 | ||
122 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
123 | error |= le32_to_cpu(rxon->flags & | |
124 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
125 | RXON_FLG_RADAR_DETECT_MSK)); | |
126 | if (error) | |
127 | IWL_WARNING("check 24G fields %d | %d\n", | |
128 | counter++, error); | |
129 | } else { | |
130 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
131 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
132 | if (error) | |
133 | IWL_WARNING("check 52 fields %d | %d\n", | |
134 | counter++, error); | |
135 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
136 | if (error) | |
137 | IWL_WARNING("check 52 CCK %d | %d\n", | |
138 | counter++, error); | |
139 | } | |
140 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
141 | if (error) | |
142 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
143 | ||
144 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
145 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
146 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
147 | if (error) | |
148 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
149 | ||
150 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
151 | if (error) | |
152 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
153 | ||
154 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
155 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
156 | if (error) | |
157 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
158 | counter++, error); | |
159 | ||
160 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
161 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
162 | if (error) | |
163 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
164 | counter++, error); | |
165 | ||
166 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
167 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
168 | if (error) | |
169 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
170 | counter++, error); | |
171 | ||
172 | if (error) | |
173 | IWL_WARNING("Tuning to channel %d\n", | |
174 | le16_to_cpu(rxon->channel)); | |
175 | ||
176 | if (error) { | |
bb8c093b | 177 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
178 | return -1; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /** | |
54559703 | 184 | * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 185 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 186 | * |
9fbab516 BC |
187 | * If the RXON structure is changing enough to require a new tune, |
188 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
189 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 190 | */ |
54559703 | 191 | static int iwl_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
192 | { |
193 | ||
194 | /* These items are only settable from the full RXON command */ | |
5d1e2325 | 195 | if (!(iwl_is_associated(priv)) || |
b481de9c ZY |
196 | compare_ether_addr(priv->staging_rxon.bssid_addr, |
197 | priv->active_rxon.bssid_addr) || | |
198 | compare_ether_addr(priv->staging_rxon.node_addr, | |
199 | priv->active_rxon.node_addr) || | |
200 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
201 | priv->active_rxon.wlap_bssid_addr) || | |
202 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
203 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
204 | (priv->staging_rxon.air_propagation != | |
205 | priv->active_rxon.air_propagation) || | |
206 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
207 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
208 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
209 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
b481de9c ZY |
210 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) |
211 | return 1; | |
212 | ||
213 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
214 | * be updated with the RXON_ASSOC command -- however only some | |
215 | * flag transitions are allowed using RXON_ASSOC */ | |
216 | ||
217 | /* Check if we are not switching bands */ | |
218 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
219 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
220 | return 1; | |
221 | ||
222 | /* Check if we are switching association toggle */ | |
223 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
224 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
225 | return 1; | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
b481de9c | 230 | /** |
bb8c093b | 231 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 232 | * |
01ebd063 | 233 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
234 | * the active_rxon structure is updated with the new data. This |
235 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
236 | * a HW tune is required based on the RXON structure changes. | |
237 | */ | |
c79dd5b5 | 238 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
239 | { |
240 | /* cast away the const for active_rxon in this function */ | |
c1adf9fb | 241 | struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
43d59b32 EG |
242 | int ret; |
243 | bool new_assoc = | |
244 | !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK); | |
b481de9c | 245 | |
fee1247a | 246 | if (!iwl_is_alive(priv)) |
43d59b32 | 247 | return -EBUSY; |
b481de9c ZY |
248 | |
249 | /* always get timestamp with Rx frame */ | |
250 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
a326a5d0 EG |
251 | /* allow CTS-to-self if possible. this is relevant only for |
252 | * 5000, but will not damage 4965 */ | |
253 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | |
b481de9c | 254 | |
43d59b32 EG |
255 | ret = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
256 | if (ret) { | |
b481de9c ZY |
257 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); |
258 | return -EINVAL; | |
259 | } | |
260 | ||
261 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 262 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 263 | * and other flags for the current radio configuration. */ |
54559703 | 264 | if (!iwl_full_rxon_required(priv)) { |
43d59b32 EG |
265 | ret = iwl_send_rxon_assoc(priv); |
266 | if (ret) { | |
267 | IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret); | |
268 | return ret; | |
b481de9c ZY |
269 | } |
270 | ||
271 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
272 | return 0; |
273 | } | |
274 | ||
275 | /* station table will be cleared */ | |
276 | priv->assoc_station_added = 0; | |
277 | ||
b481de9c ZY |
278 | /* If we are currently associated and the new config requires |
279 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
280 | * we must clear the associated from the active configuration | |
281 | * before we apply the new config */ | |
43d59b32 | 282 | if (iwl_is_associated(priv) && new_assoc) { |
b481de9c ZY |
283 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); |
284 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
285 | ||
43d59b32 | 286 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, |
c1adf9fb | 287 | sizeof(struct iwl_rxon_cmd), |
b481de9c ZY |
288 | &priv->active_rxon); |
289 | ||
290 | /* If the mask clearing failed then we set | |
291 | * active_rxon back to what it was previously */ | |
43d59b32 | 292 | if (ret) { |
b481de9c | 293 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
43d59b32 EG |
294 | IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret); |
295 | return ret; | |
b481de9c | 296 | } |
b481de9c ZY |
297 | } |
298 | ||
299 | IWL_DEBUG_INFO("Sending RXON\n" | |
300 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
301 | "* channel = %d\n" | |
e174961c | 302 | "* bssid = %pM\n", |
43d59b32 | 303 | (new_assoc ? "" : "out"), |
b481de9c | 304 | le16_to_cpu(priv->staging_rxon.channel), |
e174961c | 305 | priv->staging_rxon.bssid_addr); |
b481de9c | 306 | |
099b40b7 | 307 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
43d59b32 EG |
308 | |
309 | /* Apply the new configuration | |
310 | * RXON unassoc clears the station table in uCode, send it before | |
311 | * we add the bcast station. If assoc bit is set, we will send RXON | |
312 | * after having added the bcast and bssid station. | |
313 | */ | |
314 | if (!new_assoc) { | |
315 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
c1adf9fb | 316 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); |
43d59b32 EG |
317 | if (ret) { |
318 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
319 | return ret; | |
320 | } | |
321 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
322 | } |
323 | ||
37deb2a0 | 324 | iwl_clear_stations_table(priv); |
556f8db7 | 325 | |
b481de9c ZY |
326 | if (!priv->error_recovering) |
327 | priv->start_calib = 0; | |
328 | ||
b481de9c | 329 | /* Add the broadcast address so we can send broadcast frames */ |
4f40e4d9 | 330 | if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == |
43d59b32 | 331 | IWL_INVALID_STATION) { |
b481de9c ZY |
332 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); |
333 | return -EIO; | |
334 | } | |
335 | ||
336 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
337 | * add the IWL_AP_ID to the station rate table */ | |
9185159d | 338 | if (new_assoc) { |
05c914fe | 339 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
9185159d TW |
340 | ret = iwl_rxon_add_station(priv, |
341 | priv->active_rxon.bssid_addr, 1); | |
342 | if (ret == IWL_INVALID_STATION) { | |
343 | IWL_ERROR("Error adding AP address for TX.\n"); | |
344 | return -EIO; | |
345 | } | |
346 | priv->assoc_station_added = 1; | |
347 | if (priv->default_wep_key && | |
348 | iwl_send_static_wepkey_cmd(priv, 0)) | |
349 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c | 350 | } |
43d59b32 EG |
351 | |
352 | /* Apply the new configuration | |
353 | * RXON assoc doesn't clear the station table in uCode, | |
354 | */ | |
355 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON, | |
356 | sizeof(struct iwl_rxon_cmd), &priv->staging_rxon); | |
357 | if (ret) { | |
358 | IWL_ERROR("Error setting new RXON (%d)\n", ret); | |
359 | return ret; | |
360 | } | |
361 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
b481de9c ZY |
362 | } |
363 | ||
36da7d70 ZY |
364 | iwl_init_sensitivity(priv); |
365 | ||
366 | /* If we issue a new RXON command which required a tune then we must | |
367 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
368 | ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true); | |
369 | if (ret) { | |
370 | IWL_ERROR("Error sending TX power (%d)\n", ret); | |
371 | return ret; | |
372 | } | |
373 | ||
b481de9c ZY |
374 | return 0; |
375 | } | |
376 | ||
5da4b55f MA |
377 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
378 | { | |
379 | ||
c7de35cd | 380 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
381 | iwl4965_commit_rxon(priv); |
382 | } | |
383 | ||
c79dd5b5 | 384 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 385 | { |
bb8c093b | 386 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
387 | .flags = 3, |
388 | .lead_time = 0xAA, | |
389 | .max_kill = 1, | |
390 | .kill_ack_mask = 0, | |
391 | .kill_cts_mask = 0, | |
392 | }; | |
393 | ||
857485c0 | 394 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 395 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
396 | } |
397 | ||
fcab423d | 398 | static void iwl_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
399 | { |
400 | struct list_head *element; | |
401 | ||
402 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
403 | priv->frames_count); | |
404 | ||
405 | while (!list_empty(&priv->free_frames)) { | |
406 | element = priv->free_frames.next; | |
407 | list_del(element); | |
fcab423d | 408 | kfree(list_entry(element, struct iwl_frame, list)); |
b481de9c ZY |
409 | priv->frames_count--; |
410 | } | |
411 | ||
412 | if (priv->frames_count) { | |
413 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
414 | priv->frames_count); | |
415 | priv->frames_count = 0; | |
416 | } | |
417 | } | |
418 | ||
fcab423d | 419 | static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv) |
b481de9c | 420 | { |
fcab423d | 421 | struct iwl_frame *frame; |
b481de9c ZY |
422 | struct list_head *element; |
423 | if (list_empty(&priv->free_frames)) { | |
424 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
425 | if (!frame) { | |
426 | IWL_ERROR("Could not allocate frame!\n"); | |
427 | return NULL; | |
428 | } | |
429 | ||
430 | priv->frames_count++; | |
431 | return frame; | |
432 | } | |
433 | ||
434 | element = priv->free_frames.next; | |
435 | list_del(element); | |
fcab423d | 436 | return list_entry(element, struct iwl_frame, list); |
b481de9c ZY |
437 | } |
438 | ||
fcab423d | 439 | static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) |
b481de9c ZY |
440 | { |
441 | memset(frame, 0, sizeof(*frame)); | |
442 | list_add(&frame->list, &priv->free_frames); | |
443 | } | |
444 | ||
4bf64efd TW |
445 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
446 | struct ieee80211_hdr *hdr, | |
447 | const u8 *dest, int left) | |
b481de9c | 448 | { |
3109ece1 | 449 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
05c914fe JB |
450 | ((priv->iw_mode != NL80211_IFTYPE_ADHOC) && |
451 | (priv->iw_mode != NL80211_IFTYPE_AP))) | |
b481de9c ZY |
452 | return 0; |
453 | ||
454 | if (priv->ibss_beacon->len > left) | |
455 | return 0; | |
456 | ||
457 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
458 | ||
459 | return priv->ibss_beacon->len; | |
460 | } | |
461 | ||
39e88504 | 462 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 463 | { |
39e88504 GC |
464 | int i; |
465 | int rate_mask; | |
466 | ||
467 | /* Set rate mask*/ | |
468 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
469 | rate_mask = priv->active_rate_basic & 0xF; | |
470 | else | |
471 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 472 | |
39e88504 | 473 | /* Find lowest valid rate */ |
b481de9c | 474 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
1826dcc0 | 475 | i = iwl_rates[i].next_ieee) { |
b481de9c | 476 | if (rate_mask & (1 << i)) |
1826dcc0 | 477 | return iwl_rates[i].plcp; |
b481de9c ZY |
478 | } |
479 | ||
39e88504 GC |
480 | /* No valid rate was found. Assign the lowest one */ |
481 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
482 | return IWL_RATE_1M_PLCP; | |
483 | else | |
484 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
485 | } |
486 | ||
a33c2f47 | 487 | static unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, |
4bf64efd TW |
488 | struct iwl_frame *frame, u8 rate) |
489 | { | |
490 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
491 | unsigned int frame_size; | |
492 | ||
493 | tx_beacon_cmd = &frame->u.beacon; | |
494 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | |
495 | ||
496 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | |
497 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
498 | ||
499 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | |
500 | iwl_bcast_addr, | |
501 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | |
502 | ||
503 | BUG_ON(frame_size > MAX_MPDU_SIZE); | |
504 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | |
505 | ||
506 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | |
507 | tx_beacon_cmd->tx.rate_n_flags = | |
508 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | |
509 | else | |
510 | tx_beacon_cmd->tx.rate_n_flags = | |
511 | iwl_hw_set_rate_n_flags(rate, 0); | |
512 | ||
513 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
514 | TX_CMD_FLG_TSF_MSK | | |
515 | TX_CMD_FLG_STA_RATE_MSK; | |
516 | ||
517 | return sizeof(*tx_beacon_cmd) + frame_size; | |
518 | } | |
c79dd5b5 | 519 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 520 | { |
fcab423d | 521 | struct iwl_frame *frame; |
b481de9c ZY |
522 | unsigned int frame_size; |
523 | int rc; | |
524 | u8 rate; | |
525 | ||
fcab423d | 526 | frame = iwl_get_free_frame(priv); |
b481de9c ZY |
527 | |
528 | if (!frame) { | |
529 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
530 | "command.\n"); | |
531 | return -ENOMEM; | |
532 | } | |
533 | ||
39e88504 | 534 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 535 | |
bb8c093b | 536 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 537 | |
857485c0 | 538 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
539 | &frame->u.cmd[0]); |
540 | ||
fcab423d | 541 | iwl_free_frame(priv, frame); |
b481de9c ZY |
542 | |
543 | return rc; | |
544 | } | |
545 | ||
b481de9c ZY |
546 | /****************************************************************************** |
547 | * | |
548 | * Misc. internal state and helper functions | |
549 | * | |
550 | ******************************************************************************/ | |
b481de9c | 551 | |
d1141dfb EG |
552 | static void iwl4965_ht_conf(struct iwl_priv *priv, |
553 | struct ieee80211_bss_conf *bss_conf) | |
554 | { | |
555 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
556 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
557 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
558 | ||
559 | IWL_DEBUG_MAC80211("enter: \n"); | |
560 | ||
561 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
562 | ||
563 | if (!iwl_conf->is_ht) | |
564 | return; | |
565 | ||
d1141dfb | 566 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) |
a9841013 | 567 | iwl_conf->sgf |= HT_SHORT_GI_20MHZ; |
d1141dfb | 568 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) |
a9841013 | 569 | iwl_conf->sgf |= HT_SHORT_GI_40MHZ; |
d1141dfb EG |
570 | |
571 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
572 | iwl_conf->max_amsdu_size = | |
573 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
574 | ||
575 | iwl_conf->supported_chan_width = | |
576 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
577 | iwl_conf->extension_chan_offset = | |
578 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
579 | /* If no above or below channel supplied disable FAT channel */ | |
963f5517 EG |
580 | if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE && |
581 | iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) { | |
582 | iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE; | |
d1141dfb | 583 | iwl_conf->supported_chan_width = 0; |
963f5517 | 584 | } |
d1141dfb | 585 | |
12837be1 RR |
586 | iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2); |
587 | ||
d1141dfb EG |
588 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); |
589 | ||
590 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
591 | iwl_conf->tx_chan_width = | |
592 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
593 | iwl_conf->ht_protection = | |
594 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
595 | iwl_conf->non_GF_STA_present = | |
596 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
597 | ||
598 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
599 | IWL_DEBUG_MAC80211("leave\n"); | |
600 | } | |
601 | ||
b481de9c ZY |
602 | /* |
603 | * QoS support | |
604 | */ | |
1ff50bda | 605 | static void iwl_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c | 606 | { |
b481de9c ZY |
607 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
608 | return; | |
609 | ||
610 | if (!priv->qos_data.qos_enable) | |
611 | return; | |
612 | ||
b481de9c ZY |
613 | priv->qos_data.def_qos_parm.qos_flags = 0; |
614 | ||
615 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
616 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
617 | priv->qos_data.def_qos_parm.qos_flags |= | |
618 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
619 | if (priv->qos_data.qos_active) |
620 | priv->qos_data.def_qos_parm.qos_flags |= | |
621 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
622 | ||
fd105e79 | 623 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 624 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
f1f1f5c7 | 625 | |
3109ece1 | 626 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
627 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
628 | priv->qos_data.qos_active, | |
629 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 630 | |
1ff50bda EG |
631 | iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM, |
632 | sizeof(struct iwl_qosparam_cmd), | |
633 | &priv->qos_data.def_qos_parm, NULL); | |
b481de9c ZY |
634 | } |
635 | } | |
636 | ||
b481de9c | 637 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
b481de9c | 638 | |
bb8c093b | 639 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
640 | { |
641 | u16 new_val = 0; | |
642 | u16 beacon_factor = 0; | |
643 | ||
644 | beacon_factor = | |
645 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
646 | / MAX_UCODE_BEACON_INTERVAL; | |
647 | new_val = beacon_val / beacon_factor; | |
648 | ||
649 | return cpu_to_le16(new_val); | |
650 | } | |
651 | ||
c79dd5b5 | 652 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
653 | { |
654 | u64 interval_tm_unit; | |
655 | u64 tsf, result; | |
656 | unsigned long flags; | |
657 | struct ieee80211_conf *conf = NULL; | |
658 | u16 beacon_int = 0; | |
659 | ||
660 | conf = ieee80211_get_hw_conf(priv->hw); | |
661 | ||
662 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
663 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
664 | priv->rxon_timing.timestamp.dw[0] = | |
665 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c | 666 | |
b5d7be5e | 667 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
b481de9c | 668 | |
3109ece1 | 669 | tsf = priv->timestamp; |
b481de9c ZY |
670 | |
671 | beacon_int = priv->beacon_int; | |
672 | spin_unlock_irqrestore(&priv->lock, flags); | |
673 | ||
05c914fe | 674 | if (priv->iw_mode == NL80211_IFTYPE_STATION) { |
b481de9c ZY |
675 | if (beacon_int == 0) { |
676 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
677 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
678 | } else { | |
679 | priv->rxon_timing.beacon_interval = | |
680 | cpu_to_le16(beacon_int); | |
681 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 682 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
683 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
684 | } | |
685 | ||
686 | priv->rxon_timing.atim_window = 0; | |
687 | } else { | |
688 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 689 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
690 | /* TODO: we need to get atim_window from upper stack |
691 | * for now we set to 0 */ | |
692 | priv->rxon_timing.atim_window = 0; | |
693 | } | |
694 | ||
695 | interval_tm_unit = | |
696 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
697 | result = do_div(tsf, interval_tm_unit); | |
698 | priv->rxon_timing.beacon_init_val = | |
699 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
700 | ||
701 | IWL_DEBUG_ASSOC | |
702 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
703 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
704 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
705 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
706 | } | |
707 | ||
82a66bbb TW |
708 | static void iwl_set_flags_for_band(struct iwl_priv *priv, |
709 | enum ieee80211_band band) | |
b481de9c | 710 | { |
8318d78a | 711 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
712 | priv->staging_rxon.flags &= |
713 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
714 | | RXON_FLG_CCK_MSK); | |
715 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
716 | } else { | |
508e32e1 | 717 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
718 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
719 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
720 | else | |
721 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
722 | ||
05c914fe | 723 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
724 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
725 | ||
726 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
727 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
728 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
729 | } | |
730 | } | |
731 | ||
732 | /* | |
01ebd063 | 733 | * initialize rxon structure with default values from eeprom |
b481de9c | 734 | */ |
c79dd5b5 | 735 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 736 | { |
bf85ea4f | 737 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
738 | |
739 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
740 | ||
741 | switch (priv->iw_mode) { | |
05c914fe | 742 | case NL80211_IFTYPE_AP: |
b481de9c ZY |
743 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; |
744 | break; | |
745 | ||
05c914fe | 746 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
747 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; |
748 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
749 | break; | |
750 | ||
05c914fe | 751 | case NL80211_IFTYPE_ADHOC: |
b481de9c ZY |
752 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; |
753 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
754 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
755 | RXON_FILTER_ACCEPT_GRP_MSK; | |
756 | break; | |
757 | ||
05c914fe | 758 | case NL80211_IFTYPE_MONITOR: |
b481de9c ZY |
759 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; |
760 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
761 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
762 | break; | |
69dc5d9d TW |
763 | default: |
764 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
765 | break; | |
b481de9c ZY |
766 | } |
767 | ||
768 | #if 0 | |
769 | /* TODO: Figure out when short_preamble would be set and cache from | |
770 | * that */ | |
771 | if (!hw_to_local(priv->hw)->short_preamble) | |
772 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
773 | else | |
774 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
775 | #endif | |
776 | ||
8622e705 | 777 | ch_info = iwl_get_channel_info(priv, priv->band, |
25b3f57c | 778 | le16_to_cpu(priv->active_rxon.channel)); |
b481de9c ZY |
779 | |
780 | if (!ch_info) | |
781 | ch_info = &priv->channel_info[0]; | |
782 | ||
783 | /* | |
784 | * in some case A channels are all non IBSS | |
785 | * in this case force B/G channel | |
786 | */ | |
05c914fe | 787 | if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && |
b481de9c ZY |
788 | !(is_channel_ibss(ch_info))) |
789 | ch_info = &priv->channel_info[0]; | |
790 | ||
791 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 792 | priv->band = ch_info->band; |
b481de9c | 793 | |
82a66bbb | 794 | iwl_set_flags_for_band(priv, priv->band); |
b481de9c ZY |
795 | |
796 | priv->staging_rxon.ofdm_basic_rates = | |
797 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
798 | priv->staging_rxon.cck_basic_rates = | |
799 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
800 | ||
801 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
802 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
803 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
804 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
805 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
806 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 807 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
808 | } |
809 | ||
c79dd5b5 | 810 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 811 | { |
b481de9c ZY |
812 | priv->iw_mode = mode; |
813 | ||
bb8c093b | 814 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
815 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
816 | ||
37deb2a0 | 817 | iwl_clear_stations_table(priv); |
b481de9c | 818 | |
fde3571f | 819 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 820 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
821 | return -EAGAIN; |
822 | ||
823 | cancel_delayed_work(&priv->scan_check); | |
2a421b91 | 824 | if (iwl_scan_cancel_timeout(priv, 100)) { |
fde3571f MA |
825 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
826 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
827 | return -EAGAIN; | |
828 | } | |
829 | ||
bb8c093b | 830 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
831 | |
832 | return 0; | |
833 | } | |
834 | ||
c79dd5b5 | 835 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 836 | { |
8318d78a | 837 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
838 | struct ieee80211_rate *rate; |
839 | int i; | |
840 | ||
d1141dfb | 841 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
842 | if (!hw) { |
843 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
844 | return; | |
845 | } | |
b481de9c ZY |
846 | |
847 | priv->active_rate = 0; | |
848 | priv->active_rate_basic = 0; | |
849 | ||
8318d78a JB |
850 | for (i = 0; i < hw->n_bitrates; i++) { |
851 | rate = &(hw->bitrates[i]); | |
852 | if (rate->hw_value < IWL_RATE_COUNT) | |
853 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
854 | } |
855 | ||
856 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
857 | priv->active_rate, priv->active_rate_basic); | |
858 | ||
859 | /* | |
860 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
861 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
862 | * OFDM | |
863 | */ | |
864 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
865 | priv->staging_rxon.cck_basic_rates = | |
866 | ((priv->active_rate_basic & | |
867 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
868 | else | |
869 | priv->staging_rxon.cck_basic_rates = | |
870 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
871 | ||
872 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
873 | priv->staging_rxon.ofdm_basic_rates = | |
874 | ((priv->active_rate_basic & | |
875 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
876 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
877 | else | |
878 | priv->staging_rxon.ofdm_basic_rates = | |
879 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
880 | } | |
881 | ||
4fc22b21 | 882 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
883 | |
884 | #include "iwl-spectrum.h" | |
885 | ||
886 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
887 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
888 | #define TIME_UNIT 1024 | |
889 | ||
890 | /* | |
891 | * extended beacon time format | |
892 | * time in usec will be changed into a 32-bit value in 8:24 format | |
893 | * the high 1 byte is the beacon counts | |
894 | * the lower 3 bytes is the time in usec within one beacon interval | |
895 | */ | |
896 | ||
bb8c093b | 897 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
898 | { |
899 | u32 quot; | |
900 | u32 rem; | |
901 | u32 interval = beacon_interval * 1024; | |
902 | ||
903 | if (!interval || !usec) | |
904 | return 0; | |
905 | ||
906 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
907 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
908 | ||
909 | return (quot << 24) + rem; | |
910 | } | |
911 | ||
912 | /* base is usually what we get from ucode with each received frame, | |
913 | * the same as HW timer counter counting down | |
914 | */ | |
915 | ||
bb8c093b | 916 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
917 | { |
918 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
919 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
920 | u32 interval = beacon_interval * TIME_UNIT; | |
921 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
922 | (addon & BEACON_TIME_MASK_HIGH); | |
923 | ||
924 | if (base_low > addon_low) | |
925 | res += base_low - addon_low; | |
926 | else if (base_low < addon_low) { | |
927 | res += interval + base_low - addon_low; | |
928 | res += (1 << 24); | |
929 | } else | |
930 | res += (1 << 24); | |
931 | ||
932 | return cpu_to_le32(res); | |
933 | } | |
934 | ||
c79dd5b5 | 935 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
936 | struct ieee80211_measurement_params *params, |
937 | u8 type) | |
938 | { | |
bb8c093b | 939 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 940 | struct iwl_rx_packet *res; |
857485c0 | 941 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
942 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
943 | .data = (void *)&spectrum, | |
944 | .meta.flags = CMD_WANT_SKB, | |
945 | }; | |
946 | u32 add_time = le64_to_cpu(params->start_time); | |
947 | int rc; | |
948 | int spectrum_resp_status; | |
949 | int duration = le16_to_cpu(params->duration); | |
950 | ||
3109ece1 | 951 | if (iwl_is_associated(priv)) |
b481de9c | 952 | add_time = |
bb8c093b | 953 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
954 | le64_to_cpu(params->start_time) - priv->last_tsf, |
955 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
956 | ||
957 | memset(&spectrum, 0, sizeof(spectrum)); | |
958 | ||
959 | spectrum.channel_count = cpu_to_le16(1); | |
960 | spectrum.flags = | |
961 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
962 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
963 | cmd.len = sizeof(spectrum); | |
964 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
965 | ||
3109ece1 | 966 | if (iwl_is_associated(priv)) |
b481de9c | 967 | spectrum.start_time = |
bb8c093b | 968 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
969 | add_time, |
970 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
971 | else | |
972 | spectrum.start_time = 0; | |
973 | ||
974 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
975 | spectrum.channels[0].channel = params->channel; | |
976 | spectrum.channels[0].type = type; | |
977 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
978 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
979 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
980 | ||
857485c0 | 981 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
982 | if (rc) |
983 | return rc; | |
984 | ||
db11d634 | 985 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
986 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
987 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
988 | rc = -EIO; | |
989 | } | |
990 | ||
991 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
992 | switch (spectrum_resp_status) { | |
993 | case 0: /* Command will be handled */ | |
994 | if (res->u.spectrum.id != 0xff) { | |
995 | IWL_DEBUG_INFO | |
996 | ("Replaced existing measurement: %d\n", | |
997 | res->u.spectrum.id); | |
998 | priv->measurement_status &= ~MEASUREMENT_READY; | |
999 | } | |
1000 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
1001 | rc = 0; | |
1002 | break; | |
1003 | ||
1004 | case 1: /* Command will not be handled */ | |
1005 | rc = -EAGAIN; | |
1006 | break; | |
1007 | } | |
1008 | ||
1009 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1010 | ||
1011 | return rc; | |
1012 | } | |
1013 | #endif | |
1014 | ||
b481de9c ZY |
1015 | /****************************************************************************** |
1016 | * | |
1017 | * Generic RX handler implementations | |
1018 | * | |
1019 | ******************************************************************************/ | |
885ba202 TW |
1020 | static void iwl_rx_reply_alive(struct iwl_priv *priv, |
1021 | struct iwl_rx_mem_buffer *rxb) | |
b481de9c | 1022 | { |
db11d634 | 1023 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
885ba202 | 1024 | struct iwl_alive_resp *palive; |
b481de9c ZY |
1025 | struct delayed_work *pwork; |
1026 | ||
1027 | palive = &pkt->u.alive_frame; | |
1028 | ||
1029 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
1030 | "0x%01X 0x%01X\n", | |
1031 | palive->is_valid, palive->ver_type, | |
1032 | palive->ver_subtype); | |
1033 | ||
1034 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
1035 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
1036 | memcpy(&priv->card_alive_init, | |
1037 | &pkt->u.alive_frame, | |
885ba202 | 1038 | sizeof(struct iwl_init_alive_resp)); |
b481de9c ZY |
1039 | pwork = &priv->init_alive_start; |
1040 | } else { | |
1041 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
1042 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
885ba202 | 1043 | sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
1044 | pwork = &priv->alive_start; |
1045 | } | |
1046 | ||
1047 | /* We delay the ALIVE response by 5ms to | |
1048 | * give the HW RF Kill time to activate... */ | |
1049 | if (palive->is_valid == UCODE_VALID_OK) | |
1050 | queue_delayed_work(priv->workqueue, pwork, | |
1051 | msecs_to_jiffies(5)); | |
1052 | else | |
1053 | IWL_WARNING("uCode did not respond OK.\n"); | |
1054 | } | |
1055 | ||
c79dd5b5 | 1056 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 1057 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1058 | { |
db11d634 | 1059 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1060 | |
1061 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
1062 | "seq 0x%04X ser 0x%08X\n", | |
1063 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1064 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1065 | pkt->u.err_resp.cmd_id, | |
1066 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1067 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1068 | } | |
1069 | ||
1070 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1071 | ||
a55360e4 | 1072 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1073 | { |
db11d634 | 1074 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
c1adf9fb | 1075 | struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; |
bb8c093b | 1076 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); |
b481de9c ZY |
1077 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
1078 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
1079 | rxon->channel = csa->channel; | |
1080 | priv->staging_rxon.channel = csa->channel; | |
1081 | } | |
1082 | ||
c79dd5b5 | 1083 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 1084 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1085 | { |
4fc22b21 | 1086 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
db11d634 | 1087 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1088 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
1089 | |
1090 | if (!report->state) { | |
f3d67999 EK |
1091 | IWL_DEBUG(IWL_DL_11H, |
1092 | "Spectrum Measure Notification: Start\n"); | |
b481de9c ZY |
1093 | return; |
1094 | } | |
1095 | ||
1096 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
1097 | priv->measurement_status |= MEASUREMENT_READY; | |
1098 | #endif | |
1099 | } | |
1100 | ||
c79dd5b5 | 1101 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 1102 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1103 | { |
0a6857e7 | 1104 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1105 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1106 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
1107 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
1108 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1109 | #endif | |
1110 | } | |
1111 | ||
c79dd5b5 | 1112 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 1113 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1114 | { |
db11d634 | 1115 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1116 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
1117 | "notification for %s:\n", | |
1118 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 1119 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
1120 | } |
1121 | ||
bb8c093b | 1122 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 1123 | { |
c79dd5b5 TW |
1124 | struct iwl_priv *priv = |
1125 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
1126 | struct sk_buff *beacon; |
1127 | ||
1128 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
e039fa4a | 1129 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); |
b481de9c ZY |
1130 | |
1131 | if (!beacon) { | |
1132 | IWL_ERROR("update beacon failed\n"); | |
1133 | return; | |
1134 | } | |
1135 | ||
1136 | mutex_lock(&priv->mutex); | |
1137 | /* new beacon skb is allocated every time; dispose previous.*/ | |
1138 | if (priv->ibss_beacon) | |
1139 | dev_kfree_skb(priv->ibss_beacon); | |
1140 | ||
1141 | priv->ibss_beacon = beacon; | |
1142 | mutex_unlock(&priv->mutex); | |
1143 | ||
bb8c093b | 1144 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
1145 | } |
1146 | ||
4e39317d EG |
1147 | /** |
1148 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics | |
1149 | * | |
1150 | * This callback is provided in order to send a statistics request. | |
1151 | * | |
1152 | * This timer function is continually reset to execute within | |
1153 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
1154 | * was received. We need to ensure we receive the statistics in order | |
1155 | * to update the temperature used for calibrating the TXPOWER. | |
1156 | */ | |
1157 | static void iwl4965_bg_statistics_periodic(unsigned long data) | |
1158 | { | |
1159 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
1160 | ||
1161 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
1162 | return; | |
1163 | ||
1164 | iwl_send_statistics_request(priv, CMD_ASYNC); | |
1165 | } | |
1166 | ||
c79dd5b5 | 1167 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 1168 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1169 | { |
0a6857e7 | 1170 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 1171 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 1172 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
e7d326ac | 1173 | u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
b481de9c ZY |
1174 | |
1175 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
1176 | "tsf %d %d rate %d\n", | |
25a6572c | 1177 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
b481de9c ZY |
1178 | beacon->beacon_notify_hdr.failure_frame, |
1179 | le32_to_cpu(beacon->ibss_mgr_status), | |
1180 | le32_to_cpu(beacon->high_tsf), | |
1181 | le32_to_cpu(beacon->low_tsf), rate); | |
1182 | #endif | |
1183 | ||
05c914fe | 1184 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
b481de9c ZY |
1185 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) |
1186 | queue_work(priv->workqueue, &priv->beacon_update); | |
1187 | } | |
1188 | ||
b481de9c ZY |
1189 | /* Handle notification from uCode that card's power state is changing |
1190 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 1191 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 1192 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 1193 | { |
db11d634 | 1194 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1195 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
1196 | unsigned long status = priv->status; | |
1197 | ||
1198 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
1199 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1200 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
1201 | ||
1202 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
1203 | RF_CARD_DISABLED)) { | |
1204 | ||
3395f6e9 | 1205 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
1206 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
1207 | ||
3395f6e9 TW |
1208 | if (!iwl_grab_nic_access(priv)) { |
1209 | iwl_write_direct32( | |
b481de9c ZY |
1210 | priv, HBUS_TARG_MBX_C, |
1211 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1212 | ||
3395f6e9 | 1213 | iwl_release_nic_access(priv); |
b481de9c ZY |
1214 | } |
1215 | ||
1216 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 1217 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 1218 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
1219 | if (!iwl_grab_nic_access(priv)) { |
1220 | iwl_write_direct32( | |
b481de9c ZY |
1221 | priv, HBUS_TARG_MBX_C, |
1222 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
1223 | ||
3395f6e9 | 1224 | iwl_release_nic_access(priv); |
b481de9c ZY |
1225 | } |
1226 | } | |
1227 | ||
1228 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 1229 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 1230 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
1231 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
1232 | if (!iwl_grab_nic_access(priv)) | |
1233 | iwl_release_nic_access(priv); | |
b481de9c ZY |
1234 | } |
1235 | } | |
1236 | ||
1237 | if (flags & HW_CARD_DISABLED) | |
1238 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
1239 | else | |
1240 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
1241 | ||
1242 | ||
1243 | if (flags & SW_CARD_DISABLED) | |
1244 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
1245 | else | |
1246 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
1247 | ||
1248 | if (!(flags & RXON_CARD_DISABLED)) | |
2a421b91 | 1249 | iwl_scan_cancel(priv); |
b481de9c ZY |
1250 | |
1251 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
1252 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
1253 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
1254 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
1255 | queue_work(priv->workqueue, &priv->rf_kill); | |
1256 | else | |
1257 | wake_up_interruptible(&priv->wait_command_queue); | |
1258 | } | |
1259 | ||
e2e3c57b TW |
1260 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
1261 | { | |
1262 | int ret; | |
1263 | unsigned long flags; | |
1264 | ||
1265 | spin_lock_irqsave(&priv->lock, flags); | |
1266 | ret = iwl_grab_nic_access(priv); | |
1267 | if (ret) | |
1268 | goto err; | |
1269 | ||
1270 | if (src == IWL_PWR_SRC_VAUX) { | |
1271 | u32 val; | |
e7b63581 | 1272 | ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE, |
e2e3c57b TW |
1273 | &val); |
1274 | ||
1275 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | |
1276 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1277 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | |
1278 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1279 | } else { | |
1280 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | |
1281 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | |
1282 | ~APMG_PS_CTRL_MSK_PWR_SRC); | |
1283 | } | |
1284 | ||
1285 | iwl_release_nic_access(priv); | |
1286 | err: | |
1287 | spin_unlock_irqrestore(&priv->lock, flags); | |
1288 | return ret; | |
1289 | } | |
1290 | ||
b481de9c | 1291 | /** |
bb8c093b | 1292 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
1293 | * |
1294 | * Setup the RX handlers for each of the reply types sent from the uCode | |
1295 | * to the host. | |
1296 | * | |
1297 | * This function chains into the hardware specific files for them to setup | |
1298 | * any hardware specific handlers as well. | |
1299 | */ | |
653fa4a0 | 1300 | static void iwl_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 1301 | { |
885ba202 | 1302 | priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; |
bb8c093b CH |
1303 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; |
1304 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 1305 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
1306 | iwl4965_rx_spectrum_measure_notif; |
1307 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 1308 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
1309 | iwl4965_rx_pm_debug_statistics_notif; |
1310 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 1311 | |
9fbab516 BC |
1312 | /* |
1313 | * The same handler is used for both the REPLY to a discrete | |
1314 | * statistics request from the host as well as for the periodic | |
1315 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 1316 | */ |
8f91aecb EG |
1317 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; |
1318 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; | |
2a421b91 TW |
1319 | |
1320 | iwl_setup_rx_scan_handlers(priv); | |
1321 | ||
37a44211 | 1322 | /* status change handler */ |
bb8c093b | 1323 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; |
b481de9c | 1324 | |
c1354754 TW |
1325 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
1326 | iwl_rx_missed_beacon_notif; | |
37a44211 | 1327 | /* Rx handlers */ |
1781a07f EG |
1328 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy; |
1329 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx; | |
653fa4a0 EG |
1330 | /* block ack */ |
1331 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba; | |
9fbab516 | 1332 | /* Set up hardware specific Rx handlers */ |
d4789efe | 1333 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
1334 | } |
1335 | ||
5c0eef96 MA |
1336 | /* |
1337 | * this should be called while priv->lock is locked | |
1338 | */ | |
a55360e4 | 1339 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 1340 | { |
a55360e4 TW |
1341 | iwl_rx_allocate(priv); |
1342 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
1343 | } |
1344 | ||
b481de9c ZY |
1345 | |
1346 | /** | |
a55360e4 | 1347 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
1348 | * |
1349 | * Uses the priv->rx_handlers callback function array to invoke | |
1350 | * the appropriate handlers, including command responses, | |
1351 | * frame-received notifications, and other notifications. | |
1352 | */ | |
a55360e4 | 1353 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 1354 | { |
a55360e4 | 1355 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 1356 | struct iwl_rx_packet *pkt; |
a55360e4 | 1357 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
1358 | u32 r, i; |
1359 | int reclaim; | |
1360 | unsigned long flags; | |
5c0eef96 | 1361 | u8 fill_rx = 0; |
d68ab680 | 1362 | u32 count = 8; |
b481de9c | 1363 | |
6440adb5 CB |
1364 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
1365 | * buffer that the driver may process (last buffer filled by ucode). */ | |
d67f5489 | 1366 | r = priv->cfg->ops->lib->shared_mem_rx_idx(priv); |
b481de9c ZY |
1367 | i = rxq->read; |
1368 | ||
1369 | /* Rx interrupt, but nothing sent from uCode */ | |
1370 | if (i == r) | |
f3d67999 | 1371 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i); |
b481de9c | 1372 | |
a55360e4 | 1373 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
1374 | fill_rx = 1; |
1375 | ||
b481de9c ZY |
1376 | while (i != r) { |
1377 | rxb = rxq->queue[i]; | |
1378 | ||
9fbab516 | 1379 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
1380 | * then a bug has been introduced in the queue refilling |
1381 | * routines -- catch it here */ | |
1382 | BUG_ON(rxb == NULL); | |
1383 | ||
1384 | rxq->queue[i] = NULL; | |
1385 | ||
1386 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1387 | priv->hw_params.rx_buf_size, |
b481de9c | 1388 | PCI_DMA_FROMDEVICE); |
db11d634 | 1389 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
1390 | |
1391 | /* Reclaim a command buffer only if this packet is a response | |
1392 | * to a (driver-originated) command. | |
1393 | * If the packet (e.g. Rx frame) originated from uCode, | |
1394 | * there is no command buffer to reclaim. | |
1395 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
1396 | * but apparently a few don't get set; catch them here. */ | |
1397 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
1398 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 1399 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 1400 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
1401 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
1402 | (pkt->hdr.cmd != REPLY_TX); | |
1403 | ||
1404 | /* Based on type of command response or notification, | |
1405 | * handle those that need handling via function in | |
bb8c093b | 1406 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c | 1407 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
f3d67999 EK |
1408 | IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r, |
1409 | i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
b481de9c ZY |
1410 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); |
1411 | } else { | |
1412 | /* No handling needed */ | |
f3d67999 | 1413 | IWL_DEBUG(IWL_DL_RX, |
b481de9c ZY |
1414 | "r %d i %d No handler needed for %s, 0x%02x\n", |
1415 | r, i, get_cmd_string(pkt->hdr.cmd), | |
1416 | pkt->hdr.cmd); | |
1417 | } | |
1418 | ||
1419 | if (reclaim) { | |
9fbab516 | 1420 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 1421 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
1422 | * as we reclaim the driver command queue */ |
1423 | if (rxb && rxb->skb) | |
17b88929 | 1424 | iwl_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
1425 | else |
1426 | IWL_WARNING("Claim null rxb?\n"); | |
1427 | } | |
1428 | ||
1429 | /* For now we just don't re-use anything. We can tweak this | |
1430 | * later to try and re-use notification packets and SKBs that | |
1431 | * fail to Rx correctly */ | |
1432 | if (rxb->skb != NULL) { | |
1433 | priv->alloc_rxb_skb--; | |
1434 | dev_kfree_skb_any(rxb->skb); | |
1435 | rxb->skb = NULL; | |
1436 | } | |
1437 | ||
1438 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 1439 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 1440 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
1441 | spin_lock_irqsave(&rxq->lock, flags); |
1442 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
1443 | spin_unlock_irqrestore(&rxq->lock, flags); | |
1444 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
1445 | /* If there are a lot of unused frames, |
1446 | * restock the Rx queue so ucode wont assert. */ | |
1447 | if (fill_rx) { | |
1448 | count++; | |
1449 | if (count >= 8) { | |
1450 | priv->rxq.read = i; | |
a55360e4 | 1451 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
1452 | count = 0; |
1453 | } | |
1454 | } | |
b481de9c ZY |
1455 | } |
1456 | ||
1457 | /* Backtrack one entry */ | |
1458 | priv->rxq.read = i; | |
a55360e4 TW |
1459 | iwl_rx_queue_restock(priv); |
1460 | } | |
a55360e4 | 1461 | |
0a6857e7 | 1462 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1463 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 1464 | { |
c1adf9fb | 1465 | struct iwl_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 | 1466 | |
b481de9c | 1467 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 1468 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
1469 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
1470 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1471 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
1472 | le32_to_cpu(rxon->filter_flags)); | |
1473 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
1474 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
1475 | rxon->ofdm_basic_rates); | |
1476 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
e174961c JB |
1477 | IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); |
1478 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); | |
b481de9c ZY |
1479 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
1480 | } | |
1481 | #endif | |
1482 | ||
c79dd5b5 | 1483 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1484 | { |
1485 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
1486 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 1487 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
1488 | } |
1489 | ||
0359facc MA |
1490 | /* call this function to flush any scheduled tasklet */ |
1491 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
1492 | { | |
1493 | /* wait to make sure we flush pedding tasklet*/ | |
1494 | synchronize_irq(priv->pci_dev->irq); | |
1495 | tasklet_kill(&priv->irq_tasklet); | |
1496 | } | |
1497 | ||
c79dd5b5 | 1498 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
1499 | { |
1500 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
1501 | ||
1502 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 1503 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
1504 | |
1505 | /* acknowledge/clear/reset any interrupts still pending | |
1506 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
1507 | iwl_write32(priv, CSR_INT, 0xffffffff); |
1508 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
1509 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
1510 | } | |
1511 | ||
b481de9c | 1512 | |
b481de9c | 1513 | /** |
bb8c093b | 1514 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 1515 | */ |
c79dd5b5 | 1516 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 1517 | { |
bb8c093b | 1518 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
1519 | set_bit(STATUS_FW_ERROR, &priv->status); |
1520 | ||
1521 | /* Cancel currently queued command. */ | |
1522 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1523 | ||
0a6857e7 | 1524 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1525 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
ede0cba4 | 1526 | iwl_dump_nic_error_log(priv); |
189a2b59 | 1527 | iwl_dump_nic_event_log(priv); |
bf403db8 | 1528 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
1529 | } |
1530 | #endif | |
1531 | ||
1532 | wake_up_interruptible(&priv->wait_command_queue); | |
1533 | ||
1534 | /* Keep the restart process from trying to send host | |
1535 | * commands by clearing the INIT status bit */ | |
1536 | clear_bit(STATUS_READY, &priv->status); | |
1537 | ||
1538 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
f3d67999 | 1539 | IWL_DEBUG(IWL_DL_FW_ERRORS, |
b481de9c ZY |
1540 | "Restarting adapter due to uCode error.\n"); |
1541 | ||
3109ece1 | 1542 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
1543 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
1544 | sizeof(priv->recovery_rxon)); | |
1545 | priv->error_recovering = 1; | |
1546 | } | |
3a1081e8 EK |
1547 | if (priv->cfg->mod_params->restart_fw) |
1548 | queue_work(priv->workqueue, &priv->restart); | |
b481de9c ZY |
1549 | } |
1550 | } | |
1551 | ||
c79dd5b5 | 1552 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
1553 | { |
1554 | unsigned long flags; | |
1555 | ||
1556 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
1557 | sizeof(priv->staging_rxon)); | |
1558 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 1559 | iwl4965_commit_rxon(priv); |
b481de9c | 1560 | |
4f40e4d9 | 1561 | iwl_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
1562 | |
1563 | spin_lock_irqsave(&priv->lock, flags); | |
1564 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
1565 | priv->error_recovering = 0; | |
1566 | spin_unlock_irqrestore(&priv->lock, flags); | |
1567 | } | |
1568 | ||
c79dd5b5 | 1569 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
1570 | { |
1571 | u32 inta, handled = 0; | |
1572 | u32 inta_fh; | |
1573 | unsigned long flags; | |
0a6857e7 | 1574 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1575 | u32 inta_mask; |
1576 | #endif | |
1577 | ||
1578 | spin_lock_irqsave(&priv->lock, flags); | |
1579 | ||
1580 | /* Ack/clear/reset pending uCode interrupts. | |
1581 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
1582 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
1583 | inta = iwl_read32(priv, CSR_INT); |
1584 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
1585 | |
1586 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
1587 | * Any new interrupts that happen after this, either while we're | |
1588 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
1589 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
1590 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 1591 | |
0a6857e7 | 1592 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1593 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 1594 | /* just for debug */ |
3395f6e9 | 1595 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
1596 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
1597 | inta, inta_mask, inta_fh); | |
1598 | } | |
1599 | #endif | |
1600 | ||
1601 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
1602 | * atomic, make sure that inta covers all the interrupts that | |
1603 | * we've discovered, even if FH interrupt came in just after | |
1604 | * reading CSR_INT. */ | |
6f83eaa1 | 1605 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 1606 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 1607 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
1608 | inta |= CSR_INT_BIT_FH_TX; |
1609 | ||
1610 | /* Now service all interrupt bits discovered above. */ | |
1611 | if (inta & CSR_INT_BIT_HW_ERR) { | |
1612 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
1613 | ||
1614 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 1615 | iwl4965_disable_interrupts(priv); |
b481de9c | 1616 | |
bb8c093b | 1617 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1618 | |
1619 | handled |= CSR_INT_BIT_HW_ERR; | |
1620 | ||
1621 | spin_unlock_irqrestore(&priv->lock, flags); | |
1622 | ||
1623 | return; | |
1624 | } | |
1625 | ||
0a6857e7 | 1626 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1627 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 1628 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
1629 | if (inta & CSR_INT_BIT_SCD) |
1630 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
1631 | "the frame/frames.\n"); | |
b481de9c ZY |
1632 | |
1633 | /* Alive notification via Rx interrupt will do the real work */ | |
1634 | if (inta & CSR_INT_BIT_ALIVE) | |
1635 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
1636 | } | |
1637 | #endif | |
1638 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 1639 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 1640 | |
9fbab516 | 1641 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
1642 | if (inta & CSR_INT_BIT_RF_KILL) { |
1643 | int hw_rf_kill = 0; | |
3395f6e9 | 1644 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
1645 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
1646 | hw_rf_kill = 1; | |
1647 | ||
f3d67999 | 1648 | IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n", |
b481de9c ZY |
1649 | hw_rf_kill ? "disable radio":"enable radio"); |
1650 | ||
a9efa652 EG |
1651 | /* driver only loads ucode once setting the interface up. |
1652 | * the driver as well won't allow loading if RFKILL is set | |
1653 | * therefore no need to restart the driver from this handler | |
1654 | */ | |
1655 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) | |
53e49093 | 1656 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
b481de9c ZY |
1657 | |
1658 | handled |= CSR_INT_BIT_RF_KILL; | |
1659 | } | |
1660 | ||
9fbab516 | 1661 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
1662 | if (inta & CSR_INT_BIT_CT_KILL) { |
1663 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
1664 | handled |= CSR_INT_BIT_CT_KILL; | |
1665 | } | |
1666 | ||
1667 | /* Error detected by uCode */ | |
1668 | if (inta & CSR_INT_BIT_SW_ERR) { | |
1669 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
1670 | inta); | |
bb8c093b | 1671 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
1672 | handled |= CSR_INT_BIT_SW_ERR; |
1673 | } | |
1674 | ||
1675 | /* uCode wakes up after power-down sleep */ | |
1676 | if (inta & CSR_INT_BIT_WAKEUP) { | |
1677 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 1678 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
babcebfa TW |
1679 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
1680 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | |
1681 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | |
1682 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | |
1683 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | |
1684 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
1685 | |
1686 | handled |= CSR_INT_BIT_WAKEUP; | |
1687 | } | |
1688 | ||
1689 | /* All uCode command responses, including Tx command responses, | |
1690 | * Rx "responses" (frame-received notification), and other | |
1691 | * notifications from uCode come through here*/ | |
1692 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 1693 | iwl_rx_handle(priv); |
b481de9c ZY |
1694 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
1695 | } | |
1696 | ||
1697 | if (inta & CSR_INT_BIT_FH_TX) { | |
1698 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
1699 | handled |= CSR_INT_BIT_FH_TX; | |
dbb983b7 RR |
1700 | /* FH finished to write, send event */ |
1701 | priv->ucode_write_complete = 1; | |
1702 | wake_up_interruptible(&priv->wait_command_queue); | |
b481de9c ZY |
1703 | } |
1704 | ||
1705 | if (inta & ~handled) | |
1706 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
1707 | ||
1708 | if (inta & ~CSR_INI_SET_MASK) { | |
1709 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
1710 | inta & ~CSR_INI_SET_MASK); | |
1711 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
1712 | } | |
1713 | ||
1714 | /* Re-enable all interrupts */ | |
0359facc MA |
1715 | /* only Re-enable if diabled by irq */ |
1716 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1717 | iwl4965_enable_interrupts(priv); | |
b481de9c | 1718 | |
0a6857e7 | 1719 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 1720 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
1721 | inta = iwl_read32(priv, CSR_INT); |
1722 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
1723 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1724 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1725 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
1726 | } | |
1727 | #endif | |
1728 | spin_unlock_irqrestore(&priv->lock, flags); | |
1729 | } | |
1730 | ||
bb8c093b | 1731 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 1732 | { |
c79dd5b5 | 1733 | struct iwl_priv *priv = data; |
b481de9c ZY |
1734 | u32 inta, inta_mask; |
1735 | u32 inta_fh; | |
1736 | if (!priv) | |
1737 | return IRQ_NONE; | |
1738 | ||
1739 | spin_lock(&priv->lock); | |
1740 | ||
1741 | /* Disable (but don't clear!) interrupts here to avoid | |
1742 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1743 | * If we have something to service, the tasklet will re-enable ints. | |
1744 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
1745 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
1746 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
1747 | |
1748 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
1749 | inta = iwl_read32(priv, CSR_INT); |
1750 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
1751 | |
1752 | /* Ignore interrupt if there's nothing in NIC to service. | |
1753 | * This may be due to IRQ shared with another device, | |
1754 | * or due to sporadic interrupts thrown from our NIC. */ | |
1755 | if (!inta && !inta_fh) { | |
1756 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1757 | goto none; | |
1758 | } | |
1759 | ||
1760 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
1761 | /* Hardware disappeared. It might have already raised |
1762 | * an interrupt */ | |
b481de9c | 1763 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 1764 | goto unplugged; |
b481de9c ZY |
1765 | } |
1766 | ||
1767 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1768 | inta, inta_mask, inta_fh); | |
1769 | ||
25c03d8e JP |
1770 | inta &= ~CSR_INT_BIT_SCD; |
1771 | ||
bb8c093b | 1772 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
1773 | if (likely(inta || inta_fh)) |
1774 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 1775 | |
66fbb541 ON |
1776 | unplugged: |
1777 | spin_unlock(&priv->lock); | |
b481de9c ZY |
1778 | return IRQ_HANDLED; |
1779 | ||
1780 | none: | |
1781 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
1782 | /* only Re-enable if diabled by irq */ |
1783 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1784 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
1785 | spin_unlock(&priv->lock); |
1786 | return IRQ_NONE; | |
1787 | } | |
1788 | ||
b481de9c ZY |
1789 | /****************************************************************************** |
1790 | * | |
1791 | * uCode download functions | |
1792 | * | |
1793 | ******************************************************************************/ | |
1794 | ||
c79dd5b5 | 1795 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 1796 | { |
98c92211 TW |
1797 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
1798 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
1799 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
1800 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
1801 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
1802 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
1803 | } |
1804 | ||
edcdf8b2 RR |
1805 | static void iwl4965_nic_start(struct iwl_priv *priv) |
1806 | { | |
1807 | /* Remove all resets to allow NIC to operate */ | |
1808 | iwl_write32(priv, CSR_RESET, 0); | |
1809 | } | |
1810 | ||
1811 | ||
b481de9c | 1812 | /** |
bb8c093b | 1813 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
1814 | * |
1815 | * Copy into buffers for card to fetch via bus-mastering | |
1816 | */ | |
c79dd5b5 | 1817 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 1818 | { |
14b3d338 | 1819 | struct iwl_ucode *ucode; |
90e759d1 | 1820 | int ret; |
b481de9c | 1821 | const struct firmware *ucode_raw; |
4bf775cd | 1822 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
1823 | u8 *src; |
1824 | size_t len; | |
1825 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
1826 | ||
1827 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
1828 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
1829 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
1830 | if (ret < 0) { | |
1831 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
1832 | name, ret); | |
b481de9c ZY |
1833 | goto error; |
1834 | } | |
1835 | ||
1836 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
1837 | name, ucode_raw->size); | |
1838 | ||
1839 | /* Make sure that we got at least our header! */ | |
1840 | if (ucode_raw->size < sizeof(*ucode)) { | |
1841 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 1842 | ret = -EINVAL; |
b481de9c ZY |
1843 | goto err_release; |
1844 | } | |
1845 | ||
1846 | /* Data from ucode file: header followed by uCode images */ | |
1847 | ucode = (void *)ucode_raw->data; | |
1848 | ||
1849 | ver = le32_to_cpu(ucode->ver); | |
1850 | inst_size = le32_to_cpu(ucode->inst_size); | |
1851 | data_size = le32_to_cpu(ucode->data_size); | |
1852 | init_size = le32_to_cpu(ucode->init_size); | |
1853 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
1854 | boot_size = le32_to_cpu(ucode->boot_size); | |
1855 | ||
1856 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
1857 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
1858 | inst_size); | |
1859 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
1860 | data_size); | |
1861 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
1862 | init_size); | |
1863 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
1864 | init_data_size); | |
1865 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
1866 | boot_size); | |
1867 | ||
1868 | /* Verify size of file vs. image size info in file's header */ | |
1869 | if (ucode_raw->size < sizeof(*ucode) + | |
1870 | inst_size + data_size + init_size + | |
1871 | init_data_size + boot_size) { | |
1872 | ||
1873 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
1874 | (int)ucode_raw->size); | |
90e759d1 | 1875 | ret = -EINVAL; |
b481de9c ZY |
1876 | goto err_release; |
1877 | } | |
1878 | ||
1879 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 1880 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
1881 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
1882 | inst_size); | |
1883 | ret = -EINVAL; | |
b481de9c ZY |
1884 | goto err_release; |
1885 | } | |
1886 | ||
099b40b7 | 1887 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
1888 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
1889 | data_size); | |
1890 | ret = -EINVAL; | |
b481de9c ZY |
1891 | goto err_release; |
1892 | } | |
099b40b7 | 1893 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 1894 | IWL_DEBUG_INFO |
90e759d1 TW |
1895 | ("uCode init instr len %d too large to fit in\n", |
1896 | init_size); | |
1897 | ret = -EINVAL; | |
b481de9c ZY |
1898 | goto err_release; |
1899 | } | |
099b40b7 | 1900 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 1901 | IWL_DEBUG_INFO |
90e759d1 TW |
1902 | ("uCode init data len %d too large to fit in\n", |
1903 | init_data_size); | |
1904 | ret = -EINVAL; | |
b481de9c ZY |
1905 | goto err_release; |
1906 | } | |
099b40b7 | 1907 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 1908 | IWL_DEBUG_INFO |
90e759d1 TW |
1909 | ("uCode boot instr len %d too large to fit in\n", |
1910 | boot_size); | |
1911 | ret = -EINVAL; | |
b481de9c ZY |
1912 | goto err_release; |
1913 | } | |
1914 | ||
1915 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
1916 | ||
1917 | /* Runtime instructions and 2 copies of data: | |
1918 | * 1) unmodified from disk | |
1919 | * 2) backup cache for save/restore during power-downs */ | |
1920 | priv->ucode_code.len = inst_size; | |
98c92211 | 1921 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
1922 | |
1923 | priv->ucode_data.len = data_size; | |
98c92211 | 1924 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
1925 | |
1926 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 1927 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
1928 | |
1929 | /* Initialization instructions and data */ | |
90e759d1 TW |
1930 | if (init_size && init_data_size) { |
1931 | priv->ucode_init.len = init_size; | |
98c92211 | 1932 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
1933 | |
1934 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 1935 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
1936 | |
1937 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
1938 | goto err_pci_alloc; | |
1939 | } | |
b481de9c ZY |
1940 | |
1941 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
1942 | if (boot_size) { |
1943 | priv->ucode_boot.len = boot_size; | |
98c92211 | 1944 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 1945 | |
90e759d1 TW |
1946 | if (!priv->ucode_boot.v_addr) |
1947 | goto err_pci_alloc; | |
1948 | } | |
b481de9c ZY |
1949 | |
1950 | /* Copy images into buffers for card's bus-master reads ... */ | |
1951 | ||
1952 | /* Runtime instructions (first block of data in file) */ | |
1953 | src = &ucode->data[0]; | |
1954 | len = priv->ucode_code.len; | |
90e759d1 | 1955 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
1956 | memcpy(priv->ucode_code.v_addr, src, len); |
1957 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
1958 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
1959 | ||
1960 | /* Runtime data (2nd block) | |
bb8c093b | 1961 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
1962 | src = &ucode->data[inst_size]; |
1963 | len = priv->ucode_data.len; | |
90e759d1 | 1964 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
1965 | memcpy(priv->ucode_data.v_addr, src, len); |
1966 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
1967 | ||
1968 | /* Initialization instructions (3rd block) */ | |
1969 | if (init_size) { | |
1970 | src = &ucode->data[inst_size + data_size]; | |
1971 | len = priv->ucode_init.len; | |
90e759d1 TW |
1972 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
1973 | len); | |
b481de9c ZY |
1974 | memcpy(priv->ucode_init.v_addr, src, len); |
1975 | } | |
1976 | ||
1977 | /* Initialization data (4th block) */ | |
1978 | if (init_data_size) { | |
1979 | src = &ucode->data[inst_size + data_size + init_size]; | |
1980 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
1981 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
1982 | len); | |
b481de9c ZY |
1983 | memcpy(priv->ucode_init_data.v_addr, src, len); |
1984 | } | |
1985 | ||
1986 | /* Bootstrap instructions (5th block) */ | |
1987 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
1988 | len = priv->ucode_boot.len; | |
90e759d1 | 1989 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
1990 | memcpy(priv->ucode_boot.v_addr, src, len); |
1991 | ||
1992 | /* We have our copies now, allow OS release its copies */ | |
1993 | release_firmware(ucode_raw); | |
1994 | return 0; | |
1995 | ||
1996 | err_pci_alloc: | |
1997 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 1998 | ret = -ENOMEM; |
bb8c093b | 1999 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
2000 | |
2001 | err_release: | |
2002 | release_firmware(ucode_raw); | |
2003 | ||
2004 | error: | |
90e759d1 | 2005 | return ret; |
b481de9c ZY |
2006 | } |
2007 | ||
b481de9c | 2008 | /** |
4a4a9e81 | 2009 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 2010 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 2011 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 2012 | */ |
4a4a9e81 | 2013 | static void iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 2014 | { |
57aab75a | 2015 | int ret = 0; |
b481de9c ZY |
2016 | |
2017 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2018 | ||
2019 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
2020 | /* We had an error bringing up the hardware, so take it | |
2021 | * all the way back down so we can try again */ | |
2022 | IWL_DEBUG_INFO("Alive failed.\n"); | |
2023 | goto restart; | |
2024 | } | |
2025 | ||
2026 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
2027 | * This is a paranoid check, because we would not have gotten the | |
2028 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 2029 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
2030 | /* Runtime instruction load was bad; |
2031 | * take it all the way back down so we can try again */ | |
2032 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
2033 | goto restart; | |
2034 | } | |
2035 | ||
37deb2a0 | 2036 | iwl_clear_stations_table(priv); |
57aab75a TW |
2037 | ret = priv->cfg->ops->lib->alive_notify(priv); |
2038 | if (ret) { | |
b481de9c | 2039 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 2040 | ret); |
b481de9c ZY |
2041 | goto restart; |
2042 | } | |
2043 | ||
9fbab516 | 2044 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
2045 | set_bit(STATUS_ALIVE, &priv->status); |
2046 | ||
fee1247a | 2047 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
2048 | return; |
2049 | ||
36d6825b | 2050 | ieee80211_wake_queues(priv->hw); |
b481de9c ZY |
2051 | |
2052 | priv->active_rate = priv->rates_mask; | |
2053 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
2054 | ||
3109ece1 | 2055 | if (iwl_is_associated(priv)) { |
c1adf9fb GG |
2056 | struct iwl_rxon_cmd *active_rxon = |
2057 | (struct iwl_rxon_cmd *)&priv->active_rxon; | |
b481de9c ZY |
2058 | |
2059 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
2060 | sizeof(priv->staging_rxon)); | |
2061 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
2062 | } else { | |
2063 | /* Initialize our rx_config data */ | |
bb8c093b | 2064 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2065 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2066 | } | |
2067 | ||
9fbab516 | 2068 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 2069 | iwl4965_send_bt_config(priv); |
b481de9c | 2070 | |
4a4a9e81 TW |
2071 | iwl_reset_run_time_calib(priv); |
2072 | ||
b481de9c | 2073 | /* Configure the adapter for unassociated operation */ |
bb8c093b | 2074 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2075 | |
2076 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 2077 | iwl_rf_kill_ct_config(priv); |
5a66926a | 2078 | |
fe00b5a5 RC |
2079 | iwl_leds_register(priv); |
2080 | ||
b481de9c | 2081 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 2082 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 2083 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
2084 | |
2085 | if (priv->error_recovering) | |
bb8c093b | 2086 | iwl4965_error_recovery(priv); |
b481de9c | 2087 | |
58d0f361 | 2088 | iwl_power_update_mode(priv, 1); |
c46fbefa AK |
2089 | |
2090 | if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) | |
2091 | iwl4965_set_mode(priv, priv->iw_mode); | |
2092 | ||
b481de9c ZY |
2093 | return; |
2094 | ||
2095 | restart: | |
2096 | queue_work(priv->workqueue, &priv->restart); | |
2097 | } | |
2098 | ||
4e39317d | 2099 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 2100 | |
c79dd5b5 | 2101 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2102 | { |
2103 | unsigned long flags; | |
2104 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
b481de9c ZY |
2105 | |
2106 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
2107 | ||
b481de9c ZY |
2108 | if (!exit_pending) |
2109 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
2110 | ||
ab53d8af MA |
2111 | iwl_leds_unregister(priv); |
2112 | ||
37deb2a0 | 2113 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2114 | |
2115 | /* Unblock any waiting calls */ | |
2116 | wake_up_interruptible_all(&priv->wait_command_queue); | |
2117 | ||
b481de9c ZY |
2118 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
2119 | * exiting the module */ | |
2120 | if (!exit_pending) | |
2121 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
2122 | ||
2123 | /* stop and reset the on-board processor */ | |
3395f6e9 | 2124 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
2125 | |
2126 | /* tell the device to stop sending interrupts */ | |
0359facc | 2127 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 2128 | iwl4965_disable_interrupts(priv); |
0359facc MA |
2129 | spin_unlock_irqrestore(&priv->lock, flags); |
2130 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
2131 | |
2132 | if (priv->mac80211_registered) | |
2133 | ieee80211_stop_queues(priv->hw); | |
2134 | ||
bb8c093b | 2135 | /* If we have not previously called iwl4965_init() then |
b481de9c | 2136 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 2137 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
2138 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
2139 | STATUS_RF_KILL_HW | | |
2140 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2141 | STATUS_RF_KILL_SW | | |
9788864e RC |
2142 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2143 | STATUS_GEO_CONFIGURED | | |
b481de9c | 2144 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
052ec3f1 MA |
2145 | STATUS_IN_SUSPEND | |
2146 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2147 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2148 | goto exit; |
2149 | } | |
2150 | ||
2151 | /* ...otherwise clear out all the status bits but the RF Kill and | |
2152 | * SUSPEND bits and continue taking the NIC down. */ | |
2153 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
2154 | STATUS_RF_KILL_HW | | |
2155 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
2156 | STATUS_RF_KILL_SW | | |
9788864e RC |
2157 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
2158 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
2159 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
2160 | STATUS_IN_SUSPEND | | |
2161 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
052ec3f1 MA |
2162 | STATUS_FW_ERROR | |
2163 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | |
2164 | STATUS_EXIT_PENDING; | |
b481de9c ZY |
2165 | |
2166 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2167 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 2168 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
2169 | spin_unlock_irqrestore(&priv->lock, flags); |
2170 | ||
da1bc453 | 2171 | iwl_txq_ctx_stop(priv); |
b3bbacb7 | 2172 | iwl_rxq_stop(priv); |
b481de9c ZY |
2173 | |
2174 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2175 | if (!iwl_grab_nic_access(priv)) { |
2176 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 2177 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 2178 | iwl_release_nic_access(priv); |
b481de9c ZY |
2179 | } |
2180 | spin_unlock_irqrestore(&priv->lock, flags); | |
2181 | ||
2182 | udelay(5); | |
2183 | ||
7f066108 | 2184 | /* FIXME: apm_ops.suspend(priv) */ |
d535311e GG |
2185 | if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status)) |
2186 | priv->cfg->ops->lib->apm_ops.stop(priv); | |
2187 | else | |
2188 | priv->cfg->ops->lib->apm_ops.reset(priv); | |
399f4900 | 2189 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
2190 | |
2191 | exit: | |
885ba202 | 2192 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); |
b481de9c ZY |
2193 | |
2194 | if (priv->ibss_beacon) | |
2195 | dev_kfree_skb(priv->ibss_beacon); | |
2196 | priv->ibss_beacon = NULL; | |
2197 | ||
2198 | /* clear out any free frames */ | |
fcab423d | 2199 | iwl_clear_free_frames(priv); |
b481de9c ZY |
2200 | } |
2201 | ||
c79dd5b5 | 2202 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
2203 | { |
2204 | mutex_lock(&priv->mutex); | |
bb8c093b | 2205 | __iwl4965_down(priv); |
b481de9c | 2206 | mutex_unlock(&priv->mutex); |
b24d22b1 | 2207 | |
4e39317d | 2208 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
2209 | } |
2210 | ||
2211 | #define MAX_HW_RESTARTS 5 | |
2212 | ||
c79dd5b5 | 2213 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 2214 | { |
57aab75a TW |
2215 | int i; |
2216 | int ret; | |
b481de9c ZY |
2217 | |
2218 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
2219 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
2220 | return -EIO; | |
2221 | } | |
2222 | ||
e903fbd4 RC |
2223 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
2224 | IWL_ERROR("ucode not available for device bringup\n"); | |
2225 | return -EIO; | |
2226 | } | |
2227 | ||
e655b9f0 | 2228 | /* If platform's RF_KILL switch is NOT set to KILL */ |
c1842d61 | 2229 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
e655b9f0 | 2230 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2231 | else |
e655b9f0 | 2232 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
3bff19c2 | 2233 | |
c1842d61 TW |
2234 | if (iwl_is_rfkill(priv)) { |
2235 | iwl4965_enable_interrupts(priv); | |
3bff19c2 EG |
2236 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2237 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | |
c1842d61 | 2238 | return 0; |
b481de9c ZY |
2239 | } |
2240 | ||
3395f6e9 | 2241 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 2242 | |
399f4900 RR |
2243 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
2244 | if (ret) { | |
2245 | IWL_ERROR("Unable to allocate shared memory\n"); | |
2246 | return ret; | |
2247 | } | |
2248 | ||
1053d35f | 2249 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
2250 | if (ret) { |
2251 | IWL_ERROR("Unable to init nic\n"); | |
2252 | return ret; | |
b481de9c ZY |
2253 | } |
2254 | ||
2255 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2256 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2257 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
2258 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2259 | ||
2260 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 2261 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 2262 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
2263 | |
2264 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
2265 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2266 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
2267 | |
2268 | /* Copy original ucode data image from disk into backup cache. | |
2269 | * This will be used to initialize the on-board processor's | |
2270 | * data SRAM for a clean start when the runtime program first loads. */ | |
2271 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 2272 | priv->ucode_data.len); |
b481de9c | 2273 | |
b481de9c ZY |
2274 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2275 | ||
37deb2a0 | 2276 | iwl_clear_stations_table(priv); |
b481de9c ZY |
2277 | |
2278 | /* load bootstrap state machine, | |
2279 | * load bootstrap program into processor's memory, | |
2280 | * prepare to load the "initialize" uCode */ | |
57aab75a | 2281 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 2282 | |
57aab75a TW |
2283 | if (ret) { |
2284 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
2285 | continue; |
2286 | } | |
2287 | ||
f3d5b45b EG |
2288 | /* Clear out the uCode error bit if it is set */ |
2289 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
2290 | ||
b481de9c | 2291 | /* start card; "initialize" will load runtime ucode */ |
edcdf8b2 | 2292 | iwl4965_nic_start(priv); |
b481de9c | 2293 | |
b481de9c ZY |
2294 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
2295 | ||
2296 | return 0; | |
2297 | } | |
2298 | ||
2299 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 2300 | __iwl4965_down(priv); |
64e72c3e | 2301 | clear_bit(STATUS_EXIT_PENDING, &priv->status); |
b481de9c ZY |
2302 | |
2303 | /* tried to restart and config the device for as long as our | |
2304 | * patience could withstand */ | |
2305 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
2306 | return -EIO; | |
2307 | } | |
2308 | ||
2309 | ||
2310 | /***************************************************************************** | |
2311 | * | |
2312 | * Workqueue callbacks | |
2313 | * | |
2314 | *****************************************************************************/ | |
2315 | ||
4a4a9e81 | 2316 | static void iwl_bg_init_alive_start(struct work_struct *data) |
b481de9c | 2317 | { |
c79dd5b5 TW |
2318 | struct iwl_priv *priv = |
2319 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
2320 | |
2321 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2322 | return; | |
2323 | ||
2324 | mutex_lock(&priv->mutex); | |
f3ccc08c | 2325 | priv->cfg->ops->lib->init_alive_start(priv); |
b481de9c ZY |
2326 | mutex_unlock(&priv->mutex); |
2327 | } | |
2328 | ||
4a4a9e81 | 2329 | static void iwl_bg_alive_start(struct work_struct *data) |
b481de9c | 2330 | { |
c79dd5b5 TW |
2331 | struct iwl_priv *priv = |
2332 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
2333 | |
2334 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2335 | return; | |
2336 | ||
2337 | mutex_lock(&priv->mutex); | |
4a4a9e81 | 2338 | iwl_alive_start(priv); |
b481de9c | 2339 | mutex_unlock(&priv->mutex); |
10d0bd56 | 2340 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
b481de9c ZY |
2341 | } |
2342 | ||
bb8c093b | 2343 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 2344 | { |
c79dd5b5 | 2345 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
2346 | |
2347 | wake_up_interruptible(&priv->wait_command_queue); | |
2348 | ||
2349 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2350 | return; | |
2351 | ||
2352 | mutex_lock(&priv->mutex); | |
2353 | ||
fee1247a | 2354 | if (!iwl_is_rfkill(priv)) { |
f3d67999 | 2355 | IWL_DEBUG(IWL_DL_RF_KILL, |
b481de9c ZY |
2356 | "HW and/or SW RF Kill no longer active, restarting " |
2357 | "device\n"); | |
2358 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2359 | queue_work(priv->workqueue, &priv->restart); | |
2360 | } else { | |
ad97edd2 MA |
2361 | /* make sure mac80211 stop sending Tx frame */ |
2362 | if (priv->mac80211_registered) | |
2363 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2364 | |
2365 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
2366 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2367 | "disabled by SW switch\n"); | |
2368 | else | |
2369 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
2370 | "Kill switch must be turned off for " | |
2371 | "wireless networking to work.\n"); | |
2372 | } | |
2373 | mutex_unlock(&priv->mutex); | |
80fcc9e2 | 2374 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2375 | } |
2376 | ||
4419e39b AK |
2377 | static void iwl4965_bg_set_monitor(struct work_struct *work) |
2378 | { | |
2379 | struct iwl_priv *priv = container_of(work, | |
2380 | struct iwl_priv, set_monitor); | |
c46fbefa | 2381 | int ret; |
4419e39b AK |
2382 | |
2383 | IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n"); | |
2384 | ||
2385 | mutex_lock(&priv->mutex); | |
2386 | ||
05c914fe | 2387 | ret = iwl4965_set_mode(priv, NL80211_IFTYPE_MONITOR); |
c46fbefa AK |
2388 | |
2389 | if (ret) { | |
2390 | if (ret == -EAGAIN) | |
2391 | IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n"); | |
2392 | else | |
2393 | IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret); | |
2394 | } | |
4419e39b AK |
2395 | |
2396 | mutex_unlock(&priv->mutex); | |
2397 | } | |
2398 | ||
16e727e8 EG |
2399 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
2400 | { | |
2401 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
2402 | run_time_calib_work); | |
2403 | ||
2404 | mutex_lock(&priv->mutex); | |
2405 | ||
2406 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || | |
2407 | test_bit(STATUS_SCANNING, &priv->status)) { | |
2408 | mutex_unlock(&priv->mutex); | |
2409 | return; | |
2410 | } | |
2411 | ||
2412 | if (priv->start_calib) { | |
2413 | iwl_chain_noise_calibration(priv, &priv->statistics); | |
2414 | ||
2415 | iwl_sensitivity_calibration(priv, &priv->statistics); | |
2416 | } | |
2417 | ||
2418 | mutex_unlock(&priv->mutex); | |
2419 | return; | |
2420 | } | |
2421 | ||
bb8c093b | 2422 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 2423 | { |
c79dd5b5 | 2424 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
2425 | |
2426 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2427 | return; | |
2428 | ||
2429 | mutex_lock(&priv->mutex); | |
bb8c093b | 2430 | __iwl4965_up(priv); |
b481de9c | 2431 | mutex_unlock(&priv->mutex); |
80fcc9e2 | 2432 | iwl_rfkill_set_hw_state(priv); |
b481de9c ZY |
2433 | } |
2434 | ||
bb8c093b | 2435 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 2436 | { |
c79dd5b5 | 2437 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
2438 | |
2439 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2440 | return; | |
2441 | ||
bb8c093b | 2442 | iwl4965_down(priv); |
b481de9c ZY |
2443 | queue_work(priv->workqueue, &priv->up); |
2444 | } | |
2445 | ||
bb8c093b | 2446 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 2447 | { |
c79dd5b5 TW |
2448 | struct iwl_priv *priv = |
2449 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
2450 | |
2451 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2452 | return; | |
2453 | ||
2454 | mutex_lock(&priv->mutex); | |
a55360e4 | 2455 | iwl_rx_replenish(priv); |
b481de9c ZY |
2456 | mutex_unlock(&priv->mutex); |
2457 | } | |
2458 | ||
7878a5a4 MA |
2459 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
2460 | ||
508e32e1 | 2461 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 2462 | { |
b481de9c | 2463 | struct ieee80211_conf *conf = NULL; |
857485c0 | 2464 | int ret = 0; |
1ff50bda | 2465 | unsigned long flags; |
b481de9c | 2466 | |
05c914fe | 2467 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
3ac7f146 | 2468 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
b481de9c ZY |
2469 | return; |
2470 | } | |
2471 | ||
e174961c JB |
2472 | IWL_DEBUG_ASSOC("Associated as %d to: %pM\n", |
2473 | priv->assoc_id, priv->active_rxon.bssid_addr); | |
b481de9c ZY |
2474 | |
2475 | ||
2476 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2477 | return; | |
2478 | ||
b481de9c | 2479 | |
508e32e1 | 2480 | if (!priv->vif || !priv->is_open) |
948c171c | 2481 | return; |
508e32e1 | 2482 | |
c90a74ba | 2483 | iwl_power_cancel_timeout(priv); |
2a421b91 | 2484 | iwl_scan_cancel_timeout(priv, 200); |
052c4b9f | 2485 | |
b481de9c ZY |
2486 | conf = ieee80211_get_hw_conf(priv->hw); |
2487 | ||
2488 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2489 | iwl4965_commit_rxon(priv); |
b481de9c | 2490 | |
bb8c093b CH |
2491 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2492 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2493 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2494 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2495 | if (ret) |
b481de9c ZY |
2496 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2497 | "Attempting to continue.\n"); | |
2498 | ||
2499 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
2500 | ||
42eb7c64 | 2501 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
4f85f5b3 | 2502 | |
c7de35cd | 2503 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2504 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
2505 | ||
2506 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
2507 | priv->assoc_id, priv->beacon_int); | |
2508 | ||
2509 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2510 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2511 | else | |
2512 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2513 | ||
2514 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2515 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2516 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2517 | else | |
2518 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2519 | ||
05c914fe | 2520 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2521 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2522 | ||
2523 | } | |
2524 | ||
bb8c093b | 2525 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2526 | |
2527 | switch (priv->iw_mode) { | |
05c914fe | 2528 | case NL80211_IFTYPE_STATION: |
b481de9c ZY |
2529 | break; |
2530 | ||
05c914fe | 2531 | case NL80211_IFTYPE_ADHOC: |
b481de9c | 2532 | |
c46fbefa AK |
2533 | /* assume default assoc id */ |
2534 | priv->assoc_id = 1; | |
b481de9c | 2535 | |
4f40e4d9 | 2536 | iwl_rxon_add_station(priv, priv->bssid, 0); |
bb8c093b | 2537 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2538 | |
2539 | break; | |
2540 | ||
2541 | default: | |
2542 | IWL_ERROR("%s Should not be called in %d mode\n", | |
3ac7f146 | 2543 | __func__, priv->iw_mode); |
b481de9c ZY |
2544 | break; |
2545 | } | |
2546 | ||
05c914fe | 2547 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2548 | priv->assoc_station_added = 1; |
2549 | ||
1ff50bda EG |
2550 | spin_lock_irqsave(&priv->lock, flags); |
2551 | iwl_activate_qos(priv, 0); | |
2552 | spin_unlock_irqrestore(&priv->lock, flags); | |
292ae174 | 2553 | |
04816448 GE |
2554 | /* the chain noise calibration will enabled PM upon completion |
2555 | * If chain noise has already been run, then we need to enable | |
2556 | * power management here */ | |
2557 | if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE) | |
2558 | iwl_power_enable_management(priv); | |
c90a74ba EG |
2559 | |
2560 | /* Enable Rx differential gain and sensitivity calibrations */ | |
2561 | iwl_chain_noise_reset(priv); | |
2562 | priv->start_calib = 1; | |
2563 | ||
508e32e1 RC |
2564 | } |
2565 | ||
b481de9c ZY |
2566 | /***************************************************************************** |
2567 | * | |
2568 | * mac80211 entry point functions | |
2569 | * | |
2570 | *****************************************************************************/ | |
2571 | ||
154b25ce | 2572 | #define UCODE_READY_TIMEOUT (4 * HZ) |
5a66926a | 2573 | |
bb8c093b | 2574 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 2575 | { |
c79dd5b5 | 2576 | struct iwl_priv *priv = hw->priv; |
5a66926a | 2577 | int ret; |
cf88c433 | 2578 | u16 pci_cmd; |
b481de9c ZY |
2579 | |
2580 | IWL_DEBUG_MAC80211("enter\n"); | |
2581 | ||
5a66926a ZY |
2582 | if (pci_enable_device(priv->pci_dev)) { |
2583 | IWL_ERROR("Fail to pci_enable_device\n"); | |
2584 | return -ENODEV; | |
2585 | } | |
2586 | pci_restore_state(priv->pci_dev); | |
2587 | pci_enable_msi(priv->pci_dev); | |
2588 | ||
cf88c433 TW |
2589 | /* enable interrupts if needed: hw bug w/a */ |
2590 | pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); | |
2591 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { | |
2592 | pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
2593 | pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); | |
2594 | } | |
2595 | ||
5a66926a ZY |
2596 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, |
2597 | DRV_NAME, priv); | |
2598 | if (ret) { | |
2599 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
2600 | goto out_disable_msi; | |
2601 | } | |
2602 | ||
b481de9c ZY |
2603 | /* we should be verifying the device is ready to be opened */ |
2604 | mutex_lock(&priv->mutex); | |
2605 | ||
c1adf9fb | 2606 | memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd)); |
5a66926a ZY |
2607 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... |
2608 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 2609 | |
5a66926a ZY |
2610 | if (!priv->ucode_code.len) { |
2611 | ret = iwl4965_read_ucode(priv); | |
2612 | if (ret) { | |
2613 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
2614 | mutex_unlock(&priv->mutex); | |
2615 | goto out_release_irq; | |
2616 | } | |
2617 | } | |
b481de9c | 2618 | |
e655b9f0 | 2619 | ret = __iwl4965_up(priv); |
5a66926a | 2620 | |
b481de9c | 2621 | mutex_unlock(&priv->mutex); |
5a66926a | 2622 | |
80fcc9e2 AG |
2623 | iwl_rfkill_set_hw_state(priv); |
2624 | ||
e655b9f0 ZY |
2625 | if (ret) |
2626 | goto out_release_irq; | |
2627 | ||
c1842d61 TW |
2628 | if (iwl_is_rfkill(priv)) |
2629 | goto out; | |
2630 | ||
e655b9f0 ZY |
2631 | IWL_DEBUG_INFO("Start UP work done.\n"); |
2632 | ||
2633 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
2634 | return 0; | |
2635 | ||
fe9b6b72 | 2636 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5a66926a | 2637 | * mac80211 will not be run successfully. */ |
154b25ce EG |
2638 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, |
2639 | test_bit(STATUS_READY, &priv->status), | |
2640 | UCODE_READY_TIMEOUT); | |
2641 | if (!ret) { | |
2642 | if (!test_bit(STATUS_READY, &priv->status)) { | |
2643 | IWL_ERROR("START_ALIVE timeout after %dms.\n", | |
2644 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
2645 | ret = -ETIMEDOUT; | |
2646 | goto out_release_irq; | |
5a66926a | 2647 | } |
fe9b6b72 | 2648 | } |
0a078ffa | 2649 | |
c1842d61 | 2650 | out: |
0a078ffa | 2651 | priv->is_open = 1; |
b481de9c ZY |
2652 | IWL_DEBUG_MAC80211("leave\n"); |
2653 | return 0; | |
5a66926a ZY |
2654 | |
2655 | out_release_irq: | |
2656 | free_irq(priv->pci_dev->irq, priv); | |
2657 | out_disable_msi: | |
2658 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
2659 | pci_disable_device(priv->pci_dev); |
2660 | priv->is_open = 0; | |
2661 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 2662 | return ret; |
b481de9c ZY |
2663 | } |
2664 | ||
bb8c093b | 2665 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 2666 | { |
c79dd5b5 | 2667 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2668 | |
2669 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 2670 | |
e655b9f0 ZY |
2671 | if (!priv->is_open) { |
2672 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
2673 | return; | |
2674 | } | |
2675 | ||
b481de9c | 2676 | priv->is_open = 0; |
5a66926a | 2677 | |
fee1247a | 2678 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
2679 | /* stop mac, cancel any scan request and clear |
2680 | * RXON_FILTER_ASSOC_MSK BIT | |
2681 | */ | |
5a66926a | 2682 | mutex_lock(&priv->mutex); |
2a421b91 | 2683 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f | 2684 | mutex_unlock(&priv->mutex); |
fde3571f MA |
2685 | } |
2686 | ||
5a66926a ZY |
2687 | iwl4965_down(priv); |
2688 | ||
2689 | flush_workqueue(priv->workqueue); | |
2690 | free_irq(priv->pci_dev->irq, priv); | |
2691 | pci_disable_msi(priv->pci_dev); | |
2692 | pci_save_state(priv->pci_dev); | |
2693 | pci_disable_device(priv->pci_dev); | |
948c171c | 2694 | |
b481de9c | 2695 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2696 | } |
2697 | ||
e039fa4a | 2698 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 2699 | { |
c79dd5b5 | 2700 | struct iwl_priv *priv = hw->priv; |
b481de9c | 2701 | |
f3674227 | 2702 | IWL_DEBUG_MACDUMP("enter\n"); |
b481de9c | 2703 | |
b481de9c | 2704 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
e039fa4a | 2705 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
b481de9c | 2706 | |
e039fa4a | 2707 | if (iwl_tx_skb(priv, skb)) |
b481de9c ZY |
2708 | dev_kfree_skb_any(skb); |
2709 | ||
f3674227 | 2710 | IWL_DEBUG_MACDUMP("leave\n"); |
b481de9c ZY |
2711 | return 0; |
2712 | } | |
2713 | ||
bb8c093b | 2714 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
2715 | struct ieee80211_if_init_conf *conf) |
2716 | { | |
c79dd5b5 | 2717 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2718 | unsigned long flags; |
2719 | ||
32bfd35d | 2720 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 2721 | |
32bfd35d JB |
2722 | if (priv->vif) { |
2723 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 2724 | return -EOPNOTSUPP; |
b481de9c ZY |
2725 | } |
2726 | ||
2727 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 2728 | priv->vif = conf->vif; |
b481de9c ZY |
2729 | |
2730 | spin_unlock_irqrestore(&priv->lock, flags); | |
2731 | ||
2732 | mutex_lock(&priv->mutex); | |
864792e3 TW |
2733 | |
2734 | if (conf->mac_addr) { | |
e174961c | 2735 | IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr); |
864792e3 TW |
2736 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
2737 | } | |
b481de9c | 2738 | |
c46fbefa AK |
2739 | if (iwl4965_set_mode(priv, conf->type) == -EAGAIN) |
2740 | /* we are not ready, will run again when ready */ | |
2741 | set_bit(STATUS_MODE_PENDING, &priv->status); | |
5a66926a | 2742 | |
b481de9c ZY |
2743 | mutex_unlock(&priv->mutex); |
2744 | ||
5a66926a | 2745 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
2746 | return 0; |
2747 | } | |
2748 | ||
2749 | /** | |
bb8c093b | 2750 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
2751 | * |
2752 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
2753 | * be set inappropriately and the driver currently sets the hardware up to | |
2754 | * use it whenever needed. | |
2755 | */ | |
bb8c093b | 2756 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 2757 | { |
c79dd5b5 | 2758 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 2759 | const struct iwl_channel_info *ch_info; |
b481de9c | 2760 | unsigned long flags; |
76bb77e0 | 2761 | int ret = 0; |
82a66bbb | 2762 | u16 channel; |
b481de9c ZY |
2763 | |
2764 | mutex_lock(&priv->mutex); | |
8318d78a | 2765 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 2766 | |
14a08a7f | 2767 | if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) { |
64e72c3e | 2768 | IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n"); |
14a08a7f | 2769 | goto out; |
64e72c3e MA |
2770 | } |
2771 | ||
14a08a7f EG |
2772 | if (!conf->radio_enabled) |
2773 | iwl_radio_kill_sw_disable_radio(priv); | |
2774 | ||
fee1247a | 2775 | if (!iwl_is_ready(priv)) { |
b481de9c | 2776 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
2777 | ret = -EIO; |
2778 | goto out; | |
b481de9c ZY |
2779 | } |
2780 | ||
1ea87396 | 2781 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 2782 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 | 2783 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
b481de9c | 2784 | mutex_unlock(&priv->mutex); |
a0646470 | 2785 | return 0; |
b481de9c ZY |
2786 | } |
2787 | ||
82a66bbb TW |
2788 | channel = ieee80211_frequency_to_channel(conf->channel->center_freq); |
2789 | ch_info = iwl_get_channel_info(priv, conf->channel->band, channel); | |
b481de9c | 2790 | if (!is_channel_valid(ch_info)) { |
b481de9c | 2791 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
76bb77e0 ZY |
2792 | ret = -EINVAL; |
2793 | goto out; | |
b481de9c ZY |
2794 | } |
2795 | ||
05c914fe | 2796 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
398f9e76 AK |
2797 | !is_channel_ibss(ch_info)) { |
2798 | IWL_ERROR("channel %d in band %d not IBSS channel\n", | |
2799 | conf->channel->hw_value, conf->channel->band); | |
2800 | ret = -EINVAL; | |
2801 | goto out; | |
2802 | } | |
2803 | ||
82a66bbb TW |
2804 | spin_lock_irqsave(&priv->lock, flags); |
2805 | ||
b5d7be5e | 2806 | |
78330fdd | 2807 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
2808 | * from any ht related info since 2.4 does not |
2809 | * support ht */ | |
82a66bbb | 2810 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) |
b481de9c ZY |
2811 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
2812 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
2813 | #endif | |
2814 | ) | |
2815 | priv->staging_rxon.flags = 0; | |
b481de9c | 2816 | |
17e72782 | 2817 | iwl_set_rxon_channel(priv, conf->channel); |
b481de9c | 2818 | |
82a66bbb | 2819 | iwl_set_flags_for_band(priv, conf->channel->band); |
b481de9c ZY |
2820 | |
2821 | /* The list of supported rates and rate mask can be different | |
8318d78a | 2822 | * for each band; since the band may have changed, reset |
b481de9c | 2823 | * the rate mask to what mac80211 lists */ |
bb8c093b | 2824 | iwl4965_set_rate(priv); |
b481de9c ZY |
2825 | |
2826 | spin_unlock_irqrestore(&priv->lock, flags); | |
2827 | ||
2828 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
2829 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 2830 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 2831 | goto out; |
b481de9c ZY |
2832 | } |
2833 | #endif | |
2834 | ||
b481de9c ZY |
2835 | if (!conf->radio_enabled) { |
2836 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 2837 | goto out; |
b481de9c ZY |
2838 | } |
2839 | ||
fee1247a | 2840 | if (iwl_is_rfkill(priv)) { |
b481de9c | 2841 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
2842 | ret = -EIO; |
2843 | goto out; | |
b481de9c ZY |
2844 | } |
2845 | ||
e602cb18 EK |
2846 | if (conf->flags & IEEE80211_CONF_PS) |
2847 | ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3); | |
2848 | else | |
2849 | ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM); | |
2850 | if (ret) | |
2851 | IWL_DEBUG_MAC80211("Error setting power level\n"); | |
2852 | ||
630fe9b6 TW |
2853 | IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n", |
2854 | priv->tx_power_user_lmt, conf->power_level); | |
2855 | ||
2856 | iwl_set_tx_power(priv, conf->power_level, false); | |
2857 | ||
bb8c093b | 2858 | iwl4965_set_rate(priv); |
b481de9c ZY |
2859 | |
2860 | if (memcmp(&priv->active_rxon, | |
2861 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 2862 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2863 | else |
2864 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
2865 | ||
2866 | IWL_DEBUG_MAC80211("leave\n"); | |
2867 | ||
a0646470 | 2868 | out: |
5a66926a | 2869 | mutex_unlock(&priv->mutex); |
76bb77e0 | 2870 | return ret; |
b481de9c ZY |
2871 | } |
2872 | ||
c79dd5b5 | 2873 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 2874 | { |
857485c0 | 2875 | int ret = 0; |
1ff50bda | 2876 | unsigned long flags; |
b481de9c | 2877 | |
d986bcd1 | 2878 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
2879 | return; |
2880 | ||
2881 | /* The following should be done only at AP bring up */ | |
5d1e2325 | 2882 | if (!(iwl_is_associated(priv))) { |
b481de9c ZY |
2883 | |
2884 | /* RXON - unassoc (to set timing command) */ | |
2885 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2886 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2887 | |
2888 | /* RXON Timing */ | |
bb8c093b CH |
2889 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
2890 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 2891 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 2892 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 2893 | if (ret) |
b481de9c ZY |
2894 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
2895 | "Attempting to continue.\n"); | |
2896 | ||
c7de35cd | 2897 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
2898 | |
2899 | /* FIXME: what should be the assoc_id for AP? */ | |
2900 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
2901 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
2902 | priv->staging_rxon.flags |= | |
2903 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
2904 | else | |
2905 | priv->staging_rxon.flags &= | |
2906 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2907 | ||
2908 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
2909 | if (priv->assoc_capability & | |
2910 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
2911 | priv->staging_rxon.flags |= | |
2912 | RXON_FLG_SHORT_SLOT_MSK; | |
2913 | else | |
2914 | priv->staging_rxon.flags &= | |
2915 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2916 | ||
05c914fe | 2917 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC) |
b481de9c ZY |
2918 | priv->staging_rxon.flags &= |
2919 | ~RXON_FLG_SHORT_SLOT_MSK; | |
2920 | } | |
2921 | /* restore RXON assoc */ | |
2922 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 2923 | iwl4965_commit_rxon(priv); |
1ff50bda EG |
2924 | spin_lock_irqsave(&priv->lock, flags); |
2925 | iwl_activate_qos(priv, 1); | |
2926 | spin_unlock_irqrestore(&priv->lock, flags); | |
4f40e4d9 | 2927 | iwl_rxon_add_station(priv, iwl_bcast_addr, 0); |
e1493deb | 2928 | } |
bb8c093b | 2929 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2930 | |
2931 | /* FIXME - we need to add code here to detect a totally new | |
2932 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
2933 | * clear sta table, add BCAST sta... */ | |
2934 | } | |
2935 | ||
9d139c81 JB |
2936 | /* temporary */ |
2937 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb); | |
2938 | ||
32bfd35d JB |
2939 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
2940 | struct ieee80211_vif *vif, | |
b481de9c ZY |
2941 | struct ieee80211_if_conf *conf) |
2942 | { | |
c79dd5b5 | 2943 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
2944 | unsigned long flags; |
2945 | int rc; | |
2946 | ||
2947 | if (conf == NULL) | |
2948 | return -EIO; | |
2949 | ||
b716bb91 EG |
2950 | if (priv->vif != vif) { |
2951 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
2952 | return 0; |
2953 | } | |
2954 | ||
05c914fe | 2955 | if (priv->iw_mode == NL80211_IFTYPE_ADHOC && |
9d139c81 JB |
2956 | conf->changed & IEEE80211_IFCC_BEACON) { |
2957 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
2958 | if (!beacon) | |
2959 | return -ENOMEM; | |
2960 | rc = iwl4965_mac_beacon_update(hw, beacon); | |
2961 | if (rc) | |
2962 | return rc; | |
2963 | } | |
2964 | ||
05c914fe | 2965 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && |
9d139c81 | 2966 | (!conf->ssid_len)) { |
b481de9c ZY |
2967 | IWL_DEBUG_MAC80211 |
2968 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
2969 | return 0; | |
2970 | } | |
2971 | ||
fee1247a | 2972 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
2973 | return -EAGAIN; |
2974 | ||
b481de9c ZY |
2975 | mutex_lock(&priv->mutex); |
2976 | ||
b481de9c | 2977 | if (conf->bssid) |
e174961c | 2978 | IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid); |
b481de9c | 2979 | |
4150c572 JB |
2980 | /* |
2981 | * very dubious code was here; the probe filtering flag is never set: | |
2982 | * | |
b481de9c ZY |
2983 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
2984 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 2985 | */ |
b481de9c | 2986 | |
05c914fe | 2987 | if (priv->iw_mode == NL80211_IFTYPE_AP) { |
b481de9c ZY |
2988 | if (!conf->bssid) { |
2989 | conf->bssid = priv->mac_addr; | |
2990 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
e174961c JB |
2991 | IWL_DEBUG_MAC80211("bssid was set to: %pM\n", |
2992 | conf->bssid); | |
b481de9c ZY |
2993 | } |
2994 | if (priv->ibss_beacon) | |
2995 | dev_kfree_skb(priv->ibss_beacon); | |
2996 | ||
9d139c81 | 2997 | priv->ibss_beacon = ieee80211_beacon_get(hw, vif); |
b481de9c ZY |
2998 | } |
2999 | ||
fee1247a | 3000 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
3001 | goto done; |
3002 | ||
b481de9c ZY |
3003 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
3004 | !is_multicast_ether_addr(conf->bssid)) { | |
3005 | /* If there is currently a HW scan going on in the background | |
3006 | * then we need to cancel it else the RXON below will fail. */ | |
2a421b91 | 3007 | if (iwl_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
3008 | IWL_WARNING("Aborted scan still in progress " |
3009 | "after 100ms\n"); | |
3010 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
3011 | mutex_unlock(&priv->mutex); | |
3012 | return -EAGAIN; | |
3013 | } | |
3014 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
3015 | ||
3016 | /* TODO: Audit driver for usage of these members and see | |
3017 | * if mac80211 deprecates them (priv->bssid looks like it | |
3018 | * shouldn't be there, but I haven't scanned the IBSS code | |
3019 | * to verify) - jpk */ | |
3020 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
3021 | ||
05c914fe | 3022 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
bb8c093b | 3023 | iwl4965_config_ap(priv); |
b481de9c | 3024 | else { |
bb8c093b | 3025 | rc = iwl4965_commit_rxon(priv); |
05c914fe | 3026 | if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc) |
4f40e4d9 | 3027 | iwl_rxon_add_station( |
b481de9c ZY |
3028 | priv, priv->active_rxon.bssid_addr, 1); |
3029 | } | |
3030 | ||
3031 | } else { | |
2a421b91 | 3032 | iwl_scan_cancel_timeout(priv, 100); |
b481de9c | 3033 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3034 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3035 | } |
3036 | ||
fde3571f | 3037 | done: |
b481de9c ZY |
3038 | spin_lock_irqsave(&priv->lock, flags); |
3039 | if (!conf->ssid_len) | |
3040 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3041 | else | |
3042 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
3043 | ||
3044 | priv->essid_len = conf->ssid_len; | |
3045 | spin_unlock_irqrestore(&priv->lock, flags); | |
3046 | ||
3047 | IWL_DEBUG_MAC80211("leave\n"); | |
3048 | mutex_unlock(&priv->mutex); | |
3049 | ||
3050 | return 0; | |
3051 | } | |
3052 | ||
bb8c093b | 3053 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
3054 | unsigned int changed_flags, |
3055 | unsigned int *total_flags, | |
3056 | int mc_count, struct dev_addr_list *mc_list) | |
3057 | { | |
4419e39b | 3058 | struct iwl_priv *priv = hw->priv; |
25b3f57c RF |
3059 | |
3060 | if (changed_flags & (*total_flags) & FIF_OTHER_BSS) { | |
3061 | IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n", | |
05c914fe | 3062 | NL80211_IFTYPE_MONITOR, |
25b3f57c RF |
3063 | changed_flags, *total_flags); |
3064 | /* queue work 'cuz mac80211 is holding a lock which | |
3065 | * prevents us from issuing (synchronous) f/w cmds */ | |
3066 | queue_work(priv->workqueue, &priv->set_monitor); | |
4419e39b | 3067 | } |
25b3f57c RF |
3068 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | |
3069 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | |
4150c572 JB |
3070 | } |
3071 | ||
bb8c093b | 3072 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
3073 | struct ieee80211_if_init_conf *conf) |
3074 | { | |
c79dd5b5 | 3075 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3076 | |
3077 | IWL_DEBUG_MAC80211("enter\n"); | |
3078 | ||
3079 | mutex_lock(&priv->mutex); | |
948c171c | 3080 | |
fee1247a | 3081 | if (iwl_is_ready_rf(priv)) { |
2a421b91 | 3082 | iwl_scan_cancel_timeout(priv, 100); |
fde3571f MA |
3083 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
3084 | iwl4965_commit_rxon(priv); | |
3085 | } | |
32bfd35d JB |
3086 | if (priv->vif == conf->vif) { |
3087 | priv->vif = NULL; | |
b481de9c ZY |
3088 | memset(priv->bssid, 0, ETH_ALEN); |
3089 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
3090 | priv->essid_len = 0; | |
3091 | } | |
3092 | mutex_unlock(&priv->mutex); | |
3093 | ||
3094 | IWL_DEBUG_MAC80211("leave\n"); | |
3095 | ||
3096 | } | |
471b3efd | 3097 | |
3109ece1 | 3098 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
3099 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
3100 | struct ieee80211_vif *vif, | |
3101 | struct ieee80211_bss_conf *bss_conf, | |
3102 | u32 changes) | |
220173b0 | 3103 | { |
c79dd5b5 | 3104 | struct iwl_priv *priv = hw->priv; |
220173b0 | 3105 | |
3109ece1 TW |
3106 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
3107 | ||
471b3efd | 3108 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
3109 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
3110 | bss_conf->use_short_preamble); | |
471b3efd | 3111 | if (bss_conf->use_short_preamble) |
220173b0 TW |
3112 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3113 | else | |
3114 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
3115 | } | |
3116 | ||
471b3efd | 3117 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 3118 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 3119 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
3120 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
3121 | else | |
3122 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
3123 | } | |
3124 | ||
98952d5d | 3125 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 3126 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 3127 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 3128 | iwl_set_rxon_chain(priv); |
98952d5d TW |
3129 | } |
3130 | ||
471b3efd | 3131 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 3132 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
3133 | /* This should never happen as this function should |
3134 | * never be called from interrupt context. */ | |
3135 | if (WARN_ON_ONCE(in_interrupt())) | |
3136 | return; | |
3109ece1 TW |
3137 | if (bss_conf->assoc) { |
3138 | priv->assoc_id = bss_conf->aid; | |
3139 | priv->beacon_int = bss_conf->beacon_int; | |
b5d7be5e | 3140 | priv->power_data.dtim_period = bss_conf->dtim_period; |
3109ece1 TW |
3141 | priv->timestamp = bss_conf->timestamp; |
3142 | priv->assoc_capability = bss_conf->assoc_capability; | |
9ccacb86 TW |
3143 | |
3144 | /* we have just associated, don't start scan too early | |
3145 | * leave time for EAPOL exchange to complete | |
3146 | */ | |
3109ece1 TW |
3147 | priv->next_scan_jiffies = jiffies + |
3148 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
3149 | mutex_lock(&priv->mutex); |
3150 | iwl4965_post_associate(priv); | |
3151 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
3152 | } else { |
3153 | priv->assoc_id = 0; | |
3154 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
3155 | } | |
3156 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
3157 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 3158 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
3159 | } |
3160 | ||
220173b0 | 3161 | } |
b481de9c | 3162 | |
cb43dc25 | 3163 | static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len) |
b481de9c | 3164 | { |
b481de9c | 3165 | unsigned long flags; |
c79dd5b5 | 3166 | struct iwl_priv *priv = hw->priv; |
8d09a5e1 | 3167 | int ret; |
b481de9c ZY |
3168 | |
3169 | IWL_DEBUG_MAC80211("enter\n"); | |
3170 | ||
052c4b9f | 3171 | mutex_lock(&priv->mutex); |
b481de9c ZY |
3172 | spin_lock_irqsave(&priv->lock, flags); |
3173 | ||
fee1247a | 3174 | if (!iwl_is_ready_rf(priv)) { |
cb43dc25 | 3175 | ret = -EIO; |
b481de9c ZY |
3176 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); |
3177 | goto out_unlock; | |
3178 | } | |
3179 | ||
05c914fe | 3180 | if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */ |
cb43dc25 | 3181 | ret = -EIO; |
b481de9c ZY |
3182 | IWL_ERROR("ERROR: APs don't scan\n"); |
3183 | goto out_unlock; | |
3184 | } | |
3185 | ||
8d09a5e1 TW |
3186 | /* We don't schedule scan within next_scan_jiffies period. |
3187 | * Avoid scanning during possible EAPOL exchange, return | |
3188 | * success immediately. | |
3189 | */ | |
7878a5a4 | 3190 | if (priv->next_scan_jiffies && |
cb43dc25 | 3191 | time_after(priv->next_scan_jiffies, jiffies)) { |
681c0050 | 3192 | IWL_DEBUG_SCAN("scan rejected: within next scan period\n"); |
8d09a5e1 TW |
3193 | queue_work(priv->workqueue, &priv->scan_completed); |
3194 | ret = 0; | |
7878a5a4 MA |
3195 | goto out_unlock; |
3196 | } | |
8d09a5e1 | 3197 | |
b481de9c | 3198 | /* if we just finished scan ask for delay */ |
681c0050 | 3199 | if (iwl_is_associated(priv) && priv->last_scan_jiffies && |
cb43dc25 | 3200 | time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) { |
681c0050 | 3201 | IWL_DEBUG_SCAN("scan rejected: within previous scan period\n"); |
8d09a5e1 TW |
3202 | queue_work(priv->workqueue, &priv->scan_completed); |
3203 | ret = 0; | |
b481de9c ZY |
3204 | goto out_unlock; |
3205 | } | |
8d09a5e1 | 3206 | |
cb43dc25 | 3207 | if (ssid_len) { |
b481de9c | 3208 | priv->one_direct_scan = 1; |
cb43dc25 | 3209 | priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE); |
b481de9c | 3210 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); |
cb43dc25 | 3211 | } else { |
948c171c | 3212 | priv->one_direct_scan = 0; |
cb43dc25 | 3213 | } |
b481de9c | 3214 | |
cb43dc25 | 3215 | ret = iwl_scan_initiate(priv); |
b481de9c ZY |
3216 | |
3217 | IWL_DEBUG_MAC80211("leave\n"); | |
3218 | ||
3219 | out_unlock: | |
3220 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 3221 | mutex_unlock(&priv->mutex); |
b481de9c | 3222 | |
cb43dc25 | 3223 | return ret; |
b481de9c ZY |
3224 | } |
3225 | ||
ab885f8c EG |
3226 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
3227 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
3228 | u32 iv32, u16 *phase1key) | |
3229 | { | |
3230 | struct iwl_priv *priv = hw->priv; | |
3231 | u8 sta_id = IWL_INVALID_STATION; | |
3232 | unsigned long flags; | |
3233 | __le16 key_flags = 0; | |
3234 | int i; | |
ab885f8c EG |
3235 | |
3236 | IWL_DEBUG_MAC80211("enter\n"); | |
3237 | ||
947b13a7 | 3238 | sta_id = iwl_find_station(priv, addr); |
ab885f8c | 3239 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3240 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3241 | addr); | |
ab885f8c EG |
3242 | return; |
3243 | } | |
3244 | ||
2a421b91 | 3245 | iwl_scan_cancel_timeout(priv, 100); |
ab885f8c EG |
3246 | |
3247 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
3248 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
3249 | key_flags &= ~STA_KEY_FLG_INVALID; | |
3250 | ||
5425e490 | 3251 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
3252 | key_flags |= STA_KEY_MULTICAST_MSK; |
3253 | ||
3254 | spin_lock_irqsave(&priv->sta_lock, flags); | |
3255 | ||
ab885f8c EG |
3256 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
3257 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
3258 | ||
3259 | for (i = 0; i < 5; i++) | |
3260 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
3261 | cpu_to_le16(phase1key[i]); | |
3262 | ||
3263 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
3264 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
3265 | ||
133636de | 3266 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
3267 | |
3268 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
3269 | ||
3270 | IWL_DEBUG_MAC80211("leave\n"); | |
3271 | } | |
3272 | ||
bb8c093b | 3273 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
3274 | const u8 *local_addr, const u8 *addr, |
3275 | struct ieee80211_key_conf *key) | |
3276 | { | |
c79dd5b5 | 3277 | struct iwl_priv *priv = hw->priv; |
deb09c43 EG |
3278 | int ret = 0; |
3279 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 3280 | u8 is_default_wep_key = 0; |
b481de9c ZY |
3281 | |
3282 | IWL_DEBUG_MAC80211("enter\n"); | |
3283 | ||
099b40b7 | 3284 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
3285 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
3286 | return -EOPNOTSUPP; | |
3287 | } | |
3288 | ||
3289 | if (is_zero_ether_addr(addr)) | |
3290 | /* only support pairwise keys */ | |
3291 | return -EOPNOTSUPP; | |
3292 | ||
947b13a7 | 3293 | sta_id = iwl_find_station(priv, addr); |
6974e363 | 3294 | if (sta_id == IWL_INVALID_STATION) { |
e174961c JB |
3295 | IWL_DEBUG_MAC80211("leave - %pM not in station map.\n", |
3296 | addr); | |
6974e363 | 3297 | return -EINVAL; |
b481de9c | 3298 | |
deb09c43 | 3299 | } |
b481de9c | 3300 | |
6974e363 | 3301 | mutex_lock(&priv->mutex); |
2a421b91 | 3302 | iwl_scan_cancel_timeout(priv, 100); |
6974e363 EG |
3303 | mutex_unlock(&priv->mutex); |
3304 | ||
3305 | /* If we are getting WEP group key and we didn't receive any key mapping | |
3306 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
3307 | * in 1X mode. | |
3308 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 3309 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
05c914fe | 3310 | priv->iw_mode != NL80211_IFTYPE_AP) { |
6974e363 EG |
3311 | if (cmd == SET_KEY) |
3312 | is_default_wep_key = !priv->key_mapping_key; | |
3313 | else | |
ccc038ab EG |
3314 | is_default_wep_key = |
3315 | (key->hw_key_idx == HW_KEY_DEFAULT); | |
6974e363 | 3316 | } |
052c4b9f | 3317 | |
b481de9c | 3318 | switch (cmd) { |
deb09c43 | 3319 | case SET_KEY: |
6974e363 EG |
3320 | if (is_default_wep_key) |
3321 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 3322 | else |
7480513f | 3323 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3324 | |
3325 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
3326 | break; |
3327 | case DISABLE_KEY: | |
6974e363 EG |
3328 | if (is_default_wep_key) |
3329 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 3330 | else |
3ec47732 | 3331 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
3332 | |
3333 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
3334 | break; |
3335 | default: | |
deb09c43 | 3336 | ret = -EINVAL; |
b481de9c ZY |
3337 | } |
3338 | ||
3339 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 3340 | |
deb09c43 | 3341 | return ret; |
b481de9c ZY |
3342 | } |
3343 | ||
e100bb64 | 3344 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
3345 | const struct ieee80211_tx_queue_params *params) |
3346 | { | |
c79dd5b5 | 3347 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3348 | unsigned long flags; |
3349 | int q; | |
b481de9c ZY |
3350 | |
3351 | IWL_DEBUG_MAC80211("enter\n"); | |
3352 | ||
fee1247a | 3353 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3354 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3355 | return -EIO; | |
3356 | } | |
3357 | ||
3358 | if (queue >= AC_NUM) { | |
3359 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
3360 | return 0; | |
3361 | } | |
3362 | ||
b481de9c ZY |
3363 | if (!priv->qos_data.qos_enable) { |
3364 | priv->qos_data.qos_active = 0; | |
3365 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
3366 | return 0; | |
3367 | } | |
3368 | q = AC_NUM - 1 - queue; | |
3369 | ||
3370 | spin_lock_irqsave(&priv->lock, flags); | |
3371 | ||
3372 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
3373 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
3374 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
3375 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 3376 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
3377 | |
3378 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
3379 | priv->qos_data.qos_active = 1; | |
3380 | ||
05c914fe | 3381 | if (priv->iw_mode == NL80211_IFTYPE_AP) |
1ff50bda | 3382 | iwl_activate_qos(priv, 1); |
3109ece1 | 3383 | else if (priv->assoc_id && iwl_is_associated(priv)) |
1ff50bda | 3384 | iwl_activate_qos(priv, 0); |
b481de9c | 3385 | |
1ff50bda | 3386 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3387 | |
b481de9c ZY |
3388 | IWL_DEBUG_MAC80211("leave\n"); |
3389 | return 0; | |
3390 | } | |
3391 | ||
d783b061 TW |
3392 | static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, |
3393 | enum ieee80211_ampdu_mlme_action action, | |
17741cdc | 3394 | struct ieee80211_sta *sta, u16 tid, u16 *ssn) |
d783b061 TW |
3395 | { |
3396 | struct iwl_priv *priv = hw->priv; | |
d783b061 | 3397 | |
e174961c JB |
3398 | IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n", |
3399 | sta->addr, tid); | |
d783b061 TW |
3400 | |
3401 | if (!(priv->cfg->sku & IWL_SKU_N)) | |
3402 | return -EACCES; | |
3403 | ||
3404 | switch (action) { | |
3405 | case IEEE80211_AMPDU_RX_START: | |
3406 | IWL_DEBUG_HT("start Rx\n"); | |
17741cdc | 3407 | return iwl_rx_agg_start(priv, sta->addr, tid, *ssn); |
d783b061 TW |
3408 | case IEEE80211_AMPDU_RX_STOP: |
3409 | IWL_DEBUG_HT("stop Rx\n"); | |
17741cdc | 3410 | return iwl_rx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3411 | case IEEE80211_AMPDU_TX_START: |
3412 | IWL_DEBUG_HT("start Tx\n"); | |
17741cdc | 3413 | return iwl_tx_agg_start(priv, sta->addr, tid, ssn); |
d783b061 TW |
3414 | case IEEE80211_AMPDU_TX_STOP: |
3415 | IWL_DEBUG_HT("stop Tx\n"); | |
17741cdc | 3416 | return iwl_tx_agg_stop(priv, sta->addr, tid); |
d783b061 TW |
3417 | default: |
3418 | IWL_DEBUG_HT("unknown\n"); | |
3419 | return -EINVAL; | |
3420 | break; | |
3421 | } | |
3422 | return 0; | |
3423 | } | |
bb8c093b | 3424 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3425 | struct ieee80211_tx_queue_stats *stats) |
3426 | { | |
c79dd5b5 | 3427 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3428 | int i, avail; |
16466903 | 3429 | struct iwl_tx_queue *txq; |
443cfd45 | 3430 | struct iwl_queue *q; |
b481de9c ZY |
3431 | unsigned long flags; |
3432 | ||
3433 | IWL_DEBUG_MAC80211("enter\n"); | |
3434 | ||
fee1247a | 3435 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3436 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3437 | return -EIO; | |
3438 | } | |
3439 | ||
3440 | spin_lock_irqsave(&priv->lock, flags); | |
3441 | ||
3442 | for (i = 0; i < AC_NUM; i++) { | |
3443 | txq = &priv->txq[i]; | |
3444 | q = &txq->q; | |
443cfd45 | 3445 | avail = iwl_queue_space(q); |
b481de9c | 3446 | |
57ffc589 JB |
3447 | stats[i].len = q->n_window - avail; |
3448 | stats[i].limit = q->n_window - q->high_mark; | |
3449 | stats[i].count = q->n_window; | |
b481de9c ZY |
3450 | |
3451 | } | |
3452 | spin_unlock_irqrestore(&priv->lock, flags); | |
3453 | ||
3454 | IWL_DEBUG_MAC80211("leave\n"); | |
3455 | ||
3456 | return 0; | |
3457 | } | |
3458 | ||
bb8c093b | 3459 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
3460 | struct ieee80211_low_level_stats *stats) |
3461 | { | |
bf403db8 EK |
3462 | struct iwl_priv *priv = hw->priv; |
3463 | ||
3464 | priv = hw->priv; | |
b481de9c ZY |
3465 | IWL_DEBUG_MAC80211("enter\n"); |
3466 | IWL_DEBUG_MAC80211("leave\n"); | |
3467 | ||
3468 | return 0; | |
3469 | } | |
3470 | ||
bb8c093b | 3471 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 3472 | { |
c79dd5b5 | 3473 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
3474 | unsigned long flags; |
3475 | ||
3476 | mutex_lock(&priv->mutex); | |
3477 | IWL_DEBUG_MAC80211("enter\n"); | |
3478 | ||
b481de9c | 3479 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 3480 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 3481 | spin_unlock_irqrestore(&priv->lock, flags); |
b481de9c | 3482 | |
c7de35cd | 3483 | iwl_reset_qos(priv); |
b481de9c | 3484 | |
b481de9c ZY |
3485 | spin_lock_irqsave(&priv->lock, flags); |
3486 | priv->assoc_id = 0; | |
3487 | priv->assoc_capability = 0; | |
b481de9c ZY |
3488 | priv->assoc_station_added = 0; |
3489 | ||
3490 | /* new association get rid of ibss beacon skb */ | |
3491 | if (priv->ibss_beacon) | |
3492 | dev_kfree_skb(priv->ibss_beacon); | |
3493 | ||
3494 | priv->ibss_beacon = NULL; | |
3495 | ||
3496 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 3497 | priv->timestamp = 0; |
05c914fe | 3498 | if ((priv->iw_mode == NL80211_IFTYPE_STATION)) |
b481de9c ZY |
3499 | priv->beacon_int = 0; |
3500 | ||
3501 | spin_unlock_irqrestore(&priv->lock, flags); | |
3502 | ||
fee1247a | 3503 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
3504 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
3505 | mutex_unlock(&priv->mutex); | |
3506 | return; | |
3507 | } | |
3508 | ||
052c4b9f | 3509 | /* we are restarting association process |
3510 | * clear RXON_FILTER_ASSOC_MSK bit | |
3511 | */ | |
05c914fe | 3512 | if (priv->iw_mode != NL80211_IFTYPE_AP) { |
2a421b91 | 3513 | iwl_scan_cancel_timeout(priv, 100); |
052c4b9f | 3514 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 3515 | iwl4965_commit_rxon(priv); |
052c4b9f | 3516 | } |
3517 | ||
5da4b55f MA |
3518 | iwl_power_update_mode(priv, 0); |
3519 | ||
b481de9c | 3520 | /* Per mac80211.h: This is only used in IBSS mode... */ |
05c914fe | 3521 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
052c4b9f | 3522 | |
c90a74ba EG |
3523 | /* switch to CAM during association period. |
3524 | * the ucode will block any association/authentication | |
3525 | * frome during assiciation period if it can not hear | |
3526 | * the AP because of PM. the timer enable PM back is | |
3527 | * association do not complete | |
3528 | */ | |
3529 | if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN | | |
3530 | IEEE80211_CHAN_RADAR)) | |
3531 | iwl_power_disable_management(priv, 3000); | |
3532 | ||
b481de9c ZY |
3533 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
3534 | mutex_unlock(&priv->mutex); | |
3535 | return; | |
3536 | } | |
3537 | ||
bb8c093b | 3538 | iwl4965_set_rate(priv); |
b481de9c ZY |
3539 | |
3540 | mutex_unlock(&priv->mutex); | |
3541 | ||
3542 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
3543 | } |
3544 | ||
e039fa4a | 3545 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) |
b481de9c | 3546 | { |
c79dd5b5 | 3547 | struct iwl_priv *priv = hw->priv; |
b481de9c | 3548 | unsigned long flags; |
2ff75b78 | 3549 | __le64 timestamp; |
b481de9c ZY |
3550 | |
3551 | mutex_lock(&priv->mutex); | |
3552 | IWL_DEBUG_MAC80211("enter\n"); | |
3553 | ||
fee1247a | 3554 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
3555 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
3556 | mutex_unlock(&priv->mutex); | |
3557 | return -EIO; | |
3558 | } | |
3559 | ||
05c914fe | 3560 | if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { |
b481de9c ZY |
3561 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); |
3562 | mutex_unlock(&priv->mutex); | |
3563 | return -EIO; | |
3564 | } | |
3565 | ||
3566 | spin_lock_irqsave(&priv->lock, flags); | |
3567 | ||
3568 | if (priv->ibss_beacon) | |
3569 | dev_kfree_skb(priv->ibss_beacon); | |
3570 | ||
3571 | priv->ibss_beacon = skb; | |
3572 | ||
3573 | priv->assoc_id = 0; | |
2ff75b78 | 3574 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b94d8eea | 3575 | priv->timestamp = le64_to_cpu(timestamp); |
b481de9c ZY |
3576 | |
3577 | IWL_DEBUG_MAC80211("leave\n"); | |
3578 | spin_unlock_irqrestore(&priv->lock, flags); | |
3579 | ||
c7de35cd | 3580 | iwl_reset_qos(priv); |
b481de9c | 3581 | |
c46fbefa | 3582 | iwl4965_post_associate(priv); |
b481de9c ZY |
3583 | |
3584 | mutex_unlock(&priv->mutex); | |
3585 | ||
3586 | return 0; | |
3587 | } | |
3588 | ||
b481de9c ZY |
3589 | /***************************************************************************** |
3590 | * | |
3591 | * sysfs attributes | |
3592 | * | |
3593 | *****************************************************************************/ | |
3594 | ||
0a6857e7 | 3595 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3596 | |
3597 | /* | |
3598 | * The following adds a new attribute to the sysfs representation | |
3599 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
3600 | * used for controlling the debug level. | |
3601 | * | |
3602 | * See the level definitions in iwl for details. | |
3603 | */ | |
3604 | ||
8cf769c6 EK |
3605 | static ssize_t show_debug_level(struct device *d, |
3606 | struct device_attribute *attr, char *buf) | |
b481de9c | 3607 | { |
8cf769c6 EK |
3608 | struct iwl_priv *priv = d->driver_data; |
3609 | ||
3610 | return sprintf(buf, "0x%08X\n", priv->debug_level); | |
b481de9c | 3611 | } |
8cf769c6 EK |
3612 | static ssize_t store_debug_level(struct device *d, |
3613 | struct device_attribute *attr, | |
b481de9c ZY |
3614 | const char *buf, size_t count) |
3615 | { | |
8cf769c6 | 3616 | struct iwl_priv *priv = d->driver_data; |
9257746f TW |
3617 | unsigned long val; |
3618 | int ret; | |
b481de9c | 3619 | |
9257746f TW |
3620 | ret = strict_strtoul(buf, 0, &val); |
3621 | if (ret) | |
b481de9c ZY |
3622 | printk(KERN_INFO DRV_NAME |
3623 | ": %s is not in hex or decimal form.\n", buf); | |
3624 | else | |
8cf769c6 | 3625 | priv->debug_level = val; |
b481de9c ZY |
3626 | |
3627 | return strnlen(buf, count); | |
3628 | } | |
3629 | ||
8cf769c6 EK |
3630 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, |
3631 | show_debug_level, store_debug_level); | |
3632 | ||
b481de9c | 3633 | |
0a6857e7 | 3634 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 3635 | |
b481de9c | 3636 | |
bc6f59bc TW |
3637 | static ssize_t show_version(struct device *d, |
3638 | struct device_attribute *attr, char *buf) | |
3639 | { | |
3640 | struct iwl_priv *priv = d->driver_data; | |
885ba202 | 3641 | struct iwl_alive_resp *palive = &priv->card_alive; |
f236a265 TW |
3642 | ssize_t pos = 0; |
3643 | u16 eeprom_ver; | |
bc6f59bc TW |
3644 | |
3645 | if (palive->is_valid) | |
f236a265 TW |
3646 | pos += sprintf(buf + pos, |
3647 | "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n" | |
3648 | "fw type: 0x%01X 0x%01X\n", | |
bc6f59bc TW |
3649 | palive->ucode_major, palive->ucode_minor, |
3650 | palive->sw_rev[0], palive->sw_rev[1], | |
3651 | palive->ver_type, palive->ver_subtype); | |
bc6f59bc | 3652 | else |
f236a265 TW |
3653 | pos += sprintf(buf + pos, "fw not loaded\n"); |
3654 | ||
3655 | if (priv->eeprom) { | |
3656 | eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION); | |
3657 | pos += sprintf(buf + pos, "EEPROM version: 0x%x\n", | |
3658 | eeprom_ver); | |
3659 | } else { | |
3660 | pos += sprintf(buf + pos, "EEPROM not initialzed\n"); | |
3661 | } | |
3662 | ||
3663 | return pos; | |
bc6f59bc TW |
3664 | } |
3665 | ||
3666 | static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL); | |
3667 | ||
b481de9c ZY |
3668 | static ssize_t show_temperature(struct device *d, |
3669 | struct device_attribute *attr, char *buf) | |
3670 | { | |
c79dd5b5 | 3671 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 3672 | |
fee1247a | 3673 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
3674 | return -EAGAIN; |
3675 | ||
91dbc5bd | 3676 | return sprintf(buf, "%d\n", priv->temperature); |
b481de9c ZY |
3677 | } |
3678 | ||
3679 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
3680 | ||
b481de9c ZY |
3681 | static ssize_t show_tx_power(struct device *d, |
3682 | struct device_attribute *attr, char *buf) | |
3683 | { | |
c79dd5b5 | 3684 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
630fe9b6 | 3685 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); |
b481de9c ZY |
3686 | } |
3687 | ||
3688 | static ssize_t store_tx_power(struct device *d, | |
3689 | struct device_attribute *attr, | |
3690 | const char *buf, size_t count) | |
3691 | { | |
c79dd5b5 | 3692 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3693 | unsigned long val; |
3694 | int ret; | |
b481de9c | 3695 | |
9257746f TW |
3696 | ret = strict_strtoul(buf, 10, &val); |
3697 | if (ret) | |
b481de9c ZY |
3698 | printk(KERN_INFO DRV_NAME |
3699 | ": %s is not in decimal form.\n", buf); | |
3700 | else | |
630fe9b6 | 3701 | iwl_set_tx_power(priv, val, false); |
b481de9c ZY |
3702 | |
3703 | return count; | |
3704 | } | |
3705 | ||
3706 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
3707 | ||
3708 | static ssize_t show_flags(struct device *d, | |
3709 | struct device_attribute *attr, char *buf) | |
3710 | { | |
c79dd5b5 | 3711 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3712 | |
3713 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
3714 | } | |
3715 | ||
3716 | static ssize_t store_flags(struct device *d, | |
3717 | struct device_attribute *attr, | |
3718 | const char *buf, size_t count) | |
3719 | { | |
c79dd5b5 | 3720 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3721 | unsigned long val; |
3722 | u32 flags; | |
3723 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3724 | if (ret) |
9257746f TW |
3725 | return ret; |
3726 | flags = (u32)val; | |
b481de9c ZY |
3727 | |
3728 | mutex_lock(&priv->mutex); | |
3729 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
3730 | /* Cancel any currently running scans... */ | |
2a421b91 | 3731 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3732 | IWL_WARNING("Could not cancel scan.\n"); |
3733 | else { | |
9257746f | 3734 | IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags); |
b481de9c | 3735 | priv->staging_rxon.flags = cpu_to_le32(flags); |
bb8c093b | 3736 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3737 | } |
3738 | } | |
3739 | mutex_unlock(&priv->mutex); | |
3740 | ||
3741 | return count; | |
3742 | } | |
3743 | ||
3744 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
3745 | ||
3746 | static ssize_t show_filter_flags(struct device *d, | |
3747 | struct device_attribute *attr, char *buf) | |
3748 | { | |
c79dd5b5 | 3749 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
3750 | |
3751 | return sprintf(buf, "0x%04X\n", | |
3752 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
3753 | } | |
3754 | ||
3755 | static ssize_t store_filter_flags(struct device *d, | |
3756 | struct device_attribute *attr, | |
3757 | const char *buf, size_t count) | |
3758 | { | |
c79dd5b5 | 3759 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
9257746f TW |
3760 | unsigned long val; |
3761 | u32 filter_flags; | |
3762 | int ret = strict_strtoul(buf, 0, &val); | |
926f0b2e | 3763 | if (ret) |
9257746f TW |
3764 | return ret; |
3765 | filter_flags = (u32)val; | |
b481de9c ZY |
3766 | |
3767 | mutex_lock(&priv->mutex); | |
3768 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
3769 | /* Cancel any currently running scans... */ | |
2a421b91 | 3770 | if (iwl_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
3771 | IWL_WARNING("Could not cancel scan.\n"); |
3772 | else { | |
3773 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
3774 | "0x%04X\n", filter_flags); | |
3775 | priv->staging_rxon.filter_flags = | |
3776 | cpu_to_le32(filter_flags); | |
bb8c093b | 3777 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
3778 | } |
3779 | } | |
3780 | mutex_unlock(&priv->mutex); | |
3781 | ||
3782 | return count; | |
3783 | } | |
3784 | ||
3785 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
3786 | store_filter_flags); | |
3787 | ||
4fc22b21 | 3788 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3789 | |
3790 | static ssize_t show_measurement(struct device *d, | |
3791 | struct device_attribute *attr, char *buf) | |
3792 | { | |
c79dd5b5 | 3793 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 3794 | struct iwl4965_spectrum_notification measure_report; |
b481de9c | 3795 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3ac7f146 | 3796 | u8 *data = (u8 *)&measure_report; |
b481de9c ZY |
3797 | unsigned long flags; |
3798 | ||
3799 | spin_lock_irqsave(&priv->lock, flags); | |
3800 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
3801 | spin_unlock_irqrestore(&priv->lock, flags); | |
3802 | return 0; | |
3803 | } | |
3804 | memcpy(&measure_report, &priv->measure_report, size); | |
3805 | priv->measurement_status = 0; | |
3806 | spin_unlock_irqrestore(&priv->lock, flags); | |
3807 | ||
3808 | while (size && (PAGE_SIZE - len)) { | |
3809 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
3810 | PAGE_SIZE - len, 1); | |
3811 | len = strlen(buf); | |
3812 | if (PAGE_SIZE - len) | |
3813 | buf[len++] = '\n'; | |
3814 | ||
3815 | ofs += 16; | |
3816 | size -= min(size, 16U); | |
3817 | } | |
3818 | ||
3819 | return len; | |
3820 | } | |
3821 | ||
3822 | static ssize_t store_measurement(struct device *d, | |
3823 | struct device_attribute *attr, | |
3824 | const char *buf, size_t count) | |
3825 | { | |
c79dd5b5 | 3826 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3827 | struct ieee80211_measurement_params params = { |
3828 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
3829 | .start_time = cpu_to_le64(priv->last_tsf), | |
3830 | .duration = cpu_to_le16(1), | |
3831 | }; | |
3832 | u8 type = IWL_MEASURE_BASIC; | |
3833 | u8 buffer[32]; | |
3834 | u8 channel; | |
3835 | ||
3836 | if (count) { | |
3837 | char *p = buffer; | |
3838 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
3839 | channel = simple_strtoul(p, NULL, 0); | |
3840 | if (channel) | |
3841 | params.channel = channel; | |
3842 | ||
3843 | p = buffer; | |
3844 | while (*p && *p != ' ') | |
3845 | p++; | |
3846 | if (*p) | |
3847 | type = simple_strtoul(p + 1, NULL, 0); | |
3848 | } | |
3849 | ||
3850 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
3851 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 3852 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
3853 | |
3854 | return count; | |
3855 | } | |
3856 | ||
3857 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
3858 | show_measurement, store_measurement); | |
4fc22b21 | 3859 | #endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
3860 | |
3861 | static ssize_t store_retry_rate(struct device *d, | |
3862 | struct device_attribute *attr, | |
3863 | const char *buf, size_t count) | |
3864 | { | |
c79dd5b5 | 3865 | struct iwl_priv *priv = dev_get_drvdata(d); |
9257746f TW |
3866 | long val; |
3867 | int ret = strict_strtol(buf, 10, &val); | |
3868 | if (!ret) | |
3869 | return ret; | |
b481de9c | 3870 | |
9257746f | 3871 | priv->retry_rate = (val > 0) ? val : 1; |
b481de9c ZY |
3872 | |
3873 | return count; | |
3874 | } | |
3875 | ||
3876 | static ssize_t show_retry_rate(struct device *d, | |
3877 | struct device_attribute *attr, char *buf) | |
3878 | { | |
c79dd5b5 | 3879 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
3880 | return sprintf(buf, "%d", priv->retry_rate); |
3881 | } | |
3882 | ||
3883 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
3884 | store_retry_rate); | |
3885 | ||
3886 | static ssize_t store_power_level(struct device *d, | |
3887 | struct device_attribute *attr, | |
3888 | const char *buf, size_t count) | |
3889 | { | |
c79dd5b5 | 3890 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 | 3891 | int ret; |
9257746f TW |
3892 | unsigned long mode; |
3893 | ||
b481de9c | 3894 | |
b481de9c ZY |
3895 | mutex_lock(&priv->mutex); |
3896 | ||
fee1247a | 3897 | if (!iwl_is_ready(priv)) { |
298df1f6 | 3898 | ret = -EAGAIN; |
b481de9c ZY |
3899 | goto out; |
3900 | } | |
3901 | ||
9257746f | 3902 | ret = strict_strtoul(buf, 10, &mode); |
926f0b2e | 3903 | if (ret) |
9257746f TW |
3904 | goto out; |
3905 | ||
298df1f6 EK |
3906 | ret = iwl_power_set_user_mode(priv, mode); |
3907 | if (ret) { | |
5da4b55f MA |
3908 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3909 | goto out; | |
b481de9c | 3910 | } |
298df1f6 | 3911 | ret = count; |
b481de9c ZY |
3912 | |
3913 | out: | |
3914 | mutex_unlock(&priv->mutex); | |
298df1f6 | 3915 | return ret; |
b481de9c ZY |
3916 | } |
3917 | ||
b481de9c ZY |
3918 | static ssize_t show_power_level(struct device *d, |
3919 | struct device_attribute *attr, char *buf) | |
3920 | { | |
c79dd5b5 | 3921 | struct iwl_priv *priv = dev_get_drvdata(d); |
298df1f6 EK |
3922 | int mode = priv->power_data.user_power_setting; |
3923 | int system = priv->power_data.system_power_setting; | |
5da4b55f | 3924 | int level = priv->power_data.power_mode; |
b481de9c ZY |
3925 | char *p = buf; |
3926 | ||
298df1f6 EK |
3927 | switch (system) { |
3928 | case IWL_POWER_SYS_AUTO: | |
3929 | p += sprintf(p, "SYSTEM:auto"); | |
b481de9c | 3930 | break; |
298df1f6 EK |
3931 | case IWL_POWER_SYS_AC: |
3932 | p += sprintf(p, "SYSTEM:ac"); | |
3933 | break; | |
3934 | case IWL_POWER_SYS_BATTERY: | |
3935 | p += sprintf(p, "SYSTEM:battery"); | |
b481de9c | 3936 | break; |
b481de9c | 3937 | } |
298df1f6 EK |
3938 | |
3939 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto"); | |
3940 | p += sprintf(p, "\tINDEX:%d", level); | |
3941 | p += sprintf(p, "\n"); | |
3ac7f146 | 3942 | return p - buf + 1; |
b481de9c ZY |
3943 | } |
3944 | ||
3945 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
3946 | store_power_level); | |
3947 | ||
3948 | static ssize_t show_channels(struct device *d, | |
3949 | struct device_attribute *attr, char *buf) | |
3950 | { | |
5d72a1f5 EK |
3951 | |
3952 | struct iwl_priv *priv = dev_get_drvdata(d); | |
3953 | struct ieee80211_channel *channels = NULL; | |
3954 | const struct ieee80211_supported_band *supp_band = NULL; | |
3955 | int len = 0, i; | |
3956 | int count = 0; | |
3957 | ||
3958 | if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status)) | |
3959 | return -EAGAIN; | |
3960 | ||
3961 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ); | |
3962 | channels = supp_band->channels; | |
3963 | count = supp_band->n_channels; | |
3964 | ||
3965 | len += sprintf(&buf[len], | |
3966 | "Displaying %d channels in 2.4GHz band " | |
3967 | "(802.11bg):\n", count); | |
3968 | ||
3969 | for (i = 0; i < count; i++) | |
3970 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3971 | ieee80211_frequency_to_channel( | |
3972 | channels[i].center_freq), | |
3973 | channels[i].max_power, | |
3974 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3975 | " (IEEE 802.11h required)" : "", | |
3976 | (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3977 | || (channels[i].flags & | |
3978 | IEEE80211_CHAN_RADAR)) ? "" : | |
3979 | ", IBSS", | |
3980 | channels[i].flags & | |
3981 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
3982 | "passive only" : "active/passive"); | |
3983 | ||
3984 | supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ); | |
3985 | channels = supp_band->channels; | |
3986 | count = supp_band->n_channels; | |
3987 | ||
3988 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
3989 | "(802.11a):\n", count); | |
3990 | ||
3991 | for (i = 0; i < count; i++) | |
3992 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
3993 | ieee80211_frequency_to_channel( | |
3994 | channels[i].center_freq), | |
3995 | channels[i].max_power, | |
3996 | channels[i].flags & IEEE80211_CHAN_RADAR ? | |
3997 | " (IEEE 802.11h required)" : "", | |
3998 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | |
3999 | || (channels[i].flags & | |
4000 | IEEE80211_CHAN_RADAR)) ? "" : | |
4001 | ", IBSS", | |
4002 | channels[i].flags & | |
4003 | IEEE80211_CHAN_PASSIVE_SCAN ? | |
4004 | "passive only" : "active/passive"); | |
4005 | ||
4006 | return len; | |
b481de9c ZY |
4007 | } |
4008 | ||
4009 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
4010 | ||
4011 | static ssize_t show_statistics(struct device *d, | |
4012 | struct device_attribute *attr, char *buf) | |
4013 | { | |
c79dd5b5 | 4014 | struct iwl_priv *priv = dev_get_drvdata(d); |
8f91aecb | 4015 | u32 size = sizeof(struct iwl_notif_statistics); |
b481de9c | 4016 | u32 len = 0, ofs = 0; |
3ac7f146 | 4017 | u8 *data = (u8 *)&priv->statistics; |
b481de9c ZY |
4018 | int rc = 0; |
4019 | ||
fee1247a | 4020 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4021 | return -EAGAIN; |
4022 | ||
4023 | mutex_lock(&priv->mutex); | |
49ea8596 | 4024 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
4025 | mutex_unlock(&priv->mutex); |
4026 | ||
4027 | if (rc) { | |
4028 | len = sprintf(buf, | |
4029 | "Error sending statistics request: 0x%08X\n", rc); | |
4030 | return len; | |
4031 | } | |
4032 | ||
4033 | while (size && (PAGE_SIZE - len)) { | |
4034 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
4035 | PAGE_SIZE - len, 1); | |
4036 | len = strlen(buf); | |
4037 | if (PAGE_SIZE - len) | |
4038 | buf[len++] = '\n'; | |
4039 | ||
4040 | ofs += 16; | |
4041 | size -= min(size, 16U); | |
4042 | } | |
4043 | ||
4044 | return len; | |
4045 | } | |
4046 | ||
4047 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
4048 | ||
b481de9c ZY |
4049 | static ssize_t show_status(struct device *d, |
4050 | struct device_attribute *attr, char *buf) | |
4051 | { | |
c79dd5b5 | 4052 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 4053 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
4054 | return -EAGAIN; |
4055 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
4056 | } | |
4057 | ||
4058 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
4059 | ||
b481de9c ZY |
4060 | /***************************************************************************** |
4061 | * | |
4062 | * driver setup and teardown | |
4063 | * | |
4064 | *****************************************************************************/ | |
4065 | ||
4e39317d | 4066 | static void iwl_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
4067 | { |
4068 | priv->workqueue = create_workqueue(DRV_NAME); | |
4069 | ||
4070 | init_waitqueue_head(&priv->wait_command_queue); | |
4071 | ||
bb8c093b CH |
4072 | INIT_WORK(&priv->up, iwl4965_bg_up); |
4073 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
4074 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
bb8c093b CH |
4075 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); |
4076 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
4419e39b | 4077 | INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor); |
16e727e8 | 4078 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); |
4a4a9e81 TW |
4079 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); |
4080 | INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); | |
2a421b91 | 4081 | |
2a421b91 | 4082 | iwl_setup_scan_deferred_work(priv); |
c90a74ba | 4083 | iwl_setup_power_deferred_work(priv); |
bb8c093b | 4084 | |
4e39317d EG |
4085 | if (priv->cfg->ops->lib->setup_deferred_work) |
4086 | priv->cfg->ops->lib->setup_deferred_work(priv); | |
4087 | ||
4088 | init_timer(&priv->statistics_periodic); | |
4089 | priv->statistics_periodic.data = (unsigned long)priv; | |
4090 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; | |
b481de9c ZY |
4091 | |
4092 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 4093 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
4094 | } |
4095 | ||
4e39317d | 4096 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 4097 | { |
4e39317d EG |
4098 | if (priv->cfg->ops->lib->cancel_deferred_work) |
4099 | priv->cfg->ops->lib->cancel_deferred_work(priv); | |
b481de9c | 4100 | |
3ae6a054 | 4101 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c | 4102 | cancel_delayed_work(&priv->scan_check); |
c90a74ba | 4103 | cancel_delayed_work_sync(&priv->set_power_save); |
b481de9c | 4104 | cancel_delayed_work(&priv->alive_start); |
b481de9c | 4105 | cancel_work_sync(&priv->beacon_update); |
4e39317d | 4106 | del_timer_sync(&priv->statistics_periodic); |
b481de9c ZY |
4107 | } |
4108 | ||
bb8c093b | 4109 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c | 4110 | &dev_attr_channels.attr, |
b481de9c ZY |
4111 | &dev_attr_flags.attr, |
4112 | &dev_attr_filter_flags.attr, | |
4fc22b21 | 4113 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
b481de9c ZY |
4114 | &dev_attr_measurement.attr, |
4115 | #endif | |
4116 | &dev_attr_power_level.attr, | |
4117 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
4118 | &dev_attr_statistics.attr, |
4119 | &dev_attr_status.attr, | |
4120 | &dev_attr_temperature.attr, | |
b481de9c | 4121 | &dev_attr_tx_power.attr, |
8cf769c6 EK |
4122 | #ifdef CONFIG_IWLWIFI_DEBUG |
4123 | &dev_attr_debug_level.attr, | |
4124 | #endif | |
bc6f59bc | 4125 | &dev_attr_version.attr, |
b481de9c ZY |
4126 | |
4127 | NULL | |
4128 | }; | |
4129 | ||
bb8c093b | 4130 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 4131 | .name = NULL, /* put in device directory */ |
bb8c093b | 4132 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
4133 | }; |
4134 | ||
bb8c093b CH |
4135 | static struct ieee80211_ops iwl4965_hw_ops = { |
4136 | .tx = iwl4965_mac_tx, | |
4137 | .start = iwl4965_mac_start, | |
4138 | .stop = iwl4965_mac_stop, | |
4139 | .add_interface = iwl4965_mac_add_interface, | |
4140 | .remove_interface = iwl4965_mac_remove_interface, | |
4141 | .config = iwl4965_mac_config, | |
4142 | .config_interface = iwl4965_mac_config_interface, | |
4143 | .configure_filter = iwl4965_configure_filter, | |
4144 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 4145 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
4146 | .get_stats = iwl4965_mac_get_stats, |
4147 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
4148 | .conf_tx = iwl4965_mac_conf_tx, | |
bb8c093b | 4149 | .reset_tsf = iwl4965_mac_reset_tsf, |
471b3efd | 4150 | .bss_info_changed = iwl4965_bss_info_changed, |
9ab46173 | 4151 | .ampdu_action = iwl4965_mac_ampdu_action, |
cb43dc25 | 4152 | .hw_scan = iwl_mac_hw_scan |
b481de9c ZY |
4153 | }; |
4154 | ||
bb8c093b | 4155 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
4156 | { |
4157 | int err = 0; | |
c79dd5b5 | 4158 | struct iwl_priv *priv; |
b481de9c | 4159 | struct ieee80211_hw *hw; |
82b9a121 | 4160 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 4161 | unsigned long flags; |
b481de9c | 4162 | |
316c30d9 AK |
4163 | /************************ |
4164 | * 1. Allocating HW data | |
4165 | ************************/ | |
4166 | ||
6440adb5 CB |
4167 | /* Disabling hardware scan means that mac80211 will perform scans |
4168 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 4169 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
4170 | if (cfg->mod_params->debug & IWL_DL_INFO) |
4171 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
4172 | "Disabling hw_scan\n"); | |
bb8c093b | 4173 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
4174 | } |
4175 | ||
1d0a082d AK |
4176 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
4177 | if (!hw) { | |
b481de9c ZY |
4178 | err = -ENOMEM; |
4179 | goto out; | |
4180 | } | |
1d0a082d AK |
4181 | priv = hw->priv; |
4182 | /* At this point both hw and priv are allocated. */ | |
4183 | ||
b481de9c ZY |
4184 | SET_IEEE80211_DEV(hw, &pdev->dev); |
4185 | ||
4186 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 4187 | priv->cfg = cfg; |
b481de9c | 4188 | priv->pci_dev = pdev; |
316c30d9 | 4189 | |
0a6857e7 | 4190 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 4191 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
4192 | atomic_set(&priv->restrict_refcnt, 0); |
4193 | #endif | |
b481de9c | 4194 | |
316c30d9 AK |
4195 | /************************** |
4196 | * 2. Initializing PCI bus | |
4197 | **************************/ | |
4198 | if (pci_enable_device(pdev)) { | |
4199 | err = -ENODEV; | |
4200 | goto out_ieee80211_free_hw; | |
4201 | } | |
4202 | ||
4203 | pci_set_master(pdev); | |
4204 | ||
093d874c | 4205 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36)); |
316c30d9 | 4206 | if (!err) |
093d874c | 4207 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36)); |
cc2a8ea8 | 4208 | if (err) { |
093d874c | 4209 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 4210 | if (!err) |
093d874c | 4211 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
cc2a8ea8 | 4212 | /* both attempts failed: */ |
316c30d9 | 4213 | if (err) { |
cc2a8ea8 RR |
4214 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
4215 | DRV_NAME); | |
316c30d9 | 4216 | goto out_pci_disable_device; |
cc2a8ea8 | 4217 | } |
316c30d9 AK |
4218 | } |
4219 | ||
4220 | err = pci_request_regions(pdev, DRV_NAME); | |
4221 | if (err) | |
4222 | goto out_pci_disable_device; | |
4223 | ||
4224 | pci_set_drvdata(pdev, priv); | |
4225 | ||
316c30d9 AK |
4226 | |
4227 | /*********************** | |
4228 | * 3. Read REV register | |
4229 | ***********************/ | |
4230 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
4231 | if (!priv->hw_base) { | |
4232 | err = -ENODEV; | |
4233 | goto out_pci_release_regions; | |
4234 | } | |
4235 | ||
4236 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
4237 | (unsigned long long) pci_resource_len(pdev, 0)); | |
4238 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
4239 | ||
b661c819 | 4240 | iwl_hw_detect(priv); |
316c30d9 | 4241 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
4242 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
4243 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 4244 | |
e7b63581 TW |
4245 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
4246 | * PCI Tx retries from interfering with C3 CPU state */ | |
4247 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | |
4248 | ||
91238714 TW |
4249 | /* amp init */ |
4250 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 4251 | if (err < 0) { |
91238714 | 4252 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
4253 | goto out_iounmap; |
4254 | } | |
91238714 TW |
4255 | /***************** |
4256 | * 4. Read EEPROM | |
4257 | *****************/ | |
316c30d9 AK |
4258 | /* Read the EEPROM */ |
4259 | err = iwl_eeprom_init(priv); | |
4260 | if (err) { | |
4261 | IWL_ERROR("Unable to init EEPROM\n"); | |
4262 | goto out_iounmap; | |
4263 | } | |
8614f360 TW |
4264 | err = iwl_eeprom_check_version(priv); |
4265 | if (err) | |
4266 | goto out_iounmap; | |
4267 | ||
02883017 | 4268 | /* extract MAC Address */ |
316c30d9 | 4269 | iwl_eeprom_get_mac(priv, priv->mac_addr); |
e174961c | 4270 | IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr); |
316c30d9 AK |
4271 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); |
4272 | ||
4273 | /************************ | |
4274 | * 5. Setup HW constants | |
4275 | ************************/ | |
da154e30 | 4276 | if (iwl_set_hw_params(priv)) { |
5425e490 | 4277 | IWL_ERROR("failed to set hw parameters\n"); |
073d3f5f | 4278 | goto out_free_eeprom; |
316c30d9 AK |
4279 | } |
4280 | ||
4281 | /******************* | |
6ba87956 | 4282 | * 6. Setup priv |
316c30d9 | 4283 | *******************/ |
b481de9c | 4284 | |
6ba87956 | 4285 | err = iwl_init_drv(priv); |
bf85ea4f | 4286 | if (err) |
399f4900 | 4287 | goto out_free_eeprom; |
bf85ea4f | 4288 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
4289 | |
4290 | /********************************** | |
4291 | * 7. Initialize module parameters | |
4292 | **********************************/ | |
4293 | ||
4294 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 4295 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
4296 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
4297 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
4298 | } | |
4299 | ||
316c30d9 AK |
4300 | /******************** |
4301 | * 8. Setup services | |
4302 | ********************/ | |
0359facc | 4303 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 4304 | iwl4965_disable_interrupts(priv); |
0359facc | 4305 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
4306 | |
4307 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4308 | if (err) { | |
4309 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
6ba87956 | 4310 | goto out_uninit_drv; |
316c30d9 AK |
4311 | } |
4312 | ||
316c30d9 | 4313 | |
4e39317d | 4314 | iwl_setup_deferred_work(priv); |
653fa4a0 | 4315 | iwl_setup_rx_handlers(priv); |
316c30d9 AK |
4316 | |
4317 | /******************** | |
4318 | * 9. Conclude | |
4319 | ********************/ | |
5a66926a ZY |
4320 | pci_save_state(pdev); |
4321 | pci_disable_device(pdev); | |
b481de9c | 4322 | |
6ba87956 TW |
4323 | /********************************** |
4324 | * 10. Setup and register mac80211 | |
4325 | **********************************/ | |
4326 | ||
4327 | err = iwl_setup_mac(priv); | |
4328 | if (err) | |
4329 | goto out_remove_sysfs; | |
4330 | ||
4331 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
4332 | if (err) | |
4333 | IWL_ERROR("failed to create debugfs files\n"); | |
4334 | ||
58d0f361 EG |
4335 | err = iwl_rfkill_init(priv); |
4336 | if (err) | |
4337 | IWL_ERROR("Unable to initialize RFKILL system. " | |
4338 | "Ignoring error: %d\n", err); | |
4339 | iwl_power_initialize(priv); | |
b481de9c ZY |
4340 | return 0; |
4341 | ||
316c30d9 AK |
4342 | out_remove_sysfs: |
4343 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6ba87956 TW |
4344 | out_uninit_drv: |
4345 | iwl_uninit_drv(priv); | |
073d3f5f TW |
4346 | out_free_eeprom: |
4347 | iwl_eeprom_free(priv); | |
b481de9c ZY |
4348 | out_iounmap: |
4349 | pci_iounmap(pdev, priv->hw_base); | |
4350 | out_pci_release_regions: | |
4351 | pci_release_regions(pdev); | |
316c30d9 | 4352 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
4353 | out_pci_disable_device: |
4354 | pci_disable_device(pdev); | |
b481de9c ZY |
4355 | out_ieee80211_free_hw: |
4356 | ieee80211_free_hw(priv->hw); | |
4357 | out: | |
4358 | return err; | |
4359 | } | |
4360 | ||
c83dbf68 | 4361 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 4362 | { |
c79dd5b5 | 4363 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0359facc | 4364 | unsigned long flags; |
b481de9c ZY |
4365 | |
4366 | if (!priv) | |
4367 | return; | |
4368 | ||
4369 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
4370 | ||
67249625 EG |
4371 | iwl_dbgfs_unregister(priv); |
4372 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
4373 | ||
0b124c31 GG |
4374 | /* ieee80211_unregister_hw call wil cause iwl4965_mac_stop to |
4375 | * to be called and iwl4965_down since we are removing the device | |
4376 | * we need to set STATUS_EXIT_PENDING bit. | |
4377 | */ | |
4378 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
c4f55232 RR |
4379 | if (priv->mac80211_registered) { |
4380 | ieee80211_unregister_hw(priv->hw); | |
4381 | priv->mac80211_registered = 0; | |
0b124c31 GG |
4382 | } else { |
4383 | iwl4965_down(priv); | |
c4f55232 RR |
4384 | } |
4385 | ||
0359facc MA |
4386 | /* make sure we flush any pending irq or |
4387 | * tasklet for the driver | |
4388 | */ | |
4389 | spin_lock_irqsave(&priv->lock, flags); | |
4390 | iwl4965_disable_interrupts(priv); | |
4391 | spin_unlock_irqrestore(&priv->lock, flags); | |
4392 | ||
4393 | iwl_synchronize_irq(priv); | |
4394 | ||
58d0f361 | 4395 | iwl_rfkill_unregister(priv); |
bb8c093b | 4396 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4397 | |
4398 | if (priv->rxq.bd) | |
a55360e4 | 4399 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 4400 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 4401 | |
37deb2a0 | 4402 | iwl_clear_stations_table(priv); |
073d3f5f | 4403 | iwl_eeprom_free(priv); |
b481de9c | 4404 | |
b481de9c | 4405 | |
948c171c MA |
4406 | /*netif_stop_queue(dev); */ |
4407 | flush_workqueue(priv->workqueue); | |
4408 | ||
bb8c093b | 4409 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
4410 | * priv->workqueue... so we can't take down the workqueue |
4411 | * until now... */ | |
4412 | destroy_workqueue(priv->workqueue); | |
4413 | priv->workqueue = NULL; | |
4414 | ||
b481de9c ZY |
4415 | pci_iounmap(pdev, priv->hw_base); |
4416 | pci_release_regions(pdev); | |
4417 | pci_disable_device(pdev); | |
4418 | pci_set_drvdata(pdev, NULL); | |
4419 | ||
6ba87956 | 4420 | iwl_uninit_drv(priv); |
b481de9c ZY |
4421 | |
4422 | if (priv->ibss_beacon) | |
4423 | dev_kfree_skb(priv->ibss_beacon); | |
4424 | ||
4425 | ieee80211_free_hw(priv->hw); | |
4426 | } | |
4427 | ||
4428 | #ifdef CONFIG_PM | |
4429 | ||
bb8c093b | 4430 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 4431 | { |
c79dd5b5 | 4432 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4433 | |
e655b9f0 ZY |
4434 | if (priv->is_open) { |
4435 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
4436 | iwl4965_mac_stop(priv->hw); | |
4437 | priv->is_open = 1; | |
4438 | } | |
b481de9c | 4439 | |
b481de9c ZY |
4440 | pci_set_power_state(pdev, PCI_D3hot); |
4441 | ||
b481de9c ZY |
4442 | return 0; |
4443 | } | |
4444 | ||
bb8c093b | 4445 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 4446 | { |
c79dd5b5 | 4447 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 4448 | |
b481de9c | 4449 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 4450 | |
e655b9f0 ZY |
4451 | if (priv->is_open) |
4452 | iwl4965_mac_start(priv->hw); | |
b481de9c | 4453 | |
e655b9f0 | 4454 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
4455 | return 0; |
4456 | } | |
4457 | ||
4458 | #endif /* CONFIG_PM */ | |
4459 | ||
4460 | /***************************************************************************** | |
4461 | * | |
4462 | * driver and module entry point | |
4463 | * | |
4464 | *****************************************************************************/ | |
4465 | ||
fed9017e RR |
4466 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4467 | static struct pci_device_id iwl_hw_card_ids[] = { | |
4fc22b21 | 4468 | #ifdef CONFIG_IWL4965 |
fed9017e RR |
4469 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4470 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
4fc22b21 | 4471 | #endif /* CONFIG_IWL4965 */ |
5a6a256e | 4472 | #ifdef CONFIG_IWL5000 |
47408639 EK |
4473 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4474 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | |
4475 | {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, | |
4476 | {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, | |
4477 | {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, | |
4478 | {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, | |
5a6a256e | 4479 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, |
47408639 EK |
4480 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, |
4481 | {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
4482 | {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
e96a8495 TW |
4483 | /* 5350 WiFi/WiMax */ |
4484 | {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, | |
4485 | {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, | |
4486 | {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, | |
5a6a256e | 4487 | #endif /* CONFIG_IWL5000 */ |
fed9017e RR |
4488 | {0} |
4489 | }; | |
4490 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
4491 | ||
4492 | static struct pci_driver iwl_driver = { | |
b481de9c | 4493 | .name = DRV_NAME, |
fed9017e | 4494 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
4495 | .probe = iwl4965_pci_probe, |
4496 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 4497 | #ifdef CONFIG_PM |
bb8c093b CH |
4498 | .suspend = iwl4965_pci_suspend, |
4499 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
4500 | #endif |
4501 | }; | |
4502 | ||
bb8c093b | 4503 | static int __init iwl4965_init(void) |
b481de9c ZY |
4504 | { |
4505 | ||
4506 | int ret; | |
4507 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
4508 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 | 4509 | |
e227ceac | 4510 | ret = iwlagn_rate_control_register(); |
897e1cf2 RC |
4511 | if (ret) { |
4512 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
4513 | return ret; | |
4514 | } | |
4515 | ||
fed9017e | 4516 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
4517 | if (ret) { |
4518 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 4519 | goto error_register; |
b481de9c | 4520 | } |
b481de9c ZY |
4521 | |
4522 | return ret; | |
897e1cf2 | 4523 | |
897e1cf2 | 4524 | error_register: |
e227ceac | 4525 | iwlagn_rate_control_unregister(); |
897e1cf2 | 4526 | return ret; |
b481de9c ZY |
4527 | } |
4528 | ||
bb8c093b | 4529 | static void __exit iwl4965_exit(void) |
b481de9c | 4530 | { |
fed9017e | 4531 | pci_unregister_driver(&iwl_driver); |
e227ceac | 4532 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
4533 | } |
4534 | ||
bb8c093b CH |
4535 | module_exit(iwl4965_exit); |
4536 | module_init(iwl4965_init); |