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iwl3945: use SW rfkill from iwlwifi
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
ZY		 32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
ZY		 40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
b481de9c
ZY		 43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
a3139c59
SO		 47#define DRV_NAME "iwlagn"
48
6bc913bd 49#include "iwl-eeprom.h"
3e0d4cb1 50#include "iwl-dev.h"
fee1247a 51#include "iwl-core.h"
3395f6e9 52#include "iwl-io.h"
b481de9c 53#include "iwl-helpers.h"
6974e363 54#include "iwl-sta.h"
f0832f13 55#include "iwl-calib.h"
b481de9c 56
416e1438 57
b481de9c
ZY		 58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
b481de9c
ZY		 64/*
65 * module name, copyright, version, etc.
b481de9c 66 */
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 70#define VD "d"
71#else
72#define VD
73#endif
74
80bc5393 75#ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
b481de9c
ZY		 76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY		 83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97/**
5b9f8cd3 98 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 99 *
01ebd063 100 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
5b9f8cd3 105static int iwl_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 106{
107 /* cast away the const for active_rxon in this function */
c1adf9fb 108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG		 109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 112
fee1247a 113 if (!iwl_is_alive(priv))
43d59b32 114 return -EBUSY;
b481de9c
ZY		 115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG		 118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 121
8ccde88a 122 ret = iwl_check_rxon_cmd(priv);
43d59b32 123 if (ret) {
15b1687c 124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
b481de9c
ZY		 125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
5b9f8cd3 129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 130 * and other flags for the current radio configuration. */
54559703 131 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG		 132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
15b1687c 134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
43d59b32 135 return ret;
b481de9c
ZY		 136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
b481de9c
ZY		 145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
43d59b32 149 if (iwl_is_associated(priv) && new_assoc) {
e1623446 150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
b481de9c
ZY		 151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
43d59b32 153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 154 sizeof(struct iwl_rxon_cmd),
b481de9c
ZY		 155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
43d59b32 159 if (ret) {
b481de9c 160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
43d59b32 162 return ret;
b481de9c 163 }
b481de9c
ZY		 164 }
165
e1623446 166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
b481de9c
ZY		 167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
e174961c 169 "* bssid = %pM\n",
43d59b32 170 (new_assoc ? "" : "out"),
b481de9c 171 le16_to_cpu(priv->staging_rxon.channel),
e174961c 172 priv->staging_rxon.bssid_addr);
b481de9c 173
5b9f8cd3 174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG		 175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32 184 if (ret) {
15b1687c 185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG		 186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 189 }
190
37deb2a0 191 iwl_clear_stations_table(priv);
556f8db7 192
b481de9c
ZY		 193 if (!priv->error_recovering)
194 priv->start_calib = 0;
195
b481de9c 196 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 197 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 198 IWL_INVALID_STATION) {
15b1687c 199 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
b481de9c
ZY		 200 return -EIO;
201 }
202
203 /* If we have set the ASSOC_MSK and we are in BSS mode then
204 * add the IWL_AP_ID to the station rate table */
9185159d 205 if (new_assoc) {
05c914fe 206 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW		 207 ret = iwl_rxon_add_station(priv,
208 priv->active_rxon.bssid_addr, 1);
209 if (ret == IWL_INVALID_STATION) {
15b1687c
WT		 210 IWL_ERR(priv,
211 "Error adding AP address for TX.\n");
9185159d
TW		 212 return -EIO;
213 }
214 priv->assoc_station_added = 1;
215 if (priv->default_wep_key &&
216 iwl_send_static_wepkey_cmd(priv, 0))
15b1687c
WT		 217 IWL_ERR(priv,
218 "Could not send WEP static key.\n");
b481de9c 219 }
43d59b32
EG		 220
221 /* Apply the new configuration
222 * RXON assoc doesn't clear the station table in uCode,
223 */
224 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
225 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
226 if (ret) {
15b1687c 227 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG		 228 return ret;
229 }
230 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 231 }
232
36da7d70
ZY		 233 iwl_init_sensitivity(priv);
234
235 /* If we issue a new RXON command which required a tune then we must
236 * send a new TXPOWER command or we won't be able to Tx any frames */
237 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
238 if (ret) {
15b1687c 239 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
36da7d70
ZY		 240 return ret;
241 }
242
b481de9c
ZY		 243 return 0;
244}
245
5b9f8cd3 246void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA		 247{
248
c7de35cd 249 iwl_set_rxon_chain(priv);
5b9f8cd3 250 iwl_commit_rxon(priv);
5da4b55f
MA		 251}
252
fcab423d 253static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 254{
255 struct list_head *element;
256
e1623446 257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
ZY		 258 priv->frames_count);
259
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
262 list_del(element);
fcab423d 263 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
ZY		 264 priv->frames_count--;
265 }
266
267 if (priv->frames_count) {
39aadf8c 268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY		 269 priv->frames_count);
270 priv->frames_count = 0;
271 }
272}
273
fcab423d 274static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 275{
fcab423d 276 struct iwl_frame *frame;
b481de9c
ZY		 277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280 if (!frame) {
15b1687c 281 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY		 282 return NULL;
283 }
284
285 priv->frames_count++;
286 return frame;
287 }
288
289 element = priv->free_frames.next;
290 list_del(element);
fcab423d 291 return list_entry(element, struct iwl_frame, list);
b481de9c
ZY		 292}
293
fcab423d 294static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
ZY		 295{
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
298}
299
4bf64efd
TW		 300static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
73ec1cc2 302 int left)
b481de9c 303{
3109ece1 304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB		 305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY		 307 return 0;
308
309 if (priv->ibss_beacon->len > left)
310 return 0;
311
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314 return priv->ibss_beacon->len;
315}
316
5b9f8cd3 317static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW		 318 struct iwl_frame *frame, u8 rate)
319{
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
322
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW		 330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338 else
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
341
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343 TX_CMD_FLG_TSF_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
345
346 return sizeof(*tx_beacon_cmd) + frame_size;
347}
5b9f8cd3 348static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 349{
fcab423d 350 struct iwl_frame *frame;
b481de9c
ZY		 351 unsigned int frame_size;
352 int rc;
353 u8 rate;
354
fcab423d 355 frame = iwl_get_free_frame(priv);
b481de9c
ZY		 356
357 if (!frame) {
15b1687c 358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY		 359 "command.\n");
360 return -ENOMEM;
361 }
362
5b9f8cd3 363 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 364
5b9f8cd3 365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 366
857485c0 367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 368 &frame->u.cmd[0]);
369
fcab423d 370 iwl_free_frame(priv, frame);
b481de9c
ZY		 371
372 return rc;
373}
374
7aaa1d79
SO		 375static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376{
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
381 addr |=
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384 return addr;
385}
386
387static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388{
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391 return le16_to_cpu(tb->hi_n_len) >> 4;
392}
393
394static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
396{
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
399
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406 tfd->num_tbs = idx + 1;
407}
408
409static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410{
411 return tfd->num_tbs & 0x1f;
412}
413
414/**
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
417 * @txq - tx queue
418 *
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
421 */
422void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423{
59606ffa 424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
7aaa1d79
SO		 425 struct iwl_tfd *tfd;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
428 int i;
429 int num_tbs;
430
431 tfd = &tfd_tmp[index];
432
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
439 return;
440 }
441
442 /* Unmap tx_cmd */
443 if (num_tbs)
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446 pci_unmap_len(&txq->cmd[index]->meta, len),
447 PCI_DMA_TODEVICE);
448
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454 if (txq->txb) {
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457 }
458 }
459}
460
461int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
464 u8 reset, u8 pad)
465{
466 struct iwl_queue *q;
59606ffa 467 struct iwl_tfd *tfd, *tfd_tmp;
7aaa1d79
SO		 468 u32 num_tbs;
469
470 q = &txq->q;
59606ffa
SO		 471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
7aaa1d79
SO		 473
474 if (reset)
475 memset(tfd, 0, sizeof(*tfd));
476
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482 IWL_NUM_OF_TBS);
483 return -EINVAL;
484 }
485
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
490
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493 return 0;
494}
495
a8e74e27
SO		 496/*
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
499 *
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
502 */
503int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
505{
506 int ret;
507 unsigned long flags;
508 int txq_id = txq->q.id;
509
510 spin_lock_irqsave(&priv->lock, flags);
511 ret = iwl_grab_nic_access(priv);
512 if (ret) {
513 spin_unlock_irqrestore(&priv->lock, flags);
514 return ret;
515 }
516
517 /* Circular buffer (TFD queue in DRAM) physical base address */
518 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
519 txq->q.dma_addr >> 8);
520
521 iwl_release_nic_access(priv);
522 spin_unlock_irqrestore(&priv->lock, flags);
523
524 return 0;
525}
526
527
b481de9c
ZY		 528/******************************************************************************
529 *
530 * Misc. internal state and helper functions
531 *
532 ******************************************************************************/
b481de9c 533
5b9f8cd3 534static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG		 535 struct ieee80211_bss_conf *bss_conf)
536{
ae5eb026 537 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 538 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 539 struct ieee80211_sta *sta;
d1141dfb 540
e1623446 541 IWL_DEBUG_MAC80211(priv, "enter: \n");
d1141dfb 542
d1141dfb
EG		 543 if (!iwl_conf->is_ht)
544 return;
545
ae5eb026
JB		 546
547 /*
548 * It is totally wrong to base global information on something
549 * that is valid only when associated, alas, this driver works
550 * that way and I don't know how to fix it.
551 */
552
553 rcu_read_lock();
554 sta = ieee80211_find_sta(priv->hw, priv->bssid);
555 if (!sta) {
556 rcu_read_unlock();
557 return;
558 }
559 ht_conf = &sta->ht_cap;
560
d1141dfb 561 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 562 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 563 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 564 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG		 565
566 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
567 iwl_conf->max_amsdu_size =
568 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
569
570 iwl_conf->supported_chan_width =
d9fe60de 571 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 572
094d05dc
S		 573 /*
574 * XXX: The HT configuration needs to be moved into iwl_mac_config()
575 * to be done there correctly.
576 */
577
578 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
de27e64e 579 if (conf_is_ht40_minus(&priv->hw->conf))
094d05dc 580 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
de27e64e 581 else if (conf_is_ht40_plus(&priv->hw->conf))
094d05dc
S		 582 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
583
d1141dfb 584 /* If no above or below channel supplied disable FAT channel */
d9fe60de 585 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 586 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG		 587 iwl_conf->supported_chan_width = 0;
588
12837be1
RR		 589 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
590
d9fe60de 591 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 592
094d05dc 593 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 594 iwl_conf->ht_protection =
ae5eb026 595 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 596 iwl_conf->non_GF_STA_present =
ae5eb026
JB		 597 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
598
599 rcu_read_unlock();
d1141dfb 600
e1623446 601 IWL_DEBUG_MAC80211(priv, "leave\n");
d1141dfb
EG		 602}
603
b481de9c
ZY		 604/*
605 * QoS support
606*/
1ff50bda 607static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 608{
b481de9c
ZY		 609 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
610 return;
611
b481de9c
ZY		 612 priv->qos_data.def_qos_parm.qos_flags = 0;
613
614 if (priv->qos_data.qos_cap.q_AP.queue_request &&
615 !priv->qos_data.qos_cap.q_AP.txop_request)
616 priv->qos_data.def_qos_parm.qos_flags |=
617 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 618 if (priv->qos_data.qos_active)
619 priv->qos_data.def_qos_parm.qos_flags |=
620 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
621
fd105e79 622 if (priv->current_ht_config.is_ht)
f1f1f5c7 623 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 624
3109ece1 625 if (force || iwl_is_associated(priv)) {
e1623446 626 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
f1f1f5c7
TW		 627 priv->qos_data.qos_active,
628 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 629
1ff50bda
EG		 630 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
631 sizeof(struct iwl_qosparam_cmd),
632 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY		 633 }
634}
635
b481de9c 636#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 637
3195c1f3 638static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 639{
640 u16 new_val = 0;
641 u16 beacon_factor = 0;
642
3195c1f3
TW		 643 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
644 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY		 645 new_val = beacon_val / beacon_factor;
646
41d2f291
JL		 647 if (!new_val)
648 new_val = MAX_UCODE_BEACON_INTERVAL;
649
3195c1f3 650 return new_val;
b481de9c
ZY		 651}
652
3195c1f3 653static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 654{
3195c1f3
TW		 655 u64 tsf;
656 s32 interval_tm, rem;
b481de9c
ZY		 657 unsigned long flags;
658 struct ieee80211_conf *conf = NULL;
659 u16 beacon_int = 0;
660
661 conf = ieee80211_get_hw_conf(priv->hw);
662
663 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 664 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 665 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 666
05c914fe 667 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 668 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY		 669 priv->rxon_timing.atim_window = 0;
670 } else {
3195c1f3
TW		 671 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
672
b481de9c
ZY		 673 /* TODO: we need to get atim_window from upper stack
674 * for now we set to 0 */
675 priv->rxon_timing.atim_window = 0;
676 }
677
3195c1f3 678 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 679
3195c1f3
TW		 680 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
681 interval_tm = beacon_int * 1024;
682 rem = do_div(tsf, interval_tm);
683 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
684
685 spin_unlock_irqrestore(&priv->lock, flags);
e1623446 686 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
3195c1f3
TW		 687 le16_to_cpu(priv->rxon_timing.beacon_interval),
688 le32_to_cpu(priv->rxon_timing.beacon_init_val),
689 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY		 690}
691
5b9f8cd3 692static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 693{
5b9f8cd3 694 iwl_connection_init_rx_config(priv, mode);
8ccde88a 695 iwl_set_rxon_chain(priv);
b481de9c
ZY		 696 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
697
37deb2a0 698 iwl_clear_stations_table(priv);
b481de9c 699
fde3571f 700 /* dont commit rxon if rf-kill is on*/
fee1247a 701 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 702 return -EAGAIN;
703
704 cancel_delayed_work(&priv->scan_check);
2a421b91 705 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 706 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 707 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA		 708 return -EAGAIN;
709 }
710
5b9f8cd3 711 iwl_commit_rxon(priv);
b481de9c
ZY		 712
713 return 0;
714}
715
b481de9c
ZY		 716/******************************************************************************
717 *
718 * Generic RX handler implementations
719 *
720 ******************************************************************************/
885ba202
TW		 721static void iwl_rx_reply_alive(struct iwl_priv *priv,
722 struct iwl_rx_mem_buffer *rxb)
b481de9c 723{
db11d634 724 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 725 struct iwl_alive_resp *palive;
b481de9c
ZY		 726 struct delayed_work *pwork;
727
728 palive = &pkt->u.alive_frame;
729
e1623446 730 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY		 731 "0x%01X 0x%01X\n",
732 palive->is_valid, palive->ver_type,
733 palive->ver_subtype);
734
735 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 736 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
b481de9c
ZY		 737 memcpy(&priv->card_alive_init,
738 &pkt->u.alive_frame,
885ba202 739 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY		 740 pwork = &priv->init_alive_start;
741 } else {
e1623446 742 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 743 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 744 sizeof(struct iwl_alive_resp));
b481de9c
ZY		 745 pwork = &priv->alive_start;
746 }
747
748 /* We delay the ALIVE response by 5ms to
749 * give the HW RF Kill time to activate... */
750 if (palive->is_valid == UCODE_VALID_OK)
751 queue_delayed_work(priv->workqueue, pwork,
752 msecs_to_jiffies(5));
753 else
39aadf8c 754 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY		 755}
756
5b9f8cd3 757static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 758{
c79dd5b5
TW		 759 struct iwl_priv *priv =
760 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 761 struct sk_buff *beacon;
762
763 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 764 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY		 765
766 if (!beacon) {
15b1687c 767 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY		 768 return;
769 }
770
771 mutex_lock(&priv->mutex);
772 /* new beacon skb is allocated every time; dispose previous.*/
773 if (priv->ibss_beacon)
774 dev_kfree_skb(priv->ibss_beacon);
775
776 priv->ibss_beacon = beacon;
777 mutex_unlock(&priv->mutex);
778
5b9f8cd3 779 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 780}
781
4e39317d 782/**
5b9f8cd3 783 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG		 784 *
785 * This callback is provided in order to send a statistics request.
786 *
787 * This timer function is continually reset to execute within
788 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
789 * was received. We need to ensure we receive the statistics in order
790 * to update the temperature used for calibrating the TXPOWER.
791 */
5b9f8cd3 792static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG		 793{
794 struct iwl_priv *priv = (struct iwl_priv *)data;
795
796 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
797 return;
798
61780ee3
MA		 799 /* dont send host command if rf-kill is on */
800 if (!iwl_is_ready_rf(priv))
801 return;
802
4e39317d
EG		 803 iwl_send_statistics_request(priv, CMD_ASYNC);
804}
805
5b9f8cd3 806static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 807 struct iwl_rx_mem_buffer *rxb)
b481de9c 808{
0a6857e7 809#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 810 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW		 811 struct iwl4965_beacon_notif *beacon =
812 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 813 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c 814
e1623446 815 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c 816 "tsf %d %d rate %d\n",
25a6572c 817 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY		 818 beacon->beacon_notify_hdr.failure_frame,
819 le32_to_cpu(beacon->ibss_mgr_status),
820 le32_to_cpu(beacon->high_tsf),
821 le32_to_cpu(beacon->low_tsf), rate);
822#endif
823
05c914fe 824 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY		 825 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
826 queue_work(priv->workqueue, &priv->beacon_update);
827}
828
b481de9c
ZY		 829/* Handle notification from uCode that card's power state is changing
830 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 831static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 832 struct iwl_rx_mem_buffer *rxb)
b481de9c 833{
db11d634 834 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 835 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
836 unsigned long status = priv->status;
837
e1623446 838 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY		 839 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
840 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
841
842 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
843 RF_CARD_DISABLED)) {
844
3395f6e9 845 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 846 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
847
3395f6e9
TW		 848 if (!iwl_grab_nic_access(priv)) {
849 iwl_write_direct32(
b481de9c
ZY		 850 priv, HBUS_TARG_MBX_C,
851 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
852
3395f6e9 853 iwl_release_nic_access(priv);
b481de9c
ZY		 854 }
855
856 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 857 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 858 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 859 if (!iwl_grab_nic_access(priv)) {
860 iwl_write_direct32(
b481de9c
ZY		 861 priv, HBUS_TARG_MBX_C,
862 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
863
3395f6e9 864 iwl_release_nic_access(priv);
b481de9c
ZY		 865 }
866 }
867
868 if (flags & RF_CARD_DISABLED) {
3395f6e9 869 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 870 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 871 iwl_read32(priv, CSR_UCODE_DRV_GP1);
872 if (!iwl_grab_nic_access(priv))
873 iwl_release_nic_access(priv);
b481de9c
ZY		 874 }
875 }
876
877 if (flags & HW_CARD_DISABLED)
878 set_bit(STATUS_RF_KILL_HW, &priv->status);
879 else
880 clear_bit(STATUS_RF_KILL_HW, &priv->status);
881
882
883 if (flags & SW_CARD_DISABLED)
884 set_bit(STATUS_RF_KILL_SW, &priv->status);
885 else
886 clear_bit(STATUS_RF_KILL_SW, &priv->status);
887
888 if (!(flags & RXON_CARD_DISABLED))
2a421b91 889 iwl_scan_cancel(priv);
b481de9c
ZY		 890
891 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
892 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
893 (test_bit(STATUS_RF_KILL_SW, &status) !=
894 test_bit(STATUS_RF_KILL_SW, &priv->status)))
895 queue_work(priv->workqueue, &priv->rf_kill);
896 else
897 wake_up_interruptible(&priv->wait_command_queue);
898}
899
5b9f8cd3 900int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW		 901{
902 int ret;
903 unsigned long flags;
904
905 spin_lock_irqsave(&priv->lock, flags);
906 ret = iwl_grab_nic_access(priv);
907 if (ret)
908 goto err;
909
910 if (src == IWL_PWR_SRC_VAUX) {
3fdb68de 911 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
e2e3c57b
TW		 912 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
913 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
914 ~APMG_PS_CTRL_MSK_PWR_SRC);
915 } else {
916 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
917 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
918 ~APMG_PS_CTRL_MSK_PWR_SRC);
919 }
920
921 iwl_release_nic_access(priv);
922err:
923 spin_unlock_irqrestore(&priv->lock, flags);
924 return ret;
925}
926
b481de9c 927/**
5b9f8cd3 928 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 929 *
930 * Setup the RX handlers for each of the reply types sent from the uCode
931 * to the host.
932 *
933 * This function chains into the hardware specific files for them to setup
934 * any hardware specific handlers as well.
935 */
653fa4a0 936static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 937{
885ba202 938 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG		 939 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
940 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 941 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 942 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG		 943 iwl_rx_pm_debug_statistics_notif;
944 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 945
9fbab516
BC		 946 /*
947 * The same handler is used for both the REPLY to a discrete
948 * statistics request from the host as well as for the periodic
949 * statistics notifications (after received beacons) from the uCode.
b481de9c 950 */
8f91aecb
EG		 951 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
952 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 953
21c339bf 954 iwl_setup_spectrum_handlers(priv);
2a421b91
TW		 955 iwl_setup_rx_scan_handlers(priv);
956
37a44211 957 /* status change handler */
5b9f8cd3 958 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 959
c1354754
TW		 960 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
961 iwl_rx_missed_beacon_notif;
37a44211 962 /* Rx handlers */
1781a07f
EG		 963 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
964 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG		 965 /* block ack */
966 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 967 /* Set up hardware specific Rx handlers */
d4789efe 968 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY		 969}
970
b481de9c 971/**
a55360e4 972 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 973 *
974 * Uses the priv->rx_handlers callback function array to invoke
975 * the appropriate handlers, including command responses,
976 * frame-received notifications, and other notifications.
977 */
a55360e4 978void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 979{
a55360e4 980 struct iwl_rx_mem_buffer *rxb;
db11d634 981 struct iwl_rx_packet *pkt;
a55360e4 982 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 983 u32 r, i;
984 int reclaim;
985 unsigned long flags;
5c0eef96 986 u8 fill_rx = 0;
d68ab680 987 u32 count = 8;
b481de9c 988
6440adb5
CB		 989 /* uCode's read index (stored in shared DRAM) indicates the last Rx
990 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 991 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY		 992 i = rxq->read;
993
994 /* Rx interrupt, but nothing sent from uCode */
995 if (i == r)
e1623446 996 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
b481de9c 997
a55360e4 998 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA		 999 fill_rx = 1;
1000
b481de9c
ZY		 1001 while (i != r) {
1002 rxb = rxq->queue[i];
1003
9fbab516 1004 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 1005 * then a bug has been introduced in the queue refilling
1006 * routines -- catch it here */
1007 BUG_ON(rxb == NULL);
1008
1009 rxq->queue[i] = NULL;
1010
e91af0af
JB		 1011 dma_sync_single_range_for_cpu(
1012 &priv->pci_dev->dev, rxb->real_dma_addr,
1013 rxb->aligned_dma_addr - rxb->real_dma_addr,
1014 priv->hw_params.rx_buf_size,
1015 PCI_DMA_FROMDEVICE);
db11d634 1016 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 1017
1018 /* Reclaim a command buffer only if this packet is a response
1019 * to a (driver-originated) command.
1020 * If the packet (e.g. Rx frame) originated from uCode,
1021 * there is no command buffer to reclaim.
1022 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1023 * but apparently a few don't get set; catch them here. */
1024 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1025 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1026 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1027 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1028 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 1029 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1030 (pkt->hdr.cmd != REPLY_TX);
1031
1032 /* Based on type of command response or notification,
1033 * handle those that need handling via function in
5b9f8cd3 1034 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1035 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1036 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
f3d67999 1037 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY		 1038 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1039 } else {
1040 /* No handling needed */
e1623446 1041 IWL_DEBUG_RX(priv,
b481de9c
ZY		 1042 "r %d i %d No handler needed for %s, 0x%02x\n",
1043 r, i, get_cmd_string(pkt->hdr.cmd),
1044 pkt->hdr.cmd);
1045 }
1046
1047 if (reclaim) {
9fbab516 1048 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1049 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 1050 * as we reclaim the driver command queue */
1051 if (rxb && rxb->skb)
17b88929 1052 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1053 else
39aadf8c 1054 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY		 1055 }
1056
1057 /* For now we just don't re-use anything. We can tweak this
1058 * later to try and re-use notification packets and SKBs that
1059 * fail to Rx correctly */
1060 if (rxb->skb != NULL) {
1061 priv->alloc_rxb_skb--;
1062 dev_kfree_skb_any(rxb->skb);
1063 rxb->skb = NULL;
1064 }
1065
4018517a
JB		 1066 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1067 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1068 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 1069 spin_lock_irqsave(&rxq->lock, flags);
1070 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1071 spin_unlock_irqrestore(&rxq->lock, flags);
1072 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 1073 /* If there are a lot of unused frames,
1074 * restock the Rx queue so ucode wont assert. */
1075 if (fill_rx) {
1076 count++;
1077 if (count >= 8) {
1078 priv->rxq.read = i;
f1bc4ac6 1079 iwl_rx_queue_restock(priv);
5c0eef96
MA		 1080 count = 0;
1081 }
1082 }
b481de9c
ZY		 1083 }
1084
1085 /* Backtrack one entry */
1086 priv->rxq.read = i;
a55360e4
TW		 1087 iwl_rx_queue_restock(priv);
1088}
a55360e4 1089
0359facc
MA		 1090/* call this function to flush any scheduled tasklet */
1091static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1092{
a96a27f9 1093 /* wait to make sure we flush pending tasklet*/
0359facc
MA		 1094 synchronize_irq(priv->pci_dev->irq);
1095 tasklet_kill(&priv->irq_tasklet);
1096}
1097
5b9f8cd3 1098static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 1099{
1100 unsigned long flags;
1101
1102 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1103 sizeof(priv->staging_rxon));
1104 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1105 iwl_commit_rxon(priv);
b481de9c 1106
4f40e4d9 1107 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 1108
1109 spin_lock_irqsave(&priv->lock, flags);
1110 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1111 priv->error_recovering = 0;
1112 spin_unlock_irqrestore(&priv->lock, flags);
1113}
1114
5b9f8cd3 1115static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 1116{
1117 u32 inta, handled = 0;
1118 u32 inta_fh;
1119 unsigned long flags;
0a6857e7 1120#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 1121 u32 inta_mask;
1122#endif
1123
1124 spin_lock_irqsave(&priv->lock, flags);
1125
1126 /* Ack/clear/reset pending uCode interrupts.
1127 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1128 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 1129 inta = iwl_read32(priv, CSR_INT);
1130 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 1131
1132 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1133 * Any new interrupts that happen after this, either while we're
1134 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 1135 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1136 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1137
0a6857e7 1138#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1139 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1140 /* just for debug */
3395f6e9 1141 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1142 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY		 1143 inta, inta_mask, inta_fh);
1144 }
1145#endif
1146
1147 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1148 * atomic, make sure that inta covers all the interrupts that
1149 * we've discovered, even if FH interrupt came in just after
1150 * reading CSR_INT. */
6f83eaa1 1151 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1152 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1153 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 1154 inta |= CSR_INT_BIT_FH_TX;
1155
1156 /* Now service all interrupt bits discovered above. */
1157 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1158 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY		 1159
1160 /* Tell the device to stop sending interrupts */
5b9f8cd3 1161 iwl_disable_interrupts(priv);
b481de9c 1162
5b9f8cd3 1163 iwl_irq_handle_error(priv);
b481de9c
ZY		 1164
1165 handled |= CSR_INT_BIT_HW_ERR;
1166
1167 spin_unlock_irqrestore(&priv->lock, flags);
1168
1169 return;
1170 }
1171
0a6857e7 1172#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1173 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1174 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 1175 if (inta & CSR_INT_BIT_SCD)
e1623446 1176 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1177 "the frame/frames.\n");
b481de9c
ZY		 1178
1179 /* Alive notification via Rx interrupt will do the real work */
1180 if (inta & CSR_INT_BIT_ALIVE)
e1623446 1181 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY		 1182 }
1183#endif
1184 /* Safely ignore these bits for debug checks below */
25c03d8e 1185 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1186
9fbab516 1187 /* HW RF KILL switch toggled */
b481de9c
ZY		 1188 if (inta & CSR_INT_BIT_RF_KILL) {
1189 int hw_rf_kill = 0;
3395f6e9 1190 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 1191 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1192 hw_rf_kill = 1;
1193
e1623446 1194 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
c3056065 1195 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1196
a9efa652 1197 /* driver only loads ucode once setting the interface up.
6cd0b1cb
HS		 1198 * the driver allows loading the ucode even if the radio
1199 * is killed. Hence update the killswitch state here. The
1200 * rfkill handler will care about restarting if needed.
a9efa652 1201 */
6cd0b1cb
HS		 1202 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1203 if (hw_rf_kill)
1204 set_bit(STATUS_RF_KILL_HW, &priv->status);
1205 else
1206 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1207 queue_work(priv->workqueue, &priv->rf_kill);
edb34228 1208 }
b481de9c
ZY		 1209
1210 handled |= CSR_INT_BIT_RF_KILL;
1211 }
1212
9fbab516 1213 /* Chip got too hot and stopped itself */
b481de9c 1214 if (inta & CSR_INT_BIT_CT_KILL) {
15b1687c 1215 IWL_ERR(priv, "Microcode CT kill error detected.\n");
b481de9c
ZY		 1216 handled |= CSR_INT_BIT_CT_KILL;
1217 }
1218
1219 /* Error detected by uCode */
1220 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT		 1221 IWL_ERR(priv, "Microcode SW error detected. "
1222 " Restarting 0x%X.\n", inta);
5b9f8cd3 1223 iwl_irq_handle_error(priv);
b481de9c
ZY		 1224 handled |= CSR_INT_BIT_SW_ERR;
1225 }
1226
1227 /* uCode wakes up after power-down sleep */
1228 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1229 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
a55360e4 1230 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW		 1231 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1232 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1233 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1234 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1235 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1236 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 1237
1238 handled |= CSR_INT_BIT_WAKEUP;
1239 }
1240
1241 /* All uCode command responses, including Tx command responses,
1242 * Rx "responses" (frame-received notification), and other
1243 * notifications from uCode come through here*/
1244 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1245 iwl_rx_handle(priv);
b481de9c
ZY		 1246 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1247 }
1248
1249 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1250 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 1251 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR		 1252 /* FH finished to write, send event */
1253 priv->ucode_write_complete = 1;
1254 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1255 }
1256
1257 if (inta & ~handled)
15b1687c 1258 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY		 1259
1260 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 1261 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 1262 inta & ~CSR_INI_SET_MASK);
39aadf8c 1263 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY		 1264 }
1265
1266 /* Re-enable all interrupts */
0359facc
MA		 1267 /* only Re-enable if diabled by irq */
1268 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1269 iwl_enable_interrupts(priv);
b481de9c 1270
0a6857e7 1271#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1272 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 1273 inta = iwl_read32(priv, CSR_INT);
1274 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1275 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 1276 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY		 1277 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1278 }
1279#endif
1280 spin_unlock_irqrestore(&priv->lock, flags);
1281}
1282
b481de9c
ZY		 1283/******************************************************************************
1284 *
1285 * uCode download functions
1286 *
1287 ******************************************************************************/
1288
5b9f8cd3 1289static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1290{
98c92211
TW		 1291 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1292 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1293 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1294 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1295 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1296 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 1297}
1298
5b9f8cd3 1299static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR		 1300{
1301 /* Remove all resets to allow NIC to operate */
1302 iwl_write32(priv, CSR_RESET, 0);
1303}
1304
1305
b481de9c 1306/**
5b9f8cd3 1307 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 1308 *
1309 * Copy into buffers for card to fetch via bus-mastering
1310 */
5b9f8cd3 1311static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1312{
14b3d338 1313 struct iwl_ucode *ucode;
a0987a8d 1314 int ret = -EINVAL, index;
b481de9c 1315 const struct firmware *ucode_raw;
a0987a8d
RC		 1316 const char *name_pre = priv->cfg->fw_name_pre;
1317 const unsigned int api_max = priv->cfg->ucode_api_max;
1318 const unsigned int api_min = priv->cfg->ucode_api_min;
1319 char buf[25];
b481de9c
ZY		 1320 u8 *src;
1321 size_t len;
a0987a8d 1322 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY		 1323
1324 /* Ask kernel firmware_class module to get the boot firmware off disk.
1325 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC		 1326 for (index = api_max; index >= api_min; index--) {
1327 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1328 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1329 if (ret < 0) {
15b1687c 1330 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC		 1331 buf, ret);
1332 if (ret == -ENOENT)
1333 continue;
1334 else
1335 goto error;
1336 } else {
1337 if (index < api_max)
15b1687c
WT		 1338 IWL_ERR(priv, "Loaded firmware %s, "
1339 "which is deprecated. "
1340 "Please use API v%u instead.\n",
a0987a8d 1341 buf, api_max);
15b1687c 1342
e1623446 1343 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
a0987a8d
RC		 1344 buf, ucode_raw->size);
1345 break;
1346 }
b481de9c
ZY		 1347 }
1348
a0987a8d
RC		 1349 if (ret < 0)
1350 goto error;
b481de9c
ZY		 1351
1352 /* Make sure that we got at least our header! */
1353 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 1354 IWL_ERR(priv, "File size way too small!\n");
90e759d1 1355 ret = -EINVAL;
b481de9c
ZY		 1356 goto err_release;
1357 }
1358
1359 /* Data from ucode file: header followed by uCode images */
1360 ucode = (void *)ucode_raw->data;
1361
c02b3acd 1362 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1363 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY		 1364 inst_size = le32_to_cpu(ucode->inst_size);
1365 data_size = le32_to_cpu(ucode->data_size);
1366 init_size = le32_to_cpu(ucode->init_size);
1367 init_data_size = le32_to_cpu(ucode->init_data_size);
1368 boot_size = le32_to_cpu(ucode->boot_size);
1369
a0987a8d
RC		 1370 /* api_ver should match the api version forming part of the
1371 * firmware filename ... but we don't check for that and only rely
1372 * on the API version read from firware header from here on forward */
1373
1374 if (api_ver < api_min || api_ver > api_max) {
15b1687c 1375 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC		 1376 "Driver supports v%u, firmware is v%u.\n",
1377 api_max, api_ver);
1378 priv->ucode_ver = 0;
1379 ret = -EINVAL;
1380 goto err_release;
1381 }
1382 if (api_ver != api_max)
978785a3 1383 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
a0987a8d
RC		 1384 "got v%u. New firmware can be obtained "
1385 "from http://www.intellinuxwireless.org.\n",
1386 api_max, api_ver);
1387
978785a3
TW		 1388 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1389 IWL_UCODE_MAJOR(priv->ucode_ver),
1390 IWL_UCODE_MINOR(priv->ucode_ver),
1391 IWL_UCODE_API(priv->ucode_ver),
1392 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d 1393
e1623446 1394 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 1395 priv->ucode_ver);
e1623446 1396 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
b481de9c 1397 inst_size);
e1623446 1398 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
b481de9c 1399 data_size);
e1623446 1400 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
b481de9c 1401 init_size);
e1623446 1402 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
b481de9c 1403 init_data_size);
e1623446 1404 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
b481de9c
ZY		 1405 boot_size);
1406
1407 /* Verify size of file vs. image size info in file's header */
1408 if (ucode_raw->size < sizeof(*ucode) +
1409 inst_size + data_size + init_size +
1410 init_data_size + boot_size) {
1411
e1623446 1412 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
b481de9c 1413 (int)ucode_raw->size);
90e759d1 1414 ret = -EINVAL;
b481de9c
ZY		 1415 goto err_release;
1416 }
1417
1418 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1419 if (inst_size > priv->hw_params.max_inst_size) {
e1623446 1420 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW		 1421 inst_size);
1422 ret = -EINVAL;
b481de9c
ZY		 1423 goto err_release;
1424 }
1425
099b40b7 1426 if (data_size > priv->hw_params.max_data_size) {
e1623446 1427 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW		 1428 data_size);
1429 ret = -EINVAL;
b481de9c
ZY		 1430 goto err_release;
1431 }
099b40b7 1432 if (init_size > priv->hw_params.max_inst_size) {
e1623446
TW		 1433 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1434 init_size);
90e759d1 1435 ret = -EINVAL;
b481de9c
ZY		 1436 goto err_release;
1437 }
099b40b7 1438 if (init_data_size > priv->hw_params.max_data_size) {
e1623446 1439 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
90e759d1
TW		 1440 init_data_size);
1441 ret = -EINVAL;
b481de9c
ZY		 1442 goto err_release;
1443 }
099b40b7 1444 if (boot_size > priv->hw_params.max_bsm_size) {
e1623446
TW		 1445 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1446 boot_size);
90e759d1 1447 ret = -EINVAL;
b481de9c
ZY		 1448 goto err_release;
1449 }
1450
1451 /* Allocate ucode buffers for card's bus-master loading ... */
1452
1453 /* Runtime instructions and 2 copies of data:
1454 * 1) unmodified from disk
1455 * 2) backup cache for save/restore during power-downs */
1456 priv->ucode_code.len = inst_size;
98c92211 1457 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 1458
1459 priv->ucode_data.len = data_size;
98c92211 1460 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 1461
1462 priv->ucode_data_backup.len = data_size;
98c92211 1463 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 1464
1f304e4e
ZY		 1465 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1466 !priv->ucode_data_backup.v_addr)
1467 goto err_pci_alloc;
1468
b481de9c 1469 /* Initialization instructions and data */
90e759d1
TW		 1470 if (init_size && init_data_size) {
1471 priv->ucode_init.len = init_size;
98c92211 1472 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 1473
1474 priv->ucode_init_data.len = init_data_size;
98c92211 1475 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 1476
1477 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1478 goto err_pci_alloc;
1479 }
b481de9c
ZY		 1480
1481 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 1482 if (boot_size) {
1483 priv->ucode_boot.len = boot_size;
98c92211 1484 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1485
90e759d1
TW		 1486 if (!priv->ucode_boot.v_addr)
1487 goto err_pci_alloc;
1488 }
b481de9c
ZY		 1489
1490 /* Copy images into buffers for card's bus-master reads ... */
1491
1492 /* Runtime instructions (first block of data in file) */
1493 src = &ucode->data[0];
1494 len = priv->ucode_code.len;
e1623446 1495 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c 1496 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 1497 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY		 1498 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1499
1500 /* Runtime data (2nd block)
5b9f8cd3 1501 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY		 1502 src = &ucode->data[inst_size];
1503 len = priv->ucode_data.len;
e1623446 1504 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 1505 memcpy(priv->ucode_data.v_addr, src, len);
1506 memcpy(priv->ucode_data_backup.v_addr, src, len);
1507
1508 /* Initialization instructions (3rd block) */
1509 if (init_size) {
1510 src = &ucode->data[inst_size + data_size];
1511 len = priv->ucode_init.len;
e1623446 1512 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
90e759d1 1513 len);
b481de9c
ZY		 1514 memcpy(priv->ucode_init.v_addr, src, len);
1515 }
1516
1517 /* Initialization data (4th block) */
1518 if (init_data_size) {
1519 src = &ucode->data[inst_size + data_size + init_size];
1520 len = priv->ucode_init_data.len;
e1623446 1521 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
90e759d1 1522 len);
b481de9c
ZY		 1523 memcpy(priv->ucode_init_data.v_addr, src, len);
1524 }
1525
1526 /* Bootstrap instructions (5th block) */
1527 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1528 len = priv->ucode_boot.len;
e1623446 1529 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 1530 memcpy(priv->ucode_boot.v_addr, src, len);
1531
1532 /* We have our copies now, allow OS release its copies */
1533 release_firmware(ucode_raw);
1534 return 0;
1535
1536 err_pci_alloc:
15b1687c 1537 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 1538 ret = -ENOMEM;
5b9f8cd3 1539 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 1540
1541 err_release:
1542 release_firmware(ucode_raw);
1543
1544 error:
90e759d1 1545 return ret;
b481de9c
ZY		 1546}
1547
ada17513
MA		 1548/* temporary */
1549static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1550 struct sk_buff *skb);
1551
b481de9c 1552/**
4a4a9e81 1553 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1554 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1555 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1556 */
4a4a9e81 1557static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1558{
57aab75a 1559 int ret = 0;
b481de9c 1560
e1623446 1561 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY		 1562
1563 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1564 /* We had an error bringing up the hardware, so take it
1565 * all the way back down so we can try again */
e1623446 1566 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY		 1567 goto restart;
1568 }
1569
1570 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1571 * This is a paranoid check, because we would not have gotten the
1572 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1573 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 1574 /* Runtime instruction load was bad;
1575 * take it all the way back down so we can try again */
e1623446 1576 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY		 1577 goto restart;
1578 }
1579
37deb2a0 1580 iwl_clear_stations_table(priv);
57aab75a
TW		 1581 ret = priv->cfg->ops->lib->alive_notify(priv);
1582 if (ret) {
39aadf8c
WT		 1583 IWL_WARN(priv,
1584 "Could not complete ALIVE transition [ntf]: %d\n", ret);
b481de9c
ZY		 1585 goto restart;
1586 }
1587
5b9f8cd3 1588 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY		 1589 set_bit(STATUS_ALIVE, &priv->status);
1590
fee1247a 1591 if (iwl_is_rfkill(priv))
b481de9c
ZY		 1592 return;
1593
36d6825b 1594 ieee80211_wake_queues(priv->hw);
b481de9c
ZY		 1595
1596 priv->active_rate = priv->rates_mask;
1597 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1598
3109ece1 1599 if (iwl_is_associated(priv)) {
c1adf9fb
GG		 1600 struct iwl_rxon_cmd *active_rxon =
1601 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY		 1602
1603 memcpy(&priv->staging_rxon, &priv->active_rxon,
1604 sizeof(priv->staging_rxon));
1605 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1606 } else {
1607 /* Initialize our rx_config data */
5b9f8cd3 1608 iwl_connection_init_rx_config(priv, priv->iw_mode);
8ccde88a 1609 iwl_set_rxon_chain(priv);
b481de9c
ZY		 1610 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1611 }
1612
9fbab516 1613 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1614 iwl_send_bt_config(priv);
b481de9c 1615
4a4a9e81
TW		 1616 iwl_reset_run_time_calib(priv);
1617
b481de9c 1618 /* Configure the adapter for unassociated operation */
5b9f8cd3 1619 iwl_commit_rxon(priv);
b481de9c
ZY		 1620
1621 /* At this point, the NIC is initialized and operational */
47f4a587 1622 iwl_rf_kill_ct_config(priv);
5a66926a 1623
fe00b5a5
RC		 1624 iwl_leds_register(priv);
1625
e1623446 1626 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 1627 set_bit(STATUS_READY, &priv->status);
5a66926a 1628 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1629
1630 if (priv->error_recovering)
5b9f8cd3 1631 iwl_error_recovery(priv);
b481de9c 1632
58d0f361 1633 iwl_power_update_mode(priv, 1);
c46fbefa 1634
ada17513
MA		 1635 /* reassociate for ADHOC mode */
1636 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1637 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1638 priv->vif);
1639 if (beacon)
1640 iwl_mac_beacon_update(priv->hw, beacon);
1641 }
1642
1643
c46fbefa 1644 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1645 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1646
b481de9c
ZY		 1647 return;
1648
1649 restart:
1650 queue_work(priv->workqueue, &priv->restart);
1651}
1652
4e39317d 1653static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1654
5b9f8cd3 1655static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1656{
1657 unsigned long flags;
1658 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c 1659
e1623446 1660 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c 1661
b481de9c
ZY		 1662 if (!exit_pending)
1663 set_bit(STATUS_EXIT_PENDING, &priv->status);
1664
ab53d8af
MA		 1665 iwl_leds_unregister(priv);
1666
37deb2a0 1667 iwl_clear_stations_table(priv);
b481de9c
ZY		 1668
1669 /* Unblock any waiting calls */
1670 wake_up_interruptible_all(&priv->wait_command_queue);
1671
b481de9c
ZY		 1672 /* Wipe out the EXIT_PENDING status bit if we are not actually
1673 * exiting the module */
1674 if (!exit_pending)
1675 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1676
1677 /* stop and reset the on-board processor */
3395f6e9 1678 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 1679
1680 /* tell the device to stop sending interrupts */
0359facc 1681 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1682 iwl_disable_interrupts(priv);
0359facc
MA		 1683 spin_unlock_irqrestore(&priv->lock, flags);
1684 iwl_synchronize_irq(priv);
b481de9c
ZY		 1685
1686 if (priv->mac80211_registered)
1687 ieee80211_stop_queues(priv->hw);
1688
5b9f8cd3 1689 /* If we have not previously called iwl_init() then
b481de9c 1690 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1691 if (!iwl_is_init(priv)) {
b481de9c
ZY		 1692 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1693 STATUS_RF_KILL_HW |
1694 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1695 STATUS_RF_KILL_SW |
9788864e
RC		 1696 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1697 STATUS_GEO_CONFIGURED |
b481de9c 1698 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA		 1699 STATUS_IN_SUSPEND |
1700 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1701 STATUS_EXIT_PENDING;
b481de9c
ZY		 1702 goto exit;
1703 }
1704
1705 /* ...otherwise clear out all the status bits but the RF Kill and
1706 * SUSPEND bits and continue taking the NIC down. */
1707 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1708 STATUS_RF_KILL_HW |
1709 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1710 STATUS_RF_KILL_SW |
9788864e
RC		 1711 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1712 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 1713 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1714 STATUS_IN_SUSPEND |
1715 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA		 1716 STATUS_FW_ERROR |
1717 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1718 STATUS_EXIT_PENDING;
b481de9c
ZY		 1719
1720 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1721 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1722 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 1723 spin_unlock_irqrestore(&priv->lock, flags);
1724
da1bc453 1725 iwl_txq_ctx_stop(priv);
b3bbacb7 1726 iwl_rxq_stop(priv);
b481de9c
ZY		 1727
1728 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 1729 if (!iwl_grab_nic_access(priv)) {
1730 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1731 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1732 iwl_release_nic_access(priv);
b481de9c
ZY		 1733 }
1734 spin_unlock_irqrestore(&priv->lock, flags);
1735
1736 udelay(5);
1737
7f066108 1738 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG		 1739 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
1740 priv->cfg->ops->lib->apm_ops.stop(priv);
1741 else
1742 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 1743 exit:
885ba202 1744 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY		 1745
1746 if (priv->ibss_beacon)
1747 dev_kfree_skb(priv->ibss_beacon);
1748 priv->ibss_beacon = NULL;
1749
1750 /* clear out any free frames */
fcab423d 1751 iwl_clear_free_frames(priv);
b481de9c
ZY		 1752}
1753
5b9f8cd3 1754static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1755{
1756 mutex_lock(&priv->mutex);
5b9f8cd3 1757 __iwl_down(priv);
b481de9c 1758 mutex_unlock(&priv->mutex);
b24d22b1 1759
4e39317d 1760 iwl_cancel_deferred_work(priv);
b481de9c
ZY		 1761}
1762
1763#define MAX_HW_RESTARTS 5
1764
5b9f8cd3 1765static int __iwl_up(struct iwl_priv *priv)
b481de9c 1766{
57aab75a
TW		 1767 int i;
1768 int ret;
b481de9c
ZY		 1769
1770 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 1771 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY		 1772 return -EIO;
1773 }
1774
e903fbd4 1775 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 1776 IWL_ERR(priv, "ucode not available for device bringup\n");
e903fbd4
RC		 1777 return -EIO;
1778 }
1779
e655b9f0 1780 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 1781 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 1782 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 1783 else
e655b9f0 1784 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 1785
c1842d61 1786 if (iwl_is_rfkill(priv)) {
5b9f8cd3 1787 iwl_enable_interrupts(priv);
39aadf8c 1788 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
3bff19c2 1789 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 1790 return 0;
b481de9c
ZY		 1791 }
1792
3395f6e9 1793 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 1794
1053d35f 1795 ret = iwl_hw_nic_init(priv);
57aab75a 1796 if (ret) {
15b1687c 1797 IWL_ERR(priv, "Unable to init nic\n");
57aab75a 1798 return ret;
b481de9c
ZY		 1799 }
1800
1801 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 1802 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1803 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 1804 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1805
1806 /* clear (again), then enable host interrupts */
3395f6e9 1807 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 1808 iwl_enable_interrupts(priv);
b481de9c
ZY		 1809
1810 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 1811 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1812 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 1813
1814 /* Copy original ucode data image from disk into backup cache.
1815 * This will be used to initialize the on-board processor's
1816 * data SRAM for a clean start when the runtime program first loads. */
1817 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 1818 priv->ucode_data.len);
b481de9c 1819
b481de9c
ZY		 1820 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1821
37deb2a0 1822 iwl_clear_stations_table(priv);
b481de9c
ZY		 1823
1824 /* load bootstrap state machine,
1825 * load bootstrap program into processor's memory,
1826 * prepare to load the "initialize" uCode */
57aab75a 1827 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 1828
57aab75a 1829 if (ret) {
15b1687c
WT		 1830 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1831 ret);
b481de9c
ZY		 1832 continue;
1833 }
1834
f3d5b45b
EG		 1835 /* Clear out the uCode error bit if it is set */
1836 clear_bit(STATUS_FW_ERROR, &priv->status);
1837
b481de9c 1838 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 1839 iwl_nic_start(priv);
b481de9c 1840
e1623446 1841 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY		 1842
1843 return 0;
1844 }
1845
1846 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 1847 __iwl_down(priv);
64e72c3e 1848 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 1849
1850 /* tried to restart and config the device for as long as our
1851 * patience could withstand */
15b1687c 1852 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY		 1853 return -EIO;
1854}
1855
1856
1857/*****************************************************************************
1858 *
1859 * Workqueue callbacks
1860 *
1861 *****************************************************************************/
1862
4a4a9e81 1863static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 1864{
c79dd5b5
TW		 1865 struct iwl_priv *priv =
1866 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 1867
1868 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1869 return;
1870
1871 mutex_lock(&priv->mutex);
f3ccc08c 1872 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY		 1873 mutex_unlock(&priv->mutex);
1874}
1875
4a4a9e81 1876static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 1877{
c79dd5b5
TW		 1878 struct iwl_priv *priv =
1879 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 1880
1881 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1882 return;
1883
1884 mutex_lock(&priv->mutex);
4a4a9e81 1885 iwl_alive_start(priv);
b481de9c
ZY		 1886 mutex_unlock(&priv->mutex);
1887}
1888
16e727e8
EG		 1889static void iwl_bg_run_time_calib_work(struct work_struct *work)
1890{
1891 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1892 run_time_calib_work);
1893
1894 mutex_lock(&priv->mutex);
1895
1896 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1897 test_bit(STATUS_SCANNING, &priv->status)) {
1898 mutex_unlock(&priv->mutex);
1899 return;
1900 }
1901
1902 if (priv->start_calib) {
1903 iwl_chain_noise_calibration(priv, &priv->statistics);
1904
1905 iwl_sensitivity_calibration(priv, &priv->statistics);
1906 }
1907
1908 mutex_unlock(&priv->mutex);
1909 return;
1910}
1911
5b9f8cd3 1912static void iwl_bg_up(struct work_struct *data)
b481de9c 1913{
c79dd5b5 1914 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 1915
1916 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1917 return;
1918
1919 mutex_lock(&priv->mutex);
5b9f8cd3 1920 __iwl_up(priv);
b481de9c 1921 mutex_unlock(&priv->mutex);
80fcc9e2 1922 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 1923}
1924
5b9f8cd3 1925static void iwl_bg_restart(struct work_struct *data)
b481de9c 1926{
c79dd5b5 1927 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 1928
1929 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1930 return;
1931
5b9f8cd3 1932 iwl_down(priv);
b481de9c
ZY		 1933 queue_work(priv->workqueue, &priv->up);
1934}
1935
5b9f8cd3 1936static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 1937{
c79dd5b5
TW		 1938 struct iwl_priv *priv =
1939 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 1940
1941 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1942 return;
1943
1944 mutex_lock(&priv->mutex);
a55360e4 1945 iwl_rx_replenish(priv);
b481de9c
ZY		 1946 mutex_unlock(&priv->mutex);
1947}
1948
7878a5a4
MA		 1949#define IWL_DELAY_NEXT_SCAN (HZ*2)
1950
5b9f8cd3 1951static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 1952{
b481de9c 1953 struct ieee80211_conf *conf = NULL;
857485c0 1954 int ret = 0;
1ff50bda 1955 unsigned long flags;
b481de9c 1956
05c914fe 1957 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 1958 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY		 1959 return;
1960 }
1961
e1623446 1962 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
e174961c 1963 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY		 1964
1965
1966 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1967 return;
1968
b481de9c 1969
508e32e1 1970 if (!priv->vif || !priv->is_open)
948c171c 1971 return;
508e32e1 1972
c90a74ba 1973 iwl_power_cancel_timeout(priv);
2a421b91 1974 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 1975
b481de9c
ZY		 1976 conf = ieee80211_get_hw_conf(priv->hw);
1977
1978 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1979 iwl_commit_rxon(priv);
b481de9c 1980
3195c1f3 1981 iwl_setup_rxon_timing(priv);
857485c0 1982 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 1983 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 1984 if (ret)
39aadf8c 1985 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY		 1986 "Attempting to continue.\n");
1987
1988 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1989
42eb7c64 1990 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 1991
c7de35cd 1992 iwl_set_rxon_chain(priv);
b481de9c
ZY		 1993 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
1994
e1623446 1995 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY		 1996 priv->assoc_id, priv->beacon_int);
1997
1998 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
1999 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2000 else
2001 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2002
2003 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2004 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2005 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2006 else
2007 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2008
05c914fe 2009 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2010 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2011
2012 }
2013
5b9f8cd3 2014 iwl_commit_rxon(priv);
b481de9c
ZY		 2015
2016 switch (priv->iw_mode) {
05c914fe 2017 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 2018 break;
2019
05c914fe 2020 case NL80211_IFTYPE_ADHOC:
b481de9c 2021
c46fbefa
AK		 2022 /* assume default assoc id */
2023 priv->assoc_id = 1;
b481de9c 2024
4f40e4d9 2025 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2026 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2027
2028 break;
2029
2030 default:
15b1687c 2031 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 2032 __func__, priv->iw_mode);
b481de9c
ZY		 2033 break;
2034 }
2035
05c914fe 2036 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2037 priv->assoc_station_added = 1;
2038
1ff50bda
EG		 2039 spin_lock_irqsave(&priv->lock, flags);
2040 iwl_activate_qos(priv, 0);
2041 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2042
04816448
GE		 2043 /* the chain noise calibration will enabled PM upon completion
2044 * If chain noise has already been run, then we need to enable
2045 * power management here */
2046 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2047 iwl_power_enable_management(priv);
c90a74ba
EG		 2048
2049 /* Enable Rx differential gain and sensitivity calibrations */
2050 iwl_chain_noise_reset(priv);
2051 priv->start_calib = 1;
2052
508e32e1
RC		 2053}
2054
b481de9c
ZY		 2055/*****************************************************************************
2056 *
2057 * mac80211 entry point functions
2058 *
2059 *****************************************************************************/
2060
154b25ce 2061#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2062
5b9f8cd3 2063static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2064{
c79dd5b5 2065 struct iwl_priv *priv = hw->priv;
5a66926a 2066 int ret;
b481de9c 2067
e1623446 2068 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY		 2069
2070 /* we should be verifying the device is ready to be opened */
2071 mutex_lock(&priv->mutex);
2072
c1adf9fb 2073 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY		 2074 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2075 * ucode filename and max sizes are card-specific. */
b481de9c 2076
5a66926a 2077 if (!priv->ucode_code.len) {
5b9f8cd3 2078 ret = iwl_read_ucode(priv);
5a66926a 2079 if (ret) {
15b1687c 2080 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a 2081 mutex_unlock(&priv->mutex);
6cd0b1cb 2082 return ret;
5a66926a
ZY		 2083 }
2084 }
b481de9c 2085
5b9f8cd3 2086 ret = __iwl_up(priv);
5a66926a 2087
b481de9c 2088 mutex_unlock(&priv->mutex);
5a66926a 2089
80fcc9e2
AG		 2090 iwl_rfkill_set_hw_state(priv);
2091
e655b9f0 2092 if (ret)
6cd0b1cb 2093 return ret;
e655b9f0 2094
c1842d61
TW		 2095 if (iwl_is_rfkill(priv))
2096 goto out;
2097
e1623446 2098 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
e655b9f0
ZY		 2099
2100 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2101 return 0;
2102
fe9b6b72 2103 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2104 * mac80211 will not be run successfully. */
154b25ce
EG		 2105 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2106 test_bit(STATUS_READY, &priv->status),
2107 UCODE_READY_TIMEOUT);
2108 if (!ret) {
2109 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c 2110 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
154b25ce 2111 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6cd0b1cb 2112 return -ETIMEDOUT;
5a66926a 2113 }
fe9b6b72 2114 }
0a078ffa 2115
c1842d61 2116out:
0a078ffa 2117 priv->is_open = 1;
e1623446 2118 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2119 return 0;
2120}
2121
5b9f8cd3 2122static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2123{
c79dd5b5 2124 struct iwl_priv *priv = hw->priv;
b481de9c 2125
e1623446 2126 IWL_DEBUG_MAC80211(priv, "enter\n");
948c171c 2127
e655b9f0 2128 if (!priv->is_open) {
e1623446 2129 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY		 2130 return;
2131 }
2132
b481de9c 2133 priv->is_open = 0;
5a66926a 2134
fee1247a 2135 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 2136 /* stop mac, cancel any scan request and clear
2137 * RXON_FILTER_ASSOC_MSK BIT
2138 */
5a66926a 2139 mutex_lock(&priv->mutex);
2a421b91 2140 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2141 mutex_unlock(&priv->mutex);
fde3571f
MA		 2142 }
2143
5b9f8cd3 2144 iwl_down(priv);
5a66926a
ZY		 2145
2146 flush_workqueue(priv->workqueue);
6cd0b1cb
HS		 2147
2148 /* enable interrupts again in order to receive rfkill changes */
2149 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2150 iwl_enable_interrupts(priv);
948c171c 2151
e1623446 2152 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2153}
2154
5b9f8cd3 2155static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2156{
c79dd5b5 2157 struct iwl_priv *priv = hw->priv;
b481de9c 2158
e1623446 2159 IWL_DEBUG_MACDUMP(priv, "enter\n");
b481de9c 2160
e1623446 2161 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2162 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2163
e039fa4a 2164 if (iwl_tx_skb(priv, skb))
b481de9c
ZY		 2165 dev_kfree_skb_any(skb);
2166
e1623446 2167 IWL_DEBUG_MACDUMP(priv, "leave\n");
637f8837 2168 return NETDEV_TX_OK;
b481de9c
ZY		 2169}
2170
5b9f8cd3 2171static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2172 struct ieee80211_if_init_conf *conf)
2173{
c79dd5b5 2174 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2175 unsigned long flags;
2176
e1623446 2177 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 2178
32bfd35d 2179 if (priv->vif) {
e1623446 2180 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
75849d28 2181 return -EOPNOTSUPP;
b481de9c
ZY		 2182 }
2183
2184 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2185 priv->vif = conf->vif;
60294de3 2186 priv->iw_mode = conf->type;
b481de9c
ZY		 2187
2188 spin_unlock_irqrestore(&priv->lock, flags);
2189
2190 mutex_lock(&priv->mutex);
864792e3
TW		 2191
2192 if (conf->mac_addr) {
e1623446 2193 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
864792e3
TW		 2194 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2195 }
b481de9c 2196
5b9f8cd3 2197 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK		 2198 /* we are not ready, will run again when ready */
2199 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2200
b481de9c
ZY		 2201 mutex_unlock(&priv->mutex);
2202
e1623446 2203 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2204 return 0;
2205}
2206
2207/**
5b9f8cd3 2208 * iwl_mac_config - mac80211 config callback
b481de9c
ZY		 2209 *
2210 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2211 * be set inappropriately and the driver currently sets the hardware up to
2212 * use it whenever needed.
2213 */
5b9f8cd3 2214static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2215{
c79dd5b5 2216 struct iwl_priv *priv = hw->priv;
bf85ea4f 2217 const struct iwl_channel_info *ch_info;
e8975581 2218 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2219 unsigned long flags;
76bb77e0 2220 int ret = 0;
82a66bbb 2221 u16 channel;
b481de9c
ZY		 2222
2223 mutex_lock(&priv->mutex);
e1623446 2224 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n", conf->channel->hw_value);
b481de9c 2225
de27e64e 2226 priv->current_ht_config.is_ht = conf_is_ht(conf);
ae5eb026 2227
14a08a7f 2228 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
e1623446 2229 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - waiting for uCode\n");
14a08a7f 2230 goto out;
64e72c3e
MA		 2231 }
2232
14a08a7f
EG		 2233 if (!conf->radio_enabled)
2234 iwl_radio_kill_sw_disable_radio(priv);
2235
fee1247a 2236 if (!iwl_is_ready(priv)) {
e1623446 2237 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY		 2238 ret = -EIO;
2239 goto out;
b481de9c
ZY		 2240 }
2241
1ea87396 2242 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2243 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 2244 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
b481de9c 2245 mutex_unlock(&priv->mutex);
a0646470 2246 return 0;
b481de9c
ZY		 2247 }
2248
82a66bbb
TW		 2249 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2250 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2251 if (!is_channel_valid(ch_info)) {
e1623446 2252 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
76bb77e0
ZY		 2253 ret = -EINVAL;
2254 goto out;
b481de9c
ZY		 2255 }
2256
05c914fe 2257 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76 2258 !is_channel_ibss(ch_info)) {
15b1687c 2259 IWL_ERR(priv, "channel %d in band %d not IBSS channel\n",
398f9e76
AK		 2260 conf->channel->hw_value, conf->channel->band);
2261 ret = -EINVAL;
2262 goto out;
2263 }
2264
82a66bbb
TW		 2265 spin_lock_irqsave(&priv->lock, flags);
2266
b5d7be5e 2267
78330fdd 2268 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 2269 * from any ht related info since 2.4 does not
2270 * support ht */
82a66bbb 2271 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY		 2272#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2273 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2274#endif
2275 )
2276 priv->staging_rxon.flags = 0;
b481de9c 2277
17e72782 2278 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2279
82a66bbb 2280 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY		 2281
2282 /* The list of supported rates and rate mask can be different
8318d78a 2283 * for each band; since the band may have changed, reset
b481de9c 2284 * the rate mask to what mac80211 lists */
5b9f8cd3 2285 iwl_set_rate(priv);
b481de9c
ZY		 2286
2287 spin_unlock_irqrestore(&priv->lock, flags);
2288
2289#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2290 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2291 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2292 goto out;
b481de9c
ZY		 2293 }
2294#endif
2295
b481de9c 2296 if (!conf->radio_enabled) {
e1623446 2297 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
76bb77e0 2298 goto out;
b481de9c
ZY		 2299 }
2300
fee1247a 2301 if (iwl_is_rfkill(priv)) {
e1623446 2302 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY		 2303 ret = -EIO;
2304 goto out;
b481de9c
ZY		 2305 }
2306
e602cb18
EK		 2307 if (conf->flags & IEEE80211_CONF_PS)
2308 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2309 else
2310 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2311 if (ret)
e1623446 2312 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
e602cb18 2313
e1623446 2314 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
630fe9b6
TW		 2315 priv->tx_power_user_lmt, conf->power_level);
2316
2317 iwl_set_tx_power(priv, conf->power_level, false);
2318
5b9f8cd3 2319 iwl_set_rate(priv);
b481de9c 2320
7b841727
RF		 2321 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2322 iwl_set_rxon_chain(priv);
2323
b481de9c
ZY		 2324 if (memcmp(&priv->active_rxon,
2325 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2326 iwl_commit_rxon(priv);
b481de9c 2327 else
e1623446 2328 IWL_DEBUG_INFO(priv, "No re-sending same RXON configuration.\n");
b481de9c 2329
e1623446 2330 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 2331
a0646470 2332out:
5a66926a 2333 mutex_unlock(&priv->mutex);
76bb77e0 2334 return ret;
b481de9c
ZY		 2335}
2336
5b9f8cd3 2337static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2338{
857485c0 2339 int ret = 0;
1ff50bda 2340 unsigned long flags;
b481de9c 2341
d986bcd1 2342 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 2343 return;
2344
2345 /* The following should be done only at AP bring up */
3195c1f3 2346 if (!iwl_is_associated(priv)) {
b481de9c
ZY		 2347
2348 /* RXON - unassoc (to set timing command) */
2349 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2350 iwl_commit_rxon(priv);
b481de9c
ZY		 2351
2352 /* RXON Timing */
3195c1f3 2353 iwl_setup_rxon_timing(priv);
857485c0 2354 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2355 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2356 if (ret)
39aadf8c 2357 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY		 2358 "Attempting to continue.\n");
2359
c7de35cd 2360 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2361
2362 /* FIXME: what should be the assoc_id for AP? */
2363 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2364 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2365 priv->staging_rxon.flags |=
2366 RXON_FLG_SHORT_PREAMBLE_MSK;
2367 else
2368 priv->staging_rxon.flags &=
2369 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2370
2371 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2372 if (priv->assoc_capability &
2373 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2374 priv->staging_rxon.flags |=
2375 RXON_FLG_SHORT_SLOT_MSK;
2376 else
2377 priv->staging_rxon.flags &=
2378 ~RXON_FLG_SHORT_SLOT_MSK;
2379
05c914fe 2380 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2381 priv->staging_rxon.flags &=
2382 ~RXON_FLG_SHORT_SLOT_MSK;
2383 }
2384 /* restore RXON assoc */
2385 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2386 iwl_commit_rxon(priv);
1ff50bda
EG		 2387 spin_lock_irqsave(&priv->lock, flags);
2388 iwl_activate_qos(priv, 1);
2389 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2390 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2391 }
5b9f8cd3 2392 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2393
2394 /* FIXME - we need to add code here to detect a totally new
2395 * configuration, reset the AP, unassoc, rxon timing, assoc,
2396 * clear sta table, add BCAST sta... */
2397}
2398
9d139c81 2399
5b9f8cd3 2400static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2401 struct ieee80211_vif *vif,
b481de9c
ZY		 2402 struct ieee80211_if_conf *conf)
2403{
c79dd5b5 2404 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2405 int rc;
2406
2407 if (conf == NULL)
2408 return -EIO;
2409
b716bb91 2410 if (priv->vif != vif) {
e1623446 2411 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG		 2412 return 0;
2413 }
2414
05c914fe 2415 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB		 2416 conf->changed & IEEE80211_IFCC_BEACON) {
2417 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2418 if (!beacon)
2419 return -ENOMEM;
ada17513 2420 mutex_lock(&priv->mutex);
5b9f8cd3 2421 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2422 mutex_unlock(&priv->mutex);
9d139c81
JB		 2423 if (rc)
2424 return rc;
2425 }
2426
fee1247a 2427 if (!iwl_is_alive(priv))
5a66926a
ZY		 2428 return -EAGAIN;
2429
b481de9c
ZY		 2430 mutex_lock(&priv->mutex);
2431
b481de9c 2432 if (conf->bssid)
e1623446 2433 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 2434
4150c572
JB		 2435/*
2436 * very dubious code was here; the probe filtering flag is never set:
2437 *
b481de9c
ZY		 2438 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2439 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2440 */
b481de9c 2441
05c914fe 2442 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY		 2443 if (!conf->bssid) {
2444 conf->bssid = priv->mac_addr;
2445 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 2446 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 2447 conf->bssid);
b481de9c
ZY		 2448 }
2449 if (priv->ibss_beacon)
2450 dev_kfree_skb(priv->ibss_beacon);
2451
9d139c81 2452 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY		 2453 }
2454
fee1247a 2455 if (iwl_is_rfkill(priv))
fde3571f
MA		 2456 goto done;
2457
b481de9c
ZY		 2458 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2459 !is_multicast_ether_addr(conf->bssid)) {
2460 /* If there is currently a HW scan going on in the background
2461 * then we need to cancel it else the RXON below will fail. */
2a421b91 2462 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 2463 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 2464 "after 100ms\n");
e1623446 2465 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
b481de9c
ZY		 2466 mutex_unlock(&priv->mutex);
2467 return -EAGAIN;
2468 }
2469 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2470
2471 /* TODO: Audit driver for usage of these members and see
2472 * if mac80211 deprecates them (priv->bssid looks like it
2473 * shouldn't be there, but I haven't scanned the IBSS code
2474 * to verify) - jpk */
2475 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2476
05c914fe 2477 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2478 iwl_config_ap(priv);
b481de9c 2479 else {
5b9f8cd3 2480 rc = iwl_commit_rxon(priv);
05c914fe 2481 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2482 iwl_rxon_add_station(
b481de9c
ZY		 2483 priv, priv->active_rxon.bssid_addr, 1);
2484 }
2485
2486 } else {
2a421b91 2487 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2488 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2489 iwl_commit_rxon(priv);
b481de9c
ZY		 2490 }
2491
fde3571f 2492 done:
e1623446 2493 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2494 mutex_unlock(&priv->mutex);
2495
2496 return 0;
2497}
2498
5b9f8cd3 2499static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2500 struct ieee80211_if_init_conf *conf)
2501{
c79dd5b5 2502 struct iwl_priv *priv = hw->priv;
b481de9c 2503
e1623446 2504 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY		 2505
2506 mutex_lock(&priv->mutex);
948c171c 2507
fee1247a 2508 if (iwl_is_ready_rf(priv)) {
2a421b91 2509 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2510 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2511 iwl_commit_rxon(priv);
fde3571f 2512 }
32bfd35d
JB		 2513 if (priv->vif == conf->vif) {
2514 priv->vif = NULL;
b481de9c 2515 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY		 2516 }
2517 mutex_unlock(&priv->mutex);
2518
e1623446 2519 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2520
2521}
471b3efd 2522
3109ece1 2523#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2524static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB		 2525 struct ieee80211_vif *vif,
2526 struct ieee80211_bss_conf *bss_conf,
2527 u32 changes)
220173b0 2528{
c79dd5b5 2529 struct iwl_priv *priv = hw->priv;
220173b0 2530
e1623446 2531 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
3109ece1 2532
471b3efd 2533 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 2534 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
3109ece1 2535 bss_conf->use_short_preamble);
471b3efd 2536 if (bss_conf->use_short_preamble)
220173b0
TW		 2537 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2538 else
2539 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2540 }
2541
471b3efd 2542 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446 2543 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2544 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 2545 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2546 else
2547 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2548 }
2549
98952d5d 2550 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2551 iwl_ht_conf(priv, bss_conf);
c7de35cd 2552 iwl_set_rxon_chain(priv);
98952d5d
TW		 2553 }
2554
471b3efd 2555 if (changes & BSS_CHANGED_ASSOC) {
e1623446 2556 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 2557 /* This should never happen as this function should
2558 * never be called from interrupt context. */
2559 if (WARN_ON_ONCE(in_interrupt()))
2560 return;
3109ece1
TW		 2561 if (bss_conf->assoc) {
2562 priv->assoc_id = bss_conf->aid;
2563 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2564 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW		 2565 priv->timestamp = bss_conf->timestamp;
2566 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW		 2567
2568 /* we have just associated, don't start scan too early
2569 * leave time for EAPOL exchange to complete
2570 */
3109ece1
TW		 2571 priv->next_scan_jiffies = jiffies +
2572 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2573 mutex_lock(&priv->mutex);
5b9f8cd3 2574 iwl_post_associate(priv);
508e32e1 2575 mutex_unlock(&priv->mutex);
3109ece1
TW		 2576 } else {
2577 priv->assoc_id = 0;
e1623446 2578 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
3109ece1
TW		 2579 }
2580 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446 2581 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
7e8c519e 2582 iwl_send_rxon_assoc(priv);
471b3efd
JB		 2583 }
2584
220173b0 2585}
b481de9c 2586
5b9f8cd3 2587static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG		 2588 struct ieee80211_key_conf *keyconf, const u8 *addr,
2589 u32 iv32, u16 *phase1key)
2590{
ab885f8c 2591
9f58671e 2592 struct iwl_priv *priv = hw->priv;
e1623446 2593 IWL_DEBUG_MAC80211(priv, "enter\n");
ab885f8c 2594
9f58671e 2595 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c 2596
e1623446 2597 IWL_DEBUG_MAC80211(priv, "leave\n");
ab885f8c
EG		 2598}
2599
5b9f8cd3 2600static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB		 2601 struct ieee80211_vif *vif,
2602 struct ieee80211_sta *sta,
b481de9c
ZY		 2603 struct ieee80211_key_conf *key)
2604{
c79dd5b5 2605 struct iwl_priv *priv = hw->priv;
42986796
WT		 2606 const u8 *addr;
2607 int ret;
2608 u8 sta_id;
2609 bool is_default_wep_key = false;
b481de9c 2610
e1623446 2611 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2612
099b40b7 2613 if (priv->hw_params.sw_crypto) {
e1623446 2614 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY		 2615 return -EOPNOTSUPP;
2616 }
42986796 2617 addr = sta ? sta->addr : iwl_bcast_addr;
947b13a7 2618 sta_id = iwl_find_station(priv, addr);
6974e363 2619 if (sta_id == IWL_INVALID_STATION) {
e1623446 2620 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
e174961c 2621 addr);
6974e363 2622 return -EINVAL;
b481de9c 2623
deb09c43 2624 }
b481de9c 2625
6974e363 2626 mutex_lock(&priv->mutex);
2a421b91 2627 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG		 2628 mutex_unlock(&priv->mutex);
2629
2630 /* If we are getting WEP group key and we didn't receive any key mapping
2631 * so far, we are in legacy wep mode (group key only), otherwise we are
2632 * in 1X mode.
2633 * In legacy wep mode, we use another host command to the uCode */
5425e490 2634 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 2635 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG		 2636 if (cmd == SET_KEY)
2637 is_default_wep_key = !priv->key_mapping_key;
2638 else
ccc038ab
EG		 2639 is_default_wep_key =
2640 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 2641 }
052c4b9f 2642
b481de9c 2643 switch (cmd) {
deb09c43 2644 case SET_KEY:
6974e363
EG		 2645 if (is_default_wep_key)
2646 ret = iwl_set_default_wep_key(priv, key);
deb09c43 2647 else
7480513f 2648 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43 2649
e1623446 2650 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY		 2651 break;
2652 case DISABLE_KEY:
6974e363
EG		 2653 if (is_default_wep_key)
2654 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 2655 else
3ec47732 2656 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43 2657
e1623446 2658 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY		 2659 break;
2660 default:
deb09c43 2661 ret = -EINVAL;
b481de9c
ZY		 2662 }
2663
e1623446 2664 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 2665
deb09c43 2666 return ret;
b481de9c
ZY		 2667}
2668
5b9f8cd3 2669static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY		 2670 const struct ieee80211_tx_queue_params *params)
2671{
c79dd5b5 2672 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2673 unsigned long flags;
2674 int q;
b481de9c 2675
e1623446 2676 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2677
fee1247a 2678 if (!iwl_is_ready_rf(priv)) {
e1623446 2679 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY		 2680 return -EIO;
2681 }
2682
2683 if (queue >= AC_NUM) {
e1623446 2684 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY		 2685 return 0;
2686 }
2687
b481de9c
ZY		 2688 q = AC_NUM - 1 - queue;
2689
2690 spin_lock_irqsave(&priv->lock, flags);
2691
2692 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2693 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2694 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2695 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 2696 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 2697
2698 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2699 priv->qos_data.qos_active = 1;
2700
05c914fe 2701 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 2702 iwl_activate_qos(priv, 1);
3109ece1 2703 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 2704 iwl_activate_qos(priv, 0);
b481de9c 2705
1ff50bda 2706 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 2707
e1623446 2708 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2709 return 0;
2710}
2711
5b9f8cd3 2712static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 2713 enum ieee80211_ampdu_mlme_action action,
17741cdc 2714 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW		 2715{
2716 struct iwl_priv *priv = hw->priv;
d783b061 2717
e1623446 2718 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
e174961c 2719 sta->addr, tid);
d783b061
TW		 2720
2721 if (!(priv->cfg->sku & IWL_SKU_N))
2722 return -EACCES;
2723
2724 switch (action) {
2725 case IEEE80211_AMPDU_RX_START:
e1623446 2726 IWL_DEBUG_HT(priv, "start Rx\n");
9f58671e 2727 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061 2728 case IEEE80211_AMPDU_RX_STOP:
e1623446 2729 IWL_DEBUG_HT(priv, "stop Rx\n");
9f58671e 2730 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061 2731 case IEEE80211_AMPDU_TX_START:
e1623446 2732 IWL_DEBUG_HT(priv, "start Tx\n");
17741cdc 2733 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061 2734 case IEEE80211_AMPDU_TX_STOP:
e1623446 2735 IWL_DEBUG_HT(priv, "stop Tx\n");
17741cdc 2736 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061 2737 default:
e1623446 2738 IWL_DEBUG_HT(priv, "unknown\n");
d783b061
TW		 2739 return -EINVAL;
2740 break;
2741 }
2742 return 0;
2743}
9f58671e 2744
5b9f8cd3 2745static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 2746 struct ieee80211_tx_queue_stats *stats)
2747{
c79dd5b5 2748 struct iwl_priv *priv = hw->priv;
b481de9c 2749 int i, avail;
16466903 2750 struct iwl_tx_queue *txq;
443cfd45 2751 struct iwl_queue *q;
b481de9c
ZY		 2752 unsigned long flags;
2753
e1623446 2754 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2755
fee1247a 2756 if (!iwl_is_ready_rf(priv)) {
e1623446 2757 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY		 2758 return -EIO;
2759 }
2760
2761 spin_lock_irqsave(&priv->lock, flags);
2762
2763 for (i = 0; i < AC_NUM; i++) {
2764 txq = &priv->txq[i];
2765 q = &txq->q;
443cfd45 2766 avail = iwl_queue_space(q);
b481de9c 2767
57ffc589
JB		 2768 stats[i].len = q->n_window - avail;
2769 stats[i].limit = q->n_window - q->high_mark;
2770 stats[i].count = q->n_window;
b481de9c
ZY		 2771
2772 }
2773 spin_unlock_irqrestore(&priv->lock, flags);
2774
e1623446 2775 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2776
2777 return 0;
2778}
2779
5b9f8cd3 2780static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 2781 struct ieee80211_low_level_stats *stats)
2782{
bf403db8
EK		 2783 struct iwl_priv *priv = hw->priv;
2784
2785 priv = hw->priv;
e1623446
TW		 2786 IWL_DEBUG_MAC80211(priv, "enter\n");
2787 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2788
2789 return 0;
2790}
2791
5b9f8cd3 2792static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 2793{
c79dd5b5 2794 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2795 unsigned long flags;
2796
2797 mutex_lock(&priv->mutex);
e1623446 2798 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2799
b481de9c 2800 spin_lock_irqsave(&priv->lock, flags);
fd105e79 2801 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 2802 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 2803
c7de35cd 2804 iwl_reset_qos(priv);
b481de9c 2805
b481de9c
ZY		 2806 spin_lock_irqsave(&priv->lock, flags);
2807 priv->assoc_id = 0;
2808 priv->assoc_capability = 0;
b481de9c
ZY		 2809 priv->assoc_station_added = 0;
2810
2811 /* new association get rid of ibss beacon skb */
2812 if (priv->ibss_beacon)
2813 dev_kfree_skb(priv->ibss_beacon);
2814
2815 priv->ibss_beacon = NULL;
2816
2817 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 2818 priv->timestamp = 0;
05c914fe 2819 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY		 2820 priv->beacon_int = 0;
2821
2822 spin_unlock_irqrestore(&priv->lock, flags);
2823
fee1247a 2824 if (!iwl_is_ready_rf(priv)) {
e1623446 2825 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA		 2826 mutex_unlock(&priv->mutex);
2827 return;
2828 }
2829
052c4b9f 2830 /* we are restarting association process
2831 * clear RXON_FILTER_ASSOC_MSK bit
2832 */
05c914fe 2833 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 2834 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 2835 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2836 iwl_commit_rxon(priv);
052c4b9f 2837 }
2838
5da4b55f
MA		 2839 iwl_power_update_mode(priv, 0);
2840
b481de9c 2841 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 2842 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 2843
c90a74ba
EG		 2844 /* switch to CAM during association period.
2845 * the ucode will block any association/authentication
2846 * frome during assiciation period if it can not hear
2847 * the AP because of PM. the timer enable PM back is
2848 * association do not complete
2849 */
2850 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
2851 IEEE80211_CHAN_RADAR))
2852 iwl_power_disable_management(priv, 3000);
2853
e1623446 2854 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY		 2855 mutex_unlock(&priv->mutex);
2856 return;
2857 }
2858
5b9f8cd3 2859 iwl_set_rate(priv);
b481de9c
ZY		 2860
2861 mutex_unlock(&priv->mutex);
2862
e1623446 2863 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2864}
2865
5b9f8cd3 2866static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2867{
c79dd5b5 2868 struct iwl_priv *priv = hw->priv;
b481de9c 2869 unsigned long flags;
2ff75b78 2870 __le64 timestamp;
b481de9c 2871
e1623446 2872 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2873
fee1247a 2874 if (!iwl_is_ready_rf(priv)) {
e1623446 2875 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY		 2876 return -EIO;
2877 }
2878
05c914fe 2879 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 2880 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY		 2881 return -EIO;
2882 }
2883
2884 spin_lock_irqsave(&priv->lock, flags);
2885
2886 if (priv->ibss_beacon)
2887 dev_kfree_skb(priv->ibss_beacon);
2888
2889 priv->ibss_beacon = skb;
2890
2891 priv->assoc_id = 0;
2ff75b78 2892 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 2893 priv->timestamp = le64_to_cpu(timestamp);
b481de9c 2894
e1623446 2895 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2896 spin_unlock_irqrestore(&priv->lock, flags);
2897
c7de35cd 2898 iwl_reset_qos(priv);
b481de9c 2899
5b9f8cd3 2900 iwl_post_associate(priv);
b481de9c 2901
b481de9c
ZY		 2902
2903 return 0;
2904}
2905
b481de9c
ZY		 2906/*****************************************************************************
2907 *
2908 * sysfs attributes
2909 *
2910 *****************************************************************************/
2911
0a6857e7 2912#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2913
2914/*
2915 * The following adds a new attribute to the sysfs representation
c3a739fa 2916 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
b481de9c
ZY		 2917 * used for controlling the debug level.
2918 *
2919 * See the level definitions in iwl for details.
2920 */
2921
8cf769c6
EK		 2922static ssize_t show_debug_level(struct device *d,
2923 struct device_attribute *attr, char *buf)
b481de9c 2924{
8cf769c6
EK		 2925 struct iwl_priv *priv = d->driver_data;
2926
2927 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 2928}
8cf769c6
EK		 2929static ssize_t store_debug_level(struct device *d,
2930 struct device_attribute *attr,
b481de9c
ZY		 2931 const char *buf, size_t count)
2932{
8cf769c6 2933 struct iwl_priv *priv = d->driver_data;
9257746f
TW		 2934 unsigned long val;
2935 int ret;
b481de9c 2936
9257746f
TW		 2937 ret = strict_strtoul(buf, 0, &val);
2938 if (ret)
978785a3 2939 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 2940 else
8cf769c6 2941 priv->debug_level = val;
b481de9c
ZY		 2942
2943 return strnlen(buf, count);
2944}
2945
8cf769c6
EK		 2946static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2947 show_debug_level, store_debug_level);
2948
b481de9c 2949
0a6857e7 2950#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 2951
b481de9c 2952
bc6f59bc
TW		 2953static ssize_t show_version(struct device *d,
2954 struct device_attribute *attr, char *buf)
2955{
2956 struct iwl_priv *priv = d->driver_data;
885ba202 2957 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW		 2958 ssize_t pos = 0;
2959 u16 eeprom_ver;
bc6f59bc
TW		 2960
2961 if (palive->is_valid)
f236a265
TW		 2962 pos += sprintf(buf + pos,
2963 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2964 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW		 2965 palive->ucode_major, palive->ucode_minor,
2966 palive->sw_rev[0], palive->sw_rev[1],
2967 palive->ver_type, palive->ver_subtype);
bc6f59bc 2968 else
f236a265
TW		 2969 pos += sprintf(buf + pos, "fw not loaded\n");
2970
2971 if (priv->eeprom) {
2972 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2973 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
2974 eeprom_ver);
2975 } else {
2976 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2977 }
2978
2979 return pos;
bc6f59bc
TW		 2980}
2981
2982static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2983
b481de9c
ZY		 2984static ssize_t show_temperature(struct device *d,
2985 struct device_attribute *attr, char *buf)
2986{
c79dd5b5 2987 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 2988
fee1247a 2989 if (!iwl_is_alive(priv))
b481de9c
ZY		 2990 return -EAGAIN;
2991
91dbc5bd 2992 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY		 2993}
2994
2995static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2996
b481de9c
ZY		 2997static ssize_t show_tx_power(struct device *d,
2998 struct device_attribute *attr, char *buf)
2999{
c79dd5b5 3000 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
91f39e8e
JS		 3001
3002 if (!iwl_is_ready_rf(priv))
3003 return sprintf(buf, "off\n");
3004 else
3005 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY		 3006}
3007
3008static ssize_t store_tx_power(struct device *d,
3009 struct device_attribute *attr,
3010 const char *buf, size_t count)
3011{
c79dd5b5 3012 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3013 unsigned long val;
3014 int ret;
b481de9c 3015
9257746f
TW		 3016 ret = strict_strtoul(buf, 10, &val);
3017 if (ret)
978785a3 3018 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
b481de9c 3019 else
630fe9b6 3020 iwl_set_tx_power(priv, val, false);
b481de9c
ZY		 3021
3022 return count;
3023}
3024
3025static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3026
3027static ssize_t show_flags(struct device *d,
3028 struct device_attribute *attr, char *buf)
3029{
c79dd5b5 3030 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3031
3032 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3033}
3034
3035static ssize_t store_flags(struct device *d,
3036 struct device_attribute *attr,
3037 const char *buf, size_t count)
3038{
c79dd5b5 3039 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3040 unsigned long val;
3041 u32 flags;
3042 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3043 if (ret)
9257746f
TW		 3044 return ret;
3045 flags = (u32)val;
b481de9c
ZY		 3046
3047 mutex_lock(&priv->mutex);
3048 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3049 /* Cancel any currently running scans... */
2a421b91 3050 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3051 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3052 else {
e1623446 3053 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3054 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3055 iwl_commit_rxon(priv);
b481de9c
ZY		 3056 }
3057 }
3058 mutex_unlock(&priv->mutex);
3059
3060 return count;
3061}
3062
3063static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3064
3065static ssize_t show_filter_flags(struct device *d,
3066 struct device_attribute *attr, char *buf)
3067{
c79dd5b5 3068 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3069
3070 return sprintf(buf, "0x%04X\n",
3071 le32_to_cpu(priv->active_rxon.filter_flags));
3072}
3073
3074static ssize_t store_filter_flags(struct device *d,
3075 struct device_attribute *attr,
3076 const char *buf, size_t count)
3077{
c79dd5b5 3078 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3079 unsigned long val;
3080 u32 filter_flags;
3081 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3082 if (ret)
9257746f
TW		 3083 return ret;
3084 filter_flags = (u32)val;
b481de9c
ZY		 3085
3086 mutex_lock(&priv->mutex);
3087 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3088 /* Cancel any currently running scans... */
2a421b91 3089 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3090 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3091 else {
e1623446 3092 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c
ZY		 3093 "0x%04X\n", filter_flags);
3094 priv->staging_rxon.filter_flags =
3095 cpu_to_le32(filter_flags);
5b9f8cd3 3096 iwl_commit_rxon(priv);
b481de9c
ZY		 3097 }
3098 }
3099 mutex_unlock(&priv->mutex);
3100
3101 return count;
3102}
3103
3104static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3105 store_filter_flags);
3106
b481de9c
ZY		 3107static ssize_t store_power_level(struct device *d,
3108 struct device_attribute *attr,
3109 const char *buf, size_t count)
3110{
c79dd5b5 3111 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3112 int ret;
9257746f
TW		 3113 unsigned long mode;
3114
b481de9c 3115
b481de9c
ZY		 3116 mutex_lock(&priv->mutex);
3117
fee1247a 3118 if (!iwl_is_ready(priv)) {
298df1f6 3119 ret = -EAGAIN;
b481de9c
ZY		 3120 goto out;
3121 }
3122
9257746f 3123 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3124 if (ret)
9257746f
TW		 3125 goto out;
3126
298df1f6
EK		 3127 ret = iwl_power_set_user_mode(priv, mode);
3128 if (ret) {
e1623446 3129 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
5da4b55f 3130 goto out;
b481de9c 3131 }
298df1f6 3132 ret = count;
b481de9c
ZY		 3133
3134 out:
3135 mutex_unlock(&priv->mutex);
298df1f6 3136 return ret;
b481de9c
ZY		 3137}
3138
b481de9c
ZY		 3139static ssize_t show_power_level(struct device *d,
3140 struct device_attribute *attr, char *buf)
3141{
c79dd5b5 3142 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK		 3143 int mode = priv->power_data.user_power_setting;
3144 int system = priv->power_data.system_power_setting;
5da4b55f 3145 int level = priv->power_data.power_mode;
b481de9c
ZY		 3146 char *p = buf;
3147
298df1f6
EK		 3148 switch (system) {
3149 case IWL_POWER_SYS_AUTO:
3150 p += sprintf(p, "SYSTEM:auto");
b481de9c 3151 break;
298df1f6
EK		 3152 case IWL_POWER_SYS_AC:
3153 p += sprintf(p, "SYSTEM:ac");
3154 break;
3155 case IWL_POWER_SYS_BATTERY:
3156 p += sprintf(p, "SYSTEM:battery");
b481de9c 3157 break;
b481de9c 3158 }
298df1f6 3159
c3056065
AK		 3160 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3161 "fixed" : "auto");
298df1f6
EK		 3162 p += sprintf(p, "\tINDEX:%d", level);
3163 p += sprintf(p, "\n");
3ac7f146 3164 return p - buf + 1;
b481de9c
ZY		 3165}
3166
3167static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3168 store_power_level);
3169
b481de9c
ZY		 3170
3171static ssize_t show_statistics(struct device *d,
3172 struct device_attribute *attr, char *buf)
3173{
c79dd5b5 3174 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3175 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3176 u32 len = 0, ofs = 0;
3ac7f146 3177 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY		 3178 int rc = 0;
3179
fee1247a 3180 if (!iwl_is_alive(priv))
b481de9c
ZY		 3181 return -EAGAIN;
3182
3183 mutex_lock(&priv->mutex);
49ea8596 3184 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 3185 mutex_unlock(&priv->mutex);
3186
3187 if (rc) {
3188 len = sprintf(buf,
3189 "Error sending statistics request: 0x%08X\n", rc);
3190 return len;
3191 }
3192
3193 while (size && (PAGE_SIZE - len)) {
3194 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3195 PAGE_SIZE - len, 1);
3196 len = strlen(buf);
3197 if (PAGE_SIZE - len)
3198 buf[len++] = '\n';
3199
3200 ofs += 16;
3201 size -= min(size, 16U);
3202 }
3203
3204 return len;
3205}
3206
3207static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3208
b481de9c 3209
b481de9c
ZY		 3210/*****************************************************************************
3211 *
3212 * driver setup and teardown
3213 *
3214 *****************************************************************************/
3215
4e39317d 3216static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c 3217{
d21050c7 3218 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY		 3219
3220 init_waitqueue_head(&priv->wait_command_queue);
3221
5b9f8cd3
EG		 3222 INIT_WORK(&priv->up, iwl_bg_up);
3223 INIT_WORK(&priv->restart, iwl_bg_restart);
3224 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3225 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3226 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3227 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW		 3228 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3229 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3230
2a421b91 3231 iwl_setup_scan_deferred_work(priv);
c90a74ba 3232 iwl_setup_power_deferred_work(priv);
bb8c093b 3233
4e39317d
EG		 3234 if (priv->cfg->ops->lib->setup_deferred_work)
3235 priv->cfg->ops->lib->setup_deferred_work(priv);
3236
3237 init_timer(&priv->statistics_periodic);
3238 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3239 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY		 3240
3241 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3242 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 3243}
3244
4e39317d 3245static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3246{
4e39317d
EG		 3247 if (priv->cfg->ops->lib->cancel_deferred_work)
3248 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3249
3ae6a054 3250 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3251 cancel_delayed_work(&priv->scan_check);
c90a74ba 3252 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3253 cancel_delayed_work(&priv->alive_start);
b481de9c 3254 cancel_work_sync(&priv->beacon_update);
4e39317d 3255 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY		 3256}
3257
5b9f8cd3 3258static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY		 3259 &dev_attr_flags.attr,
3260 &dev_attr_filter_flags.attr,
b481de9c 3261 &dev_attr_power_level.attr,
b481de9c 3262 &dev_attr_statistics.attr,
b481de9c 3263 &dev_attr_temperature.attr,
b481de9c 3264 &dev_attr_tx_power.attr,
8cf769c6
EK		 3265#ifdef CONFIG_IWLWIFI_DEBUG
3266 &dev_attr_debug_level.attr,
3267#endif
bc6f59bc 3268 &dev_attr_version.attr,
b481de9c
ZY		 3269
3270 NULL
3271};
3272
5b9f8cd3 3273static struct attribute_group iwl_attribute_group = {
b481de9c 3274 .name = NULL, /* put in device directory */
5b9f8cd3 3275 .attrs = iwl_sysfs_entries,
b481de9c
ZY		 3276};
3277
5b9f8cd3
EG		 3278static struct ieee80211_ops iwl_hw_ops = {
3279 .tx = iwl_mac_tx,
3280 .start = iwl_mac_start,
3281 .stop = iwl_mac_stop,
3282 .add_interface = iwl_mac_add_interface,
3283 .remove_interface = iwl_mac_remove_interface,
3284 .config = iwl_mac_config,
3285 .config_interface = iwl_mac_config_interface,
3286 .configure_filter = iwl_configure_filter,
3287 .set_key = iwl_mac_set_key,
3288 .update_tkip_key = iwl_mac_update_tkip_key,
3289 .get_stats = iwl_mac_get_stats,
3290 .get_tx_stats = iwl_mac_get_tx_stats,
3291 .conf_tx = iwl_mac_conf_tx,
3292 .reset_tsf = iwl_mac_reset_tsf,
3293 .bss_info_changed = iwl_bss_info_changed,
3294 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3295 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY		 3296};
3297
5b9f8cd3 3298static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 3299{
3300 int err = 0;
c79dd5b5 3301 struct iwl_priv *priv;
b481de9c 3302 struct ieee80211_hw *hw;
82b9a121 3303 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3304 unsigned long flags;
6cd0b1cb 3305 u16 pci_cmd;
b481de9c 3306
316c30d9
AK		 3307 /************************
3308 * 1. Allocating HW data
3309 ************************/
3310
6440adb5
CB		 3311 /* Disabling hardware scan means that mac80211 will perform scans
3312 * "the hard way", rather than using device's scan. */
1ea87396 3313 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK		 3314 if (cfg->mod_params->debug & IWL_DL_INFO)
3315 dev_printk(KERN_DEBUG, &(pdev->dev),
3316 "Disabling hw_scan\n");
5b9f8cd3 3317 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY		 3318 }
3319
5b9f8cd3 3320 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3321 if (!hw) {
b481de9c
ZY		 3322 err = -ENOMEM;
3323 goto out;
3324 }
1d0a082d
AK		 3325 priv = hw->priv;
3326 /* At this point both hw and priv are allocated. */
3327
b481de9c
ZY		 3328 SET_IEEE80211_DEV(hw, &pdev->dev);
3329
e1623446 3330 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
82b9a121 3331 priv->cfg = cfg;
b481de9c 3332 priv->pci_dev = pdev;
316c30d9 3333
0a6857e7 3334#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3335 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 3336 atomic_set(&priv->restrict_refcnt, 0);
3337#endif
b481de9c 3338
316c30d9
AK		 3339 /**************************
3340 * 2. Initializing PCI bus
3341 **************************/
3342 if (pci_enable_device(pdev)) {
3343 err = -ENODEV;
3344 goto out_ieee80211_free_hw;
3345 }
3346
3347 pci_set_master(pdev);
3348
093d874c 3349 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3350 if (!err)
093d874c 3351 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3352 if (err) {
093d874c 3353 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3354 if (!err)
093d874c 3355 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3356 /* both attempts failed: */
316c30d9 3357 if (err) {
978785a3 3358 IWL_WARN(priv, "No suitable DMA available.\n");
316c30d9 3359 goto out_pci_disable_device;
cc2a8ea8 3360 }
316c30d9
AK		 3361 }
3362
3363 err = pci_request_regions(pdev, DRV_NAME);
3364 if (err)
3365 goto out_pci_disable_device;
3366
3367 pci_set_drvdata(pdev, priv);
3368
316c30d9
AK		 3369
3370 /***********************
3371 * 3. Read REV register
3372 ***********************/
3373 priv->hw_base = pci_iomap(pdev, 0, 0);
3374 if (!priv->hw_base) {
3375 err = -ENODEV;
3376 goto out_pci_release_regions;
3377 }
3378
e1623446 3379 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
316c30d9 3380 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 3381 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
316c30d9 3382
b661c819 3383 iwl_hw_detect(priv);
978785a3 3384 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
b661c819 3385 priv->cfg->name, priv->hw_rev);
316c30d9 3386
e7b63581
TW		 3387 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3388 * PCI Tx retries from interfering with C3 CPU state */
3389 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3390
91238714
TW		 3391 /* amp init */
3392 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3393 if (err < 0) {
e1623446 3394 IWL_DEBUG_INFO(priv, "Failed to init APMG\n");
316c30d9
AK		 3395 goto out_iounmap;
3396 }
91238714
TW		 3397 /*****************
3398 * 4. Read EEPROM
3399 *****************/
316c30d9
AK		 3400 /* Read the EEPROM */
3401 err = iwl_eeprom_init(priv);
3402 if (err) {
15b1687c 3403 IWL_ERR(priv, "Unable to init EEPROM\n");
316c30d9
AK		 3404 goto out_iounmap;
3405 }
8614f360
TW		 3406 err = iwl_eeprom_check_version(priv);
3407 if (err)
3408 goto out_iounmap;
3409
02883017 3410 /* extract MAC Address */
316c30d9 3411 iwl_eeprom_get_mac(priv, priv->mac_addr);
e1623446 3412 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
316c30d9
AK		 3413 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3414
3415 /************************
3416 * 5. Setup HW constants
3417 ************************/
da154e30 3418 if (iwl_set_hw_params(priv)) {
15b1687c 3419 IWL_ERR(priv, "failed to set hw parameters\n");
073d3f5f 3420 goto out_free_eeprom;
316c30d9
AK		 3421 }
3422
3423 /*******************
6ba87956 3424 * 6. Setup priv
316c30d9 3425 *******************/
b481de9c 3426
6ba87956 3427 err = iwl_init_drv(priv);
bf85ea4f 3428 if (err)
399f4900 3429 goto out_free_eeprom;
bf85ea4f 3430 /* At this point both hw and priv are initialized. */
316c30d9
AK		 3431
3432 /**********************************
3433 * 7. Initialize module parameters
3434 **********************************/
3435
3436 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3437 if (priv->cfg->mod_params->disable) {
316c30d9 3438 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 3439 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
316c30d9
AK		 3440 }
3441
316c30d9
AK		 3442 /********************
3443 * 8. Setup services
3444 ********************/
0359facc 3445 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3446 iwl_disable_interrupts(priv);
0359facc 3447 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3448
6cd0b1cb
HS		 3449 pci_enable_msi(priv->pci_dev);
3450
3451 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
3452 DRV_NAME, priv);
3453 if (err) {
3454 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3455 goto out_disable_msi;
3456 }
5b9f8cd3 3457 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9 3458 if (err) {
15b1687c 3459 IWL_ERR(priv, "failed to create sysfs device attributes\n");
795cc0ad 3460 goto out_free_irq;
316c30d9
AK		 3461 }
3462
4e39317d 3463 iwl_setup_deferred_work(priv);
653fa4a0 3464 iwl_setup_rx_handlers(priv);
316c30d9 3465
6ba87956 3466 /**********************************
6cd0b1cb 3467 * 9. Setup and register mac80211
6ba87956
TW		 3468 **********************************/
3469
6cd0b1cb
HS		 3470 /* enable interrupts if needed: hw bug w/a */
3471 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3472 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3473 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3474 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3475 }
3476
3477 iwl_enable_interrupts(priv);
3478
6ba87956
TW		 3479 err = iwl_setup_mac(priv);
3480 if (err)
3481 goto out_remove_sysfs;
3482
3483 err = iwl_dbgfs_register(priv, DRV_NAME);
3484 if (err)
15b1687c 3485 IWL_ERR(priv, "failed to create debugfs files\n");
6ba87956 3486
6cd0b1cb
HS		 3487 /* If platform's RF_KILL switch is NOT set to KILL */
3488 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3489 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3490 else
3491 set_bit(STATUS_RF_KILL_HW, &priv->status);
6ba87956 3492
58d0f361
EG		 3493 err = iwl_rfkill_init(priv);
3494 if (err)
15b1687c 3495 IWL_ERR(priv, "Unable to initialize RFKILL system. "
58d0f361 3496 "Ignoring error: %d\n", err);
6cd0b1cb
HS		 3497 else
3498 iwl_rfkill_set_hw_state(priv);
3499
58d0f361 3500 iwl_power_initialize(priv);
b481de9c
ZY		 3501 return 0;
3502
316c30d9 3503 out_remove_sysfs:
5b9f8cd3 3504 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
795cc0ad
HS		 3505 out_free_irq:
3506 free_irq(priv->pci_dev->irq, priv);
6cd0b1cb
HS		 3507 out_disable_msi:
3508 pci_disable_msi(priv->pci_dev);
6ba87956 3509 iwl_uninit_drv(priv);
073d3f5f
TW		 3510 out_free_eeprom:
3511 iwl_eeprom_free(priv);
b481de9c
ZY		 3512 out_iounmap:
3513 pci_iounmap(pdev, priv->hw_base);
3514 out_pci_release_regions:
3515 pci_release_regions(pdev);
316c30d9 3516 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 3517 out_pci_disable_device:
3518 pci_disable_device(pdev);
b481de9c
ZY		 3519 out_ieee80211_free_hw:
3520 ieee80211_free_hw(priv->hw);
3521 out:
3522 return err;
3523}
3524
5b9f8cd3 3525static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3526{
c79dd5b5 3527 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3528 unsigned long flags;
b481de9c
ZY		 3529
3530 if (!priv)
3531 return;
3532
e1623446 3533 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 3534
67249625 3535 iwl_dbgfs_unregister(priv);
5b9f8cd3 3536 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3537
5b9f8cd3
EG		 3538 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3539 * to be called and iwl_down since we are removing the device
0b124c31
GG		 3540 * we need to set STATUS_EXIT_PENDING bit.
3541 */
3542 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR		 3543 if (priv->mac80211_registered) {
3544 ieee80211_unregister_hw(priv->hw);
3545 priv->mac80211_registered = 0;
0b124c31 3546 } else {
5b9f8cd3 3547 iwl_down(priv);
c4f55232
RR		 3548 }
3549
0359facc
MA		 3550 /* make sure we flush any pending irq or
3551 * tasklet for the driver
3552 */
3553 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3554 iwl_disable_interrupts(priv);
0359facc
MA		 3555 spin_unlock_irqrestore(&priv->lock, flags);
3556
3557 iwl_synchronize_irq(priv);
3558
58d0f361 3559 iwl_rfkill_unregister(priv);
5b9f8cd3 3560 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 3561
3562 if (priv->rxq.bd)
a55360e4 3563 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 3564 iwl_hw_txq_ctx_free(priv);
b481de9c 3565
37deb2a0 3566 iwl_clear_stations_table(priv);
073d3f5f 3567 iwl_eeprom_free(priv);
b481de9c 3568
b481de9c 3569
948c171c
MA		 3570 /*netif_stop_queue(dev); */
3571 flush_workqueue(priv->workqueue);
3572
5b9f8cd3 3573 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY		 3574 * priv->workqueue... so we can't take down the workqueue
3575 * until now... */
3576 destroy_workqueue(priv->workqueue);
3577 priv->workqueue = NULL;
3578
6cd0b1cb
HS		 3579 free_irq(priv->pci_dev->irq, priv);
3580 pci_disable_msi(priv->pci_dev);
b481de9c
ZY		 3581 pci_iounmap(pdev, priv->hw_base);
3582 pci_release_regions(pdev);
3583 pci_disable_device(pdev);
3584 pci_set_drvdata(pdev, NULL);
3585
6ba87956 3586 iwl_uninit_drv(priv);
b481de9c
ZY		 3587
3588 if (priv->ibss_beacon)
3589 dev_kfree_skb(priv->ibss_beacon);
3590
3591 ieee80211_free_hw(priv->hw);
3592}
3593
3594#ifdef CONFIG_PM
3595
5b9f8cd3 3596static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 3597{
c79dd5b5 3598 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 3599
e655b9f0
ZY		 3600 if (priv->is_open) {
3601 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 3602 iwl_mac_stop(priv->hw);
e655b9f0
ZY		 3603 priv->is_open = 1;
3604 }
b481de9c 3605
6cd0b1cb
HS		 3606 pci_save_state(pdev);
3607 pci_disable_device(pdev);
b481de9c
ZY		 3608 pci_set_power_state(pdev, PCI_D3hot);
3609
b481de9c
ZY		 3610 return 0;
3611}
3612
5b9f8cd3 3613static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 3614{
c79dd5b5 3615 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 3616 int ret;
b481de9c 3617
b481de9c 3618 pci_set_power_state(pdev, PCI_D0);
450154e4
WT		 3619 ret = pci_enable_device(pdev);
3620 if (ret)
3621 return ret;
6cd0b1cb
HS		 3622 pci_restore_state(pdev);
3623 iwl_enable_interrupts(priv);
b481de9c 3624
e655b9f0 3625 if (priv->is_open)
5b9f8cd3 3626 iwl_mac_start(priv->hw);
b481de9c 3627
e655b9f0 3628 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 3629 return 0;
3630}
3631
3632#endif /* CONFIG_PM */
3633
3634/*****************************************************************************
3635 *
3636 * driver and module entry point
3637 *
3638 *****************************************************************************/
3639
fed9017e
RR		 3640/* Hardware specific file defines the PCI IDs table for that hardware module */
3641static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 3642#ifdef CONFIG_IWL4965
fed9017e
RR		 3643 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3644 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 3645#endif /* CONFIG_IWL4965 */
5a6a256e 3646#ifdef CONFIG_IWL5000
47408639
EK		 3647 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3648 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3649 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3650 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3651 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3652 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 3653 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK		 3654 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3655 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3656 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW		 3657/* 5350 WiFi/WiMax */
3658 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3659 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3660 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW		 3661/* 5150 Wifi/WiMax */
3662 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3663 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
e1228374
JS		 3664/* 6000/6050 Series */
3665 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3666 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3667 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3668 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3669 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3670 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3671 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3672 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3673 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3674 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3675 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
c5d05698
JS		 3676/* 100 Series WiFi */
3677 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl100_bgn_cfg)},
3678 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl100_bgn_cfg)},
5a6a256e 3679#endif /* CONFIG_IWL5000 */
7100e924 3680
fed9017e
RR		 3681 {0}
3682};
3683MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3684
3685static struct pci_driver iwl_driver = {
b481de9c 3686 .name = DRV_NAME,
fed9017e 3687 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG		 3688 .probe = iwl_pci_probe,
3689 .remove = __devexit_p(iwl_pci_remove),
b481de9c 3690#ifdef CONFIG_PM
5b9f8cd3
EG		 3691 .suspend = iwl_pci_suspend,
3692 .resume = iwl_pci_resume,
b481de9c
ZY		 3693#endif
3694};
3695
5b9f8cd3 3696static int __init iwl_init(void)
b481de9c
ZY		 3697{
3698
3699 int ret;
3700 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3701 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 3702
e227ceac 3703 ret = iwlagn_rate_control_register();
897e1cf2 3704 if (ret) {
a3139c59
SO		 3705 printk(KERN_ERR DRV_NAME
3706 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC		 3707 return ret;
3708 }
3709
fed9017e 3710 ret = pci_register_driver(&iwl_driver);
b481de9c 3711 if (ret) {
a3139c59 3712 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 3713 goto error_register;
b481de9c 3714 }
b481de9c
ZY		 3715
3716 return ret;
897e1cf2 3717
897e1cf2 3718error_register:
e227ceac 3719 iwlagn_rate_control_unregister();
897e1cf2 3720 return ret;
b481de9c
ZY		 3721}
3722
5b9f8cd3 3723static void __exit iwl_exit(void)
b481de9c 3724{
fed9017e 3725 pci_unregister_driver(&iwl_driver);
e227ceac 3726 iwlagn_rate_control_unregister();
b481de9c
ZY		 3727}
3728
5b9f8cd3
EG		 3729module_exit(iwl_exit);
3730module_init(iwl_init);
Linux kernel - Deliverables
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