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ath9k: Add open loop control support
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
ZY		 32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
ZY		 40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
b481de9c
ZY		 43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
a3139c59
SO		 47#define DRV_NAME "iwlagn"
48
6bc913bd 49#include "iwl-eeprom.h"
3e0d4cb1 50#include "iwl-dev.h"
fee1247a 51#include "iwl-core.h"
3395f6e9 52#include "iwl-io.h"
b481de9c 53#include "iwl-helpers.h"
6974e363 54#include "iwl-sta.h"
f0832f13 55#include "iwl-calib.h"
b481de9c 56
416e1438 57
b481de9c
ZY		 58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
b481de9c
ZY		 64/*
65 * module name, copyright, version, etc.
b481de9c 66 */
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY		 76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY		 83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97/**
5b9f8cd3 98 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 99 *
01ebd063 100 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
5b9f8cd3 105static int iwl_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 106{
107 /* cast away the const for active_rxon in this function */
c1adf9fb 108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG		 109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 112
fee1247a 113 if (!iwl_is_alive(priv))
43d59b32 114 return -EBUSY;
b481de9c
ZY		 115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG		 118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 121
8ccde88a 122 ret = iwl_check_rxon_cmd(priv);
43d59b32 123 if (ret) {
15b1687c 124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
b481de9c
ZY		 125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
5b9f8cd3 129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 130 * and other flags for the current radio configuration. */
54559703 131 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG		 132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
15b1687c 134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
43d59b32 135 return ret;
b481de9c
ZY		 136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
b481de9c
ZY		 145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
43d59b32 149 if (iwl_is_associated(priv) && new_assoc) {
e1623446 150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
b481de9c
ZY		 151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
43d59b32 153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 154 sizeof(struct iwl_rxon_cmd),
b481de9c
ZY		 155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
43d59b32 159 if (ret) {
b481de9c 160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
43d59b32 162 return ret;
b481de9c 163 }
b481de9c
ZY		 164 }
165
e1623446 166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
b481de9c
ZY		 167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
e174961c 169 "* bssid = %pM\n",
43d59b32 170 (new_assoc ? "" : "out"),
b481de9c 171 le16_to_cpu(priv->staging_rxon.channel),
e174961c 172 priv->staging_rxon.bssid_addr);
b481de9c 173
5b9f8cd3 174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG		 175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32 184 if (ret) {
15b1687c 185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG		 186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 189 }
190
37deb2a0 191 iwl_clear_stations_table(priv);
556f8db7 192
b481de9c
ZY		 193 if (!priv->error_recovering)
194 priv->start_calib = 0;
195
b481de9c 196 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 197 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 198 IWL_INVALID_STATION) {
15b1687c 199 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
b481de9c
ZY		 200 return -EIO;
201 }
202
203 /* If we have set the ASSOC_MSK and we are in BSS mode then
204 * add the IWL_AP_ID to the station rate table */
9185159d 205 if (new_assoc) {
05c914fe 206 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW		 207 ret = iwl_rxon_add_station(priv,
208 priv->active_rxon.bssid_addr, 1);
209 if (ret == IWL_INVALID_STATION) {
15b1687c
WT		 210 IWL_ERR(priv,
211 "Error adding AP address for TX.\n");
9185159d
TW		 212 return -EIO;
213 }
214 priv->assoc_station_added = 1;
215 if (priv->default_wep_key &&
216 iwl_send_static_wepkey_cmd(priv, 0))
15b1687c
WT		 217 IWL_ERR(priv,
218 "Could not send WEP static key.\n");
b481de9c 219 }
43d59b32
EG		 220
221 /* Apply the new configuration
222 * RXON assoc doesn't clear the station table in uCode,
223 */
224 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
225 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
226 if (ret) {
15b1687c 227 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
43d59b32
EG		 228 return ret;
229 }
230 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 231 }
232
36da7d70
ZY		 233 iwl_init_sensitivity(priv);
234
235 /* If we issue a new RXON command which required a tune then we must
236 * send a new TXPOWER command or we won't be able to Tx any frames */
237 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
238 if (ret) {
15b1687c 239 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
36da7d70
ZY		 240 return ret;
241 }
242
b481de9c
ZY		 243 return 0;
244}
245
5b9f8cd3 246void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA		 247{
248
c7de35cd 249 iwl_set_rxon_chain(priv);
5b9f8cd3 250 iwl_commit_rxon(priv);
5da4b55f
MA		 251}
252
fcab423d 253static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 254{
255 struct list_head *element;
256
e1623446 257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
ZY		 258 priv->frames_count);
259
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
262 list_del(element);
fcab423d 263 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
ZY		 264 priv->frames_count--;
265 }
266
267 if (priv->frames_count) {
39aadf8c 268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY		 269 priv->frames_count);
270 priv->frames_count = 0;
271 }
272}
273
fcab423d 274static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 275{
fcab423d 276 struct iwl_frame *frame;
b481de9c
ZY		 277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280 if (!frame) {
15b1687c 281 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY		 282 return NULL;
283 }
284
285 priv->frames_count++;
286 return frame;
287 }
288
289 element = priv->free_frames.next;
290 list_del(element);
fcab423d 291 return list_entry(element, struct iwl_frame, list);
b481de9c
ZY		 292}
293
fcab423d 294static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
ZY		 295{
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
298}
299
4bf64efd
TW		 300static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
73ec1cc2 302 int left)
b481de9c 303{
3109ece1 304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB		 305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY		 307 return 0;
308
309 if (priv->ibss_beacon->len > left)
310 return 0;
311
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314 return priv->ibss_beacon->len;
315}
316
5b9f8cd3 317static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW		 318 struct iwl_frame *frame, u8 rate)
319{
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
322
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW		 330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338 else
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
341
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343 TX_CMD_FLG_TSF_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
345
346 return sizeof(*tx_beacon_cmd) + frame_size;
347}
5b9f8cd3 348static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 349{
fcab423d 350 struct iwl_frame *frame;
b481de9c
ZY		 351 unsigned int frame_size;
352 int rc;
353 u8 rate;
354
fcab423d 355 frame = iwl_get_free_frame(priv);
b481de9c
ZY		 356
357 if (!frame) {
15b1687c 358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY		 359 "command.\n");
360 return -ENOMEM;
361 }
362
5b9f8cd3 363 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 364
5b9f8cd3 365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 366
857485c0 367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 368 &frame->u.cmd[0]);
369
fcab423d 370 iwl_free_frame(priv, frame);
b481de9c
ZY		 371
372 return rc;
373}
374
7aaa1d79
SO		 375static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376{
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
381 addr |=
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384 return addr;
385}
386
387static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388{
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391 return le16_to_cpu(tb->hi_n_len) >> 4;
392}
393
394static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
396{
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
399
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406 tfd->num_tbs = idx + 1;
407}
408
409static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410{
411 return tfd->num_tbs & 0x1f;
412}
413
414/**
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
417 * @txq - tx queue
418 *
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
421 */
422void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423{
59606ffa 424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
7aaa1d79
SO		 425 struct iwl_tfd *tfd;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
428 int i;
429 int num_tbs;
430
431 tfd = &tfd_tmp[index];
432
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
439 return;
440 }
441
442 /* Unmap tx_cmd */
443 if (num_tbs)
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446 pci_unmap_len(&txq->cmd[index]->meta, len),
447 PCI_DMA_TODEVICE);
448
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454 if (txq->txb) {
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457 }
458 }
459}
460
461int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
464 u8 reset, u8 pad)
465{
466 struct iwl_queue *q;
59606ffa 467 struct iwl_tfd *tfd, *tfd_tmp;
7aaa1d79
SO		 468 u32 num_tbs;
469
470 q = &txq->q;
59606ffa
SO		 471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
7aaa1d79
SO		 473
474 if (reset)
475 memset(tfd, 0, sizeof(*tfd));
476
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482 IWL_NUM_OF_TBS);
483 return -EINVAL;
484 }
485
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
490
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493 return 0;
494}
495
a8e74e27
SO		 496/*
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
499 *
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
502 */
503int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
505{
506 int ret;
507 unsigned long flags;
508 int txq_id = txq->q.id;
509
510 spin_lock_irqsave(&priv->lock, flags);
511 ret = iwl_grab_nic_access(priv);
512 if (ret) {
513 spin_unlock_irqrestore(&priv->lock, flags);
514 return ret;
515 }
516
517 /* Circular buffer (TFD queue in DRAM) physical base address */
518 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
519 txq->q.dma_addr >> 8);
520
521 iwl_release_nic_access(priv);
522 spin_unlock_irqrestore(&priv->lock, flags);
523
524 return 0;
525}
526
527
b481de9c
ZY		 528/******************************************************************************
529 *
530 * Misc. internal state and helper functions
531 *
532 ******************************************************************************/
b481de9c 533
5b9f8cd3 534static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG		 535 struct ieee80211_bss_conf *bss_conf)
536{
ae5eb026 537 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 538 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 539 struct ieee80211_sta *sta;
d1141dfb 540
e1623446 541 IWL_DEBUG_MAC80211(priv, "enter: \n");
d1141dfb 542
d1141dfb
EG		 543 if (!iwl_conf->is_ht)
544 return;
545
ae5eb026
JB		 546
547 /*
548 * It is totally wrong to base global information on something
549 * that is valid only when associated, alas, this driver works
550 * that way and I don't know how to fix it.
551 */
552
553 rcu_read_lock();
554 sta = ieee80211_find_sta(priv->hw, priv->bssid);
555 if (!sta) {
556 rcu_read_unlock();
557 return;
558 }
559 ht_conf = &sta->ht_cap;
560
d1141dfb 561 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 562 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 563 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 564 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG		 565
566 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
567 iwl_conf->max_amsdu_size =
568 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
569
570 iwl_conf->supported_chan_width =
d9fe60de 571 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 572
094d05dc
S		 573 /*
574 * XXX: The HT configuration needs to be moved into iwl_mac_config()
575 * to be done there correctly.
576 */
577
578 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
de27e64e 579 if (conf_is_ht40_minus(&priv->hw->conf))
094d05dc 580 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
de27e64e 581 else if (conf_is_ht40_plus(&priv->hw->conf))
094d05dc
S		 582 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
583
d1141dfb 584 /* If no above or below channel supplied disable FAT channel */
d9fe60de 585 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 586 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG		 587 iwl_conf->supported_chan_width = 0;
588
12837be1
RR		 589 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
590
d9fe60de 591 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 592
094d05dc 593 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 594 iwl_conf->ht_protection =
ae5eb026 595 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 596 iwl_conf->non_GF_STA_present =
ae5eb026
JB		 597 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
598
599 rcu_read_unlock();
d1141dfb 600
e1623446 601 IWL_DEBUG_MAC80211(priv, "leave\n");
d1141dfb
EG		 602}
603
b481de9c
ZY		 604/*
605 * QoS support
606*/
1ff50bda 607static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 608{
b481de9c
ZY		 609 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
610 return;
611
b481de9c
ZY		 612 priv->qos_data.def_qos_parm.qos_flags = 0;
613
614 if (priv->qos_data.qos_cap.q_AP.queue_request &&
615 !priv->qos_data.qos_cap.q_AP.txop_request)
616 priv->qos_data.def_qos_parm.qos_flags |=
617 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 618 if (priv->qos_data.qos_active)
619 priv->qos_data.def_qos_parm.qos_flags |=
620 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
621
fd105e79 622 if (priv->current_ht_config.is_ht)
f1f1f5c7 623 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 624
3109ece1 625 if (force || iwl_is_associated(priv)) {
e1623446 626 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
f1f1f5c7
TW		 627 priv->qos_data.qos_active,
628 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 629
1ff50bda
EG		 630 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
631 sizeof(struct iwl_qosparam_cmd),
632 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY		 633 }
634}
635
b481de9c 636#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 637
3195c1f3 638static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 639{
640 u16 new_val = 0;
641 u16 beacon_factor = 0;
642
3195c1f3
TW		 643 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
644 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY		 645 new_val = beacon_val / beacon_factor;
646
3195c1f3 647 return new_val;
b481de9c
ZY		 648}
649
3195c1f3 650static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 651{
3195c1f3
TW		 652 u64 tsf;
653 s32 interval_tm, rem;
b481de9c
ZY		 654 unsigned long flags;
655 struct ieee80211_conf *conf = NULL;
656 u16 beacon_int = 0;
657
658 conf = ieee80211_get_hw_conf(priv->hw);
659
660 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 661 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 662 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 663
05c914fe 664 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 665 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY		 666 priv->rxon_timing.atim_window = 0;
667 } else {
3195c1f3
TW		 668 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
669
b481de9c
ZY		 670 /* TODO: we need to get atim_window from upper stack
671 * for now we set to 0 */
672 priv->rxon_timing.atim_window = 0;
673 }
674
3195c1f3 675 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 676
3195c1f3
TW		 677 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
678 interval_tm = beacon_int * 1024;
679 rem = do_div(tsf, interval_tm);
680 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
681
682 spin_unlock_irqrestore(&priv->lock, flags);
e1623446 683 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
3195c1f3
TW		 684 le16_to_cpu(priv->rxon_timing.beacon_interval),
685 le32_to_cpu(priv->rxon_timing.beacon_init_val),
686 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY		 687}
688
5b9f8cd3 689static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 690{
5b9f8cd3 691 iwl_connection_init_rx_config(priv, mode);
8ccde88a 692 iwl_set_rxon_chain(priv);
b481de9c
ZY		 693 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
694
37deb2a0 695 iwl_clear_stations_table(priv);
b481de9c 696
fde3571f 697 /* dont commit rxon if rf-kill is on*/
fee1247a 698 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 699 return -EAGAIN;
700
701 cancel_delayed_work(&priv->scan_check);
2a421b91 702 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 703 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 704 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA		 705 return -EAGAIN;
706 }
707
5b9f8cd3 708 iwl_commit_rxon(priv);
b481de9c
ZY		 709
710 return 0;
711}
712
b481de9c
ZY		 713/******************************************************************************
714 *
715 * Generic RX handler implementations
716 *
717 ******************************************************************************/
885ba202
TW		 718static void iwl_rx_reply_alive(struct iwl_priv *priv,
719 struct iwl_rx_mem_buffer *rxb)
b481de9c 720{
db11d634 721 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 722 struct iwl_alive_resp *palive;
b481de9c
ZY		 723 struct delayed_work *pwork;
724
725 palive = &pkt->u.alive_frame;
726
e1623446 727 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY		 728 "0x%01X 0x%01X\n",
729 palive->is_valid, palive->ver_type,
730 palive->ver_subtype);
731
732 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 733 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
b481de9c
ZY		 734 memcpy(&priv->card_alive_init,
735 &pkt->u.alive_frame,
885ba202 736 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY		 737 pwork = &priv->init_alive_start;
738 } else {
e1623446 739 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 740 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 741 sizeof(struct iwl_alive_resp));
b481de9c
ZY		 742 pwork = &priv->alive_start;
743 }
744
745 /* We delay the ALIVE response by 5ms to
746 * give the HW RF Kill time to activate... */
747 if (palive->is_valid == UCODE_VALID_OK)
748 queue_delayed_work(priv->workqueue, pwork,
749 msecs_to_jiffies(5));
750 else
39aadf8c 751 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY		 752}
753
5b9f8cd3 754static void iwl_rx_reply_error(struct iwl_priv *priv,
a55360e4 755 struct iwl_rx_mem_buffer *rxb)
b481de9c 756{
db11d634 757 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c 758
15b1687c 759 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
b481de9c
ZY		 760 "seq 0x%04X ser 0x%08X\n",
761 le32_to_cpu(pkt->u.err_resp.error_type),
762 get_cmd_string(pkt->u.err_resp.cmd_id),
763 pkt->u.err_resp.cmd_id,
764 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
765 le32_to_cpu(pkt->u.err_resp.error_info));
766}
767
5b9f8cd3 768static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 769 struct iwl_rx_mem_buffer *rxb)
b481de9c 770{
0a6857e7 771#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 772 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86 773 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
e1623446 774 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
b481de9c
ZY		 775 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
776#endif
777}
778
5b9f8cd3 779static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 780 struct iwl_rx_mem_buffer *rxb)
b481de9c 781{
db11d634 782 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
e1623446 783 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
b481de9c
ZY		 784 "notification for %s:\n",
785 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 786 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 787}
788
5b9f8cd3 789static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 790{
c79dd5b5
TW		 791 struct iwl_priv *priv =
792 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 793 struct sk_buff *beacon;
794
795 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 796 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY		 797
798 if (!beacon) {
15b1687c 799 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY		 800 return;
801 }
802
803 mutex_lock(&priv->mutex);
804 /* new beacon skb is allocated every time; dispose previous.*/
805 if (priv->ibss_beacon)
806 dev_kfree_skb(priv->ibss_beacon);
807
808 priv->ibss_beacon = beacon;
809 mutex_unlock(&priv->mutex);
810
5b9f8cd3 811 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 812}
813
4e39317d 814/**
5b9f8cd3 815 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG		 816 *
817 * This callback is provided in order to send a statistics request.
818 *
819 * This timer function is continually reset to execute within
820 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
821 * was received. We need to ensure we receive the statistics in order
822 * to update the temperature used for calibrating the TXPOWER.
823 */
5b9f8cd3 824static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG		 825{
826 struct iwl_priv *priv = (struct iwl_priv *)data;
827
828 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
829 return;
830
61780ee3
MA		 831 /* dont send host command if rf-kill is on */
832 if (!iwl_is_ready_rf(priv))
833 return;
834
4e39317d
EG		 835 iwl_send_statistics_request(priv, CMD_ASYNC);
836}
837
5b9f8cd3 838static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 839 struct iwl_rx_mem_buffer *rxb)
b481de9c 840{
0a6857e7 841#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 842 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW		 843 struct iwl4965_beacon_notif *beacon =
844 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 845 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c 846
e1623446 847 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c 848 "tsf %d %d rate %d\n",
25a6572c 849 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY		 850 beacon->beacon_notify_hdr.failure_frame,
851 le32_to_cpu(beacon->ibss_mgr_status),
852 le32_to_cpu(beacon->high_tsf),
853 le32_to_cpu(beacon->low_tsf), rate);
854#endif
855
05c914fe 856 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY		 857 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
858 queue_work(priv->workqueue, &priv->beacon_update);
859}
860
b481de9c
ZY		 861/* Handle notification from uCode that card's power state is changing
862 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 863static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 864 struct iwl_rx_mem_buffer *rxb)
b481de9c 865{
db11d634 866 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 867 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
868 unsigned long status = priv->status;
869
e1623446 870 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY		 871 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
872 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
873
874 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
875 RF_CARD_DISABLED)) {
876
3395f6e9 877 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 878 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
879
3395f6e9
TW		 880 if (!iwl_grab_nic_access(priv)) {
881 iwl_write_direct32(
b481de9c
ZY		 882 priv, HBUS_TARG_MBX_C,
883 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
884
3395f6e9 885 iwl_release_nic_access(priv);
b481de9c
ZY		 886 }
887
888 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 889 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 890 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 891 if (!iwl_grab_nic_access(priv)) {
892 iwl_write_direct32(
b481de9c
ZY		 893 priv, HBUS_TARG_MBX_C,
894 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
895
3395f6e9 896 iwl_release_nic_access(priv);
b481de9c
ZY		 897 }
898 }
899
900 if (flags & RF_CARD_DISABLED) {
3395f6e9 901 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 902 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 903 iwl_read32(priv, CSR_UCODE_DRV_GP1);
904 if (!iwl_grab_nic_access(priv))
905 iwl_release_nic_access(priv);
b481de9c
ZY		 906 }
907 }
908
909 if (flags & HW_CARD_DISABLED)
910 set_bit(STATUS_RF_KILL_HW, &priv->status);
911 else
912 clear_bit(STATUS_RF_KILL_HW, &priv->status);
913
914
915 if (flags & SW_CARD_DISABLED)
916 set_bit(STATUS_RF_KILL_SW, &priv->status);
917 else
918 clear_bit(STATUS_RF_KILL_SW, &priv->status);
919
920 if (!(flags & RXON_CARD_DISABLED))
2a421b91 921 iwl_scan_cancel(priv);
b481de9c
ZY		 922
923 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
924 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
925 (test_bit(STATUS_RF_KILL_SW, &status) !=
926 test_bit(STATUS_RF_KILL_SW, &priv->status)))
927 queue_work(priv->workqueue, &priv->rf_kill);
928 else
929 wake_up_interruptible(&priv->wait_command_queue);
930}
931
5b9f8cd3 932int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW		 933{
934 int ret;
935 unsigned long flags;
936
937 spin_lock_irqsave(&priv->lock, flags);
938 ret = iwl_grab_nic_access(priv);
939 if (ret)
940 goto err;
941
942 if (src == IWL_PWR_SRC_VAUX) {
3fdb68de 943 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
e2e3c57b
TW		 944 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
945 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
946 ~APMG_PS_CTRL_MSK_PWR_SRC);
947 } else {
948 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
949 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
950 ~APMG_PS_CTRL_MSK_PWR_SRC);
951 }
952
953 iwl_release_nic_access(priv);
954err:
955 spin_unlock_irqrestore(&priv->lock, flags);
956 return ret;
957}
958
b481de9c 959/**
5b9f8cd3 960 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 961 *
962 * Setup the RX handlers for each of the reply types sent from the uCode
963 * to the host.
964 *
965 * This function chains into the hardware specific files for them to setup
966 * any hardware specific handlers as well.
967 */
653fa4a0 968static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 969{
885ba202 970 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG		 971 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
972 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 973 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 974 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG		 975 iwl_rx_pm_debug_statistics_notif;
976 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 977
9fbab516
BC		 978 /*
979 * The same handler is used for both the REPLY to a discrete
980 * statistics request from the host as well as for the periodic
981 * statistics notifications (after received beacons) from the uCode.
b481de9c 982 */
8f91aecb
EG		 983 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
984 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 985
21c339bf 986 iwl_setup_spectrum_handlers(priv);
2a421b91
TW		 987 iwl_setup_rx_scan_handlers(priv);
988
37a44211 989 /* status change handler */
5b9f8cd3 990 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 991
c1354754
TW		 992 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
993 iwl_rx_missed_beacon_notif;
37a44211 994 /* Rx handlers */
1781a07f
EG		 995 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
996 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG		 997 /* block ack */
998 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 999 /* Set up hardware specific Rx handlers */
d4789efe 1000 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY		 1001}
1002
b481de9c 1003/**
a55360e4 1004 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 1005 *
1006 * Uses the priv->rx_handlers callback function array to invoke
1007 * the appropriate handlers, including command responses,
1008 * frame-received notifications, and other notifications.
1009 */
a55360e4 1010void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1011{
a55360e4 1012 struct iwl_rx_mem_buffer *rxb;
db11d634 1013 struct iwl_rx_packet *pkt;
a55360e4 1014 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 1015 u32 r, i;
1016 int reclaim;
1017 unsigned long flags;
5c0eef96 1018 u8 fill_rx = 0;
d68ab680 1019 u32 count = 8;
b481de9c 1020
6440adb5
CB		 1021 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1022 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 1023 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY		 1024 i = rxq->read;
1025
1026 /* Rx interrupt, but nothing sent from uCode */
1027 if (i == r)
e1623446 1028 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
b481de9c 1029
a55360e4 1030 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA		 1031 fill_rx = 1;
1032
b481de9c
ZY		 1033 while (i != r) {
1034 rxb = rxq->queue[i];
1035
9fbab516 1036 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 1037 * then a bug has been introduced in the queue refilling
1038 * routines -- catch it here */
1039 BUG_ON(rxb == NULL);
1040
1041 rxq->queue[i] = NULL;
1042
e91af0af
JB		 1043 dma_sync_single_range_for_cpu(
1044 &priv->pci_dev->dev, rxb->real_dma_addr,
1045 rxb->aligned_dma_addr - rxb->real_dma_addr,
1046 priv->hw_params.rx_buf_size,
1047 PCI_DMA_FROMDEVICE);
db11d634 1048 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 1049
1050 /* Reclaim a command buffer only if this packet is a response
1051 * to a (driver-originated) command.
1052 * If the packet (e.g. Rx frame) originated from uCode,
1053 * there is no command buffer to reclaim.
1054 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1055 * but apparently a few don't get set; catch them here. */
1056 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1057 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1058 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1059 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1060 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 1061 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1062 (pkt->hdr.cmd != REPLY_TX);
1063
1064 /* Based on type of command response or notification,
1065 * handle those that need handling via function in
5b9f8cd3 1066 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1067 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1068 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
f3d67999 1069 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY		 1070 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1071 } else {
1072 /* No handling needed */
e1623446 1073 IWL_DEBUG_RX(priv,
b481de9c
ZY		 1074 "r %d i %d No handler needed for %s, 0x%02x\n",
1075 r, i, get_cmd_string(pkt->hdr.cmd),
1076 pkt->hdr.cmd);
1077 }
1078
1079 if (reclaim) {
9fbab516 1080 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1081 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 1082 * as we reclaim the driver command queue */
1083 if (rxb && rxb->skb)
17b88929 1084 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1085 else
39aadf8c 1086 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY		 1087 }
1088
1089 /* For now we just don't re-use anything. We can tweak this
1090 * later to try and re-use notification packets and SKBs that
1091 * fail to Rx correctly */
1092 if (rxb->skb != NULL) {
1093 priv->alloc_rxb_skb--;
1094 dev_kfree_skb_any(rxb->skb);
1095 rxb->skb = NULL;
1096 }
1097
4018517a
JB		 1098 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1099 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1100 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 1101 spin_lock_irqsave(&rxq->lock, flags);
1102 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1103 spin_unlock_irqrestore(&rxq->lock, flags);
1104 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 1105 /* If there are a lot of unused frames,
1106 * restock the Rx queue so ucode wont assert. */
1107 if (fill_rx) {
1108 count++;
1109 if (count >= 8) {
1110 priv->rxq.read = i;
f1bc4ac6 1111 iwl_rx_queue_restock(priv);
5c0eef96
MA		 1112 count = 0;
1113 }
1114 }
b481de9c
ZY		 1115 }
1116
1117 /* Backtrack one entry */
1118 priv->rxq.read = i;
a55360e4
TW		 1119 iwl_rx_queue_restock(priv);
1120}
a55360e4 1121
0359facc
MA		 1122/* call this function to flush any scheduled tasklet */
1123static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1124{
a96a27f9 1125 /* wait to make sure we flush pending tasklet*/
0359facc
MA		 1126 synchronize_irq(priv->pci_dev->irq);
1127 tasklet_kill(&priv->irq_tasklet);
1128}
1129
5b9f8cd3 1130static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 1131{
1132 unsigned long flags;
1133
1134 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1135 sizeof(priv->staging_rxon));
1136 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1137 iwl_commit_rxon(priv);
b481de9c 1138
4f40e4d9 1139 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 1140
1141 spin_lock_irqsave(&priv->lock, flags);
1142 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1143 priv->error_recovering = 0;
1144 spin_unlock_irqrestore(&priv->lock, flags);
1145}
1146
5b9f8cd3 1147static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 1148{
1149 u32 inta, handled = 0;
1150 u32 inta_fh;
1151 unsigned long flags;
0a6857e7 1152#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 1153 u32 inta_mask;
1154#endif
1155
1156 spin_lock_irqsave(&priv->lock, flags);
1157
1158 /* Ack/clear/reset pending uCode interrupts.
1159 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1160 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 1161 inta = iwl_read32(priv, CSR_INT);
1162 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 1163
1164 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1165 * Any new interrupts that happen after this, either while we're
1166 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 1167 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1168 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1169
0a6857e7 1170#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1171 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1172 /* just for debug */
3395f6e9 1173 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1174 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY		 1175 inta, inta_mask, inta_fh);
1176 }
1177#endif
1178
1179 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1180 * atomic, make sure that inta covers all the interrupts that
1181 * we've discovered, even if FH interrupt came in just after
1182 * reading CSR_INT. */
6f83eaa1 1183 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1184 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1185 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 1186 inta |= CSR_INT_BIT_FH_TX;
1187
1188 /* Now service all interrupt bits discovered above. */
1189 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1190 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY		 1191
1192 /* Tell the device to stop sending interrupts */
5b9f8cd3 1193 iwl_disable_interrupts(priv);
b481de9c 1194
5b9f8cd3 1195 iwl_irq_handle_error(priv);
b481de9c
ZY		 1196
1197 handled |= CSR_INT_BIT_HW_ERR;
1198
1199 spin_unlock_irqrestore(&priv->lock, flags);
1200
1201 return;
1202 }
1203
0a6857e7 1204#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1205 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1206 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 1207 if (inta & CSR_INT_BIT_SCD)
e1623446 1208 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1209 "the frame/frames.\n");
b481de9c
ZY		 1210
1211 /* Alive notification via Rx interrupt will do the real work */
1212 if (inta & CSR_INT_BIT_ALIVE)
e1623446 1213 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY		 1214 }
1215#endif
1216 /* Safely ignore these bits for debug checks below */
25c03d8e 1217 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1218
9fbab516 1219 /* HW RF KILL switch toggled */
b481de9c
ZY		 1220 if (inta & CSR_INT_BIT_RF_KILL) {
1221 int hw_rf_kill = 0;
3395f6e9 1222 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 1223 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1224 hw_rf_kill = 1;
1225
e1623446 1226 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
c3056065 1227 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1228
a9efa652 1229 /* driver only loads ucode once setting the interface up.
6cd0b1cb
HS		 1230 * the driver allows loading the ucode even if the radio
1231 * is killed. Hence update the killswitch state here. The
1232 * rfkill handler will care about restarting if needed.
a9efa652 1233 */
6cd0b1cb
HS		 1234 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1235 if (hw_rf_kill)
1236 set_bit(STATUS_RF_KILL_HW, &priv->status);
1237 else
1238 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1239 queue_work(priv->workqueue, &priv->rf_kill);
edb34228 1240 }
b481de9c
ZY		 1241
1242 handled |= CSR_INT_BIT_RF_KILL;
1243 }
1244
9fbab516 1245 /* Chip got too hot and stopped itself */
b481de9c 1246 if (inta & CSR_INT_BIT_CT_KILL) {
15b1687c 1247 IWL_ERR(priv, "Microcode CT kill error detected.\n");
b481de9c
ZY		 1248 handled |= CSR_INT_BIT_CT_KILL;
1249 }
1250
1251 /* Error detected by uCode */
1252 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT		 1253 IWL_ERR(priv, "Microcode SW error detected. "
1254 " Restarting 0x%X.\n", inta);
5b9f8cd3 1255 iwl_irq_handle_error(priv);
b481de9c
ZY		 1256 handled |= CSR_INT_BIT_SW_ERR;
1257 }
1258
1259 /* uCode wakes up after power-down sleep */
1260 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1261 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
a55360e4 1262 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW		 1263 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1264 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1265 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1266 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1267 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1268 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 1269
1270 handled |= CSR_INT_BIT_WAKEUP;
1271 }
1272
1273 /* All uCode command responses, including Tx command responses,
1274 * Rx "responses" (frame-received notification), and other
1275 * notifications from uCode come through here*/
1276 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1277 iwl_rx_handle(priv);
b481de9c
ZY		 1278 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1279 }
1280
1281 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1282 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 1283 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR		 1284 /* FH finished to write, send event */
1285 priv->ucode_write_complete = 1;
1286 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1287 }
1288
1289 if (inta & ~handled)
15b1687c 1290 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY		 1291
1292 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 1293 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 1294 inta & ~CSR_INI_SET_MASK);
39aadf8c 1295 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY		 1296 }
1297
1298 /* Re-enable all interrupts */
0359facc
MA		 1299 /* only Re-enable if diabled by irq */
1300 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1301 iwl_enable_interrupts(priv);
b481de9c 1302
0a6857e7 1303#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1304 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 1305 inta = iwl_read32(priv, CSR_INT);
1306 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1307 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 1308 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY		 1309 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1310 }
1311#endif
1312 spin_unlock_irqrestore(&priv->lock, flags);
1313}
1314
5b9f8cd3 1315static irqreturn_t iwl_isr(int irq, void *data)
b481de9c 1316{
c79dd5b5 1317 struct iwl_priv *priv = data;
b481de9c
ZY		 1318 u32 inta, inta_mask;
1319 u32 inta_fh;
1320 if (!priv)
1321 return IRQ_NONE;
1322
1323 spin_lock(&priv->lock);
1324
1325 /* Disable (but don't clear!) interrupts here to avoid
1326 * back-to-back ISRs and sporadic interrupts from our NIC.
1327 * If we have something to service, the tasklet will re-enable ints.
1328 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 1329 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1330 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 1331
1332 /* Discover which interrupts are active/pending */
3395f6e9
TW		 1333 inta = iwl_read32(priv, CSR_INT);
1334 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1335
1336 /* Ignore interrupt if there's nothing in NIC to service.
1337 * This may be due to IRQ shared with another device,
1338 * or due to sporadic interrupts thrown from our NIC. */
1339 if (!inta && !inta_fh) {
e1623446 1340 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
b481de9c
ZY		 1341 goto none;
1342 }
1343
1344 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 1345 /* Hardware disappeared. It might have already raised
1346 * an interrupt */
39aadf8c 1347 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
66fbb541 1348 goto unplugged;
b481de9c
ZY		 1349 }
1350
e1623446 1351 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY		 1352 inta, inta_mask, inta_fh);
1353
25c03d8e
JP		 1354 inta &= ~CSR_INT_BIT_SCD;
1355
5b9f8cd3 1356 /* iwl_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 1357 if (likely(inta || inta_fh))
1358 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1359
66fbb541
ON		 1360 unplugged:
1361 spin_unlock(&priv->lock);
b481de9c
ZY		 1362 return IRQ_HANDLED;
1363
1364 none:
1365 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 1366 /* only Re-enable if diabled by irq */
1367 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1368 iwl_enable_interrupts(priv);
b481de9c
ZY		 1369 spin_unlock(&priv->lock);
1370 return IRQ_NONE;
1371}
1372
b481de9c
ZY		 1373/******************************************************************************
1374 *
1375 * uCode download functions
1376 *
1377 ******************************************************************************/
1378
5b9f8cd3 1379static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1380{
98c92211
TW		 1381 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1382 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1383 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1384 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1385 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1386 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 1387}
1388
5b9f8cd3 1389static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR		 1390{
1391 /* Remove all resets to allow NIC to operate */
1392 iwl_write32(priv, CSR_RESET, 0);
1393}
1394
1395
b481de9c 1396/**
5b9f8cd3 1397 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 1398 *
1399 * Copy into buffers for card to fetch via bus-mastering
1400 */
5b9f8cd3 1401static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1402{
14b3d338 1403 struct iwl_ucode *ucode;
a0987a8d 1404 int ret = -EINVAL, index;
b481de9c 1405 const struct firmware *ucode_raw;
a0987a8d
RC		 1406 const char *name_pre = priv->cfg->fw_name_pre;
1407 const unsigned int api_max = priv->cfg->ucode_api_max;
1408 const unsigned int api_min = priv->cfg->ucode_api_min;
1409 char buf[25];
b481de9c
ZY		 1410 u8 *src;
1411 size_t len;
a0987a8d 1412 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY		 1413
1414 /* Ask kernel firmware_class module to get the boot firmware off disk.
1415 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC		 1416 for (index = api_max; index >= api_min; index--) {
1417 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1418 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1419 if (ret < 0) {
15b1687c 1420 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC		 1421 buf, ret);
1422 if (ret == -ENOENT)
1423 continue;
1424 else
1425 goto error;
1426 } else {
1427 if (index < api_max)
15b1687c
WT		 1428 IWL_ERR(priv, "Loaded firmware %s, "
1429 "which is deprecated. "
1430 "Please use API v%u instead.\n",
a0987a8d 1431 buf, api_max);
15b1687c 1432
e1623446 1433 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
a0987a8d
RC		 1434 buf, ucode_raw->size);
1435 break;
1436 }
b481de9c
ZY		 1437 }
1438
a0987a8d
RC		 1439 if (ret < 0)
1440 goto error;
b481de9c
ZY		 1441
1442 /* Make sure that we got at least our header! */
1443 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 1444 IWL_ERR(priv, "File size way too small!\n");
90e759d1 1445 ret = -EINVAL;
b481de9c
ZY		 1446 goto err_release;
1447 }
1448
1449 /* Data from ucode file: header followed by uCode images */
1450 ucode = (void *)ucode_raw->data;
1451
c02b3acd 1452 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1453 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY		 1454 inst_size = le32_to_cpu(ucode->inst_size);
1455 data_size = le32_to_cpu(ucode->data_size);
1456 init_size = le32_to_cpu(ucode->init_size);
1457 init_data_size = le32_to_cpu(ucode->init_data_size);
1458 boot_size = le32_to_cpu(ucode->boot_size);
1459
a0987a8d
RC		 1460 /* api_ver should match the api version forming part of the
1461 * firmware filename ... but we don't check for that and only rely
1462 * on the API version read from firware header from here on forward */
1463
1464 if (api_ver < api_min || api_ver > api_max) {
15b1687c 1465 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC		 1466 "Driver supports v%u, firmware is v%u.\n",
1467 api_max, api_ver);
1468 priv->ucode_ver = 0;
1469 ret = -EINVAL;
1470 goto err_release;
1471 }
1472 if (api_ver != api_max)
978785a3 1473 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
a0987a8d
RC		 1474 "got v%u. New firmware can be obtained "
1475 "from http://www.intellinuxwireless.org.\n",
1476 api_max, api_ver);
1477
978785a3
TW		 1478 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1479 IWL_UCODE_MAJOR(priv->ucode_ver),
1480 IWL_UCODE_MINOR(priv->ucode_ver),
1481 IWL_UCODE_API(priv->ucode_ver),
1482 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d 1483
e1623446 1484 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 1485 priv->ucode_ver);
e1623446 1486 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
b481de9c 1487 inst_size);
e1623446 1488 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
b481de9c 1489 data_size);
e1623446 1490 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
b481de9c 1491 init_size);
e1623446 1492 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
b481de9c 1493 init_data_size);
e1623446 1494 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
b481de9c
ZY		 1495 boot_size);
1496
1497 /* Verify size of file vs. image size info in file's header */
1498 if (ucode_raw->size < sizeof(*ucode) +
1499 inst_size + data_size + init_size +
1500 init_data_size + boot_size) {
1501
e1623446 1502 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
b481de9c 1503 (int)ucode_raw->size);
90e759d1 1504 ret = -EINVAL;
b481de9c
ZY		 1505 goto err_release;
1506 }
1507
1508 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1509 if (inst_size > priv->hw_params.max_inst_size) {
e1623446 1510 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW		 1511 inst_size);
1512 ret = -EINVAL;
b481de9c
ZY		 1513 goto err_release;
1514 }
1515
099b40b7 1516 if (data_size > priv->hw_params.max_data_size) {
e1623446 1517 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW		 1518 data_size);
1519 ret = -EINVAL;
b481de9c
ZY		 1520 goto err_release;
1521 }
099b40b7 1522 if (init_size > priv->hw_params.max_inst_size) {
e1623446
TW		 1523 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1524 init_size);
90e759d1 1525 ret = -EINVAL;
b481de9c
ZY		 1526 goto err_release;
1527 }
099b40b7 1528 if (init_data_size > priv->hw_params.max_data_size) {
e1623446 1529 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
90e759d1
TW		 1530 init_data_size);
1531 ret = -EINVAL;
b481de9c
ZY		 1532 goto err_release;
1533 }
099b40b7 1534 if (boot_size > priv->hw_params.max_bsm_size) {
e1623446
TW		 1535 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1536 boot_size);
90e759d1 1537 ret = -EINVAL;
b481de9c
ZY		 1538 goto err_release;
1539 }
1540
1541 /* Allocate ucode buffers for card's bus-master loading ... */
1542
1543 /* Runtime instructions and 2 copies of data:
1544 * 1) unmodified from disk
1545 * 2) backup cache for save/restore during power-downs */
1546 priv->ucode_code.len = inst_size;
98c92211 1547 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 1548
1549 priv->ucode_data.len = data_size;
98c92211 1550 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 1551
1552 priv->ucode_data_backup.len = data_size;
98c92211 1553 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 1554
1f304e4e
ZY		 1555 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1556 !priv->ucode_data_backup.v_addr)
1557 goto err_pci_alloc;
1558
b481de9c 1559 /* Initialization instructions and data */
90e759d1
TW		 1560 if (init_size && init_data_size) {
1561 priv->ucode_init.len = init_size;
98c92211 1562 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 1563
1564 priv->ucode_init_data.len = init_data_size;
98c92211 1565 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 1566
1567 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1568 goto err_pci_alloc;
1569 }
b481de9c
ZY		 1570
1571 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 1572 if (boot_size) {
1573 priv->ucode_boot.len = boot_size;
98c92211 1574 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1575
90e759d1
TW		 1576 if (!priv->ucode_boot.v_addr)
1577 goto err_pci_alloc;
1578 }
b481de9c
ZY		 1579
1580 /* Copy images into buffers for card's bus-master reads ... */
1581
1582 /* Runtime instructions (first block of data in file) */
1583 src = &ucode->data[0];
1584 len = priv->ucode_code.len;
e1623446 1585 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c 1586 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 1587 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY		 1588 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1589
1590 /* Runtime data (2nd block)
5b9f8cd3 1591 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY		 1592 src = &ucode->data[inst_size];
1593 len = priv->ucode_data.len;
e1623446 1594 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 1595 memcpy(priv->ucode_data.v_addr, src, len);
1596 memcpy(priv->ucode_data_backup.v_addr, src, len);
1597
1598 /* Initialization instructions (3rd block) */
1599 if (init_size) {
1600 src = &ucode->data[inst_size + data_size];
1601 len = priv->ucode_init.len;
e1623446 1602 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
90e759d1 1603 len);
b481de9c
ZY		 1604 memcpy(priv->ucode_init.v_addr, src, len);
1605 }
1606
1607 /* Initialization data (4th block) */
1608 if (init_data_size) {
1609 src = &ucode->data[inst_size + data_size + init_size];
1610 len = priv->ucode_init_data.len;
e1623446 1611 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
90e759d1 1612 len);
b481de9c
ZY		 1613 memcpy(priv->ucode_init_data.v_addr, src, len);
1614 }
1615
1616 /* Bootstrap instructions (5th block) */
1617 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1618 len = priv->ucode_boot.len;
e1623446 1619 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 1620 memcpy(priv->ucode_boot.v_addr, src, len);
1621
1622 /* We have our copies now, allow OS release its copies */
1623 release_firmware(ucode_raw);
1624 return 0;
1625
1626 err_pci_alloc:
15b1687c 1627 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 1628 ret = -ENOMEM;
5b9f8cd3 1629 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 1630
1631 err_release:
1632 release_firmware(ucode_raw);
1633
1634 error:
90e759d1 1635 return ret;
b481de9c
ZY		 1636}
1637
ada17513
MA		 1638/* temporary */
1639static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1640 struct sk_buff *skb);
1641
b481de9c 1642/**
4a4a9e81 1643 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1644 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1645 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1646 */
4a4a9e81 1647static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1648{
57aab75a 1649 int ret = 0;
b481de9c 1650
e1623446 1651 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY		 1652
1653 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1654 /* We had an error bringing up the hardware, so take it
1655 * all the way back down so we can try again */
e1623446 1656 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY		 1657 goto restart;
1658 }
1659
1660 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1661 * This is a paranoid check, because we would not have gotten the
1662 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1663 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 1664 /* Runtime instruction load was bad;
1665 * take it all the way back down so we can try again */
e1623446 1666 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY		 1667 goto restart;
1668 }
1669
37deb2a0 1670 iwl_clear_stations_table(priv);
57aab75a
TW		 1671 ret = priv->cfg->ops->lib->alive_notify(priv);
1672 if (ret) {
39aadf8c
WT		 1673 IWL_WARN(priv,
1674 "Could not complete ALIVE transition [ntf]: %d\n", ret);
b481de9c
ZY		 1675 goto restart;
1676 }
1677
5b9f8cd3 1678 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY		 1679 set_bit(STATUS_ALIVE, &priv->status);
1680
fee1247a 1681 if (iwl_is_rfkill(priv))
b481de9c
ZY		 1682 return;
1683
36d6825b 1684 ieee80211_wake_queues(priv->hw);
b481de9c
ZY		 1685
1686 priv->active_rate = priv->rates_mask;
1687 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1688
3109ece1 1689 if (iwl_is_associated(priv)) {
c1adf9fb
GG		 1690 struct iwl_rxon_cmd *active_rxon =
1691 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY		 1692
1693 memcpy(&priv->staging_rxon, &priv->active_rxon,
1694 sizeof(priv->staging_rxon));
1695 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1696 } else {
1697 /* Initialize our rx_config data */
5b9f8cd3 1698 iwl_connection_init_rx_config(priv, priv->iw_mode);
8ccde88a 1699 iwl_set_rxon_chain(priv);
b481de9c
ZY		 1700 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1701 }
1702
9fbab516 1703 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1704 iwl_send_bt_config(priv);
b481de9c 1705
4a4a9e81
TW		 1706 iwl_reset_run_time_calib(priv);
1707
b481de9c 1708 /* Configure the adapter for unassociated operation */
5b9f8cd3 1709 iwl_commit_rxon(priv);
b481de9c
ZY		 1710
1711 /* At this point, the NIC is initialized and operational */
47f4a587 1712 iwl_rf_kill_ct_config(priv);
5a66926a 1713
fe00b5a5
RC		 1714 iwl_leds_register(priv);
1715
e1623446 1716 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 1717 set_bit(STATUS_READY, &priv->status);
5a66926a 1718 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1719
1720 if (priv->error_recovering)
5b9f8cd3 1721 iwl_error_recovery(priv);
b481de9c 1722
58d0f361 1723 iwl_power_update_mode(priv, 1);
c46fbefa 1724
ada17513
MA		 1725 /* reassociate for ADHOC mode */
1726 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1727 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1728 priv->vif);
1729 if (beacon)
1730 iwl_mac_beacon_update(priv->hw, beacon);
1731 }
1732
1733
c46fbefa 1734 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1735 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1736
b481de9c
ZY		 1737 return;
1738
1739 restart:
1740 queue_work(priv->workqueue, &priv->restart);
1741}
1742
4e39317d 1743static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1744
5b9f8cd3 1745static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1746{
1747 unsigned long flags;
1748 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c 1749
e1623446 1750 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c 1751
b481de9c
ZY		 1752 if (!exit_pending)
1753 set_bit(STATUS_EXIT_PENDING, &priv->status);
1754
ab53d8af
MA		 1755 iwl_leds_unregister(priv);
1756
37deb2a0 1757 iwl_clear_stations_table(priv);
b481de9c
ZY		 1758
1759 /* Unblock any waiting calls */
1760 wake_up_interruptible_all(&priv->wait_command_queue);
1761
b481de9c
ZY		 1762 /* Wipe out the EXIT_PENDING status bit if we are not actually
1763 * exiting the module */
1764 if (!exit_pending)
1765 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1766
1767 /* stop and reset the on-board processor */
3395f6e9 1768 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 1769
1770 /* tell the device to stop sending interrupts */
0359facc 1771 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1772 iwl_disable_interrupts(priv);
0359facc
MA		 1773 spin_unlock_irqrestore(&priv->lock, flags);
1774 iwl_synchronize_irq(priv);
b481de9c
ZY		 1775
1776 if (priv->mac80211_registered)
1777 ieee80211_stop_queues(priv->hw);
1778
5b9f8cd3 1779 /* If we have not previously called iwl_init() then
b481de9c 1780 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1781 if (!iwl_is_init(priv)) {
b481de9c
ZY		 1782 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1783 STATUS_RF_KILL_HW |
1784 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1785 STATUS_RF_KILL_SW |
9788864e
RC		 1786 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1787 STATUS_GEO_CONFIGURED |
b481de9c 1788 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA		 1789 STATUS_IN_SUSPEND |
1790 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1791 STATUS_EXIT_PENDING;
b481de9c
ZY		 1792 goto exit;
1793 }
1794
1795 /* ...otherwise clear out all the status bits but the RF Kill and
1796 * SUSPEND bits and continue taking the NIC down. */
1797 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1798 STATUS_RF_KILL_HW |
1799 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1800 STATUS_RF_KILL_SW |
9788864e
RC		 1801 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1802 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 1803 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1804 STATUS_IN_SUSPEND |
1805 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA		 1806 STATUS_FW_ERROR |
1807 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1808 STATUS_EXIT_PENDING;
b481de9c
ZY		 1809
1810 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1811 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1812 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 1813 spin_unlock_irqrestore(&priv->lock, flags);
1814
da1bc453 1815 iwl_txq_ctx_stop(priv);
b3bbacb7 1816 iwl_rxq_stop(priv);
b481de9c
ZY		 1817
1818 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 1819 if (!iwl_grab_nic_access(priv)) {
1820 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1821 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1822 iwl_release_nic_access(priv);
b481de9c
ZY		 1823 }
1824 spin_unlock_irqrestore(&priv->lock, flags);
1825
1826 udelay(5);
1827
7f066108 1828 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG		 1829 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
1830 priv->cfg->ops->lib->apm_ops.stop(priv);
1831 else
1832 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 1833 exit:
885ba202 1834 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY		 1835
1836 if (priv->ibss_beacon)
1837 dev_kfree_skb(priv->ibss_beacon);
1838 priv->ibss_beacon = NULL;
1839
1840 /* clear out any free frames */
fcab423d 1841 iwl_clear_free_frames(priv);
b481de9c
ZY		 1842}
1843
5b9f8cd3 1844static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1845{
1846 mutex_lock(&priv->mutex);
5b9f8cd3 1847 __iwl_down(priv);
b481de9c 1848 mutex_unlock(&priv->mutex);
b24d22b1 1849
4e39317d 1850 iwl_cancel_deferred_work(priv);
b481de9c
ZY		 1851}
1852
1853#define MAX_HW_RESTARTS 5
1854
5b9f8cd3 1855static int __iwl_up(struct iwl_priv *priv)
b481de9c 1856{
57aab75a
TW		 1857 int i;
1858 int ret;
b481de9c
ZY		 1859
1860 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 1861 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY		 1862 return -EIO;
1863 }
1864
e903fbd4 1865 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 1866 IWL_ERR(priv, "ucode not available for device bringup\n");
e903fbd4
RC		 1867 return -EIO;
1868 }
1869
e655b9f0 1870 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 1871 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 1872 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 1873 else
e655b9f0 1874 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 1875
c1842d61 1876 if (iwl_is_rfkill(priv)) {
5b9f8cd3 1877 iwl_enable_interrupts(priv);
39aadf8c 1878 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
3bff19c2 1879 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 1880 return 0;
b481de9c
ZY		 1881 }
1882
3395f6e9 1883 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 1884
1053d35f 1885 ret = iwl_hw_nic_init(priv);
57aab75a 1886 if (ret) {
15b1687c 1887 IWL_ERR(priv, "Unable to init nic\n");
57aab75a 1888 return ret;
b481de9c
ZY		 1889 }
1890
1891 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 1892 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1893 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 1894 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1895
1896 /* clear (again), then enable host interrupts */
3395f6e9 1897 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 1898 iwl_enable_interrupts(priv);
b481de9c
ZY		 1899
1900 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 1901 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1902 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 1903
1904 /* Copy original ucode data image from disk into backup cache.
1905 * This will be used to initialize the on-board processor's
1906 * data SRAM for a clean start when the runtime program first loads. */
1907 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 1908 priv->ucode_data.len);
b481de9c 1909
b481de9c
ZY		 1910 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1911
37deb2a0 1912 iwl_clear_stations_table(priv);
b481de9c
ZY		 1913
1914 /* load bootstrap state machine,
1915 * load bootstrap program into processor's memory,
1916 * prepare to load the "initialize" uCode */
57aab75a 1917 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 1918
57aab75a 1919 if (ret) {
15b1687c
WT		 1920 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1921 ret);
b481de9c
ZY		 1922 continue;
1923 }
1924
f3d5b45b
EG		 1925 /* Clear out the uCode error bit if it is set */
1926 clear_bit(STATUS_FW_ERROR, &priv->status);
1927
b481de9c 1928 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 1929 iwl_nic_start(priv);
b481de9c 1930
e1623446 1931 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY		 1932
1933 return 0;
1934 }
1935
1936 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 1937 __iwl_down(priv);
64e72c3e 1938 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 1939
1940 /* tried to restart and config the device for as long as our
1941 * patience could withstand */
15b1687c 1942 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY		 1943 return -EIO;
1944}
1945
1946
1947/*****************************************************************************
1948 *
1949 * Workqueue callbacks
1950 *
1951 *****************************************************************************/
1952
4a4a9e81 1953static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 1954{
c79dd5b5
TW		 1955 struct iwl_priv *priv =
1956 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 1957
1958 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1959 return;
1960
1961 mutex_lock(&priv->mutex);
f3ccc08c 1962 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY		 1963 mutex_unlock(&priv->mutex);
1964}
1965
4a4a9e81 1966static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 1967{
c79dd5b5
TW		 1968 struct iwl_priv *priv =
1969 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 1970
1971 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1972 return;
1973
1974 mutex_lock(&priv->mutex);
4a4a9e81 1975 iwl_alive_start(priv);
b481de9c
ZY		 1976 mutex_unlock(&priv->mutex);
1977}
1978
16e727e8
EG		 1979static void iwl_bg_run_time_calib_work(struct work_struct *work)
1980{
1981 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1982 run_time_calib_work);
1983
1984 mutex_lock(&priv->mutex);
1985
1986 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1987 test_bit(STATUS_SCANNING, &priv->status)) {
1988 mutex_unlock(&priv->mutex);
1989 return;
1990 }
1991
1992 if (priv->start_calib) {
1993 iwl_chain_noise_calibration(priv, &priv->statistics);
1994
1995 iwl_sensitivity_calibration(priv, &priv->statistics);
1996 }
1997
1998 mutex_unlock(&priv->mutex);
1999 return;
2000}
2001
5b9f8cd3 2002static void iwl_bg_up(struct work_struct *data)
b481de9c 2003{
c79dd5b5 2004 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 2005
2006 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2007 return;
2008
2009 mutex_lock(&priv->mutex);
5b9f8cd3 2010 __iwl_up(priv);
b481de9c 2011 mutex_unlock(&priv->mutex);
80fcc9e2 2012 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2013}
2014
5b9f8cd3 2015static void iwl_bg_restart(struct work_struct *data)
b481de9c 2016{
c79dd5b5 2017 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 2018
2019 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2020 return;
2021
5b9f8cd3 2022 iwl_down(priv);
b481de9c
ZY		 2023 queue_work(priv->workqueue, &priv->up);
2024}
2025
5b9f8cd3 2026static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 2027{
c79dd5b5
TW		 2028 struct iwl_priv *priv =
2029 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 2030
2031 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2032 return;
2033
2034 mutex_lock(&priv->mutex);
a55360e4 2035 iwl_rx_replenish(priv);
b481de9c
ZY		 2036 mutex_unlock(&priv->mutex);
2037}
2038
7878a5a4
MA		 2039#define IWL_DELAY_NEXT_SCAN (HZ*2)
2040
5b9f8cd3 2041static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 2042{
b481de9c 2043 struct ieee80211_conf *conf = NULL;
857485c0 2044 int ret = 0;
1ff50bda 2045 unsigned long flags;
b481de9c 2046
05c914fe 2047 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 2048 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY		 2049 return;
2050 }
2051
e1623446 2052 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
e174961c 2053 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY		 2054
2055
2056 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2057 return;
2058
b481de9c 2059
508e32e1 2060 if (!priv->vif || !priv->is_open)
948c171c 2061 return;
508e32e1 2062
c90a74ba 2063 iwl_power_cancel_timeout(priv);
2a421b91 2064 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2065
b481de9c
ZY		 2066 conf = ieee80211_get_hw_conf(priv->hw);
2067
2068 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2069 iwl_commit_rxon(priv);
b481de9c 2070
3195c1f3 2071 iwl_setup_rxon_timing(priv);
857485c0 2072 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2073 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2074 if (ret)
39aadf8c 2075 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY		 2076 "Attempting to continue.\n");
2077
2078 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2079
42eb7c64 2080 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2081
c7de35cd 2082 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2083 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2084
e1623446 2085 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY		 2086 priv->assoc_id, priv->beacon_int);
2087
2088 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2089 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2090 else
2091 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2092
2093 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2094 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2095 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2096 else
2097 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2098
05c914fe 2099 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2100 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2101
2102 }
2103
5b9f8cd3 2104 iwl_commit_rxon(priv);
b481de9c
ZY		 2105
2106 switch (priv->iw_mode) {
05c914fe 2107 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 2108 break;
2109
05c914fe 2110 case NL80211_IFTYPE_ADHOC:
b481de9c 2111
c46fbefa
AK		 2112 /* assume default assoc id */
2113 priv->assoc_id = 1;
b481de9c 2114
4f40e4d9 2115 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2116 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2117
2118 break;
2119
2120 default:
15b1687c 2121 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 2122 __func__, priv->iw_mode);
b481de9c
ZY		 2123 break;
2124 }
2125
05c914fe 2126 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2127 priv->assoc_station_added = 1;
2128
1ff50bda
EG		 2129 spin_lock_irqsave(&priv->lock, flags);
2130 iwl_activate_qos(priv, 0);
2131 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2132
04816448
GE		 2133 /* the chain noise calibration will enabled PM upon completion
2134 * If chain noise has already been run, then we need to enable
2135 * power management here */
2136 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2137 iwl_power_enable_management(priv);
c90a74ba
EG		 2138
2139 /* Enable Rx differential gain and sensitivity calibrations */
2140 iwl_chain_noise_reset(priv);
2141 priv->start_calib = 1;
2142
508e32e1
RC		 2143}
2144
b481de9c
ZY		 2145/*****************************************************************************
2146 *
2147 * mac80211 entry point functions
2148 *
2149 *****************************************************************************/
2150
154b25ce 2151#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2152
5b9f8cd3 2153static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2154{
c79dd5b5 2155 struct iwl_priv *priv = hw->priv;
5a66926a 2156 int ret;
b481de9c 2157
e1623446 2158 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY		 2159
2160 /* we should be verifying the device is ready to be opened */
2161 mutex_lock(&priv->mutex);
2162
c1adf9fb 2163 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY		 2164 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2165 * ucode filename and max sizes are card-specific. */
b481de9c 2166
5a66926a 2167 if (!priv->ucode_code.len) {
5b9f8cd3 2168 ret = iwl_read_ucode(priv);
5a66926a 2169 if (ret) {
15b1687c 2170 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a 2171 mutex_unlock(&priv->mutex);
6cd0b1cb 2172 return ret;
5a66926a
ZY		 2173 }
2174 }
b481de9c 2175
5b9f8cd3 2176 ret = __iwl_up(priv);
5a66926a 2177
b481de9c 2178 mutex_unlock(&priv->mutex);
5a66926a 2179
80fcc9e2
AG		 2180 iwl_rfkill_set_hw_state(priv);
2181
e655b9f0 2182 if (ret)
6cd0b1cb 2183 return ret;
e655b9f0 2184
c1842d61
TW		 2185 if (iwl_is_rfkill(priv))
2186 goto out;
2187
e1623446 2188 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
e655b9f0
ZY		 2189
2190 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2191 return 0;
2192
fe9b6b72 2193 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2194 * mac80211 will not be run successfully. */
154b25ce
EG		 2195 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2196 test_bit(STATUS_READY, &priv->status),
2197 UCODE_READY_TIMEOUT);
2198 if (!ret) {
2199 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c 2200 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
154b25ce 2201 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6cd0b1cb 2202 return -ETIMEDOUT;
5a66926a 2203 }
fe9b6b72 2204 }
0a078ffa 2205
c1842d61 2206out:
0a078ffa 2207 priv->is_open = 1;
e1623446 2208 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2209 return 0;
2210}
2211
5b9f8cd3 2212static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2213{
c79dd5b5 2214 struct iwl_priv *priv = hw->priv;
b481de9c 2215
e1623446 2216 IWL_DEBUG_MAC80211(priv, "enter\n");
948c171c 2217
e655b9f0 2218 if (!priv->is_open) {
e1623446 2219 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY		 2220 return;
2221 }
2222
b481de9c 2223 priv->is_open = 0;
5a66926a 2224
fee1247a 2225 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 2226 /* stop mac, cancel any scan request and clear
2227 * RXON_FILTER_ASSOC_MSK BIT
2228 */
5a66926a 2229 mutex_lock(&priv->mutex);
2a421b91 2230 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2231 mutex_unlock(&priv->mutex);
fde3571f
MA		 2232 }
2233
5b9f8cd3 2234 iwl_down(priv);
5a66926a
ZY		 2235
2236 flush_workqueue(priv->workqueue);
6cd0b1cb
HS		 2237
2238 /* enable interrupts again in order to receive rfkill changes */
2239 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2240 iwl_enable_interrupts(priv);
948c171c 2241
e1623446 2242 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2243}
2244
5b9f8cd3 2245static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2246{
c79dd5b5 2247 struct iwl_priv *priv = hw->priv;
b481de9c 2248
e1623446 2249 IWL_DEBUG_MACDUMP(priv, "enter\n");
b481de9c 2250
e1623446 2251 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2252 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2253
e039fa4a 2254 if (iwl_tx_skb(priv, skb))
b481de9c
ZY		 2255 dev_kfree_skb_any(skb);
2256
e1623446 2257 IWL_DEBUG_MACDUMP(priv, "leave\n");
637f8837 2258 return NETDEV_TX_OK;
b481de9c
ZY		 2259}
2260
5b9f8cd3 2261static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2262 struct ieee80211_if_init_conf *conf)
2263{
c79dd5b5 2264 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2265 unsigned long flags;
2266
e1623446 2267 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 2268
32bfd35d 2269 if (priv->vif) {
e1623446 2270 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
75849d28 2271 return -EOPNOTSUPP;
b481de9c
ZY		 2272 }
2273
2274 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2275 priv->vif = conf->vif;
60294de3 2276 priv->iw_mode = conf->type;
b481de9c
ZY		 2277
2278 spin_unlock_irqrestore(&priv->lock, flags);
2279
2280 mutex_lock(&priv->mutex);
864792e3
TW		 2281
2282 if (conf->mac_addr) {
e1623446 2283 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
864792e3
TW		 2284 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2285 }
b481de9c 2286
5b9f8cd3 2287 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK		 2288 /* we are not ready, will run again when ready */
2289 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2290
b481de9c
ZY		 2291 mutex_unlock(&priv->mutex);
2292
e1623446 2293 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2294 return 0;
2295}
2296
2297/**
5b9f8cd3 2298 * iwl_mac_config - mac80211 config callback
b481de9c
ZY		 2299 *
2300 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2301 * be set inappropriately and the driver currently sets the hardware up to
2302 * use it whenever needed.
2303 */
5b9f8cd3 2304static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2305{
c79dd5b5 2306 struct iwl_priv *priv = hw->priv;
bf85ea4f 2307 const struct iwl_channel_info *ch_info;
e8975581 2308 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2309 unsigned long flags;
76bb77e0 2310 int ret = 0;
82a66bbb 2311 u16 channel;
b481de9c
ZY		 2312
2313 mutex_lock(&priv->mutex);
e1623446 2314 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n", conf->channel->hw_value);
b481de9c 2315
de27e64e 2316 priv->current_ht_config.is_ht = conf_is_ht(conf);
ae5eb026 2317
14a08a7f 2318 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
e1623446 2319 IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - waiting for uCode\n");
14a08a7f 2320 goto out;
64e72c3e
MA		 2321 }
2322
14a08a7f
EG		 2323 if (!conf->radio_enabled)
2324 iwl_radio_kill_sw_disable_radio(priv);
2325
fee1247a 2326 if (!iwl_is_ready(priv)) {
e1623446 2327 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY		 2328 ret = -EIO;
2329 goto out;
b481de9c
ZY		 2330 }
2331
1ea87396 2332 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2333 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 2334 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
b481de9c 2335 mutex_unlock(&priv->mutex);
a0646470 2336 return 0;
b481de9c
ZY		 2337 }
2338
82a66bbb
TW		 2339 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2340 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2341 if (!is_channel_valid(ch_info)) {
e1623446 2342 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
76bb77e0
ZY		 2343 ret = -EINVAL;
2344 goto out;
b481de9c
ZY		 2345 }
2346
05c914fe 2347 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76 2348 !is_channel_ibss(ch_info)) {
15b1687c 2349 IWL_ERR(priv, "channel %d in band %d not IBSS channel\n",
398f9e76
AK		 2350 conf->channel->hw_value, conf->channel->band);
2351 ret = -EINVAL;
2352 goto out;
2353 }
2354
82a66bbb
TW		 2355 spin_lock_irqsave(&priv->lock, flags);
2356
b5d7be5e 2357
78330fdd 2358 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 2359 * from any ht related info since 2.4 does not
2360 * support ht */
82a66bbb 2361 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY		 2362#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2363 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2364#endif
2365 )
2366 priv->staging_rxon.flags = 0;
b481de9c 2367
17e72782 2368 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2369
82a66bbb 2370 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY		 2371
2372 /* The list of supported rates and rate mask can be different
8318d78a 2373 * for each band; since the band may have changed, reset
b481de9c 2374 * the rate mask to what mac80211 lists */
5b9f8cd3 2375 iwl_set_rate(priv);
b481de9c
ZY		 2376
2377 spin_unlock_irqrestore(&priv->lock, flags);
2378
2379#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2380 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2381 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2382 goto out;
b481de9c
ZY		 2383 }
2384#endif
2385
b481de9c 2386 if (!conf->radio_enabled) {
e1623446 2387 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
76bb77e0 2388 goto out;
b481de9c
ZY		 2389 }
2390
fee1247a 2391 if (iwl_is_rfkill(priv)) {
e1623446 2392 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY		 2393 ret = -EIO;
2394 goto out;
b481de9c
ZY		 2395 }
2396
e602cb18
EK		 2397 if (conf->flags & IEEE80211_CONF_PS)
2398 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2399 else
2400 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2401 if (ret)
e1623446 2402 IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
e602cb18 2403
e1623446 2404 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
630fe9b6
TW		 2405 priv->tx_power_user_lmt, conf->power_level);
2406
2407 iwl_set_tx_power(priv, conf->power_level, false);
2408
5b9f8cd3 2409 iwl_set_rate(priv);
b481de9c 2410
7b841727
RF		 2411 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2412 iwl_set_rxon_chain(priv);
2413
b481de9c
ZY		 2414 if (memcmp(&priv->active_rxon,
2415 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2416 iwl_commit_rxon(priv);
b481de9c 2417 else
e1623446 2418 IWL_DEBUG_INFO(priv, "No re-sending same RXON configuration.\n");
b481de9c 2419
e1623446 2420 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 2421
a0646470 2422out:
5a66926a 2423 mutex_unlock(&priv->mutex);
76bb77e0 2424 return ret;
b481de9c
ZY		 2425}
2426
5b9f8cd3 2427static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2428{
857485c0 2429 int ret = 0;
1ff50bda 2430 unsigned long flags;
b481de9c 2431
d986bcd1 2432 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 2433 return;
2434
2435 /* The following should be done only at AP bring up */
3195c1f3 2436 if (!iwl_is_associated(priv)) {
b481de9c
ZY		 2437
2438 /* RXON - unassoc (to set timing command) */
2439 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2440 iwl_commit_rxon(priv);
b481de9c
ZY		 2441
2442 /* RXON Timing */
3195c1f3 2443 iwl_setup_rxon_timing(priv);
857485c0 2444 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2445 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2446 if (ret)
39aadf8c 2447 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY		 2448 "Attempting to continue.\n");
2449
c7de35cd 2450 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2451
2452 /* FIXME: what should be the assoc_id for AP? */
2453 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2454 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2455 priv->staging_rxon.flags |=
2456 RXON_FLG_SHORT_PREAMBLE_MSK;
2457 else
2458 priv->staging_rxon.flags &=
2459 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2460
2461 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2462 if (priv->assoc_capability &
2463 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2464 priv->staging_rxon.flags |=
2465 RXON_FLG_SHORT_SLOT_MSK;
2466 else
2467 priv->staging_rxon.flags &=
2468 ~RXON_FLG_SHORT_SLOT_MSK;
2469
05c914fe 2470 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2471 priv->staging_rxon.flags &=
2472 ~RXON_FLG_SHORT_SLOT_MSK;
2473 }
2474 /* restore RXON assoc */
2475 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2476 iwl_commit_rxon(priv);
1ff50bda
EG		 2477 spin_lock_irqsave(&priv->lock, flags);
2478 iwl_activate_qos(priv, 1);
2479 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2480 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2481 }
5b9f8cd3 2482 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2483
2484 /* FIXME - we need to add code here to detect a totally new
2485 * configuration, reset the AP, unassoc, rxon timing, assoc,
2486 * clear sta table, add BCAST sta... */
2487}
2488
9d139c81 2489
5b9f8cd3 2490static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2491 struct ieee80211_vif *vif,
b481de9c
ZY		 2492 struct ieee80211_if_conf *conf)
2493{
c79dd5b5 2494 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2495 int rc;
2496
2497 if (conf == NULL)
2498 return -EIO;
2499
b716bb91 2500 if (priv->vif != vif) {
e1623446 2501 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG		 2502 return 0;
2503 }
2504
05c914fe 2505 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB		 2506 conf->changed & IEEE80211_IFCC_BEACON) {
2507 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2508 if (!beacon)
2509 return -ENOMEM;
ada17513 2510 mutex_lock(&priv->mutex);
5b9f8cd3 2511 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2512 mutex_unlock(&priv->mutex);
9d139c81
JB		 2513 if (rc)
2514 return rc;
2515 }
2516
fee1247a 2517 if (!iwl_is_alive(priv))
5a66926a
ZY		 2518 return -EAGAIN;
2519
b481de9c
ZY		 2520 mutex_lock(&priv->mutex);
2521
b481de9c 2522 if (conf->bssid)
e1623446 2523 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 2524
4150c572
JB		 2525/*
2526 * very dubious code was here; the probe filtering flag is never set:
2527 *
b481de9c
ZY		 2528 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2529 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2530 */
b481de9c 2531
05c914fe 2532 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY		 2533 if (!conf->bssid) {
2534 conf->bssid = priv->mac_addr;
2535 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 2536 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 2537 conf->bssid);
b481de9c
ZY		 2538 }
2539 if (priv->ibss_beacon)
2540 dev_kfree_skb(priv->ibss_beacon);
2541
9d139c81 2542 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY		 2543 }
2544
fee1247a 2545 if (iwl_is_rfkill(priv))
fde3571f
MA		 2546 goto done;
2547
b481de9c
ZY		 2548 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2549 !is_multicast_ether_addr(conf->bssid)) {
2550 /* If there is currently a HW scan going on in the background
2551 * then we need to cancel it else the RXON below will fail. */
2a421b91 2552 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 2553 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 2554 "after 100ms\n");
e1623446 2555 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
b481de9c
ZY		 2556 mutex_unlock(&priv->mutex);
2557 return -EAGAIN;
2558 }
2559 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2560
2561 /* TODO: Audit driver for usage of these members and see
2562 * if mac80211 deprecates them (priv->bssid looks like it
2563 * shouldn't be there, but I haven't scanned the IBSS code
2564 * to verify) - jpk */
2565 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2566
05c914fe 2567 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2568 iwl_config_ap(priv);
b481de9c 2569 else {
5b9f8cd3 2570 rc = iwl_commit_rxon(priv);
05c914fe 2571 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2572 iwl_rxon_add_station(
b481de9c
ZY		 2573 priv, priv->active_rxon.bssid_addr, 1);
2574 }
2575
2576 } else {
2a421b91 2577 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2578 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2579 iwl_commit_rxon(priv);
b481de9c
ZY		 2580 }
2581
fde3571f 2582 done:
e1623446 2583 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2584 mutex_unlock(&priv->mutex);
2585
2586 return 0;
2587}
2588
5b9f8cd3 2589static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2590 struct ieee80211_if_init_conf *conf)
2591{
c79dd5b5 2592 struct iwl_priv *priv = hw->priv;
b481de9c 2593
e1623446 2594 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY		 2595
2596 mutex_lock(&priv->mutex);
948c171c 2597
fee1247a 2598 if (iwl_is_ready_rf(priv)) {
2a421b91 2599 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2600 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2601 iwl_commit_rxon(priv);
fde3571f 2602 }
32bfd35d
JB		 2603 if (priv->vif == conf->vif) {
2604 priv->vif = NULL;
b481de9c 2605 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY		 2606 }
2607 mutex_unlock(&priv->mutex);
2608
e1623446 2609 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2610
2611}
471b3efd 2612
3109ece1 2613#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2614static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB		 2615 struct ieee80211_vif *vif,
2616 struct ieee80211_bss_conf *bss_conf,
2617 u32 changes)
220173b0 2618{
c79dd5b5 2619 struct iwl_priv *priv = hw->priv;
220173b0 2620
e1623446 2621 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
3109ece1 2622
471b3efd 2623 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 2624 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
3109ece1 2625 bss_conf->use_short_preamble);
471b3efd 2626 if (bss_conf->use_short_preamble)
220173b0
TW		 2627 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2628 else
2629 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2630 }
2631
471b3efd 2632 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446 2633 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2634 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 2635 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2636 else
2637 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2638 }
2639
98952d5d 2640 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2641 iwl_ht_conf(priv, bss_conf);
c7de35cd 2642 iwl_set_rxon_chain(priv);
98952d5d
TW		 2643 }
2644
471b3efd 2645 if (changes & BSS_CHANGED_ASSOC) {
e1623446 2646 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 2647 /* This should never happen as this function should
2648 * never be called from interrupt context. */
2649 if (WARN_ON_ONCE(in_interrupt()))
2650 return;
3109ece1
TW		 2651 if (bss_conf->assoc) {
2652 priv->assoc_id = bss_conf->aid;
2653 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2654 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW		 2655 priv->timestamp = bss_conf->timestamp;
2656 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW		 2657
2658 /* we have just associated, don't start scan too early
2659 * leave time for EAPOL exchange to complete
2660 */
3109ece1
TW		 2661 priv->next_scan_jiffies = jiffies +
2662 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2663 mutex_lock(&priv->mutex);
5b9f8cd3 2664 iwl_post_associate(priv);
508e32e1 2665 mutex_unlock(&priv->mutex);
3109ece1
TW		 2666 } else {
2667 priv->assoc_id = 0;
e1623446 2668 IWL_DEBUG_MAC80211(priv, "DISASSOC %d\n", bss_conf->assoc);
3109ece1
TW		 2669 }
2670 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446 2671 IWL_DEBUG_MAC80211(priv, "Associated Changes %d\n", changes);
7e8c519e 2672 iwl_send_rxon_assoc(priv);
471b3efd
JB		 2673 }
2674
220173b0 2675}
b481de9c 2676
2a519311
JB		 2677static int iwl_mac_hw_scan(struct ieee80211_hw *hw,
2678 struct cfg80211_scan_request *req)
b481de9c 2679{
b481de9c 2680 unsigned long flags;
c79dd5b5 2681 struct iwl_priv *priv = hw->priv;
8d09a5e1 2682 int ret;
2a519311
JB		 2683 u8 *ssid = NULL;
2684 size_t ssid_len = 0;
2685
2686 if (req->n_ssids) {
2687 ssid = req->ssids[0].ssid;
2688 ssid_len = req->ssids[0].ssid_len;
2689 }
b481de9c 2690
e1623446 2691 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2692
052c4b9f 2693 mutex_lock(&priv->mutex);
b481de9c
ZY		 2694 spin_lock_irqsave(&priv->lock, flags);
2695
fee1247a 2696 if (!iwl_is_ready_rf(priv)) {
cb43dc25 2697 ret = -EIO;
e1623446 2698 IWL_DEBUG_MAC80211(priv, "leave - not ready or exit pending\n");
b481de9c
ZY		 2699 goto out_unlock;
2700 }
2701
8d09a5e1
TW		 2702 /* We don't schedule scan within next_scan_jiffies period.
2703 * Avoid scanning during possible EAPOL exchange, return
2704 * success immediately.
2705 */
7878a5a4 2706 if (priv->next_scan_jiffies &&
cb43dc25 2707 time_after(priv->next_scan_jiffies, jiffies)) {
e1623446 2708 IWL_DEBUG_SCAN(priv, "scan rejected: within next scan period\n");
8d09a5e1
TW		 2709 queue_work(priv->workqueue, &priv->scan_completed);
2710 ret = 0;
7878a5a4
MA		 2711 goto out_unlock;
2712 }
8d09a5e1 2713
b481de9c 2714 /* if we just finished scan ask for delay */
681c0050 2715 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 2716 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
e1623446 2717 IWL_DEBUG_SCAN(priv, "scan rejected: within previous scan period\n");
8d09a5e1
TW		 2718 queue_work(priv->workqueue, &priv->scan_completed);
2719 ret = 0;
b481de9c
ZY		 2720 goto out_unlock;
2721 }
8d09a5e1 2722
cb43dc25 2723 if (ssid_len) {
b481de9c 2724 priv->one_direct_scan = 1;
2a519311 2725 priv->direct_ssid_len = ssid_len;
b481de9c 2726 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 2727 } else {
948c171c 2728 priv->one_direct_scan = 0;
cb43dc25 2729 }
b481de9c 2730
cb43dc25 2731 ret = iwl_scan_initiate(priv);
b481de9c 2732
e1623446 2733 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2734
2735out_unlock:
2736 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 2737 mutex_unlock(&priv->mutex);
b481de9c 2738
cb43dc25 2739 return ret;
b481de9c
ZY		 2740}
2741
5b9f8cd3 2742static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG		 2743 struct ieee80211_key_conf *keyconf, const u8 *addr,
2744 u32 iv32, u16 *phase1key)
2745{
ab885f8c 2746
9f58671e 2747 struct iwl_priv *priv = hw->priv;
e1623446 2748 IWL_DEBUG_MAC80211(priv, "enter\n");
ab885f8c 2749
9f58671e 2750 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c 2751
e1623446 2752 IWL_DEBUG_MAC80211(priv, "leave\n");
ab885f8c
EG		 2753}
2754
5b9f8cd3 2755static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB		 2756 struct ieee80211_vif *vif,
2757 struct ieee80211_sta *sta,
b481de9c
ZY		 2758 struct ieee80211_key_conf *key)
2759{
c79dd5b5 2760 struct iwl_priv *priv = hw->priv;
42986796
WT		 2761 const u8 *addr;
2762 int ret;
2763 u8 sta_id;
2764 bool is_default_wep_key = false;
b481de9c 2765
e1623446 2766 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2767
099b40b7 2768 if (priv->hw_params.sw_crypto) {
e1623446 2769 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY		 2770 return -EOPNOTSUPP;
2771 }
42986796 2772 addr = sta ? sta->addr : iwl_bcast_addr;
947b13a7 2773 sta_id = iwl_find_station(priv, addr);
6974e363 2774 if (sta_id == IWL_INVALID_STATION) {
e1623446 2775 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
e174961c 2776 addr);
6974e363 2777 return -EINVAL;
b481de9c 2778
deb09c43 2779 }
b481de9c 2780
6974e363 2781 mutex_lock(&priv->mutex);
2a421b91 2782 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG		 2783 mutex_unlock(&priv->mutex);
2784
2785 /* If we are getting WEP group key and we didn't receive any key mapping
2786 * so far, we are in legacy wep mode (group key only), otherwise we are
2787 * in 1X mode.
2788 * In legacy wep mode, we use another host command to the uCode */
5425e490 2789 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 2790 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG		 2791 if (cmd == SET_KEY)
2792 is_default_wep_key = !priv->key_mapping_key;
2793 else
ccc038ab
EG		 2794 is_default_wep_key =
2795 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 2796 }
052c4b9f 2797
b481de9c 2798 switch (cmd) {
deb09c43 2799 case SET_KEY:
6974e363
EG		 2800 if (is_default_wep_key)
2801 ret = iwl_set_default_wep_key(priv, key);
deb09c43 2802 else
7480513f 2803 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43 2804
e1623446 2805 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY		 2806 break;
2807 case DISABLE_KEY:
6974e363
EG		 2808 if (is_default_wep_key)
2809 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 2810 else
3ec47732 2811 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43 2812
e1623446 2813 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY		 2814 break;
2815 default:
deb09c43 2816 ret = -EINVAL;
b481de9c
ZY		 2817 }
2818
e1623446 2819 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 2820
deb09c43 2821 return ret;
b481de9c
ZY		 2822}
2823
5b9f8cd3 2824static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY		 2825 const struct ieee80211_tx_queue_params *params)
2826{
c79dd5b5 2827 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2828 unsigned long flags;
2829 int q;
b481de9c 2830
e1623446 2831 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2832
fee1247a 2833 if (!iwl_is_ready_rf(priv)) {
e1623446 2834 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY		 2835 return -EIO;
2836 }
2837
2838 if (queue >= AC_NUM) {
e1623446 2839 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY		 2840 return 0;
2841 }
2842
b481de9c
ZY		 2843 q = AC_NUM - 1 - queue;
2844
2845 spin_lock_irqsave(&priv->lock, flags);
2846
2847 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2848 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2849 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2850 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 2851 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 2852
2853 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2854 priv->qos_data.qos_active = 1;
2855
05c914fe 2856 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 2857 iwl_activate_qos(priv, 1);
3109ece1 2858 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 2859 iwl_activate_qos(priv, 0);
b481de9c 2860
1ff50bda 2861 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 2862
e1623446 2863 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2864 return 0;
2865}
2866
5b9f8cd3 2867static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 2868 enum ieee80211_ampdu_mlme_action action,
17741cdc 2869 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW		 2870{
2871 struct iwl_priv *priv = hw->priv;
d783b061 2872
e1623446 2873 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
e174961c 2874 sta->addr, tid);
d783b061
TW		 2875
2876 if (!(priv->cfg->sku & IWL_SKU_N))
2877 return -EACCES;
2878
2879 switch (action) {
2880 case IEEE80211_AMPDU_RX_START:
e1623446 2881 IWL_DEBUG_HT(priv, "start Rx\n");
9f58671e 2882 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061 2883 case IEEE80211_AMPDU_RX_STOP:
e1623446 2884 IWL_DEBUG_HT(priv, "stop Rx\n");
9f58671e 2885 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061 2886 case IEEE80211_AMPDU_TX_START:
e1623446 2887 IWL_DEBUG_HT(priv, "start Tx\n");
17741cdc 2888 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061 2889 case IEEE80211_AMPDU_TX_STOP:
e1623446 2890 IWL_DEBUG_HT(priv, "stop Tx\n");
17741cdc 2891 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061 2892 default:
e1623446 2893 IWL_DEBUG_HT(priv, "unknown\n");
d783b061
TW		 2894 return -EINVAL;
2895 break;
2896 }
2897 return 0;
2898}
9f58671e 2899
5b9f8cd3 2900static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 2901 struct ieee80211_tx_queue_stats *stats)
2902{
c79dd5b5 2903 struct iwl_priv *priv = hw->priv;
b481de9c 2904 int i, avail;
16466903 2905 struct iwl_tx_queue *txq;
443cfd45 2906 struct iwl_queue *q;
b481de9c
ZY		 2907 unsigned long flags;
2908
e1623446 2909 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2910
fee1247a 2911 if (!iwl_is_ready_rf(priv)) {
e1623446 2912 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY		 2913 return -EIO;
2914 }
2915
2916 spin_lock_irqsave(&priv->lock, flags);
2917
2918 for (i = 0; i < AC_NUM; i++) {
2919 txq = &priv->txq[i];
2920 q = &txq->q;
443cfd45 2921 avail = iwl_queue_space(q);
b481de9c 2922
57ffc589
JB		 2923 stats[i].len = q->n_window - avail;
2924 stats[i].limit = q->n_window - q->high_mark;
2925 stats[i].count = q->n_window;
b481de9c
ZY		 2926
2927 }
2928 spin_unlock_irqrestore(&priv->lock, flags);
2929
e1623446 2930 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2931
2932 return 0;
2933}
2934
5b9f8cd3 2935static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 2936 struct ieee80211_low_level_stats *stats)
2937{
bf403db8
EK		 2938 struct iwl_priv *priv = hw->priv;
2939
2940 priv = hw->priv;
e1623446
TW		 2941 IWL_DEBUG_MAC80211(priv, "enter\n");
2942 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 2943
2944 return 0;
2945}
2946
5b9f8cd3 2947static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 2948{
c79dd5b5 2949 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2950 unsigned long flags;
2951
2952 mutex_lock(&priv->mutex);
e1623446 2953 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 2954
b481de9c 2955 spin_lock_irqsave(&priv->lock, flags);
fd105e79 2956 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 2957 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 2958
c7de35cd 2959 iwl_reset_qos(priv);
b481de9c 2960
b481de9c
ZY		 2961 spin_lock_irqsave(&priv->lock, flags);
2962 priv->assoc_id = 0;
2963 priv->assoc_capability = 0;
b481de9c
ZY		 2964 priv->assoc_station_added = 0;
2965
2966 /* new association get rid of ibss beacon skb */
2967 if (priv->ibss_beacon)
2968 dev_kfree_skb(priv->ibss_beacon);
2969
2970 priv->ibss_beacon = NULL;
2971
2972 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 2973 priv->timestamp = 0;
05c914fe 2974 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY		 2975 priv->beacon_int = 0;
2976
2977 spin_unlock_irqrestore(&priv->lock, flags);
2978
fee1247a 2979 if (!iwl_is_ready_rf(priv)) {
e1623446 2980 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA		 2981 mutex_unlock(&priv->mutex);
2982 return;
2983 }
2984
052c4b9f 2985 /* we are restarting association process
2986 * clear RXON_FILTER_ASSOC_MSK bit
2987 */
05c914fe 2988 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 2989 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 2990 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2991 iwl_commit_rxon(priv);
052c4b9f 2992 }
2993
5da4b55f
MA		 2994 iwl_power_update_mode(priv, 0);
2995
b481de9c 2996 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 2997 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 2998
c90a74ba
EG		 2999 /* switch to CAM during association period.
3000 * the ucode will block any association/authentication
3001 * frome during assiciation period if it can not hear
3002 * the AP because of PM. the timer enable PM back is
3003 * association do not complete
3004 */
3005 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3006 IEEE80211_CHAN_RADAR))
3007 iwl_power_disable_management(priv, 3000);
3008
e1623446 3009 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY		 3010 mutex_unlock(&priv->mutex);
3011 return;
3012 }
3013
5b9f8cd3 3014 iwl_set_rate(priv);
b481de9c
ZY		 3015
3016 mutex_unlock(&priv->mutex);
3017
e1623446 3018 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 3019}
3020
5b9f8cd3 3021static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3022{
c79dd5b5 3023 struct iwl_priv *priv = hw->priv;
b481de9c 3024 unsigned long flags;
2ff75b78 3025 __le64 timestamp;
b481de9c 3026
e1623446 3027 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3028
fee1247a 3029 if (!iwl_is_ready_rf(priv)) {
e1623446 3030 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY		 3031 return -EIO;
3032 }
3033
05c914fe 3034 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 3035 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY		 3036 return -EIO;
3037 }
3038
3039 spin_lock_irqsave(&priv->lock, flags);
3040
3041 if (priv->ibss_beacon)
3042 dev_kfree_skb(priv->ibss_beacon);
3043
3044 priv->ibss_beacon = skb;
3045
3046 priv->assoc_id = 0;
2ff75b78 3047 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3048 priv->timestamp = le64_to_cpu(timestamp);
b481de9c 3049
e1623446 3050 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY		 3051 spin_unlock_irqrestore(&priv->lock, flags);
3052
c7de35cd 3053 iwl_reset_qos(priv);
b481de9c 3054
5b9f8cd3 3055 iwl_post_associate(priv);
b481de9c 3056
b481de9c
ZY		 3057
3058 return 0;
3059}
3060
b481de9c
ZY		 3061/*****************************************************************************
3062 *
3063 * sysfs attributes
3064 *
3065 *****************************************************************************/
3066
0a6857e7 3067#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 3068
3069/*
3070 * The following adds a new attribute to the sysfs representation
c3a739fa 3071 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
b481de9c
ZY		 3072 * used for controlling the debug level.
3073 *
3074 * See the level definitions in iwl for details.
3075 */
3076
8cf769c6
EK		 3077static ssize_t show_debug_level(struct device *d,
3078 struct device_attribute *attr, char *buf)
b481de9c 3079{
8cf769c6
EK		 3080 struct iwl_priv *priv = d->driver_data;
3081
3082 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3083}
8cf769c6
EK		 3084static ssize_t store_debug_level(struct device *d,
3085 struct device_attribute *attr,
b481de9c
ZY		 3086 const char *buf, size_t count)
3087{
8cf769c6 3088 struct iwl_priv *priv = d->driver_data;
9257746f
TW		 3089 unsigned long val;
3090 int ret;
b481de9c 3091
9257746f
TW		 3092 ret = strict_strtoul(buf, 0, &val);
3093 if (ret)
978785a3 3094 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 3095 else
8cf769c6 3096 priv->debug_level = val;
b481de9c
ZY		 3097
3098 return strnlen(buf, count);
3099}
3100
8cf769c6
EK		 3101static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3102 show_debug_level, store_debug_level);
3103
b481de9c 3104
0a6857e7 3105#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3106
b481de9c 3107
bc6f59bc
TW		 3108static ssize_t show_version(struct device *d,
3109 struct device_attribute *attr, char *buf)
3110{
3111 struct iwl_priv *priv = d->driver_data;
885ba202 3112 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW		 3113 ssize_t pos = 0;
3114 u16 eeprom_ver;
bc6f59bc
TW		 3115
3116 if (palive->is_valid)
f236a265
TW		 3117 pos += sprintf(buf + pos,
3118 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3119 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW		 3120 palive->ucode_major, palive->ucode_minor,
3121 palive->sw_rev[0], palive->sw_rev[1],
3122 palive->ver_type, palive->ver_subtype);
bc6f59bc 3123 else
f236a265
TW		 3124 pos += sprintf(buf + pos, "fw not loaded\n");
3125
3126 if (priv->eeprom) {
3127 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3128 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3129 eeprom_ver);
3130 } else {
3131 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3132 }
3133
3134 return pos;
bc6f59bc
TW		 3135}
3136
3137static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3138
b481de9c
ZY		 3139static ssize_t show_temperature(struct device *d,
3140 struct device_attribute *attr, char *buf)
3141{
c79dd5b5 3142 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3143
fee1247a 3144 if (!iwl_is_alive(priv))
b481de9c
ZY		 3145 return -EAGAIN;
3146
91dbc5bd 3147 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY		 3148}
3149
3150static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3151
b481de9c
ZY		 3152static ssize_t show_tx_power(struct device *d,
3153 struct device_attribute *attr, char *buf)
3154{
c79dd5b5 3155 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
91f39e8e
JS		 3156
3157 if (!iwl_is_ready_rf(priv))
3158 return sprintf(buf, "off\n");
3159 else
3160 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY		 3161}
3162
3163static ssize_t store_tx_power(struct device *d,
3164 struct device_attribute *attr,
3165 const char *buf, size_t count)
3166{
c79dd5b5 3167 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3168 unsigned long val;
3169 int ret;
b481de9c 3170
9257746f
TW		 3171 ret = strict_strtoul(buf, 10, &val);
3172 if (ret)
978785a3 3173 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
b481de9c 3174 else
630fe9b6 3175 iwl_set_tx_power(priv, val, false);
b481de9c
ZY		 3176
3177 return count;
3178}
3179
3180static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3181
3182static ssize_t show_flags(struct device *d,
3183 struct device_attribute *attr, char *buf)
3184{
c79dd5b5 3185 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3186
3187 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3188}
3189
3190static ssize_t store_flags(struct device *d,
3191 struct device_attribute *attr,
3192 const char *buf, size_t count)
3193{
c79dd5b5 3194 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3195 unsigned long val;
3196 u32 flags;
3197 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3198 if (ret)
9257746f
TW		 3199 return ret;
3200 flags = (u32)val;
b481de9c
ZY		 3201
3202 mutex_lock(&priv->mutex);
3203 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3204 /* Cancel any currently running scans... */
2a421b91 3205 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3206 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3207 else {
e1623446 3208 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3209 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3210 iwl_commit_rxon(priv);
b481de9c
ZY		 3211 }
3212 }
3213 mutex_unlock(&priv->mutex);
3214
3215 return count;
3216}
3217
3218static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3219
3220static ssize_t show_filter_flags(struct device *d,
3221 struct device_attribute *attr, char *buf)
3222{
c79dd5b5 3223 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3224
3225 return sprintf(buf, "0x%04X\n",
3226 le32_to_cpu(priv->active_rxon.filter_flags));
3227}
3228
3229static ssize_t store_filter_flags(struct device *d,
3230 struct device_attribute *attr,
3231 const char *buf, size_t count)
3232{
c79dd5b5 3233 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3234 unsigned long val;
3235 u32 filter_flags;
3236 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3237 if (ret)
9257746f
TW		 3238 return ret;
3239 filter_flags = (u32)val;
b481de9c
ZY		 3240
3241 mutex_lock(&priv->mutex);
3242 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3243 /* Cancel any currently running scans... */
2a421b91 3244 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3245 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3246 else {
e1623446 3247 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c
ZY		 3248 "0x%04X\n", filter_flags);
3249 priv->staging_rxon.filter_flags =
3250 cpu_to_le32(filter_flags);
5b9f8cd3 3251 iwl_commit_rxon(priv);
b481de9c
ZY		 3252 }
3253 }
3254 mutex_unlock(&priv->mutex);
3255
3256 return count;
3257}
3258
3259static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3260 store_filter_flags);
3261
b481de9c
ZY		 3262static ssize_t store_power_level(struct device *d,
3263 struct device_attribute *attr,
3264 const char *buf, size_t count)
3265{
c79dd5b5 3266 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3267 int ret;
9257746f
TW		 3268 unsigned long mode;
3269
b481de9c 3270
b481de9c
ZY		 3271 mutex_lock(&priv->mutex);
3272
fee1247a 3273 if (!iwl_is_ready(priv)) {
298df1f6 3274 ret = -EAGAIN;
b481de9c
ZY		 3275 goto out;
3276 }
3277
9257746f 3278 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3279 if (ret)
9257746f
TW		 3280 goto out;
3281
298df1f6
EK		 3282 ret = iwl_power_set_user_mode(priv, mode);
3283 if (ret) {
e1623446 3284 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
5da4b55f 3285 goto out;
b481de9c 3286 }
298df1f6 3287 ret = count;
b481de9c
ZY		 3288
3289 out:
3290 mutex_unlock(&priv->mutex);
298df1f6 3291 return ret;
b481de9c
ZY		 3292}
3293
b481de9c
ZY		 3294static ssize_t show_power_level(struct device *d,
3295 struct device_attribute *attr, char *buf)
3296{
c79dd5b5 3297 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK		 3298 int mode = priv->power_data.user_power_setting;
3299 int system = priv->power_data.system_power_setting;
5da4b55f 3300 int level = priv->power_data.power_mode;
b481de9c
ZY		 3301 char *p = buf;
3302
298df1f6
EK		 3303 switch (system) {
3304 case IWL_POWER_SYS_AUTO:
3305 p += sprintf(p, "SYSTEM:auto");
b481de9c 3306 break;
298df1f6
EK		 3307 case IWL_POWER_SYS_AC:
3308 p += sprintf(p, "SYSTEM:ac");
3309 break;
3310 case IWL_POWER_SYS_BATTERY:
3311 p += sprintf(p, "SYSTEM:battery");
b481de9c 3312 break;
b481de9c 3313 }
298df1f6 3314
c3056065
AK		 3315 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3316 "fixed" : "auto");
298df1f6
EK		 3317 p += sprintf(p, "\tINDEX:%d", level);
3318 p += sprintf(p, "\n");
3ac7f146 3319 return p - buf + 1;
b481de9c
ZY		 3320}
3321
3322static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3323 store_power_level);
3324
b481de9c
ZY		 3325
3326static ssize_t show_statistics(struct device *d,
3327 struct device_attribute *attr, char *buf)
3328{
c79dd5b5 3329 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3330 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3331 u32 len = 0, ofs = 0;
3ac7f146 3332 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY		 3333 int rc = 0;
3334
fee1247a 3335 if (!iwl_is_alive(priv))
b481de9c
ZY		 3336 return -EAGAIN;
3337
3338 mutex_lock(&priv->mutex);
49ea8596 3339 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 3340 mutex_unlock(&priv->mutex);
3341
3342 if (rc) {
3343 len = sprintf(buf,
3344 "Error sending statistics request: 0x%08X\n", rc);
3345 return len;
3346 }
3347
3348 while (size && (PAGE_SIZE - len)) {
3349 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3350 PAGE_SIZE - len, 1);
3351 len = strlen(buf);
3352 if (PAGE_SIZE - len)
3353 buf[len++] = '\n';
3354
3355 ofs += 16;
3356 size -= min(size, 16U);
3357 }
3358
3359 return len;
3360}
3361
3362static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3363
b481de9c 3364
b481de9c
ZY		 3365/*****************************************************************************
3366 *
3367 * driver setup and teardown
3368 *
3369 *****************************************************************************/
3370
4e39317d 3371static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 3372{
3373 priv->workqueue = create_workqueue(DRV_NAME);
3374
3375 init_waitqueue_head(&priv->wait_command_queue);
3376
5b9f8cd3
EG		 3377 INIT_WORK(&priv->up, iwl_bg_up);
3378 INIT_WORK(&priv->restart, iwl_bg_restart);
3379 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3380 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3381 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3382 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW		 3383 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3384 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3385
2a421b91 3386 iwl_setup_scan_deferred_work(priv);
c90a74ba 3387 iwl_setup_power_deferred_work(priv);
bb8c093b 3388
4e39317d
EG		 3389 if (priv->cfg->ops->lib->setup_deferred_work)
3390 priv->cfg->ops->lib->setup_deferred_work(priv);
3391
3392 init_timer(&priv->statistics_periodic);
3393 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3394 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY		 3395
3396 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3397 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 3398}
3399
4e39317d 3400static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3401{
4e39317d
EG		 3402 if (priv->cfg->ops->lib->cancel_deferred_work)
3403 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3404
3ae6a054 3405 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3406 cancel_delayed_work(&priv->scan_check);
c90a74ba 3407 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3408 cancel_delayed_work(&priv->alive_start);
b481de9c 3409 cancel_work_sync(&priv->beacon_update);
4e39317d 3410 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY		 3411}
3412
5b9f8cd3 3413static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY		 3414 &dev_attr_flags.attr,
3415 &dev_attr_filter_flags.attr,
b481de9c 3416 &dev_attr_power_level.attr,
b481de9c 3417 &dev_attr_statistics.attr,
b481de9c 3418 &dev_attr_temperature.attr,
b481de9c 3419 &dev_attr_tx_power.attr,
8cf769c6
EK		 3420#ifdef CONFIG_IWLWIFI_DEBUG
3421 &dev_attr_debug_level.attr,
3422#endif
bc6f59bc 3423 &dev_attr_version.attr,
b481de9c
ZY		 3424
3425 NULL
3426};
3427
5b9f8cd3 3428static struct attribute_group iwl_attribute_group = {
b481de9c 3429 .name = NULL, /* put in device directory */
5b9f8cd3 3430 .attrs = iwl_sysfs_entries,
b481de9c
ZY		 3431};
3432
5b9f8cd3
EG		 3433static struct ieee80211_ops iwl_hw_ops = {
3434 .tx = iwl_mac_tx,
3435 .start = iwl_mac_start,
3436 .stop = iwl_mac_stop,
3437 .add_interface = iwl_mac_add_interface,
3438 .remove_interface = iwl_mac_remove_interface,
3439 .config = iwl_mac_config,
3440 .config_interface = iwl_mac_config_interface,
3441 .configure_filter = iwl_configure_filter,
3442 .set_key = iwl_mac_set_key,
3443 .update_tkip_key = iwl_mac_update_tkip_key,
3444 .get_stats = iwl_mac_get_stats,
3445 .get_tx_stats = iwl_mac_get_tx_stats,
3446 .conf_tx = iwl_mac_conf_tx,
3447 .reset_tsf = iwl_mac_reset_tsf,
3448 .bss_info_changed = iwl_bss_info_changed,
3449 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3450 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY		 3451};
3452
5b9f8cd3 3453static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 3454{
3455 int err = 0;
c79dd5b5 3456 struct iwl_priv *priv;
b481de9c 3457 struct ieee80211_hw *hw;
82b9a121 3458 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3459 unsigned long flags;
6cd0b1cb 3460 u16 pci_cmd;
b481de9c 3461
316c30d9
AK		 3462 /************************
3463 * 1. Allocating HW data
3464 ************************/
3465
6440adb5
CB		 3466 /* Disabling hardware scan means that mac80211 will perform scans
3467 * "the hard way", rather than using device's scan. */
1ea87396 3468 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK		 3469 if (cfg->mod_params->debug & IWL_DL_INFO)
3470 dev_printk(KERN_DEBUG, &(pdev->dev),
3471 "Disabling hw_scan\n");
5b9f8cd3 3472 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY		 3473 }
3474
5b9f8cd3 3475 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3476 if (!hw) {
b481de9c
ZY		 3477 err = -ENOMEM;
3478 goto out;
3479 }
1d0a082d
AK		 3480 priv = hw->priv;
3481 /* At this point both hw and priv are allocated. */
3482
b481de9c
ZY		 3483 SET_IEEE80211_DEV(hw, &pdev->dev);
3484
e1623446 3485 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
82b9a121 3486 priv->cfg = cfg;
b481de9c 3487 priv->pci_dev = pdev;
316c30d9 3488
0a6857e7 3489#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3490 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 3491 atomic_set(&priv->restrict_refcnt, 0);
3492#endif
b481de9c 3493
316c30d9
AK		 3494 /**************************
3495 * 2. Initializing PCI bus
3496 **************************/
3497 if (pci_enable_device(pdev)) {
3498 err = -ENODEV;
3499 goto out_ieee80211_free_hw;
3500 }
3501
3502 pci_set_master(pdev);
3503
093d874c 3504 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3505 if (!err)
093d874c 3506 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3507 if (err) {
093d874c 3508 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3509 if (!err)
093d874c 3510 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3511 /* both attempts failed: */
316c30d9 3512 if (err) {
978785a3 3513 IWL_WARN(priv, "No suitable DMA available.\n");
316c30d9 3514 goto out_pci_disable_device;
cc2a8ea8 3515 }
316c30d9
AK		 3516 }
3517
3518 err = pci_request_regions(pdev, DRV_NAME);
3519 if (err)
3520 goto out_pci_disable_device;
3521
3522 pci_set_drvdata(pdev, priv);
3523
316c30d9
AK		 3524
3525 /***********************
3526 * 3. Read REV register
3527 ***********************/
3528 priv->hw_base = pci_iomap(pdev, 0, 0);
3529 if (!priv->hw_base) {
3530 err = -ENODEV;
3531 goto out_pci_release_regions;
3532 }
3533
e1623446 3534 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
316c30d9 3535 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 3536 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
316c30d9 3537
b661c819 3538 iwl_hw_detect(priv);
978785a3 3539 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
b661c819 3540 priv->cfg->name, priv->hw_rev);
316c30d9 3541
e7b63581
TW		 3542 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3543 * PCI Tx retries from interfering with C3 CPU state */
3544 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3545
91238714
TW		 3546 /* amp init */
3547 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3548 if (err < 0) {
e1623446 3549 IWL_DEBUG_INFO(priv, "Failed to init APMG\n");
316c30d9
AK		 3550 goto out_iounmap;
3551 }
91238714
TW		 3552 /*****************
3553 * 4. Read EEPROM
3554 *****************/
316c30d9
AK		 3555 /* Read the EEPROM */
3556 err = iwl_eeprom_init(priv);
3557 if (err) {
15b1687c 3558 IWL_ERR(priv, "Unable to init EEPROM\n");
316c30d9
AK		 3559 goto out_iounmap;
3560 }
8614f360
TW		 3561 err = iwl_eeprom_check_version(priv);
3562 if (err)
3563 goto out_iounmap;
3564
02883017 3565 /* extract MAC Address */
316c30d9 3566 iwl_eeprom_get_mac(priv, priv->mac_addr);
e1623446 3567 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
316c30d9
AK		 3568 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3569
3570 /************************
3571 * 5. Setup HW constants
3572 ************************/
da154e30 3573 if (iwl_set_hw_params(priv)) {
15b1687c 3574 IWL_ERR(priv, "failed to set hw parameters\n");
073d3f5f 3575 goto out_free_eeprom;
316c30d9
AK		 3576 }
3577
3578 /*******************
6ba87956 3579 * 6. Setup priv
316c30d9 3580 *******************/
b481de9c 3581
6ba87956 3582 err = iwl_init_drv(priv);
bf85ea4f 3583 if (err)
399f4900 3584 goto out_free_eeprom;
bf85ea4f 3585 /* At this point both hw and priv are initialized. */
316c30d9
AK		 3586
3587 /**********************************
3588 * 7. Initialize module parameters
3589 **********************************/
3590
3591 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3592 if (priv->cfg->mod_params->disable) {
316c30d9 3593 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 3594 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
316c30d9
AK		 3595 }
3596
316c30d9
AK		 3597 /********************
3598 * 8. Setup services
3599 ********************/
0359facc 3600 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3601 iwl_disable_interrupts(priv);
0359facc 3602 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3603
6cd0b1cb
HS		 3604 pci_enable_msi(priv->pci_dev);
3605
3606 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
3607 DRV_NAME, priv);
3608 if (err) {
3609 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3610 goto out_disable_msi;
3611 }
5b9f8cd3 3612 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9 3613 if (err) {
15b1687c 3614 IWL_ERR(priv, "failed to create sysfs device attributes\n");
6ba87956 3615 goto out_uninit_drv;
316c30d9
AK		 3616 }
3617
4e39317d 3618 iwl_setup_deferred_work(priv);
653fa4a0 3619 iwl_setup_rx_handlers(priv);
316c30d9 3620
6ba87956 3621 /**********************************
6cd0b1cb 3622 * 9. Setup and register mac80211
6ba87956
TW		 3623 **********************************/
3624
6cd0b1cb
HS		 3625 /* enable interrupts if needed: hw bug w/a */
3626 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3627 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3628 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3629 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3630 }
3631
3632 iwl_enable_interrupts(priv);
3633
6ba87956
TW		 3634 err = iwl_setup_mac(priv);
3635 if (err)
3636 goto out_remove_sysfs;
3637
3638 err = iwl_dbgfs_register(priv, DRV_NAME);
3639 if (err)
15b1687c 3640 IWL_ERR(priv, "failed to create debugfs files\n");
6ba87956 3641
6cd0b1cb
HS		 3642 /* If platform's RF_KILL switch is NOT set to KILL */
3643 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3644 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3645 else
3646 set_bit(STATUS_RF_KILL_HW, &priv->status);
6ba87956 3647
58d0f361
EG		 3648 err = iwl_rfkill_init(priv);
3649 if (err)
15b1687c 3650 IWL_ERR(priv, "Unable to initialize RFKILL system. "
58d0f361 3651 "Ignoring error: %d\n", err);
6cd0b1cb
HS		 3652 else
3653 iwl_rfkill_set_hw_state(priv);
3654
58d0f361 3655 iwl_power_initialize(priv);
b481de9c
ZY		 3656 return 0;
3657
316c30d9 3658 out_remove_sysfs:
5b9f8cd3 3659 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
6cd0b1cb
HS		 3660 out_disable_msi:
3661 pci_disable_msi(priv->pci_dev);
3662 pci_disable_device(priv->pci_dev);
6ba87956
TW		 3663 out_uninit_drv:
3664 iwl_uninit_drv(priv);
073d3f5f
TW		 3665 out_free_eeprom:
3666 iwl_eeprom_free(priv);
b481de9c
ZY		 3667 out_iounmap:
3668 pci_iounmap(pdev, priv->hw_base);
3669 out_pci_release_regions:
3670 pci_release_regions(pdev);
316c30d9 3671 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 3672 out_pci_disable_device:
3673 pci_disable_device(pdev);
b481de9c
ZY		 3674 out_ieee80211_free_hw:
3675 ieee80211_free_hw(priv->hw);
3676 out:
3677 return err;
3678}
3679
5b9f8cd3 3680static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3681{
c79dd5b5 3682 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3683 unsigned long flags;
b481de9c
ZY		 3684
3685 if (!priv)
3686 return;
3687
e1623446 3688 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 3689
67249625 3690 iwl_dbgfs_unregister(priv);
5b9f8cd3 3691 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3692
5b9f8cd3
EG		 3693 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3694 * to be called and iwl_down since we are removing the device
0b124c31
GG		 3695 * we need to set STATUS_EXIT_PENDING bit.
3696 */
3697 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR		 3698 if (priv->mac80211_registered) {
3699 ieee80211_unregister_hw(priv->hw);
3700 priv->mac80211_registered = 0;
0b124c31 3701 } else {
5b9f8cd3 3702 iwl_down(priv);
c4f55232
RR		 3703 }
3704
0359facc
MA		 3705 /* make sure we flush any pending irq or
3706 * tasklet for the driver
3707 */
3708 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3709 iwl_disable_interrupts(priv);
0359facc
MA		 3710 spin_unlock_irqrestore(&priv->lock, flags);
3711
3712 iwl_synchronize_irq(priv);
3713
58d0f361 3714 iwl_rfkill_unregister(priv);
5b9f8cd3 3715 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 3716
3717 if (priv->rxq.bd)
a55360e4 3718 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 3719 iwl_hw_txq_ctx_free(priv);
b481de9c 3720
37deb2a0 3721 iwl_clear_stations_table(priv);
073d3f5f 3722 iwl_eeprom_free(priv);
b481de9c 3723
b481de9c 3724
948c171c
MA		 3725 /*netif_stop_queue(dev); */
3726 flush_workqueue(priv->workqueue);
3727
5b9f8cd3 3728 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY		 3729 * priv->workqueue... so we can't take down the workqueue
3730 * until now... */
3731 destroy_workqueue(priv->workqueue);
3732 priv->workqueue = NULL;
3733
6cd0b1cb
HS		 3734 free_irq(priv->pci_dev->irq, priv);
3735 pci_disable_msi(priv->pci_dev);
b481de9c
ZY		 3736 pci_iounmap(pdev, priv->hw_base);
3737 pci_release_regions(pdev);
3738 pci_disable_device(pdev);
3739 pci_set_drvdata(pdev, NULL);
3740
6ba87956 3741 iwl_uninit_drv(priv);
b481de9c
ZY		 3742
3743 if (priv->ibss_beacon)
3744 dev_kfree_skb(priv->ibss_beacon);
3745
3746 ieee80211_free_hw(priv->hw);
3747}
3748
3749#ifdef CONFIG_PM
3750
5b9f8cd3 3751static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 3752{
c79dd5b5 3753 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 3754
e655b9f0
ZY		 3755 if (priv->is_open) {
3756 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 3757 iwl_mac_stop(priv->hw);
e655b9f0
ZY		 3758 priv->is_open = 1;
3759 }
b481de9c 3760
6cd0b1cb
HS		 3761 pci_save_state(pdev);
3762 pci_disable_device(pdev);
b481de9c
ZY		 3763 pci_set_power_state(pdev, PCI_D3hot);
3764
b481de9c
ZY		 3765 return 0;
3766}
3767
5b9f8cd3 3768static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 3769{
c79dd5b5 3770 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 3771 int ret;
b481de9c 3772
b481de9c 3773 pci_set_power_state(pdev, PCI_D0);
450154e4
WT		 3774 ret = pci_enable_device(pdev);
3775 if (ret)
3776 return ret;
6cd0b1cb
HS		 3777 pci_restore_state(pdev);
3778 iwl_enable_interrupts(priv);
b481de9c 3779
e655b9f0 3780 if (priv->is_open)
5b9f8cd3 3781 iwl_mac_start(priv->hw);
b481de9c 3782
e655b9f0 3783 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 3784 return 0;
3785}
3786
3787#endif /* CONFIG_PM */
3788
3789/*****************************************************************************
3790 *
3791 * driver and module entry point
3792 *
3793 *****************************************************************************/
3794
fed9017e
RR		 3795/* Hardware specific file defines the PCI IDs table for that hardware module */
3796static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 3797#ifdef CONFIG_IWL4965
fed9017e
RR		 3798 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3799 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 3800#endif /* CONFIG_IWL4965 */
5a6a256e 3801#ifdef CONFIG_IWL5000
47408639
EK		 3802 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3803 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3804 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3805 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3806 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3807 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 3808 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK		 3809 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3810 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3811 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW		 3812/* 5350 WiFi/WiMax */
3813 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3814 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3815 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW		 3816/* 5150 Wifi/WiMax */
3817 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3818 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
e1228374
JS		 3819/* 6000/6050 Series */
3820 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3821 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3822 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3823 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3824 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3825 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3826 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3827 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3828 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3829 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3830 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
c5d05698
JS		 3831/* 100 Series WiFi */
3832 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl100_bgn_cfg)},
3833 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl100_bgn_cfg)},
5a6a256e 3834#endif /* CONFIG_IWL5000 */
7100e924 3835
fed9017e
RR		 3836 {0}
3837};
3838MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3839
3840static struct pci_driver iwl_driver = {
b481de9c 3841 .name = DRV_NAME,
fed9017e 3842 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG		 3843 .probe = iwl_pci_probe,
3844 .remove = __devexit_p(iwl_pci_remove),
b481de9c 3845#ifdef CONFIG_PM
5b9f8cd3
EG		 3846 .suspend = iwl_pci_suspend,
3847 .resume = iwl_pci_resume,
b481de9c
ZY		 3848#endif
3849};
3850
5b9f8cd3 3851static int __init iwl_init(void)
b481de9c
ZY		 3852{
3853
3854 int ret;
3855 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3856 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 3857
e227ceac 3858 ret = iwlagn_rate_control_register();
897e1cf2 3859 if (ret) {
a3139c59
SO		 3860 printk(KERN_ERR DRV_NAME
3861 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC		 3862 return ret;
3863 }
3864
fed9017e 3865 ret = pci_register_driver(&iwl_driver);
b481de9c 3866 if (ret) {
a3139c59 3867 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 3868 goto error_register;
b481de9c 3869 }
b481de9c
ZY		 3870
3871 return ret;
897e1cf2 3872
897e1cf2 3873error_register:
e227ceac 3874 iwlagn_rate_control_unregister();
897e1cf2 3875 return ret;
b481de9c
ZY		 3876}
3877
5b9f8cd3 3878static void __exit iwl_exit(void)
b481de9c 3879{
fed9017e 3880 pci_unregister_driver(&iwl_driver);
e227ceac 3881 iwlagn_rate_control_unregister();
b481de9c
ZY		 3882}
3883
5b9f8cd3
EG		 3884module_exit(iwl_exit);
3885module_init(iwl_init);
Linux kernel - Deliverables
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