802.11: clean up/fix HT support
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY
30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
ZY
32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
ZY
40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
b481de9c
ZY
43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
b481de9c
ZY
56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
ZY
62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY
83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
86MODULE_AUTHOR(DRV_COPYRIGHT);
87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY
92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
deb09c43
EG
99static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
bb8c093b 111 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY
112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
c1adf9fb 117static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
b481de9c
ZY
118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
bb8c093b 177 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY
178 return -1;
179 }
180 return 0;
181}
182
183/**
54559703 184 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC
187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
54559703 191static int iwl_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY
192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
b481de9c
ZY
196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
b481de9c
ZY
210 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
211 return 1;
212
213 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
214 * be updated with the RXON_ASSOC command -- however only some
215 * flag transitions are allowed using RXON_ASSOC */
216
217 /* Check if we are not switching bands */
218 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
219 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
220 return 1;
221
222 /* Check if we are switching association toggle */
223 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
224 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
225 return 1;
226
227 return 0;
228}
229
b481de9c 230/**
bb8c093b 231 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 232 *
01ebd063 233 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY
234 * the active_rxon structure is updated with the new data. This
235 * function correctly transitions out of the RXON_ASSOC_MSK state if
236 * a HW tune is required based on the RXON structure changes.
237 */
c79dd5b5 238static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY
239{
240 /* cast away the const for active_rxon in this function */
c1adf9fb 241 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG
242 int ret;
243 bool new_assoc =
244 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 245
fee1247a 246 if (!iwl_is_alive(priv))
43d59b32 247 return -EBUSY;
b481de9c
ZY
248
249 /* always get timestamp with Rx frame */
250 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG
251 /* allow CTS-to-self if possible. this is relevant only for
252 * 5000, but will not damage 4965 */
253 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 254
43d59b32
EG
255 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
256 if (ret) {
b481de9c
ZY
257 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
258 return -EINVAL;
259 }
260
261 /* If we don't need to send a full RXON, we can use
bb8c093b 262 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 263 * and other flags for the current radio configuration. */
54559703 264 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG
265 ret = iwl_send_rxon_assoc(priv);
266 if (ret) {
267 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
268 return ret;
b481de9c
ZY
269 }
270
271 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY
272 return 0;
273 }
274
275 /* station table will be cleared */
276 priv->assoc_station_added = 0;
277
b481de9c
ZY
278 /* If we are currently associated and the new config requires
279 * an RXON_ASSOC and the new config wants the associated mask enabled,
280 * we must clear the associated from the active configuration
281 * before we apply the new config */
43d59b32 282 if (iwl_is_associated(priv) && new_assoc) {
b481de9c
ZY
283 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
284 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
285
43d59b32 286 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 287 sizeof(struct iwl_rxon_cmd),
b481de9c
ZY
288 &priv->active_rxon);
289
290 /* If the mask clearing failed then we set
291 * active_rxon back to what it was previously */
43d59b32 292 if (ret) {
b481de9c 293 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
294 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
295 return ret;
b481de9c 296 }
b481de9c
ZY
297 }
298
299 IWL_DEBUG_INFO("Sending RXON\n"
300 "* with%s RXON_FILTER_ASSOC_MSK\n"
301 "* channel = %d\n"
e174961c 302 "* bssid = %pM\n",
43d59b32 303 (new_assoc ? "" : "out"),
b481de9c 304 le16_to_cpu(priv->staging_rxon.channel),
e174961c 305 priv->staging_rxon.bssid_addr);
b481de9c 306
099b40b7 307 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
308
309 /* Apply the new configuration
310 * RXON unassoc clears the station table in uCode, send it before
311 * we add the bcast station. If assoc bit is set, we will send RXON
312 * after having added the bcast and bssid station.
313 */
314 if (!new_assoc) {
315 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 316 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
317 if (ret) {
318 IWL_ERROR("Error setting new RXON (%d)\n", ret);
319 return ret;
320 }
321 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY
322 }
323
37deb2a0 324 iwl_clear_stations_table(priv);
556f8db7 325
b481de9c
ZY
326 if (!priv->error_recovering)
327 priv->start_calib = 0;
328
b481de9c 329 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 330 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 331 IWL_INVALID_STATION) {
b481de9c
ZY
332 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
333 return -EIO;
334 }
335
336 /* If we have set the ASSOC_MSK and we are in BSS mode then
337 * add the IWL_AP_ID to the station rate table */
9185159d 338 if (new_assoc) {
05c914fe 339 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW
340 ret = iwl_rxon_add_station(priv,
341 priv->active_rxon.bssid_addr, 1);
342 if (ret == IWL_INVALID_STATION) {
343 IWL_ERROR("Error adding AP address for TX.\n");
344 return -EIO;
345 }
346 priv->assoc_station_added = 1;
347 if (priv->default_wep_key &&
348 iwl_send_static_wepkey_cmd(priv, 0))
349 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 350 }
43d59b32
EG
351
352 /* Apply the new configuration
353 * RXON assoc doesn't clear the station table in uCode,
354 */
355 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
356 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
357 if (ret) {
358 IWL_ERROR("Error setting new RXON (%d)\n", ret);
359 return ret;
360 }
361 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY
362 }
363
36da7d70
ZY
364 iwl_init_sensitivity(priv);
365
366 /* If we issue a new RXON command which required a tune then we must
367 * send a new TXPOWER command or we won't be able to Tx any frames */
368 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
369 if (ret) {
370 IWL_ERROR("Error sending TX power (%d)\n", ret);
371 return ret;
372 }
373
b481de9c
ZY
374 return 0;
375}
376
5da4b55f
MA
377void iwl4965_update_chain_flags(struct iwl_priv *priv)
378{
379
c7de35cd 380 iwl_set_rxon_chain(priv);
5da4b55f
MA
381 iwl4965_commit_rxon(priv);
382}
383
c79dd5b5 384static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 385{
bb8c093b 386 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY
387 .flags = 3,
388 .lead_time = 0xAA,
389 .max_kill = 1,
390 .kill_ack_mask = 0,
391 .kill_cts_mask = 0,
392 };
393
857485c0 394 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 395 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY
396}
397
fcab423d 398static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
399{
400 struct list_head *element;
401
402 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
403 priv->frames_count);
404
405 while (!list_empty(&priv->free_frames)) {
406 element = priv->free_frames.next;
407 list_del(element);
fcab423d 408 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
ZY
409 priv->frames_count--;
410 }
411
412 if (priv->frames_count) {
413 IWL_WARNING("%d frames still in use. Did we lose one?\n",
414 priv->frames_count);
415 priv->frames_count = 0;
416 }
417}
418
fcab423d 419static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 420{
fcab423d 421 struct iwl_frame *frame;
b481de9c
ZY
422 struct list_head *element;
423 if (list_empty(&priv->free_frames)) {
424 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
425 if (!frame) {
426 IWL_ERROR("Could not allocate frame!\n");
427 return NULL;
428 }
429
430 priv->frames_count++;
431 return frame;
432 }
433
434 element = priv->free_frames.next;
435 list_del(element);
fcab423d 436 return list_entry(element, struct iwl_frame, list);
b481de9c
ZY
437}
438
fcab423d 439static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
ZY
440{
441 memset(frame, 0, sizeof(*frame));
442 list_add(&frame->list, &priv->free_frames);
443}
444
4bf64efd
TW
445static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
446 struct ieee80211_hdr *hdr,
447 const u8 *dest, int left)
b481de9c 448{
3109ece1 449 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
450 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
451 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
452 return 0;
453
454 if (priv->ibss_beacon->len > left)
455 return 0;
456
457 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
458
459 return priv->ibss_beacon->len;
460}
461
39e88504 462static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 463{
39e88504
GC
464 int i;
465 int rate_mask;
466
467 /* Set rate mask*/
468 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
469 rate_mask = priv->active_rate_basic & 0xF;
470 else
471 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 472
39e88504 473 /* Find lowest valid rate */
b481de9c 474 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 475 i = iwl_rates[i].next_ieee) {
b481de9c 476 if (rate_mask & (1 << i))
1826dcc0 477 return iwl_rates[i].plcp;
b481de9c
ZY
478 }
479
39e88504
GC
480 /* No valid rate was found. Assign the lowest one */
481 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
482 return IWL_RATE_1M_PLCP;
483 else
484 return IWL_RATE_6M_PLCP;
b481de9c
ZY
485}
486
a33c2f47 487static unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW
488 struct iwl_frame *frame, u8 rate)
489{
490 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
491 unsigned int frame_size;
492
493 tx_beacon_cmd = &frame->u.beacon;
494 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
495
496 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
497 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
498
499 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
500 iwl_bcast_addr,
501 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
502
503 BUG_ON(frame_size > MAX_MPDU_SIZE);
504 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
505
506 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
507 tx_beacon_cmd->tx.rate_n_flags =
508 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
509 else
510 tx_beacon_cmd->tx.rate_n_flags =
511 iwl_hw_set_rate_n_flags(rate, 0);
512
513 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
514 TX_CMD_FLG_TSF_MSK |
515 TX_CMD_FLG_STA_RATE_MSK;
516
517 return sizeof(*tx_beacon_cmd) + frame_size;
518}
c79dd5b5 519static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 520{
fcab423d 521 struct iwl_frame *frame;
b481de9c
ZY
522 unsigned int frame_size;
523 int rc;
524 u8 rate;
525
fcab423d 526 frame = iwl_get_free_frame(priv);
b481de9c
ZY
527
528 if (!frame) {
529 IWL_ERROR("Could not obtain free frame buffer for beacon "
530 "command.\n");
531 return -ENOMEM;
532 }
533
39e88504 534 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 535
bb8c093b 536 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 537
857485c0 538 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
539 &frame->u.cmd[0]);
540
fcab423d 541 iwl_free_frame(priv, frame);
b481de9c
ZY
542
543 return rc;
544}
545
b481de9c
ZY
546/******************************************************************************
547 *
548 * Misc. internal state and helper functions
549 *
550 ******************************************************************************/
b481de9c 551
d1141dfb
EG
552static void iwl4965_ht_conf(struct iwl_priv *priv,
553 struct ieee80211_bss_conf *bss_conf)
554{
d9fe60de 555 struct ieee80211_sta_ht_cap *ht_conf = bss_conf->ht_cap;
d1141dfb
EG
556 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
557 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
558
559 IWL_DEBUG_MAC80211("enter: \n");
560
561 iwl_conf->is_ht = bss_conf->assoc_ht;
562
563 if (!iwl_conf->is_ht)
564 return;
565
d1141dfb 566 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 567 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 568 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 569 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
570
571 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
572 iwl_conf->max_amsdu_size =
573 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
574
575 iwl_conf->supported_chan_width =
d9fe60de 576 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
d1141dfb 577 iwl_conf->extension_chan_offset =
d9fe60de 578 ht_bss_conf->bss_cap & IEEE80211_HT_PARAM_CHA_SEC_OFFSET;
d1141dfb 579 /* If no above or below channel supplied disable FAT channel */
d9fe60de
JB
580 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
581 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW) {
582 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
d1141dfb 583 iwl_conf->supported_chan_width = 0;
963f5517 584 }
d1141dfb 585
12837be1
RR
586 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
587
d9fe60de 588 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb
EG
589
590 iwl_conf->control_channel = ht_bss_conf->primary_channel;
591 iwl_conf->tx_chan_width =
d9fe60de 592 !!(ht_bss_conf->bss_cap & IEEE80211_HT_PARAM_CHAN_WIDTH_ANY);
d1141dfb 593 iwl_conf->ht_protection =
d9fe60de 594 ht_bss_conf->bss_op_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 595 iwl_conf->non_GF_STA_present =
d9fe60de 596 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
d1141dfb
EG
597
598 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
599 IWL_DEBUG_MAC80211("leave\n");
600}
601
b481de9c
ZY
602/*
603 * QoS support
604*/
1ff50bda 605static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 606{
b481de9c
ZY
607 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
608 return;
609
610 if (!priv->qos_data.qos_enable)
611 return;
612
b481de9c
ZY
613 priv->qos_data.def_qos_parm.qos_flags = 0;
614
615 if (priv->qos_data.qos_cap.q_AP.queue_request &&
616 !priv->qos_data.qos_cap.q_AP.txop_request)
617 priv->qos_data.def_qos_parm.qos_flags |=
618 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
619 if (priv->qos_data.qos_active)
620 priv->qos_data.def_qos_parm.qos_flags |=
621 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
622
fd105e79 623 if (priv->current_ht_config.is_ht)
f1f1f5c7 624 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 625
3109ece1 626 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
627 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
628 priv->qos_data.qos_active,
629 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 630
1ff50bda
EG
631 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
632 sizeof(struct iwl_qosparam_cmd),
633 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY
634 }
635}
636
b481de9c 637#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 638
3195c1f3 639static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
640{
641 u16 new_val = 0;
642 u16 beacon_factor = 0;
643
3195c1f3
TW
644 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
645 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY
646 new_val = beacon_val / beacon_factor;
647
3195c1f3 648 return new_val;
b481de9c
ZY
649}
650
3195c1f3 651static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 652{
3195c1f3
TW
653 u64 tsf;
654 s32 interval_tm, rem;
b481de9c
ZY
655 unsigned long flags;
656 struct ieee80211_conf *conf = NULL;
657 u16 beacon_int = 0;
658
659 conf = ieee80211_get_hw_conf(priv->hw);
660
661 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 662 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 663 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 664
05c914fe 665 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 666 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY
667 priv->rxon_timing.atim_window = 0;
668 } else {
3195c1f3
TW
669 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
670
b481de9c
ZY
671 /* TODO: we need to get atim_window from upper stack
672 * for now we set to 0 */
673 priv->rxon_timing.atim_window = 0;
674 }
675
3195c1f3 676 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 677
3195c1f3
TW
678 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
679 interval_tm = beacon_int * 1024;
680 rem = do_div(tsf, interval_tm);
681 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
682
683 spin_unlock_irqrestore(&priv->lock, flags);
684 IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
685 le16_to_cpu(priv->rxon_timing.beacon_interval),
686 le32_to_cpu(priv->rxon_timing.beacon_init_val),
687 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY
688}
689
82a66bbb
TW
690static void iwl_set_flags_for_band(struct iwl_priv *priv,
691 enum ieee80211_band band)
b481de9c 692{
8318d78a 693 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
694 priv->staging_rxon.flags &=
695 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
696 | RXON_FLG_CCK_MSK);
697 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
698 } else {
508e32e1 699 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
700 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
701 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
702 else
703 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
704
05c914fe 705 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
706 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
707
708 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
709 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
710 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
711 }
712}
713
714/*
01ebd063 715 * initialize rxon structure with default values from eeprom
b481de9c 716 */
c79dd5b5 717static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 718{
bf85ea4f 719 const struct iwl_channel_info *ch_info;
b481de9c
ZY
720
721 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
722
723 switch (priv->iw_mode) {
05c914fe 724 case NL80211_IFTYPE_AP:
b481de9c
ZY
725 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
726 break;
727
05c914fe 728 case NL80211_IFTYPE_STATION:
b481de9c
ZY
729 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
730 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
731 break;
732
05c914fe 733 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY
734 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
735 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
736 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
737 RXON_FILTER_ACCEPT_GRP_MSK;
738 break;
739
05c914fe 740 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY
741 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
742 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
743 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
744 break;
69dc5d9d
TW
745 default:
746 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
747 break;
b481de9c
ZY
748 }
749
750#if 0
751 /* TODO: Figure out when short_preamble would be set and cache from
752 * that */
753 if (!hw_to_local(priv->hw)->short_preamble)
754 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
755 else
756 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
757#endif
758
8622e705 759 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 760 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY
761
762 if (!ch_info)
763 ch_info = &priv->channel_info[0];
764
765 /*
766 * in some case A channels are all non IBSS
767 * in this case force B/G channel
768 */
05c914fe 769 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY
770 !(is_channel_ibss(ch_info)))
771 ch_info = &priv->channel_info[0];
772
773 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 774 priv->band = ch_info->band;
b481de9c 775
82a66bbb 776 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
777
778 priv->staging_rxon.ofdm_basic_rates =
779 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
780 priv->staging_rxon.cck_basic_rates =
781 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
782
783 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
784 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
785 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
786 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
787 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
788 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 789 iwl_set_rxon_chain(priv);
b481de9c
ZY
790}
791
c79dd5b5 792static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 793{
b481de9c
ZY
794 priv->iw_mode = mode;
795
bb8c093b 796 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
797 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
798
37deb2a0 799 iwl_clear_stations_table(priv);
b481de9c 800
fde3571f 801 /* dont commit rxon if rf-kill is on*/
fee1247a 802 if (!iwl_is_ready_rf(priv))
fde3571f
MA
803 return -EAGAIN;
804
805 cancel_delayed_work(&priv->scan_check);
2a421b91 806 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
807 IWL_WARNING("Aborted scan still in progress after 100ms\n");
808 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
809 return -EAGAIN;
810 }
811
bb8c093b 812 iwl4965_commit_rxon(priv);
b481de9c
ZY
813
814 return 0;
815}
816
c79dd5b5 817static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 818{
8318d78a 819 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
820 struct ieee80211_rate *rate;
821 int i;
822
d1141dfb 823 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
824 if (!hw) {
825 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
826 return;
827 }
b481de9c
ZY
828
829 priv->active_rate = 0;
830 priv->active_rate_basic = 0;
831
8318d78a
JB
832 for (i = 0; i < hw->n_bitrates; i++) {
833 rate = &(hw->bitrates[i]);
834 if (rate->hw_value < IWL_RATE_COUNT)
835 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
836 }
837
838 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
839 priv->active_rate, priv->active_rate_basic);
840
841 /*
842 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
843 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
844 * OFDM
845 */
846 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
847 priv->staging_rxon.cck_basic_rates =
848 ((priv->active_rate_basic &
849 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
850 else
851 priv->staging_rxon.cck_basic_rates =
852 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
853
854 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
855 priv->staging_rxon.ofdm_basic_rates =
856 ((priv->active_rate_basic &
857 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
858 IWL_FIRST_OFDM_RATE) & 0xFF;
859 else
860 priv->staging_rxon.ofdm_basic_rates =
861 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
862}
863
4fc22b21 864#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
865
866#include "iwl-spectrum.h"
867
868#define BEACON_TIME_MASK_LOW 0x00FFFFFF
869#define BEACON_TIME_MASK_HIGH 0xFF000000
870#define TIME_UNIT 1024
871
872/*
873 * extended beacon time format
874 * time in usec will be changed into a 32-bit value in 8:24 format
875 * the high 1 byte is the beacon counts
876 * the lower 3 bytes is the time in usec within one beacon interval
877 */
878
bb8c093b 879static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
880{
881 u32 quot;
882 u32 rem;
883 u32 interval = beacon_interval * 1024;
884
885 if (!interval || !usec)
886 return 0;
887
888 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
889 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
890
891 return (quot << 24) + rem;
892}
893
894/* base is usually what we get from ucode with each received frame,
895 * the same as HW timer counter counting down
896 */
897
bb8c093b 898static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
899{
900 u32 base_low = base & BEACON_TIME_MASK_LOW;
901 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
902 u32 interval = beacon_interval * TIME_UNIT;
903 u32 res = (base & BEACON_TIME_MASK_HIGH) +
904 (addon & BEACON_TIME_MASK_HIGH);
905
906 if (base_low > addon_low)
907 res += base_low - addon_low;
908 else if (base_low < addon_low) {
909 res += interval + base_low - addon_low;
910 res += (1 << 24);
911 } else
912 res += (1 << 24);
913
914 return cpu_to_le32(res);
915}
916
c79dd5b5 917static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
918 struct ieee80211_measurement_params *params,
919 u8 type)
920{
bb8c093b 921 struct iwl4965_spectrum_cmd spectrum;
db11d634 922 struct iwl_rx_packet *res;
857485c0 923 struct iwl_host_cmd cmd = {
b481de9c
ZY
924 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
925 .data = (void *)&spectrum,
926 .meta.flags = CMD_WANT_SKB,
927 };
928 u32 add_time = le64_to_cpu(params->start_time);
929 int rc;
930 int spectrum_resp_status;
931 int duration = le16_to_cpu(params->duration);
932
3109ece1 933 if (iwl_is_associated(priv))
b481de9c 934 add_time =
bb8c093b 935 iwl4965_usecs_to_beacons(
b481de9c
ZY
936 le64_to_cpu(params->start_time) - priv->last_tsf,
937 le16_to_cpu(priv->rxon_timing.beacon_interval));
938
939 memset(&spectrum, 0, sizeof(spectrum));
940
941 spectrum.channel_count = cpu_to_le16(1);
942 spectrum.flags =
943 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
944 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
945 cmd.len = sizeof(spectrum);
946 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
947
3109ece1 948 if (iwl_is_associated(priv))
b481de9c 949 spectrum.start_time =
bb8c093b 950 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
951 add_time,
952 le16_to_cpu(priv->rxon_timing.beacon_interval));
953 else
954 spectrum.start_time = 0;
955
956 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
957 spectrum.channels[0].channel = params->channel;
958 spectrum.channels[0].type = type;
959 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
960 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
961 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
962
857485c0 963 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
964 if (rc)
965 return rc;
966
db11d634 967 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
968 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
969 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
970 rc = -EIO;
971 }
972
973 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
974 switch (spectrum_resp_status) {
975 case 0: /* Command will be handled */
976 if (res->u.spectrum.id != 0xff) {
977 IWL_DEBUG_INFO
978 ("Replaced existing measurement: %d\n",
979 res->u.spectrum.id);
980 priv->measurement_status &= ~MEASUREMENT_READY;
981 }
982 priv->measurement_status |= MEASUREMENT_ACTIVE;
983 rc = 0;
984 break;
985
986 case 1: /* Command will not be handled */
987 rc = -EAGAIN;
988 break;
989 }
990
991 dev_kfree_skb_any(cmd.meta.u.skb);
992
993 return rc;
994}
995#endif
996
b481de9c
ZY
997/******************************************************************************
998 *
999 * Generic RX handler implementations
1000 *
1001 ******************************************************************************/
885ba202
TW
1002static void iwl_rx_reply_alive(struct iwl_priv *priv,
1003 struct iwl_rx_mem_buffer *rxb)
b481de9c 1004{
db11d634 1005 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1006 struct iwl_alive_resp *palive;
b481de9c
ZY
1007 struct delayed_work *pwork;
1008
1009 palive = &pkt->u.alive_frame;
1010
1011 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1012 "0x%01X 0x%01X\n",
1013 palive->is_valid, palive->ver_type,
1014 palive->ver_subtype);
1015
1016 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1017 IWL_DEBUG_INFO("Initialization Alive received.\n");
1018 memcpy(&priv->card_alive_init,
1019 &pkt->u.alive_frame,
885ba202 1020 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1021 pwork = &priv->init_alive_start;
1022 } else {
1023 IWL_DEBUG_INFO("Runtime Alive received.\n");
1024 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1025 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1026 pwork = &priv->alive_start;
1027 }
1028
1029 /* We delay the ALIVE response by 5ms to
1030 * give the HW RF Kill time to activate... */
1031 if (palive->is_valid == UCODE_VALID_OK)
1032 queue_delayed_work(priv->workqueue, pwork,
1033 msecs_to_jiffies(5));
1034 else
1035 IWL_WARNING("uCode did not respond OK.\n");
1036}
1037
c79dd5b5 1038static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1039 struct iwl_rx_mem_buffer *rxb)
b481de9c 1040{
db11d634 1041 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1042
1043 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1044 "seq 0x%04X ser 0x%08X\n",
1045 le32_to_cpu(pkt->u.err_resp.error_type),
1046 get_cmd_string(pkt->u.err_resp.cmd_id),
1047 pkt->u.err_resp.cmd_id,
1048 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1049 le32_to_cpu(pkt->u.err_resp.error_info));
1050}
1051
1052#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1053
a55360e4 1054static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1055{
db11d634 1056 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1057 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1058 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1059 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1060 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1061 rxon->channel = csa->channel;
1062 priv->staging_rxon.channel = csa->channel;
1063}
1064
c79dd5b5 1065static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1066 struct iwl_rx_mem_buffer *rxb)
b481de9c 1067{
4fc22b21 1068#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
db11d634 1069 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1070 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1071
1072 if (!report->state) {
f3d67999
EK
1073 IWL_DEBUG(IWL_DL_11H,
1074 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1075 return;
1076 }
1077
1078 memcpy(&priv->measure_report, report, sizeof(*report));
1079 priv->measurement_status |= MEASUREMENT_READY;
1080#endif
1081}
1082
c79dd5b5 1083static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1084 struct iwl_rx_mem_buffer *rxb)
b481de9c 1085{
0a6857e7 1086#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1087 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1088 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1089 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1090 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1091#endif
1092}
1093
c79dd5b5 1094static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1095 struct iwl_rx_mem_buffer *rxb)
b481de9c 1096{
db11d634 1097 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1098 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1099 "notification for %s:\n",
1100 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1101 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1102}
1103
bb8c093b 1104static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1105{
c79dd5b5
TW
1106 struct iwl_priv *priv =
1107 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1108 struct sk_buff *beacon;
1109
1110 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1111 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1112
1113 if (!beacon) {
1114 IWL_ERROR("update beacon failed\n");
1115 return;
1116 }
1117
1118 mutex_lock(&priv->mutex);
1119 /* new beacon skb is allocated every time; dispose previous.*/
1120 if (priv->ibss_beacon)
1121 dev_kfree_skb(priv->ibss_beacon);
1122
1123 priv->ibss_beacon = beacon;
1124 mutex_unlock(&priv->mutex);
1125
bb8c093b 1126 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1127}
1128
4e39317d
EG
1129/**
1130 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1131 *
1132 * This callback is provided in order to send a statistics request.
1133 *
1134 * This timer function is continually reset to execute within
1135 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1136 * was received. We need to ensure we receive the statistics in order
1137 * to update the temperature used for calibrating the TXPOWER.
1138 */
1139static void iwl4965_bg_statistics_periodic(unsigned long data)
1140{
1141 struct iwl_priv *priv = (struct iwl_priv *)data;
1142
1143 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1144 return;
1145
1146 iwl_send_statistics_request(priv, CMD_ASYNC);
1147}
1148
c79dd5b5 1149static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1150 struct iwl_rx_mem_buffer *rxb)
b481de9c 1151{
0a6857e7 1152#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1153 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1154 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1155 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1156
1157 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1158 "tsf %d %d rate %d\n",
25a6572c 1159 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1160 beacon->beacon_notify_hdr.failure_frame,
1161 le32_to_cpu(beacon->ibss_mgr_status),
1162 le32_to_cpu(beacon->high_tsf),
1163 le32_to_cpu(beacon->low_tsf), rate);
1164#endif
1165
05c914fe 1166 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1167 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1168 queue_work(priv->workqueue, &priv->beacon_update);
1169}
1170
b481de9c
ZY
1171/* Handle notification from uCode that card's power state is changing
1172 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1173static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1174 struct iwl_rx_mem_buffer *rxb)
b481de9c 1175{
db11d634 1176 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1177 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1178 unsigned long status = priv->status;
1179
1180 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1181 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1182 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1183
1184 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1185 RF_CARD_DISABLED)) {
1186
3395f6e9 1187 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1188 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1189
3395f6e9
TW
1190 if (!iwl_grab_nic_access(priv)) {
1191 iwl_write_direct32(
b481de9c
ZY
1192 priv, HBUS_TARG_MBX_C,
1193 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1194
3395f6e9 1195 iwl_release_nic_access(priv);
b481de9c
ZY
1196 }
1197
1198 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1199 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1200 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1201 if (!iwl_grab_nic_access(priv)) {
1202 iwl_write_direct32(
b481de9c
ZY
1203 priv, HBUS_TARG_MBX_C,
1204 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1205
3395f6e9 1206 iwl_release_nic_access(priv);
b481de9c
ZY
1207 }
1208 }
1209
1210 if (flags & RF_CARD_DISABLED) {
3395f6e9 1211 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1212 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1213 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1214 if (!iwl_grab_nic_access(priv))
1215 iwl_release_nic_access(priv);
b481de9c
ZY
1216 }
1217 }
1218
1219 if (flags & HW_CARD_DISABLED)
1220 set_bit(STATUS_RF_KILL_HW, &priv->status);
1221 else
1222 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1223
1224
1225 if (flags & SW_CARD_DISABLED)
1226 set_bit(STATUS_RF_KILL_SW, &priv->status);
1227 else
1228 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1229
1230 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1231 iwl_scan_cancel(priv);
b481de9c
ZY
1232
1233 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1234 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1235 (test_bit(STATUS_RF_KILL_SW, &status) !=
1236 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1237 queue_work(priv->workqueue, &priv->rf_kill);
1238 else
1239 wake_up_interruptible(&priv->wait_command_queue);
1240}
1241
e2e3c57b
TW
1242int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
1243{
1244 int ret;
1245 unsigned long flags;
1246
1247 spin_lock_irqsave(&priv->lock, flags);
1248 ret = iwl_grab_nic_access(priv);
1249 if (ret)
1250 goto err;
1251
1252 if (src == IWL_PWR_SRC_VAUX) {
1253 u32 val;
e7b63581 1254 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW
1255 &val);
1256
1257 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1258 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1259 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1260 ~APMG_PS_CTRL_MSK_PWR_SRC);
1261 } else {
1262 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1263 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1264 ~APMG_PS_CTRL_MSK_PWR_SRC);
1265 }
1266
1267 iwl_release_nic_access(priv);
1268err:
1269 spin_unlock_irqrestore(&priv->lock, flags);
1270 return ret;
1271}
1272
b481de9c 1273/**
bb8c093b 1274 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1275 *
1276 * Setup the RX handlers for each of the reply types sent from the uCode
1277 * to the host.
1278 *
1279 * This function chains into the hardware specific files for them to setup
1280 * any hardware specific handlers as well.
1281 */
653fa4a0 1282static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1283{
885ba202 1284 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1285 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1286 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1287 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1288 iwl4965_rx_spectrum_measure_notif;
1289 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1290 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1291 iwl4965_rx_pm_debug_statistics_notif;
1292 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1293
9fbab516
BC
1294 /*
1295 * The same handler is used for both the REPLY to a discrete
1296 * statistics request from the host as well as for the periodic
1297 * statistics notifications (after received beacons) from the uCode.
b481de9c 1298 */
8f91aecb
EG
1299 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1300 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1301
1302 iwl_setup_rx_scan_handlers(priv);
1303
37a44211 1304 /* status change handler */
bb8c093b 1305 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1306
c1354754
TW
1307 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1308 iwl_rx_missed_beacon_notif;
37a44211 1309 /* Rx handlers */
1781a07f
EG
1310 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1311 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1312 /* block ack */
1313 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1314 /* Set up hardware specific Rx handlers */
d4789efe 1315 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1316}
1317
5c0eef96
MA
1318/*
1319 * this should be called while priv->lock is locked
1320*/
a55360e4 1321static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1322{
a55360e4
TW
1323 iwl_rx_allocate(priv);
1324 iwl_rx_queue_restock(priv);
b481de9c
ZY
1325}
1326
b481de9c
ZY
1327
1328/**
a55360e4 1329 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1330 *
1331 * Uses the priv->rx_handlers callback function array to invoke
1332 * the appropriate handlers, including command responses,
1333 * frame-received notifications, and other notifications.
1334 */
a55360e4 1335void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1336{
a55360e4 1337 struct iwl_rx_mem_buffer *rxb;
db11d634 1338 struct iwl_rx_packet *pkt;
a55360e4 1339 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1340 u32 r, i;
1341 int reclaim;
1342 unsigned long flags;
5c0eef96 1343 u8 fill_rx = 0;
d68ab680 1344 u32 count = 8;
b481de9c 1345
6440adb5
CB
1346 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1347 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1348 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1349 i = rxq->read;
1350
1351 /* Rx interrupt, but nothing sent from uCode */
1352 if (i == r)
f3d67999 1353 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1354
a55360e4 1355 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1356 fill_rx = 1;
1357
b481de9c
ZY
1358 while (i != r) {
1359 rxb = rxq->queue[i];
1360
9fbab516 1361 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1362 * then a bug has been introduced in the queue refilling
1363 * routines -- catch it here */
1364 BUG_ON(rxb == NULL);
1365
1366 rxq->queue[i] = NULL;
1367
1368 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 1369 priv->hw_params.rx_buf_size,
b481de9c 1370 PCI_DMA_FROMDEVICE);
db11d634 1371 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1372
1373 /* Reclaim a command buffer only if this packet is a response
1374 * to a (driver-originated) command.
1375 * If the packet (e.g. Rx frame) originated from uCode,
1376 * there is no command buffer to reclaim.
1377 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1378 * but apparently a few don't get set; catch them here. */
1379 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1380 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1381 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1382 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1383 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1384 (pkt->hdr.cmd != REPLY_TX);
1385
1386 /* Based on type of command response or notification,
1387 * handle those that need handling via function in
bb8c093b 1388 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1389 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1390 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1391 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1392 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1393 } else {
1394 /* No handling needed */
f3d67999 1395 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1396 "r %d i %d No handler needed for %s, 0x%02x\n",
1397 r, i, get_cmd_string(pkt->hdr.cmd),
1398 pkt->hdr.cmd);
1399 }
1400
1401 if (reclaim) {
9fbab516 1402 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1403 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1404 * as we reclaim the driver command queue */
1405 if (rxb && rxb->skb)
17b88929 1406 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1407 else
1408 IWL_WARNING("Claim null rxb?\n");
1409 }
1410
1411 /* For now we just don't re-use anything. We can tweak this
1412 * later to try and re-use notification packets and SKBs that
1413 * fail to Rx correctly */
1414 if (rxb->skb != NULL) {
1415 priv->alloc_rxb_skb--;
1416 dev_kfree_skb_any(rxb->skb);
1417 rxb->skb = NULL;
1418 }
1419
1420 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 1421 priv->hw_params.rx_buf_size,
9ee1ba47 1422 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1423 spin_lock_irqsave(&rxq->lock, flags);
1424 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1425 spin_unlock_irqrestore(&rxq->lock, flags);
1426 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1427 /* If there are a lot of unused frames,
1428 * restock the Rx queue so ucode wont assert. */
1429 if (fill_rx) {
1430 count++;
1431 if (count >= 8) {
1432 priv->rxq.read = i;
a55360e4 1433 __iwl_rx_replenish(priv);
5c0eef96
MA
1434 count = 0;
1435 }
1436 }
b481de9c
ZY
1437 }
1438
1439 /* Backtrack one entry */
1440 priv->rxq.read = i;
a55360e4
TW
1441 iwl_rx_queue_restock(priv);
1442}
a55360e4 1443
0a6857e7 1444#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1445static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1446{
c1adf9fb 1447 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57 1448
b481de9c 1449 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1450 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1451 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1452 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1453 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1454 le32_to_cpu(rxon->filter_flags));
1455 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1456 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1457 rxon->ofdm_basic_rates);
1458 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
e174961c
JB
1459 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
1460 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
b481de9c
ZY
1461 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1462}
1463#endif
1464
c79dd5b5 1465static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1466{
1467 IWL_DEBUG_ISR("Enabling interrupts\n");
1468 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1469 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1470}
1471
0359facc
MA
1472/* call this function to flush any scheduled tasklet */
1473static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1474{
1475 /* wait to make sure we flush pedding tasklet*/
1476 synchronize_irq(priv->pci_dev->irq);
1477 tasklet_kill(&priv->irq_tasklet);
1478}
1479
c79dd5b5 1480static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1481{
1482 clear_bit(STATUS_INT_ENABLED, &priv->status);
1483
1484 /* disable interrupts from uCode/NIC to host */
3395f6e9 1485 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1486
1487 /* acknowledge/clear/reset any interrupts still pending
1488 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1489 iwl_write32(priv, CSR_INT, 0xffffffff);
1490 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1491 IWL_DEBUG_ISR("Disabled interrupts\n");
1492}
1493
b481de9c 1494
b481de9c 1495/**
bb8c093b 1496 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1497 */
c79dd5b5 1498static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1499{
bb8c093b 1500 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1501 set_bit(STATUS_FW_ERROR, &priv->status);
1502
1503 /* Cancel currently queued command. */
1504 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1505
0a6857e7 1506#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1507 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1508 iwl_dump_nic_error_log(priv);
189a2b59 1509 iwl_dump_nic_event_log(priv);
bf403db8 1510 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1511 }
1512#endif
1513
1514 wake_up_interruptible(&priv->wait_command_queue);
1515
1516 /* Keep the restart process from trying to send host
1517 * commands by clearing the INIT status bit */
1518 clear_bit(STATUS_READY, &priv->status);
1519
1520 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1521 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1522 "Restarting adapter due to uCode error.\n");
1523
3109ece1 1524 if (iwl_is_associated(priv)) {
b481de9c
ZY
1525 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1526 sizeof(priv->recovery_rxon));
1527 priv->error_recovering = 1;
1528 }
3a1081e8
EK
1529 if (priv->cfg->mod_params->restart_fw)
1530 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1531 }
1532}
1533
c79dd5b5 1534static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1535{
1536 unsigned long flags;
1537
1538 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1539 sizeof(priv->staging_rxon));
1540 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1541 iwl4965_commit_rxon(priv);
b481de9c 1542
4f40e4d9 1543 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1544
1545 spin_lock_irqsave(&priv->lock, flags);
1546 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1547 priv->error_recovering = 0;
1548 spin_unlock_irqrestore(&priv->lock, flags);
1549}
1550
c79dd5b5 1551static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1552{
1553 u32 inta, handled = 0;
1554 u32 inta_fh;
1555 unsigned long flags;
0a6857e7 1556#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1557 u32 inta_mask;
1558#endif
1559
1560 spin_lock_irqsave(&priv->lock, flags);
1561
1562 /* Ack/clear/reset pending uCode interrupts.
1563 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1564 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1565 inta = iwl_read32(priv, CSR_INT);
1566 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1567
1568 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1569 * Any new interrupts that happen after this, either while we're
1570 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1571 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1572 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1573
0a6857e7 1574#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1575 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1576 /* just for debug */
3395f6e9 1577 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1578 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1579 inta, inta_mask, inta_fh);
1580 }
1581#endif
1582
1583 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1584 * atomic, make sure that inta covers all the interrupts that
1585 * we've discovered, even if FH interrupt came in just after
1586 * reading CSR_INT. */
6f83eaa1 1587 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1588 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1589 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1590 inta |= CSR_INT_BIT_FH_TX;
1591
1592 /* Now service all interrupt bits discovered above. */
1593 if (inta & CSR_INT_BIT_HW_ERR) {
1594 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1595
1596 /* Tell the device to stop sending interrupts */
bb8c093b 1597 iwl4965_disable_interrupts(priv);
b481de9c 1598
bb8c093b 1599 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1600
1601 handled |= CSR_INT_BIT_HW_ERR;
1602
1603 spin_unlock_irqrestore(&priv->lock, flags);
1604
1605 return;
1606 }
1607
0a6857e7 1608#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1609 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1610 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1611 if (inta & CSR_INT_BIT_SCD)
1612 IWL_DEBUG_ISR("Scheduler finished to transmit "
1613 "the frame/frames.\n");
b481de9c
ZY
1614
1615 /* Alive notification via Rx interrupt will do the real work */
1616 if (inta & CSR_INT_BIT_ALIVE)
1617 IWL_DEBUG_ISR("Alive interrupt\n");
1618 }
1619#endif
1620 /* Safely ignore these bits for debug checks below */
25c03d8e 1621 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1622
9fbab516 1623 /* HW RF KILL switch toggled */
b481de9c
ZY
1624 if (inta & CSR_INT_BIT_RF_KILL) {
1625 int hw_rf_kill = 0;
3395f6e9 1626 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1627 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1628 hw_rf_kill = 1;
1629
f3d67999 1630 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1631 hw_rf_kill ? "disable radio":"enable radio");
1632
a9efa652
EG
1633 /* driver only loads ucode once setting the interface up.
1634 * the driver as well won't allow loading if RFKILL is set
1635 * therefore no need to restart the driver from this handler
1636 */
1637 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
53e49093 1638 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c
ZY
1639
1640 handled |= CSR_INT_BIT_RF_KILL;
1641 }
1642
9fbab516 1643 /* Chip got too hot and stopped itself */
b481de9c
ZY
1644 if (inta & CSR_INT_BIT_CT_KILL) {
1645 IWL_ERROR("Microcode CT kill error detected.\n");
1646 handled |= CSR_INT_BIT_CT_KILL;
1647 }
1648
1649 /* Error detected by uCode */
1650 if (inta & CSR_INT_BIT_SW_ERR) {
1651 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1652 inta);
bb8c093b 1653 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1654 handled |= CSR_INT_BIT_SW_ERR;
1655 }
1656
1657 /* uCode wakes up after power-down sleep */
1658 if (inta & CSR_INT_BIT_WAKEUP) {
1659 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1660 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1661 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1662 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1663 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1664 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1665 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1666 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1667
1668 handled |= CSR_INT_BIT_WAKEUP;
1669 }
1670
1671 /* All uCode command responses, including Tx command responses,
1672 * Rx "responses" (frame-received notification), and other
1673 * notifications from uCode come through here*/
1674 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1675 iwl_rx_handle(priv);
b481de9c
ZY
1676 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1677 }
1678
1679 if (inta & CSR_INT_BIT_FH_TX) {
1680 IWL_DEBUG_ISR("Tx interrupt\n");
1681 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1682 /* FH finished to write, send event */
1683 priv->ucode_write_complete = 1;
1684 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1685 }
1686
1687 if (inta & ~handled)
1688 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1689
1690 if (inta & ~CSR_INI_SET_MASK) {
1691 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1692 inta & ~CSR_INI_SET_MASK);
1693 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1694 }
1695
1696 /* Re-enable all interrupts */
0359facc
MA
1697 /* only Re-enable if diabled by irq */
1698 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1699 iwl4965_enable_interrupts(priv);
b481de9c 1700
0a6857e7 1701#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1702 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1703 inta = iwl_read32(priv, CSR_INT);
1704 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1705 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1706 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1707 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1708 }
1709#endif
1710 spin_unlock_irqrestore(&priv->lock, flags);
1711}
1712
bb8c093b 1713static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1714{
c79dd5b5 1715 struct iwl_priv *priv = data;
b481de9c
ZY
1716 u32 inta, inta_mask;
1717 u32 inta_fh;
1718 if (!priv)
1719 return IRQ_NONE;
1720
1721 spin_lock(&priv->lock);
1722
1723 /* Disable (but don't clear!) interrupts here to avoid
1724 * back-to-back ISRs and sporadic interrupts from our NIC.
1725 * If we have something to service, the tasklet will re-enable ints.
1726 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1727 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1728 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1729
1730 /* Discover which interrupts are active/pending */
3395f6e9
TW
1731 inta = iwl_read32(priv, CSR_INT);
1732 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1733
1734 /* Ignore interrupt if there's nothing in NIC to service.
1735 * This may be due to IRQ shared with another device,
1736 * or due to sporadic interrupts thrown from our NIC. */
1737 if (!inta && !inta_fh) {
1738 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1739 goto none;
1740 }
1741
1742 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1743 /* Hardware disappeared. It might have already raised
1744 * an interrupt */
b481de9c 1745 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1746 goto unplugged;
b481de9c
ZY
1747 }
1748
1749 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1750 inta, inta_mask, inta_fh);
1751
25c03d8e
JP
1752 inta &= ~CSR_INT_BIT_SCD;
1753
bb8c093b 1754 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1755 if (likely(inta || inta_fh))
1756 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1757
66fbb541
ON
1758 unplugged:
1759 spin_unlock(&priv->lock);
b481de9c
ZY
1760 return IRQ_HANDLED;
1761
1762 none:
1763 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1764 /* only Re-enable if diabled by irq */
1765 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1766 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1767 spin_unlock(&priv->lock);
1768 return IRQ_NONE;
1769}
1770
b481de9c
ZY
1771/******************************************************************************
1772 *
1773 * uCode download functions
1774 *
1775 ******************************************************************************/
1776
c79dd5b5 1777static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1778{
98c92211
TW
1779 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1780 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1781 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1782 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1783 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1784 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1785}
1786
edcdf8b2
RR
1787static void iwl4965_nic_start(struct iwl_priv *priv)
1788{
1789 /* Remove all resets to allow NIC to operate */
1790 iwl_write32(priv, CSR_RESET, 0);
1791}
1792
1793
b481de9c 1794/**
bb8c093b 1795 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1796 *
1797 * Copy into buffers for card to fetch via bus-mastering
1798 */
c79dd5b5 1799static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1800{
14b3d338 1801 struct iwl_ucode *ucode;
90e759d1 1802 int ret;
b481de9c 1803 const struct firmware *ucode_raw;
4bf775cd 1804 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1805 u8 *src;
1806 size_t len;
1807 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1808
1809 /* Ask kernel firmware_class module to get the boot firmware off disk.
1810 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1811 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1812 if (ret < 0) {
1813 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1814 name, ret);
b481de9c
ZY
1815 goto error;
1816 }
1817
1818 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1819 name, ucode_raw->size);
1820
1821 /* Make sure that we got at least our header! */
1822 if (ucode_raw->size < sizeof(*ucode)) {
1823 IWL_ERROR("File size way too small!\n");
90e759d1 1824 ret = -EINVAL;
b481de9c
ZY
1825 goto err_release;
1826 }
1827
1828 /* Data from ucode file: header followed by uCode images */
1829 ucode = (void *)ucode_raw->data;
1830
1831 ver = le32_to_cpu(ucode->ver);
1832 inst_size = le32_to_cpu(ucode->inst_size);
1833 data_size = le32_to_cpu(ucode->data_size);
1834 init_size = le32_to_cpu(ucode->init_size);
1835 init_data_size = le32_to_cpu(ucode->init_data_size);
1836 boot_size = le32_to_cpu(ucode->boot_size);
1837
1838 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1839 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1840 inst_size);
1841 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1842 data_size);
1843 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1844 init_size);
1845 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1846 init_data_size);
1847 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1848 boot_size);
1849
1850 /* Verify size of file vs. image size info in file's header */
1851 if (ucode_raw->size < sizeof(*ucode) +
1852 inst_size + data_size + init_size +
1853 init_data_size + boot_size) {
1854
1855 IWL_DEBUG_INFO("uCode file size %d too small\n",
1856 (int)ucode_raw->size);
90e759d1 1857 ret = -EINVAL;
b481de9c
ZY
1858 goto err_release;
1859 }
1860
1861 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1862 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1863 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1864 inst_size);
1865 ret = -EINVAL;
b481de9c
ZY
1866 goto err_release;
1867 }
1868
099b40b7 1869 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1870 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1871 data_size);
1872 ret = -EINVAL;
b481de9c
ZY
1873 goto err_release;
1874 }
099b40b7 1875 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1876 IWL_DEBUG_INFO
90e759d1
TW
1877 ("uCode init instr len %d too large to fit in\n",
1878 init_size);
1879 ret = -EINVAL;
b481de9c
ZY
1880 goto err_release;
1881 }
099b40b7 1882 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1883 IWL_DEBUG_INFO
90e759d1
TW
1884 ("uCode init data len %d too large to fit in\n",
1885 init_data_size);
1886 ret = -EINVAL;
b481de9c
ZY
1887 goto err_release;
1888 }
099b40b7 1889 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1890 IWL_DEBUG_INFO
90e759d1
TW
1891 ("uCode boot instr len %d too large to fit in\n",
1892 boot_size);
1893 ret = -EINVAL;
b481de9c
ZY
1894 goto err_release;
1895 }
1896
1897 /* Allocate ucode buffers for card's bus-master loading ... */
1898
1899 /* Runtime instructions and 2 copies of data:
1900 * 1) unmodified from disk
1901 * 2) backup cache for save/restore during power-downs */
1902 priv->ucode_code.len = inst_size;
98c92211 1903 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1904
1905 priv->ucode_data.len = data_size;
98c92211 1906 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1907
1908 priv->ucode_data_backup.len = data_size;
98c92211 1909 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1910
1911 /* Initialization instructions and data */
90e759d1
TW
1912 if (init_size && init_data_size) {
1913 priv->ucode_init.len = init_size;
98c92211 1914 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1915
1916 priv->ucode_init_data.len = init_data_size;
98c92211 1917 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1918
1919 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1920 goto err_pci_alloc;
1921 }
b481de9c
ZY
1922
1923 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1924 if (boot_size) {
1925 priv->ucode_boot.len = boot_size;
98c92211 1926 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1927
90e759d1
TW
1928 if (!priv->ucode_boot.v_addr)
1929 goto err_pci_alloc;
1930 }
b481de9c
ZY
1931
1932 /* Copy images into buffers for card's bus-master reads ... */
1933
1934 /* Runtime instructions (first block of data in file) */
1935 src = &ucode->data[0];
1936 len = priv->ucode_code.len;
90e759d1 1937 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1938 memcpy(priv->ucode_code.v_addr, src, len);
1939 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1940 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1941
1942 /* Runtime data (2nd block)
bb8c093b 1943 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1944 src = &ucode->data[inst_size];
1945 len = priv->ucode_data.len;
90e759d1 1946 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1947 memcpy(priv->ucode_data.v_addr, src, len);
1948 memcpy(priv->ucode_data_backup.v_addr, src, len);
1949
1950 /* Initialization instructions (3rd block) */
1951 if (init_size) {
1952 src = &ucode->data[inst_size + data_size];
1953 len = priv->ucode_init.len;
90e759d1
TW
1954 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1955 len);
b481de9c
ZY
1956 memcpy(priv->ucode_init.v_addr, src, len);
1957 }
1958
1959 /* Initialization data (4th block) */
1960 if (init_data_size) {
1961 src = &ucode->data[inst_size + data_size + init_size];
1962 len = priv->ucode_init_data.len;
90e759d1
TW
1963 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1964 len);
b481de9c
ZY
1965 memcpy(priv->ucode_init_data.v_addr, src, len);
1966 }
1967
1968 /* Bootstrap instructions (5th block) */
1969 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1970 len = priv->ucode_boot.len;
90e759d1 1971 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1972 memcpy(priv->ucode_boot.v_addr, src, len);
1973
1974 /* We have our copies now, allow OS release its copies */
1975 release_firmware(ucode_raw);
1976 return 0;
1977
1978 err_pci_alloc:
1979 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1980 ret = -ENOMEM;
bb8c093b 1981 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
1982
1983 err_release:
1984 release_firmware(ucode_raw);
1985
1986 error:
90e759d1 1987 return ret;
b481de9c
ZY
1988}
1989
b481de9c 1990/**
4a4a9e81 1991 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1992 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1993 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1994 */
4a4a9e81 1995static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1996{
57aab75a 1997 int ret = 0;
b481de9c
ZY
1998
1999 IWL_DEBUG_INFO("Runtime Alive received.\n");
2000
2001 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2002 /* We had an error bringing up the hardware, so take it
2003 * all the way back down so we can try again */
2004 IWL_DEBUG_INFO("Alive failed.\n");
2005 goto restart;
2006 }
2007
2008 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2009 * This is a paranoid check, because we would not have gotten the
2010 * "runtime" alive if code weren't properly loaded. */
b0692f2f 2011 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
2012 /* Runtime instruction load was bad;
2013 * take it all the way back down so we can try again */
2014 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
2015 goto restart;
2016 }
2017
37deb2a0 2018 iwl_clear_stations_table(priv);
57aab75a
TW
2019 ret = priv->cfg->ops->lib->alive_notify(priv);
2020 if (ret) {
b481de9c 2021 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 2022 ret);
b481de9c
ZY
2023 goto restart;
2024 }
2025
9fbab516 2026 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2027 set_bit(STATUS_ALIVE, &priv->status);
2028
fee1247a 2029 if (iwl_is_rfkill(priv))
b481de9c
ZY
2030 return;
2031
36d6825b 2032 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2033
2034 priv->active_rate = priv->rates_mask;
2035 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2036
3109ece1 2037 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2038 struct iwl_rxon_cmd *active_rxon =
2039 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2040
2041 memcpy(&priv->staging_rxon, &priv->active_rxon,
2042 sizeof(priv->staging_rxon));
2043 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2044 } else {
2045 /* Initialize our rx_config data */
bb8c093b 2046 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2047 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2048 }
2049
9fbab516 2050 /* Configure Bluetooth device coexistence support */
bb8c093b 2051 iwl4965_send_bt_config(priv);
b481de9c 2052
4a4a9e81
TW
2053 iwl_reset_run_time_calib(priv);
2054
b481de9c 2055 /* Configure the adapter for unassociated operation */
bb8c093b 2056 iwl4965_commit_rxon(priv);
b481de9c
ZY
2057
2058 /* At this point, the NIC is initialized and operational */
47f4a587 2059 iwl_rf_kill_ct_config(priv);
5a66926a 2060
fe00b5a5
RC
2061 iwl_leds_register(priv);
2062
b481de9c 2063 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2064 set_bit(STATUS_READY, &priv->status);
5a66926a 2065 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2066
2067 if (priv->error_recovering)
bb8c093b 2068 iwl4965_error_recovery(priv);
b481de9c 2069
58d0f361 2070 iwl_power_update_mode(priv, 1);
c46fbefa
AK
2071
2072 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2073 iwl4965_set_mode(priv, priv->iw_mode);
2074
b481de9c
ZY
2075 return;
2076
2077 restart:
2078 queue_work(priv->workqueue, &priv->restart);
2079}
2080
4e39317d 2081static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2082
c79dd5b5 2083static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2084{
2085 unsigned long flags;
2086 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2087
2088 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2089
b481de9c
ZY
2090 if (!exit_pending)
2091 set_bit(STATUS_EXIT_PENDING, &priv->status);
2092
ab53d8af
MA
2093 iwl_leds_unregister(priv);
2094
37deb2a0 2095 iwl_clear_stations_table(priv);
b481de9c
ZY
2096
2097 /* Unblock any waiting calls */
2098 wake_up_interruptible_all(&priv->wait_command_queue);
2099
b481de9c
ZY
2100 /* Wipe out the EXIT_PENDING status bit if we are not actually
2101 * exiting the module */
2102 if (!exit_pending)
2103 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2104
2105 /* stop and reset the on-board processor */
3395f6e9 2106 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2107
2108 /* tell the device to stop sending interrupts */
0359facc 2109 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2110 iwl4965_disable_interrupts(priv);
0359facc
MA
2111 spin_unlock_irqrestore(&priv->lock, flags);
2112 iwl_synchronize_irq(priv);
b481de9c
ZY
2113
2114 if (priv->mac80211_registered)
2115 ieee80211_stop_queues(priv->hw);
2116
bb8c093b 2117 /* If we have not previously called iwl4965_init() then
b481de9c 2118 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2119 if (!iwl_is_init(priv)) {
b481de9c
ZY
2120 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2121 STATUS_RF_KILL_HW |
2122 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2123 STATUS_RF_KILL_SW |
9788864e
RC
2124 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2125 STATUS_GEO_CONFIGURED |
b481de9c 2126 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
2127 STATUS_IN_SUSPEND |
2128 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2129 STATUS_EXIT_PENDING;
b481de9c
ZY
2130 goto exit;
2131 }
2132
2133 /* ...otherwise clear out all the status bits but the RF Kill and
2134 * SUSPEND bits and continue taking the NIC down. */
2135 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2136 STATUS_RF_KILL_HW |
2137 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2138 STATUS_RF_KILL_SW |
9788864e
RC
2139 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2140 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2141 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2142 STATUS_IN_SUSPEND |
2143 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
2144 STATUS_FW_ERROR |
2145 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2146 STATUS_EXIT_PENDING;
b481de9c
ZY
2147
2148 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2149 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2150 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2151 spin_unlock_irqrestore(&priv->lock, flags);
2152
da1bc453 2153 iwl_txq_ctx_stop(priv);
b3bbacb7 2154 iwl_rxq_stop(priv);
b481de9c
ZY
2155
2156 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2157 if (!iwl_grab_nic_access(priv)) {
2158 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2159 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2160 iwl_release_nic_access(priv);
b481de9c
ZY
2161 }
2162 spin_unlock_irqrestore(&priv->lock, flags);
2163
2164 udelay(5);
2165
7f066108 2166 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG
2167 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
2168 priv->cfg->ops->lib->apm_ops.stop(priv);
2169 else
2170 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2171 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2172
2173 exit:
885ba202 2174 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2175
2176 if (priv->ibss_beacon)
2177 dev_kfree_skb(priv->ibss_beacon);
2178 priv->ibss_beacon = NULL;
2179
2180 /* clear out any free frames */
fcab423d 2181 iwl_clear_free_frames(priv);
b481de9c
ZY
2182}
2183
c79dd5b5 2184static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2185{
2186 mutex_lock(&priv->mutex);
bb8c093b 2187 __iwl4965_down(priv);
b481de9c 2188 mutex_unlock(&priv->mutex);
b24d22b1 2189
4e39317d 2190 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2191}
2192
2193#define MAX_HW_RESTARTS 5
2194
c79dd5b5 2195static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2196{
57aab75a
TW
2197 int i;
2198 int ret;
b481de9c
ZY
2199
2200 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2201 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2202 return -EIO;
2203 }
2204
e903fbd4
RC
2205 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2206 IWL_ERROR("ucode not available for device bringup\n");
2207 return -EIO;
2208 }
2209
e655b9f0 2210 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2211 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2212 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2213 else
e655b9f0 2214 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2215
c1842d61
TW
2216 if (iwl_is_rfkill(priv)) {
2217 iwl4965_enable_interrupts(priv);
3bff19c2
EG
2218 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2219 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2220 return 0;
b481de9c
ZY
2221 }
2222
3395f6e9 2223 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2224
399f4900
RR
2225 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2226 if (ret) {
2227 IWL_ERROR("Unable to allocate shared memory\n");
2228 return ret;
2229 }
2230
1053d35f 2231 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2232 if (ret) {
2233 IWL_ERROR("Unable to init nic\n");
2234 return ret;
b481de9c
ZY
2235 }
2236
2237 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2238 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2239 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2240 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2241
2242 /* clear (again), then enable host interrupts */
3395f6e9 2243 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2244 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2245
2246 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2247 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2248 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2249
2250 /* Copy original ucode data image from disk into backup cache.
2251 * This will be used to initialize the on-board processor's
2252 * data SRAM for a clean start when the runtime program first loads. */
2253 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2254 priv->ucode_data.len);
b481de9c 2255
b481de9c
ZY
2256 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2257
37deb2a0 2258 iwl_clear_stations_table(priv);
b481de9c
ZY
2259
2260 /* load bootstrap state machine,
2261 * load bootstrap program into processor's memory,
2262 * prepare to load the "initialize" uCode */
57aab75a 2263 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2264
57aab75a
TW
2265 if (ret) {
2266 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2267 continue;
2268 }
2269
f3d5b45b
EG
2270 /* Clear out the uCode error bit if it is set */
2271 clear_bit(STATUS_FW_ERROR, &priv->status);
2272
b481de9c 2273 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2274 iwl4965_nic_start(priv);
b481de9c 2275
b481de9c
ZY
2276 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2277
2278 return 0;
2279 }
2280
2281 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2282 __iwl4965_down(priv);
64e72c3e 2283 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2284
2285 /* tried to restart and config the device for as long as our
2286 * patience could withstand */
2287 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2288 return -EIO;
2289}
2290
2291
2292/*****************************************************************************
2293 *
2294 * Workqueue callbacks
2295 *
2296 *****************************************************************************/
2297
4a4a9e81 2298static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2299{
c79dd5b5
TW
2300 struct iwl_priv *priv =
2301 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2302
2303 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2304 return;
2305
2306 mutex_lock(&priv->mutex);
f3ccc08c 2307 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2308 mutex_unlock(&priv->mutex);
2309}
2310
4a4a9e81 2311static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2312{
c79dd5b5
TW
2313 struct iwl_priv *priv =
2314 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2315
2316 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2317 return;
2318
2319 mutex_lock(&priv->mutex);
4a4a9e81 2320 iwl_alive_start(priv);
b481de9c 2321 mutex_unlock(&priv->mutex);
10d0bd56 2322 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY
2323}
2324
bb8c093b 2325static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2326{
c79dd5b5 2327 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2328
2329 wake_up_interruptible(&priv->wait_command_queue);
2330
2331 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2332 return;
2333
2334 mutex_lock(&priv->mutex);
2335
fee1247a 2336 if (!iwl_is_rfkill(priv)) {
f3d67999 2337 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2338 "HW and/or SW RF Kill no longer active, restarting "
2339 "device\n");
2340 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2341 queue_work(priv->workqueue, &priv->restart);
2342 } else {
ad97edd2
MA
2343 /* make sure mac80211 stop sending Tx frame */
2344 if (priv->mac80211_registered)
2345 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2346
2347 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2348 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2349 "disabled by SW switch\n");
2350 else
2351 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2352 "Kill switch must be turned off for "
2353 "wireless networking to work.\n");
2354 }
2355 mutex_unlock(&priv->mutex);
80fcc9e2 2356 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2357}
2358
4419e39b
AK
2359static void iwl4965_bg_set_monitor(struct work_struct *work)
2360{
2361 struct iwl_priv *priv = container_of(work,
2362 struct iwl_priv, set_monitor);
c46fbefa 2363 int ret;
4419e39b
AK
2364
2365 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2366
2367 mutex_lock(&priv->mutex);
2368
05c914fe 2369 ret = iwl4965_set_mode(priv, NL80211_IFTYPE_MONITOR);
c46fbefa
AK
2370
2371 if (ret) {
2372 if (ret == -EAGAIN)
2373 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2374 else
2375 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2376 }
4419e39b
AK
2377
2378 mutex_unlock(&priv->mutex);
2379}
2380
16e727e8
EG
2381static void iwl_bg_run_time_calib_work(struct work_struct *work)
2382{
2383 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2384 run_time_calib_work);
2385
2386 mutex_lock(&priv->mutex);
2387
2388 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2389 test_bit(STATUS_SCANNING, &priv->status)) {
2390 mutex_unlock(&priv->mutex);
2391 return;
2392 }
2393
2394 if (priv->start_calib) {
2395 iwl_chain_noise_calibration(priv, &priv->statistics);
2396
2397 iwl_sensitivity_calibration(priv, &priv->statistics);
2398 }
2399
2400 mutex_unlock(&priv->mutex);
2401 return;
2402}
2403
bb8c093b 2404static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2405{
c79dd5b5 2406 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2407
2408 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2409 return;
2410
2411 mutex_lock(&priv->mutex);
bb8c093b 2412 __iwl4965_up(priv);
b481de9c 2413 mutex_unlock(&priv->mutex);
80fcc9e2 2414 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
2415}
2416
bb8c093b 2417static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2418{
c79dd5b5 2419 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2420
2421 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2422 return;
2423
bb8c093b 2424 iwl4965_down(priv);
b481de9c
ZY
2425 queue_work(priv->workqueue, &priv->up);
2426}
2427
bb8c093b 2428static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2429{
c79dd5b5
TW
2430 struct iwl_priv *priv =
2431 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2432
2433 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2434 return;
2435
2436 mutex_lock(&priv->mutex);
a55360e4 2437 iwl_rx_replenish(priv);
b481de9c
ZY
2438 mutex_unlock(&priv->mutex);
2439}
2440
7878a5a4
MA
2441#define IWL_DELAY_NEXT_SCAN (HZ*2)
2442
508e32e1 2443static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2444{
b481de9c 2445 struct ieee80211_conf *conf = NULL;
857485c0 2446 int ret = 0;
1ff50bda 2447 unsigned long flags;
b481de9c 2448
05c914fe 2449 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3ac7f146 2450 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2451 return;
2452 }
2453
e174961c
JB
2454 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
2455 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
2456
2457
2458 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2459 return;
2460
b481de9c 2461
508e32e1 2462 if (!priv->vif || !priv->is_open)
948c171c 2463 return;
508e32e1 2464
c90a74ba 2465 iwl_power_cancel_timeout(priv);
2a421b91 2466 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2467
b481de9c
ZY
2468 conf = ieee80211_get_hw_conf(priv->hw);
2469
2470 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2471 iwl4965_commit_rxon(priv);
b481de9c 2472
3195c1f3 2473 iwl_setup_rxon_timing(priv);
857485c0 2474 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2475 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2476 if (ret)
b481de9c
ZY
2477 IWL_WARNING("REPLY_RXON_TIMING failed - "
2478 "Attempting to continue.\n");
2479
2480 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2481
42eb7c64 2482 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2483
c7de35cd 2484 iwl_set_rxon_chain(priv);
b481de9c
ZY
2485 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2486
2487 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2488 priv->assoc_id, priv->beacon_int);
2489
2490 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2491 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2492 else
2493 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2494
2495 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2496 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2497 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2498 else
2499 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2500
05c914fe 2501 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2502 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2503
2504 }
2505
bb8c093b 2506 iwl4965_commit_rxon(priv);
b481de9c
ZY
2507
2508 switch (priv->iw_mode) {
05c914fe 2509 case NL80211_IFTYPE_STATION:
b481de9c
ZY
2510 break;
2511
05c914fe 2512 case NL80211_IFTYPE_ADHOC:
b481de9c 2513
c46fbefa
AK
2514 /* assume default assoc id */
2515 priv->assoc_id = 1;
b481de9c 2516
4f40e4d9 2517 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b 2518 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2519
2520 break;
2521
2522 default:
2523 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2524 __func__, priv->iw_mode);
b481de9c
ZY
2525 break;
2526 }
2527
05c914fe 2528 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2529 priv->assoc_station_added = 1;
2530
1ff50bda
EG
2531 spin_lock_irqsave(&priv->lock, flags);
2532 iwl_activate_qos(priv, 0);
2533 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2534
04816448
GE
2535 /* the chain noise calibration will enabled PM upon completion
2536 * If chain noise has already been run, then we need to enable
2537 * power management here */
2538 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2539 iwl_power_enable_management(priv);
c90a74ba
EG
2540
2541 /* Enable Rx differential gain and sensitivity calibrations */
2542 iwl_chain_noise_reset(priv);
2543 priv->start_calib = 1;
2544
508e32e1
RC
2545}
2546
b481de9c
ZY
2547/*****************************************************************************
2548 *
2549 * mac80211 entry point functions
2550 *
2551 *****************************************************************************/
2552
154b25ce 2553#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2554
bb8c093b 2555static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2556{
c79dd5b5 2557 struct iwl_priv *priv = hw->priv;
5a66926a 2558 int ret;
cf88c433 2559 u16 pci_cmd;
b481de9c
ZY
2560
2561 IWL_DEBUG_MAC80211("enter\n");
2562
5a66926a
ZY
2563 if (pci_enable_device(priv->pci_dev)) {
2564 IWL_ERROR("Fail to pci_enable_device\n");
2565 return -ENODEV;
2566 }
2567 pci_restore_state(priv->pci_dev);
2568 pci_enable_msi(priv->pci_dev);
2569
cf88c433
TW
2570 /* enable interrupts if needed: hw bug w/a */
2571 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2572 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2573 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2574 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2575 }
2576
5a66926a
ZY
2577 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2578 DRV_NAME, priv);
2579 if (ret) {
2580 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2581 goto out_disable_msi;
2582 }
2583
b481de9c
ZY
2584 /* we should be verifying the device is ready to be opened */
2585 mutex_lock(&priv->mutex);
2586
c1adf9fb 2587 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2588 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2589 * ucode filename and max sizes are card-specific. */
b481de9c 2590
5a66926a
ZY
2591 if (!priv->ucode_code.len) {
2592 ret = iwl4965_read_ucode(priv);
2593 if (ret) {
2594 IWL_ERROR("Could not read microcode: %d\n", ret);
2595 mutex_unlock(&priv->mutex);
2596 goto out_release_irq;
2597 }
2598 }
b481de9c 2599
e655b9f0 2600 ret = __iwl4965_up(priv);
5a66926a 2601
b481de9c 2602 mutex_unlock(&priv->mutex);
5a66926a 2603
80fcc9e2
AG
2604 iwl_rfkill_set_hw_state(priv);
2605
e655b9f0
ZY
2606 if (ret)
2607 goto out_release_irq;
2608
c1842d61
TW
2609 if (iwl_is_rfkill(priv))
2610 goto out;
2611
e655b9f0
ZY
2612 IWL_DEBUG_INFO("Start UP work done.\n");
2613
2614 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2615 return 0;
2616
fe9b6b72 2617 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2618 * mac80211 will not be run successfully. */
154b25ce
EG
2619 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2620 test_bit(STATUS_READY, &priv->status),
2621 UCODE_READY_TIMEOUT);
2622 if (!ret) {
2623 if (!test_bit(STATUS_READY, &priv->status)) {
2624 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2625 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2626 ret = -ETIMEDOUT;
2627 goto out_release_irq;
5a66926a 2628 }
fe9b6b72 2629 }
0a078ffa 2630
c1842d61 2631out:
0a078ffa 2632 priv->is_open = 1;
b481de9c
ZY
2633 IWL_DEBUG_MAC80211("leave\n");
2634 return 0;
5a66926a
ZY
2635
2636out_release_irq:
2637 free_irq(priv->pci_dev->irq, priv);
2638out_disable_msi:
2639 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2640 pci_disable_device(priv->pci_dev);
2641 priv->is_open = 0;
2642 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2643 return ret;
b481de9c
ZY
2644}
2645
bb8c093b 2646static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2647{
c79dd5b5 2648 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2649
2650 IWL_DEBUG_MAC80211("enter\n");
948c171c 2651
e655b9f0
ZY
2652 if (!priv->is_open) {
2653 IWL_DEBUG_MAC80211("leave - skip\n");
2654 return;
2655 }
2656
b481de9c 2657 priv->is_open = 0;
5a66926a 2658
fee1247a 2659 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2660 /* stop mac, cancel any scan request and clear
2661 * RXON_FILTER_ASSOC_MSK BIT
2662 */
5a66926a 2663 mutex_lock(&priv->mutex);
2a421b91 2664 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2665 mutex_unlock(&priv->mutex);
fde3571f
MA
2666 }
2667
5a66926a
ZY
2668 iwl4965_down(priv);
2669
2670 flush_workqueue(priv->workqueue);
2671 free_irq(priv->pci_dev->irq, priv);
2672 pci_disable_msi(priv->pci_dev);
2673 pci_save_state(priv->pci_dev);
2674 pci_disable_device(priv->pci_dev);
948c171c 2675
b481de9c 2676 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2677}
2678
e039fa4a 2679static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2680{
c79dd5b5 2681 struct iwl_priv *priv = hw->priv;
b481de9c 2682
f3674227 2683 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2684
b481de9c 2685 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2686 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2687
e039fa4a 2688 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2689 dev_kfree_skb_any(skb);
2690
f3674227 2691 IWL_DEBUG_MACDUMP("leave\n");
b481de9c
ZY
2692 return 0;
2693}
2694
bb8c093b 2695static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2696 struct ieee80211_if_init_conf *conf)
2697{
c79dd5b5 2698 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2699 unsigned long flags;
2700
32bfd35d 2701 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2702
32bfd35d
JB
2703 if (priv->vif) {
2704 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2705 return -EOPNOTSUPP;
b481de9c
ZY
2706 }
2707
2708 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2709 priv->vif = conf->vif;
b481de9c
ZY
2710
2711 spin_unlock_irqrestore(&priv->lock, flags);
2712
2713 mutex_lock(&priv->mutex);
864792e3
TW
2714
2715 if (conf->mac_addr) {
e174961c 2716 IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
864792e3
TW
2717 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2718 }
b481de9c 2719
c46fbefa
AK
2720 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2721 /* we are not ready, will run again when ready */
2722 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2723
b481de9c
ZY
2724 mutex_unlock(&priv->mutex);
2725
5a66926a 2726 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2727 return 0;
2728}
2729
2730/**
bb8c093b 2731 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2732 *
2733 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2734 * be set inappropriately and the driver currently sets the hardware up to
2735 * use it whenever needed.
2736 */
bb8c093b 2737static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2738{
c79dd5b5 2739 struct iwl_priv *priv = hw->priv;
bf85ea4f 2740 const struct iwl_channel_info *ch_info;
b481de9c 2741 unsigned long flags;
76bb77e0 2742 int ret = 0;
82a66bbb 2743 u16 channel;
b481de9c
ZY
2744
2745 mutex_lock(&priv->mutex);
8318d78a 2746 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2747
14a08a7f 2748 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2749 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2750 goto out;
64e72c3e
MA
2751 }
2752
14a08a7f
EG
2753 if (!conf->radio_enabled)
2754 iwl_radio_kill_sw_disable_radio(priv);
2755
fee1247a 2756 if (!iwl_is_ready(priv)) {
b481de9c 2757 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2758 ret = -EIO;
2759 goto out;
b481de9c
ZY
2760 }
2761
1ea87396 2762 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2763 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2764 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2765 mutex_unlock(&priv->mutex);
a0646470 2766 return 0;
b481de9c
ZY
2767 }
2768
82a66bbb
TW
2769 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2770 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2771 if (!is_channel_valid(ch_info)) {
b481de9c 2772 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2773 ret = -EINVAL;
2774 goto out;
b481de9c
ZY
2775 }
2776
05c914fe 2777 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76
AK
2778 !is_channel_ibss(ch_info)) {
2779 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2780 conf->channel->hw_value, conf->channel->band);
2781 ret = -EINVAL;
2782 goto out;
2783 }
2784
82a66bbb
TW
2785 spin_lock_irqsave(&priv->lock, flags);
2786
b5d7be5e 2787
78330fdd 2788 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2789 * from any ht related info since 2.4 does not
2790 * support ht */
82a66bbb 2791 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2792#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2793 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2794#endif
2795 )
2796 priv->staging_rxon.flags = 0;
b481de9c 2797
17e72782 2798 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2799
82a66bbb 2800 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2801
2802 /* The list of supported rates and rate mask can be different
8318d78a 2803 * for each band; since the band may have changed, reset
b481de9c 2804 * the rate mask to what mac80211 lists */
bb8c093b 2805 iwl4965_set_rate(priv);
b481de9c
ZY
2806
2807 spin_unlock_irqrestore(&priv->lock, flags);
2808
2809#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2810 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2811 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2812 goto out;
b481de9c
ZY
2813 }
2814#endif
2815
b481de9c
ZY
2816 if (!conf->radio_enabled) {
2817 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2818 goto out;
b481de9c
ZY
2819 }
2820
fee1247a 2821 if (iwl_is_rfkill(priv)) {
b481de9c 2822 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2823 ret = -EIO;
2824 goto out;
b481de9c
ZY
2825 }
2826
e602cb18
EK
2827 if (conf->flags & IEEE80211_CONF_PS)
2828 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2829 else
2830 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2831 if (ret)
2832 IWL_DEBUG_MAC80211("Error setting power level\n");
2833
630fe9b6
TW
2834 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2835 priv->tx_power_user_lmt, conf->power_level);
2836
2837 iwl_set_tx_power(priv, conf->power_level, false);
2838
bb8c093b 2839 iwl4965_set_rate(priv);
b481de9c
ZY
2840
2841 if (memcmp(&priv->active_rxon,
2842 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2843 iwl4965_commit_rxon(priv);
b481de9c
ZY
2844 else
2845 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2846
2847 IWL_DEBUG_MAC80211("leave\n");
2848
a0646470 2849out:
5a66926a 2850 mutex_unlock(&priv->mutex);
76bb77e0 2851 return ret;
b481de9c
ZY
2852}
2853
c79dd5b5 2854static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2855{
857485c0 2856 int ret = 0;
1ff50bda 2857 unsigned long flags;
b481de9c 2858
d986bcd1 2859 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2860 return;
2861
2862 /* The following should be done only at AP bring up */
3195c1f3 2863 if (!iwl_is_associated(priv)) {
b481de9c
ZY
2864
2865 /* RXON - unassoc (to set timing command) */
2866 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2867 iwl4965_commit_rxon(priv);
b481de9c
ZY
2868
2869 /* RXON Timing */
3195c1f3 2870 iwl_setup_rxon_timing(priv);
857485c0 2871 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2872 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2873 if (ret)
b481de9c
ZY
2874 IWL_WARNING("REPLY_RXON_TIMING failed - "
2875 "Attempting to continue.\n");
2876
c7de35cd 2877 iwl_set_rxon_chain(priv);
b481de9c
ZY
2878
2879 /* FIXME: what should be the assoc_id for AP? */
2880 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2881 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2882 priv->staging_rxon.flags |=
2883 RXON_FLG_SHORT_PREAMBLE_MSK;
2884 else
2885 priv->staging_rxon.flags &=
2886 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2887
2888 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2889 if (priv->assoc_capability &
2890 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2891 priv->staging_rxon.flags |=
2892 RXON_FLG_SHORT_SLOT_MSK;
2893 else
2894 priv->staging_rxon.flags &=
2895 ~RXON_FLG_SHORT_SLOT_MSK;
2896
05c914fe 2897 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY
2898 priv->staging_rxon.flags &=
2899 ~RXON_FLG_SHORT_SLOT_MSK;
2900 }
2901 /* restore RXON assoc */
2902 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2903 iwl4965_commit_rxon(priv);
1ff50bda
EG
2904 spin_lock_irqsave(&priv->lock, flags);
2905 iwl_activate_qos(priv, 1);
2906 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2907 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2908 }
bb8c093b 2909 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2910
2911 /* FIXME - we need to add code here to detect a totally new
2912 * configuration, reset the AP, unassoc, rxon timing, assoc,
2913 * clear sta table, add BCAST sta... */
2914}
2915
9d139c81
JB
2916/* temporary */
2917static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
2918
32bfd35d
JB
2919static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2920 struct ieee80211_vif *vif,
b481de9c
ZY
2921 struct ieee80211_if_conf *conf)
2922{
c79dd5b5 2923 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2924 unsigned long flags;
2925 int rc;
2926
2927 if (conf == NULL)
2928 return -EIO;
2929
b716bb91
EG
2930 if (priv->vif != vif) {
2931 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2932 return 0;
2933 }
2934
05c914fe 2935 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
2936 conf->changed & IEEE80211_IFCC_BEACON) {
2937 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2938 if (!beacon)
2939 return -ENOMEM;
2940 rc = iwl4965_mac_beacon_update(hw, beacon);
2941 if (rc)
2942 return rc;
2943 }
2944
05c914fe 2945 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
9d139c81 2946 (!conf->ssid_len)) {
b481de9c
ZY
2947 IWL_DEBUG_MAC80211
2948 ("Leaving in AP mode because HostAPD is not ready.\n");
2949 return 0;
2950 }
2951
fee1247a 2952 if (!iwl_is_alive(priv))
5a66926a
ZY
2953 return -EAGAIN;
2954
b481de9c
ZY
2955 mutex_lock(&priv->mutex);
2956
b481de9c 2957 if (conf->bssid)
e174961c 2958 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 2959
4150c572
JB
2960/*
2961 * very dubious code was here; the probe filtering flag is never set:
2962 *
b481de9c
ZY
2963 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2964 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2965 */
b481de9c 2966
05c914fe 2967 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
2968 if (!conf->bssid) {
2969 conf->bssid = priv->mac_addr;
2970 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB
2971 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
2972 conf->bssid);
b481de9c
ZY
2973 }
2974 if (priv->ibss_beacon)
2975 dev_kfree_skb(priv->ibss_beacon);
2976
9d139c81 2977 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
2978 }
2979
fee1247a 2980 if (iwl_is_rfkill(priv))
fde3571f
MA
2981 goto done;
2982
b481de9c
ZY
2983 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2984 !is_multicast_ether_addr(conf->bssid)) {
2985 /* If there is currently a HW scan going on in the background
2986 * then we need to cancel it else the RXON below will fail. */
2a421b91 2987 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
2988 IWL_WARNING("Aborted scan still in progress "
2989 "after 100ms\n");
2990 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2991 mutex_unlock(&priv->mutex);
2992 return -EAGAIN;
2993 }
2994 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2995
2996 /* TODO: Audit driver for usage of these members and see
2997 * if mac80211 deprecates them (priv->bssid looks like it
2998 * shouldn't be there, but I haven't scanned the IBSS code
2999 * to verify) - jpk */
3000 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
3001
05c914fe 3002 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 3003 iwl4965_config_ap(priv);
b481de9c 3004 else {
bb8c093b 3005 rc = iwl4965_commit_rxon(priv);
05c914fe 3006 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 3007 iwl_rxon_add_station(
b481de9c
ZY
3008 priv, priv->active_rxon.bssid_addr, 1);
3009 }
3010
3011 } else {
2a421b91 3012 iwl_scan_cancel_timeout(priv, 100);
b481de9c 3013 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3014 iwl4965_commit_rxon(priv);
b481de9c
ZY
3015 }
3016
fde3571f 3017 done:
b481de9c
ZY
3018 spin_lock_irqsave(&priv->lock, flags);
3019 if (!conf->ssid_len)
3020 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3021 else
3022 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3023
3024 priv->essid_len = conf->ssid_len;
3025 spin_unlock_irqrestore(&priv->lock, flags);
3026
3027 IWL_DEBUG_MAC80211("leave\n");
3028 mutex_unlock(&priv->mutex);
3029
3030 return 0;
3031}
3032
bb8c093b 3033static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3034 unsigned int changed_flags,
3035 unsigned int *total_flags,
3036 int mc_count, struct dev_addr_list *mc_list)
3037{
4419e39b 3038 struct iwl_priv *priv = hw->priv;
25b3f57c
RF
3039
3040 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
3041 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
05c914fe 3042 NL80211_IFTYPE_MONITOR,
25b3f57c
RF
3043 changed_flags, *total_flags);
3044 /* queue work 'cuz mac80211 is holding a lock which
3045 * prevents us from issuing (synchronous) f/w cmds */
3046 queue_work(priv->workqueue, &priv->set_monitor);
4419e39b 3047 }
25b3f57c
RF
3048 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
3049 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB
3050}
3051
bb8c093b 3052static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3053 struct ieee80211_if_init_conf *conf)
3054{
c79dd5b5 3055 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3056
3057 IWL_DEBUG_MAC80211("enter\n");
3058
3059 mutex_lock(&priv->mutex);
948c171c 3060
fee1247a 3061 if (iwl_is_ready_rf(priv)) {
2a421b91 3062 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3063 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3064 iwl4965_commit_rxon(priv);
3065 }
32bfd35d
JB
3066 if (priv->vif == conf->vif) {
3067 priv->vif = NULL;
b481de9c
ZY
3068 memset(priv->bssid, 0, ETH_ALEN);
3069 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3070 priv->essid_len = 0;
3071 }
3072 mutex_unlock(&priv->mutex);
3073
3074 IWL_DEBUG_MAC80211("leave\n");
3075
3076}
471b3efd 3077
3109ece1 3078#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3079static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3080 struct ieee80211_vif *vif,
3081 struct ieee80211_bss_conf *bss_conf,
3082 u32 changes)
220173b0 3083{
c79dd5b5 3084 struct iwl_priv *priv = hw->priv;
220173b0 3085
3109ece1
TW
3086 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3087
471b3efd 3088 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3089 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3090 bss_conf->use_short_preamble);
471b3efd 3091 if (bss_conf->use_short_preamble)
220173b0
TW
3092 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3093 else
3094 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3095 }
3096
471b3efd 3097 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3098 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3099 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3100 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3101 else
3102 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3103 }
3104
98952d5d 3105 if (changes & BSS_CHANGED_HT) {
3109ece1 3106 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3107 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3108 iwl_set_rxon_chain(priv);
98952d5d
TW
3109 }
3110
471b3efd 3111 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3112 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3113 /* This should never happen as this function should
3114 * never be called from interrupt context. */
3115 if (WARN_ON_ONCE(in_interrupt()))
3116 return;
3109ece1
TW
3117 if (bss_conf->assoc) {
3118 priv->assoc_id = bss_conf->aid;
3119 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 3120 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW
3121 priv->timestamp = bss_conf->timestamp;
3122 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW
3123
3124 /* we have just associated, don't start scan too early
3125 * leave time for EAPOL exchange to complete
3126 */
3109ece1
TW
3127 priv->next_scan_jiffies = jiffies +
3128 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3129 mutex_lock(&priv->mutex);
3130 iwl4965_post_associate(priv);
3131 mutex_unlock(&priv->mutex);
3109ece1
TW
3132 } else {
3133 priv->assoc_id = 0;
3134 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3135 }
3136 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3137 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3138 iwl_send_rxon_assoc(priv);
471b3efd
JB
3139 }
3140
220173b0 3141}
b481de9c 3142
cb43dc25 3143static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 3144{
b481de9c 3145 unsigned long flags;
c79dd5b5 3146 struct iwl_priv *priv = hw->priv;
8d09a5e1 3147 int ret;
b481de9c
ZY
3148
3149 IWL_DEBUG_MAC80211("enter\n");
3150
052c4b9f 3151 mutex_lock(&priv->mutex);
b481de9c
ZY
3152 spin_lock_irqsave(&priv->lock, flags);
3153
fee1247a 3154 if (!iwl_is_ready_rf(priv)) {
cb43dc25 3155 ret = -EIO;
b481de9c
ZY
3156 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3157 goto out_unlock;
3158 }
3159
05c914fe 3160 if (priv->iw_mode == NL80211_IFTYPE_AP) { /* APs don't scan */
cb43dc25 3161 ret = -EIO;
b481de9c
ZY
3162 IWL_ERROR("ERROR: APs don't scan\n");
3163 goto out_unlock;
3164 }
3165
8d09a5e1
TW
3166 /* We don't schedule scan within next_scan_jiffies period.
3167 * Avoid scanning during possible EAPOL exchange, return
3168 * success immediately.
3169 */
7878a5a4 3170 if (priv->next_scan_jiffies &&
cb43dc25 3171 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 3172 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW
3173 queue_work(priv->workqueue, &priv->scan_completed);
3174 ret = 0;
7878a5a4
MA
3175 goto out_unlock;
3176 }
8d09a5e1 3177
b481de9c 3178 /* if we just finished scan ask for delay */
681c0050 3179 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 3180 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 3181 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW
3182 queue_work(priv->workqueue, &priv->scan_completed);
3183 ret = 0;
b481de9c
ZY
3184 goto out_unlock;
3185 }
8d09a5e1 3186
cb43dc25 3187 if (ssid_len) {
b481de9c 3188 priv->one_direct_scan = 1;
cb43dc25 3189 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 3190 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 3191 } else {
948c171c 3192 priv->one_direct_scan = 0;
cb43dc25 3193 }
b481de9c 3194
cb43dc25 3195 ret = iwl_scan_initiate(priv);
b481de9c
ZY
3196
3197 IWL_DEBUG_MAC80211("leave\n");
3198
3199out_unlock:
3200 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3201 mutex_unlock(&priv->mutex);
b481de9c 3202
cb43dc25 3203 return ret;
b481de9c
ZY
3204}
3205
ab885f8c
EG
3206static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3207 struct ieee80211_key_conf *keyconf, const u8 *addr,
3208 u32 iv32, u16 *phase1key)
3209{
3210 struct iwl_priv *priv = hw->priv;
3211 u8 sta_id = IWL_INVALID_STATION;
3212 unsigned long flags;
3213 __le16 key_flags = 0;
3214 int i;
ab885f8c
EG
3215
3216 IWL_DEBUG_MAC80211("enter\n");
3217
947b13a7 3218 sta_id = iwl_find_station(priv, addr);
ab885f8c 3219 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB
3220 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3221 addr);
ab885f8c
EG
3222 return;
3223 }
3224
2a421b91 3225 iwl_scan_cancel_timeout(priv, 100);
ab885f8c
EG
3226
3227 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3228 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3229 key_flags &= ~STA_KEY_FLG_INVALID;
3230
5425e490 3231 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3232 key_flags |= STA_KEY_MULTICAST_MSK;
3233
3234 spin_lock_irqsave(&priv->sta_lock, flags);
3235
ab885f8c
EG
3236 priv->stations[sta_id].sta.key.key_flags = key_flags;
3237 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3238
3239 for (i = 0; i < 5; i++)
3240 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3241 cpu_to_le16(phase1key[i]);
3242
3243 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3244 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3245
133636de 3246 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3247
3248 spin_unlock_irqrestore(&priv->sta_lock, flags);
3249
3250 IWL_DEBUG_MAC80211("leave\n");
3251}
3252
bb8c093b 3253static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3254 const u8 *local_addr, const u8 *addr,
3255 struct ieee80211_key_conf *key)
3256{
c79dd5b5 3257 struct iwl_priv *priv = hw->priv;
deb09c43
EG
3258 int ret = 0;
3259 u8 sta_id = IWL_INVALID_STATION;
6974e363 3260 u8 is_default_wep_key = 0;
b481de9c
ZY
3261
3262 IWL_DEBUG_MAC80211("enter\n");
3263
099b40b7 3264 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3265 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3266 return -EOPNOTSUPP;
3267 }
3268
3269 if (is_zero_ether_addr(addr))
3270 /* only support pairwise keys */
3271 return -EOPNOTSUPP;
3272
947b13a7 3273 sta_id = iwl_find_station(priv, addr);
6974e363 3274 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB
3275 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3276 addr);
6974e363 3277 return -EINVAL;
b481de9c 3278
deb09c43 3279 }
b481de9c 3280
6974e363 3281 mutex_lock(&priv->mutex);
2a421b91 3282 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3283 mutex_unlock(&priv->mutex);
3284
3285 /* If we are getting WEP group key and we didn't receive any key mapping
3286 * so far, we are in legacy wep mode (group key only), otherwise we are
3287 * in 1X mode.
3288 * In legacy wep mode, we use another host command to the uCode */
5425e490 3289 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3290 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG
3291 if (cmd == SET_KEY)
3292 is_default_wep_key = !priv->key_mapping_key;
3293 else
ccc038ab
EG
3294 is_default_wep_key =
3295 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3296 }
052c4b9f 3297
b481de9c 3298 switch (cmd) {
deb09c43 3299 case SET_KEY:
6974e363
EG
3300 if (is_default_wep_key)
3301 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3302 else
7480513f 3303 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3304
3305 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3306 break;
3307 case DISABLE_KEY:
6974e363
EG
3308 if (is_default_wep_key)
3309 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3310 else
3ec47732 3311 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3312
3313 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3314 break;
3315 default:
deb09c43 3316 ret = -EINVAL;
b481de9c
ZY
3317 }
3318
3319 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3320
deb09c43 3321 return ret;
b481de9c
ZY
3322}
3323
e100bb64 3324static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3325 const struct ieee80211_tx_queue_params *params)
3326{
c79dd5b5 3327 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3328 unsigned long flags;
3329 int q;
b481de9c
ZY
3330
3331 IWL_DEBUG_MAC80211("enter\n");
3332
fee1247a 3333 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3334 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3335 return -EIO;
3336 }
3337
3338 if (queue >= AC_NUM) {
3339 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3340 return 0;
3341 }
3342
b481de9c
ZY
3343 if (!priv->qos_data.qos_enable) {
3344 priv->qos_data.qos_active = 0;
3345 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3346 return 0;
3347 }
3348 q = AC_NUM - 1 - queue;
3349
3350 spin_lock_irqsave(&priv->lock, flags);
3351
3352 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3353 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3354 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3355 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3356 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3357
3358 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3359 priv->qos_data.qos_active = 1;
3360
05c914fe 3361 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3362 iwl_activate_qos(priv, 1);
3109ece1 3363 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3364 iwl_activate_qos(priv, 0);
b481de9c 3365
1ff50bda 3366 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3367
b481de9c
ZY
3368 IWL_DEBUG_MAC80211("leave\n");
3369 return 0;
3370}
3371
d783b061
TW
3372static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3373 enum ieee80211_ampdu_mlme_action action,
17741cdc 3374 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW
3375{
3376 struct iwl_priv *priv = hw->priv;
d783b061 3377
e174961c
JB
3378 IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
3379 sta->addr, tid);
d783b061
TW
3380
3381 if (!(priv->cfg->sku & IWL_SKU_N))
3382 return -EACCES;
3383
3384 switch (action) {
3385 case IEEE80211_AMPDU_RX_START:
3386 IWL_DEBUG_HT("start Rx\n");
17741cdc 3387 return iwl_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW
3388 case IEEE80211_AMPDU_RX_STOP:
3389 IWL_DEBUG_HT("stop Rx\n");
17741cdc 3390 return iwl_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3391 case IEEE80211_AMPDU_TX_START:
3392 IWL_DEBUG_HT("start Tx\n");
17741cdc 3393 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW
3394 case IEEE80211_AMPDU_TX_STOP:
3395 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3396 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW
3397 default:
3398 IWL_DEBUG_HT("unknown\n");
3399 return -EINVAL;
3400 break;
3401 }
3402 return 0;
3403}
bb8c093b 3404static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3405 struct ieee80211_tx_queue_stats *stats)
3406{
c79dd5b5 3407 struct iwl_priv *priv = hw->priv;
b481de9c 3408 int i, avail;
16466903 3409 struct iwl_tx_queue *txq;
443cfd45 3410 struct iwl_queue *q;
b481de9c
ZY
3411 unsigned long flags;
3412
3413 IWL_DEBUG_MAC80211("enter\n");
3414
fee1247a 3415 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3416 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3417 return -EIO;
3418 }
3419
3420 spin_lock_irqsave(&priv->lock, flags);
3421
3422 for (i = 0; i < AC_NUM; i++) {
3423 txq = &priv->txq[i];
3424 q = &txq->q;
443cfd45 3425 avail = iwl_queue_space(q);
b481de9c 3426
57ffc589
JB
3427 stats[i].len = q->n_window - avail;
3428 stats[i].limit = q->n_window - q->high_mark;
3429 stats[i].count = q->n_window;
b481de9c
ZY
3430
3431 }
3432 spin_unlock_irqrestore(&priv->lock, flags);
3433
3434 IWL_DEBUG_MAC80211("leave\n");
3435
3436 return 0;
3437}
3438
bb8c093b 3439static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3440 struct ieee80211_low_level_stats *stats)
3441{
bf403db8
EK
3442 struct iwl_priv *priv = hw->priv;
3443
3444 priv = hw->priv;
b481de9c
ZY
3445 IWL_DEBUG_MAC80211("enter\n");
3446 IWL_DEBUG_MAC80211("leave\n");
3447
3448 return 0;
3449}
3450
bb8c093b 3451static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3452{
c79dd5b5 3453 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3454 unsigned long flags;
3455
3456 mutex_lock(&priv->mutex);
3457 IWL_DEBUG_MAC80211("enter\n");
3458
b481de9c 3459 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3460 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3461 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3462
c7de35cd 3463 iwl_reset_qos(priv);
b481de9c 3464
b481de9c
ZY
3465 spin_lock_irqsave(&priv->lock, flags);
3466 priv->assoc_id = 0;
3467 priv->assoc_capability = 0;
b481de9c
ZY
3468 priv->assoc_station_added = 0;
3469
3470 /* new association get rid of ibss beacon skb */
3471 if (priv->ibss_beacon)
3472 dev_kfree_skb(priv->ibss_beacon);
3473
3474 priv->ibss_beacon = NULL;
3475
3476 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3477 priv->timestamp = 0;
05c914fe 3478 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
3479 priv->beacon_int = 0;
3480
3481 spin_unlock_irqrestore(&priv->lock, flags);
3482
fee1247a 3483 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3484 IWL_DEBUG_MAC80211("leave - not ready\n");
3485 mutex_unlock(&priv->mutex);
3486 return;
3487 }
3488
052c4b9f 3489 /* we are restarting association process
3490 * clear RXON_FILTER_ASSOC_MSK bit
3491 */
05c914fe 3492 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3493 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3494 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3495 iwl4965_commit_rxon(priv);
052c4b9f 3496 }
3497
5da4b55f
MA
3498 iwl_power_update_mode(priv, 0);
3499
b481de9c 3500 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3501 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3502
c90a74ba
EG
3503 /* switch to CAM during association period.
3504 * the ucode will block any association/authentication
3505 * frome during assiciation period if it can not hear
3506 * the AP because of PM. the timer enable PM back is
3507 * association do not complete
3508 */
3509 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3510 IEEE80211_CHAN_RADAR))
3511 iwl_power_disable_management(priv, 3000);
3512
b481de9c
ZY
3513 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3514 mutex_unlock(&priv->mutex);
3515 return;
3516 }
3517
bb8c093b 3518 iwl4965_set_rate(priv);
b481de9c
ZY
3519
3520 mutex_unlock(&priv->mutex);
3521
3522 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3523}
3524
e039fa4a 3525static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3526{
c79dd5b5 3527 struct iwl_priv *priv = hw->priv;
b481de9c 3528 unsigned long flags;
2ff75b78 3529 __le64 timestamp;
b481de9c
ZY
3530
3531 mutex_lock(&priv->mutex);
3532 IWL_DEBUG_MAC80211("enter\n");
3533
fee1247a 3534 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3535 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3536 mutex_unlock(&priv->mutex);
3537 return -EIO;
3538 }
3539
05c914fe 3540 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c
ZY
3541 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3542 mutex_unlock(&priv->mutex);
3543 return -EIO;
3544 }
3545
3546 spin_lock_irqsave(&priv->lock, flags);
3547
3548 if (priv->ibss_beacon)
3549 dev_kfree_skb(priv->ibss_beacon);
3550
3551 priv->ibss_beacon = skb;
3552
3553 priv->assoc_id = 0;
2ff75b78 3554 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3555 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY
3556
3557 IWL_DEBUG_MAC80211("leave\n");
3558 spin_unlock_irqrestore(&priv->lock, flags);
3559
c7de35cd 3560 iwl_reset_qos(priv);
b481de9c 3561
c46fbefa 3562 iwl4965_post_associate(priv);
b481de9c
ZY
3563
3564 mutex_unlock(&priv->mutex);
3565
3566 return 0;
3567}
3568
b481de9c
ZY
3569/*****************************************************************************
3570 *
3571 * sysfs attributes
3572 *
3573 *****************************************************************************/
3574
0a6857e7 3575#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3576
3577/*
3578 * The following adds a new attribute to the sysfs representation
3579 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3580 * used for controlling the debug level.
3581 *
3582 * See the level definitions in iwl for details.
3583 */
3584
8cf769c6
EK
3585static ssize_t show_debug_level(struct device *d,
3586 struct device_attribute *attr, char *buf)
b481de9c 3587{
8cf769c6
EK
3588 struct iwl_priv *priv = d->driver_data;
3589
3590 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3591}
8cf769c6
EK
3592static ssize_t store_debug_level(struct device *d,
3593 struct device_attribute *attr,
b481de9c
ZY
3594 const char *buf, size_t count)
3595{
8cf769c6 3596 struct iwl_priv *priv = d->driver_data;
9257746f
TW
3597 unsigned long val;
3598 int ret;
b481de9c 3599
9257746f
TW
3600 ret = strict_strtoul(buf, 0, &val);
3601 if (ret)
b481de9c
ZY
3602 printk(KERN_INFO DRV_NAME
3603 ": %s is not in hex or decimal form.\n", buf);
3604 else
8cf769c6 3605 priv->debug_level = val;
b481de9c
ZY
3606
3607 return strnlen(buf, count);
3608}
3609
8cf769c6
EK
3610static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3611 show_debug_level, store_debug_level);
3612
b481de9c 3613
0a6857e7 3614#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3615
b481de9c 3616
bc6f59bc
TW
3617static ssize_t show_version(struct device *d,
3618 struct device_attribute *attr, char *buf)
3619{
3620 struct iwl_priv *priv = d->driver_data;
885ba202 3621 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3622 ssize_t pos = 0;
3623 u16 eeprom_ver;
bc6f59bc
TW
3624
3625 if (palive->is_valid)
f236a265
TW
3626 pos += sprintf(buf + pos,
3627 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3628 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3629 palive->ucode_major, palive->ucode_minor,
3630 palive->sw_rev[0], palive->sw_rev[1],
3631 palive->ver_type, palive->ver_subtype);
bc6f59bc 3632 else
f236a265
TW
3633 pos += sprintf(buf + pos, "fw not loaded\n");
3634
3635 if (priv->eeprom) {
3636 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3637 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3638 eeprom_ver);
3639 } else {
3640 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3641 }
3642
3643 return pos;
bc6f59bc
TW
3644}
3645
3646static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3647
b481de9c
ZY
3648static ssize_t show_temperature(struct device *d,
3649 struct device_attribute *attr, char *buf)
3650{
c79dd5b5 3651 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3652
fee1247a 3653 if (!iwl_is_alive(priv))
b481de9c
ZY
3654 return -EAGAIN;
3655
91dbc5bd 3656 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3657}
3658
3659static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3660
b481de9c
ZY
3661static ssize_t show_tx_power(struct device *d,
3662 struct device_attribute *attr, char *buf)
3663{
c79dd5b5 3664 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3665 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3666}
3667
3668static ssize_t store_tx_power(struct device *d,
3669 struct device_attribute *attr,
3670 const char *buf, size_t count)
3671{
c79dd5b5 3672 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3673 unsigned long val;
3674 int ret;
b481de9c 3675
9257746f
TW
3676 ret = strict_strtoul(buf, 10, &val);
3677 if (ret)
b481de9c
ZY
3678 printk(KERN_INFO DRV_NAME
3679 ": %s is not in decimal form.\n", buf);
3680 else
630fe9b6 3681 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3682
3683 return count;
3684}
3685
3686static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3687
3688static ssize_t show_flags(struct device *d,
3689 struct device_attribute *attr, char *buf)
3690{
c79dd5b5 3691 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3692
3693 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3694}
3695
3696static ssize_t store_flags(struct device *d,
3697 struct device_attribute *attr,
3698 const char *buf, size_t count)
3699{
c79dd5b5 3700 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3701 unsigned long val;
3702 u32 flags;
3703 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3704 if (ret)
9257746f
TW
3705 return ret;
3706 flags = (u32)val;
b481de9c
ZY
3707
3708 mutex_lock(&priv->mutex);
3709 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3710 /* Cancel any currently running scans... */
2a421b91 3711 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3712 IWL_WARNING("Could not cancel scan.\n");
3713 else {
9257746f 3714 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3715 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3716 iwl4965_commit_rxon(priv);
b481de9c
ZY
3717 }
3718 }
3719 mutex_unlock(&priv->mutex);
3720
3721 return count;
3722}
3723
3724static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3725
3726static ssize_t show_filter_flags(struct device *d,
3727 struct device_attribute *attr, char *buf)
3728{
c79dd5b5 3729 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3730
3731 return sprintf(buf, "0x%04X\n",
3732 le32_to_cpu(priv->active_rxon.filter_flags));
3733}
3734
3735static ssize_t store_filter_flags(struct device *d,
3736 struct device_attribute *attr,
3737 const char *buf, size_t count)
3738{
c79dd5b5 3739 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW
3740 unsigned long val;
3741 u32 filter_flags;
3742 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3743 if (ret)
9257746f
TW
3744 return ret;
3745 filter_flags = (u32)val;
b481de9c
ZY
3746
3747 mutex_lock(&priv->mutex);
3748 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3749 /* Cancel any currently running scans... */
2a421b91 3750 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3751 IWL_WARNING("Could not cancel scan.\n");
3752 else {
3753 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3754 "0x%04X\n", filter_flags);
3755 priv->staging_rxon.filter_flags =
3756 cpu_to_le32(filter_flags);
bb8c093b 3757 iwl4965_commit_rxon(priv);
b481de9c
ZY
3758 }
3759 }
3760 mutex_unlock(&priv->mutex);
3761
3762 return count;
3763}
3764
3765static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3766 store_filter_flags);
3767
4fc22b21 3768#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
3769
3770static ssize_t show_measurement(struct device *d,
3771 struct device_attribute *attr, char *buf)
3772{
c79dd5b5 3773 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3774 struct iwl4965_spectrum_notification measure_report;
b481de9c 3775 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3776 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3777 unsigned long flags;
3778
3779 spin_lock_irqsave(&priv->lock, flags);
3780 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3781 spin_unlock_irqrestore(&priv->lock, flags);
3782 return 0;
3783 }
3784 memcpy(&measure_report, &priv->measure_report, size);
3785 priv->measurement_status = 0;
3786 spin_unlock_irqrestore(&priv->lock, flags);
3787
3788 while (size && (PAGE_SIZE - len)) {
3789 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3790 PAGE_SIZE - len, 1);
3791 len = strlen(buf);
3792 if (PAGE_SIZE - len)
3793 buf[len++] = '\n';
3794
3795 ofs += 16;
3796 size -= min(size, 16U);
3797 }
3798
3799 return len;
3800}
3801
3802static ssize_t store_measurement(struct device *d,
3803 struct device_attribute *attr,
3804 const char *buf, size_t count)
3805{
c79dd5b5 3806 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3807 struct ieee80211_measurement_params params = {
3808 .channel = le16_to_cpu(priv->active_rxon.channel),
3809 .start_time = cpu_to_le64(priv->last_tsf),
3810 .duration = cpu_to_le16(1),
3811 };
3812 u8 type = IWL_MEASURE_BASIC;
3813 u8 buffer[32];
3814 u8 channel;
3815
3816 if (count) {
3817 char *p = buffer;
3818 strncpy(buffer, buf, min(sizeof(buffer), count));
3819 channel = simple_strtoul(p, NULL, 0);
3820 if (channel)
3821 params.channel = channel;
3822
3823 p = buffer;
3824 while (*p && *p != ' ')
3825 p++;
3826 if (*p)
3827 type = simple_strtoul(p + 1, NULL, 0);
3828 }
3829
3830 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3831 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3832 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3833
3834 return count;
3835}
3836
3837static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3838 show_measurement, store_measurement);
4fc22b21 3839#endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3840
3841static ssize_t store_retry_rate(struct device *d,
3842 struct device_attribute *attr,
3843 const char *buf, size_t count)
3844{
c79dd5b5 3845 struct iwl_priv *priv = dev_get_drvdata(d);
9257746f
TW
3846 long val;
3847 int ret = strict_strtol(buf, 10, &val);
3848 if (!ret)
3849 return ret;
b481de9c 3850
9257746f 3851 priv->retry_rate = (val > 0) ? val : 1;
b481de9c
ZY
3852
3853 return count;
3854}
3855
3856static ssize_t show_retry_rate(struct device *d,
3857 struct device_attribute *attr, char *buf)
3858{
c79dd5b5 3859 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3860 return sprintf(buf, "%d", priv->retry_rate);
3861}
3862
3863static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3864 store_retry_rate);
3865
3866static ssize_t store_power_level(struct device *d,
3867 struct device_attribute *attr,
3868 const char *buf, size_t count)
3869{
c79dd5b5 3870 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3871 int ret;
9257746f
TW
3872 unsigned long mode;
3873
b481de9c 3874
b481de9c
ZY
3875 mutex_lock(&priv->mutex);
3876
fee1247a 3877 if (!iwl_is_ready(priv)) {
298df1f6 3878 ret = -EAGAIN;
b481de9c
ZY
3879 goto out;
3880 }
3881
9257746f 3882 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3883 if (ret)
9257746f
TW
3884 goto out;
3885
298df1f6
EK
3886 ret = iwl_power_set_user_mode(priv, mode);
3887 if (ret) {
5da4b55f
MA
3888 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3889 goto out;
b481de9c 3890 }
298df1f6 3891 ret = count;
b481de9c
ZY
3892
3893 out:
3894 mutex_unlock(&priv->mutex);
298df1f6 3895 return ret;
b481de9c
ZY
3896}
3897
b481de9c
ZY
3898static ssize_t show_power_level(struct device *d,
3899 struct device_attribute *attr, char *buf)
3900{
c79dd5b5 3901 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK
3902 int mode = priv->power_data.user_power_setting;
3903 int system = priv->power_data.system_power_setting;
5da4b55f 3904 int level = priv->power_data.power_mode;
b481de9c
ZY
3905 char *p = buf;
3906
298df1f6
EK
3907 switch (system) {
3908 case IWL_POWER_SYS_AUTO:
3909 p += sprintf(p, "SYSTEM:auto");
b481de9c 3910 break;
298df1f6
EK
3911 case IWL_POWER_SYS_AC:
3912 p += sprintf(p, "SYSTEM:ac");
3913 break;
3914 case IWL_POWER_SYS_BATTERY:
3915 p += sprintf(p, "SYSTEM:battery");
b481de9c 3916 break;
b481de9c 3917 }
298df1f6
EK
3918
3919 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto");
3920 p += sprintf(p, "\tINDEX:%d", level);
3921 p += sprintf(p, "\n");
3ac7f146 3922 return p - buf + 1;
b481de9c
ZY
3923}
3924
3925static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3926 store_power_level);
3927
3928static ssize_t show_channels(struct device *d,
3929 struct device_attribute *attr, char *buf)
3930{
5d72a1f5
EK
3931
3932 struct iwl_priv *priv = dev_get_drvdata(d);
3933 struct ieee80211_channel *channels = NULL;
3934 const struct ieee80211_supported_band *supp_band = NULL;
3935 int len = 0, i;
3936 int count = 0;
3937
3938 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3939 return -EAGAIN;
3940
3941 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3942 channels = supp_band->channels;
3943 count = supp_band->n_channels;
3944
3945 len += sprintf(&buf[len],
3946 "Displaying %d channels in 2.4GHz band "
3947 "(802.11bg):\n", count);
3948
3949 for (i = 0; i < count; i++)
3950 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3951 ieee80211_frequency_to_channel(
3952 channels[i].center_freq),
3953 channels[i].max_power,
3954 channels[i].flags & IEEE80211_CHAN_RADAR ?
3955 " (IEEE 802.11h required)" : "",
3956 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3957 || (channels[i].flags &
3958 IEEE80211_CHAN_RADAR)) ? "" :
3959 ", IBSS",
3960 channels[i].flags &
3961 IEEE80211_CHAN_PASSIVE_SCAN ?
3962 "passive only" : "active/passive");
3963
3964 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3965 channels = supp_band->channels;
3966 count = supp_band->n_channels;
3967
3968 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3969 "(802.11a):\n", count);
3970
3971 for (i = 0; i < count; i++)
3972 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3973 ieee80211_frequency_to_channel(
3974 channels[i].center_freq),
3975 channels[i].max_power,
3976 channels[i].flags & IEEE80211_CHAN_RADAR ?
3977 " (IEEE 802.11h required)" : "",
3978 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3979 || (channels[i].flags &
3980 IEEE80211_CHAN_RADAR)) ? "" :
3981 ", IBSS",
3982 channels[i].flags &
3983 IEEE80211_CHAN_PASSIVE_SCAN ?
3984 "passive only" : "active/passive");
3985
3986 return len;
b481de9c
ZY
3987}
3988
3989static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3990
3991static ssize_t show_statistics(struct device *d,
3992 struct device_attribute *attr, char *buf)
3993{
c79dd5b5 3994 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3995 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3996 u32 len = 0, ofs = 0;
3ac7f146 3997 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY
3998 int rc = 0;
3999
fee1247a 4000 if (!iwl_is_alive(priv))
b481de9c
ZY
4001 return -EAGAIN;
4002
4003 mutex_lock(&priv->mutex);
49ea8596 4004 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4005 mutex_unlock(&priv->mutex);
4006
4007 if (rc) {
4008 len = sprintf(buf,
4009 "Error sending statistics request: 0x%08X\n", rc);
4010 return len;
4011 }
4012
4013 while (size && (PAGE_SIZE - len)) {
4014 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4015 PAGE_SIZE - len, 1);
4016 len = strlen(buf);
4017 if (PAGE_SIZE - len)
4018 buf[len++] = '\n';
4019
4020 ofs += 16;
4021 size -= min(size, 16U);
4022 }
4023
4024 return len;
4025}
4026
4027static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4028
b481de9c
ZY
4029static ssize_t show_status(struct device *d,
4030 struct device_attribute *attr, char *buf)
4031{
c79dd5b5 4032 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4033 if (!iwl_is_alive(priv))
b481de9c
ZY
4034 return -EAGAIN;
4035 return sprintf(buf, "0x%08x\n", (int)priv->status);
4036}
4037
4038static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4039
b481de9c
ZY
4040/*****************************************************************************
4041 *
4042 * driver setup and teardown
4043 *
4044 *****************************************************************************/
4045
4e39317d 4046static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4047{
4048 priv->workqueue = create_workqueue(DRV_NAME);
4049
4050 init_waitqueue_head(&priv->wait_command_queue);
4051
bb8c093b
CH
4052 INIT_WORK(&priv->up, iwl4965_bg_up);
4053 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4054 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4055 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4056 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4057 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4058 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW
4059 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4060 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 4061
2a421b91 4062 iwl_setup_scan_deferred_work(priv);
c90a74ba 4063 iwl_setup_power_deferred_work(priv);
bb8c093b 4064
4e39317d
EG
4065 if (priv->cfg->ops->lib->setup_deferred_work)
4066 priv->cfg->ops->lib->setup_deferred_work(priv);
4067
4068 init_timer(&priv->statistics_periodic);
4069 priv->statistics_periodic.data = (unsigned long)priv;
4070 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4071
4072 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4073 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4074}
4075
4e39317d 4076static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4077{
4e39317d
EG
4078 if (priv->cfg->ops->lib->cancel_deferred_work)
4079 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4080
3ae6a054 4081 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 4082 cancel_delayed_work(&priv->scan_check);
c90a74ba 4083 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 4084 cancel_delayed_work(&priv->alive_start);
b481de9c 4085 cancel_work_sync(&priv->beacon_update);
4e39317d 4086 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4087}
4088
bb8c093b 4089static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4090 &dev_attr_channels.attr,
b481de9c
ZY
4091 &dev_attr_flags.attr,
4092 &dev_attr_filter_flags.attr,
4fc22b21 4093#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY
4094 &dev_attr_measurement.attr,
4095#endif
4096 &dev_attr_power_level.attr,
4097 &dev_attr_retry_rate.attr,
b481de9c
ZY
4098 &dev_attr_statistics.attr,
4099 &dev_attr_status.attr,
4100 &dev_attr_temperature.attr,
b481de9c 4101 &dev_attr_tx_power.attr,
8cf769c6
EK
4102#ifdef CONFIG_IWLWIFI_DEBUG
4103 &dev_attr_debug_level.attr,
4104#endif
bc6f59bc 4105 &dev_attr_version.attr,
b481de9c
ZY
4106
4107 NULL
4108};
4109
bb8c093b 4110static struct attribute_group iwl4965_attribute_group = {
b481de9c 4111 .name = NULL, /* put in device directory */
bb8c093b 4112 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4113};
4114
bb8c093b
CH
4115static struct ieee80211_ops iwl4965_hw_ops = {
4116 .tx = iwl4965_mac_tx,
4117 .start = iwl4965_mac_start,
4118 .stop = iwl4965_mac_stop,
4119 .add_interface = iwl4965_mac_add_interface,
4120 .remove_interface = iwl4965_mac_remove_interface,
4121 .config = iwl4965_mac_config,
4122 .config_interface = iwl4965_mac_config_interface,
4123 .configure_filter = iwl4965_configure_filter,
4124 .set_key = iwl4965_mac_set_key,
ab885f8c 4125 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4126 .get_stats = iwl4965_mac_get_stats,
4127 .get_tx_stats = iwl4965_mac_get_tx_stats,
4128 .conf_tx = iwl4965_mac_conf_tx,
bb8c093b 4129 .reset_tsf = iwl4965_mac_reset_tsf,
471b3efd 4130 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4131 .ampdu_action = iwl4965_mac_ampdu_action,
cb43dc25 4132 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
4133};
4134
bb8c093b 4135static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4136{
4137 int err = 0;
c79dd5b5 4138 struct iwl_priv *priv;
b481de9c 4139 struct ieee80211_hw *hw;
82b9a121 4140 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4141 unsigned long flags;
b481de9c 4142
316c30d9
AK
4143 /************************
4144 * 1. Allocating HW data
4145 ************************/
4146
6440adb5
CB
4147 /* Disabling hardware scan means that mac80211 will perform scans
4148 * "the hard way", rather than using device's scan. */
1ea87396 4149 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4150 if (cfg->mod_params->debug & IWL_DL_INFO)
4151 dev_printk(KERN_DEBUG, &(pdev->dev),
4152 "Disabling hw_scan\n");
bb8c093b 4153 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4154 }
4155
1d0a082d
AK
4156 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4157 if (!hw) {
b481de9c
ZY
4158 err = -ENOMEM;
4159 goto out;
4160 }
1d0a082d
AK
4161 priv = hw->priv;
4162 /* At this point both hw and priv are allocated. */
4163
b481de9c
ZY
4164 SET_IEEE80211_DEV(hw, &pdev->dev);
4165
4166 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4167 priv->cfg = cfg;
b481de9c 4168 priv->pci_dev = pdev;
316c30d9 4169
0a6857e7 4170#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4171 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4172 atomic_set(&priv->restrict_refcnt, 0);
4173#endif
b481de9c 4174
316c30d9
AK
4175 /**************************
4176 * 2. Initializing PCI bus
4177 **************************/
4178 if (pci_enable_device(pdev)) {
4179 err = -ENODEV;
4180 goto out_ieee80211_free_hw;
4181 }
4182
4183 pci_set_master(pdev);
4184
093d874c 4185 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 4186 if (!err)
093d874c 4187 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 4188 if (err) {
093d874c 4189 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 4190 if (!err)
093d874c 4191 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 4192 /* both attempts failed: */
316c30d9 4193 if (err) {
cc2a8ea8
RR
4194 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4195 DRV_NAME);
316c30d9 4196 goto out_pci_disable_device;
cc2a8ea8 4197 }
316c30d9
AK
4198 }
4199
4200 err = pci_request_regions(pdev, DRV_NAME);
4201 if (err)
4202 goto out_pci_disable_device;
4203
4204 pci_set_drvdata(pdev, priv);
4205
316c30d9
AK
4206
4207 /***********************
4208 * 3. Read REV register
4209 ***********************/
4210 priv->hw_base = pci_iomap(pdev, 0, 0);
4211 if (!priv->hw_base) {
4212 err = -ENODEV;
4213 goto out_pci_release_regions;
4214 }
4215
4216 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4217 (unsigned long long) pci_resource_len(pdev, 0));
4218 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4219
b661c819 4220 iwl_hw_detect(priv);
316c30d9 4221 printk(KERN_INFO DRV_NAME
b661c819
TW
4222 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4223 priv->cfg->name, priv->hw_rev);
316c30d9 4224
e7b63581
TW
4225 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4226 * PCI Tx retries from interfering with C3 CPU state */
4227 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4228
91238714
TW
4229 /* amp init */
4230 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4231 if (err < 0) {
91238714 4232 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4233 goto out_iounmap;
4234 }
91238714
TW
4235 /*****************
4236 * 4. Read EEPROM
4237 *****************/
316c30d9
AK
4238 /* Read the EEPROM */
4239 err = iwl_eeprom_init(priv);
4240 if (err) {
4241 IWL_ERROR("Unable to init EEPROM\n");
4242 goto out_iounmap;
4243 }
8614f360
TW
4244 err = iwl_eeprom_check_version(priv);
4245 if (err)
4246 goto out_iounmap;
4247
02883017 4248 /* extract MAC Address */
316c30d9 4249 iwl_eeprom_get_mac(priv, priv->mac_addr);
e174961c 4250 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
316c30d9
AK
4251 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4252
4253 /************************
4254 * 5. Setup HW constants
4255 ************************/
da154e30 4256 if (iwl_set_hw_params(priv)) {
5425e490 4257 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4258 goto out_free_eeprom;
316c30d9
AK
4259 }
4260
4261 /*******************
6ba87956 4262 * 6. Setup priv
316c30d9 4263 *******************/
b481de9c 4264
6ba87956 4265 err = iwl_init_drv(priv);
bf85ea4f 4266 if (err)
399f4900 4267 goto out_free_eeprom;
bf85ea4f 4268 /* At this point both hw and priv are initialized. */
316c30d9
AK
4269
4270 /**********************************
4271 * 7. Initialize module parameters
4272 **********************************/
4273
4274 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4275 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4276 set_bit(STATUS_RF_KILL_SW, &priv->status);
4277 IWL_DEBUG_INFO("Radio disabled.\n");
4278 }
4279
316c30d9
AK
4280 /********************
4281 * 8. Setup services
4282 ********************/
0359facc 4283 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4284 iwl4965_disable_interrupts(priv);
0359facc 4285 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4286
4287 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4288 if (err) {
4289 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4290 goto out_uninit_drv;
316c30d9
AK
4291 }
4292
316c30d9 4293
4e39317d 4294 iwl_setup_deferred_work(priv);
653fa4a0 4295 iwl_setup_rx_handlers(priv);
316c30d9
AK
4296
4297 /********************
4298 * 9. Conclude
4299 ********************/
5a66926a
ZY
4300 pci_save_state(pdev);
4301 pci_disable_device(pdev);
b481de9c 4302
6ba87956
TW
4303 /**********************************
4304 * 10. Setup and register mac80211
4305 **********************************/
4306
4307 err = iwl_setup_mac(priv);
4308 if (err)
4309 goto out_remove_sysfs;
4310
4311 err = iwl_dbgfs_register(priv, DRV_NAME);
4312 if (err)
4313 IWL_ERROR("failed to create debugfs files\n");
4314
58d0f361
EG
4315 err = iwl_rfkill_init(priv);
4316 if (err)
4317 IWL_ERROR("Unable to initialize RFKILL system. "
4318 "Ignoring error: %d\n", err);
4319 iwl_power_initialize(priv);
b481de9c
ZY
4320 return 0;
4321
316c30d9
AK
4322 out_remove_sysfs:
4323 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4324 out_uninit_drv:
4325 iwl_uninit_drv(priv);
073d3f5f
TW
4326 out_free_eeprom:
4327 iwl_eeprom_free(priv);
b481de9c
ZY
4328 out_iounmap:
4329 pci_iounmap(pdev, priv->hw_base);
4330 out_pci_release_regions:
4331 pci_release_regions(pdev);
316c30d9 4332 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4333 out_pci_disable_device:
4334 pci_disable_device(pdev);
b481de9c
ZY
4335 out_ieee80211_free_hw:
4336 ieee80211_free_hw(priv->hw);
4337 out:
4338 return err;
4339}
4340
c83dbf68 4341static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4342{
c79dd5b5 4343 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4344 unsigned long flags;
b481de9c
ZY
4345
4346 if (!priv)
4347 return;
4348
4349 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4350
67249625
EG
4351 iwl_dbgfs_unregister(priv);
4352 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4353
0b124c31
GG
4354 /* ieee80211_unregister_hw call wil cause iwl4965_mac_stop to
4355 * to be called and iwl4965_down since we are removing the device
4356 * we need to set STATUS_EXIT_PENDING bit.
4357 */
4358 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR
4359 if (priv->mac80211_registered) {
4360 ieee80211_unregister_hw(priv->hw);
4361 priv->mac80211_registered = 0;
0b124c31
GG
4362 } else {
4363 iwl4965_down(priv);
c4f55232
RR
4364 }
4365
0359facc
MA
4366 /* make sure we flush any pending irq or
4367 * tasklet for the driver
4368 */
4369 spin_lock_irqsave(&priv->lock, flags);
4370 iwl4965_disable_interrupts(priv);
4371 spin_unlock_irqrestore(&priv->lock, flags);
4372
4373 iwl_synchronize_irq(priv);
4374
58d0f361 4375 iwl_rfkill_unregister(priv);
bb8c093b 4376 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4377
4378 if (priv->rxq.bd)
a55360e4 4379 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4380 iwl_hw_txq_ctx_free(priv);
b481de9c 4381
37deb2a0 4382 iwl_clear_stations_table(priv);
073d3f5f 4383 iwl_eeprom_free(priv);
b481de9c 4384
b481de9c 4385
948c171c
MA
4386 /*netif_stop_queue(dev); */
4387 flush_workqueue(priv->workqueue);
4388
bb8c093b 4389 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4390 * priv->workqueue... so we can't take down the workqueue
4391 * until now... */
4392 destroy_workqueue(priv->workqueue);
4393 priv->workqueue = NULL;
4394
b481de9c
ZY
4395 pci_iounmap(pdev, priv->hw_base);
4396 pci_release_regions(pdev);
4397 pci_disable_device(pdev);
4398 pci_set_drvdata(pdev, NULL);
4399
6ba87956 4400 iwl_uninit_drv(priv);
b481de9c
ZY
4401
4402 if (priv->ibss_beacon)
4403 dev_kfree_skb(priv->ibss_beacon);
4404
4405 ieee80211_free_hw(priv->hw);
4406}
4407
4408#ifdef CONFIG_PM
4409
bb8c093b 4410static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4411{
c79dd5b5 4412 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4413
e655b9f0
ZY
4414 if (priv->is_open) {
4415 set_bit(STATUS_IN_SUSPEND, &priv->status);
4416 iwl4965_mac_stop(priv->hw);
4417 priv->is_open = 1;
4418 }
b481de9c 4419
b481de9c
ZY
4420 pci_set_power_state(pdev, PCI_D3hot);
4421
b481de9c
ZY
4422 return 0;
4423}
4424
bb8c093b 4425static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4426{
c79dd5b5 4427 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4428
b481de9c 4429 pci_set_power_state(pdev, PCI_D0);
b481de9c 4430
e655b9f0
ZY
4431 if (priv->is_open)
4432 iwl4965_mac_start(priv->hw);
b481de9c 4433
e655b9f0 4434 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4435 return 0;
4436}
4437
4438#endif /* CONFIG_PM */
4439
4440/*****************************************************************************
4441 *
4442 * driver and module entry point
4443 *
4444 *****************************************************************************/
4445
fed9017e
RR
4446/* Hardware specific file defines the PCI IDs table for that hardware module */
4447static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4448#ifdef CONFIG_IWL4965
fed9017e
RR
4449 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4450 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4451#endif /* CONFIG_IWL4965 */
5a6a256e 4452#ifdef CONFIG_IWL5000
47408639
EK
4453 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4454 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4455 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4456 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4457 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4458 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4459 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK
4460 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4461 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4462 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW
4463/* 5350 WiFi/WiMax */
4464 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4465 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4466 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
5a6a256e 4467#endif /* CONFIG_IWL5000 */
fed9017e
RR
4468 {0}
4469};
4470MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4471
4472static struct pci_driver iwl_driver = {
b481de9c 4473 .name = DRV_NAME,
fed9017e 4474 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4475 .probe = iwl4965_pci_probe,
4476 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4477#ifdef CONFIG_PM
bb8c093b
CH
4478 .suspend = iwl4965_pci_suspend,
4479 .resume = iwl4965_pci_resume,
b481de9c
ZY
4480#endif
4481};
4482
bb8c093b 4483static int __init iwl4965_init(void)
b481de9c
ZY
4484{
4485
4486 int ret;
4487 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4488 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4489
e227ceac 4490 ret = iwlagn_rate_control_register();
897e1cf2
RC
4491 if (ret) {
4492 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4493 return ret;
4494 }
4495
fed9017e 4496 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4497 if (ret) {
4498 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4499 goto error_register;
b481de9c 4500 }
b481de9c
ZY
4501
4502 return ret;
897e1cf2 4503
897e1cf2 4504error_register:
e227ceac 4505 iwlagn_rate_control_unregister();
897e1cf2 4506 return ret;
b481de9c
ZY
4507}
4508
bb8c093b 4509static void __exit iwl4965_exit(void)
b481de9c 4510{
fed9017e 4511 pci_unregister_driver(&iwl_driver);
e227ceac 4512 iwlagn_rate_control_unregister();
b481de9c
ZY
4513}
4514
bb8c093b
CH
4515module_exit(iwl4965_exit);
4516module_init(iwl4965_init);
This page took 2.531207 seconds and 5 git commands to generate.