Commit | Line | Data |
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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
4e318262 | 3 | * Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
759ef89f | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | * | |
28 | *****************************************************************************/ | |
b481de9c ZY |
29 | #include <linux/kernel.h> |
30 | #include <linux/module.h> | |
b481de9c | 31 | #include <linux/init.h> |
5a0e3ad6 | 32 | #include <linux/slab.h> |
b481de9c | 33 | #include <linux/delay.h> |
d43c36dc | 34 | #include <linux/sched.h> |
b481de9c ZY |
35 | #include <linux/skbuff.h> |
36 | #include <linux/netdevice.h> | |
b481de9c | 37 | #include <linux/firmware.h> |
b481de9c ZY |
38 | #include <linux/etherdevice.h> |
39 | #include <linux/if_arp.h> | |
40 | ||
b481de9c ZY |
41 | #include <net/mac80211.h> |
42 | ||
43 | #include <asm/div64.h> | |
44 | ||
6bc913bd | 45 | #include "iwl-eeprom.h" |
69a679b0 | 46 | #include "iwl-wifi.h" |
3e0d4cb1 | 47 | #include "iwl-dev.h" |
fee1247a | 48 | #include "iwl-core.h" |
3395f6e9 | 49 | #include "iwl-io.h" |
0de76736 | 50 | #include "iwl-agn-calib.h" |
a1175124 | 51 | #include "iwl-agn.h" |
48f20d35 | 52 | #include "iwl-shared.h" |
d5934110 | 53 | #include "iwl-bus.h" |
c85eb619 | 54 | #include "iwl-trans.h" |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
b481de9c ZY |
62 | /* |
63 | * module name, copyright, version, etc. | |
b481de9c | 64 | */ |
d783b061 | 65 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
b481de9c | 66 | |
0a6857e7 | 67 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
68 | #define VD "d" |
69 | #else | |
70 | #define VD | |
71 | #endif | |
72 | ||
81963d68 | 73 | #define DRV_VERSION IWLWIFI_VERSION VD |
b481de9c | 74 | |
b481de9c ZY |
75 | |
76 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
77 | MODULE_VERSION(DRV_VERSION); | |
a7b75207 | 78 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
b481de9c | 79 | MODULE_LICENSE("GPL"); |
3c607d27 | 80 | MODULE_ALIAS("iwlagn"); |
b481de9c | 81 | |
5b9f8cd3 | 82 | void iwl_update_chain_flags(struct iwl_priv *priv) |
5da4b55f | 83 | { |
246ed355 | 84 | struct iwl_rxon_context *ctx; |
5da4b55f | 85 | |
e3f10cea WYG |
86 | for_each_context(priv, ctx) { |
87 | iwlagn_set_rxon_chain(priv, ctx); | |
88 | if (ctx->active.rx_chain != ctx->staging.rx_chain) | |
89 | iwlagn_commit_rxon(priv, ctx); | |
246ed355 | 90 | } |
5da4b55f MA |
91 | } |
92 | ||
47ff65c4 DH |
93 | /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ |
94 | static void iwl_set_beacon_tim(struct iwl_priv *priv, | |
77834543 JB |
95 | struct iwl_tx_beacon_cmd *tx_beacon_cmd, |
96 | u8 *beacon, u32 frame_size) | |
47ff65c4 DH |
97 | { |
98 | u16 tim_idx; | |
99 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; | |
100 | ||
101 | /* | |
102 | * The index is relative to frame start but we start looking at the | |
103 | * variable-length part of the beacon. | |
104 | */ | |
105 | tim_idx = mgmt->u.beacon.variable - beacon; | |
106 | ||
107 | /* Parse variable-length elements of beacon to find WLAN_EID_TIM */ | |
108 | while ((tim_idx < (frame_size - 2)) && | |
109 | (beacon[tim_idx] != WLAN_EID_TIM)) | |
110 | tim_idx += beacon[tim_idx+1] + 2; | |
111 | ||
112 | /* If TIM field was found, set variables */ | |
113 | if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) { | |
114 | tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); | |
115 | tx_beacon_cmd->tim_size = beacon[tim_idx+1]; | |
116 | } else | |
117 | IWL_WARN(priv, "Unable to find TIM Element in beacon\n"); | |
118 | } | |
119 | ||
8a98d49e | 120 | int iwlagn_send_beacon_cmd(struct iwl_priv *priv) |
4bf64efd TW |
121 | { |
122 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | |
8a98d49e JB |
123 | struct iwl_host_cmd cmd = { |
124 | .id = REPLY_TX_BEACON, | |
e419d62d | 125 | .flags = CMD_SYNC, |
8a98d49e | 126 | }; |
0b5b3ff1 | 127 | struct ieee80211_tx_info *info; |
47ff65c4 DH |
128 | u32 frame_size; |
129 | u32 rate_flags; | |
130 | u32 rate; | |
8a98d49e | 131 | |
47ff65c4 DH |
132 | /* |
133 | * We have to set up the TX command, the TX Beacon command, and the | |
134 | * beacon contents. | |
135 | */ | |
4bf64efd | 136 | |
6ac2f839 | 137 | lockdep_assert_held(&priv->shrd->mutex); |
76d04815 JB |
138 | |
139 | if (!priv->beacon_ctx) { | |
140 | IWL_ERR(priv, "trying to build beacon w/o beacon context!\n"); | |
950094cb | 141 | return 0; |
76d04815 JB |
142 | } |
143 | ||
8a98d49e JB |
144 | if (WARN_ON(!priv->beacon_skb)) |
145 | return -EINVAL; | |
146 | ||
4ce7cc2b JB |
147 | /* Allocate beacon command */ |
148 | if (!priv->beacon_cmd) | |
149 | priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL); | |
150 | tx_beacon_cmd = priv->beacon_cmd; | |
8a98d49e JB |
151 | if (!tx_beacon_cmd) |
152 | return -ENOMEM; | |
153 | ||
154 | frame_size = priv->beacon_skb->len; | |
4bf64efd | 155 | |
47ff65c4 | 156 | /* Set up TX command fields */ |
4bf64efd | 157 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); |
76d04815 | 158 | tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id; |
47ff65c4 DH |
159 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
160 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | |
161 | TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; | |
4bf64efd | 162 | |
47ff65c4 | 163 | /* Set up TX beacon command fields */ |
4ce7cc2b | 164 | iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data, |
77834543 | 165 | frame_size); |
4bf64efd | 166 | |
47ff65c4 | 167 | /* Set up packet rate and flags */ |
0b5b3ff1 JB |
168 | info = IEEE80211_SKB_CB(priv->beacon_skb); |
169 | ||
170 | /* | |
171 | * Let's set up the rate at least somewhat correctly; | |
172 | * it will currently not actually be used by the uCode, | |
173 | * it uses the broadcast station's rate instead. | |
174 | */ | |
175 | if (info->control.rates[0].idx < 0 || | |
176 | info->control.rates[0].flags & IEEE80211_TX_RC_MCS) | |
177 | rate = 0; | |
178 | else | |
179 | rate = info->control.rates[0].idx; | |
180 | ||
0e1654fa | 181 | priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant, |
d6189124 | 182 | hw_params(priv).valid_tx_ant); |
47ff65c4 | 183 | rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant); |
0b5b3ff1 JB |
184 | |
185 | /* In mac80211, rates for 5 GHz start at 0 */ | |
186 | if (info->band == IEEE80211_BAND_5GHZ) | |
187 | rate += IWL_FIRST_OFDM_RATE; | |
188 | else if (rate >= IWL_FIRST_CCK_RATE && rate <= IWL_LAST_CCK_RATE) | |
47ff65c4 | 189 | rate_flags |= RATE_MCS_CCK_MSK; |
0b5b3ff1 JB |
190 | |
191 | tx_beacon_cmd->tx.rate_n_flags = | |
192 | iwl_hw_set_rate_n_flags(rate, rate_flags); | |
4bf64efd | 193 | |
8a98d49e | 194 | /* Submit command */ |
4ce7cc2b | 195 | cmd.len[0] = sizeof(*tx_beacon_cmd); |
3fa50738 | 196 | cmd.data[0] = tx_beacon_cmd; |
4ce7cc2b JB |
197 | cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY; |
198 | cmd.len[1] = frame_size; | |
199 | cmd.data[1] = priv->beacon_skb->data; | |
200 | cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY; | |
7aaa1d79 | 201 | |
e6bb4c9c | 202 | return iwl_trans_send_cmd(trans(priv), &cmd); |
a8e74e27 SO |
203 | } |
204 | ||
5b9f8cd3 | 205 | static void iwl_bg_beacon_update(struct work_struct *work) |
b481de9c | 206 | { |
c79dd5b5 TW |
207 | struct iwl_priv *priv = |
208 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
209 | struct sk_buff *beacon; |
210 | ||
6ac2f839 | 211 | mutex_lock(&priv->shrd->mutex); |
76d04815 JB |
212 | if (!priv->beacon_ctx) { |
213 | IWL_ERR(priv, "updating beacon w/o beacon context!\n"); | |
214 | goto out; | |
215 | } | |
b481de9c | 216 | |
60744f62 JB |
217 | if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) { |
218 | /* | |
219 | * The ucode will send beacon notifications even in | |
220 | * IBSS mode, but we don't want to process them. But | |
221 | * we need to defer the type check to here due to | |
222 | * requiring locking around the beacon_ctx access. | |
223 | */ | |
224 | goto out; | |
225 | } | |
226 | ||
76d04815 JB |
227 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ |
228 | beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif); | |
b481de9c | 229 | if (!beacon) { |
77834543 | 230 | IWL_ERR(priv, "update beacon failed -- keeping old\n"); |
76d04815 | 231 | goto out; |
b481de9c ZY |
232 | } |
233 | ||
b481de9c | 234 | /* new beacon skb is allocated every time; dispose previous.*/ |
77834543 | 235 | dev_kfree_skb(priv->beacon_skb); |
b481de9c | 236 | |
12e934dc | 237 | priv->beacon_skb = beacon; |
b481de9c | 238 | |
2295c66b | 239 | iwlagn_send_beacon_cmd(priv); |
76d04815 | 240 | out: |
6ac2f839 | 241 | mutex_unlock(&priv->shrd->mutex); |
b481de9c ZY |
242 | } |
243 | ||
fbba9410 WYG |
244 | static void iwl_bg_bt_runtime_config(struct work_struct *work) |
245 | { | |
246 | struct iwl_priv *priv = | |
247 | container_of(work, struct iwl_priv, bt_runtime_config); | |
248 | ||
63013ae3 | 249 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
fbba9410 WYG |
250 | return; |
251 | ||
252 | /* dont send host command if rf-kill is on */ | |
845a9c0d | 253 | if (!iwl_is_ready_rf(priv->shrd)) |
fbba9410 | 254 | return; |
e55b517c | 255 | iwlagn_send_advance_bt_config(priv); |
fbba9410 WYG |
256 | } |
257 | ||
bee008b7 WYG |
258 | static void iwl_bg_bt_full_concurrency(struct work_struct *work) |
259 | { | |
260 | struct iwl_priv *priv = | |
261 | container_of(work, struct iwl_priv, bt_full_concurrency); | |
246ed355 | 262 | struct iwl_rxon_context *ctx; |
bee008b7 | 263 | |
6ac2f839 | 264 | mutex_lock(&priv->shrd->mutex); |
dc1a4068 | 265 | |
63013ae3 | 266 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
dc1a4068 | 267 | goto out; |
bee008b7 WYG |
268 | |
269 | /* dont send host command if rf-kill is on */ | |
845a9c0d | 270 | if (!iwl_is_ready_rf(priv->shrd)) |
dc1a4068 | 271 | goto out; |
bee008b7 WYG |
272 | |
273 | IWL_DEBUG_INFO(priv, "BT coex in %s mode\n", | |
274 | priv->bt_full_concurrent ? | |
275 | "full concurrency" : "3-wire"); | |
276 | ||
277 | /* | |
278 | * LQ & RXON updated cmds must be sent before BT Config cmd | |
279 | * to avoid 3-wire collisions | |
280 | */ | |
246ed355 | 281 | for_each_context(priv, ctx) { |
e3f10cea | 282 | iwlagn_set_rxon_chain(priv, ctx); |
805a3b81 | 283 | iwlagn_commit_rxon(priv, ctx); |
246ed355 | 284 | } |
bee008b7 | 285 | |
e55b517c | 286 | iwlagn_send_advance_bt_config(priv); |
dc1a4068 | 287 | out: |
6ac2f839 | 288 | mutex_unlock(&priv->shrd->mutex); |
bee008b7 WYG |
289 | } |
290 | ||
4e39317d | 291 | /** |
5b9f8cd3 | 292 | * iwl_bg_statistics_periodic - Timer callback to queue statistics |
4e39317d EG |
293 | * |
294 | * This callback is provided in order to send a statistics request. | |
295 | * | |
296 | * This timer function is continually reset to execute within | |
297 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION | |
298 | * was received. We need to ensure we receive the statistics in order | |
299 | * to update the temperature used for calibrating the TXPOWER. | |
300 | */ | |
5b9f8cd3 | 301 | static void iwl_bg_statistics_periodic(unsigned long data) |
4e39317d EG |
302 | { |
303 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
304 | ||
63013ae3 | 305 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
4e39317d EG |
306 | return; |
307 | ||
61780ee3 | 308 | /* dont send host command if rf-kill is on */ |
845a9c0d | 309 | if (!iwl_is_ready_rf(priv->shrd)) |
61780ee3 MA |
310 | return; |
311 | ||
ef8d5529 | 312 | iwl_send_statistics_request(priv, CMD_ASYNC, false); |
4e39317d EG |
313 | } |
314 | ||
a9e1cb6a WYG |
315 | |
316 | static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base, | |
317 | u32 start_idx, u32 num_events, | |
98d4bf0c | 318 | u32 capacity, u32 mode) |
a9e1cb6a WYG |
319 | { |
320 | u32 i; | |
321 | u32 ptr; /* SRAM byte address of log data */ | |
322 | u32 ev, time, data; /* event log data */ | |
323 | unsigned long reg_flags; | |
324 | ||
325 | if (mode == 0) | |
326 | ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32)); | |
327 | else | |
328 | ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32)); | |
329 | ||
330 | /* Make sure device is powered up for SRAM reads */ | |
83ed9015 EG |
331 | spin_lock_irqsave(&bus(priv)->reg_lock, reg_flags); |
332 | if (iwl_grab_nic_access(bus(priv))) { | |
333 | spin_unlock_irqrestore(&bus(priv)->reg_lock, reg_flags); | |
a9e1cb6a WYG |
334 | return; |
335 | } | |
336 | ||
337 | /* Set starting address; reads will auto-increment */ | |
83ed9015 | 338 | iwl_write32(bus(priv), HBUS_TARG_MEM_RADDR, ptr); |
a9e1cb6a WYG |
339 | rmb(); |
340 | ||
98d4bf0c JB |
341 | /* |
342 | * Refuse to read more than would have fit into the log from | |
343 | * the current start_idx. This used to happen due to the race | |
344 | * described below, but now WARN because the code below should | |
345 | * prevent it from happening here. | |
346 | */ | |
347 | if (WARN_ON(num_events > capacity - start_idx)) | |
348 | num_events = capacity - start_idx; | |
349 | ||
a9e1cb6a WYG |
350 | /* |
351 | * "time" is actually "data" for mode 0 (no timestamp). | |
352 | * place event id # at far right for easier visual parsing. | |
353 | */ | |
354 | for (i = 0; i < num_events; i++) { | |
83ed9015 EG |
355 | ev = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); |
356 | time = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); | |
a9e1cb6a | 357 | if (mode == 0) { |
98d4bf0c | 358 | trace_iwlwifi_dev_ucode_cont_event(priv, 0, time, ev); |
a9e1cb6a | 359 | } else { |
83ed9015 | 360 | data = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); |
98d4bf0c JB |
361 | trace_iwlwifi_dev_ucode_cont_event(priv, time, |
362 | data, ev); | |
a9e1cb6a WYG |
363 | } |
364 | } | |
365 | /* Allow device to power down */ | |
83ed9015 EG |
366 | iwl_release_nic_access(bus(priv)); |
367 | spin_unlock_irqrestore(&bus(priv)->reg_lock, reg_flags); | |
a9e1cb6a WYG |
368 | } |
369 | ||
875295f1 | 370 | static void iwl_continuous_event_trace(struct iwl_priv *priv) |
a9e1cb6a WYG |
371 | { |
372 | u32 capacity; /* event log capacity in # entries */ | |
98d4bf0c JB |
373 | struct { |
374 | u32 capacity; | |
375 | u32 mode; | |
376 | u32 wrap_counter; | |
377 | u32 write_counter; | |
378 | } __packed read; | |
a9e1cb6a WYG |
379 | u32 base; /* SRAM byte address of event log header */ |
380 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
381 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
382 | u32 next_entry; /* index of next entry to be written by uCode */ | |
383 | ||
98d4bf0c | 384 | base = priv->shrd->device_pointers.log_event_table; |
4caab328 | 385 | if (iwlagn_hw_valid_rtc_data_addr(base)) { |
98d4bf0c JB |
386 | iwl_read_targ_mem_words(bus(priv), base, &read, sizeof(read)); |
387 | ||
388 | capacity = read.capacity; | |
389 | mode = read.mode; | |
390 | num_wraps = read.wrap_counter; | |
391 | next_entry = read.write_counter; | |
a9e1cb6a WYG |
392 | } else |
393 | return; | |
394 | ||
98d4bf0c JB |
395 | /* |
396 | * Unfortunately, the uCode doesn't use temporary variables. | |
397 | * Therefore, it can happen that we read next_entry == capacity, | |
398 | * which really means next_entry == 0. | |
399 | */ | |
400 | if (unlikely(next_entry == capacity)) | |
401 | next_entry = 0; | |
402 | /* | |
403 | * Additionally, the uCode increases the write pointer before | |
404 | * the wraps counter, so if the write pointer is smaller than | |
405 | * the old write pointer (wrap occurred) but we read that no | |
406 | * wrap occurred, we actually read between the next_entry and | |
407 | * num_wraps update (this does happen in practice!!) -- take | |
408 | * that into account by increasing num_wraps. | |
409 | */ | |
410 | if (unlikely(next_entry < priv->event_log.next_entry && | |
411 | num_wraps == priv->event_log.num_wraps)) | |
412 | num_wraps++; | |
413 | ||
a9e1cb6a | 414 | if (num_wraps == priv->event_log.num_wraps) { |
98d4bf0c JB |
415 | iwl_print_cont_event_trace( |
416 | priv, base, priv->event_log.next_entry, | |
417 | next_entry - priv->event_log.next_entry, | |
418 | capacity, mode); | |
419 | ||
a9e1cb6a WYG |
420 | priv->event_log.non_wraps_count++; |
421 | } else { | |
98d4bf0c | 422 | if (num_wraps - priv->event_log.num_wraps > 1) |
a9e1cb6a WYG |
423 | priv->event_log.wraps_more_count++; |
424 | else | |
425 | priv->event_log.wraps_once_count++; | |
98d4bf0c | 426 | |
a9e1cb6a WYG |
427 | trace_iwlwifi_dev_ucode_wrap_event(priv, |
428 | num_wraps - priv->event_log.num_wraps, | |
429 | next_entry, priv->event_log.next_entry); | |
98d4bf0c | 430 | |
a9e1cb6a | 431 | if (next_entry < priv->event_log.next_entry) { |
98d4bf0c JB |
432 | iwl_print_cont_event_trace( |
433 | priv, base, priv->event_log.next_entry, | |
434 | capacity - priv->event_log.next_entry, | |
435 | capacity, mode); | |
a9e1cb6a | 436 | |
98d4bf0c JB |
437 | iwl_print_cont_event_trace( |
438 | priv, base, 0, next_entry, capacity, mode); | |
a9e1cb6a | 439 | } else { |
98d4bf0c JB |
440 | iwl_print_cont_event_trace( |
441 | priv, base, next_entry, | |
442 | capacity - next_entry, | |
443 | capacity, mode); | |
a9e1cb6a | 444 | |
98d4bf0c JB |
445 | iwl_print_cont_event_trace( |
446 | priv, base, 0, next_entry, capacity, mode); | |
a9e1cb6a WYG |
447 | } |
448 | } | |
98d4bf0c | 449 | |
a9e1cb6a WYG |
450 | priv->event_log.num_wraps = num_wraps; |
451 | priv->event_log.next_entry = next_entry; | |
452 | } | |
453 | ||
454 | /** | |
455 | * iwl_bg_ucode_trace - Timer callback to log ucode event | |
456 | * | |
457 | * The timer is continually set to execute every | |
458 | * UCODE_TRACE_PERIOD milliseconds after the last timer expired | |
459 | * this function is to perform continuous uCode event logging operation | |
460 | * if enabled | |
461 | */ | |
462 | static void iwl_bg_ucode_trace(unsigned long data) | |
463 | { | |
464 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
465 | ||
63013ae3 | 466 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
a9e1cb6a WYG |
467 | return; |
468 | ||
469 | if (priv->event_log.ucode_trace) { | |
470 | iwl_continuous_event_trace(priv); | |
471 | /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */ | |
472 | mod_timer(&priv->ucode_trace, | |
473 | jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD)); | |
474 | } | |
475 | } | |
476 | ||
65550636 WYG |
477 | static void iwl_bg_tx_flush(struct work_struct *work) |
478 | { | |
479 | struct iwl_priv *priv = | |
480 | container_of(work, struct iwl_priv, tx_flush); | |
481 | ||
63013ae3 | 482 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
65550636 WYG |
483 | return; |
484 | ||
485 | /* do nothing if rf-kill is on */ | |
845a9c0d | 486 | if (!iwl_is_ready_rf(priv->shrd)) |
65550636 WYG |
487 | return; |
488 | ||
c68744fb WYG |
489 | IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n"); |
490 | iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL); | |
65550636 WYG |
491 | } |
492 | ||
4d2a5d0e JB |
493 | static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags) |
494 | { | |
4d2a5d0e JB |
495 | int i; |
496 | ||
497 | /* | |
498 | * The default context is always valid, | |
499 | * the PAN context depends on uCode. | |
500 | */ | |
7a10e3e4 | 501 | priv->shrd->valid_contexts = BIT(IWL_RXON_CTX_BSS); |
4d2a5d0e | 502 | if (ucode_flags & IWL_UCODE_TLV_FLAGS_PAN) |
7a10e3e4 | 503 | priv->shrd->valid_contexts |= BIT(IWL_RXON_CTX_PAN); |
4d2a5d0e JB |
504 | |
505 | for (i = 0; i < NUM_IWL_RXON_CTX; i++) | |
506 | priv->contexts[i].ctxid = i; | |
507 | ||
508 | priv->contexts[IWL_RXON_CTX_BSS].always_active = true; | |
509 | priv->contexts[IWL_RXON_CTX_BSS].is_active = true; | |
510 | priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON; | |
511 | priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING; | |
512 | priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC; | |
513 | priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM; | |
514 | priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID; | |
515 | priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY; | |
4d2a5d0e JB |
516 | priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes = |
517 | BIT(NL80211_IFTYPE_ADHOC); | |
518 | priv->contexts[IWL_RXON_CTX_BSS].interface_modes = | |
519 | BIT(NL80211_IFTYPE_STATION); | |
520 | priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP; | |
521 | priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS; | |
522 | priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS; | |
523 | priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS; | |
524 | ||
525 | priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON; | |
526 | priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = | |
527 | REPLY_WIPAN_RXON_TIMING; | |
528 | priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = | |
529 | REPLY_WIPAN_RXON_ASSOC; | |
530 | priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM; | |
531 | priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN; | |
532 | priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY; | |
533 | priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID; | |
534 | priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION; | |
4d2a5d0e JB |
535 | priv->contexts[IWL_RXON_CTX_PAN].interface_modes = |
536 | BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP); | |
c6baf7fb JB |
537 | |
538 | if (ucode_flags & IWL_UCODE_TLV_FLAGS_P2P) | |
539 | priv->contexts[IWL_RXON_CTX_PAN].interface_modes |= | |
540 | BIT(NL80211_IFTYPE_P2P_CLIENT) | | |
541 | BIT(NL80211_IFTYPE_P2P_GO); | |
542 | ||
4d2a5d0e JB |
543 | priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP; |
544 | priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA; | |
545 | priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P; | |
546 | ||
547 | BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2); | |
548 | } | |
549 | ||
b08dfd04 | 550 | static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context); |
b08dfd04 | 551 | |
39396085 JS |
552 | #define UCODE_EXPERIMENTAL_INDEX 100 |
553 | #define UCODE_EXPERIMENTAL_TAG "exp" | |
554 | ||
b08dfd04 JB |
555 | static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first) |
556 | { | |
38622419 | 557 | const char *name_pre = cfg(priv)->fw_name_pre; |
39396085 | 558 | char tag[8]; |
b08dfd04 | 559 | |
39396085 JS |
560 | if (first) { |
561 | #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE | |
562 | priv->fw_index = UCODE_EXPERIMENTAL_INDEX; | |
563 | strcpy(tag, UCODE_EXPERIMENTAL_TAG); | |
564 | } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) { | |
565 | #endif | |
38622419 | 566 | priv->fw_index = cfg(priv)->ucode_api_max; |
39396085 JS |
567 | sprintf(tag, "%d", priv->fw_index); |
568 | } else { | |
b08dfd04 | 569 | priv->fw_index--; |
39396085 JS |
570 | sprintf(tag, "%d", priv->fw_index); |
571 | } | |
b08dfd04 | 572 | |
38622419 | 573 | if (priv->fw_index < cfg(priv)->ucode_api_min) { |
b08dfd04 JB |
574 | IWL_ERR(priv, "no suitable firmware found!\n"); |
575 | return -ENOENT; | |
576 | } | |
577 | ||
39396085 | 578 | sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); |
b08dfd04 | 579 | |
39396085 JS |
580 | IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n", |
581 | (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) | |
582 | ? "EXPERIMENTAL " : "", | |
b08dfd04 JB |
583 | priv->firmware_name); |
584 | ||
585 | return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name, | |
26bfc0cf | 586 | bus(priv)->dev, |
3599d39a | 587 | GFP_KERNEL, priv, iwl_ucode_callback); |
b08dfd04 JB |
588 | } |
589 | ||
0e9a44dc | 590 | struct iwlagn_firmware_pieces { |
c8ac61cf JB |
591 | const void *inst, *data, *init, *init_data, *wowlan_inst, *wowlan_data; |
592 | size_t inst_size, data_size, init_size, init_data_size, | |
593 | wowlan_inst_size, wowlan_data_size; | |
0e9a44dc JB |
594 | |
595 | u32 build; | |
b2e640d4 JB |
596 | |
597 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; | |
598 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; | |
0e9a44dc JB |
599 | }; |
600 | ||
601 | static int iwlagn_load_legacy_firmware(struct iwl_priv *priv, | |
602 | const struct firmware *ucode_raw, | |
603 | struct iwlagn_firmware_pieces *pieces) | |
604 | { | |
605 | struct iwl_ucode_header *ucode = (void *)ucode_raw->data; | |
606 | u32 api_ver, hdr_size; | |
607 | const u8 *src; | |
608 | ||
609 | priv->ucode_ver = le32_to_cpu(ucode->ver); | |
610 | api_ver = IWL_UCODE_API(priv->ucode_ver); | |
611 | ||
612 | switch (api_ver) { | |
613 | default: | |
f7d046f9 WYG |
614 | hdr_size = 28; |
615 | if (ucode_raw->size < hdr_size) { | |
616 | IWL_ERR(priv, "File size too small!\n"); | |
617 | return -EINVAL; | |
0e9a44dc | 618 | } |
f7d046f9 WYG |
619 | pieces->build = le32_to_cpu(ucode->u.v2.build); |
620 | pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size); | |
621 | pieces->data_size = le32_to_cpu(ucode->u.v2.data_size); | |
622 | pieces->init_size = le32_to_cpu(ucode->u.v2.init_size); | |
623 | pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size); | |
f7d046f9 WYG |
624 | src = ucode->u.v2.data; |
625 | break; | |
0e9a44dc JB |
626 | case 0: |
627 | case 1: | |
628 | case 2: | |
629 | hdr_size = 24; | |
630 | if (ucode_raw->size < hdr_size) { | |
631 | IWL_ERR(priv, "File size too small!\n"); | |
632 | return -EINVAL; | |
633 | } | |
634 | pieces->build = 0; | |
635 | pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size); | |
636 | pieces->data_size = le32_to_cpu(ucode->u.v1.data_size); | |
637 | pieces->init_size = le32_to_cpu(ucode->u.v1.init_size); | |
638 | pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size); | |
0e9a44dc JB |
639 | src = ucode->u.v1.data; |
640 | break; | |
641 | } | |
642 | ||
643 | /* Verify size of file vs. image size info in file's header */ | |
644 | if (ucode_raw->size != hdr_size + pieces->inst_size + | |
645 | pieces->data_size + pieces->init_size + | |
1fc35276 | 646 | pieces->init_data_size) { |
0e9a44dc JB |
647 | |
648 | IWL_ERR(priv, | |
649 | "uCode file size %d does not match expected size\n", | |
650 | (int)ucode_raw->size); | |
651 | return -EINVAL; | |
652 | } | |
653 | ||
654 | pieces->inst = src; | |
655 | src += pieces->inst_size; | |
656 | pieces->data = src; | |
657 | src += pieces->data_size; | |
658 | pieces->init = src; | |
659 | src += pieces->init_size; | |
660 | pieces->init_data = src; | |
661 | src += pieces->init_data_size; | |
0e9a44dc JB |
662 | |
663 | return 0; | |
664 | } | |
665 | ||
dd7a2509 JB |
666 | static int iwlagn_load_firmware(struct iwl_priv *priv, |
667 | const struct firmware *ucode_raw, | |
668 | struct iwlagn_firmware_pieces *pieces, | |
669 | struct iwlagn_ucode_capabilities *capa) | |
670 | { | |
671 | struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data; | |
672 | struct iwl_ucode_tlv *tlv; | |
673 | size_t len = ucode_raw->size; | |
674 | const u8 *data; | |
48f20d35 EG |
675 | int wanted_alternative = iwlagn_mod_params.wanted_ucode_alternative; |
676 | int tmp; | |
dd7a2509 | 677 | u64 alternatives; |
ad8d8333 WYG |
678 | u32 tlv_len; |
679 | enum iwl_ucode_tlv_type tlv_type; | |
680 | const u8 *tlv_data; | |
dd7a2509 | 681 | |
ad8d8333 WYG |
682 | if (len < sizeof(*ucode)) { |
683 | IWL_ERR(priv, "uCode has invalid length: %zd\n", len); | |
dd7a2509 | 684 | return -EINVAL; |
ad8d8333 | 685 | } |
dd7a2509 | 686 | |
ad8d8333 WYG |
687 | if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) { |
688 | IWL_ERR(priv, "invalid uCode magic: 0X%x\n", | |
689 | le32_to_cpu(ucode->magic)); | |
dd7a2509 | 690 | return -EINVAL; |
ad8d8333 | 691 | } |
dd7a2509 JB |
692 | |
693 | /* | |
694 | * Check which alternatives are present, and "downgrade" | |
695 | * when the chosen alternative is not present, warning | |
696 | * the user when that happens. Some files may not have | |
697 | * any alternatives, so don't warn in that case. | |
698 | */ | |
699 | alternatives = le64_to_cpu(ucode->alternatives); | |
700 | tmp = wanted_alternative; | |
701 | if (wanted_alternative > 63) | |
702 | wanted_alternative = 63; | |
703 | while (wanted_alternative && !(alternatives & BIT(wanted_alternative))) | |
704 | wanted_alternative--; | |
705 | if (wanted_alternative && wanted_alternative != tmp) | |
706 | IWL_WARN(priv, | |
707 | "uCode alternative %d not available, choosing %d\n", | |
708 | tmp, wanted_alternative); | |
709 | ||
710 | priv->ucode_ver = le32_to_cpu(ucode->ver); | |
711 | pieces->build = le32_to_cpu(ucode->build); | |
712 | data = ucode->data; | |
713 | ||
714 | len -= sizeof(*ucode); | |
715 | ||
704da534 | 716 | while (len >= sizeof(*tlv)) { |
dd7a2509 | 717 | u16 tlv_alt; |
dd7a2509 JB |
718 | |
719 | len -= sizeof(*tlv); | |
720 | tlv = (void *)data; | |
721 | ||
722 | tlv_len = le32_to_cpu(tlv->length); | |
723 | tlv_type = le16_to_cpu(tlv->type); | |
724 | tlv_alt = le16_to_cpu(tlv->alternative); | |
725 | tlv_data = tlv->data; | |
726 | ||
ad8d8333 WYG |
727 | if (len < tlv_len) { |
728 | IWL_ERR(priv, "invalid TLV len: %zd/%u\n", | |
729 | len, tlv_len); | |
dd7a2509 | 730 | return -EINVAL; |
ad8d8333 | 731 | } |
dd7a2509 JB |
732 | len -= ALIGN(tlv_len, 4); |
733 | data += sizeof(*tlv) + ALIGN(tlv_len, 4); | |
734 | ||
735 | /* | |
736 | * Alternative 0 is always valid. | |
737 | * | |
738 | * Skip alternative TLVs that are not selected. | |
739 | */ | |
740 | if (tlv_alt != 0 && tlv_alt != wanted_alternative) | |
741 | continue; | |
742 | ||
743 | switch (tlv_type) { | |
744 | case IWL_UCODE_TLV_INST: | |
745 | pieces->inst = tlv_data; | |
746 | pieces->inst_size = tlv_len; | |
747 | break; | |
748 | case IWL_UCODE_TLV_DATA: | |
749 | pieces->data = tlv_data; | |
750 | pieces->data_size = tlv_len; | |
751 | break; | |
752 | case IWL_UCODE_TLV_INIT: | |
753 | pieces->init = tlv_data; | |
754 | pieces->init_size = tlv_len; | |
755 | break; | |
756 | case IWL_UCODE_TLV_INIT_DATA: | |
757 | pieces->init_data = tlv_data; | |
758 | pieces->init_data_size = tlv_len; | |
759 | break; | |
760 | case IWL_UCODE_TLV_BOOT: | |
1fc35276 | 761 | IWL_ERR(priv, "Found unexpected BOOT ucode\n"); |
dd7a2509 JB |
762 | break; |
763 | case IWL_UCODE_TLV_PROBE_MAX_LEN: | |
704da534 JB |
764 | if (tlv_len != sizeof(u32)) |
765 | goto invalid_tlv_len; | |
766 | capa->max_probe_length = | |
ad8d8333 | 767 | le32_to_cpup((__le32 *)tlv_data); |
dd7a2509 | 768 | break; |
ece9c4ee JB |
769 | case IWL_UCODE_TLV_PAN: |
770 | if (tlv_len) | |
771 | goto invalid_tlv_len; | |
3997ff39 JB |
772 | capa->flags |= IWL_UCODE_TLV_FLAGS_PAN; |
773 | break; | |
774 | case IWL_UCODE_TLV_FLAGS: | |
775 | /* must be at least one u32 */ | |
776 | if (tlv_len < sizeof(u32)) | |
777 | goto invalid_tlv_len; | |
778 | /* and a proper number of u32s */ | |
779 | if (tlv_len % sizeof(u32)) | |
780 | goto invalid_tlv_len; | |
781 | /* | |
782 | * This driver only reads the first u32 as | |
783 | * right now no more features are defined, | |
784 | * if that changes then either the driver | |
785 | * will not work with the new firmware, or | |
786 | * it'll not take advantage of new features. | |
787 | */ | |
788 | capa->flags = le32_to_cpup((__le32 *)tlv_data); | |
ece9c4ee | 789 | break; |
b2e640d4 | 790 | case IWL_UCODE_TLV_INIT_EVTLOG_PTR: |
704da534 JB |
791 | if (tlv_len != sizeof(u32)) |
792 | goto invalid_tlv_len; | |
793 | pieces->init_evtlog_ptr = | |
ad8d8333 | 794 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
795 | break; |
796 | case IWL_UCODE_TLV_INIT_EVTLOG_SIZE: | |
704da534 JB |
797 | if (tlv_len != sizeof(u32)) |
798 | goto invalid_tlv_len; | |
799 | pieces->init_evtlog_size = | |
ad8d8333 | 800 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
801 | break; |
802 | case IWL_UCODE_TLV_INIT_ERRLOG_PTR: | |
704da534 JB |
803 | if (tlv_len != sizeof(u32)) |
804 | goto invalid_tlv_len; | |
805 | pieces->init_errlog_ptr = | |
ad8d8333 | 806 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
807 | break; |
808 | case IWL_UCODE_TLV_RUNT_EVTLOG_PTR: | |
704da534 JB |
809 | if (tlv_len != sizeof(u32)) |
810 | goto invalid_tlv_len; | |
811 | pieces->inst_evtlog_ptr = | |
ad8d8333 | 812 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
813 | break; |
814 | case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE: | |
704da534 JB |
815 | if (tlv_len != sizeof(u32)) |
816 | goto invalid_tlv_len; | |
817 | pieces->inst_evtlog_size = | |
ad8d8333 | 818 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 JB |
819 | break; |
820 | case IWL_UCODE_TLV_RUNT_ERRLOG_PTR: | |
704da534 JB |
821 | if (tlv_len != sizeof(u32)) |
822 | goto invalid_tlv_len; | |
823 | pieces->inst_errlog_ptr = | |
ad8d8333 | 824 | le32_to_cpup((__le32 *)tlv_data); |
b2e640d4 | 825 | break; |
c8312fac WYG |
826 | case IWL_UCODE_TLV_ENHANCE_SENS_TBL: |
827 | if (tlv_len) | |
704da534 JB |
828 | goto invalid_tlv_len; |
829 | priv->enhance_sensitivity_table = true; | |
c8312fac | 830 | break; |
c8ac61cf JB |
831 | case IWL_UCODE_TLV_WOWLAN_INST: |
832 | pieces->wowlan_inst = tlv_data; | |
833 | pieces->wowlan_inst_size = tlv_len; | |
834 | break; | |
835 | case IWL_UCODE_TLV_WOWLAN_DATA: | |
836 | pieces->wowlan_data = tlv_data; | |
837 | pieces->wowlan_data_size = tlv_len; | |
838 | break; | |
6a822d06 | 839 | case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE: |
704da534 JB |
840 | if (tlv_len != sizeof(u32)) |
841 | goto invalid_tlv_len; | |
842 | capa->standard_phy_calibration_size = | |
6a822d06 WYG |
843 | le32_to_cpup((__le32 *)tlv_data); |
844 | break; | |
dd7a2509 | 845 | default: |
6fc3ba99 | 846 | IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type); |
dd7a2509 JB |
847 | break; |
848 | } | |
849 | } | |
850 | ||
ad8d8333 WYG |
851 | if (len) { |
852 | IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len); | |
853 | iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len); | |
704da534 | 854 | return -EINVAL; |
ad8d8333 | 855 | } |
dd7a2509 | 856 | |
704da534 JB |
857 | return 0; |
858 | ||
859 | invalid_tlv_len: | |
860 | IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len); | |
861 | iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len); | |
862 | ||
863 | return -EINVAL; | |
dd7a2509 JB |
864 | } |
865 | ||
b481de9c | 866 | /** |
b08dfd04 | 867 | * iwl_ucode_callback - callback when firmware was loaded |
b481de9c | 868 | * |
b08dfd04 JB |
869 | * If loaded successfully, copies the firmware into buffers |
870 | * for the card to fetch (via DMA). | |
b481de9c | 871 | */ |
b08dfd04 | 872 | static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context) |
b481de9c | 873 | { |
b08dfd04 | 874 | struct iwl_priv *priv = context; |
cc0f555d | 875 | struct iwl_ucode_header *ucode; |
0e9a44dc JB |
876 | int err; |
877 | struct iwlagn_firmware_pieces pieces; | |
38622419 DF |
878 | const unsigned int api_max = cfg(priv)->ucode_api_max; |
879 | unsigned int api_ok = cfg(priv)->ucode_api_ok; | |
880 | const unsigned int api_min = cfg(priv)->ucode_api_min; | |
0e9a44dc | 881 | u32 api_ver; |
3e4de761 | 882 | char buildstr[25]; |
0e9a44dc | 883 | u32 build; |
dd7a2509 JB |
884 | struct iwlagn_ucode_capabilities ucode_capa = { |
885 | .max_probe_length = 200, | |
6a822d06 | 886 | .standard_phy_calibration_size = |
642454cc | 887 | IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE, |
dd7a2509 | 888 | }; |
0e9a44dc | 889 | |
5d7969bf JB |
890 | if (!api_ok) |
891 | api_ok = api_max; | |
892 | ||
0e9a44dc | 893 | memset(&pieces, 0, sizeof(pieces)); |
b481de9c | 894 | |
b08dfd04 | 895 | if (!ucode_raw) { |
5d7969bf | 896 | if (priv->fw_index <= api_ok) |
39396085 JS |
897 | IWL_ERR(priv, |
898 | "request for firmware file '%s' failed.\n", | |
899 | priv->firmware_name); | |
b08dfd04 | 900 | goto try_again; |
b481de9c ZY |
901 | } |
902 | ||
b08dfd04 JB |
903 | IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n", |
904 | priv->firmware_name, ucode_raw->size); | |
b481de9c | 905 | |
22adba2a JB |
906 | /* Make sure that we got at least the API version number */ |
907 | if (ucode_raw->size < 4) { | |
15b1687c | 908 | IWL_ERR(priv, "File size way too small!\n"); |
b08dfd04 | 909 | goto try_again; |
b481de9c ZY |
910 | } |
911 | ||
912 | /* Data from ucode file: header followed by uCode images */ | |
cc0f555d | 913 | ucode = (struct iwl_ucode_header *)ucode_raw->data; |
b481de9c | 914 | |
0e9a44dc JB |
915 | if (ucode->ver) |
916 | err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces); | |
917 | else | |
dd7a2509 JB |
918 | err = iwlagn_load_firmware(priv, ucode_raw, &pieces, |
919 | &ucode_capa); | |
22adba2a | 920 | |
0e9a44dc JB |
921 | if (err) |
922 | goto try_again; | |
b481de9c | 923 | |
a0987a8d | 924 | api_ver = IWL_UCODE_API(priv->ucode_ver); |
0e9a44dc | 925 | build = pieces.build; |
a0987a8d | 926 | |
0e9a44dc JB |
927 | /* |
928 | * api_ver should match the api version forming part of the | |
929 | * firmware filename ... but we don't check for that and only rely | |
930 | * on the API version read from firmware header from here on forward | |
931 | */ | |
65cccfb0 WYG |
932 | /* no api version check required for experimental uCode */ |
933 | if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) { | |
934 | if (api_ver < api_min || api_ver > api_max) { | |
935 | IWL_ERR(priv, | |
936 | "Driver unable to support your firmware API. " | |
937 | "Driver supports v%u, firmware is v%u.\n", | |
938 | api_max, api_ver); | |
939 | goto try_again; | |
940 | } | |
b08dfd04 | 941 | |
5d7969bf JB |
942 | if (api_ver < api_ok) { |
943 | if (api_ok != api_max) | |
944 | IWL_ERR(priv, "Firmware has old API version, " | |
945 | "expected v%u through v%u, got v%u.\n", | |
946 | api_ok, api_max, api_ver); | |
947 | else | |
948 | IWL_ERR(priv, "Firmware has old API version, " | |
949 | "expected v%u, got v%u.\n", | |
950 | api_max, api_ver); | |
951 | IWL_ERR(priv, "New firmware can be obtained from " | |
952 | "http://www.intellinuxwireless.org/.\n"); | |
953 | } | |
65cccfb0 | 954 | } |
a0987a8d | 955 | |
3e4de761 | 956 | if (build) |
39396085 JS |
957 | sprintf(buildstr, " build %u%s", build, |
958 | (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) | |
959 | ? " (EXP)" : ""); | |
3e4de761 JB |
960 | else |
961 | buildstr[0] = '\0'; | |
962 | ||
963 | IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n", | |
964 | IWL_UCODE_MAJOR(priv->ucode_ver), | |
965 | IWL_UCODE_MINOR(priv->ucode_ver), | |
966 | IWL_UCODE_API(priv->ucode_ver), | |
967 | IWL_UCODE_SERIAL(priv->ucode_ver), | |
968 | buildstr); | |
a0987a8d | 969 | |
5ebeb5a6 RC |
970 | snprintf(priv->hw->wiphy->fw_version, |
971 | sizeof(priv->hw->wiphy->fw_version), | |
3e4de761 | 972 | "%u.%u.%u.%u%s", |
5ebeb5a6 RC |
973 | IWL_UCODE_MAJOR(priv->ucode_ver), |
974 | IWL_UCODE_MINOR(priv->ucode_ver), | |
975 | IWL_UCODE_API(priv->ucode_ver), | |
3e4de761 JB |
976 | IWL_UCODE_SERIAL(priv->ucode_ver), |
977 | buildstr); | |
b481de9c | 978 | |
b08dfd04 JB |
979 | /* |
980 | * For any of the failures below (before allocating pci memory) | |
981 | * we will try to load a version with a smaller API -- maybe the | |
982 | * user just got a corrupted version of the latest API. | |
983 | */ | |
984 | ||
0e9a44dc JB |
985 | IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", |
986 | priv->ucode_ver); | |
987 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n", | |
988 | pieces.inst_size); | |
989 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n", | |
990 | pieces.data_size); | |
991 | IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n", | |
992 | pieces.init_size); | |
993 | IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", | |
994 | pieces.init_data_size); | |
b481de9c ZY |
995 | |
996 | /* Verify that uCode images will fit in card's SRAM */ | |
d6189124 | 997 | if (pieces.inst_size > hw_params(priv).max_inst_size) { |
0e9a44dc JB |
998 | IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n", |
999 | pieces.inst_size); | |
b08dfd04 | 1000 | goto try_again; |
b481de9c ZY |
1001 | } |
1002 | ||
d6189124 | 1003 | if (pieces.data_size > hw_params(priv).max_data_size) { |
0e9a44dc JB |
1004 | IWL_ERR(priv, "uCode data len %Zd too large to fit in\n", |
1005 | pieces.data_size); | |
b08dfd04 | 1006 | goto try_again; |
b481de9c | 1007 | } |
0e9a44dc | 1008 | |
d6189124 | 1009 | if (pieces.init_size > hw_params(priv).max_inst_size) { |
0e9a44dc JB |
1010 | IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n", |
1011 | pieces.init_size); | |
b08dfd04 | 1012 | goto try_again; |
b481de9c | 1013 | } |
0e9a44dc | 1014 | |
d6189124 | 1015 | if (pieces.init_data_size > hw_params(priv).max_data_size) { |
0e9a44dc JB |
1016 | IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n", |
1017 | pieces.init_data_size); | |
b08dfd04 | 1018 | goto try_again; |
b481de9c | 1019 | } |
0e9a44dc | 1020 | |
b481de9c ZY |
1021 | /* Allocate ucode buffers for card's bus-master loading ... */ |
1022 | ||
1023 | /* Runtime instructions and 2 copies of data: | |
1024 | * 1) unmodified from disk | |
1025 | * 2) backup cache for save/restore during power-downs */ | |
de7f5f92 | 1026 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_rt.code, |
dbf28e21 JB |
1027 | pieces.inst, pieces.inst_size)) |
1028 | goto err_pci_alloc; | |
de7f5f92 | 1029 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_rt.data, |
dbf28e21 | 1030 | pieces.data, pieces.data_size)) |
1f304e4e ZY |
1031 | goto err_pci_alloc; |
1032 | ||
b481de9c | 1033 | /* Initialization instructions and data */ |
0e9a44dc | 1034 | if (pieces.init_size && pieces.init_data_size) { |
de7f5f92 | 1035 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_init.code, |
dbf28e21 JB |
1036 | pieces.init, pieces.init_size)) |
1037 | goto err_pci_alloc; | |
de7f5f92 | 1038 | if (iwl_alloc_fw_desc(bus(priv), &trans(priv)->ucode_init.data, |
dbf28e21 | 1039 | pieces.init_data, pieces.init_data_size)) |
90e759d1 TW |
1040 | goto err_pci_alloc; |
1041 | } | |
b481de9c | 1042 | |
c8ac61cf JB |
1043 | /* WoWLAN instructions and data */ |
1044 | if (pieces.wowlan_inst_size && pieces.wowlan_data_size) { | |
de7f5f92 DF |
1045 | if (iwl_alloc_fw_desc(bus(priv), |
1046 | &trans(priv)->ucode_wowlan.code, | |
c8ac61cf JB |
1047 | pieces.wowlan_inst, |
1048 | pieces.wowlan_inst_size)) | |
1049 | goto err_pci_alloc; | |
de7f5f92 DF |
1050 | if (iwl_alloc_fw_desc(bus(priv), |
1051 | &trans(priv)->ucode_wowlan.data, | |
c8ac61cf JB |
1052 | pieces.wowlan_data, |
1053 | pieces.wowlan_data_size)) | |
1054 | goto err_pci_alloc; | |
1055 | } | |
1056 | ||
b2e640d4 JB |
1057 | /* Now that we can no longer fail, copy information */ |
1058 | ||
1059 | /* | |
1060 | * The (size - 16) / 12 formula is based on the information recorded | |
1061 | * for each event, which is of mode 1 (including timestamp) for all | |
1062 | * new microcodes that include this information. | |
1063 | */ | |
898ed67b | 1064 | priv->init_evtlog_ptr = pieces.init_evtlog_ptr; |
b2e640d4 | 1065 | if (pieces.init_evtlog_size) |
898ed67b | 1066 | priv->init_evtlog_size = (pieces.init_evtlog_size - 16)/12; |
b2e640d4 | 1067 | else |
898ed67b | 1068 | priv->init_evtlog_size = |
38622419 | 1069 | cfg(priv)->base_params->max_event_log_size; |
898ed67b WYG |
1070 | priv->init_errlog_ptr = pieces.init_errlog_ptr; |
1071 | priv->inst_evtlog_ptr = pieces.inst_evtlog_ptr; | |
b2e640d4 | 1072 | if (pieces.inst_evtlog_size) |
898ed67b | 1073 | priv->inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12; |
b2e640d4 | 1074 | else |
898ed67b | 1075 | priv->inst_evtlog_size = |
38622419 | 1076 | cfg(priv)->base_params->max_event_log_size; |
898ed67b | 1077 | priv->inst_errlog_ptr = pieces.inst_errlog_ptr; |
0cb38d65 WYG |
1078 | #ifndef CONFIG_IWLWIFI_P2P |
1079 | ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_PAN; | |
1080 | #endif | |
b2e640d4 | 1081 | |
d2690c0d JB |
1082 | priv->new_scan_threshold_behaviour = |
1083 | !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN); | |
1084 | ||
38622419 | 1085 | if (!(cfg(priv)->sku & EEPROM_SKU_CAP_IPAN_ENABLE)) |
4d2a5d0e | 1086 | ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_PAN; |
c10afb6e | 1087 | |
c6baf7fb JB |
1088 | /* |
1089 | * if not PAN, then don't support P2P -- might be a uCode | |
1090 | * packaging bug or due to the eeprom check above | |
1091 | */ | |
1092 | if (!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN)) | |
1093 | ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_P2P; | |
1094 | ||
4d2a5d0e JB |
1095 | if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) { |
1096 | priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN; | |
cefeaa5f | 1097 | priv->shrd->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM; |
4d2a5d0e JB |
1098 | } else { |
1099 | priv->sta_key_max_num = STA_KEY_MAX_NUM; | |
cefeaa5f | 1100 | priv->shrd->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM; |
4d2a5d0e | 1101 | } |
6a822d06 WYG |
1102 | /* |
1103 | * figure out the offset of chain noise reset and gain commands | |
1104 | * base on the size of standard phy calibration commands table size | |
1105 | */ | |
1106 | if (ucode_capa.standard_phy_calibration_size > | |
1107 | IWL_MAX_PHY_CALIBRATE_TBL_SIZE) | |
1108 | ucode_capa.standard_phy_calibration_size = | |
1109 | IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE; | |
1110 | ||
898ed67b | 1111 | priv->phy_calib_chain_noise_reset_cmd = |
6a822d06 | 1112 | ucode_capa.standard_phy_calibration_size; |
898ed67b | 1113 | priv->phy_calib_chain_noise_gain_cmd = |
6a822d06 WYG |
1114 | ucode_capa.standard_phy_calibration_size + 1; |
1115 | ||
4d2a5d0e JB |
1116 | /* initialize all valid contexts */ |
1117 | iwl_init_context(priv, ucode_capa.flags); | |
1118 | ||
b08dfd04 JB |
1119 | /************************************************** |
1120 | * This is still part of probe() in a sense... | |
1121 | * | |
1122 | * 9. Setup and register with mac80211 and debugfs | |
1123 | **************************************************/ | |
ade4c649 | 1124 | err = iwlagn_mac_setup_register(priv, &ucode_capa); |
b08dfd04 JB |
1125 | if (err) |
1126 | goto out_unbind; | |
1127 | ||
1128 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
1129 | if (err) | |
1130 | IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err); | |
1131 | ||
b481de9c ZY |
1132 | /* We have our copies now, allow OS release its copies */ |
1133 | release_firmware(ucode_raw); | |
898ed67b | 1134 | complete(&priv->firmware_loading_complete); |
b08dfd04 JB |
1135 | return; |
1136 | ||
1137 | try_again: | |
1138 | /* try next, if any */ | |
1139 | if (iwl_request_firmware(priv, false)) | |
1140 | goto out_unbind; | |
1141 | release_firmware(ucode_raw); | |
1142 | return; | |
b481de9c ZY |
1143 | |
1144 | err_pci_alloc: | |
15b1687c | 1145 | IWL_ERR(priv, "failed to allocate pci memory\n"); |
de7f5f92 | 1146 | iwl_dealloc_ucode(trans(priv)); |
b08dfd04 | 1147 | out_unbind: |
898ed67b | 1148 | complete(&priv->firmware_loading_complete); |
26bfc0cf | 1149 | device_release_driver(bus(priv)->dev); |
b481de9c | 1150 | release_firmware(ucode_raw); |
b481de9c ZY |
1151 | } |
1152 | ||
0975cc8f WYG |
1153 | static void iwl_rf_kill_ct_config(struct iwl_priv *priv) |
1154 | { | |
1155 | struct iwl_ct_kill_config cmd; | |
1156 | struct iwl_ct_kill_throttling_config adv_cmd; | |
1157 | unsigned long flags; | |
1158 | int ret = 0; | |
1159 | ||
10b15e6f | 1160 | spin_lock_irqsave(&priv->shrd->lock, flags); |
83ed9015 | 1161 | iwl_write32(bus(priv), CSR_UCODE_DRV_GP1_CLR, |
0975cc8f | 1162 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
10b15e6f | 1163 | spin_unlock_irqrestore(&priv->shrd->lock, flags); |
0975cc8f WYG |
1164 | priv->thermal_throttle.ct_kill_toggle = false; |
1165 | ||
38622419 | 1166 | if (cfg(priv)->base_params->support_ct_kill_exit) { |
0975cc8f | 1167 | adv_cmd.critical_temperature_enter = |
d6189124 | 1168 | cpu_to_le32(hw_params(priv).ct_kill_threshold); |
0975cc8f | 1169 | adv_cmd.critical_temperature_exit = |
d6189124 | 1170 | cpu_to_le32(hw_params(priv).ct_kill_exit_threshold); |
0975cc8f | 1171 | |
e6bb4c9c | 1172 | ret = iwl_trans_send_cmd_pdu(trans(priv), |
e419d62d EG |
1173 | REPLY_CT_KILL_CONFIG_CMD, |
1174 | CMD_SYNC, sizeof(adv_cmd), &adv_cmd); | |
0975cc8f WYG |
1175 | if (ret) |
1176 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); | |
1177 | else | |
1178 | IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " | |
d6189124 EG |
1179 | "succeeded, critical temperature enter is %d," |
1180 | "exit is %d\n", | |
1181 | hw_params(priv).ct_kill_threshold, | |
1182 | hw_params(priv).ct_kill_exit_threshold); | |
0975cc8f WYG |
1183 | } else { |
1184 | cmd.critical_temperature_R = | |
d6189124 | 1185 | cpu_to_le32(hw_params(priv).ct_kill_threshold); |
0975cc8f | 1186 | |
e6bb4c9c | 1187 | ret = iwl_trans_send_cmd_pdu(trans(priv), |
e419d62d EG |
1188 | REPLY_CT_KILL_CONFIG_CMD, |
1189 | CMD_SYNC, sizeof(cmd), &cmd); | |
0975cc8f WYG |
1190 | if (ret) |
1191 | IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); | |
1192 | else | |
1193 | IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " | |
d6189124 EG |
1194 | "succeeded, " |
1195 | "critical temperature is %d\n", | |
1196 | hw_params(priv).ct_kill_threshold); | |
0975cc8f WYG |
1197 | } |
1198 | } | |
1199 | ||
6d6a1afd SZ |
1200 | static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg) |
1201 | { | |
1202 | struct iwl_calib_cfg_cmd calib_cfg_cmd; | |
1203 | struct iwl_host_cmd cmd = { | |
1204 | .id = CALIBRATION_CFG_CMD, | |
3fa50738 JB |
1205 | .len = { sizeof(struct iwl_calib_cfg_cmd), }, |
1206 | .data = { &calib_cfg_cmd, }, | |
6d6a1afd SZ |
1207 | }; |
1208 | ||
1209 | memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd)); | |
af4dc88c | 1210 | calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_RT_CFG_ALL; |
7cb1b088 | 1211 | calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg); |
6d6a1afd | 1212 | |
e6bb4c9c | 1213 | return iwl_trans_send_cmd(trans(priv), &cmd); |
6d6a1afd SZ |
1214 | } |
1215 | ||
1216 | ||
e505c433 WYG |
1217 | static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant) |
1218 | { | |
1219 | struct iwl_tx_ant_config_cmd tx_ant_cmd = { | |
1220 | .valid = cpu_to_le32(valid_tx_ant), | |
1221 | }; | |
1222 | ||
1223 | if (IWL_UCODE_API(priv->ucode_ver) > 1) { | |
1224 | IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant); | |
e6bb4c9c | 1225 | return iwl_trans_send_cmd_pdu(trans(priv), |
e505c433 WYG |
1226 | TX_ANT_CONFIGURATION_CMD, |
1227 | CMD_SYNC, | |
1228 | sizeof(struct iwl_tx_ant_config_cmd), | |
1229 | &tx_ant_cmd); | |
1230 | } else { | |
1231 | IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n"); | |
1232 | return -EOPNOTSUPP; | |
1233 | } | |
1234 | } | |
1235 | ||
b481de9c | 1236 | /** |
4a4a9e81 | 1237 | * iwl_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 1238 | * from protocol/runtime uCode (initialization uCode's |
4a4a9e81 | 1239 | * Alive gets handled by iwl_init_alive_start()). |
b481de9c | 1240 | */ |
4613e72d | 1241 | int iwl_alive_start(struct iwl_priv *priv) |
b481de9c | 1242 | { |
57aab75a | 1243 | int ret = 0; |
246ed355 | 1244 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; |
b481de9c | 1245 | |
ca7966c8 | 1246 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); |
6d6a1afd | 1247 | |
5b9f8cd3 | 1248 | /* After the ALIVE response, we can send host commands to the uCode */ |
63013ae3 | 1249 | set_bit(STATUS_ALIVE, &priv->shrd->status); |
b481de9c | 1250 | |
22de94de SG |
1251 | /* Enable watchdog to monitor the driver tx queues */ |
1252 | iwl_setup_watchdog(priv); | |
b74e31a9 | 1253 | |
845a9c0d | 1254 | if (iwl_is_rfkill(priv->shrd)) |
ca7966c8 | 1255 | return -ERFKILL; |
b481de9c | 1256 | |
98d4bf0c JB |
1257 | if (priv->event_log.ucode_trace) { |
1258 | /* start collecting data now */ | |
1259 | mod_timer(&priv->ucode_trace, jiffies); | |
1260 | } | |
1261 | ||
bc795df1 | 1262 | /* download priority table before any calibration request */ |
38622419 DF |
1263 | if (cfg(priv)->bt_params && |
1264 | cfg(priv)->bt_params->advanced_bt_coexist) { | |
f7322f8f | 1265 | /* Configure Bluetooth device coexistence support */ |
38622419 | 1266 | if (cfg(priv)->bt_params->bt_sco_disable) |
207ecc5e MV |
1267 | priv->bt_enable_pspoll = false; |
1268 | else | |
1269 | priv->bt_enable_pspoll = true; | |
1270 | ||
f7322f8f WYG |
1271 | priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK; |
1272 | priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT; | |
1273 | priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT; | |
e55b517c | 1274 | iwlagn_send_advance_bt_config(priv); |
f7322f8f | 1275 | priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS; |
207ecc5e MV |
1276 | priv->cur_rssi_ctx = NULL; |
1277 | ||
b96b09db | 1278 | iwl_send_prio_tbl(trans(priv)); |
f7322f8f WYG |
1279 | |
1280 | /* FIXME: w/a to force change uCode BT state machine */ | |
b96b09db | 1281 | ret = iwl_send_bt_env(trans(priv), IWL_BT_COEX_ENV_OPEN, |
ca7966c8 JB |
1282 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); |
1283 | if (ret) | |
1284 | return ret; | |
b96b09db | 1285 | ret = iwl_send_bt_env(trans(priv), IWL_BT_COEX_ENV_CLOSE, |
ca7966c8 JB |
1286 | BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); |
1287 | if (ret) | |
1288 | return ret; | |
e55b517c WYG |
1289 | } else { |
1290 | /* | |
1291 | * default is 2-wire BT coexexistence support | |
1292 | */ | |
1293 | iwl_send_bt_config(priv); | |
f7322f8f | 1294 | } |
e55b517c | 1295 | |
885765f1 VM |
1296 | /* |
1297 | * Perform runtime calibrations, including DC calibration. | |
1298 | */ | |
1299 | iwlagn_send_calib_cfg_rt(priv, IWL_CALIB_CFG_DC_IDX); | |
bc795df1 | 1300 | |
36d6825b | 1301 | ieee80211_wake_queues(priv->hw); |
b481de9c | 1302 | |
470ab2dd | 1303 | priv->active_rate = IWL_RATES_MASK; |
b481de9c | 1304 | |
2f748dec | 1305 | /* Configure Tx antenna selection based on H/W config */ |
38622419 | 1306 | iwlagn_send_tx_ant_config(priv, cfg(priv)->valid_tx_ant); |
2f748dec | 1307 | |
57210f7c | 1308 | if (iwl_is_associated_ctx(ctx) && !priv->shrd->wowlan) { |
c1adf9fb | 1309 | struct iwl_rxon_cmd *active_rxon = |
246ed355 | 1310 | (struct iwl_rxon_cmd *)&ctx->active; |
019fb97d | 1311 | /* apply any changes in staging */ |
246ed355 | 1312 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
b481de9c ZY |
1313 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
1314 | } else { | |
d0fe478c | 1315 | struct iwl_rxon_context *tmp; |
b481de9c | 1316 | /* Initialize our rx_config data */ |
d0fe478c JB |
1317 | for_each_context(priv, tmp) |
1318 | iwl_connection_init_rx_config(priv, tmp); | |
45823531 | 1319 | |
e3f10cea | 1320 | iwlagn_set_rxon_chain(priv, ctx); |
b481de9c ZY |
1321 | } |
1322 | ||
57210f7c | 1323 | if (!priv->shrd->wowlan) { |
c8ac61cf JB |
1324 | /* WoWLAN ucode will not reply in the same way, skip it */ |
1325 | iwl_reset_run_time_calib(priv); | |
1326 | } | |
4a4a9e81 | 1327 | |
63013ae3 | 1328 | set_bit(STATUS_READY, &priv->shrd->status); |
9e2e7422 | 1329 | |
b481de9c | 1330 | /* Configure the adapter for unassociated operation */ |
805a3b81 | 1331 | ret = iwlagn_commit_rxon(priv, ctx); |
ca7966c8 JB |
1332 | if (ret) |
1333 | return ret; | |
b481de9c ZY |
1334 | |
1335 | /* At this point, the NIC is initialized and operational */ | |
47f4a587 | 1336 | iwl_rf_kill_ct_config(priv); |
5a66926a | 1337 | |
e1623446 | 1338 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); |
c46fbefa | 1339 | |
ca7966c8 | 1340 | return iwl_power_update_mode(priv, true); |
b481de9c ZY |
1341 | } |
1342 | ||
4e39317d | 1343 | static void iwl_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 1344 | |
7335613a | 1345 | void __iwl_down(struct iwl_priv *priv) |
b481de9c | 1346 | { |
22dd2fd2 | 1347 | int exit_pending; |
b481de9c | 1348 | |
e1623446 | 1349 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); |
b481de9c | 1350 | |
d745d472 SG |
1351 | iwl_scan_cancel_timeout(priv, 200); |
1352 | ||
c6baf7fb JB |
1353 | /* |
1354 | * If active, scanning won't cancel it, so say it expired. | |
1355 | * No race since we hold the mutex here and a new one | |
1356 | * can't come in at this time. | |
1357 | */ | |
1358 | ieee80211_remain_on_channel_expired(priv->hw); | |
1359 | ||
63013ae3 EG |
1360 | exit_pending = |
1361 | test_and_set_bit(STATUS_EXIT_PENDING, &priv->shrd->status); | |
b481de9c | 1362 | |
b62177a0 SG |
1363 | /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set |
1364 | * to prevent rearm timer */ | |
22de94de | 1365 | del_timer_sync(&priv->watchdog); |
b62177a0 | 1366 | |
dcef732c | 1367 | iwl_clear_ucode_stations(priv, NULL); |
a194e324 | 1368 | iwl_dealloc_bcast_stations(priv); |
db125c78 | 1369 | iwl_clear_driver_stations(priv); |
b481de9c | 1370 | |
a1174138 | 1371 | /* reset BT coex data */ |
da5dbb97 | 1372 | priv->bt_status = 0; |
207ecc5e MV |
1373 | priv->cur_rssi_ctx = NULL; |
1374 | priv->bt_is_sco = 0; | |
38622419 | 1375 | if (cfg(priv)->bt_params) |
7cb1b088 | 1376 | priv->bt_traffic_load = |
38622419 | 1377 | cfg(priv)->bt_params->bt_init_traffic_load; |
7cb1b088 WYG |
1378 | else |
1379 | priv->bt_traffic_load = 0; | |
bee008b7 WYG |
1380 | priv->bt_full_concurrent = false; |
1381 | priv->bt_ci_compliance = 0; | |
a1174138 | 1382 | |
b481de9c ZY |
1383 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
1384 | * exiting the module */ | |
1385 | if (!exit_pending) | |
63013ae3 | 1386 | clear_bit(STATUS_EXIT_PENDING, &priv->shrd->status); |
b481de9c | 1387 | |
859cfb0a | 1388 | if (priv->mac80211_registered) |
b481de9c ZY |
1389 | ieee80211_stop_queues(priv->hw); |
1390 | ||
909e9b23 EG |
1391 | iwl_trans_stop_device(trans(priv)); |
1392 | ||
1a10f433 | 1393 | /* Clear out all status bits but a few that are stable across reset */ |
63013ae3 EG |
1394 | priv->shrd->status &= |
1395 | test_bit(STATUS_RF_KILL_HW, &priv->shrd->status) << | |
b481de9c | 1396 | STATUS_RF_KILL_HW | |
63013ae3 | 1397 | test_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status) << |
9788864e | 1398 | STATUS_GEO_CONFIGURED | |
63013ae3 | 1399 | test_bit(STATUS_FW_ERROR, &priv->shrd->status) << |
052ec3f1 | 1400 | STATUS_FW_ERROR | |
63013ae3 | 1401 | test_bit(STATUS_EXIT_PENDING, &priv->shrd->status) << |
052ec3f1 | 1402 | STATUS_EXIT_PENDING; |
b481de9c | 1403 | |
77834543 | 1404 | dev_kfree_skb(priv->beacon_skb); |
12e934dc | 1405 | priv->beacon_skb = NULL; |
b481de9c ZY |
1406 | } |
1407 | ||
7335613a | 1408 | void iwl_down(struct iwl_priv *priv) |
b481de9c | 1409 | { |
6ac2f839 | 1410 | mutex_lock(&priv->shrd->mutex); |
5b9f8cd3 | 1411 | __iwl_down(priv); |
6ac2f839 | 1412 | mutex_unlock(&priv->shrd->mutex); |
b24d22b1 | 1413 | |
4e39317d | 1414 | iwl_cancel_deferred_work(priv); |
b481de9c ZY |
1415 | } |
1416 | ||
b481de9c ZY |
1417 | /***************************************************************************** |
1418 | * | |
1419 | * Workqueue callbacks | |
1420 | * | |
1421 | *****************************************************************************/ | |
1422 | ||
16e727e8 EG |
1423 | static void iwl_bg_run_time_calib_work(struct work_struct *work) |
1424 | { | |
1425 | struct iwl_priv *priv = container_of(work, struct iwl_priv, | |
1426 | run_time_calib_work); | |
1427 | ||
6ac2f839 | 1428 | mutex_lock(&priv->shrd->mutex); |
16e727e8 | 1429 | |
63013ae3 EG |
1430 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status) || |
1431 | test_bit(STATUS_SCANNING, &priv->shrd->status)) { | |
6ac2f839 | 1432 | mutex_unlock(&priv->shrd->mutex); |
16e727e8 EG |
1433 | return; |
1434 | } | |
1435 | ||
1436 | if (priv->start_calib) { | |
0da0e5bf JB |
1437 | iwl_chain_noise_calibration(priv); |
1438 | iwl_sensitivity_calibration(priv); | |
16e727e8 EG |
1439 | } |
1440 | ||
6ac2f839 | 1441 | mutex_unlock(&priv->shrd->mutex); |
16e727e8 EG |
1442 | } |
1443 | ||
7335613a | 1444 | void iwlagn_prepare_restart(struct iwl_priv *priv) |
e43e85c4 JB |
1445 | { |
1446 | struct iwl_rxon_context *ctx; | |
1447 | bool bt_full_concurrent; | |
1448 | u8 bt_ci_compliance; | |
1449 | u8 bt_load; | |
1450 | u8 bt_status; | |
207ecc5e | 1451 | bool bt_is_sco; |
e43e85c4 | 1452 | |
6ac2f839 | 1453 | lockdep_assert_held(&priv->shrd->mutex); |
e43e85c4 JB |
1454 | |
1455 | for_each_context(priv, ctx) | |
1456 | ctx->vif = NULL; | |
1457 | priv->is_open = 0; | |
1458 | ||
1459 | /* | |
1460 | * __iwl_down() will clear the BT status variables, | |
1461 | * which is correct, but when we restart we really | |
1462 | * want to keep them so restore them afterwards. | |
1463 | * | |
1464 | * The restart process will later pick them up and | |
1465 | * re-configure the hw when we reconfigure the BT | |
1466 | * command. | |
1467 | */ | |
1468 | bt_full_concurrent = priv->bt_full_concurrent; | |
1469 | bt_ci_compliance = priv->bt_ci_compliance; | |
1470 | bt_load = priv->bt_traffic_load; | |
1471 | bt_status = priv->bt_status; | |
207ecc5e | 1472 | bt_is_sco = priv->bt_is_sco; |
e43e85c4 JB |
1473 | |
1474 | __iwl_down(priv); | |
1475 | ||
1476 | priv->bt_full_concurrent = bt_full_concurrent; | |
1477 | priv->bt_ci_compliance = bt_ci_compliance; | |
1478 | priv->bt_traffic_load = bt_load; | |
1479 | priv->bt_status = bt_status; | |
207ecc5e | 1480 | priv->bt_is_sco = bt_is_sco; |
e43e85c4 JB |
1481 | } |
1482 | ||
5b9f8cd3 | 1483 | static void iwl_bg_restart(struct work_struct *data) |
b481de9c | 1484 | { |
c79dd5b5 | 1485 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c | 1486 | |
63013ae3 | 1487 | if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) |
b481de9c ZY |
1488 | return; |
1489 | ||
63013ae3 | 1490 | if (test_and_clear_bit(STATUS_FW_ERROR, &priv->shrd->status)) { |
6ac2f839 | 1491 | mutex_lock(&priv->shrd->mutex); |
e43e85c4 | 1492 | iwlagn_prepare_restart(priv); |
6ac2f839 | 1493 | mutex_unlock(&priv->shrd->mutex); |
a1174138 | 1494 | iwl_cancel_deferred_work(priv); |
19cc1087 JB |
1495 | ieee80211_restart_hw(priv->hw); |
1496 | } else { | |
ca7966c8 | 1497 | WARN_ON(1); |
19cc1087 | 1498 | } |
b481de9c ZY |
1499 | } |
1500 | ||
0fd09502 | 1501 | |
0fd09502 | 1502 | |
0fd09502 | 1503 | |
7335613a | 1504 | void iwlagn_disable_roc(struct iwl_priv *priv) |
f0b6e2e8 | 1505 | { |
7335613a | 1506 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN]; |
f0b6e2e8 | 1507 | |
7335613a | 1508 | lockdep_assert_held(&priv->shrd->mutex); |
f0b6e2e8 | 1509 | |
7335613a WYG |
1510 | if (!priv->hw_roc_setup) |
1511 | return; | |
f0b6e2e8 | 1512 | |
7335613a WYG |
1513 | ctx->staging.dev_type = RXON_DEV_TYPE_P2P; |
1514 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
f0b6e2e8 | 1515 | |
7335613a | 1516 | priv->hw_roc_channel = NULL; |
f0b6e2e8 | 1517 | |
7335613a | 1518 | memset(ctx->staging.node_addr, 0, ETH_ALEN); |
5ed540ae | 1519 | |
7335613a | 1520 | iwlagn_commit_rxon(priv, ctx); |
f0b6e2e8 | 1521 | |
7335613a WYG |
1522 | ctx->is_active = false; |
1523 | priv->hw_roc_setup = false; | |
f0b6e2e8 RC |
1524 | } |
1525 | ||
7335613a | 1526 | static void iwlagn_disable_roc_work(struct work_struct *work) |
b481de9c | 1527 | { |
7335613a WYG |
1528 | struct iwl_priv *priv = container_of(work, struct iwl_priv, |
1529 | hw_roc_disable_work.work); | |
b481de9c | 1530 | |
6ac2f839 | 1531 | mutex_lock(&priv->shrd->mutex); |
7335613a | 1532 | iwlagn_disable_roc(priv); |
6ac2f839 | 1533 | mutex_unlock(&priv->shrd->mutex); |
b481de9c ZY |
1534 | } |
1535 | ||
7335613a WYG |
1536 | /***************************************************************************** |
1537 | * | |
1538 | * driver setup and teardown | |
1539 | * | |
1540 | *****************************************************************************/ | |
1541 | ||
1542 | static void iwl_setup_deferred_work(struct iwl_priv *priv) | |
b481de9c | 1543 | { |
7335613a | 1544 | priv->shrd->workqueue = create_singlethread_workqueue(DRV_NAME); |
b481de9c | 1545 | |
7335613a | 1546 | init_waitqueue_head(&priv->shrd->wait_command_queue); |
948c171c | 1547 | |
7335613a WYG |
1548 | INIT_WORK(&priv->restart, iwl_bg_restart); |
1549 | INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); | |
1550 | INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); | |
1551 | INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush); | |
1552 | INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency); | |
1553 | INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config); | |
1554 | INIT_DELAYED_WORK(&priv->hw_roc_disable_work, | |
1555 | iwlagn_disable_roc_work); | |
e655b9f0 | 1556 | |
7335613a | 1557 | iwl_setup_scan_deferred_work(priv); |
5a66926a | 1558 | |
38622419 DF |
1559 | if (cfg(priv)->lib->bt_setup_deferred_work) |
1560 | cfg(priv)->lib->bt_setup_deferred_work(priv); | |
5a66926a | 1561 | |
7335613a WYG |
1562 | init_timer(&priv->statistics_periodic); |
1563 | priv->statistics_periodic.data = (unsigned long)priv; | |
1564 | priv->statistics_periodic.function = iwl_bg_statistics_periodic; | |
6cd0b1cb | 1565 | |
7335613a WYG |
1566 | init_timer(&priv->ucode_trace); |
1567 | priv->ucode_trace.data = (unsigned long)priv; | |
1568 | priv->ucode_trace.function = iwl_bg_ucode_trace; | |
948c171c | 1569 | |
7335613a WYG |
1570 | init_timer(&priv->watchdog); |
1571 | priv->watchdog.data = (unsigned long)priv; | |
1572 | priv->watchdog.function = iwl_bg_watchdog; | |
b481de9c ZY |
1573 | } |
1574 | ||
7335613a | 1575 | static void iwl_cancel_deferred_work(struct iwl_priv *priv) |
c8ac61cf | 1576 | { |
38622419 DF |
1577 | if (cfg(priv)->lib->cancel_deferred_work) |
1578 | cfg(priv)->lib->cancel_deferred_work(priv); | |
c8ac61cf | 1579 | |
7335613a WYG |
1580 | cancel_work_sync(&priv->run_time_calib_work); |
1581 | cancel_work_sync(&priv->beacon_update); | |
c8ac61cf | 1582 | |
7335613a | 1583 | iwl_cancel_scan_deferred_work(priv); |
c8ac61cf | 1584 | |
7335613a WYG |
1585 | cancel_work_sync(&priv->bt_full_concurrency); |
1586 | cancel_work_sync(&priv->bt_runtime_config); | |
1587 | cancel_delayed_work_sync(&priv->hw_roc_disable_work); | |
c8ac61cf | 1588 | |
7335613a WYG |
1589 | del_timer_sync(&priv->statistics_periodic); |
1590 | del_timer_sync(&priv->ucode_trace); | |
1591 | } | |
c8ac61cf | 1592 | |
7335613a WYG |
1593 | static void iwl_init_hw_rates(struct iwl_priv *priv, |
1594 | struct ieee80211_rate *rates) | |
1595 | { | |
1596 | int i; | |
c8ac61cf | 1597 | |
7335613a WYG |
1598 | for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) { |
1599 | rates[i].bitrate = iwl_rates[i].ieee * 5; | |
1600 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | |
1601 | rates[i].hw_value_short = i; | |
1602 | rates[i].flags = 0; | |
1603 | if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) { | |
1604 | /* | |
1605 | * If CCK != 1M then set short preamble rate flag. | |
1606 | */ | |
1607 | rates[i].flags |= | |
1608 | (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ? | |
1609 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | |
1610 | } | |
c8ac61cf | 1611 | } |
c8ac61cf JB |
1612 | } |
1613 | ||
7335613a | 1614 | static int iwl_init_drv(struct iwl_priv *priv) |
c8ac61cf | 1615 | { |
7335613a | 1616 | int ret; |
c8ac61cf | 1617 | |
7335613a | 1618 | spin_lock_init(&priv->shrd->sta_lock); |
c8ac61cf | 1619 | |
7335613a | 1620 | mutex_init(&priv->shrd->mutex); |
c8ac61cf | 1621 | |
45c30dba | 1622 | INIT_LIST_HEAD(&trans(priv)->calib_results); |
80e83da7 | 1623 | |
7335613a WYG |
1624 | priv->ieee_channels = NULL; |
1625 | priv->ieee_rates = NULL; | |
1626 | priv->band = IEEE80211_BAND_2GHZ; | |
c8ac61cf | 1627 | |
7335613a WYG |
1628 | priv->iw_mode = NL80211_IFTYPE_STATION; |
1629 | priv->current_ht_config.smps = IEEE80211_SMPS_STATIC; | |
1630 | priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF; | |
1631 | priv->agg_tids_count = 0; | |
c8ac61cf | 1632 | |
7335613a WYG |
1633 | /* initialize force reset */ |
1634 | priv->force_reset[IWL_RF_RESET].reset_duration = | |
1635 | IWL_DELAY_NEXT_FORCE_RF_RESET; | |
1636 | priv->force_reset[IWL_FW_RESET].reset_duration = | |
1637 | IWL_DELAY_NEXT_FORCE_FW_RELOAD; | |
c8ac61cf | 1638 | |
7335613a | 1639 | priv->rx_statistics_jiffies = jiffies; |
c8ac61cf | 1640 | |
7335613a WYG |
1641 | /* Choose which receivers/antennas to use */ |
1642 | iwlagn_set_rxon_chain(priv, &priv->contexts[IWL_RXON_CTX_BSS]); | |
c8ac61cf | 1643 | |
7335613a | 1644 | iwl_init_scan_params(priv); |
c8ac61cf | 1645 | |
7335613a | 1646 | /* init bt coex */ |
38622419 DF |
1647 | if (cfg(priv)->bt_params && |
1648 | cfg(priv)->bt_params->advanced_bt_coexist) { | |
7335613a WYG |
1649 | priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT; |
1650 | priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT; | |
1651 | priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK; | |
1652 | priv->bt_on_thresh = BT_ON_THRESHOLD_DEF; | |
1653 | priv->bt_duration = BT_DURATION_LIMIT_DEF; | |
1654 | priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; | |
1655 | } | |
c8ac61cf | 1656 | |
7335613a | 1657 | ret = iwl_init_channel_map(priv); |
c8ac61cf | 1658 | if (ret) { |
7335613a WYG |
1659 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); |
1660 | goto err; | |
c8ac61cf JB |
1661 | } |
1662 | ||
7335613a WYG |
1663 | ret = iwl_init_geos(priv); |
1664 | if (ret) { | |
1665 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); | |
1666 | goto err_free_channel_map; | |
1667 | } | |
1668 | iwl_init_hw_rates(priv, priv->ieee_rates); | |
c8ac61cf | 1669 | |
7335613a | 1670 | return 0; |
c8ac61cf | 1671 | |
7335613a WYG |
1672 | err_free_channel_map: |
1673 | iwl_free_channel_map(priv); | |
1674 | err: | |
1675 | return ret; | |
1676 | } | |
c8ac61cf | 1677 | |
7335613a WYG |
1678 | static void iwl_uninit_drv(struct iwl_priv *priv) |
1679 | { | |
7335613a WYG |
1680 | iwl_free_geos(priv); |
1681 | iwl_free_channel_map(priv); | |
1682 | if (priv->tx_cmd_pool) | |
1683 | kmem_cache_destroy(priv->tx_cmd_pool); | |
1684 | kfree(priv->scan_cmd); | |
1685 | kfree(priv->beacon_cmd); | |
1686 | kfree(rcu_dereference_raw(priv->noa_data)); | |
1687 | #ifdef CONFIG_IWLWIFI_DEBUGFS | |
1688 | kfree(priv->wowlan_sram); | |
1689 | #endif | |
1690 | } | |
c8ac61cf | 1691 | |
c8ac61cf | 1692 | |
c8ac61cf | 1693 | |
7335613a WYG |
1694 | static u32 iwl_hw_detect(struct iwl_priv *priv) |
1695 | { | |
1696 | return iwl_read32(bus(priv), CSR_HW_REV); | |
1697 | } | |
c8ac61cf | 1698 | |
7335613a WYG |
1699 | /* Size of one Rx buffer in host DRAM */ |
1700 | #define IWL_RX_BUF_SIZE_4K (4 * 1024) | |
1701 | #define IWL_RX_BUF_SIZE_8K (8 * 1024) | |
dda61a44 | 1702 | |
07d4f1ad WYG |
1703 | static int iwl_set_hw_params(struct iwl_priv *priv) |
1704 | { | |
9d143e9a | 1705 | if (iwlagn_mod_params.amsdu_size_8K) |
d6189124 EG |
1706 | hw_params(priv).rx_page_order = |
1707 | get_order(IWL_RX_BUF_SIZE_8K); | |
07d4f1ad | 1708 | else |
d6189124 EG |
1709 | hw_params(priv).rx_page_order = |
1710 | get_order(IWL_RX_BUF_SIZE_4K); | |
07d4f1ad | 1711 | |
7428994d | 1712 | if (iwlagn_mod_params.disable_11n & IWL_DISABLE_HT_ALL) |
38622419 | 1713 | cfg(priv)->sku &= ~EEPROM_SKU_CAP_11N_ENABLE; |
07d4f1ad | 1714 | |
fd656935 | 1715 | hw_params(priv).num_ampdu_queues = |
38622419 | 1716 | cfg(priv)->base_params->num_of_ampdu_queues; |
fd656935 | 1717 | hw_params(priv).shadow_reg_enable = |
38622419 DF |
1718 | cfg(priv)->base_params->shadow_reg_enable; |
1719 | hw_params(priv).sku = cfg(priv)->sku; | |
1720 | hw_params(priv).wd_timeout = cfg(priv)->base_params->wd_timeout; | |
fd656935 | 1721 | |
07d4f1ad | 1722 | /* Device-specific setup */ |
38622419 | 1723 | return cfg(priv)->lib->set_hw_params(priv); |
07d4f1ad WYG |
1724 | } |
1725 | ||
119ea186 | 1726 | |
119ea186 | 1727 | |
ebfa867d WYG |
1728 | static void iwl_debug_config(struct iwl_priv *priv) |
1729 | { | |
1730 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEBUG " | |
1731 | #ifdef CONFIG_IWLWIFI_DEBUG | |
1732 | "enabled\n"); | |
1733 | #else | |
1734 | "disabled\n"); | |
1735 | #endif | |
1736 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEBUGFS " | |
1737 | #ifdef CONFIG_IWLWIFI_DEBUGFS | |
1738 | "enabled\n"); | |
1739 | #else | |
1740 | "disabled\n"); | |
1741 | #endif | |
1742 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TRACING " | |
1743 | #ifdef CONFIG_IWLWIFI_DEVICE_TRACING | |
1744 | "enabled\n"); | |
1745 | #else | |
1746 | "disabled\n"); | |
1747 | #endif | |
1748 | ||
5ef15ccc WYG |
1749 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TESTMODE " |
1750 | #ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE | |
ebfa867d WYG |
1751 | "enabled\n"); |
1752 | #else | |
1753 | "disabled\n"); | |
0cb38d65 WYG |
1754 | #endif |
1755 | dev_printk(KERN_INFO, bus(priv)->dev, "CONFIG_IWLWIFI_P2P " | |
1756 | #ifdef CONFIG_IWLWIFI_P2P | |
1757 | "enabled\n"); | |
1758 | #else | |
1759 | "disabled\n"); | |
ebfa867d WYG |
1760 | #endif |
1761 | } | |
1762 | ||
e6bb4c9c EG |
1763 | int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops, |
1764 | struct iwl_cfg *cfg) | |
b2ea345e WYG |
1765 | { |
1766 | int err = 0; | |
1767 | struct iwl_priv *priv; | |
1768 | struct ieee80211_hw *hw; | |
084dd791 | 1769 | u16 num_mac; |
b2ea345e WYG |
1770 | u32 hw_rev; |
1771 | ||
1772 | /************************ | |
1773 | * 1. Allocating HW data | |
1774 | ************************/ | |
fa06ec79 | 1775 | hw = iwl_alloc_all(); |
b2ea345e | 1776 | if (!hw) { |
fa06ec79 | 1777 | pr_err("%s: Cannot allocate network device\n", cfg->name); |
b2ea345e | 1778 | err = -ENOMEM; |
807caf26 EG |
1779 | goto out; |
1780 | } | |
1781 | ||
b2ea345e | 1782 | priv = hw->priv; |
cac988a6 | 1783 | priv->shrd = &priv->_shrd; |
18d0077f | 1784 | bus->shrd = priv->shrd; |
cac988a6 EG |
1785 | priv->shrd->bus = bus; |
1786 | priv->shrd->priv = priv; | |
a48709c5 | 1787 | |
e6bb4c9c EG |
1788 | priv->shrd->trans = trans_ops->alloc(priv->shrd); |
1789 | if (priv->shrd->trans == NULL) { | |
1790 | err = -ENOMEM; | |
1791 | goto out_free_traffic_mem; | |
1792 | } | |
1793 | ||
b2ea345e | 1794 | /* At this point both hw and priv are allocated. */ |
8f2d3d2a | 1795 | |
26bfc0cf | 1796 | SET_IEEE80211_DEV(hw, bus(priv)->dev); |
b481de9c | 1797 | |
ebfa867d WYG |
1798 | /* what debugging capabilities we have */ |
1799 | iwl_debug_config(priv); | |
1800 | ||
e1623446 | 1801 | IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); |
38622419 | 1802 | cfg(priv) = cfg; |
316c30d9 | 1803 | |
bee008b7 WYG |
1804 | /* is antenna coupling more than 35dB ? */ |
1805 | priv->bt_ant_couple_ok = | |
48f20d35 EG |
1806 | (iwlagn_mod_params.ant_coupling > |
1807 | IWL_BT_ANTENNA_COUPLING_THRESHOLD) ? | |
1808 | true : false; | |
bee008b7 | 1809 | |
9f28ebc3 | 1810 | /* enable/disable bt channel inhibition */ |
48f20d35 | 1811 | priv->bt_ch_announce = iwlagn_mod_params.bt_ch_announce; |
9f28ebc3 WYG |
1812 | IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n", |
1813 | (priv->bt_ch_announce) ? "On" : "Off"); | |
f37837c9 | 1814 | |
20594eb0 WYG |
1815 | if (iwl_alloc_traffic_mem(priv)) |
1816 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); | |
b481de9c | 1817 | |
731a29b7 | 1818 | /* these spin locks will be used in apm_ops.init and EEPROM access |
a8b50a0a MA |
1819 | * we should init now |
1820 | */ | |
83ed9015 | 1821 | spin_lock_init(&bus(priv)->reg_lock); |
10b15e6f | 1822 | spin_lock_init(&priv->shrd->lock); |
4843b5a7 RC |
1823 | |
1824 | /* | |
1825 | * stop and reset the on-board processor just in case it is in a | |
1826 | * strange state ... like being left stranded by a primary kernel | |
1827 | * and this is now the kdump kernel trying to start up | |
1828 | */ | |
83ed9015 | 1829 | iwl_write32(bus(priv), CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
4843b5a7 | 1830 | |
084dd791 EG |
1831 | /*********************** |
1832 | * 3. Read REV register | |
1833 | ***********************/ | |
e98a1302 | 1834 | hw_rev = iwl_hw_detect(priv); |
c11362c0 | 1835 | IWL_INFO(priv, "Detected %s, REV=0x%X\n", |
38622419 | 1836 | cfg(priv)->name, hw_rev); |
316c30d9 | 1837 | |
e6bb4c9c | 1838 | err = iwl_trans_request_irq(trans(priv)); |
1e89cbac | 1839 | if (err) |
e6bb4c9c | 1840 | goto out_free_trans; |
1e89cbac | 1841 | |
e6bb4c9c | 1842 | if (iwl_trans_prepare_card_hw(trans(priv))) { |
bcd4fe2f | 1843 | err = -EIO; |
086ed117 | 1844 | IWL_WARN(priv, "Failed, HW not ready\n"); |
1e89cbac | 1845 | goto out_free_trans; |
086ed117 MA |
1846 | } |
1847 | ||
91238714 TW |
1848 | /***************** |
1849 | * 4. Read EEPROM | |
1850 | *****************/ | |
316c30d9 | 1851 | /* Read the EEPROM */ |
e98a1302 | 1852 | err = iwl_eeprom_init(priv, hw_rev); |
316c30d9 | 1853 | if (err) { |
15b1687c | 1854 | IWL_ERR(priv, "Unable to init EEPROM\n"); |
1e89cbac | 1855 | goto out_free_trans; |
316c30d9 | 1856 | } |
8614f360 TW |
1857 | err = iwl_eeprom_check_version(priv); |
1858 | if (err) | |
c8f16138 | 1859 | goto out_free_eeprom; |
8614f360 | 1860 | |
21a5b3c6 WYG |
1861 | err = iwl_eeprom_check_sku(priv); |
1862 | if (err) | |
1863 | goto out_free_eeprom; | |
1864 | ||
02883017 | 1865 | /* extract MAC Address */ |
ab36eab2 | 1866 | iwl_eeprom_get_mac(priv->shrd, priv->addresses[0].addr); |
c6fa17ed WYG |
1867 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); |
1868 | priv->hw->wiphy->addresses = priv->addresses; | |
1869 | priv->hw->wiphy->n_addresses = 1; | |
ab36eab2 | 1870 | num_mac = iwl_eeprom_query16(priv->shrd, EEPROM_NUM_MAC_ADDRESS); |
c6fa17ed WYG |
1871 | if (num_mac > 1) { |
1872 | memcpy(priv->addresses[1].addr, priv->addresses[0].addr, | |
1873 | ETH_ALEN); | |
1874 | priv->addresses[1].addr[5]++; | |
1875 | priv->hw->wiphy->n_addresses++; | |
1876 | } | |
316c30d9 AK |
1877 | |
1878 | /************************ | |
1879 | * 5. Setup HW constants | |
1880 | ************************/ | |
da154e30 | 1881 | if (iwl_set_hw_params(priv)) { |
084dd791 | 1882 | err = -ENOENT; |
15b1687c | 1883 | IWL_ERR(priv, "failed to set hw parameters\n"); |
073d3f5f | 1884 | goto out_free_eeprom; |
316c30d9 AK |
1885 | } |
1886 | ||
1887 | /******************* | |
6ba87956 | 1888 | * 6. Setup priv |
316c30d9 | 1889 | *******************/ |
b481de9c | 1890 | |
6ba87956 | 1891 | err = iwl_init_drv(priv); |
bf85ea4f | 1892 | if (err) |
399f4900 | 1893 | goto out_free_eeprom; |
bf85ea4f | 1894 | /* At this point both hw and priv are initialized. */ |
316c30d9 | 1895 | |
316c30d9 | 1896 | /******************** |
09f9bf79 | 1897 | * 7. Setup services |
316c30d9 | 1898 | ********************/ |
4e39317d | 1899 | iwl_setup_deferred_work(priv); |
653fa4a0 | 1900 | iwl_setup_rx_handlers(priv); |
4613e72d | 1901 | iwl_testmode_init(priv); |
316c30d9 | 1902 | |
158bea07 | 1903 | /********************************************* |
084dd791 | 1904 | * 8. Enable interrupts |
158bea07 | 1905 | *********************************************/ |
6ba87956 | 1906 | |
554d1d02 | 1907 | iwl_enable_rfkill_int(priv); |
6cd0b1cb | 1908 | |
6cd0b1cb | 1909 | /* If platform's RF_KILL switch is NOT set to KILL */ |
83ed9015 EG |
1910 | if (iwl_read32(bus(priv), |
1911 | CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | |
63013ae3 | 1912 | clear_bit(STATUS_RF_KILL_HW, &priv->shrd->status); |
6cd0b1cb | 1913 | else |
63013ae3 | 1914 | set_bit(STATUS_RF_KILL_HW, &priv->shrd->status); |
6ba87956 | 1915 | |
a60e77e5 | 1916 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, |
63013ae3 | 1917 | test_bit(STATUS_RF_KILL_HW, &priv->shrd->status)); |
6cd0b1cb | 1918 | |
58d0f361 | 1919 | iwl_power_initialize(priv); |
39b73fb1 | 1920 | iwl_tt_initialize(priv); |
158bea07 | 1921 | |
898ed67b | 1922 | init_completion(&priv->firmware_loading_complete); |
562db532 | 1923 | |
b08dfd04 | 1924 | err = iwl_request_firmware(priv, true); |
158bea07 | 1925 | if (err) |
7d47618a | 1926 | goto out_destroy_workqueue; |
158bea07 | 1927 | |
b481de9c ZY |
1928 | return 0; |
1929 | ||
34c1b7ba | 1930 | out_destroy_workqueue: |
74e28e44 EG |
1931 | destroy_workqueue(priv->shrd->workqueue); |
1932 | priv->shrd->workqueue = NULL; | |
6ba87956 | 1933 | iwl_uninit_drv(priv); |
34c1b7ba | 1934 | out_free_eeprom: |
ab36eab2 | 1935 | iwl_eeprom_free(priv->shrd); |
1e89cbac | 1936 | out_free_trans: |
e6bb4c9c | 1937 | iwl_trans_free(trans(priv)); |
34c1b7ba | 1938 | out_free_traffic_mem: |
20594eb0 | 1939 | iwl_free_traffic_mem(priv); |
d7c76f4c | 1940 | ieee80211_free_hw(priv->hw); |
34c1b7ba | 1941 | out: |
b481de9c ZY |
1942 | return err; |
1943 | } | |
1944 | ||
a48709c5 | 1945 | void __devexit iwl_remove(struct iwl_priv * priv) |
b481de9c | 1946 | { |
898ed67b | 1947 | wait_for_completion(&priv->firmware_loading_complete); |
562db532 | 1948 | |
e1623446 | 1949 | IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); |
b481de9c | 1950 | |
67249625 | 1951 | iwl_dbgfs_unregister(priv); |
67249625 | 1952 | |
ade4c649 | 1953 | /* ieee80211_unregister_hw call wil cause iwlagn_mac_stop to |
5b9f8cd3 | 1954 | * to be called and iwl_down since we are removing the device |
0b124c31 GG |
1955 | * we need to set STATUS_EXIT_PENDING bit. |
1956 | */ | |
63013ae3 | 1957 | set_bit(STATUS_EXIT_PENDING, &priv->shrd->status); |
5ed540ae | 1958 | |
7a4e5281 | 1959 | iwl_testmode_cleanup(priv); |
09af1403 | 1960 | iwlagn_mac_unregister(priv); |
c4f55232 | 1961 | |
39b73fb1 WYG |
1962 | iwl_tt_exit(priv); |
1963 | ||
ae2c30bf EG |
1964 | /*This will stop the queues, move the device to low power state */ |
1965 | iwl_trans_stop_device(trans(priv)); | |
0359facc | 1966 | |
de7f5f92 | 1967 | iwl_dealloc_ucode(trans(priv)); |
b481de9c | 1968 | |
ab36eab2 | 1969 | iwl_eeprom_free(priv->shrd); |
b481de9c | 1970 | |
948c171c | 1971 | /*netif_stop_queue(dev); */ |
74e28e44 | 1972 | flush_workqueue(priv->shrd->workqueue); |
948c171c | 1973 | |
ade4c649 | 1974 | /* ieee80211_unregister_hw calls iwlagn_mac_stop, which flushes |
74e28e44 | 1975 | * priv->shrd->workqueue... so we can't take down the workqueue |
b481de9c | 1976 | * until now... */ |
74e28e44 EG |
1977 | destroy_workqueue(priv->shrd->workqueue); |
1978 | priv->shrd->workqueue = NULL; | |
20594eb0 | 1979 | iwl_free_traffic_mem(priv); |
b481de9c | 1980 | |
e6bb4c9c | 1981 | iwl_trans_free(trans(priv)); |
34c1b7ba | 1982 | |
6ba87956 | 1983 | iwl_uninit_drv(priv); |
b481de9c | 1984 | |
77834543 | 1985 | dev_kfree_skb(priv->beacon_skb); |
b481de9c ZY |
1986 | |
1987 | ieee80211_free_hw(priv->hw); | |
1988 | } | |
1989 | ||
b481de9c ZY |
1990 | |
1991 | /***************************************************************************** | |
1992 | * | |
1993 | * driver and module entry point | |
1994 | * | |
1995 | *****************************************************************************/ | |
5b9f8cd3 | 1996 | static int __init iwl_init(void) |
b481de9c ZY |
1997 | { |
1998 | ||
1999 | int ret; | |
c96c31e4 JP |
2000 | pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); |
2001 | pr_info(DRV_COPYRIGHT "\n"); | |
897e1cf2 | 2002 | |
e227ceac | 2003 | ret = iwlagn_rate_control_register(); |
897e1cf2 | 2004 | if (ret) { |
c96c31e4 | 2005 | pr_err("Unable to register rate control algorithm: %d\n", ret); |
897e1cf2 RC |
2006 | return ret; |
2007 | } | |
2008 | ||
48d1a211 | 2009 | ret = iwl_pci_register_driver(); |
b481de9c | 2010 | |
48d1a211 EG |
2011 | if (ret) |
2012 | goto error_register; | |
b481de9c | 2013 | return ret; |
897e1cf2 | 2014 | |
897e1cf2 | 2015 | error_register: |
e227ceac | 2016 | iwlagn_rate_control_unregister(); |
897e1cf2 | 2017 | return ret; |
b481de9c ZY |
2018 | } |
2019 | ||
5b9f8cd3 | 2020 | static void __exit iwl_exit(void) |
b481de9c | 2021 | { |
48d1a211 | 2022 | iwl_pci_unregister_driver(); |
e227ceac | 2023 | iwlagn_rate_control_unregister(); |
b481de9c ZY |
2024 | } |
2025 | ||
5b9f8cd3 EG |
2026 | module_exit(iwl_exit); |
2027 | module_init(iwl_init); | |
a562a9dd RC |
2028 | |
2029 | #ifdef CONFIG_IWLWIFI_DEBUG | |
48f20d35 EG |
2030 | module_param_named(debug, iwlagn_mod_params.debug_level, uint, |
2031 | S_IRUGO | S_IWUSR); | |
a562a9dd RC |
2032 | MODULE_PARM_DESC(debug, "debug output mask"); |
2033 | #endif | |
2034 | ||
2b068618 WYG |
2035 | module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO); |
2036 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); | |
2b068618 WYG |
2037 | module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO); |
2038 | MODULE_PARM_DESC(queues_num, "number of hw queues."); | |
7428994d JB |
2039 | module_param_named(11n_disable, iwlagn_mod_params.disable_11n, uint, S_IRUGO); |
2040 | MODULE_PARM_DESC(11n_disable, | |
2041 | "disable 11n functionality, bitmap: 1: full, 2: agg TX, 4: agg RX"); | |
2b068618 WYG |
2042 | module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K, |
2043 | int, S_IRUGO); | |
2044 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); | |
2b068618 WYG |
2045 | module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO); |
2046 | MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); | |
dd7a2509 | 2047 | |
48f20d35 EG |
2048 | module_param_named(ucode_alternative, |
2049 | iwlagn_mod_params.wanted_ucode_alternative, | |
2050 | int, S_IRUGO); | |
dd7a2509 JB |
2051 | MODULE_PARM_DESC(ucode_alternative, |
2052 | "specify ucode alternative to use from ucode file"); | |
bee008b7 | 2053 | |
48f20d35 EG |
2054 | module_param_named(antenna_coupling, iwlagn_mod_params.ant_coupling, |
2055 | int, S_IRUGO); | |
bee008b7 WYG |
2056 | MODULE_PARM_DESC(antenna_coupling, |
2057 | "specify antenna coupling in dB (defualt: 0 dB)"); | |
f37837c9 | 2058 | |
48f20d35 EG |
2059 | module_param_named(bt_ch_inhibition, iwlagn_mod_params.bt_ch_announce, |
2060 | bool, S_IRUGO); | |
9f28ebc3 | 2061 | MODULE_PARM_DESC(bt_ch_inhibition, |
fee84f0d | 2062 | "Enable BT channel inhibition (default: enable)"); |
b7977ffa SG |
2063 | |
2064 | module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO); | |
2065 | MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])"); | |
2066 | ||
2067 | module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO); | |
2068 | MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])"); | |
b60eec9b | 2069 | |
9995ffe5 | 2070 | module_param_named(wd_disable, iwlagn_mod_params.wd_disable, int, S_IRUGO); |
300d0834 | 2071 | MODULE_PARM_DESC(wd_disable, |
9995ffe5 WYG |
2072 | "Disable stuck queue watchdog timer 0=system default, " |
2073 | "1=disable, 2=enable (default: 0)"); | |
300d0834 | 2074 | |
b60eec9b WYG |
2075 | /* |
2076 | * set bt_coex_active to true, uCode will do kill/defer | |
2077 | * every time the priority line is asserted (BT is sending signals on the | |
2078 | * priority line in the PCIx). | |
2079 | * set bt_coex_active to false, uCode will ignore the BT activity and | |
2080 | * perform the normal operation | |
2081 | * | |
2082 | * User might experience transmit issue on some platform due to WiFi/BT | |
2083 | * co-exist problem. The possible behaviors are: | |
2084 | * Able to scan and finding all the available AP | |
2085 | * Not able to associate with any AP | |
2086 | * On those platforms, WiFi communication can be restored by set | |
2087 | * "bt_coex_active" module parameter to "false" | |
2088 | * | |
2089 | * default: bt_coex_active = true (BT_COEX_ENABLE) | |
2090 | */ | |
2091 | module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active, | |
2092 | bool, S_IRUGO); | |
2093 | MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)"); | |
6b0184c4 WYG |
2094 | |
2095 | module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO); | |
2096 | MODULE_PARM_DESC(led_mode, "0=system default, " | |
42602dd4 | 2097 | "1=On(RF On)/Off(RF Off), 2=blinking, 3=Off (default: 0)"); |
3f1e5f4a | 2098 | |
0172b029 WYG |
2099 | module_param_named(power_save, iwlagn_mod_params.power_save, |
2100 | bool, S_IRUGO); | |
2101 | MODULE_PARM_DESC(power_save, | |
2102 | "enable WiFi power management (default: disable)"); | |
2103 | ||
f7538168 WYG |
2104 | module_param_named(power_level, iwlagn_mod_params.power_level, |
2105 | int, S_IRUGO); | |
2106 | MODULE_PARM_DESC(power_level, | |
2107 | "default power save level (range from 1 - 5, default: 1)"); | |
2108 | ||
dd5b6d0a WYG |
2109 | module_param_named(auto_agg, iwlagn_mod_params.auto_agg, |
2110 | bool, S_IRUGO); | |
2111 | MODULE_PARM_DESC(auto_agg, | |
2112 | "enable agg w/o check traffic load (default: enable)"); | |
2113 | ||
3f1e5f4a WYG |
2114 | /* |
2115 | * For now, keep using power level 1 instead of automatically | |
2116 | * adjusting ... | |
2117 | */ | |
2118 | module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust, | |
2119 | bool, S_IRUGO); | |
2120 | MODULE_PARM_DESC(no_sleep_autoadjust, | |
2121 | "don't automatically adjust sleep level " | |
2122 | "according to maximum network latency (default: true)"); |