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rt2x00 : more devices to rt73usb.c
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
b481de9c
ZY		 32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
b481de9c
ZY		 40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
b481de9c
ZY		 43#include <net/mac80211.h>
44
45#include <asm/div64.h>
46
6bc913bd 47#include "iwl-eeprom.h"
3e0d4cb1 48#include "iwl-dev.h"
fee1247a 49#include "iwl-core.h"
3395f6e9 50#include "iwl-io.h"
b481de9c 51#include "iwl-helpers.h"
6974e363 52#include "iwl-sta.h"
f0832f13 53#include "iwl-calib.h"
b481de9c 54
416e1438 55
b481de9c
ZY		 56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
ZY		 62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
d783b061 67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
b481de9c 68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 70#define VD "d"
71#else
72#define VD
73#endif
74
4fc22b21 75#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
b481de9c
ZY		 76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY		 83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
a7b75207 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
b481de9c 87MODULE_LICENSE("GPL");
4fc22b21 88MODULE_ALIAS("iwl4965");
b481de9c 89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
5b9f8cd3 99static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
deb09c43 100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG		 102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
54559703 111 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 112 * @priv: staging_rxon is compared to active_rxon
b481de9c 113 *
9fbab516
BC		 114 * If the RXON structure is changing enough to require a new tune,
115 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
116 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 117 */
54559703 118static int iwl_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 119{
120
121 /* These items are only settable from the full RXON command */
5d1e2325 122 if (!(iwl_is_associated(priv)) ||
b481de9c
ZY		 123 compare_ether_addr(priv->staging_rxon.bssid_addr,
124 priv->active_rxon.bssid_addr) ||
125 compare_ether_addr(priv->staging_rxon.node_addr,
126 priv->active_rxon.node_addr) ||
127 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
128 priv->active_rxon.wlap_bssid_addr) ||
129 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
130 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
131 (priv->staging_rxon.air_propagation !=
132 priv->active_rxon.air_propagation) ||
133 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
134 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
135 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
136 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
b481de9c
ZY		 137 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
138 return 1;
139
140 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
141 * be updated with the RXON_ASSOC command -- however only some
142 * flag transitions are allowed using RXON_ASSOC */
143
144 /* Check if we are not switching bands */
145 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
146 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
147 return 1;
148
149 /* Check if we are switching association toggle */
150 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
151 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
152 return 1;
153
154 return 0;
155}
156
b481de9c 157/**
5b9f8cd3 158 * iwl_commit_rxon - commit staging_rxon to hardware
b481de9c 159 *
01ebd063 160 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 161 * the active_rxon structure is updated with the new data. This
162 * function correctly transitions out of the RXON_ASSOC_MSK state if
163 * a HW tune is required based on the RXON structure changes.
164 */
5b9f8cd3 165static int iwl_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 166{
167 /* cast away the const for active_rxon in this function */
c1adf9fb 168 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
43d59b32
EG		 169 int ret;
170 bool new_assoc =
171 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 172
fee1247a 173 if (!iwl_is_alive(priv))
43d59b32 174 return -EBUSY;
b481de9c
ZY		 175
176 /* always get timestamp with Rx frame */
177 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
a326a5d0
EG		 178 /* allow CTS-to-self if possible. this is relevant only for
179 * 5000, but will not damage 4965 */
180 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
b481de9c 181
8f5c87dc 182 ret = iwl_agn_check_rxon_cmd(&priv->staging_rxon);
43d59b32 183 if (ret) {
b481de9c
ZY		 184 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
185 return -EINVAL;
186 }
187
188 /* If we don't need to send a full RXON, we can use
5b9f8cd3 189 * iwl_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 190 * and other flags for the current radio configuration. */
54559703 191 if (!iwl_full_rxon_required(priv)) {
43d59b32
EG		 192 ret = iwl_send_rxon_assoc(priv);
193 if (ret) {
194 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
195 return ret;
b481de9c
ZY		 196 }
197
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 199 return 0;
200 }
201
202 /* station table will be cleared */
203 priv->assoc_station_added = 0;
204
b481de9c
ZY		 205 /* If we are currently associated and the new config requires
206 * an RXON_ASSOC and the new config wants the associated mask enabled,
207 * we must clear the associated from the active configuration
208 * before we apply the new config */
43d59b32 209 if (iwl_is_associated(priv) && new_assoc) {
b481de9c
ZY		 210 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
211 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
212
43d59b32 213 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 214 sizeof(struct iwl_rxon_cmd),
b481de9c
ZY		 215 &priv->active_rxon);
216
217 /* If the mask clearing failed then we set
218 * active_rxon back to what it was previously */
43d59b32 219 if (ret) {
b481de9c 220 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG		 221 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
222 return ret;
b481de9c 223 }
b481de9c
ZY		 224 }
225
226 IWL_DEBUG_INFO("Sending RXON\n"
227 "* with%s RXON_FILTER_ASSOC_MSK\n"
228 "* channel = %d\n"
e174961c 229 "* bssid = %pM\n",
43d59b32 230 (new_assoc ? "" : "out"),
b481de9c 231 le16_to_cpu(priv->staging_rxon.channel),
e174961c 232 priv->staging_rxon.bssid_addr);
b481de9c 233
5b9f8cd3 234 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG		 235
236 /* Apply the new configuration
237 * RXON unassoc clears the station table in uCode, send it before
238 * we add the bcast station. If assoc bit is set, we will send RXON
239 * after having added the bcast and bssid station.
240 */
241 if (!new_assoc) {
242 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 243 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG		 244 if (ret) {
245 IWL_ERROR("Error setting new RXON (%d)\n", ret);
246 return ret;
247 }
248 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 249 }
250
37deb2a0 251 iwl_clear_stations_table(priv);
556f8db7 252
b481de9c
ZY		 253 if (!priv->error_recovering)
254 priv->start_calib = 0;
255
b481de9c 256 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 257 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 258 IWL_INVALID_STATION) {
b481de9c
ZY		 259 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
260 return -EIO;
261 }
262
263 /* If we have set the ASSOC_MSK and we are in BSS mode then
264 * add the IWL_AP_ID to the station rate table */
9185159d 265 if (new_assoc) {
05c914fe 266 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
9185159d
TW		 267 ret = iwl_rxon_add_station(priv,
268 priv->active_rxon.bssid_addr, 1);
269 if (ret == IWL_INVALID_STATION) {
270 IWL_ERROR("Error adding AP address for TX.\n");
271 return -EIO;
272 }
273 priv->assoc_station_added = 1;
274 if (priv->default_wep_key &&
275 iwl_send_static_wepkey_cmd(priv, 0))
276 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 277 }
43d59b32
EG		 278
279 /* Apply the new configuration
280 * RXON assoc doesn't clear the station table in uCode,
281 */
282 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
283 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
284 if (ret) {
285 IWL_ERROR("Error setting new RXON (%d)\n", ret);
286 return ret;
287 }
288 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
ZY		 289 }
290
36da7d70
ZY		 291 iwl_init_sensitivity(priv);
292
293 /* If we issue a new RXON command which required a tune then we must
294 * send a new TXPOWER command or we won't be able to Tx any frames */
295 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
296 if (ret) {
297 IWL_ERROR("Error sending TX power (%d)\n", ret);
298 return ret;
299 }
300
b481de9c
ZY		 301 return 0;
302}
303
5b9f8cd3 304void iwl_update_chain_flags(struct iwl_priv *priv)
5da4b55f
MA		 305{
306
c7de35cd 307 iwl_set_rxon_chain(priv);
5b9f8cd3 308 iwl_commit_rxon(priv);
5da4b55f
MA		 309}
310
5b9f8cd3 311static int iwl_send_bt_config(struct iwl_priv *priv)
b481de9c 312{
2aa6ab86 313 struct iwl_bt_cmd bt_cmd = {
b481de9c
ZY		 314 .flags = 3,
315 .lead_time = 0xAA,
316 .max_kill = 1,
317 .kill_ack_mask = 0,
318 .kill_cts_mask = 0,
319 };
320
857485c0 321 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2aa6ab86 322 sizeof(struct iwl_bt_cmd), &bt_cmd);
b481de9c
ZY		 323}
324
fcab423d 325static void iwl_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 326{
327 struct list_head *element;
328
329 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
330 priv->frames_count);
331
332 while (!list_empty(&priv->free_frames)) {
333 element = priv->free_frames.next;
334 list_del(element);
fcab423d 335 kfree(list_entry(element, struct iwl_frame, list));
b481de9c
ZY		 336 priv->frames_count--;
337 }
338
339 if (priv->frames_count) {
340 IWL_WARNING("%d frames still in use. Did we lose one?\n",
341 priv->frames_count);
342 priv->frames_count = 0;
343 }
344}
345
fcab423d 346static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 347{
fcab423d 348 struct iwl_frame *frame;
b481de9c
ZY		 349 struct list_head *element;
350 if (list_empty(&priv->free_frames)) {
351 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
352 if (!frame) {
353 IWL_ERROR("Could not allocate frame!\n");
354 return NULL;
355 }
356
357 priv->frames_count++;
358 return frame;
359 }
360
361 element = priv->free_frames.next;
362 list_del(element);
fcab423d 363 return list_entry(element, struct iwl_frame, list);
b481de9c
ZY		 364}
365
fcab423d 366static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
b481de9c
ZY		 367{
368 memset(frame, 0, sizeof(*frame));
369 list_add(&frame->list, &priv->free_frames);
370}
371
4bf64efd
TW		 372static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
373 struct ieee80211_hdr *hdr,
73ec1cc2 374 int left)
b481de9c 375{
3109ece1 376 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB		 377 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
378 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY		 379 return 0;
380
381 if (priv->ibss_beacon->len > left)
382 return 0;
383
384 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
385
386 return priv->ibss_beacon->len;
387}
388
5b9f8cd3 389static u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 390{
39e88504
GC		 391 int i;
392 int rate_mask;
393
394 /* Set rate mask*/
395 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
dbce56a4 396 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
39e88504 397 else
dbce56a4 398 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
b481de9c 399
39e88504 400 /* Find lowest valid rate */
b481de9c 401 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 402 i = iwl_rates[i].next_ieee) {
b481de9c 403 if (rate_mask & (1 << i))
1826dcc0 404 return iwl_rates[i].plcp;
b481de9c
ZY		 405 }
406
39e88504
GC		 407 /* No valid rate was found. Assign the lowest one */
408 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
409 return IWL_RATE_1M_PLCP;
410 else
411 return IWL_RATE_6M_PLCP;
b481de9c
ZY		 412}
413
5b9f8cd3 414static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
4bf64efd
TW		 415 struct iwl_frame *frame, u8 rate)
416{
417 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
418 unsigned int frame_size;
419
420 tx_beacon_cmd = &frame->u.beacon;
421 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
422
423 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
424 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
425
426 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
4bf64efd
TW		 427 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
428
429 BUG_ON(frame_size > MAX_MPDU_SIZE);
430 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
431
432 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
433 tx_beacon_cmd->tx.rate_n_flags =
434 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
435 else
436 tx_beacon_cmd->tx.rate_n_flags =
437 iwl_hw_set_rate_n_flags(rate, 0);
438
439 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
440 TX_CMD_FLG_TSF_MSK |
441 TX_CMD_FLG_STA_RATE_MSK;
442
443 return sizeof(*tx_beacon_cmd) + frame_size;
444}
5b9f8cd3 445static int iwl_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 446{
fcab423d 447 struct iwl_frame *frame;
b481de9c
ZY		 448 unsigned int frame_size;
449 int rc;
450 u8 rate;
451
fcab423d 452 frame = iwl_get_free_frame(priv);
b481de9c
ZY		 453
454 if (!frame) {
455 IWL_ERROR("Could not obtain free frame buffer for beacon "
456 "command.\n");
457 return -ENOMEM;
458 }
459
5b9f8cd3 460 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 461
5b9f8cd3 462 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 463
857485c0 464 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 465 &frame->u.cmd[0]);
466
fcab423d 467 iwl_free_frame(priv, frame);
b481de9c
ZY		 468
469 return rc;
470}
471
b481de9c
ZY		 472/******************************************************************************
473 *
474 * Misc. internal state and helper functions
475 *
476 ******************************************************************************/
b481de9c 477
5b9f8cd3 478static void iwl_ht_conf(struct iwl_priv *priv,
d1141dfb
EG		 479 struct ieee80211_bss_conf *bss_conf)
480{
ae5eb026 481 struct ieee80211_sta_ht_cap *ht_conf;
d1141dfb 482 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
ae5eb026 483 struct ieee80211_sta *sta;
d1141dfb
EG		 484
485 IWL_DEBUG_MAC80211("enter: \n");
486
d1141dfb
EG		 487 if (!iwl_conf->is_ht)
488 return;
489
ae5eb026
JB		 490
491 /*
492 * It is totally wrong to base global information on something
493 * that is valid only when associated, alas, this driver works
494 * that way and I don't know how to fix it.
495 */
496
497 rcu_read_lock();
498 sta = ieee80211_find_sta(priv->hw, priv->bssid);
499 if (!sta) {
500 rcu_read_unlock();
501 return;
502 }
503 ht_conf = &sta->ht_cap;
504
d1141dfb 505 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 506 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 507 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 508 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG		 509
510 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
511 iwl_conf->max_amsdu_size =
512 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
513
514 iwl_conf->supported_chan_width =
d9fe60de 515 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
ae5eb026 516
094d05dc
S		 517 /*
518 * XXX: The HT configuration needs to be moved into iwl_mac_config()
519 * to be done there correctly.
520 */
521
522 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
523 if (priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40MINUS)
524 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
525 else if(priv->hw->conf.ht.channel_type == NL80211_CHAN_HT40PLUS)
526 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
527
d1141dfb 528 /* If no above or below channel supplied disable FAT channel */
d9fe60de 529 if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
094d05dc 530 iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
d1141dfb
EG		 531 iwl_conf->supported_chan_width = 0;
532
12837be1
RR		 533 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
534
d9fe60de 535 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
d1141dfb 536
094d05dc 537 iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
d1141dfb 538 iwl_conf->ht_protection =
ae5eb026 539 bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
d1141dfb 540 iwl_conf->non_GF_STA_present =
ae5eb026
JB		 541 !!(bss_conf->ht.operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
542
543 rcu_read_unlock();
d1141dfb 544
d1141dfb
EG		 545 IWL_DEBUG_MAC80211("leave\n");
546}
547
b481de9c
ZY		 548/*
549 * QoS support
550*/
1ff50bda 551static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c 552{
b481de9c
ZY		 553 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
554 return;
555
b481de9c
ZY		 556 priv->qos_data.def_qos_parm.qos_flags = 0;
557
558 if (priv->qos_data.qos_cap.q_AP.queue_request &&
559 !priv->qos_data.qos_cap.q_AP.txop_request)
560 priv->qos_data.def_qos_parm.qos_flags |=
561 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 562 if (priv->qos_data.qos_active)
563 priv->qos_data.def_qos_parm.qos_flags |=
564 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
565
fd105e79 566 if (priv->current_ht_config.is_ht)
f1f1f5c7 567 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 568
3109ece1 569 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW		 570 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
571 priv->qos_data.qos_active,
572 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 573
1ff50bda
EG		 574 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
575 sizeof(struct iwl_qosparam_cmd),
576 &priv->qos_data.def_qos_parm, NULL);
b481de9c
ZY		 577 }
578}
579
b481de9c 580#define MAX_UCODE_BEACON_INTERVAL 4096
b481de9c 581
3195c1f3 582static u16 iwl_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 583{
584 u16 new_val = 0;
585 u16 beacon_factor = 0;
586
3195c1f3
TW		 587 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
588 / MAX_UCODE_BEACON_INTERVAL;
b481de9c
ZY		 589 new_val = beacon_val / beacon_factor;
590
3195c1f3 591 return new_val;
b481de9c
ZY		 592}
593
3195c1f3 594static void iwl_setup_rxon_timing(struct iwl_priv *priv)
b481de9c 595{
3195c1f3
TW		 596 u64 tsf;
597 s32 interval_tm, rem;
b481de9c
ZY		 598 unsigned long flags;
599 struct ieee80211_conf *conf = NULL;
600 u16 beacon_int = 0;
601
602 conf = ieee80211_get_hw_conf(priv->hw);
603
604 spin_lock_irqsave(&priv->lock, flags);
3195c1f3 605 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b5d7be5e 606 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
b481de9c 607
05c914fe 608 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
3195c1f3 609 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
b481de9c
ZY		 610 priv->rxon_timing.atim_window = 0;
611 } else {
3195c1f3
TW		 612 beacon_int = iwl_adjust_beacon_interval(conf->beacon_int);
613
b481de9c
ZY		 614 /* TODO: we need to get atim_window from upper stack
615 * for now we set to 0 */
616 priv->rxon_timing.atim_window = 0;
617 }
618
3195c1f3 619 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
b481de9c 620
3195c1f3
TW		 621 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
622 interval_tm = beacon_int * 1024;
623 rem = do_div(tsf, interval_tm);
624 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
625
626 spin_unlock_irqrestore(&priv->lock, flags);
627 IWL_DEBUG_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
628 le16_to_cpu(priv->rxon_timing.beacon_interval),
629 le32_to_cpu(priv->rxon_timing.beacon_init_val),
630 le16_to_cpu(priv->rxon_timing.atim_window));
b481de9c
ZY		 631}
632
82a66bbb
TW		 633static void iwl_set_flags_for_band(struct iwl_priv *priv,
634 enum ieee80211_band band)
b481de9c 635{
8318d78a 636 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 637 priv->staging_rxon.flags &=
638 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
639 | RXON_FLG_CCK_MSK);
640 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
641 } else {
5b9f8cd3 642 /* Copied from iwl_post_associate() */
b481de9c
ZY		 643 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
644 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
645 else
646 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
647
05c914fe 648 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 649 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
650
651 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
652 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
653 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
654 }
655}
656
657/*
01ebd063 658 * initialize rxon structure with default values from eeprom
b481de9c 659 */
5b9f8cd3 660static void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
b481de9c 661{
bf85ea4f 662 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 663
664 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
665
60294de3 666 switch (mode) {
05c914fe 667 case NL80211_IFTYPE_AP:
b481de9c
ZY		 668 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
669 break;
670
05c914fe 671 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 672 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
673 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
674 break;
675
05c914fe 676 case NL80211_IFTYPE_ADHOC:
b481de9c
ZY		 677 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
678 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
679 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
680 RXON_FILTER_ACCEPT_GRP_MSK;
681 break;
682
05c914fe 683 case NL80211_IFTYPE_MONITOR:
b481de9c
ZY		 684 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
685 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
686 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
687 break;
69dc5d9d 688 default:
60294de3 689 IWL_ERROR("Unsupported interface type %d\n", mode);
69dc5d9d 690 break;
b481de9c
ZY		 691 }
692
693#if 0
694 /* TODO: Figure out when short_preamble would be set and cache from
695 * that */
696 if (!hw_to_local(priv->hw)->short_preamble)
697 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
698 else
699 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
700#endif
701
8622e705 702 ch_info = iwl_get_channel_info(priv, priv->band,
25b3f57c 703 le16_to_cpu(priv->active_rxon.channel));
b481de9c
ZY		 704
705 if (!ch_info)
706 ch_info = &priv->channel_info[0];
707
708 /*
709 * in some case A channels are all non IBSS
710 * in this case force B/G channel
711 */
05c914fe 712 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
b481de9c
ZY		 713 !(is_channel_ibss(ch_info)))
714 ch_info = &priv->channel_info[0];
715
716 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 717 priv->band = ch_info->band;
b481de9c 718
82a66bbb 719 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY		 720
721 priv->staging_rxon.ofdm_basic_rates =
722 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
723 priv->staging_rxon.cck_basic_rates =
724 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
725
726 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
727 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
728 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
729 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
730 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
731 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 732 iwl_set_rxon_chain(priv);
b481de9c
ZY		 733}
734
5b9f8cd3 735static int iwl_set_mode(struct iwl_priv *priv, int mode)
b481de9c 736{
5b9f8cd3 737 iwl_connection_init_rx_config(priv, mode);
b481de9c
ZY		 738 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
739
37deb2a0 740 iwl_clear_stations_table(priv);
b481de9c 741
fde3571f 742 /* dont commit rxon if rf-kill is on*/
fee1247a 743 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 744 return -EAGAIN;
745
746 cancel_delayed_work(&priv->scan_check);
2a421b91 747 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA		 748 IWL_WARNING("Aborted scan still in progress after 100ms\n");
749 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
750 return -EAGAIN;
751 }
752
5b9f8cd3 753 iwl_commit_rxon(priv);
b481de9c
ZY		 754
755 return 0;
756}
757
5b9f8cd3 758static void iwl_set_rate(struct iwl_priv *priv)
b481de9c 759{
8318d78a 760 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 761 struct ieee80211_rate *rate;
762 int i;
763
d1141dfb 764 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA		 765 if (!hw) {
766 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
767 return;
768 }
b481de9c
ZY		 769
770 priv->active_rate = 0;
771 priv->active_rate_basic = 0;
772
8318d78a
JB		 773 for (i = 0; i < hw->n_bitrates; i++) {
774 rate = &(hw->bitrates[i]);
775 if (rate->hw_value < IWL_RATE_COUNT)
776 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 777 }
778
779 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
780 priv->active_rate, priv->active_rate_basic);
781
782 /*
783 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
784 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
785 * OFDM
786 */
787 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
788 priv->staging_rxon.cck_basic_rates =
789 ((priv->active_rate_basic &
790 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
791 else
792 priv->staging_rxon.cck_basic_rates =
793 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
794
795 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
796 priv->staging_rxon.ofdm_basic_rates =
797 ((priv->active_rate_basic &
798 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
799 IWL_FIRST_OFDM_RATE) & 0xFF;
800 else
801 priv->staging_rxon.ofdm_basic_rates =
802 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
803}
804
b481de9c 805
b481de9c
ZY		 806/******************************************************************************
807 *
808 * Generic RX handler implementations
809 *
810 ******************************************************************************/
885ba202
TW		 811static void iwl_rx_reply_alive(struct iwl_priv *priv,
812 struct iwl_rx_mem_buffer *rxb)
b481de9c 813{
db11d634 814 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 815 struct iwl_alive_resp *palive;
b481de9c
ZY		 816 struct delayed_work *pwork;
817
818 palive = &pkt->u.alive_frame;
819
820 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
821 "0x%01X 0x%01X\n",
822 palive->is_valid, palive->ver_type,
823 palive->ver_subtype);
824
825 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
826 IWL_DEBUG_INFO("Initialization Alive received.\n");
827 memcpy(&priv->card_alive_init,
828 &pkt->u.alive_frame,
885ba202 829 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY		 830 pwork = &priv->init_alive_start;
831 } else {
832 IWL_DEBUG_INFO("Runtime Alive received.\n");
833 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 834 sizeof(struct iwl_alive_resp));
b481de9c
ZY		 835 pwork = &priv->alive_start;
836 }
837
838 /* We delay the ALIVE response by 5ms to
839 * give the HW RF Kill time to activate... */
840 if (palive->is_valid == UCODE_VALID_OK)
841 queue_delayed_work(priv->workqueue, pwork,
842 msecs_to_jiffies(5));
843 else
844 IWL_WARNING("uCode did not respond OK.\n");
845}
846
5b9f8cd3 847static void iwl_rx_reply_error(struct iwl_priv *priv,
a55360e4 848 struct iwl_rx_mem_buffer *rxb)
b481de9c 849{
db11d634 850 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 851
852 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
853 "seq 0x%04X ser 0x%08X\n",
854 le32_to_cpu(pkt->u.err_resp.error_type),
855 get_cmd_string(pkt->u.err_resp.cmd_id),
856 pkt->u.err_resp.cmd_id,
857 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
858 le32_to_cpu(pkt->u.err_resp.error_info));
859}
860
861#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
862
5b9f8cd3 863static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 864{
db11d634 865 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 866 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
2aa6ab86 867 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 868 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
869 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
870 rxon->channel = csa->channel;
871 priv->staging_rxon.channel = csa->channel;
872}
873
5b9f8cd3 874static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 875 struct iwl_rx_mem_buffer *rxb)
b481de9c 876{
0a6857e7 877#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 878 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86 879 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 880 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
881 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
882#endif
883}
884
5b9f8cd3 885static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 886 struct iwl_rx_mem_buffer *rxb)
b481de9c 887{
db11d634 888 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 889 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
890 "notification for %s:\n",
891 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 892 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 893}
894
5b9f8cd3 895static void iwl_bg_beacon_update(struct work_struct *work)
b481de9c 896{
c79dd5b5
TW		 897 struct iwl_priv *priv =
898 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 899 struct sk_buff *beacon;
900
901 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 902 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY		 903
904 if (!beacon) {
905 IWL_ERROR("update beacon failed\n");
906 return;
907 }
908
909 mutex_lock(&priv->mutex);
910 /* new beacon skb is allocated every time; dispose previous.*/
911 if (priv->ibss_beacon)
912 dev_kfree_skb(priv->ibss_beacon);
913
914 priv->ibss_beacon = beacon;
915 mutex_unlock(&priv->mutex);
916
5b9f8cd3 917 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 918}
919
4e39317d 920/**
5b9f8cd3 921 * iwl_bg_statistics_periodic - Timer callback to queue statistics
4e39317d
EG		 922 *
923 * This callback is provided in order to send a statistics request.
924 *
925 * This timer function is continually reset to execute within
926 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
927 * was received. We need to ensure we receive the statistics in order
928 * to update the temperature used for calibrating the TXPOWER.
929 */
5b9f8cd3 930static void iwl_bg_statistics_periodic(unsigned long data)
4e39317d
EG		 931{
932 struct iwl_priv *priv = (struct iwl_priv *)data;
933
934 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
935 return;
936
61780ee3
MA		 937 /* dont send host command if rf-kill is on */
938 if (!iwl_is_ready_rf(priv))
939 return;
940
4e39317d
EG		 941 iwl_send_statistics_request(priv, CMD_ASYNC);
942}
943
5b9f8cd3 944static void iwl_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 945 struct iwl_rx_mem_buffer *rxb)
b481de9c 946{
0a6857e7 947#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 948 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2aa6ab86
TW		 949 struct iwl4965_beacon_notif *beacon =
950 (struct iwl4965_beacon_notif *)pkt->u.raw;
e7d326ac 951 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 952
953 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
954 "tsf %d %d rate %d\n",
25a6572c 955 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY		 956 beacon->beacon_notify_hdr.failure_frame,
957 le32_to_cpu(beacon->ibss_mgr_status),
958 le32_to_cpu(beacon->high_tsf),
959 le32_to_cpu(beacon->low_tsf), rate);
960#endif
961
05c914fe 962 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY		 963 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
964 queue_work(priv->workqueue, &priv->beacon_update);
965}
966
b481de9c
ZY		 967/* Handle notification from uCode that card's power state is changing
968 * due to software, hardware, or critical temperature RFKILL */
5b9f8cd3 969static void iwl_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 970 struct iwl_rx_mem_buffer *rxb)
b481de9c 971{
db11d634 972 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 973 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
974 unsigned long status = priv->status;
975
976 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
977 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
978 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
979
980 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
981 RF_CARD_DISABLED)) {
982
3395f6e9 983 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 984 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
985
3395f6e9
TW		 986 if (!iwl_grab_nic_access(priv)) {
987 iwl_write_direct32(
b481de9c
ZY		 988 priv, HBUS_TARG_MBX_C,
989 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
990
3395f6e9 991 iwl_release_nic_access(priv);
b481de9c
ZY		 992 }
993
994 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 995 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 996 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 997 if (!iwl_grab_nic_access(priv)) {
998 iwl_write_direct32(
b481de9c
ZY		 999 priv, HBUS_TARG_MBX_C,
1000 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1001
3395f6e9 1002 iwl_release_nic_access(priv);
b481de9c
ZY		 1003 }
1004 }
1005
1006 if (flags & RF_CARD_DISABLED) {
3395f6e9 1007 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1008 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 1009 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1010 if (!iwl_grab_nic_access(priv))
1011 iwl_release_nic_access(priv);
b481de9c
ZY		 1012 }
1013 }
1014
1015 if (flags & HW_CARD_DISABLED)
1016 set_bit(STATUS_RF_KILL_HW, &priv->status);
1017 else
1018 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1019
1020
1021 if (flags & SW_CARD_DISABLED)
1022 set_bit(STATUS_RF_KILL_SW, &priv->status);
1023 else
1024 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1025
1026 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1027 iwl_scan_cancel(priv);
b481de9c
ZY		 1028
1029 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1030 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1031 (test_bit(STATUS_RF_KILL_SW, &status) !=
1032 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1033 queue_work(priv->workqueue, &priv->rf_kill);
1034 else
1035 wake_up_interruptible(&priv->wait_command_queue);
1036}
1037
5b9f8cd3 1038int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
e2e3c57b
TW		 1039{
1040 int ret;
1041 unsigned long flags;
1042
1043 spin_lock_irqsave(&priv->lock, flags);
1044 ret = iwl_grab_nic_access(priv);
1045 if (ret)
1046 goto err;
1047
1048 if (src == IWL_PWR_SRC_VAUX) {
1049 u32 val;
e7b63581 1050 ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
e2e3c57b
TW		 1051 &val);
1052
1053 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
1054 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1055 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1056 ~APMG_PS_CTRL_MSK_PWR_SRC);
1057 } else {
1058 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1059 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1060 ~APMG_PS_CTRL_MSK_PWR_SRC);
1061 }
1062
1063 iwl_release_nic_access(priv);
1064err:
1065 spin_unlock_irqrestore(&priv->lock, flags);
1066 return ret;
1067}
1068
b481de9c 1069/**
5b9f8cd3 1070 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 1071 *
1072 * Setup the RX handlers for each of the reply types sent from the uCode
1073 * to the host.
1074 *
1075 * This function chains into the hardware specific files for them to setup
1076 * any hardware specific handlers as well.
1077 */
653fa4a0 1078static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1079{
885ba202 1080 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
5b9f8cd3
EG		 1081 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1082 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
5b9f8cd3 1083 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 1084 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
5b9f8cd3
EG		 1085 iwl_rx_pm_debug_statistics_notif;
1086 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
b481de9c 1087
9fbab516
BC		 1088 /*
1089 * The same handler is used for both the REPLY to a discrete
1090 * statistics request from the host as well as for the periodic
1091 * statistics notifications (after received beacons) from the uCode.
b481de9c 1092 */
8f91aecb
EG		 1093 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1094 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91 1095
21c339bf 1096 iwl_setup_spectrum_handlers(priv);
2a421b91
TW		 1097 iwl_setup_rx_scan_handlers(priv);
1098
37a44211 1099 /* status change handler */
5b9f8cd3 1100 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
b481de9c 1101
c1354754
TW		 1102 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1103 iwl_rx_missed_beacon_notif;
37a44211 1104 /* Rx handlers */
1781a07f
EG		 1105 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1106 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG		 1107 /* block ack */
1108 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1109 /* Set up hardware specific Rx handlers */
d4789efe 1110 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY		 1111}
1112
b481de9c 1113/**
a55360e4 1114 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 1115 *
1116 * Uses the priv->rx_handlers callback function array to invoke
1117 * the appropriate handlers, including command responses,
1118 * frame-received notifications, and other notifications.
1119 */
a55360e4 1120void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1121{
a55360e4 1122 struct iwl_rx_mem_buffer *rxb;
db11d634 1123 struct iwl_rx_packet *pkt;
a55360e4 1124 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 1125 u32 r, i;
1126 int reclaim;
1127 unsigned long flags;
5c0eef96 1128 u8 fill_rx = 0;
d68ab680 1129 u32 count = 8;
b481de9c 1130
6440adb5
CB		 1131 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1132 * buffer that the driver may process (last buffer filled by ucode). */
8d86422a 1133 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY		 1134 i = rxq->read;
1135
1136 /* Rx interrupt, but nothing sent from uCode */
1137 if (i == r)
f3d67999 1138 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1139
a55360e4 1140 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA		 1141 fill_rx = 1;
1142
b481de9c
ZY		 1143 while (i != r) {
1144 rxb = rxq->queue[i];
1145
9fbab516 1146 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 1147 * then a bug has been introduced in the queue refilling
1148 * routines -- catch it here */
1149 BUG_ON(rxb == NULL);
1150
1151 rxq->queue[i] = NULL;
1152
e91af0af
JB		 1153 dma_sync_single_range_for_cpu(
1154 &priv->pci_dev->dev, rxb->real_dma_addr,
1155 rxb->aligned_dma_addr - rxb->real_dma_addr,
1156 priv->hw_params.rx_buf_size,
1157 PCI_DMA_FROMDEVICE);
db11d634 1158 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY		 1159
1160 /* Reclaim a command buffer only if this packet is a response
1161 * to a (driver-originated) command.
1162 * If the packet (e.g. Rx frame) originated from uCode,
1163 * there is no command buffer to reclaim.
1164 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1165 * but apparently a few don't get set; catch them here. */
1166 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1167 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1168 (pkt->hdr.cmd != REPLY_RX) &&
7dddaf1a 1169 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
cfe01709 1170 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 1171 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1172 (pkt->hdr.cmd != REPLY_TX);
1173
1174 /* Based on type of command response or notification,
1175 * handle those that need handling via function in
5b9f8cd3 1176 * rx_handlers table. See iwl_setup_rx_handlers() */
b481de9c 1177 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK		 1178 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1179 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY		 1180 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1181 } else {
1182 /* No handling needed */
f3d67999 1183 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY		 1184 "r %d i %d No handler needed for %s, 0x%02x\n",
1185 r, i, get_cmd_string(pkt->hdr.cmd),
1186 pkt->hdr.cmd);
1187 }
1188
1189 if (reclaim) {
9fbab516 1190 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1191 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 1192 * as we reclaim the driver command queue */
1193 if (rxb && rxb->skb)
17b88929 1194 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 1195 else
1196 IWL_WARNING("Claim null rxb?\n");
1197 }
1198
1199 /* For now we just don't re-use anything. We can tweak this
1200 * later to try and re-use notification packets and SKBs that
1201 * fail to Rx correctly */
1202 if (rxb->skb != NULL) {
1203 priv->alloc_rxb_skb--;
1204 dev_kfree_skb_any(rxb->skb);
1205 rxb->skb = NULL;
1206 }
1207
4018517a
JB		 1208 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1209 priv->hw_params.rx_buf_size + 256,
9ee1ba47 1210 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 1211 spin_lock_irqsave(&rxq->lock, flags);
1212 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1213 spin_unlock_irqrestore(&rxq->lock, flags);
1214 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 1215 /* If there are a lot of unused frames,
1216 * restock the Rx queue so ucode wont assert. */
1217 if (fill_rx) {
1218 count++;
1219 if (count >= 8) {
1220 priv->rxq.read = i;
f1bc4ac6 1221 iwl_rx_queue_restock(priv);
5c0eef96
MA		 1222 count = 0;
1223 }
1224 }
b481de9c
ZY		 1225 }
1226
1227 /* Backtrack one entry */
1228 priv->rxq.read = i;
a55360e4
TW		 1229 iwl_rx_queue_restock(priv);
1230}
a55360e4 1231
0a6857e7 1232#ifdef CONFIG_IWLWIFI_DEBUG
5b9f8cd3 1233static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1234{
c1adf9fb 1235 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57 1236
b481de9c 1237 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1238 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 1239 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1240 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1241 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1242 le32_to_cpu(rxon->filter_flags));
1243 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1244 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1245 rxon->ofdm_basic_rates);
1246 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
e174961c
JB		 1247 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
1248 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
b481de9c
ZY		 1249 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1250}
1251#endif
1252
0359facc
MA		 1253/* call this function to flush any scheduled tasklet */
1254static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1255{
a96a27f9 1256 /* wait to make sure we flush pending tasklet*/
0359facc
MA		 1257 synchronize_irq(priv->pci_dev->irq);
1258 tasklet_kill(&priv->irq_tasklet);
1259}
1260
b481de9c 1261/**
5b9f8cd3 1262 * iwl_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1263 */
5b9f8cd3 1264static void iwl_irq_handle_error(struct iwl_priv *priv)
b481de9c 1265{
5b9f8cd3 1266 /* Set the FW error flag -- cleared on iwl_down */
b481de9c
ZY		 1267 set_bit(STATUS_FW_ERROR, &priv->status);
1268
1269 /* Cancel currently queued command. */
1270 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1271
0a6857e7 1272#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1273 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1274 iwl_dump_nic_error_log(priv);
189a2b59 1275 iwl_dump_nic_event_log(priv);
5b9f8cd3 1276 iwl_print_rx_config_cmd(priv);
b481de9c
ZY		 1277 }
1278#endif
1279
1280 wake_up_interruptible(&priv->wait_command_queue);
1281
1282 /* Keep the restart process from trying to send host
1283 * commands by clearing the INIT status bit */
1284 clear_bit(STATUS_READY, &priv->status);
1285
1286 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1287 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY		 1288 "Restarting adapter due to uCode error.\n");
1289
3109ece1 1290 if (iwl_is_associated(priv)) {
b481de9c
ZY		 1291 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1292 sizeof(priv->recovery_rxon));
1293 priv->error_recovering = 1;
1294 }
3a1081e8
EK		 1295 if (priv->cfg->mod_params->restart_fw)
1296 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY		 1297 }
1298}
1299
5b9f8cd3 1300static void iwl_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 1301{
1302 unsigned long flags;
1303
1304 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1305 sizeof(priv->staging_rxon));
1306 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 1307 iwl_commit_rxon(priv);
b481de9c 1308
4f40e4d9 1309 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 1310
1311 spin_lock_irqsave(&priv->lock, flags);
1312 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1313 priv->error_recovering = 0;
1314 spin_unlock_irqrestore(&priv->lock, flags);
1315}
1316
5b9f8cd3 1317static void iwl_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 1318{
1319 u32 inta, handled = 0;
1320 u32 inta_fh;
1321 unsigned long flags;
0a6857e7 1322#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 1323 u32 inta_mask;
1324#endif
1325
1326 spin_lock_irqsave(&priv->lock, flags);
1327
1328 /* Ack/clear/reset pending uCode interrupts.
1329 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1330 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 1331 inta = iwl_read32(priv, CSR_INT);
1332 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 1333
1334 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1335 * Any new interrupts that happen after this, either while we're
1336 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 1337 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1338 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1339
0a6857e7 1340#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1341 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1342 /* just for debug */
3395f6e9 1343 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 1344 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1345 inta, inta_mask, inta_fh);
1346 }
1347#endif
1348
1349 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1350 * atomic, make sure that inta covers all the interrupts that
1351 * we've discovered, even if FH interrupt came in just after
1352 * reading CSR_INT. */
6f83eaa1 1353 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1354 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1355 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 1356 inta |= CSR_INT_BIT_FH_TX;
1357
1358 /* Now service all interrupt bits discovered above. */
1359 if (inta & CSR_INT_BIT_HW_ERR) {
1360 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1361
1362 /* Tell the device to stop sending interrupts */
5b9f8cd3 1363 iwl_disable_interrupts(priv);
b481de9c 1364
5b9f8cd3 1365 iwl_irq_handle_error(priv);
b481de9c
ZY		 1366
1367 handled |= CSR_INT_BIT_HW_ERR;
1368
1369 spin_unlock_irqrestore(&priv->lock, flags);
1370
1371 return;
1372 }
1373
0a6857e7 1374#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1375 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1376 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 1377 if (inta & CSR_INT_BIT_SCD)
1378 IWL_DEBUG_ISR("Scheduler finished to transmit "
1379 "the frame/frames.\n");
b481de9c
ZY		 1380
1381 /* Alive notification via Rx interrupt will do the real work */
1382 if (inta & CSR_INT_BIT_ALIVE)
1383 IWL_DEBUG_ISR("Alive interrupt\n");
1384 }
1385#endif
1386 /* Safely ignore these bits for debug checks below */
25c03d8e 1387 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1388
9fbab516 1389 /* HW RF KILL switch toggled */
b481de9c
ZY		 1390 if (inta & CSR_INT_BIT_RF_KILL) {
1391 int hw_rf_kill = 0;
3395f6e9 1392 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 1393 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1394 hw_rf_kill = 1;
1395
f3d67999 1396 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
c3056065 1397 hw_rf_kill ? "disable radio" : "enable radio");
b481de9c 1398
a9efa652
EG		 1399 /* driver only loads ucode once setting the interface up.
1400 * the driver as well won't allow loading if RFKILL is set
1401 * therefore no need to restart the driver from this handler
1402 */
edb34228 1403 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
53e49093 1404 clear_bit(STATUS_RF_KILL_HW, &priv->status);
edb34228
MA		 1405 if (priv->is_open && !iwl_is_rfkill(priv))
1406 queue_work(priv->workqueue, &priv->up);
1407 }
b481de9c
ZY		 1408
1409 handled |= CSR_INT_BIT_RF_KILL;
1410 }
1411
9fbab516 1412 /* Chip got too hot and stopped itself */
b481de9c
ZY		 1413 if (inta & CSR_INT_BIT_CT_KILL) {
1414 IWL_ERROR("Microcode CT kill error detected.\n");
1415 handled |= CSR_INT_BIT_CT_KILL;
1416 }
1417
1418 /* Error detected by uCode */
1419 if (inta & CSR_INT_BIT_SW_ERR) {
1420 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1421 inta);
5b9f8cd3 1422 iwl_irq_handle_error(priv);
b481de9c
ZY		 1423 handled |= CSR_INT_BIT_SW_ERR;
1424 }
1425
1426 /* uCode wakes up after power-down sleep */
1427 if (inta & CSR_INT_BIT_WAKEUP) {
1428 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1429 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW		 1430 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1431 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1432 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1433 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1434 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1435 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 1436
1437 handled |= CSR_INT_BIT_WAKEUP;
1438 }
1439
1440 /* All uCode command responses, including Tx command responses,
1441 * Rx "responses" (frame-received notification), and other
1442 * notifications from uCode come through here*/
1443 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1444 iwl_rx_handle(priv);
b481de9c
ZY		 1445 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1446 }
1447
1448 if (inta & CSR_INT_BIT_FH_TX) {
1449 IWL_DEBUG_ISR("Tx interrupt\n");
1450 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR		 1451 /* FH finished to write, send event */
1452 priv->ucode_write_complete = 1;
1453 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1454 }
1455
1456 if (inta & ~handled)
1457 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1458
1459 if (inta & ~CSR_INI_SET_MASK) {
1460 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1461 inta & ~CSR_INI_SET_MASK);
1462 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1463 }
1464
1465 /* Re-enable all interrupts */
0359facc
MA		 1466 /* only Re-enable if diabled by irq */
1467 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1468 iwl_enable_interrupts(priv);
b481de9c 1469
0a6857e7 1470#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1471 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 1472 inta = iwl_read32(priv, CSR_INT);
1473 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1474 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1475 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1476 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1477 }
1478#endif
1479 spin_unlock_irqrestore(&priv->lock, flags);
1480}
1481
5b9f8cd3 1482static irqreturn_t iwl_isr(int irq, void *data)
b481de9c 1483{
c79dd5b5 1484 struct iwl_priv *priv = data;
b481de9c
ZY		 1485 u32 inta, inta_mask;
1486 u32 inta_fh;
1487 if (!priv)
1488 return IRQ_NONE;
1489
1490 spin_lock(&priv->lock);
1491
1492 /* Disable (but don't clear!) interrupts here to avoid
1493 * back-to-back ISRs and sporadic interrupts from our NIC.
1494 * If we have something to service, the tasklet will re-enable ints.
1495 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 1496 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1497 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 1498
1499 /* Discover which interrupts are active/pending */
3395f6e9
TW		 1500 inta = iwl_read32(priv, CSR_INT);
1501 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 1502
1503 /* Ignore interrupt if there's nothing in NIC to service.
1504 * This may be due to IRQ shared with another device,
1505 * or due to sporadic interrupts thrown from our NIC. */
1506 if (!inta && !inta_fh) {
1507 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1508 goto none;
1509 }
1510
1511 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 1512 /* Hardware disappeared. It might have already raised
1513 * an interrupt */
99df630c 1514 IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
66fbb541 1515 goto unplugged;
b481de9c
ZY		 1516 }
1517
1518 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1519 inta, inta_mask, inta_fh);
1520
25c03d8e
JP		 1521 inta &= ~CSR_INT_BIT_SCD;
1522
5b9f8cd3 1523 /* iwl_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 1524 if (likely(inta || inta_fh))
1525 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1526
66fbb541
ON		 1527 unplugged:
1528 spin_unlock(&priv->lock);
b481de9c
ZY		 1529 return IRQ_HANDLED;
1530
1531 none:
1532 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 1533 /* only Re-enable if diabled by irq */
1534 if (test_bit(STATUS_INT_ENABLED, &priv->status))
5b9f8cd3 1535 iwl_enable_interrupts(priv);
b481de9c
ZY		 1536 spin_unlock(&priv->lock);
1537 return IRQ_NONE;
1538}
1539
b481de9c
ZY		 1540/******************************************************************************
1541 *
1542 * uCode download functions
1543 *
1544 ******************************************************************************/
1545
5b9f8cd3 1546static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1547{
98c92211
TW		 1548 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1549 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1550 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1551 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1552 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1553 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 1554}
1555
5b9f8cd3 1556static void iwl_nic_start(struct iwl_priv *priv)
edcdf8b2
RR		 1557{
1558 /* Remove all resets to allow NIC to operate */
1559 iwl_write32(priv, CSR_RESET, 0);
1560}
1561
1562
b481de9c 1563/**
5b9f8cd3 1564 * iwl_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 1565 *
1566 * Copy into buffers for card to fetch via bus-mastering
1567 */
5b9f8cd3 1568static int iwl_read_ucode(struct iwl_priv *priv)
b481de9c 1569{
14b3d338 1570 struct iwl_ucode *ucode;
a0987a8d 1571 int ret = -EINVAL, index;
b481de9c 1572 const struct firmware *ucode_raw;
a0987a8d
RC		 1573 const char *name_pre = priv->cfg->fw_name_pre;
1574 const unsigned int api_max = priv->cfg->ucode_api_max;
1575 const unsigned int api_min = priv->cfg->ucode_api_min;
1576 char buf[25];
b481de9c
ZY		 1577 u8 *src;
1578 size_t len;
a0987a8d 1579 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY		 1580
1581 /* Ask kernel firmware_class module to get the boot firmware off disk.
1582 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC		 1583 for (index = api_max; index >= api_min; index--) {
1584 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1585 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1586 if (ret < 0) {
1587 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1588 buf, ret);
1589 if (ret == -ENOENT)
1590 continue;
1591 else
1592 goto error;
1593 } else {
1594 if (index < api_max)
1595 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
1596 buf, api_max);
1597 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1598 buf, ucode_raw->size);
1599 break;
1600 }
b481de9c
ZY		 1601 }
1602
a0987a8d
RC		 1603 if (ret < 0)
1604 goto error;
b481de9c
ZY		 1605
1606 /* Make sure that we got at least our header! */
1607 if (ucode_raw->size < sizeof(*ucode)) {
1608 IWL_ERROR("File size way too small!\n");
90e759d1 1609 ret = -EINVAL;
b481de9c
ZY		 1610 goto err_release;
1611 }
1612
1613 /* Data from ucode file: header followed by uCode images */
1614 ucode = (void *)ucode_raw->data;
1615
c02b3acd 1616 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 1617 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY		 1618 inst_size = le32_to_cpu(ucode->inst_size);
1619 data_size = le32_to_cpu(ucode->data_size);
1620 init_size = le32_to_cpu(ucode->init_size);
1621 init_data_size = le32_to_cpu(ucode->init_data_size);
1622 boot_size = le32_to_cpu(ucode->boot_size);
1623
a0987a8d
RC		 1624 /* api_ver should match the api version forming part of the
1625 * firmware filename ... but we don't check for that and only rely
1626 * on the API version read from firware header from here on forward */
1627
1628 if (api_ver < api_min || api_ver > api_max) {
1629 IWL_ERROR("Driver unable to support your firmware API. "
1630 "Driver supports v%u, firmware is v%u.\n",
1631 api_max, api_ver);
1632 priv->ucode_ver = 0;
1633 ret = -EINVAL;
1634 goto err_release;
1635 }
1636 if (api_ver != api_max)
1637 IWL_ERROR("Firmware has old API version. Expected v%u, "
1638 "got v%u. New firmware can be obtained "
1639 "from http://www.intellinuxwireless.org.\n",
1640 api_max, api_ver);
1641
1642 printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
c02b3acd
CR		 1643 IWL_UCODE_MAJOR(priv->ucode_ver),
1644 IWL_UCODE_MINOR(priv->ucode_ver),
1645 IWL_UCODE_API(priv->ucode_ver),
1646 IWL_UCODE_SERIAL(priv->ucode_ver));
a0987a8d
RC		 1647
1648 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
1649 priv->ucode_ver);
b481de9c
ZY		 1650 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1651 inst_size);
1652 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1653 data_size);
1654 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1655 init_size);
1656 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1657 init_data_size);
1658 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1659 boot_size);
1660
1661 /* Verify size of file vs. image size info in file's header */
1662 if (ucode_raw->size < sizeof(*ucode) +
1663 inst_size + data_size + init_size +
1664 init_data_size + boot_size) {
1665
1666 IWL_DEBUG_INFO("uCode file size %d too small\n",
1667 (int)ucode_raw->size);
90e759d1 1668 ret = -EINVAL;
b481de9c
ZY		 1669 goto err_release;
1670 }
1671
1672 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1673 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW		 1674 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1675 inst_size);
1676 ret = -EINVAL;
b481de9c
ZY		 1677 goto err_release;
1678 }
1679
099b40b7 1680 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW		 1681 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1682 data_size);
1683 ret = -EINVAL;
b481de9c
ZY		 1684 goto err_release;
1685 }
099b40b7 1686 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1687 IWL_DEBUG_INFO
90e759d1
TW		 1688 ("uCode init instr len %d too large to fit in\n",
1689 init_size);
1690 ret = -EINVAL;
b481de9c
ZY		 1691 goto err_release;
1692 }
099b40b7 1693 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1694 IWL_DEBUG_INFO
90e759d1
TW		 1695 ("uCode init data len %d too large to fit in\n",
1696 init_data_size);
1697 ret = -EINVAL;
b481de9c
ZY		 1698 goto err_release;
1699 }
099b40b7 1700 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1701 IWL_DEBUG_INFO
90e759d1
TW		 1702 ("uCode boot instr len %d too large to fit in\n",
1703 boot_size);
1704 ret = -EINVAL;
b481de9c
ZY		 1705 goto err_release;
1706 }
1707
1708 /* Allocate ucode buffers for card's bus-master loading ... */
1709
1710 /* Runtime instructions and 2 copies of data:
1711 * 1) unmodified from disk
1712 * 2) backup cache for save/restore during power-downs */
1713 priv->ucode_code.len = inst_size;
98c92211 1714 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 1715
1716 priv->ucode_data.len = data_size;
98c92211 1717 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 1718
1719 priv->ucode_data_backup.len = data_size;
98c92211 1720 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 1721
1f304e4e
ZY		 1722 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1723 !priv->ucode_data_backup.v_addr)
1724 goto err_pci_alloc;
1725
b481de9c 1726 /* Initialization instructions and data */
90e759d1
TW		 1727 if (init_size && init_data_size) {
1728 priv->ucode_init.len = init_size;
98c92211 1729 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 1730
1731 priv->ucode_init_data.len = init_data_size;
98c92211 1732 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 1733
1734 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1735 goto err_pci_alloc;
1736 }
b481de9c
ZY		 1737
1738 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 1739 if (boot_size) {
1740 priv->ucode_boot.len = boot_size;
98c92211 1741 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1742
90e759d1
TW		 1743 if (!priv->ucode_boot.v_addr)
1744 goto err_pci_alloc;
1745 }
b481de9c
ZY		 1746
1747 /* Copy images into buffers for card's bus-master reads ... */
1748
1749 /* Runtime instructions (first block of data in file) */
1750 src = &ucode->data[0];
1751 len = priv->ucode_code.len;
90e759d1 1752 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 1753 memcpy(priv->ucode_code.v_addr, src, len);
1754 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1755 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1756
1757 /* Runtime data (2nd block)
5b9f8cd3 1758 * NOTE: Copy into backup buffer will be done in iwl_up() */
b481de9c
ZY		 1759 src = &ucode->data[inst_size];
1760 len = priv->ucode_data.len;
90e759d1 1761 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 1762 memcpy(priv->ucode_data.v_addr, src, len);
1763 memcpy(priv->ucode_data_backup.v_addr, src, len);
1764
1765 /* Initialization instructions (3rd block) */
1766 if (init_size) {
1767 src = &ucode->data[inst_size + data_size];
1768 len = priv->ucode_init.len;
90e759d1
TW		 1769 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1770 len);
b481de9c
ZY		 1771 memcpy(priv->ucode_init.v_addr, src, len);
1772 }
1773
1774 /* Initialization data (4th block) */
1775 if (init_data_size) {
1776 src = &ucode->data[inst_size + data_size + init_size];
1777 len = priv->ucode_init_data.len;
90e759d1
TW		 1778 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1779 len);
b481de9c
ZY		 1780 memcpy(priv->ucode_init_data.v_addr, src, len);
1781 }
1782
1783 /* Bootstrap instructions (5th block) */
1784 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1785 len = priv->ucode_boot.len;
90e759d1 1786 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 1787 memcpy(priv->ucode_boot.v_addr, src, len);
1788
1789 /* We have our copies now, allow OS release its copies */
1790 release_firmware(ucode_raw);
1791 return 0;
1792
1793 err_pci_alloc:
1794 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1795 ret = -ENOMEM;
5b9f8cd3 1796 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 1797
1798 err_release:
1799 release_firmware(ucode_raw);
1800
1801 error:
90e759d1 1802 return ret;
b481de9c
ZY		 1803}
1804
ada17513
MA		 1805/* temporary */
1806static int iwl_mac_beacon_update(struct ieee80211_hw *hw,
1807 struct sk_buff *skb);
1808
b481de9c 1809/**
4a4a9e81 1810 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1811 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1812 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1813 */
4a4a9e81 1814static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1815{
57aab75a 1816 int ret = 0;
b481de9c
ZY		 1817
1818 IWL_DEBUG_INFO("Runtime Alive received.\n");
1819
1820 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1821 /* We had an error bringing up the hardware, so take it
1822 * all the way back down so we can try again */
1823 IWL_DEBUG_INFO("Alive failed.\n");
1824 goto restart;
1825 }
1826
1827 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1828 * This is a paranoid check, because we would not have gotten the
1829 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1830 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 1831 /* Runtime instruction load was bad;
1832 * take it all the way back down so we can try again */
1833 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1834 goto restart;
1835 }
1836
37deb2a0 1837 iwl_clear_stations_table(priv);
57aab75a
TW		 1838 ret = priv->cfg->ops->lib->alive_notify(priv);
1839 if (ret) {
b481de9c 1840 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 1841 ret);
b481de9c
ZY		 1842 goto restart;
1843 }
1844
5b9f8cd3 1845 /* After the ALIVE response, we can send host commands to the uCode */
b481de9c
ZY		 1846 set_bit(STATUS_ALIVE, &priv->status);
1847
fee1247a 1848 if (iwl_is_rfkill(priv))
b481de9c
ZY		 1849 return;
1850
36d6825b 1851 ieee80211_wake_queues(priv->hw);
b481de9c
ZY		 1852
1853 priv->active_rate = priv->rates_mask;
1854 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1855
3109ece1 1856 if (iwl_is_associated(priv)) {
c1adf9fb
GG		 1857 struct iwl_rxon_cmd *active_rxon =
1858 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY		 1859
1860 memcpy(&priv->staging_rxon, &priv->active_rxon,
1861 sizeof(priv->staging_rxon));
1862 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1863 } else {
1864 /* Initialize our rx_config data */
5b9f8cd3 1865 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY		 1866 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1867 }
1868
9fbab516 1869 /* Configure Bluetooth device coexistence support */
5b9f8cd3 1870 iwl_send_bt_config(priv);
b481de9c 1871
4a4a9e81
TW		 1872 iwl_reset_run_time_calib(priv);
1873
b481de9c 1874 /* Configure the adapter for unassociated operation */
5b9f8cd3 1875 iwl_commit_rxon(priv);
b481de9c
ZY		 1876
1877 /* At this point, the NIC is initialized and operational */
47f4a587 1878 iwl_rf_kill_ct_config(priv);
5a66926a 1879
fe00b5a5
RC		 1880 iwl_leds_register(priv);
1881
b481de9c 1882 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 1883 set_bit(STATUS_READY, &priv->status);
5a66926a 1884 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 1885
1886 if (priv->error_recovering)
5b9f8cd3 1887 iwl_error_recovery(priv);
b481de9c 1888
58d0f361 1889 iwl_power_update_mode(priv, 1);
c46fbefa 1890
ada17513
MA		 1891 /* reassociate for ADHOC mode */
1892 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1893 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1894 priv->vif);
1895 if (beacon)
1896 iwl_mac_beacon_update(priv->hw, beacon);
1897 }
1898
1899
c46fbefa 1900 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
5b9f8cd3 1901 iwl_set_mode(priv, priv->iw_mode);
c46fbefa 1902
b481de9c
ZY		 1903 return;
1904
1905 restart:
1906 queue_work(priv->workqueue, &priv->restart);
1907}
1908
4e39317d 1909static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 1910
5b9f8cd3 1911static void __iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 1912{
1913 unsigned long flags;
1914 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 1915
1916 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
1917
b481de9c
ZY		 1918 if (!exit_pending)
1919 set_bit(STATUS_EXIT_PENDING, &priv->status);
1920
ab53d8af
MA		 1921 iwl_leds_unregister(priv);
1922
37deb2a0 1923 iwl_clear_stations_table(priv);
b481de9c
ZY		 1924
1925 /* Unblock any waiting calls */
1926 wake_up_interruptible_all(&priv->wait_command_queue);
1927
b481de9c
ZY		 1928 /* Wipe out the EXIT_PENDING status bit if we are not actually
1929 * exiting the module */
1930 if (!exit_pending)
1931 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1932
1933 /* stop and reset the on-board processor */
3395f6e9 1934 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 1935
1936 /* tell the device to stop sending interrupts */
0359facc 1937 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 1938 iwl_disable_interrupts(priv);
0359facc
MA		 1939 spin_unlock_irqrestore(&priv->lock, flags);
1940 iwl_synchronize_irq(priv);
b481de9c
ZY		 1941
1942 if (priv->mac80211_registered)
1943 ieee80211_stop_queues(priv->hw);
1944
5b9f8cd3 1945 /* If we have not previously called iwl_init() then
b481de9c 1946 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 1947 if (!iwl_is_init(priv)) {
b481de9c
ZY		 1948 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1949 STATUS_RF_KILL_HW |
1950 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1951 STATUS_RF_KILL_SW |
9788864e
RC		 1952 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1953 STATUS_GEO_CONFIGURED |
b481de9c 1954 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA		 1955 STATUS_IN_SUSPEND |
1956 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1957 STATUS_EXIT_PENDING;
b481de9c
ZY		 1958 goto exit;
1959 }
1960
1961 /* ...otherwise clear out all the status bits but the RF Kill and
1962 * SUSPEND bits and continue taking the NIC down. */
1963 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1964 STATUS_RF_KILL_HW |
1965 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1966 STATUS_RF_KILL_SW |
9788864e
RC		 1967 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1968 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 1969 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
1970 STATUS_IN_SUSPEND |
1971 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA		 1972 STATUS_FW_ERROR |
1973 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1974 STATUS_EXIT_PENDING;
b481de9c
ZY		 1975
1976 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 1977 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 1978 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 1979 spin_unlock_irqrestore(&priv->lock, flags);
1980
da1bc453 1981 iwl_txq_ctx_stop(priv);
b3bbacb7 1982 iwl_rxq_stop(priv);
b481de9c
ZY		 1983
1984 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 1985 if (!iwl_grab_nic_access(priv)) {
1986 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 1987 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 1988 iwl_release_nic_access(priv);
b481de9c
ZY		 1989 }
1990 spin_unlock_irqrestore(&priv->lock, flags);
1991
1992 udelay(5);
1993
7f066108 1994 /* FIXME: apm_ops.suspend(priv) */
d535311e
GG		 1995 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
1996 priv->cfg->ops->lib->apm_ops.stop(priv);
1997 else
1998 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 1999 exit:
885ba202 2000 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY		 2001
2002 if (priv->ibss_beacon)
2003 dev_kfree_skb(priv->ibss_beacon);
2004 priv->ibss_beacon = NULL;
2005
2006 /* clear out any free frames */
fcab423d 2007 iwl_clear_free_frames(priv);
b481de9c
ZY		 2008}
2009
5b9f8cd3 2010static void iwl_down(struct iwl_priv *priv)
b481de9c
ZY		 2011{
2012 mutex_lock(&priv->mutex);
5b9f8cd3 2013 __iwl_down(priv);
b481de9c 2014 mutex_unlock(&priv->mutex);
b24d22b1 2015
4e39317d 2016 iwl_cancel_deferred_work(priv);
b481de9c
ZY		 2017}
2018
2019#define MAX_HW_RESTARTS 5
2020
5b9f8cd3 2021static int __iwl_up(struct iwl_priv *priv)
b481de9c 2022{
57aab75a
TW		 2023 int i;
2024 int ret;
b481de9c
ZY		 2025
2026 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2027 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2028 return -EIO;
2029 }
2030
e903fbd4
RC		 2031 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2032 IWL_ERROR("ucode not available for device bringup\n");
2033 return -EIO;
2034 }
2035
e655b9f0 2036 /* If platform's RF_KILL switch is NOT set to KILL */
c1842d61 2037 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
e655b9f0 2038 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2039 else
e655b9f0 2040 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2041
c1842d61 2042 if (iwl_is_rfkill(priv)) {
5b9f8cd3 2043 iwl_enable_interrupts(priv);
3bff19c2
EG		 2044 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2045 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
c1842d61 2046 return 0;
b481de9c
ZY		 2047 }
2048
3395f6e9 2049 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2050
1053d35f 2051 ret = iwl_hw_nic_init(priv);
57aab75a
TW		 2052 if (ret) {
2053 IWL_ERROR("Unable to init nic\n");
2054 return ret;
b481de9c
ZY		 2055 }
2056
2057 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 2058 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2059 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 2060 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2061
2062 /* clear (again), then enable host interrupts */
3395f6e9 2063 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5b9f8cd3 2064 iwl_enable_interrupts(priv);
b481de9c
ZY		 2065
2066 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 2067 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2068 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2069
2070 /* Copy original ucode data image from disk into backup cache.
2071 * This will be used to initialize the on-board processor's
2072 * data SRAM for a clean start when the runtime program first loads. */
2073 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2074 priv->ucode_data.len);
b481de9c 2075
b481de9c
ZY		 2076 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2077
37deb2a0 2078 iwl_clear_stations_table(priv);
b481de9c
ZY		 2079
2080 /* load bootstrap state machine,
2081 * load bootstrap program into processor's memory,
2082 * prepare to load the "initialize" uCode */
57aab75a 2083 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2084
57aab75a
TW		 2085 if (ret) {
2086 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY		 2087 continue;
2088 }
2089
f3d5b45b
EG		 2090 /* Clear out the uCode error bit if it is set */
2091 clear_bit(STATUS_FW_ERROR, &priv->status);
2092
b481de9c 2093 /* start card; "initialize" will load runtime ucode */
5b9f8cd3 2094 iwl_nic_start(priv);
b481de9c 2095
b481de9c
ZY		 2096 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2097
2098 return 0;
2099 }
2100
2101 set_bit(STATUS_EXIT_PENDING, &priv->status);
5b9f8cd3 2102 __iwl_down(priv);
64e72c3e 2103 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY		 2104
2105 /* tried to restart and config the device for as long as our
2106 * patience could withstand */
2107 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2108 return -EIO;
2109}
2110
2111
2112/*****************************************************************************
2113 *
2114 * Workqueue callbacks
2115 *
2116 *****************************************************************************/
2117
4a4a9e81 2118static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2119{
c79dd5b5
TW		 2120 struct iwl_priv *priv =
2121 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 2122
2123 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2124 return;
2125
2126 mutex_lock(&priv->mutex);
f3ccc08c 2127 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY		 2128 mutex_unlock(&priv->mutex);
2129}
2130
4a4a9e81 2131static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2132{
c79dd5b5
TW		 2133 struct iwl_priv *priv =
2134 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 2135
2136 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2137 return;
2138
2139 mutex_lock(&priv->mutex);
4a4a9e81 2140 iwl_alive_start(priv);
b481de9c
ZY		 2141 mutex_unlock(&priv->mutex);
2142}
2143
5b9f8cd3 2144static void iwl_bg_rf_kill(struct work_struct *work)
b481de9c 2145{
c79dd5b5 2146 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 2147
2148 wake_up_interruptible(&priv->wait_command_queue);
2149
2150 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2151 return;
2152
2153 mutex_lock(&priv->mutex);
2154
fee1247a 2155 if (!iwl_is_rfkill(priv)) {
f3d67999 2156 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY		 2157 "HW and/or SW RF Kill no longer active, restarting "
2158 "device\n");
2159 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2160 queue_work(priv->workqueue, &priv->restart);
2161 } else {
ad97edd2
MA		 2162 /* make sure mac80211 stop sending Tx frame */
2163 if (priv->mac80211_registered)
2164 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 2165
2166 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2167 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2168 "disabled by SW switch\n");
2169 else
2170 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2171 "Kill switch must be turned off for "
2172 "wireless networking to work.\n");
2173 }
2174 mutex_unlock(&priv->mutex);
80fcc9e2 2175 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2176}
2177
16e727e8
EG		 2178static void iwl_bg_run_time_calib_work(struct work_struct *work)
2179{
2180 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2181 run_time_calib_work);
2182
2183 mutex_lock(&priv->mutex);
2184
2185 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2186 test_bit(STATUS_SCANNING, &priv->status)) {
2187 mutex_unlock(&priv->mutex);
2188 return;
2189 }
2190
2191 if (priv->start_calib) {
2192 iwl_chain_noise_calibration(priv, &priv->statistics);
2193
2194 iwl_sensitivity_calibration(priv, &priv->statistics);
2195 }
2196
2197 mutex_unlock(&priv->mutex);
2198 return;
2199}
2200
5b9f8cd3 2201static void iwl_bg_up(struct work_struct *data)
b481de9c 2202{
c79dd5b5 2203 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 2204
2205 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2206 return;
2207
2208 mutex_lock(&priv->mutex);
5b9f8cd3 2209 __iwl_up(priv);
b481de9c 2210 mutex_unlock(&priv->mutex);
80fcc9e2 2211 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY		 2212}
2213
5b9f8cd3 2214static void iwl_bg_restart(struct work_struct *data)
b481de9c 2215{
c79dd5b5 2216 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 2217
2218 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2219 return;
2220
5b9f8cd3 2221 iwl_down(priv);
b481de9c
ZY		 2222 queue_work(priv->workqueue, &priv->up);
2223}
2224
5b9f8cd3 2225static void iwl_bg_rx_replenish(struct work_struct *data)
b481de9c 2226{
c79dd5b5
TW		 2227 struct iwl_priv *priv =
2228 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 2229
2230 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2231 return;
2232
2233 mutex_lock(&priv->mutex);
a55360e4 2234 iwl_rx_replenish(priv);
b481de9c
ZY		 2235 mutex_unlock(&priv->mutex);
2236}
2237
7878a5a4
MA		 2238#define IWL_DELAY_NEXT_SCAN (HZ*2)
2239
5b9f8cd3 2240static void iwl_post_associate(struct iwl_priv *priv)
b481de9c 2241{
b481de9c 2242 struct ieee80211_conf *conf = NULL;
857485c0 2243 int ret = 0;
1ff50bda 2244 unsigned long flags;
b481de9c 2245
05c914fe 2246 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3ac7f146 2247 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
b481de9c
ZY		 2248 return;
2249 }
2250
e174961c
JB		 2251 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
2252 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY		 2253
2254
2255 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2256 return;
2257
b481de9c 2258
508e32e1 2259 if (!priv->vif || !priv->is_open)
948c171c 2260 return;
508e32e1 2261
c90a74ba 2262 iwl_power_cancel_timeout(priv);
2a421b91 2263 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2264
b481de9c
ZY		 2265 conf = ieee80211_get_hw_conf(priv->hw);
2266
2267 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2268 iwl_commit_rxon(priv);
b481de9c 2269
3195c1f3 2270 iwl_setup_rxon_timing(priv);
857485c0 2271 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2272 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2273 if (ret)
b481de9c
ZY		 2274 IWL_WARNING("REPLY_RXON_TIMING failed - "
2275 "Attempting to continue.\n");
2276
2277 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2278
42eb7c64 2279 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2280
c7de35cd 2281 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2282 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2283
2284 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2285 priv->assoc_id, priv->beacon_int);
2286
2287 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2288 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2289 else
2290 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2291
2292 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2293 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2294 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2295 else
2296 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2297
05c914fe 2298 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2299 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2300
2301 }
2302
5b9f8cd3 2303 iwl_commit_rxon(priv);
b481de9c
ZY		 2304
2305 switch (priv->iw_mode) {
05c914fe 2306 case NL80211_IFTYPE_STATION:
b481de9c
ZY		 2307 break;
2308
05c914fe 2309 case NL80211_IFTYPE_ADHOC:
b481de9c 2310
c46fbefa
AK		 2311 /* assume default assoc id */
2312 priv->assoc_id = 1;
b481de9c 2313
4f40e4d9 2314 iwl_rxon_add_station(priv, priv->bssid, 0);
5b9f8cd3 2315 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2316
2317 break;
2318
2319 default:
2320 IWL_ERROR("%s Should not be called in %d mode\n",
3ac7f146 2321 __func__, priv->iw_mode);
b481de9c
ZY		 2322 break;
2323 }
2324
05c914fe 2325 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2326 priv->assoc_station_added = 1;
2327
1ff50bda
EG		 2328 spin_lock_irqsave(&priv->lock, flags);
2329 iwl_activate_qos(priv, 0);
2330 spin_unlock_irqrestore(&priv->lock, flags);
292ae174 2331
04816448
GE		 2332 /* the chain noise calibration will enabled PM upon completion
2333 * If chain noise has already been run, then we need to enable
2334 * power management here */
2335 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2336 iwl_power_enable_management(priv);
c90a74ba
EG		 2337
2338 /* Enable Rx differential gain and sensitivity calibrations */
2339 iwl_chain_noise_reset(priv);
2340 priv->start_calib = 1;
2341
508e32e1
RC		 2342}
2343
b481de9c
ZY		 2344/*****************************************************************************
2345 *
2346 * mac80211 entry point functions
2347 *
2348 *****************************************************************************/
2349
154b25ce 2350#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2351
5b9f8cd3 2352static int iwl_mac_start(struct ieee80211_hw *hw)
b481de9c 2353{
c79dd5b5 2354 struct iwl_priv *priv = hw->priv;
5a66926a 2355 int ret;
cf88c433 2356 u16 pci_cmd;
b481de9c
ZY		 2357
2358 IWL_DEBUG_MAC80211("enter\n");
2359
5a66926a
ZY		 2360 if (pci_enable_device(priv->pci_dev)) {
2361 IWL_ERROR("Fail to pci_enable_device\n");
2362 return -ENODEV;
2363 }
2364 pci_restore_state(priv->pci_dev);
2365 pci_enable_msi(priv->pci_dev);
2366
cf88c433
TW		 2367 /* enable interrupts if needed: hw bug w/a */
2368 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2369 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2370 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2371 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2372 }
2373
5b9f8cd3 2374 ret = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
5a66926a
ZY		 2375 DRV_NAME, priv);
2376 if (ret) {
2377 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2378 goto out_disable_msi;
2379 }
2380
b481de9c
ZY		 2381 /* we should be verifying the device is ready to be opened */
2382 mutex_lock(&priv->mutex);
2383
c1adf9fb 2384 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY		 2385 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2386 * ucode filename and max sizes are card-specific. */
b481de9c 2387
5a66926a 2388 if (!priv->ucode_code.len) {
5b9f8cd3 2389 ret = iwl_read_ucode(priv);
5a66926a
ZY		 2390 if (ret) {
2391 IWL_ERROR("Could not read microcode: %d\n", ret);
2392 mutex_unlock(&priv->mutex);
2393 goto out_release_irq;
2394 }
2395 }
b481de9c 2396
5b9f8cd3 2397 ret = __iwl_up(priv);
5a66926a 2398
b481de9c 2399 mutex_unlock(&priv->mutex);
5a66926a 2400
80fcc9e2
AG		 2401 iwl_rfkill_set_hw_state(priv);
2402
e655b9f0
ZY		 2403 if (ret)
2404 goto out_release_irq;
2405
c1842d61
TW		 2406 if (iwl_is_rfkill(priv))
2407 goto out;
2408
e655b9f0
ZY		 2409 IWL_DEBUG_INFO("Start UP work done.\n");
2410
2411 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2412 return 0;
2413
fe9b6b72 2414 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2415 * mac80211 will not be run successfully. */
154b25ce
EG		 2416 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2417 test_bit(STATUS_READY, &priv->status),
2418 UCODE_READY_TIMEOUT);
2419 if (!ret) {
2420 if (!test_bit(STATUS_READY, &priv->status)) {
2421 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2422 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2423 ret = -ETIMEDOUT;
2424 goto out_release_irq;
5a66926a 2425 }
fe9b6b72 2426 }
0a078ffa 2427
c1842d61 2428out:
0a078ffa 2429 priv->is_open = 1;
b481de9c
ZY		 2430 IWL_DEBUG_MAC80211("leave\n");
2431 return 0;
5a66926a
ZY		 2432
2433out_release_irq:
2434 free_irq(priv->pci_dev->irq, priv);
2435out_disable_msi:
2436 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 2437 pci_disable_device(priv->pci_dev);
2438 priv->is_open = 0;
2439 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2440 return ret;
b481de9c
ZY		 2441}
2442
5b9f8cd3 2443static void iwl_mac_stop(struct ieee80211_hw *hw)
b481de9c 2444{
c79dd5b5 2445 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2446
2447 IWL_DEBUG_MAC80211("enter\n");
948c171c 2448
e655b9f0
ZY		 2449 if (!priv->is_open) {
2450 IWL_DEBUG_MAC80211("leave - skip\n");
2451 return;
2452 }
2453
b481de9c 2454 priv->is_open = 0;
5a66926a 2455
fee1247a 2456 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 2457 /* stop mac, cancel any scan request and clear
2458 * RXON_FILTER_ASSOC_MSK BIT
2459 */
5a66926a 2460 mutex_lock(&priv->mutex);
2a421b91 2461 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2462 mutex_unlock(&priv->mutex);
fde3571f
MA		 2463 }
2464
5b9f8cd3 2465 iwl_down(priv);
5a66926a
ZY		 2466
2467 flush_workqueue(priv->workqueue);
2468 free_irq(priv->pci_dev->irq, priv);
2469 pci_disable_msi(priv->pci_dev);
2470 pci_save_state(priv->pci_dev);
2471 pci_disable_device(priv->pci_dev);
948c171c 2472
b481de9c 2473 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 2474}
2475
5b9f8cd3 2476static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2477{
c79dd5b5 2478 struct iwl_priv *priv = hw->priv;
b481de9c 2479
f3674227 2480 IWL_DEBUG_MACDUMP("enter\n");
b481de9c 2481
b481de9c 2482 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2483 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2484
e039fa4a 2485 if (iwl_tx_skb(priv, skb))
b481de9c
ZY		 2486 dev_kfree_skb_any(skb);
2487
f3674227 2488 IWL_DEBUG_MACDUMP("leave\n");
637f8837 2489 return NETDEV_TX_OK;
b481de9c
ZY		 2490}
2491
5b9f8cd3 2492static int iwl_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2493 struct ieee80211_if_init_conf *conf)
2494{
c79dd5b5 2495 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2496 unsigned long flags;
2497
32bfd35d 2498 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2499
32bfd35d
JB		 2500 if (priv->vif) {
2501 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2502 return -EOPNOTSUPP;
b481de9c
ZY		 2503 }
2504
2505 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2506 priv->vif = conf->vif;
60294de3 2507 priv->iw_mode = conf->type;
b481de9c
ZY		 2508
2509 spin_unlock_irqrestore(&priv->lock, flags);
2510
2511 mutex_lock(&priv->mutex);
864792e3
TW		 2512
2513 if (conf->mac_addr) {
e174961c 2514 IWL_DEBUG_MAC80211("Set %pM\n", conf->mac_addr);
864792e3
TW		 2515 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2516 }
b481de9c 2517
5b9f8cd3 2518 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
c46fbefa
AK		 2519 /* we are not ready, will run again when ready */
2520 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2521
b481de9c
ZY		 2522 mutex_unlock(&priv->mutex);
2523
5a66926a 2524 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 2525 return 0;
2526}
2527
2528/**
5b9f8cd3 2529 * iwl_mac_config - mac80211 config callback
b481de9c
ZY		 2530 *
2531 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2532 * be set inappropriately and the driver currently sets the hardware up to
2533 * use it whenever needed.
2534 */
5b9f8cd3 2535static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 2536{
c79dd5b5 2537 struct iwl_priv *priv = hw->priv;
bf85ea4f 2538 const struct iwl_channel_info *ch_info;
e8975581 2539 struct ieee80211_conf *conf = &hw->conf;
b481de9c 2540 unsigned long flags;
76bb77e0 2541 int ret = 0;
82a66bbb 2542 u16 channel;
b481de9c
ZY		 2543
2544 mutex_lock(&priv->mutex);
8318d78a 2545 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2546
ae5eb026
JB		 2547 priv->current_ht_config.is_ht = conf->ht.enabled;
2548
14a08a7f 2549 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2550 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2551 goto out;
64e72c3e
MA		 2552 }
2553
14a08a7f
EG		 2554 if (!conf->radio_enabled)
2555 iwl_radio_kill_sw_disable_radio(priv);
2556
fee1247a 2557 if (!iwl_is_ready(priv)) {
b481de9c 2558 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 2559 ret = -EIO;
2560 goto out;
b481de9c
ZY		 2561 }
2562
1ea87396 2563 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2564 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470 2565 IWL_DEBUG_MAC80211("leave - scanning\n");
b481de9c 2566 mutex_unlock(&priv->mutex);
a0646470 2567 return 0;
b481de9c
ZY		 2568 }
2569
82a66bbb
TW		 2570 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2571 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2572 if (!is_channel_valid(ch_info)) {
b481de9c 2573 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY		 2574 ret = -EINVAL;
2575 goto out;
b481de9c
ZY		 2576 }
2577
05c914fe 2578 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
398f9e76
AK		 2579 !is_channel_ibss(ch_info)) {
2580 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2581 conf->channel->hw_value, conf->channel->band);
2582 ret = -EINVAL;
2583 goto out;
2584 }
2585
82a66bbb
TW		 2586 spin_lock_irqsave(&priv->lock, flags);
2587
b5d7be5e 2588
78330fdd 2589 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 2590 * from any ht related info since 2.4 does not
2591 * support ht */
82a66bbb 2592 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY		 2593#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2594 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2595#endif
2596 )
2597 priv->staging_rxon.flags = 0;
b481de9c 2598
17e72782 2599 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 2600
82a66bbb 2601 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY		 2602
2603 /* The list of supported rates and rate mask can be different
8318d78a 2604 * for each band; since the band may have changed, reset
b481de9c 2605 * the rate mask to what mac80211 lists */
5b9f8cd3 2606 iwl_set_rate(priv);
b481de9c
ZY		 2607
2608 spin_unlock_irqrestore(&priv->lock, flags);
2609
2610#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2611 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
5b9f8cd3 2612 iwl_hw_channel_switch(priv, conf->channel);
76bb77e0 2613 goto out;
b481de9c
ZY		 2614 }
2615#endif
2616
b481de9c
ZY		 2617 if (!conf->radio_enabled) {
2618 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2619 goto out;
b481de9c
ZY		 2620 }
2621
fee1247a 2622 if (iwl_is_rfkill(priv)) {
b481de9c 2623 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 2624 ret = -EIO;
2625 goto out;
b481de9c
ZY		 2626 }
2627
e602cb18
EK		 2628 if (conf->flags & IEEE80211_CONF_PS)
2629 ret = iwl_power_set_user_mode(priv, IWL_POWER_INDEX_3);
2630 else
2631 ret = iwl_power_set_user_mode(priv, IWL_POWER_MODE_CAM);
2632 if (ret)
2633 IWL_DEBUG_MAC80211("Error setting power level\n");
2634
630fe9b6
TW		 2635 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2636 priv->tx_power_user_lmt, conf->power_level);
2637
2638 iwl_set_tx_power(priv, conf->power_level, false);
2639
5b9f8cd3 2640 iwl_set_rate(priv);
b481de9c
ZY		 2641
2642 if (memcmp(&priv->active_rxon,
2643 &priv->staging_rxon, sizeof(priv->staging_rxon)))
5b9f8cd3 2644 iwl_commit_rxon(priv);
b481de9c
ZY		 2645 else
2646 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2647
2648 IWL_DEBUG_MAC80211("leave\n");
2649
a0646470 2650out:
5a66926a 2651 mutex_unlock(&priv->mutex);
76bb77e0 2652 return ret;
b481de9c
ZY		 2653}
2654
5b9f8cd3 2655static void iwl_config_ap(struct iwl_priv *priv)
b481de9c 2656{
857485c0 2657 int ret = 0;
1ff50bda 2658 unsigned long flags;
b481de9c 2659
d986bcd1 2660 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 2661 return;
2662
2663 /* The following should be done only at AP bring up */
3195c1f3 2664 if (!iwl_is_associated(priv)) {
b481de9c
ZY		 2665
2666 /* RXON - unassoc (to set timing command) */
2667 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2668 iwl_commit_rxon(priv);
b481de9c
ZY		 2669
2670 /* RXON Timing */
3195c1f3 2671 iwl_setup_rxon_timing(priv);
857485c0 2672 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2673 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2674 if (ret)
b481de9c
ZY		 2675 IWL_WARNING("REPLY_RXON_TIMING failed - "
2676 "Attempting to continue.\n");
2677
c7de35cd 2678 iwl_set_rxon_chain(priv);
b481de9c
ZY		 2679
2680 /* FIXME: what should be the assoc_id for AP? */
2681 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2682 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2683 priv->staging_rxon.flags |=
2684 RXON_FLG_SHORT_PREAMBLE_MSK;
2685 else
2686 priv->staging_rxon.flags &=
2687 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2688
2689 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2690 if (priv->assoc_capability &
2691 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2692 priv->staging_rxon.flags |=
2693 RXON_FLG_SHORT_SLOT_MSK;
2694 else
2695 priv->staging_rxon.flags &=
2696 ~RXON_FLG_SHORT_SLOT_MSK;
2697
05c914fe 2698 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
b481de9c
ZY		 2699 priv->staging_rxon.flags &=
2700 ~RXON_FLG_SHORT_SLOT_MSK;
2701 }
2702 /* restore RXON assoc */
2703 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2704 iwl_commit_rxon(priv);
1ff50bda
EG		 2705 spin_lock_irqsave(&priv->lock, flags);
2706 iwl_activate_qos(priv, 1);
2707 spin_unlock_irqrestore(&priv->lock, flags);
4f40e4d9 2708 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2709 }
5b9f8cd3 2710 iwl_send_beacon_cmd(priv);
b481de9c
ZY		 2711
2712 /* FIXME - we need to add code here to detect a totally new
2713 * configuration, reset the AP, unassoc, rxon timing, assoc,
2714 * clear sta table, add BCAST sta... */
2715}
2716
9d139c81 2717
5b9f8cd3 2718static int iwl_mac_config_interface(struct ieee80211_hw *hw,
32bfd35d 2719 struct ieee80211_vif *vif,
b481de9c
ZY		 2720 struct ieee80211_if_conf *conf)
2721{
c79dd5b5 2722 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2723 int rc;
2724
2725 if (conf == NULL)
2726 return -EIO;
2727
b716bb91
EG		 2728 if (priv->vif != vif) {
2729 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG		 2730 return 0;
2731 }
2732
05c914fe 2733 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB		 2734 conf->changed & IEEE80211_IFCC_BEACON) {
2735 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2736 if (!beacon)
2737 return -ENOMEM;
ada17513 2738 mutex_lock(&priv->mutex);
5b9f8cd3 2739 rc = iwl_mac_beacon_update(hw, beacon);
ada17513 2740 mutex_unlock(&priv->mutex);
9d139c81
JB		 2741 if (rc)
2742 return rc;
2743 }
2744
fee1247a 2745 if (!iwl_is_alive(priv))
5a66926a
ZY		 2746 return -EAGAIN;
2747
b481de9c
ZY		 2748 mutex_lock(&priv->mutex);
2749
b481de9c 2750 if (conf->bssid)
e174961c 2751 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
b481de9c 2752
4150c572
JB		 2753/*
2754 * very dubious code was here; the probe filtering flag is never set:
2755 *
b481de9c
ZY		 2756 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2757 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2758 */
b481de9c 2759
05c914fe 2760 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY		 2761 if (!conf->bssid) {
2762 conf->bssid = priv->mac_addr;
2763 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e174961c
JB		 2764 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
2765 conf->bssid);
b481de9c
ZY		 2766 }
2767 if (priv->ibss_beacon)
2768 dev_kfree_skb(priv->ibss_beacon);
2769
9d139c81 2770 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY		 2771 }
2772
fee1247a 2773 if (iwl_is_rfkill(priv))
fde3571f
MA		 2774 goto done;
2775
b481de9c
ZY		 2776 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2777 !is_multicast_ether_addr(conf->bssid)) {
2778 /* If there is currently a HW scan going on in the background
2779 * then we need to cancel it else the RXON below will fail. */
2a421b91 2780 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 2781 IWL_WARNING("Aborted scan still in progress "
2782 "after 100ms\n");
2783 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2784 mutex_unlock(&priv->mutex);
2785 return -EAGAIN;
2786 }
2787 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2788
2789 /* TODO: Audit driver for usage of these members and see
2790 * if mac80211 deprecates them (priv->bssid looks like it
2791 * shouldn't be there, but I haven't scanned the IBSS code
2792 * to verify) - jpk */
2793 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2794
05c914fe 2795 if (priv->iw_mode == NL80211_IFTYPE_AP)
5b9f8cd3 2796 iwl_config_ap(priv);
b481de9c 2797 else {
5b9f8cd3 2798 rc = iwl_commit_rxon(priv);
05c914fe 2799 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
4f40e4d9 2800 iwl_rxon_add_station(
b481de9c
ZY		 2801 priv, priv->active_rxon.bssid_addr, 1);
2802 }
2803
2804 } else {
2a421b91 2805 iwl_scan_cancel_timeout(priv, 100);
b481de9c 2806 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2807 iwl_commit_rxon(priv);
b481de9c
ZY		 2808 }
2809
fde3571f 2810 done:
b481de9c
ZY		 2811 IWL_DEBUG_MAC80211("leave\n");
2812 mutex_unlock(&priv->mutex);
2813
2814 return 0;
2815}
2816
5b9f8cd3 2817static void iwl_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 2818 unsigned int changed_flags,
2819 unsigned int *total_flags,
2820 int mc_count, struct dev_addr_list *mc_list)
2821{
4419e39b 2822 struct iwl_priv *priv = hw->priv;
352bc8de
ZY		 2823 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
2824
2825 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
2826 changed_flags, *total_flags);
25b3f57c 2827
352bc8de
ZY		 2828 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
2829 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
2830 *filter_flags |= RXON_FILTER_PROMISC_MSK;
2831 else
2832 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
2833 }
2834 if (changed_flags & FIF_ALLMULTI) {
2835 if (*total_flags & FIF_ALLMULTI)
2836 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
2837 else
2838 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
2839 }
2840 if (changed_flags & FIF_CONTROL) {
2841 if (*total_flags & FIF_CONTROL)
2842 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
2843 else
2844 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
2845 }
2846 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2847 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
2848 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
2849 else
2850 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
4419e39b 2851 }
352bc8de
ZY		 2852
2853 /* We avoid iwl_commit_rxon here to commit the new filter flags
2854 * since mac80211 will call ieee80211_hw_config immediately.
2855 * (mc_list is not supported at this time). Otherwise, we need to
2856 * queue a background iwl_commit_rxon work.
2857 */
2858
2859 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
25b3f57c 2860 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4150c572
JB		 2861}
2862
5b9f8cd3 2863static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 2864 struct ieee80211_if_init_conf *conf)
2865{
c79dd5b5 2866 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 2867
2868 IWL_DEBUG_MAC80211("enter\n");
2869
2870 mutex_lock(&priv->mutex);
948c171c 2871
fee1247a 2872 if (iwl_is_ready_rf(priv)) {
2a421b91 2873 iwl_scan_cancel_timeout(priv, 100);
fde3571f 2874 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 2875 iwl_commit_rxon(priv);
fde3571f 2876 }
32bfd35d
JB		 2877 if (priv->vif == conf->vif) {
2878 priv->vif = NULL;
b481de9c 2879 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY		 2880 }
2881 mutex_unlock(&priv->mutex);
2882
2883 IWL_DEBUG_MAC80211("leave\n");
2884
2885}
471b3efd 2886
3109ece1 2887#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
5b9f8cd3 2888static void iwl_bss_info_changed(struct ieee80211_hw *hw,
471b3efd
JB		 2889 struct ieee80211_vif *vif,
2890 struct ieee80211_bss_conf *bss_conf,
2891 u32 changes)
220173b0 2892{
c79dd5b5 2893 struct iwl_priv *priv = hw->priv;
220173b0 2894
3109ece1
TW		 2895 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
2896
471b3efd 2897 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW		 2898 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
2899 bss_conf->use_short_preamble);
471b3efd 2900 if (bss_conf->use_short_preamble)
220173b0
TW		 2901 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2902 else
2903 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2904 }
2905
471b3efd 2906 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 2907 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 2908 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 2909 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2910 else
2911 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2912 }
2913
98952d5d 2914 if (changes & BSS_CHANGED_HT) {
5b9f8cd3 2915 iwl_ht_conf(priv, bss_conf);
c7de35cd 2916 iwl_set_rxon_chain(priv);
98952d5d
TW		 2917 }
2918
471b3efd 2919 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 2920 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 2921 /* This should never happen as this function should
2922 * never be called from interrupt context. */
2923 if (WARN_ON_ONCE(in_interrupt()))
2924 return;
3109ece1
TW		 2925 if (bss_conf->assoc) {
2926 priv->assoc_id = bss_conf->aid;
2927 priv->beacon_int = bss_conf->beacon_int;
b5d7be5e 2928 priv->power_data.dtim_period = bss_conf->dtim_period;
3109ece1
TW		 2929 priv->timestamp = bss_conf->timestamp;
2930 priv->assoc_capability = bss_conf->assoc_capability;
9ccacb86
TW		 2931
2932 /* we have just associated, don't start scan too early
2933 * leave time for EAPOL exchange to complete
2934 */
3109ece1
TW		 2935 priv->next_scan_jiffies = jiffies +
2936 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1 2937 mutex_lock(&priv->mutex);
5b9f8cd3 2938 iwl_post_associate(priv);
508e32e1 2939 mutex_unlock(&priv->mutex);
3109ece1
TW		 2940 } else {
2941 priv->assoc_id = 0;
2942 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
2943 }
2944 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2945 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 2946 iwl_send_rxon_assoc(priv);
471b3efd
JB		 2947 }
2948
220173b0 2949}
b481de9c 2950
cb43dc25 2951static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t ssid_len)
b481de9c 2952{
b481de9c 2953 unsigned long flags;
c79dd5b5 2954 struct iwl_priv *priv = hw->priv;
8d09a5e1 2955 int ret;
b481de9c
ZY		 2956
2957 IWL_DEBUG_MAC80211("enter\n");
2958
052c4b9f 2959 mutex_lock(&priv->mutex);
b481de9c
ZY		 2960 spin_lock_irqsave(&priv->lock, flags);
2961
fee1247a 2962 if (!iwl_is_ready_rf(priv)) {
cb43dc25 2963 ret = -EIO;
b481de9c
ZY		 2964 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
2965 goto out_unlock;
2966 }
2967
8d09a5e1
TW		 2968 /* We don't schedule scan within next_scan_jiffies period.
2969 * Avoid scanning during possible EAPOL exchange, return
2970 * success immediately.
2971 */
7878a5a4 2972 if (priv->next_scan_jiffies &&
cb43dc25 2973 time_after(priv->next_scan_jiffies, jiffies)) {
681c0050 2974 IWL_DEBUG_SCAN("scan rejected: within next scan period\n");
8d09a5e1
TW		 2975 queue_work(priv->workqueue, &priv->scan_completed);
2976 ret = 0;
7878a5a4
MA		 2977 goto out_unlock;
2978 }
8d09a5e1 2979
b481de9c 2980 /* if we just finished scan ask for delay */
681c0050 2981 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
cb43dc25 2982 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
681c0050 2983 IWL_DEBUG_SCAN("scan rejected: within previous scan period\n");
8d09a5e1
TW		 2984 queue_work(priv->workqueue, &priv->scan_completed);
2985 ret = 0;
b481de9c
ZY		 2986 goto out_unlock;
2987 }
8d09a5e1 2988
cb43dc25 2989 if (ssid_len) {
b481de9c 2990 priv->one_direct_scan = 1;
cb43dc25 2991 priv->direct_ssid_len = min_t(u8, ssid_len, IW_ESSID_MAX_SIZE);
b481de9c 2992 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
cb43dc25 2993 } else {
948c171c 2994 priv->one_direct_scan = 0;
cb43dc25 2995 }
b481de9c 2996
cb43dc25 2997 ret = iwl_scan_initiate(priv);
b481de9c
ZY		 2998
2999 IWL_DEBUG_MAC80211("leave\n");
3000
3001out_unlock:
3002 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3003 mutex_unlock(&priv->mutex);
b481de9c 3004
cb43dc25 3005 return ret;
b481de9c
ZY		 3006}
3007
5b9f8cd3 3008static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
ab885f8c
EG		 3009 struct ieee80211_key_conf *keyconf, const u8 *addr,
3010 u32 iv32, u16 *phase1key)
3011{
ab885f8c 3012
9f58671e 3013 struct iwl_priv *priv = hw->priv;
ab885f8c
EG		 3014 IWL_DEBUG_MAC80211("enter\n");
3015
9f58671e 3016 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
ab885f8c
EG		 3017
3018 IWL_DEBUG_MAC80211("leave\n");
3019}
3020
5b9f8cd3 3021static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 3022 const u8 *local_addr, const u8 *addr,
3023 struct ieee80211_key_conf *key)
3024{
c79dd5b5 3025 struct iwl_priv *priv = hw->priv;
deb09c43
EG		 3026 int ret = 0;
3027 u8 sta_id = IWL_INVALID_STATION;
6974e363 3028 u8 is_default_wep_key = 0;
b481de9c
ZY		 3029
3030 IWL_DEBUG_MAC80211("enter\n");
3031
099b40b7 3032 if (priv->hw_params.sw_crypto) {
b481de9c
ZY		 3033 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3034 return -EOPNOTSUPP;
3035 }
3036
3037 if (is_zero_ether_addr(addr))
3038 /* only support pairwise keys */
3039 return -EOPNOTSUPP;
3040
947b13a7 3041 sta_id = iwl_find_station(priv, addr);
6974e363 3042 if (sta_id == IWL_INVALID_STATION) {
e174961c
JB		 3043 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
3044 addr);
6974e363 3045 return -EINVAL;
b481de9c 3046
deb09c43 3047 }
b481de9c 3048
6974e363 3049 mutex_lock(&priv->mutex);
2a421b91 3050 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG		 3051 mutex_unlock(&priv->mutex);
3052
3053 /* If we are getting WEP group key and we didn't receive any key mapping
3054 * so far, we are in legacy wep mode (group key only), otherwise we are
3055 * in 1X mode.
3056 * In legacy wep mode, we use another host command to the uCode */
5425e490 3057 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
05c914fe 3058 priv->iw_mode != NL80211_IFTYPE_AP) {
6974e363
EG		 3059 if (cmd == SET_KEY)
3060 is_default_wep_key = !priv->key_mapping_key;
3061 else
ccc038ab
EG		 3062 is_default_wep_key =
3063 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3064 }
052c4b9f 3065
b481de9c 3066 switch (cmd) {
deb09c43 3067 case SET_KEY:
6974e363
EG		 3068 if (is_default_wep_key)
3069 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3070 else
7480513f 3071 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG		 3072
3073 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 3074 break;
3075 case DISABLE_KEY:
6974e363
EG		 3076 if (is_default_wep_key)
3077 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3078 else
3ec47732 3079 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG		 3080
3081 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 3082 break;
3083 default:
deb09c43 3084 ret = -EINVAL;
b481de9c
ZY		 3085 }
3086
3087 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3088
deb09c43 3089 return ret;
b481de9c
ZY		 3090}
3091
5b9f8cd3 3092static int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY		 3093 const struct ieee80211_tx_queue_params *params)
3094{
c79dd5b5 3095 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 3096 unsigned long flags;
3097 int q;
b481de9c
ZY		 3098
3099 IWL_DEBUG_MAC80211("enter\n");
3100
fee1247a 3101 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 3102 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3103 return -EIO;
3104 }
3105
3106 if (queue >= AC_NUM) {
3107 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3108 return 0;
3109 }
3110
b481de9c
ZY		 3111 q = AC_NUM - 1 - queue;
3112
3113 spin_lock_irqsave(&priv->lock, flags);
3114
3115 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3116 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3117 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3118 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3119 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 3120
3121 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3122 priv->qos_data.qos_active = 1;
3123
05c914fe 3124 if (priv->iw_mode == NL80211_IFTYPE_AP)
1ff50bda 3125 iwl_activate_qos(priv, 1);
3109ece1 3126 else if (priv->assoc_id && iwl_is_associated(priv))
1ff50bda 3127 iwl_activate_qos(priv, 0);
b481de9c 3128
1ff50bda 3129 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3130
b481de9c
ZY		 3131 IWL_DEBUG_MAC80211("leave\n");
3132 return 0;
3133}
3134
5b9f8cd3 3135static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
d783b061 3136 enum ieee80211_ampdu_mlme_action action,
17741cdc 3137 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
d783b061
TW		 3138{
3139 struct iwl_priv *priv = hw->priv;
d783b061 3140
e174961c
JB		 3141 IWL_DEBUG_HT("A-MPDU action on addr %pM tid %d\n",
3142 sta->addr, tid);
d783b061
TW		 3143
3144 if (!(priv->cfg->sku & IWL_SKU_N))
3145 return -EACCES;
3146
3147 switch (action) {
3148 case IEEE80211_AMPDU_RX_START:
3149 IWL_DEBUG_HT("start Rx\n");
9f58671e 3150 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
d783b061
TW		 3151 case IEEE80211_AMPDU_RX_STOP:
3152 IWL_DEBUG_HT("stop Rx\n");
9f58671e 3153 return iwl_sta_rx_agg_stop(priv, sta->addr, tid);
d783b061
TW		 3154 case IEEE80211_AMPDU_TX_START:
3155 IWL_DEBUG_HT("start Tx\n");
17741cdc 3156 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
d783b061
TW		 3157 case IEEE80211_AMPDU_TX_STOP:
3158 IWL_DEBUG_HT("stop Tx\n");
17741cdc 3159 return iwl_tx_agg_stop(priv, sta->addr, tid);
d783b061
TW		 3160 default:
3161 IWL_DEBUG_HT("unknown\n");
3162 return -EINVAL;
3163 break;
3164 }
3165 return 0;
3166}
9f58671e 3167
5b9f8cd3 3168static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 3169 struct ieee80211_tx_queue_stats *stats)
3170{
c79dd5b5 3171 struct iwl_priv *priv = hw->priv;
b481de9c 3172 int i, avail;
16466903 3173 struct iwl_tx_queue *txq;
443cfd45 3174 struct iwl_queue *q;
b481de9c
ZY		 3175 unsigned long flags;
3176
3177 IWL_DEBUG_MAC80211("enter\n");
3178
fee1247a 3179 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 3180 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3181 return -EIO;
3182 }
3183
3184 spin_lock_irqsave(&priv->lock, flags);
3185
3186 for (i = 0; i < AC_NUM; i++) {
3187 txq = &priv->txq[i];
3188 q = &txq->q;
443cfd45 3189 avail = iwl_queue_space(q);
b481de9c 3190
57ffc589
JB		 3191 stats[i].len = q->n_window - avail;
3192 stats[i].limit = q->n_window - q->high_mark;
3193 stats[i].count = q->n_window;
b481de9c
ZY		 3194
3195 }
3196 spin_unlock_irqrestore(&priv->lock, flags);
3197
3198 IWL_DEBUG_MAC80211("leave\n");
3199
3200 return 0;
3201}
3202
5b9f8cd3 3203static int iwl_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 3204 struct ieee80211_low_level_stats *stats)
3205{
bf403db8
EK		 3206 struct iwl_priv *priv = hw->priv;
3207
3208 priv = hw->priv;
b481de9c
ZY		 3209 IWL_DEBUG_MAC80211("enter\n");
3210 IWL_DEBUG_MAC80211("leave\n");
3211
3212 return 0;
3213}
3214
5b9f8cd3 3215static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3216{
c79dd5b5 3217 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 3218 unsigned long flags;
3219
3220 mutex_lock(&priv->mutex);
3221 IWL_DEBUG_MAC80211("enter\n");
3222
b481de9c 3223 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3224 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3225 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3226
c7de35cd 3227 iwl_reset_qos(priv);
b481de9c 3228
b481de9c
ZY		 3229 spin_lock_irqsave(&priv->lock, flags);
3230 priv->assoc_id = 0;
3231 priv->assoc_capability = 0;
b481de9c
ZY		 3232 priv->assoc_station_added = 0;
3233
3234 /* new association get rid of ibss beacon skb */
3235 if (priv->ibss_beacon)
3236 dev_kfree_skb(priv->ibss_beacon);
3237
3238 priv->ibss_beacon = NULL;
3239
3240 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3241 priv->timestamp = 0;
05c914fe 3242 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY		 3243 priv->beacon_int = 0;
3244
3245 spin_unlock_irqrestore(&priv->lock, flags);
3246
fee1247a 3247 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA		 3248 IWL_DEBUG_MAC80211("leave - not ready\n");
3249 mutex_unlock(&priv->mutex);
3250 return;
3251 }
3252
052c4b9f 3253 /* we are restarting association process
3254 * clear RXON_FILTER_ASSOC_MSK bit
3255 */
05c914fe 3256 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2a421b91 3257 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3258 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5b9f8cd3 3259 iwl_commit_rxon(priv);
052c4b9f 3260 }
3261
5da4b55f
MA		 3262 iwl_power_update_mode(priv, 0);
3263
b481de9c 3264 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 3265 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
052c4b9f 3266
c90a74ba
EG		 3267 /* switch to CAM during association period.
3268 * the ucode will block any association/authentication
3269 * frome during assiciation period if it can not hear
3270 * the AP because of PM. the timer enable PM back is
3271 * association do not complete
3272 */
3273 if (priv->hw->conf.channel->flags & (IEEE80211_CHAN_PASSIVE_SCAN |
3274 IEEE80211_CHAN_RADAR))
3275 iwl_power_disable_management(priv, 3000);
3276
b481de9c
ZY		 3277 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3278 mutex_unlock(&priv->mutex);
3279 return;
3280 }
3281
5b9f8cd3 3282 iwl_set_rate(priv);
b481de9c
ZY		 3283
3284 mutex_unlock(&priv->mutex);
3285
3286 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 3287}
3288
5b9f8cd3 3289static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3290{
c79dd5b5 3291 struct iwl_priv *priv = hw->priv;
b481de9c 3292 unsigned long flags;
2ff75b78 3293 __le64 timestamp;
b481de9c 3294
b481de9c
ZY		 3295 IWL_DEBUG_MAC80211("enter\n");
3296
fee1247a 3297 if (!iwl_is_ready_rf(priv)) {
b481de9c 3298 IWL_DEBUG_MAC80211("leave - RF not ready\n");
b481de9c
ZY		 3299 return -EIO;
3300 }
3301
05c914fe 3302 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
b481de9c 3303 IWL_DEBUG_MAC80211("leave - not IBSS\n");
b481de9c
ZY		 3304 return -EIO;
3305 }
3306
3307 spin_lock_irqsave(&priv->lock, flags);
3308
3309 if (priv->ibss_beacon)
3310 dev_kfree_skb(priv->ibss_beacon);
3311
3312 priv->ibss_beacon = skb;
3313
3314 priv->assoc_id = 0;
2ff75b78 3315 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b94d8eea 3316 priv->timestamp = le64_to_cpu(timestamp);
b481de9c
ZY		 3317
3318 IWL_DEBUG_MAC80211("leave\n");
3319 spin_unlock_irqrestore(&priv->lock, flags);
3320
c7de35cd 3321 iwl_reset_qos(priv);
b481de9c 3322
5b9f8cd3 3323 iwl_post_associate(priv);
b481de9c 3324
b481de9c
ZY		 3325
3326 return 0;
3327}
3328
b481de9c
ZY		 3329/*****************************************************************************
3330 *
3331 * sysfs attributes
3332 *
3333 *****************************************************************************/
3334
0a6857e7 3335#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 3336
3337/*
3338 * The following adds a new attribute to the sysfs representation
c3a739fa 3339 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
b481de9c
ZY		 3340 * used for controlling the debug level.
3341 *
3342 * See the level definitions in iwl for details.
3343 */
3344
8cf769c6
EK		 3345static ssize_t show_debug_level(struct device *d,
3346 struct device_attribute *attr, char *buf)
b481de9c 3347{
8cf769c6
EK		 3348 struct iwl_priv *priv = d->driver_data;
3349
3350 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3351}
8cf769c6
EK		 3352static ssize_t store_debug_level(struct device *d,
3353 struct device_attribute *attr,
b481de9c
ZY		 3354 const char *buf, size_t count)
3355{
8cf769c6 3356 struct iwl_priv *priv = d->driver_data;
9257746f
TW		 3357 unsigned long val;
3358 int ret;
b481de9c 3359
9257746f
TW		 3360 ret = strict_strtoul(buf, 0, &val);
3361 if (ret)
b481de9c
ZY		 3362 printk(KERN_INFO DRV_NAME
3363 ": %s is not in hex or decimal form.\n", buf);
3364 else
8cf769c6 3365 priv->debug_level = val;
b481de9c
ZY		 3366
3367 return strnlen(buf, count);
3368}
3369
8cf769c6
EK		 3370static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3371 show_debug_level, store_debug_level);
3372
b481de9c 3373
0a6857e7 3374#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3375
b481de9c 3376
bc6f59bc
TW		 3377static ssize_t show_version(struct device *d,
3378 struct device_attribute *attr, char *buf)
3379{
3380 struct iwl_priv *priv = d->driver_data;
885ba202 3381 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW		 3382 ssize_t pos = 0;
3383 u16 eeprom_ver;
bc6f59bc
TW		 3384
3385 if (palive->is_valid)
f236a265
TW		 3386 pos += sprintf(buf + pos,
3387 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3388 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW		 3389 palive->ucode_major, palive->ucode_minor,
3390 palive->sw_rev[0], palive->sw_rev[1],
3391 palive->ver_type, palive->ver_subtype);
bc6f59bc 3392 else
f236a265
TW		 3393 pos += sprintf(buf + pos, "fw not loaded\n");
3394
3395 if (priv->eeprom) {
3396 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3397 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3398 eeprom_ver);
3399 } else {
3400 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3401 }
3402
3403 return pos;
bc6f59bc
TW		 3404}
3405
3406static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3407
b481de9c
ZY		 3408static ssize_t show_temperature(struct device *d,
3409 struct device_attribute *attr, char *buf)
3410{
c79dd5b5 3411 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3412
fee1247a 3413 if (!iwl_is_alive(priv))
b481de9c
ZY		 3414 return -EAGAIN;
3415
91dbc5bd 3416 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY		 3417}
3418
3419static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3420
b481de9c
ZY		 3421static ssize_t show_tx_power(struct device *d,
3422 struct device_attribute *attr, char *buf)
3423{
c79dd5b5 3424 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
91f39e8e
JS		 3425
3426 if (!iwl_is_ready_rf(priv))
3427 return sprintf(buf, "off\n");
3428 else
3429 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY		 3430}
3431
3432static ssize_t store_tx_power(struct device *d,
3433 struct device_attribute *attr,
3434 const char *buf, size_t count)
3435{
c79dd5b5 3436 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3437 unsigned long val;
3438 int ret;
b481de9c 3439
9257746f
TW		 3440 ret = strict_strtoul(buf, 10, &val);
3441 if (ret)
b481de9c
ZY		 3442 printk(KERN_INFO DRV_NAME
3443 ": %s is not in decimal form.\n", buf);
3444 else
630fe9b6 3445 iwl_set_tx_power(priv, val, false);
b481de9c
ZY		 3446
3447 return count;
3448}
3449
3450static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3451
3452static ssize_t show_flags(struct device *d,
3453 struct device_attribute *attr, char *buf)
3454{
c79dd5b5 3455 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3456
3457 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3458}
3459
3460static ssize_t store_flags(struct device *d,
3461 struct device_attribute *attr,
3462 const char *buf, size_t count)
3463{
c79dd5b5 3464 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3465 unsigned long val;
3466 u32 flags;
3467 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3468 if (ret)
9257746f
TW		 3469 return ret;
3470 flags = (u32)val;
b481de9c
ZY		 3471
3472 mutex_lock(&priv->mutex);
3473 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3474 /* Cancel any currently running scans... */
2a421b91 3475 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 3476 IWL_WARNING("Could not cancel scan.\n");
3477 else {
9257746f 3478 IWL_DEBUG_INFO("Commit rxon.flags = 0x%04X\n", flags);
b481de9c 3479 priv->staging_rxon.flags = cpu_to_le32(flags);
5b9f8cd3 3480 iwl_commit_rxon(priv);
b481de9c
ZY		 3481 }
3482 }
3483 mutex_unlock(&priv->mutex);
3484
3485 return count;
3486}
3487
3488static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3489
3490static ssize_t show_filter_flags(struct device *d,
3491 struct device_attribute *attr, char *buf)
3492{
c79dd5b5 3493 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 3494
3495 return sprintf(buf, "0x%04X\n",
3496 le32_to_cpu(priv->active_rxon.filter_flags));
3497}
3498
3499static ssize_t store_filter_flags(struct device *d,
3500 struct device_attribute *attr,
3501 const char *buf, size_t count)
3502{
c79dd5b5 3503 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
9257746f
TW		 3504 unsigned long val;
3505 u32 filter_flags;
3506 int ret = strict_strtoul(buf, 0, &val);
926f0b2e 3507 if (ret)
9257746f
TW		 3508 return ret;
3509 filter_flags = (u32)val;
b481de9c
ZY		 3510
3511 mutex_lock(&priv->mutex);
3512 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3513 /* Cancel any currently running scans... */
2a421b91 3514 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 3515 IWL_WARNING("Could not cancel scan.\n");
3516 else {
3517 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3518 "0x%04X\n", filter_flags);
3519 priv->staging_rxon.filter_flags =
3520 cpu_to_le32(filter_flags);
5b9f8cd3 3521 iwl_commit_rxon(priv);
b481de9c
ZY		 3522 }
3523 }
3524 mutex_unlock(&priv->mutex);
3525
3526 return count;
3527}
3528
3529static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3530 store_filter_flags);
3531
b481de9c
ZY		 3532static ssize_t store_retry_rate(struct device *d,
3533 struct device_attribute *attr,
3534 const char *buf, size_t count)
3535{
c79dd5b5 3536 struct iwl_priv *priv = dev_get_drvdata(d);
9257746f
TW		 3537 long val;
3538 int ret = strict_strtol(buf, 10, &val);
3539 if (!ret)
3540 return ret;
b481de9c 3541
9257746f 3542 priv->retry_rate = (val > 0) ? val : 1;
b481de9c
ZY		 3543
3544 return count;
3545}
3546
3547static ssize_t show_retry_rate(struct device *d,
3548 struct device_attribute *attr, char *buf)
3549{
c79dd5b5 3550 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 3551 return sprintf(buf, "%d", priv->retry_rate);
3552}
3553
3554static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3555 store_retry_rate);
3556
3557static ssize_t store_power_level(struct device *d,
3558 struct device_attribute *attr,
3559 const char *buf, size_t count)
3560{
c79dd5b5 3561 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6 3562 int ret;
9257746f
TW		 3563 unsigned long mode;
3564
b481de9c 3565
b481de9c
ZY		 3566 mutex_lock(&priv->mutex);
3567
fee1247a 3568 if (!iwl_is_ready(priv)) {
298df1f6 3569 ret = -EAGAIN;
b481de9c
ZY		 3570 goto out;
3571 }
3572
9257746f 3573 ret = strict_strtoul(buf, 10, &mode);
926f0b2e 3574 if (ret)
9257746f
TW		 3575 goto out;
3576
298df1f6
EK		 3577 ret = iwl_power_set_user_mode(priv, mode);
3578 if (ret) {
5da4b55f
MA		 3579 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3580 goto out;
b481de9c 3581 }
298df1f6 3582 ret = count;
b481de9c
ZY		 3583
3584 out:
3585 mutex_unlock(&priv->mutex);
298df1f6 3586 return ret;
b481de9c
ZY		 3587}
3588
b481de9c
ZY		 3589static ssize_t show_power_level(struct device *d,
3590 struct device_attribute *attr, char *buf)
3591{
c79dd5b5 3592 struct iwl_priv *priv = dev_get_drvdata(d);
298df1f6
EK		 3593 int mode = priv->power_data.user_power_setting;
3594 int system = priv->power_data.system_power_setting;
5da4b55f 3595 int level = priv->power_data.power_mode;
b481de9c
ZY		 3596 char *p = buf;
3597
298df1f6
EK		 3598 switch (system) {
3599 case IWL_POWER_SYS_AUTO:
3600 p += sprintf(p, "SYSTEM:auto");
b481de9c 3601 break;
298df1f6
EK		 3602 case IWL_POWER_SYS_AC:
3603 p += sprintf(p, "SYSTEM:ac");
3604 break;
3605 case IWL_POWER_SYS_BATTERY:
3606 p += sprintf(p, "SYSTEM:battery");
b481de9c 3607 break;
b481de9c 3608 }
298df1f6 3609
c3056065
AK		 3610 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3611 "fixed" : "auto");
298df1f6
EK		 3612 p += sprintf(p, "\tINDEX:%d", level);
3613 p += sprintf(p, "\n");
3ac7f146 3614 return p - buf + 1;
b481de9c
ZY		 3615}
3616
3617static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3618 store_power_level);
3619
b481de9c
ZY		 3620
3621static ssize_t show_statistics(struct device *d,
3622 struct device_attribute *attr, char *buf)
3623{
c79dd5b5 3624 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3625 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c 3626 u32 len = 0, ofs = 0;
3ac7f146 3627 u8 *data = (u8 *)&priv->statistics;
b481de9c
ZY		 3628 int rc = 0;
3629
fee1247a 3630 if (!iwl_is_alive(priv))
b481de9c
ZY		 3631 return -EAGAIN;
3632
3633 mutex_lock(&priv->mutex);
49ea8596 3634 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 3635 mutex_unlock(&priv->mutex);
3636
3637 if (rc) {
3638 len = sprintf(buf,
3639 "Error sending statistics request: 0x%08X\n", rc);
3640 return len;
3641 }
3642
3643 while (size && (PAGE_SIZE - len)) {
3644 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3645 PAGE_SIZE - len, 1);
3646 len = strlen(buf);
3647 if (PAGE_SIZE - len)
3648 buf[len++] = '\n';
3649
3650 ofs += 16;
3651 size -= min(size, 16U);
3652 }
3653
3654 return len;
3655}
3656
3657static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3658
b481de9c
ZY		 3659static ssize_t show_status(struct device *d,
3660 struct device_attribute *attr, char *buf)
3661{
c79dd5b5 3662 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 3663 if (!iwl_is_alive(priv))
b481de9c
ZY		 3664 return -EAGAIN;
3665 return sprintf(buf, "0x%08x\n", (int)priv->status);
3666}
3667
3668static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3669
b481de9c
ZY		 3670/*****************************************************************************
3671 *
3672 * driver setup and teardown
3673 *
3674 *****************************************************************************/
3675
4e39317d 3676static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 3677{
3678 priv->workqueue = create_workqueue(DRV_NAME);
3679
3680 init_waitqueue_head(&priv->wait_command_queue);
3681
5b9f8cd3
EG		 3682 INIT_WORK(&priv->up, iwl_bg_up);
3683 INIT_WORK(&priv->restart, iwl_bg_restart);
3684 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3685 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
3686 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
16e727e8 3687 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4a4a9e81
TW		 3688 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3689 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91 3690
2a421b91 3691 iwl_setup_scan_deferred_work(priv);
c90a74ba 3692 iwl_setup_power_deferred_work(priv);
bb8c093b 3693
4e39317d
EG		 3694 if (priv->cfg->ops->lib->setup_deferred_work)
3695 priv->cfg->ops->lib->setup_deferred_work(priv);
3696
3697 init_timer(&priv->statistics_periodic);
3698 priv->statistics_periodic.data = (unsigned long)priv;
5b9f8cd3 3699 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
b481de9c
ZY		 3700
3701 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
5b9f8cd3 3702 iwl_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 3703}
3704
4e39317d 3705static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3706{
4e39317d
EG		 3707 if (priv->cfg->ops->lib->cancel_deferred_work)
3708 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 3709
3ae6a054 3710 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c 3711 cancel_delayed_work(&priv->scan_check);
c90a74ba 3712 cancel_delayed_work_sync(&priv->set_power_save);
b481de9c 3713 cancel_delayed_work(&priv->alive_start);
b481de9c 3714 cancel_work_sync(&priv->beacon_update);
4e39317d 3715 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY		 3716}
3717
5b9f8cd3 3718static struct attribute *iwl_sysfs_entries[] = {
b481de9c
ZY		 3719 &dev_attr_flags.attr,
3720 &dev_attr_filter_flags.attr,
b481de9c
ZY		 3721 &dev_attr_power_level.attr,
3722 &dev_attr_retry_rate.attr,
b481de9c
ZY		 3723 &dev_attr_statistics.attr,
3724 &dev_attr_status.attr,
3725 &dev_attr_temperature.attr,
b481de9c 3726 &dev_attr_tx_power.attr,
8cf769c6
EK		 3727#ifdef CONFIG_IWLWIFI_DEBUG
3728 &dev_attr_debug_level.attr,
3729#endif
bc6f59bc 3730 &dev_attr_version.attr,
b481de9c
ZY		 3731
3732 NULL
3733};
3734
5b9f8cd3 3735static struct attribute_group iwl_attribute_group = {
b481de9c 3736 .name = NULL, /* put in device directory */
5b9f8cd3 3737 .attrs = iwl_sysfs_entries,
b481de9c
ZY		 3738};
3739
5b9f8cd3
EG		 3740static struct ieee80211_ops iwl_hw_ops = {
3741 .tx = iwl_mac_tx,
3742 .start = iwl_mac_start,
3743 .stop = iwl_mac_stop,
3744 .add_interface = iwl_mac_add_interface,
3745 .remove_interface = iwl_mac_remove_interface,
3746 .config = iwl_mac_config,
3747 .config_interface = iwl_mac_config_interface,
3748 .configure_filter = iwl_configure_filter,
3749 .set_key = iwl_mac_set_key,
3750 .update_tkip_key = iwl_mac_update_tkip_key,
3751 .get_stats = iwl_mac_get_stats,
3752 .get_tx_stats = iwl_mac_get_tx_stats,
3753 .conf_tx = iwl_mac_conf_tx,
3754 .reset_tsf = iwl_mac_reset_tsf,
3755 .bss_info_changed = iwl_bss_info_changed,
3756 .ampdu_action = iwl_mac_ampdu_action,
cb43dc25 3757 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY		 3758};
3759
5b9f8cd3 3760static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 3761{
3762 int err = 0;
c79dd5b5 3763 struct iwl_priv *priv;
b481de9c 3764 struct ieee80211_hw *hw;
82b9a121 3765 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 3766 unsigned long flags;
b481de9c 3767
316c30d9
AK		 3768 /************************
3769 * 1. Allocating HW data
3770 ************************/
3771
6440adb5
CB		 3772 /* Disabling hardware scan means that mac80211 will perform scans
3773 * "the hard way", rather than using device's scan. */
1ea87396 3774 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK		 3775 if (cfg->mod_params->debug & IWL_DL_INFO)
3776 dev_printk(KERN_DEBUG, &(pdev->dev),
3777 "Disabling hw_scan\n");
5b9f8cd3 3778 iwl_hw_ops.hw_scan = NULL;
b481de9c
ZY		 3779 }
3780
5b9f8cd3 3781 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
1d0a082d 3782 if (!hw) {
b481de9c
ZY		 3783 err = -ENOMEM;
3784 goto out;
3785 }
1d0a082d
AK		 3786 priv = hw->priv;
3787 /* At this point both hw and priv are allocated. */
3788
b481de9c
ZY		 3789 SET_IEEE80211_DEV(hw, &pdev->dev);
3790
3791 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 3792 priv->cfg = cfg;
b481de9c 3793 priv->pci_dev = pdev;
316c30d9 3794
0a6857e7 3795#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 3796 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 3797 atomic_set(&priv->restrict_refcnt, 0);
3798#endif
b481de9c 3799
316c30d9
AK		 3800 /**************************
3801 * 2. Initializing PCI bus
3802 **************************/
3803 if (pci_enable_device(pdev)) {
3804 err = -ENODEV;
3805 goto out_ieee80211_free_hw;
3806 }
3807
3808 pci_set_master(pdev);
3809
093d874c 3810 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
316c30d9 3811 if (!err)
093d874c 3812 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
cc2a8ea8 3813 if (err) {
093d874c 3814 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3815 if (!err)
093d874c 3816 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
cc2a8ea8 3817 /* both attempts failed: */
316c30d9 3818 if (err) {
cc2a8ea8
RR		 3819 printk(KERN_WARNING "%s: No suitable DMA available.\n",
3820 DRV_NAME);
316c30d9 3821 goto out_pci_disable_device;
cc2a8ea8 3822 }
316c30d9
AK		 3823 }
3824
3825 err = pci_request_regions(pdev, DRV_NAME);
3826 if (err)
3827 goto out_pci_disable_device;
3828
3829 pci_set_drvdata(pdev, priv);
3830
316c30d9
AK		 3831
3832 /***********************
3833 * 3. Read REV register
3834 ***********************/
3835 priv->hw_base = pci_iomap(pdev, 0, 0);
3836 if (!priv->hw_base) {
3837 err = -ENODEV;
3838 goto out_pci_release_regions;
3839 }
3840
3841 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
3842 (unsigned long long) pci_resource_len(pdev, 0));
3843 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
3844
b661c819 3845 iwl_hw_detect(priv);
316c30d9 3846 printk(KERN_INFO DRV_NAME
b661c819
TW		 3847 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3848 priv->cfg->name, priv->hw_rev);
316c30d9 3849
e7b63581
TW		 3850 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3851 * PCI Tx retries from interfering with C3 CPU state */
3852 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3853
91238714
TW		 3854 /* amp init */
3855 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 3856 if (err < 0) {
91238714 3857 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK		 3858 goto out_iounmap;
3859 }
91238714
TW		 3860 /*****************
3861 * 4. Read EEPROM
3862 *****************/
316c30d9
AK		 3863 /* Read the EEPROM */
3864 err = iwl_eeprom_init(priv);
3865 if (err) {
3866 IWL_ERROR("Unable to init EEPROM\n");
3867 goto out_iounmap;
3868 }
8614f360
TW		 3869 err = iwl_eeprom_check_version(priv);
3870 if (err)
3871 goto out_iounmap;
3872
02883017 3873 /* extract MAC Address */
316c30d9 3874 iwl_eeprom_get_mac(priv, priv->mac_addr);
e174961c 3875 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
316c30d9
AK		 3876 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3877
3878 /************************
3879 * 5. Setup HW constants
3880 ************************/
da154e30 3881 if (iwl_set_hw_params(priv)) {
5425e490 3882 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 3883 goto out_free_eeprom;
316c30d9
AK		 3884 }
3885
3886 /*******************
6ba87956 3887 * 6. Setup priv
316c30d9 3888 *******************/
b481de9c 3889
6ba87956 3890 err = iwl_init_drv(priv);
bf85ea4f 3891 if (err)
399f4900 3892 goto out_free_eeprom;
bf85ea4f 3893 /* At this point both hw and priv are initialized. */
316c30d9
AK		 3894
3895 /**********************************
3896 * 7. Initialize module parameters
3897 **********************************/
3898
3899 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 3900 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 3901 set_bit(STATUS_RF_KILL_SW, &priv->status);
3902 IWL_DEBUG_INFO("Radio disabled.\n");
3903 }
3904
316c30d9
AK		 3905 /********************
3906 * 8. Setup services
3907 ********************/
0359facc 3908 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3909 iwl_disable_interrupts(priv);
0359facc 3910 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9 3911
5b9f8cd3 3912 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
316c30d9
AK		 3913 if (err) {
3914 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 3915 goto out_uninit_drv;
316c30d9
AK		 3916 }
3917
316c30d9 3918
4e39317d 3919 iwl_setup_deferred_work(priv);
653fa4a0 3920 iwl_setup_rx_handlers(priv);
316c30d9
AK		 3921
3922 /********************
3923 * 9. Conclude
3924 ********************/
5a66926a
ZY		 3925 pci_save_state(pdev);
3926 pci_disable_device(pdev);
b481de9c 3927
6ba87956
TW		 3928 /**********************************
3929 * 10. Setup and register mac80211
3930 **********************************/
3931
3932 err = iwl_setup_mac(priv);
3933 if (err)
3934 goto out_remove_sysfs;
3935
3936 err = iwl_dbgfs_register(priv, DRV_NAME);
3937 if (err)
3938 IWL_ERROR("failed to create debugfs files\n");
3939
58d0f361
EG		 3940 err = iwl_rfkill_init(priv);
3941 if (err)
3942 IWL_ERROR("Unable to initialize RFKILL system. "
3943 "Ignoring error: %d\n", err);
3944 iwl_power_initialize(priv);
b481de9c
ZY		 3945 return 0;
3946
316c30d9 3947 out_remove_sysfs:
5b9f8cd3 3948 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
6ba87956
TW		 3949 out_uninit_drv:
3950 iwl_uninit_drv(priv);
073d3f5f
TW		 3951 out_free_eeprom:
3952 iwl_eeprom_free(priv);
b481de9c
ZY		 3953 out_iounmap:
3954 pci_iounmap(pdev, priv->hw_base);
3955 out_pci_release_regions:
3956 pci_release_regions(pdev);
316c30d9 3957 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 3958 out_pci_disable_device:
3959 pci_disable_device(pdev);
b481de9c
ZY		 3960 out_ieee80211_free_hw:
3961 ieee80211_free_hw(priv->hw);
3962 out:
3963 return err;
3964}
3965
5b9f8cd3 3966static void __devexit iwl_pci_remove(struct pci_dev *pdev)
b481de9c 3967{
c79dd5b5 3968 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 3969 unsigned long flags;
b481de9c
ZY		 3970
3971 if (!priv)
3972 return;
3973
3974 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
3975
67249625 3976 iwl_dbgfs_unregister(priv);
5b9f8cd3 3977 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
67249625 3978
5b9f8cd3
EG		 3979 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3980 * to be called and iwl_down since we are removing the device
0b124c31
GG		 3981 * we need to set STATUS_EXIT_PENDING bit.
3982 */
3983 set_bit(STATUS_EXIT_PENDING, &priv->status);
c4f55232
RR		 3984 if (priv->mac80211_registered) {
3985 ieee80211_unregister_hw(priv->hw);
3986 priv->mac80211_registered = 0;
0b124c31 3987 } else {
5b9f8cd3 3988 iwl_down(priv);
c4f55232
RR		 3989 }
3990
0359facc
MA		 3991 /* make sure we flush any pending irq or
3992 * tasklet for the driver
3993 */
3994 spin_lock_irqsave(&priv->lock, flags);
5b9f8cd3 3995 iwl_disable_interrupts(priv);
0359facc
MA		 3996 spin_unlock_irqrestore(&priv->lock, flags);
3997
3998 iwl_synchronize_irq(priv);
3999
58d0f361 4000 iwl_rfkill_unregister(priv);
5b9f8cd3 4001 iwl_dealloc_ucode_pci(priv);
b481de9c
ZY		 4002
4003 if (priv->rxq.bd)
a55360e4 4004 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4005 iwl_hw_txq_ctx_free(priv);
b481de9c 4006
37deb2a0 4007 iwl_clear_stations_table(priv);
073d3f5f 4008 iwl_eeprom_free(priv);
b481de9c 4009
b481de9c 4010
948c171c
MA		 4011 /*netif_stop_queue(dev); */
4012 flush_workqueue(priv->workqueue);
4013
5b9f8cd3 4014 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
b481de9c
ZY		 4015 * priv->workqueue... so we can't take down the workqueue
4016 * until now... */
4017 destroy_workqueue(priv->workqueue);
4018 priv->workqueue = NULL;
4019
b481de9c
ZY		 4020 pci_iounmap(pdev, priv->hw_base);
4021 pci_release_regions(pdev);
4022 pci_disable_device(pdev);
4023 pci_set_drvdata(pdev, NULL);
4024
6ba87956 4025 iwl_uninit_drv(priv);
b481de9c
ZY		 4026
4027 if (priv->ibss_beacon)
4028 dev_kfree_skb(priv->ibss_beacon);
4029
4030 ieee80211_free_hw(priv->hw);
4031}
4032
4033#ifdef CONFIG_PM
4034
5b9f8cd3 4035static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4036{
c79dd5b5 4037 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4038
e655b9f0
ZY		 4039 if (priv->is_open) {
4040 set_bit(STATUS_IN_SUSPEND, &priv->status);
5b9f8cd3 4041 iwl_mac_stop(priv->hw);
e655b9f0
ZY		 4042 priv->is_open = 1;
4043 }
b481de9c 4044
89c581b3
RC		 4045 /* pci driver assumes state will be saved in this function.
4046 * pci state is saved and device disabled when interface is
4047 * stopped, so at this time pci device will always be disabled -
4048 * whether interface was started or not. saving pci state now will
4049 * cause saved state be that of a disabled device, which will cause
4050 * problems during resume in that we will end up with a disabled device.
4051 *
4052 * indicate that the current saved state (from when interface was
4053 * stopped) is valid. if interface was never up at time of suspend
4054 * then the saved state will still be valid as it was saved during
4055 * .probe. */
4056 pdev->state_saved = true;
4057
b481de9c
ZY		 4058 pci_set_power_state(pdev, PCI_D3hot);
4059
b481de9c
ZY		 4060 return 0;
4061}
4062
5b9f8cd3 4063static int iwl_pci_resume(struct pci_dev *pdev)
b481de9c 4064{
c79dd5b5 4065 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4066
b481de9c 4067 pci_set_power_state(pdev, PCI_D0);
b481de9c 4068
e655b9f0 4069 if (priv->is_open)
5b9f8cd3 4070 iwl_mac_start(priv->hw);
b481de9c 4071
e655b9f0 4072 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 4073 return 0;
4074}
4075
4076#endif /* CONFIG_PM */
4077
4078/*****************************************************************************
4079 *
4080 * driver and module entry point
4081 *
4082 *****************************************************************************/
4083
fed9017e
RR		 4084/* Hardware specific file defines the PCI IDs table for that hardware module */
4085static struct pci_device_id iwl_hw_card_ids[] = {
4fc22b21 4086#ifdef CONFIG_IWL4965
fed9017e
RR		 4087 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4088 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4fc22b21 4089#endif /* CONFIG_IWL4965 */
5a6a256e 4090#ifdef CONFIG_IWL5000
47408639
EK		 4091 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
4092 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
4093 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
4094 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
4095 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
4096 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
5a6a256e 4097 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
47408639
EK		 4098 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4099 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
4100 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
e96a8495
TW		 4101/* 5350 WiFi/WiMax */
4102 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
4103 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
4104 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
7100e924
TW		 4105/* 5150 Wifi/WiMax */
4106 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
4107 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
5a6a256e 4108#endif /* CONFIG_IWL5000 */
7100e924 4109
fed9017e
RR		 4110 {0}
4111};
4112MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4113
4114static struct pci_driver iwl_driver = {
b481de9c 4115 .name = DRV_NAME,
fed9017e 4116 .id_table = iwl_hw_card_ids,
5b9f8cd3
EG		 4117 .probe = iwl_pci_probe,
4118 .remove = __devexit_p(iwl_pci_remove),
b481de9c 4119#ifdef CONFIG_PM
5b9f8cd3
EG		 4120 .suspend = iwl_pci_suspend,
4121 .resume = iwl_pci_resume,
b481de9c
ZY		 4122#endif
4123};
4124
5b9f8cd3 4125static int __init iwl_init(void)
b481de9c
ZY		 4126{
4127
4128 int ret;
4129 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4130 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2 4131
e227ceac 4132 ret = iwlagn_rate_control_register();
897e1cf2
RC		 4133 if (ret) {
4134 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4135 return ret;
4136 }
4137
fed9017e 4138 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY		 4139 if (ret) {
4140 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4141 goto error_register;
b481de9c 4142 }
b481de9c
ZY		 4143
4144 return ret;
897e1cf2 4145
897e1cf2 4146error_register:
e227ceac 4147 iwlagn_rate_control_unregister();
897e1cf2 4148 return ret;
b481de9c
ZY		 4149}
4150
5b9f8cd3 4151static void __exit iwl_exit(void)
b481de9c 4152{
fed9017e 4153 pci_unregister_driver(&iwl_driver);
e227ceac 4154 iwlagn_rate_control_unregister();
b481de9c
ZY		 4155}
4156
5b9f8cd3
EG		 4157module_exit(iwl_exit);
4158module_init(iwl_init);
Linux kernel - Deliverables
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