iwlagn: radio sensor offset in le16 format
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-commands.h
CommitLineData
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
901069c7 8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
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9 *
10 * This program is free software; you can redistribute it and/or modify
01ebd063 11 * it under the terms of version 2 of the GNU General Public License as
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12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
759ef89f 28 * Intel Linux Wireless <ilw@linux.intel.com>
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29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
901069c7 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
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34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
fcd427bb 63/*
5a36ba0e 64 * Please use this file (iwl-commands.h) only for uCode API definitions.
767d055d 65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
3e0d4cb1 66 * Please use iwl-dev.h for driver implementation definitions.
fcd427bb 67 */
b481de9c 68
6a63578d
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69#ifndef __iwl_commands_h__
70#define __iwl_commands_h__
b481de9c 71
a3139c59
SO
72struct iwl_priv;
73
c02b3acd
CR
74/* uCode version contains 4 values: Major/Minor/API/Serial */
75#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
76#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
77#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
78#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
79
4c897253
TW
80
81/* Tx rates */
82#define IWL_CCK_RATES 4
83#define IWL_OFDM_RATES 8
84#define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES)
85
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86enum {
87 REPLY_ALIVE = 0x1,
88 REPLY_ERROR = 0x2,
89
90 /* RXON and QOS commands */
91 REPLY_RXON = 0x10,
92 REPLY_RXON_ASSOC = 0x11,
93 REPLY_QOS_PARAM = 0x13,
94 REPLY_RXON_TIMING = 0x14,
95
96 /* Multi-Station support */
97 REPLY_ADD_STA = 0x18,
fc66be2a 98 REPLY_REMOVE_STA = 0x19,
b481de9c 99 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
947279ee 100 REPLY_TXFIFO_FLUSH = 0x1e,
b481de9c 101
0a0bed1d
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102 /* Security */
103 REPLY_WEPKEY = 0x20,
104
b481de9c 105 /* RX, TX, LEDs */
b481de9c 106 REPLY_TX = 0x1c,
b481de9c 107 REPLY_LEDS_CMD = 0x48,
4c8d1913 108 REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */
b481de9c 109
9636e583 110 /* WiMAX coexistence */
d23000cd 111 COEX_PRIORITY_TABLE_CMD = 0x5a, /* for 5000 series and up */
9636e583
RR
112 COEX_MEDIUM_NOTIFICATION = 0x5b,
113 COEX_EVENT_CMD = 0x5c,
114
be5d56ed 115 /* Calibration */
1a5c3d61 116 TEMPERATURE_NOTIFICATION = 0x62,
be5d56ed
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117 CALIBRATION_CFG_CMD = 0x65,
118 CALIBRATION_RES_NOTIFICATION = 0x66,
119 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
120
b481de9c 121 /* 802.11h related */
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122 REPLY_QUIET_CMD = 0x71, /* not used */
123 REPLY_CHANNEL_SWITCH = 0x72,
124 CHANNEL_SWITCH_NOTIFICATION = 0x73,
125 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
126 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
127
128 /* Power Management */
129 POWER_TABLE_CMD = 0x77,
130 PM_SLEEP_NOTIFICATION = 0x7A,
131 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
132
133 /* Scan commands and notifications */
134 REPLY_SCAN_CMD = 0x80,
135 REPLY_SCAN_ABORT_CMD = 0x81,
136 SCAN_START_NOTIFICATION = 0x82,
137 SCAN_RESULTS_NOTIFICATION = 0x83,
138 SCAN_COMPLETE_NOTIFICATION = 0x84,
139
140 /* IBSS/AP commands */
141 BEACON_NOTIFICATION = 0x90,
142 REPLY_TX_BEACON = 0x91,
143 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
144
145 /* Miscellaneous commands */
76a2407a 146 REPLY_TX_POWER_DBM_CMD = 0x95,
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147 QUIET_NOTIFICATION = 0x96, /* not used */
148 REPLY_TX_PWR_TABLE_CMD = 0x97,
76a2407a 149 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
2f748dec 150 TX_ANT_CONFIGURATION_CMD = 0x98,
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151 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
152
a96a27f9 153 /* Bluetooth device coexistence config command */
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154 REPLY_BT_CONFIG = 0x9b,
155
80cc0c38 156 /* Statistics */
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157 REPLY_STATISTICS_CMD = 0x9c,
158 STATISTICS_NOTIFICATION = 0x9d,
159
160 /* RF-KILL commands and notifications */
161 REPLY_CARD_STATE_CMD = 0xa0,
162 CARD_STATE_NOTIFICATION = 0xa1,
163
164 /* Missed beacons notification */
165 MISSED_BEACONS_NOTIFICATION = 0xa2,
166
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167 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
168 SENSITIVITY_CMD = 0xa8,
169 REPLY_PHY_CALIBRATION_CMD = 0xb0,
170 REPLY_RX_PHY_CMD = 0xc0,
171 REPLY_RX_MPDU_CMD = 0xc1,
857485c0 172 REPLY_RX = 0xc3,
b481de9c 173 REPLY_COMPRESSED_BA = 0xc5,
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174
175 /* BT Coex */
176 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
177 REPLY_BT_COEX_PROT_ENV = 0xcd,
178 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
179
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180 /* PAN commands */
181 REPLY_WIPAN_PARAMS = 0xb2,
182 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
183 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
184 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
185 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
186 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
187 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
188 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
311dce71 189 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
946ba30d 190
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191 REPLY_MAX = 0xff
192};
193
194/******************************************************************************
195 * (0)
abceddb4 196 * Commonly used structures and definitions:
80cc0c38 197 * Command header, rate_n_flags, txpower
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198 *
199 *****************************************************************************/
200
857485c0 201/* iwl_cmd_header flags value */
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202#define IWL_CMD_FAILED_MSK 0x40
203
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204#define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f)
205#define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8)
206#define SEQ_TO_INDEX(s) ((s) & 0xff)
207#define INDEX_TO_SEQ(i) ((i) & 0xff)
51e9bf5d 208#define SEQ_RX_FRAME cpu_to_le16(0x8000)
9734cb23 209
075416cd 210/**
857485c0 211 * struct iwl_cmd_header
075416cd
BC
212 *
213 * This header format appears in the beginning of each command sent from the
214 * driver, and each response/notification received from uCode.
215 */
857485c0 216struct iwl_cmd_header {
075416cd 217 u8 cmd; /* Command ID: REPLY_RXON, etc. */
9734cb23 218 u8 flags; /* 0:5 reserved, 6 abort, 7 internal */
075416cd 219 /*
a96a27f9 220 * The driver sets up the sequence number to values of its choosing.
075416cd
BC
221 * uCode does not use this value, but passes it back to the driver
222 * when sending the response to each driver-originated command, so
223 * the driver can match the response to the command. Since the values
224 * don't get used by uCode, the driver may set up an arbitrary format.
b481de9c 225 *
075416cd
BC
226 * There is one exception: uCode sets bit 15 when it originates
227 * the response/notification, i.e. when the response/notification
228 * is not a direct response to a command sent by the driver. For
3240cab3 229 * example, uCode issues REPLY_RX when it sends a received frame
075416cd 230 * to the driver; it is not a direct response to any driver command.
b481de9c 231 *
075416cd
BC
232 * The Linux driver uses the following format:
233 *
9734cb23
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234 * 0:7 tfd index - position within TX queue
235 * 8:12 TX queue id
4ce7cc2b 236 * 13:14 reserved
9734cb23 237 * 15 unsolicited RX or uCode-originated notification
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238 */
239 __le16 sequence;
240
075416cd 241 /* command or response/notification data follows immediately */
b481de9c 242 u8 data[0];
ba2d3587 243} __packed;
b481de9c 244
3d24a9f7 245
abceddb4 246/**
5c5aa3f1 247 * iwlagn rate_n_flags bit fields
abceddb4 248 *
5c5aa3f1 249 * rate_n_flags format is used in following iwlagn commands:
857485c0 250 * REPLY_RX (response only)
5c5aa3f1 251 * REPLY_RX_MPDU (response only)
abceddb4
BC
252 * REPLY_TX (both command and response)
253 * REPLY_TX_LINK_QUALITY_CMD
254 *
255 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
256 * 2-0: 0) 6 Mbps
257 * 1) 12 Mbps
258 * 2) 18 Mbps
259 * 3) 24 Mbps
260 * 4) 36 Mbps
261 * 5) 48 Mbps
262 * 6) 54 Mbps
263 * 7) 60 Mbps
264 *
5c5aa3f1 265 * 4-3: 0) Single stream (SISO)
abceddb4 266 * 1) Dual stream (MIMO)
5c5aa3f1 267 * 2) Triple stream (MIMO)
abceddb4 268 *
7aafef1c 269 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
abceddb4
BC
270 *
271 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
272 * 3-0: 0xD) 6 Mbps
273 * 0xF) 9 Mbps
274 * 0x5) 12 Mbps
275 * 0x7) 18 Mbps
276 * 0x9) 24 Mbps
277 * 0xB) 36 Mbps
278 * 0x1) 48 Mbps
279 * 0x3) 54 Mbps
280 *
281 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
10617879 282 * 6-0: 10) 1 Mbps
abceddb4
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283 * 20) 2 Mbps
284 * 55) 5.5 Mbps
285 * 110) 11 Mbps
286 */
287#define RATE_MCS_CODE_MSK 0x7
5c5aa3f1
HD
288#define RATE_MCS_SPATIAL_POS 3
289#define RATE_MCS_SPATIAL_MSK 0x18
abceddb4
BC
290#define RATE_MCS_HT_DUP_POS 5
291#define RATE_MCS_HT_DUP_MSK 0x20
2520546a
DH
292/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
293#define RATE_MCS_RATE_MSK 0xff
abceddb4 294
075416cd 295/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
abceddb4
BC
296#define RATE_MCS_FLAGS_POS 8
297#define RATE_MCS_HT_POS 8
298#define RATE_MCS_HT_MSK 0x100
299
075416cd 300/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
abceddb4
BC
301#define RATE_MCS_CCK_POS 9
302#define RATE_MCS_CCK_MSK 0x200
303
075416cd 304/* Bit 10: (1) Use Green Field preamble */
abceddb4
BC
305#define RATE_MCS_GF_POS 10
306#define RATE_MCS_GF_MSK 0x400
307
7aafef1c
WYG
308/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
309#define RATE_MCS_HT40_POS 11
310#define RATE_MCS_HT40_MSK 0x800
abceddb4 311
7aafef1c 312/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
abceddb4
BC
313#define RATE_MCS_DUP_POS 12
314#define RATE_MCS_DUP_MSK 0x1000
315
075416cd 316/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
abceddb4
BC
317#define RATE_MCS_SGI_POS 13
318#define RATE_MCS_SGI_MSK 0x2000
319
320/**
76eff18b
TW
321 * rate_n_flags Tx antenna masks
322 * 4965 has 2 transmitters
323 * 5100 has 1 transmitter B
324 * 5150 has 1 transmitter A
325 * 5300 has 3 transmitters
326 * 5350 has 3 transmitters
327 * bit14:16
abceddb4 328 */
600c0e11
TW
329#define RATE_MCS_ANT_POS 14
330#define RATE_MCS_ANT_A_MSK 0x04000
331#define RATE_MCS_ANT_B_MSK 0x08000
332#define RATE_MCS_ANT_C_MSK 0x10000
333#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
334#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
76eff18b 335#define RATE_ANT_NUM 3
80cc0c38
BC
336
337#define POWER_TABLE_NUM_ENTRIES 33
338#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
339#define POWER_TABLE_CCK_ENTRY 32
340
e57f1489
WYG
341#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
342#define IWL_PWR_CCK_ENTRIES 2
343
80cc0c38
BC
344/**
345 * struct tx_power_dual_stream
346 *
347 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
348 *
349 * Same format as iwl_tx_power_dual_stream, but __le32
350 */
351struct tx_power_dual_stream {
352 __le32 dw;
ba2d3587 353} __packed;
80cc0c38 354
630fe9b6 355/**
a96a27f9 356 * Command REPLY_TX_POWER_DBM_CMD = 0x98
ab63c68a 357 * struct iwlagn_tx_power_dbm_cmd
630fe9b6 358 */
ab63c68a
WYG
359#define IWLAGN_TX_POWER_AUTO 0x7f
360#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
853554ac 361
ab63c68a 362struct iwlagn_tx_power_dbm_cmd {
630fe9b6
TW
363 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
364 u8 flags;
365 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
366 u8 reserved;
ba2d3587 367} __packed;
80cc0c38 368
2f748dec
WYG
369/**
370 * Command TX_ANT_CONFIGURATION_CMD = 0x98
371 * This command is used to configure valid Tx antenna.
372 * By default uCode concludes the valid antenna according to the radio flavor.
373 * This command enables the driver to override/modify this conclusion.
374 */
375struct iwl_tx_ant_config_cmd {
376 __le32 valid;
ba2d3587 377} __packed;
2f748dec 378
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379/******************************************************************************
380 * (0a)
381 * Alive and Error Commands & Responses:
382 *
383 *****************************************************************************/
384
51e9bf5d 385#define UCODE_VALID_OK cpu_to_le32(0x1)
ca7966c8 386
075416cd
BC
387/**
388 * REPLY_ALIVE = 0x1 (response only, not a command)
389 *
390 * uCode issues this "alive" notification once the runtime image is ready
391 * to receive commands from the driver. This is the *second* "alive"
392 * notification that the driver will receive after rebooting uCode;
393 * this "alive" is indicated by subtype field != 9.
394 *
395 * See comments documenting "BSM" (bootstrap state machine).
396 *
397 * This response includes two pointers to structures within the device's
398 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
399 *
400 * 1) log_event_table_ptr indicates base of the event log. This traces
401 * a 256-entry history of uCode execution within a circular buffer.
402 * Its header format is:
403 *
404 * __le32 log_size; log capacity (in number of entries)
405 * __le32 type; (1) timestamp with each entry, (0) no timestamp
406 * __le32 wraps; # times uCode has wrapped to top of circular buffer
407 * __le32 write_index; next circular buffer entry that uCode would fill
408 *
409 * The header is followed by the circular buffer of log entries. Entries
410 * with timestamps have the following format:
411 *
412 * __le32 event_id; range 0 - 1500
413 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
414 * __le32 data; event_id-specific data value
415 *
416 * Entries without timestamps contain only event_id and data.
417 *
461ef382 418 *
075416cd 419 * 2) error_event_table_ptr indicates base of the error log. This contains
461ef382 420 * information about any uCode error that occurs. For agn, the format
e46f6538 421 * of the error log is defined by struct iwl_error_event_table.
075416cd
BC
422 *
423 * The Linux driver can print both logs to the system log when a uCode error
424 * occurs.
425 */
e46f6538
JB
426
427/*
428 * Note: This structure is read from the device with IO accesses,
429 * and the reading already does the endian conversion. As it is
430 * read with u32-sized accesses, any members with a different size
431 * need to be ordered correctly though!
432 */
433struct iwl_error_event_table {
434 u32 valid; /* (nonzero) valid, (0) log is empty */
435 u32 error_id; /* type of error */
436 u32 pc; /* program counter */
437 u32 blink1; /* branch link */
438 u32 blink2; /* branch link */
439 u32 ilink1; /* interrupt link */
440 u32 ilink2; /* interrupt link */
441 u32 data1; /* error-specific data */
442 u32 data2; /* error-specific data */
443 u32 line; /* source code line of error */
444 u32 bcon_time; /* beacon timer */
445 u32 tsf_low; /* network timestamp function timer */
446 u32 tsf_hi; /* network timestamp function timer */
447 u32 gp1; /* GP1 timer register */
448 u32 gp2; /* GP2 timer register */
449 u32 gp3; /* GP3 timer register */
450 u32 ucode_ver; /* uCode version */
451 u32 hw_ver; /* HW Silicon version */
452 u32 brd_ver; /* HW board version */
453 u32 log_pc; /* log program counter */
454 u32 frame_ptr; /* frame pointer */
455 u32 stack_ptr; /* stack pointer */
456 u32 hcmd; /* last host command header */
457#if 0
458 /* no need to read the remainder, we don't use the values */
459 u32 isr0; /* isr status register LMPM_NIC_ISR0: rxtx_flag */
460 u32 isr1; /* isr status register LMPM_NIC_ISR1: host_flag */
461 u32 isr2; /* isr status register LMPM_NIC_ISR2: enc_flag */
462 u32 isr3; /* isr status register LMPM_NIC_ISR3: time_flag */
463 u32 isr4; /* isr status register LMPM_NIC_ISR4: wico interrupt */
464 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
465 u32 wait_event; /* wait event() caller address */
466 u32 l2p_control; /* L2pControlField */
467 u32 l2p_duration; /* L2pDurationField */
468 u32 l2p_mhvalid; /* L2pMhValidBits */
469 u32 l2p_addr_match; /* L2pAddrMatchStat */
470 u32 lmpm_pmg_sel; /* indicate which clocks are turned on (LMPM_PMG_SEL) */
471 u32 u_timestamp; /* indicate when the date and time of the compilation */
472 u32 flow_handler; /* FH read/write pointers, RX credit */
473#endif
474} __packed;
475
885ba202 476struct iwl_alive_resp {
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477 u8 ucode_minor;
478 u8 ucode_major;
479 __le16 reserved1;
480 u8 sw_rev[8];
481 u8 ver_type;
075416cd 482 u8 ver_subtype; /* not "9" for runtime alive */
b481de9c 483 __le16 reserved2;
075416cd
BC
484 __le32 log_event_table_ptr; /* SRAM address for event log */
485 __le32 error_event_table_ptr; /* SRAM address for error log */
b481de9c
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486 __le32 timestamp;
487 __le32 is_valid;
ba2d3587 488} __packed;
b481de9c 489
b481de9c
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490/*
491 * REPLY_ERROR = 0x2 (response only, not a command)
492 */
885ba202 493struct iwl_error_resp {
b481de9c
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494 __le32 error_type;
495 u8 cmd_id;
496 u8 reserved1;
497 __le16 bad_cmd_seq_num;
b481de9c 498 __le32 error_info;
3195c1f3 499 __le64 timestamp;
ba2d3587 500} __packed;
b481de9c
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501
502/******************************************************************************
503 * (1)
504 * RXON Commands & Responses:
505 *
506 *****************************************************************************/
507
508/*
509 * Rx config defines & structure
510 */
511/* rx_config device types */
512enum {
513 RXON_DEV_TYPE_AP = 1,
514 RXON_DEV_TYPE_ESS = 3,
515 RXON_DEV_TYPE_IBSS = 4,
516 RXON_DEV_TYPE_SNIFFER = 6,
946ba30d
JB
517 RXON_DEV_TYPE_CP = 7,
518 RXON_DEV_TYPE_2STA = 8,
519 RXON_DEV_TYPE_P2P = 9,
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520};
521
14519a0b 522
51e9bf5d 523#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
7b841727 524#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
51e9bf5d 525#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
14519a0b 526#define RXON_RX_CHAIN_VALID_POS (1)
51e9bf5d 527#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
14519a0b 528#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
51e9bf5d 529#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
14519a0b 530#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
51e9bf5d 531#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
14519a0b 532#define RXON_RX_CHAIN_CNT_POS (10)
51e9bf5d 533#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
14519a0b 534#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
51e9bf5d 535#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
14519a0b
BC
536#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
537
b481de9c
ZY
538/* rx_config flags */
539/* band & modulation selection */
51e9bf5d
HH
540#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
541#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
b481de9c 542/* auto detection enable */
51e9bf5d 543#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
b481de9c 544/* TGg protection when tx */
51e9bf5d 545#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
b481de9c 546/* cck short slot & preamble */
51e9bf5d
HH
547#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
548#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
b481de9c 549/* antenna selection */
51e9bf5d
HH
550#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
551#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
552#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
553#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 554/* radar detection enable */
51e9bf5d
HH
555#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
556#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
b481de9c
ZY
557/* rx response to host with 8-byte TSF
558* (according to ON_AIR deassertion) */
51e9bf5d 559#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
b481de9c 560
14519a0b
BC
561
562/* HT flags */
563#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
51e9bf5d 564#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
14519a0b
BC
565
566#define RXON_FLG_HT_OPERATING_MODE_POS (23)
567
51e9bf5d 568#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
7aafef1c 569#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
14519a0b
BC
570
571#define RXON_FLG_CHANNEL_MODE_POS (25)
51e9bf5d 572#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
a2b0f02e
WYG
573
574/* channel mode */
575enum {
576 CHANNEL_MODE_LEGACY = 0,
577 CHANNEL_MODE_PURE_40 = 1,
578 CHANNEL_MODE_MIXED = 2,
579 CHANNEL_MODE_RESERVED = 3,
580};
581#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
582#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
583#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
584
a326a5d0 585/* CTS to self (if spec allows) flag */
51e9bf5d 586#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
14519a0b 587
b481de9c
ZY
588/* rx_config filter flags */
589/* accept all data frames */
51e9bf5d 590#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
b481de9c 591/* pass control & management to host */
51e9bf5d 592#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
b481de9c 593/* accept multi-cast */
51e9bf5d 594#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
b481de9c 595/* don't decrypt uni-cast frames */
51e9bf5d 596#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
b481de9c 597/* don't decrypt multi-cast frames */
51e9bf5d 598#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
b481de9c 599/* STA is associated */
51e9bf5d 600#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
b481de9c 601/* transfer to host non bssid beacons in associated state */
51e9bf5d 602#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
b481de9c 603
80cc0c38 604/**
b481de9c 605 * REPLY_RXON = 0x10 (command, has simple generic response)
80cc0c38
BC
606 *
607 * RXON tunes the radio tuner to a service channel, and sets up a number
608 * of parameters that are used primarily for Rx, but also for Tx operations.
609 *
610 * NOTE: When tuning to a new channel, driver must set the
611 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
612 * info within the device, including the station tables, tx retry
613 * rate tables, and txpower tables. Driver must build a new station
614 * table and txpower table before transmitting anything on the RXON
615 * channel.
616 *
617 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
618 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
619 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
b481de9c 620 */
3d24a9f7 621
c1adf9fb
GG
622struct iwl_rxon_cmd {
623 u8 node_addr[6];
624 __le16 reserved1;
625 u8 bssid_addr[6];
626 __le16 reserved2;
627 u8 wlap_bssid_addr[6];
628 __le16 reserved3;
629 u8 dev_type;
630 u8 air_propagation;
631 __le16 rx_chain;
632 u8 ofdm_basic_rates;
633 u8 cck_basic_rates;
634 __le16 assoc_id;
635 __le32 flags;
636 __le32 filter_flags;
637 __le16 channel;
638 u8 ofdm_ht_single_stream_basic_rates;
639 u8 ofdm_ht_dual_stream_basic_rates;
640 u8 ofdm_ht_triple_stream_basic_rates;
641 u8 reserved5;
642 __le16 acquisition_data;
643 __le16 reserved6;
ba2d3587 644} __packed;
c1adf9fb 645
3d24a9f7
TW
646/*
647 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
648 */
89e746b2 649struct iwl_rxon_assoc_cmd {
b481de9c
ZY
650 __le32 flags;
651 __le32 filter_flags;
652 u8 ofdm_basic_rates;
653 u8 cck_basic_rates;
3d24a9f7 654 __le16 reserved1;
b481de9c
ZY
655 u8 ofdm_ht_single_stream_basic_rates;
656 u8 ofdm_ht_dual_stream_basic_rates;
3d24a9f7
TW
657 u8 ofdm_ht_triple_stream_basic_rates;
658 u8 reserved2;
b481de9c 659 __le16 rx_chain_select_flags;
3d24a9f7
TW
660 __le16 acquisition_data;
661 __le32 reserved3;
ba2d3587 662} __packed;
b481de9c 663
b5d7be5e 664#define IWL_CONN_MAX_LISTEN_INTERVAL 10
2c2f3b33
TW
665#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
666#define IWL39_MAX_UCODE_BEACON_INTERVAL 1 /* 1024 */
fe7a90c2 667
b481de9c
ZY
668/*
669 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
670 */
3195c1f3
TW
671struct iwl_rxon_time_cmd {
672 __le64 timestamp;
b481de9c
ZY
673 __le16 beacon_interval;
674 __le16 atim_window;
675 __le32 beacon_init_val;
676 __le16 listen_interval;
946ba30d
JB
677 u8 dtim_period;
678 u8 delta_cp_bss_tbtts;
ba2d3587 679} __packed;
b481de9c 680
b481de9c
ZY
681/*
682 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
683 */
e57f1489
WYG
684/**
685 * struct iwl5000_channel_switch_cmd
686 * @band: 0- 5.2GHz, 1- 2.4GHz
687 * @expect_beacon: 0- resume transmits after channel switch
688 * 1- wait for beacon to resume transmits
689 * @channel: new channel number
690 * @rxon_flags: Rx on flags
691 * @rxon_filter_flags: filtering parameters
692 * @switch_time: switch time in extended beacon format
693 * @reserved: reserved bytes
694 */
695struct iwl5000_channel_switch_cmd {
696 u8 band;
697 u8 expect_beacon;
698 __le16 channel;
699 __le32 rxon_flags;
700 __le32 rxon_filter_flags;
701 __le32 switch_time;
702 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 703} __packed;
e57f1489
WYG
704
705/**
706 * struct iwl6000_channel_switch_cmd
707 * @band: 0- 5.2GHz, 1- 2.4GHz
708 * @expect_beacon: 0- resume transmits after channel switch
709 * 1- wait for beacon to resume transmits
710 * @channel: new channel number
711 * @rxon_flags: Rx on flags
712 * @rxon_filter_flags: filtering parameters
713 * @switch_time: switch time in extended beacon format
714 * @reserved: reserved bytes
715 */
716struct iwl6000_channel_switch_cmd {
717 u8 band;
718 u8 expect_beacon;
719 __le16 channel;
720 __le32 rxon_flags;
721 __le32 rxon_filter_flags;
722 __le32 switch_time;
723 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 724} __packed;
e57f1489 725
b481de9c
ZY
726/*
727 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
728 */
2aa6ab86 729struct iwl_csa_notification {
b481de9c
ZY
730 __le16 band;
731 __le16 channel;
732 __le32 status; /* 0 - OK, 1 - fail */
ba2d3587 733} __packed;
b481de9c
ZY
734
735/******************************************************************************
736 * (2)
737 * Quality-of-Service (QOS) Commands & Responses:
738 *
739 *****************************************************************************/
2054a00b
BC
740
741/**
742 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
743 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
744 *
745 * @cw_min: Contention window, start value in numbers of slots.
746 * Should be a power-of-2, minus 1. Device's default is 0x0f.
747 * @cw_max: Contention window, max value in numbers of slots.
748 * Should be a power-of-2, minus 1. Device's default is 0x3f.
749 * @aifsn: Number of slots in Arbitration Interframe Space (before
750 * performing random backoff timing prior to Tx). Device default 1.
751 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
752 *
753 * Device will automatically increase contention window by (2*CW) + 1 for each
754 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
755 * value, to cap the CW value.
756 */
1ff50bda 757struct iwl_ac_qos {
b481de9c
ZY
758 __le16 cw_min;
759 __le16 cw_max;
760 u8 aifsn;
761 u8 reserved1;
762 __le16 edca_txop;
ba2d3587 763} __packed;
b481de9c
ZY
764
765/* QoS flags defines */
51e9bf5d
HH
766#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
767#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
768#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
b481de9c 769
2054a00b 770/* Number of Access Categories (AC) (EDCA), queues 0..3 */
b481de9c
ZY
771#define AC_NUM 4
772
773/*
774 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
2054a00b
BC
775 *
776 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
777 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
b481de9c 778 */
1ff50bda 779struct iwl_qosparam_cmd {
b481de9c 780 __le32 qos_flags;
1ff50bda 781 struct iwl_ac_qos ac[AC_NUM];
ba2d3587 782} __packed;
b481de9c
ZY
783
784/******************************************************************************
785 * (3)
786 * Add/Modify Stations Commands & Responses:
787 *
788 *****************************************************************************/
789/*
790 * Multi station support
791 */
2054a00b
BC
792
793/* Special, dedicated locations within device's station table */
b481de9c 794#define IWL_AP_ID 0
946ba30d 795#define IWL_AP_ID_PAN 1
b481de9c 796#define IWL_STA_ID 2
946ba30d 797#define IWLAGN_PAN_BCAST_ID 14
bf3c7fdd
WYG
798#define IWLAGN_BROADCAST_ID 15
799#define IWLAGN_STATION_COUNT 16
b481de9c 800
b481de9c
ZY
801#define IWL_INVALID_STATION 255
802
1bd14eaf
JB
803#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
804#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
946ba30d 805#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
51e9bf5d
HH
806#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
807#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
74093ddf 808#define STA_FLG_MAX_AGG_SIZE_POS (19)
51e9bf5d 809#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
7aafef1c 810#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
51e9bf5d 811#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
74093ddf 812#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
51e9bf5d 813#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
b481de9c 814
2054a00b 815/* Use in mode field. 1: modify existing entry, 0: add new station entry */
b481de9c
ZY
816#define STA_CONTROL_MODIFY_MSK 0x01
817
818/* key flags __le16*/
51e9bf5d
HH
819#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
820#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
821#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
822#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
823#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
b481de9c
ZY
824
825#define STA_KEY_FLG_KEYID_POS 8
51e9bf5d 826#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
eaaf7894 827/* wep key is either from global key (0) or from station info array (1) */
51e9bf5d 828#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
eaaf7894
EG
829
830/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
51e9bf5d
HH
831#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
832#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
deb09c43 833#define STA_KEY_MAX_NUM 8
c10afb6e 834#define STA_KEY_MAX_NUM_PAN 16
b481de9c 835
2054a00b 836/* Flags indicate whether to modify vs. don't change various station params */
b481de9c
ZY
837#define STA_MODIFY_KEY_MASK 0x01
838#define STA_MODIFY_TID_DISABLE_TX 0x02
839#define STA_MODIFY_TX_RATE_MSK 0x04
840#define STA_MODIFY_ADDBA_TID_MSK 0x08
841#define STA_MODIFY_DELBA_TID_MSK 0x10
6ab10ff8 842#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
2054a00b
BC
843
844/* Receiver address (actually, Rx station's index into station table),
845 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
b481de9c
ZY
846#define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
847
a8029bb7 848/* agn */
133636de
TW
849struct iwl_keyinfo {
850 __le16 key_flags;
851 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
852 u8 reserved1;
853 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
854 u8 key_offset;
855 u8 reserved2;
856 u8 key[16]; /* 16-byte unicast decryption key */
857 __le64 tx_secur_seq_cnt;
858 __le64 hw_tkip_mic_rx_key;
859 __le64 hw_tkip_mic_tx_key;
ba2d3587 860} __packed;
133636de 861
2054a00b
BC
862/**
863 * struct sta_id_modify
864 * @addr[ETH_ALEN]: station's MAC address
865 * @sta_id: index of station in uCode's station table
866 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
867 *
868 * Driver selects unused table index when adding new station,
869 * or the index to a pre-existing station entry when modifying that station.
870 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
871 *
872 * modify_mask flags select which parameters to modify vs. leave alone.
873 */
b481de9c
ZY
874struct sta_id_modify {
875 u8 addr[ETH_ALEN];
876 __le16 reserved1;
877 u8 sta_id;
878 u8 modify_mask;
879 __le16 reserved2;
ba2d3587 880} __packed;
b481de9c
ZY
881
882/*
883 * REPLY_ADD_STA = 0x18 (command)
2054a00b
BC
884 *
885 * The device contains an internal table of per-station information,
886 * with info on security keys, aggregation parameters, and Tx rates for
767d055d
WYG
887 * initial Tx attempt and any retries (agn devices uses
888 * REPLY_TX_LINK_QUALITY_CMD,
2054a00b
BC
889 *
890 * REPLY_ADD_STA sets up the table entry for one station, either creating
891 * a new entry, or modifying a pre-existing one.
892 *
893 * NOTE: RXON command (without "associated" bit set) wipes the station table
894 * clean. Moving into RF_KILL state does this also. Driver must set up
895 * new station table before transmitting anything on the RXON channel
896 * (except active scans or active measurements; those commands carry
897 * their own txpower/rate setup data).
898 *
899 * When getting started on a new channel, driver must set up the
900 * IWL_BROADCAST_ID entry (last entry in the table). For a client
901 * station in a BSS, once an AP is selected, driver sets up the AP STA
902 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
903 * are all that are needed for a BSS client station. If the device is
904 * used as AP, or in an IBSS network, driver must set up station table
905 * entries for all STAs in network, starting with index IWL_STA_ID.
b481de9c 906 */
3d24a9f7 907
133636de
TW
908struct iwl_addsta_cmd {
909 u8 mode; /* 1: modify existing, 0: add new station */
910 u8 reserved[3];
911 struct sta_id_modify sta;
912 struct iwl_keyinfo key;
913 __le32 station_flags; /* STA_FLG_* */
914 __le32 station_flags_msk; /* STA_FLG_* */
915
916 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
917 * corresponding to bit (e.g. bit 5 controls TID 5).
918 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
919 __le16 tid_disable_tx;
920
c587de0b 921 __le16 rate_n_flags; /* 3945 only */
133636de
TW
922
923 /* TID for which to add block-ack support.
924 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
925 u8 add_immediate_ba_tid;
926
927 /* TID for which to remove block-ack support.
928 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
929 u8 remove_immediate_ba_tid;
930
931 /* Starting Sequence Number for added block-ack support.
932 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
933 __le16 add_immediate_ba_ssn;
934
9bb487b4
JB
935 /*
936 * Number of packets OK to transmit to station even though
937 * it is asleep -- used to synchronise PS-poll and u-APSD
938 * responses while ucode keeps track of STA sleep state.
939 */
940 __le16 sleep_tx_count;
941
942 __le16 reserved2;
ba2d3587 943} __packed;
133636de
TW
944
945
2054a00b
BC
946#define ADD_STA_SUCCESS_MSK 0x1
947#define ADD_STA_NO_ROOM_IN_TABLE 0x2
948#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
949#define ADD_STA_MODIFY_NON_EXIST_STA 0x8
b481de9c
ZY
950/*
951 * REPLY_ADD_STA = 0x18 (response)
952 */
7a999bf0 953struct iwl_add_sta_resp {
2054a00b 954 u8 status; /* ADD_STA_* */
ba2d3587 955} __packed;
b481de9c 956
7a999bf0
TW
957#define REM_STA_SUCCESS_MSK 0x1
958/*
959 * REPLY_REM_STA = 0x19 (response)
960 */
961struct iwl_rem_sta_resp {
962 u8 status;
ba2d3587 963} __packed;
7a999bf0
TW
964
965/*
966 * REPLY_REM_STA = 0x19 (command)
967 */
968struct iwl_rem_sta_cmd {
969 u8 num_sta; /* number of removed stations */
970 u8 reserved[3];
971 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
972 u8 reserved2[2];
ba2d3587 973} __packed;
7a999bf0 974
f88e0ecc
WYG
975
976/* WiFi queues mask */
977#define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
978#define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
979#define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
980#define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
981#define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
982
983/* PAN queues mask */
984#define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
985#define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
986#define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
987#define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
988#define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
989#define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
990
947279ee
WYG
991#define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
992
716c74b0 993#define IWL_DROP_SINGLE 0
ecdbe86e 994#define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN))
716c74b0 995
947279ee
WYG
996/*
997 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
998 *
999 * When using full FIFO flush this command checks the scheduler HW block WR/RD
1000 * pointers to check if all the frames were transferred by DMA into the
1001 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
1002 * empty the command can finish.
1003 * This command is used to flush the TXFIFO from transmit commands, it may
1004 * operate on single or multiple queues, the command queue can't be flushed by
1005 * this command. The command response is returned when all the queue flush
1006 * operations are done. Each TX command flushed return response with the FLUSH
1007 * status set in the TX response status. When FIFO flush operation is used,
1008 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1009 * are set.
1010 *
1011 * @fifo_control: bit mask for which queues to flush
1012 * @flush_control: flush controls
1013 * 0: Dump single MSDU
1014 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1015 * 2: Dump all FIFO
1016 */
1017struct iwl_txfifo_flush_cmd {
1018 __le32 fifo_control;
1019 __le16 flush_control;
1020 __le16 reserved;
0e954099 1021} __packed;
947279ee 1022
0a0bed1d
EG
1023/*
1024 * REPLY_WEP_KEY = 0x20
1025 */
1026struct iwl_wep_key {
1027 u8 key_index;
1028 u8 key_offset;
1029 u8 reserved1[2];
1030 u8 key_size;
1031 u8 reserved2[3];
1032 u8 key[16];
ba2d3587 1033} __packed;
0a0bed1d
EG
1034
1035struct iwl_wep_cmd {
1036 u8 num_keys;
1037 u8 global_key_type;
1038 u8 flags;
1039 u8 reserved;
1040 struct iwl_wep_key key[0];
ba2d3587 1041} __packed;
0a0bed1d
EG
1042
1043#define WEP_KEY_WEP_TYPE 1
1044#define WEP_KEYS_MAX 4
1045#define WEP_INVALID_OFFSET 0xff
4564ce8b 1046#define WEP_KEY_LEN_64 5
0a0bed1d 1047#define WEP_KEY_LEN_128 13
b481de9c
ZY
1048
1049/******************************************************************************
1050 * (4)
1051 * Rx Responses:
1052 *
1053 *****************************************************************************/
1054
51e9bf5d
HH
1055#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1056#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
8211ef78 1057
51e9bf5d
HH
1058#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1059#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1060#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1061#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
9024adf5 1062#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
9f30e04e 1063#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
8211ef78
TW
1064
1065#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1066#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1067#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1068#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1069#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
17e476b8
EG
1070#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1071
1072#define RX_RES_STATUS_STATION_FOUND (1<<6)
1073#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
8211ef78
TW
1074
1075#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1076#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1077#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1078#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1079#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
b481de9c 1080
17e476b8
EG
1081#define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1082#define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1083#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1084#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1085
3d24a9f7 1086
7ccc896f
WYG
1087#define IWLAGN_RX_RES_PHY_CNT 8
1088#define IWLAGN_RX_RES_AGC_IDX 1
1089#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1090#define IWLAGN_RX_RES_RSSI_C_IDX 3
1091#define IWLAGN_OFDM_AGC_MSK 0xfe00
1092#define IWLAGN_OFDM_AGC_BIT_POS 9
1093#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1094#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1095#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1096#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1097#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1098#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1099#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1100#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1101#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1102
1103struct iwlagn_non_cfg_phy {
1104 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
ba2d3587 1105} __packed;
caab8f1a
TW
1106
1107
b481de9c 1108/*
857485c0 1109 * REPLY_RX = 0xc3 (response only, not a command)
b481de9c
ZY
1110 * Used only for legacy (non 11n) frames.
1111 */
caab8f1a 1112struct iwl_rx_phy_res {
b481de9c
ZY
1113 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1114 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1115 u8 stat_id; /* configurable DSP phy data set ID */
1116 u8 reserved1;
1117 __le64 timestamp; /* TSF at on air rise */
1118 __le32 beacon_time_stamp; /* beacon at on-air rise */
1119 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1120 __le16 channel; /* channel number */
caab8f1a 1121 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
52969981
BC
1122 __le32 rate_n_flags; /* RATE_MCS_* */
1123 __le16 byte_count; /* frame's byte-count */
30c1b0f7 1124 __le16 frame_time; /* frame's time on the air */
ba2d3587 1125} __packed;
b481de9c 1126
2fb291ee 1127struct iwl_rx_mpdu_res_start {
b481de9c
ZY
1128 __le16 byte_count;
1129 __le16 reserved;
ba2d3587 1130} __packed;
b481de9c
ZY
1131
1132
1133/******************************************************************************
1134 * (5)
1135 * Tx Commands & Responses:
1136 *
52969981
BC
1137 * Driver must place each REPLY_TX command into one of the prioritized Tx
1138 * queues in host DRAM, shared between driver and device (see comments for
1139 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1140 * are preparing to transmit, the device pulls the Tx command over the PCI
1141 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1142 * from which data will be transmitted.
1143 *
1144 * uCode handles all timing and protocol related to control frames
1145 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1146 * handle reception of block-acks; uCode updates the host driver via
767d055d 1147 * REPLY_COMPRESSED_BA.
52969981
BC
1148 *
1149 * uCode handles retrying Tx when an ACK is expected but not received.
1150 * This includes trying lower data rates than the one requested in the Tx
1151 * command, as set up by the REPLY_RATE_SCALE (for 3945) or
767d055d 1152 * REPLY_TX_LINK_QUALITY_CMD (agn).
52969981
BC
1153 *
1154 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1155 * This command must be executed after every RXON command, before Tx can occur.
b481de9c
ZY
1156 *****************************************************************************/
1157
52969981
BC
1158/* REPLY_TX Tx flags field */
1159
4e3243f5
WYG
1160/*
1161 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
a326a5d0 1162 * before this frame. if CTS-to-self required check
4e3243f5
WYG
1163 * RXON_FLG_SELF_CTS_EN status.
1164 * unused in 3945/4965, used in 5000 series and after
1165 */
1166#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
a326a5d0 1167
4e3243f5
WYG
1168/*
1169 * 1: Use Request-To-Send protocol before this frame.
1170 * Mutually exclusive vs. TX_CMD_FLG_CTS_MSK.
1171 * used in 3945/4965, unused in 5000 series and after
1172 */
51e9bf5d 1173#define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1)
52969981 1174
4e3243f5
WYG
1175/*
1176 * 1: Transmit Clear-To-Send to self before this frame.
52969981 1177 * Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames.
4e3243f5
WYG
1178 * Mutually exclusive vs. TX_CMD_FLG_RTS_MSK.
1179 * used in 3945/4965, unused in 5000 series and after
1180 */
51e9bf5d 1181#define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2)
52969981
BC
1182
1183/* 1: Expect ACK from receiving station
1184 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1185 * Set this for unicast frames, but not broadcast/multicast. */
51e9bf5d 1186#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
52969981 1187
767d055d 1188/* For agn devices:
52969981
BC
1189 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1190 * Tx command's initial_rate_index indicates first rate to try;
1191 * uCode walks through table for additional Tx attempts.
1192 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1193 * This rate will be used for all Tx attempts; it will not be scaled. */
51e9bf5d 1194#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
52969981
BC
1195
1196/* 1: Expect immediate block-ack.
1197 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
51e9bf5d 1198#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
52969981 1199
4e3243f5
WYG
1200/*
1201 * 1: Frame requires full Tx-Op protection.
1202 * Set this if either RTS or CTS Tx Flag gets set.
1203 * used in 3945/4965, unused in 5000 series and after
1204 */
51e9bf5d 1205#define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7)
52969981 1206
767d055d 1207/* Tx antenna selection field; used only for 3945, reserved (0) for agn devices.
52969981 1208 * Set field to "0" to allow 3945 uCode to select antenna (normal usage). */
51e9bf5d
HH
1209#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1210#define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
1211#define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 1212
52969981
BC
1213/* 1: Ignore Bluetooth priority for this frame.
1214 * 0: Delay Tx until Bluetooth device is done (normal usage). */
b2e8690d 1215#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
b481de9c 1216
52969981
BC
1217/* 1: uCode overrides sequence control field in MAC header.
1218 * 0: Driver provides sequence control field in MAC header.
1219 * Set this for management frames, non-QOS data frames, non-unicast frames,
1220 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
51e9bf5d 1221#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
b481de9c 1222
52969981
BC
1223/* 1: This frame is non-last MPDU; more fragments are coming.
1224 * 0: Last fragment, or not using fragmentation. */
51e9bf5d 1225#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
b481de9c 1226
52969981
BC
1227/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1228 * 0: No TSF required in outgoing frame.
1229 * Set this for transmitting beacons and probe responses. */
51e9bf5d 1230#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
b481de9c 1231
52969981
BC
1232/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1233 * alignment of frame's payload data field.
1234 * 0: No pad
1235 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1236 * field (but not both). Driver must align frame data (i.e. data following
1237 * MAC header) to DWORD boundary. */
51e9bf5d 1238#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
b481de9c 1239
8236e183
MS
1240/* accelerate aggregation support
1241 * 0 - no CCMP encryption; 1 - CCMP encryption */
51e9bf5d 1242#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
8236e183 1243
b481de9c 1244/* HCCA-AP - disable duration overwriting. */
51e9bf5d 1245#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
b481de9c 1246
52969981 1247
b481de9c
ZY
1248/*
1249 * TX command security control
1250 */
1251#define TX_CMD_SEC_WEP 0x01
1252#define TX_CMD_SEC_CCM 0x02
1253#define TX_CMD_SEC_TKIP 0x03
1254#define TX_CMD_SEC_MSK 0x03
1255#define TX_CMD_SEC_SHIFT 6
1256#define TX_CMD_SEC_KEY128 0x08
1257
3195cdb7
TW
1258/*
1259 * security overhead sizes
1260 */
1261#define WEP_IV_LEN 4
1262#define WEP_ICV_LEN 4
1263#define CCMP_MIC_LEN 8
1264#define TKIP_ICV_LEN 4
1265
3d24a9f7
TW
1266/*
1267 * REPLY_TX = 0x1c (command)
1268 */
1269
b481de9c 1270/*
52969981
BC
1271 * 4965 uCode updates these Tx attempt count values in host DRAM.
1272 * Used for managing Tx retries when expecting block-acks.
1273 * Driver should set these fields to 0.
b481de9c 1274 */
2aa6ab86 1275struct iwl_dram_scratch {
52969981
BC
1276 u8 try_cnt; /* Tx attempts */
1277 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
b481de9c 1278 __le16 reserved;
ba2d3587 1279} __packed;
b481de9c 1280
83d527d9 1281struct iwl_tx_cmd {
52969981
BC
1282 /*
1283 * MPDU byte count:
1284 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1285 * + 8 byte IV for CCM or TKIP (not used for WEP)
1286 * + Data payload
1287 * + 8-byte MIC (not used for CCM/WEP)
1288 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1289 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1290 * Range: 14-2342 bytes.
1291 */
b481de9c 1292 __le16 len;
52969981
BC
1293
1294 /*
1295 * MPDU or MSDU byte count for next frame.
1296 * Used for fragmentation and bursting, but not 11n aggregation.
1297 * Same as "len", but for next frame. Set to 0 if not applicable.
1298 */
b481de9c 1299 __le16 next_frame_len;
52969981
BC
1300
1301 __le32 tx_flags; /* TX_CMD_FLG_* */
1302
2aa6ab86 1303 /* uCode may modify this field of the Tx command (in host DRAM!).
52969981 1304 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
2aa6ab86 1305 struct iwl_dram_scratch scratch;
52969981
BC
1306
1307 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1308 __le32 rate_n_flags; /* RATE_MCS_* */
1309
1310 /* Index of destination station in uCode's station table */
b481de9c 1311 u8 sta_id;
52969981
BC
1312
1313 /* Type of security encryption: CCM or TKIP */
1314 u8 sec_ctl; /* TX_CMD_SEC_* */
1315
1316 /*
1317 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1318 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1319 * data frames, this field may be used to selectively reduce initial
1320 * rate (via non-0 value) for special frames (e.g. management), while
1321 * still supporting rate scaling for all frames.
1322 */
b481de9c
ZY
1323 u8 initial_rate_index;
1324 u8 reserved;
b481de9c 1325 u8 key[16];
b481de9c
ZY
1326 __le16 next_frame_flags;
1327 __le16 reserved2;
b481de9c
ZY
1328 union {
1329 __le32 life_time;
1330 __le32 attempt;
1331 } stop_time;
52969981
BC
1332
1333 /* Host DRAM physical address pointer to "scratch" in this command.
1334 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
b481de9c
ZY
1335 __le32 dram_lsb_ptr;
1336 u8 dram_msb_ptr;
52969981 1337
b481de9c
ZY
1338 u8 rts_retry_limit; /*byte 50 */
1339 u8 data_retry_limit; /*byte 51 */
b481de9c 1340 u8 tid_tspec;
b481de9c
ZY
1341 union {
1342 __le16 pm_frame_timeout;
1343 __le16 attempt_duration;
1344 } timeout;
52969981
BC
1345
1346 /*
1347 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1348 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1349 */
b481de9c 1350 __le16 driver_txop;
52969981
BC
1351
1352 /*
1353 * MAC header goes here, followed by 2 bytes padding if MAC header
1354 * length is 26 or 30 bytes, followed by payload data
1355 */
b481de9c
ZY
1356 u8 payload[0];
1357 struct ieee80211_hdr hdr[0];
ba2d3587 1358} __packed;
b481de9c 1359
04569cbe
WYG
1360/*
1361 * TX command response is sent after *agn* transmission attempts.
1362 *
1363 * both postpone and abort status are expected behavior from uCode. there is
1364 * no special operation required from driver; except for RFKILL_FLUSH,
1365 * which required tx flush host command to flush all the tx frames in queues
1366 */
b481de9c
ZY
1367enum {
1368 TX_STATUS_SUCCESS = 0x01,
1369 TX_STATUS_DIRECT_DONE = 0x02,
04569cbe
WYG
1370 /* postpone TX */
1371 TX_STATUS_POSTPONE_DELAY = 0x40,
1372 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1373 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1374 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1375 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1376 /* abort TX */
1377 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
b481de9c
ZY
1378 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1379 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1380 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
04569cbe
WYG
1381 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1382 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
b481de9c
ZY
1383 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1384 TX_STATUS_FAIL_DEST_PS = 0x88,
04569cbe 1385 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
b481de9c
ZY
1386 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1387 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1388 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1389 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
04569cbe 1390 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
b481de9c 1391 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1d270075
WYG
1392 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1393 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
b481de9c
ZY
1394};
1395
1396#define TX_PACKET_MODE_REGULAR 0x0000
1397#define TX_PACKET_MODE_BURST_SEQ 0x0100
1398#define TX_PACKET_MODE_BURST_FIRST 0x0200
1399
1400enum {
1401 TX_POWER_PA_NOT_ACTIVE = 0x0,
1402};
1403
1404enum {
3fd07a1e 1405 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
b481de9c
ZY
1406 TX_STATUS_DELAY_MSK = 0x00000040,
1407 TX_STATUS_ABORT_MSK = 0x00000080,
1408 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1409 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
3fd07a1e 1410 TX_RESERVED = 0x00780000, /* bits 19:22 */
b481de9c
ZY
1411 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1412 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1413};
1414
1415/* *******************************
52969981 1416 * TX aggregation status
b481de9c
ZY
1417 ******************************* */
1418
1419enum {
1420 AGG_TX_STATE_TRANSMITTED = 0x00,
1421 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1422 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1423 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1424 AGG_TX_STATE_ABORT_MSK = 0x08,
1425 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1426 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1427 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1428 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1429 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1430 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1431 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1432 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1433};
1434
e1b3fa0c
WYG
1435#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1436#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1437
3fd07a1e
TW
1438#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1439 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1440 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
b481de9c 1441
52969981 1442/* # tx attempts for first frame in aggregation */
b481de9c
ZY
1443#define AGG_TX_STATE_TRY_CNT_POS 12
1444#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1445
52969981 1446/* Command ID and sequence number of Tx command for this frame */
b481de9c
ZY
1447#define AGG_TX_STATE_SEQ_NUM_POS 16
1448#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1449
1450/*
1451 * REPLY_TX = 0x1c (response)
52969981
BC
1452 *
1453 * This response may be in one of two slightly different formats, indicated
1454 * by the frame_count field:
1455 *
1456 * 1) No aggregation (frame_count == 1). This reports Tx results for
1457 * a single frame. Multiple attempts, at various bit rates, may have
1458 * been made for this frame.
1459 *
1460 * 2) Aggregation (frame_count > 1). This reports Tx results for
1461 * 2 or more frames that used block-acknowledge. All frames were
1462 * transmitted at same rate. Rate scaling may have been used if first
1463 * frame in this new agg block failed in previous agg block(s).
1464 *
1465 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
767d055d
WYG
1466 * block-ack has not been received by the time the agn device records
1467 * this status.
52969981 1468 * This status relates to reasons the tx might have been blocked or aborted
767d055d 1469 * within the sending station (this agn device), rather than whether it was
52969981 1470 * received successfully by the destination station.
b481de9c 1471 */
001caff0
RR
1472struct agg_tx_status {
1473 __le16 status;
1474 __le16 sequence;
ba2d3587 1475} __packed;
001caff0 1476
3fd07a1e
TW
1477/*
1478 * definitions for initial rate index field
a96a27f9 1479 * bits [3:0] initial rate index
3fd07a1e
TW
1480 * bits [6:4] rate table color, used for the initial rate
1481 * bit-7 invalid rate indication
1482 * i.e. rate was not chosen from rate table
1483 * or rate table color was changed during frame retries
1484 * refer tlc rate info
1485 */
1486
1487#define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1488#define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1489#define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1490#define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1491#define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1492
1493/* refer to ra_tid */
898dade1
WYG
1494#define IWLAGN_TX_RES_TID_POS 0
1495#define IWLAGN_TX_RES_TID_MSK 0x0f
1496#define IWLAGN_TX_RES_RA_POS 4
1497#define IWLAGN_TX_RES_RA_MSK 0xf0
3fd07a1e 1498
898dade1 1499struct iwlagn_tx_resp {
001caff0
RR
1500 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1501 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1502 u8 failure_rts; /* # failures due to unsuccessful RTS */
1503 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1504
1505 /* For non-agg: Rate at which frame was successful.
1506 * For agg: Rate at which all frames were transmitted. */
1507 __le32 rate_n_flags; /* RATE_MCS_* */
1508
1509 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1510 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1511 __le16 wireless_media_time; /* uSecs */
1512
3fd07a1e
TW
1513 u8 pa_status; /* RF power amplifier measurement (not used) */
1514 u8 pa_integ_res_a[3];
1515 u8 pa_integ_res_b[3];
1516 u8 pa_integ_res_C[3];
001caff0
RR
1517
1518 __le32 tfd_info;
1519 __le16 seq_ctl;
1520 __le16 byte_cnt;
3fd07a1e
TW
1521 u8 tlc_info;
1522 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1523 __le16 frame_ctrl;
001caff0
RR
1524 /*
1525 * For non-agg: frame status TX_STATUS_*
1526 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1527 * fields follow this one, up to frame_count.
1528 * Bit fields:
1529 * 11- 0: AGG_TX_STATE_* status code
1530 * 15-12: Retry count for 1st frame in aggregation (retries
1531 * occur if tx failed for this frame when it was a
1532 * member of a previous aggregation block). If rate
1533 * scaling is used, retry count indicates the rate
1534 * table entry used for all frames in the new agg.
1535 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1536 */
1537 struct agg_tx_status status; /* TX status (in aggregation -
1538 * status of 1st frame) */
ba2d3587 1539} __packed;
b481de9c
ZY
1540/*
1541 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
52969981
BC
1542 *
1543 * Reports Block-Acknowledge from recipient station
b481de9c 1544 */
653fa4a0 1545struct iwl_compressed_ba_resp {
b481de9c
ZY
1546 __le32 sta_addr_lo32;
1547 __le16 sta_addr_hi16;
1548 __le16 reserved;
52969981
BC
1549
1550 /* Index of recipient (BA-sending) station in uCode's station table */
b481de9c
ZY
1551 u8 sta_id;
1552 u8 tid;
fe01b477
RR
1553 __le16 seq_ctl;
1554 __le64 bitmap;
b481de9c
ZY
1555 __le16 scd_flow;
1556 __le16 scd_ssn;
8829c9e2
WYG
1557 /* following only for 5000 series and up */
1558 u8 txed; /* number of frames sent */
1559 u8 txed_2_done; /* number of frames acked */
ba2d3587 1560} __packed;
b481de9c
ZY
1561
1562/*
1563 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
2bdc7031 1564 *
3d24a9f7 1565 */
3d24a9f7 1566
b481de9c 1567/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
8a1b0245 1568#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
b481de9c 1569
2bdc7031 1570/* # of EDCA prioritized tx fifos */
b481de9c 1571#define LINK_QUAL_AC_NUM AC_NUM
2bdc7031
BC
1572
1573/* # entries in rate scale table to support Tx retries */
b481de9c
ZY
1574#define LINK_QUAL_MAX_RETRY_NUM 16
1575
2bdc7031 1576/* Tx antenna selection values */
8a1b0245
RC
1577#define LINK_QUAL_ANT_A_MSK (1 << 0)
1578#define LINK_QUAL_ANT_B_MSK (1 << 1)
b481de9c
ZY
1579#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1580
2bdc7031
BC
1581
1582/**
66c73db7 1583 * struct iwl_link_qual_general_params
2bdc7031
BC
1584 *
1585 * Used in REPLY_TX_LINK_QUALITY_CMD
1586 */
66c73db7 1587struct iwl_link_qual_general_params {
b481de9c 1588 u8 flags;
2bdc7031
BC
1589
1590 /* No entries at or above this (driver chosen) index contain MIMO */
b481de9c 1591 u8 mimo_delimiter;
2bdc7031
BC
1592
1593 /* Best single antenna to use for single stream (legacy, SISO). */
1594 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1595
1596 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1597 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1598
1599 /*
1600 * If driver needs to use different initial rates for different
1601 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1602 * this table will set that up, by indicating the indexes in the
1603 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1604 * Otherwise, driver should set all entries to 0.
1605 *
1606 * Entry usage:
1607 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1608 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1609 */
b481de9c 1610 u8 start_rate_index[LINK_QUAL_AC_NUM];
ba2d3587 1611} __packed;
b481de9c 1612
13c33a09 1613#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
b15826a7
WYG
1614#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1615#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
13c33a09
WYG
1616
1617#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1618#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1619#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1620
4263108c 1621#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
b623a9f7 1622#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
13c33a09
WYG
1623#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1624
2bdc7031 1625/**
66c73db7 1626 * struct iwl_link_qual_agg_params
2bdc7031
BC
1627 *
1628 * Used in REPLY_TX_LINK_QUALITY_CMD
1629 */
66c73db7 1630struct iwl_link_qual_agg_params {
2bdc7031 1631
7469701e
WYG
1632 /*
1633 *Maximum number of uSec in aggregation.
1634 * default set to 4000 (4 milliseconds) if not configured in .cfg
1635 */
b481de9c 1636 __le16 agg_time_limit;
2bdc7031
BC
1637
1638 /*
1639 * Number of Tx retries allowed for a frame, before that frame will
1640 * no longer be considered for the start of an aggregation sequence
1641 * (scheduler will then try to tx it as single frame).
1642 * Driver should set this to 3.
1643 */
b481de9c 1644 u8 agg_dis_start_th;
2bdc7031
BC
1645
1646 /*
1647 * Maximum number of frames in aggregation.
1648 * 0 = no limit (default). 1 = no aggregation.
1649 * Other values = max # frames in aggregation.
1650 */
b481de9c 1651 u8 agg_frame_cnt_limit;
2bdc7031 1652
b481de9c 1653 __le32 reserved;
ba2d3587 1654} __packed;
b481de9c
ZY
1655
1656/*
1657 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
2bdc7031 1658 *
767d055d 1659 * For agn devices only; 3945 uses REPLY_RATE_SCALE.
2bdc7031 1660 *
767d055d
WYG
1661 * Each station in the agn device's internal station table has its own table
1662 * of 16
2bdc7031
BC
1663 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1664 * an ACK is not received. This command replaces the entire table for
1665 * one station.
1666 *
767d055d
WYG
1667 * NOTE: Station must already be in agn device's station table.
1668 * Use REPLY_ADD_STA.
2bdc7031
BC
1669 *
1670 * The rate scaling procedures described below work well. Of course, other
1671 * procedures are possible, and may work better for particular environments.
1672 *
1673 *
1674 * FILLING THE RATE TABLE
1675 *
1676 * Given a particular initial rate and mode, as determined by the rate
1677 * scaling algorithm described below, the Linux driver uses the following
1678 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1679 * Link Quality command:
1680 *
1681 *
1682 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1683 * a) Use this same initial rate for first 3 entries.
1684 * b) Find next lower available rate using same mode (SISO or MIMO),
1685 * use for next 3 entries. If no lower rate available, switch to
7aafef1c 1686 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
2bdc7031
BC
1687 * c) If using MIMO, set command's mimo_delimiter to number of entries
1688 * using MIMO (3 or 6).
7aafef1c 1689 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
2bdc7031
BC
1690 * no MIMO, no short guard interval), at the next lower bit rate
1691 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1692 * legacy procedure for remaining table entries.
1693 *
1694 * 2) If using legacy initial rate:
1695 * a) Use the initial rate for only one entry.
1696 * b) For each following entry, reduce the rate to next lower available
1697 * rate, until reaching the lowest available rate.
1698 * c) When reducing rate, also switch antenna selection.
1699 * d) Once lowest available rate is reached, repeat this rate until
1700 * rate table is filled (16 entries), switching antenna each entry.
1701 *
1702 *
1703 * ACCUMULATING HISTORY
1704 *
767d055d
WYG
1705 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1706 * uses two sets of frame Tx success history: One for the current/active
1707 * modulation mode, and one for a speculative/search mode that is being
1708 * attempted. If the speculative mode turns out to be more effective (i.e.
1709 * actual transfer rate is better), then the driver continues to use the
1710 * speculative mode as the new current active mode.
2bdc7031
BC
1711 *
1712 * Each history set contains, separately for each possible rate, data for a
1713 * sliding window of the 62 most recent tx attempts at that rate. The data
1714 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1715 * and attempted frames, from which the driver can additionally calculate a
1716 * success ratio (success / attempted) and number of failures
1717 * (attempted - success), and control the size of the window (attempted).
1718 * The driver uses the bit map to remove successes from the success sum, as
1719 * the oldest tx attempts fall out of the window.
1720 *
767d055d
WYG
1721 * When the agn device makes multiple tx attempts for a given frame, each
1722 * attempt might be at a different rate, and have different modulation
1723 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1724 * up in the rate scaling table in the Link Quality command. The driver must
1725 * determine which rate table entry was used for each tx attempt, to determine
1726 * which rate-specific history to update, and record only those attempts that
2bdc7031
BC
1727 * match the modulation characteristics of the history set.
1728 *
1729 * When using block-ack (aggregation), all frames are transmitted at the same
a96a27f9 1730 * rate, since there is no per-attempt acknowledgment from the destination
2bdc7031
BC
1731 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1732 * rate_n_flags field. After receiving a block-ack, the driver can update
1733 * history for the entire block all at once.
1734 *
1735 *
1736 * FINDING BEST STARTING RATE:
1737 *
1738 * When working with a selected initial modulation mode (see below), the
1739 * driver attempts to find a best initial rate. The initial rate is the
1740 * first entry in the Link Quality command's rate table.
1741 *
1742 * 1) Calculate actual throughput (success ratio * expected throughput, see
1743 * table below) for current initial rate. Do this only if enough frames
1744 * have been attempted to make the value meaningful: at least 6 failed
1745 * tx attempts, or at least 8 successes. If not enough, don't try rate
1746 * scaling yet.
1747 *
1748 * 2) Find available rates adjacent to current initial rate. Available means:
1749 * a) supported by hardware &&
1750 * b) supported by association &&
1751 * c) within any constraints selected by user
1752 *
1753 * 3) Gather measured throughputs for adjacent rates. These might not have
1754 * enough history to calculate a throughput. That's okay, we might try
1755 * using one of them anyway!
1756 *
1757 * 4) Try decreasing rate if, for current rate:
1758 * a) success ratio is < 15% ||
1759 * b) lower adjacent rate has better measured throughput ||
1760 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1761 *
1762 * As a sanity check, if decrease was determined above, leave rate
1763 * unchanged if:
1764 * a) lower rate unavailable
1765 * b) success ratio at current rate > 85% (very good)
1766 * c) current measured throughput is better than expected throughput
1767 * of lower rate (under perfect 100% tx conditions, see table below)
1768 *
1769 * 5) Try increasing rate if, for current rate:
1770 * a) success ratio is < 15% ||
1771 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1772 * b) higher adjacent rate has better measured throughput ||
1773 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1774 *
1775 * As a sanity check, if increase was determined above, leave rate
1776 * unchanged if:
1777 * a) success ratio at current rate < 70%. This is not particularly
1778 * good performance; higher rate is sure to have poorer success.
1779 *
1780 * 6) Re-evaluate the rate after each tx frame. If working with block-
1781 * acknowledge, history and statistics may be calculated for the entire
1782 * block (including prior history that fits within the history windows),
1783 * before re-evaluation.
1784 *
1785 * FINDING BEST STARTING MODULATION MODE:
1786 *
1787 * After working with a modulation mode for a "while" (and doing rate scaling),
1788 * the driver searches for a new initial mode in an attempt to improve
1789 * throughput. The "while" is measured by numbers of attempted frames:
1790 *
1791 * For legacy mode, search for new mode after:
1792 * 480 successful frames, or 160 failed frames
1793 * For high-throughput modes (SISO or MIMO), search for new mode after:
1794 * 4500 successful frames, or 400 failed frames
1795 *
1796 * Mode switch possibilities are (3 for each mode):
1797 *
1798 * For legacy:
1799 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1800 * For SISO:
1801 * Change antenna, try MIMO, try shortened guard interval (SGI)
1802 * For MIMO:
1803 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1804 *
1805 * When trying a new mode, use the same bit rate as the old/current mode when
1806 * trying antenna switches and shortened guard interval. When switching to
1807 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1808 * for which the expected throughput (under perfect conditions) is about the
1809 * same or slightly better than the actual measured throughput delivered by
1810 * the old/current mode.
1811 *
1812 * Actual throughput can be estimated by multiplying the expected throughput
1813 * by the success ratio (successful / attempted tx frames). Frame size is
1814 * not considered in this calculation; it assumes that frame size will average
1815 * out to be fairly consistent over several samples. The following are
1816 * metric values for expected throughput assuming 100% success ratio.
1817 * Only G band has support for CCK rates:
1818 *
1819 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1820 *
1821 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1822 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1823 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1824 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1825 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1826 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1827 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1828 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1829 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1830 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1831 *
1832 * After the new mode has been tried for a short while (minimum of 6 failed
1833 * frames or 8 successful frames), compare success ratio and actual throughput
1834 * estimate of the new mode with the old. If either is better with the new
1835 * mode, continue to use the new mode.
1836 *
1837 * Continue comparing modes until all 3 possibilities have been tried.
1838 * If moving from legacy to HT, try all 3 possibilities from the new HT
1839 * mode. After trying all 3, a best mode is found. Continue to use this mode
1840 * for the longer "while" described above (e.g. 480 successful frames for
1841 * legacy), and then repeat the search process.
1842 *
b481de9c 1843 */
66c73db7 1844struct iwl_link_quality_cmd {
2bdc7031
BC
1845
1846 /* Index of destination/recipient station in uCode's station table */
b481de9c
ZY
1847 u8 sta_id;
1848 u8 reserved1;
2bdc7031 1849 __le16 control; /* not used */
66c73db7
TW
1850 struct iwl_link_qual_general_params general_params;
1851 struct iwl_link_qual_agg_params agg_params;
2bdc7031
BC
1852
1853 /*
1854 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1855 * specifies 1st Tx rate attempted, via index into this table.
767d055d 1856 * agn devices works its way through table when retrying Tx.
2bdc7031 1857 */
b481de9c 1858 struct {
2bdc7031 1859 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
b481de9c
ZY
1860 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1861 __le32 reserved2;
ba2d3587 1862} __packed;
b481de9c 1863
dab1c161
WYG
1864/*
1865 * BT configuration enable flags:
1866 * bit 0 - 1: BT channel announcement enabled
1867 * 0: disable
1868 * bit 1 - 1: priority of BT device enabled
1869 * 0: disable
1870 * bit 2 - 1: BT 2 wire support enabled
1871 * 0: disable
1872 */
456d0f76 1873#define BT_COEX_DISABLE (0x0)
dab1c161
WYG
1874#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1875#define BT_ENABLE_PRIORITY BIT(1)
1876#define BT_ENABLE_2_WIRE BIT(2)
456d0f76 1877
06702a73
WYG
1878#define BT_COEX_DISABLE (0x0)
1879#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1880
456d0f76
WYG
1881#define BT_LEAD_TIME_MIN (0x0)
1882#define BT_LEAD_TIME_DEF (0x1E)
1883#define BT_LEAD_TIME_MAX (0xFF)
1884
1885#define BT_MAX_KILL_MIN (0x1)
1886#define BT_MAX_KILL_DEF (0x5)
1887#define BT_MAX_KILL_MAX (0xFF)
1888
22bf59a0
WYG
1889#define BT_DURATION_LIMIT_DEF 625
1890#define BT_DURATION_LIMIT_MAX 1250
1891#define BT_DURATION_LIMIT_MIN 625
1892
1893#define BT_ON_THRESHOLD_DEF 4
1894#define BT_ON_THRESHOLD_MAX 1000
1895#define BT_ON_THRESHOLD_MIN 1
1896
1897#define BT_FRAG_THRESHOLD_DEF 0
1898#define BT_FRAG_THRESHOLD_MAX 0
1899#define BT_FRAG_THRESHOLD_MIN 0
1900
95a5ede3
WYG
1901#define BT_AGG_THRESHOLD_DEF 1200
1902#define BT_AGG_THRESHOLD_MAX 8000
1903#define BT_AGG_THRESHOLD_MIN 400
22bf59a0 1904
b481de9c
ZY
1905/*
1906 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
3058f021 1907 *
767d055d 1908 * 3945 and agn devices support hardware handshake with Bluetooth device on
3058f021 1909 * same platform. Bluetooth device alerts wireless device when it will Tx;
a96a27f9 1910 * wireless device can delay or kill its own Tx to accommodate.
b481de9c 1911 */
2aa6ab86 1912struct iwl_bt_cmd {
b481de9c
ZY
1913 u8 flags;
1914 u8 lead_time;
1915 u8 max_kill;
1916 u8 reserved;
1917 __le32 kill_ack_mask;
1918 __le32 kill_cts_mask;
ba2d3587 1919} __packed;
b481de9c 1920
b6e116e8 1921#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
670245ed 1922
b6e116e8
WYG
1923#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1924#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1925#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1926#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1927#define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1928#define IWLAGN_BT_FLAG_COEX_MODE_4W 3
670245ed 1929
eeb1f83f
WYG
1930#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1931/* Disable Sync PSPoll on SCO/eSCO */
1932#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
670245ed 1933
207ecc5e
MV
1934#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1935#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1936
b6e116e8
WYG
1937#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1938#define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1939#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
670245ed 1940
b6e116e8 1941#define IWLAGN_BT_MAX_KILL_DEFAULT 5
670245ed 1942
b6e116e8 1943#define IWLAGN_BT3_T7_DEFAULT 1
670245ed 1944
05433df2
WYG
1945#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1946#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
506aa156 1947#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
670245ed 1948
b6e116e8 1949#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
670245ed 1950
b6e116e8 1951#define IWLAGN_BT3_T2_DEFAULT 0xc
670245ed 1952
b6e116e8
WYG
1953#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1954#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1955#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1956#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1957#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1958#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1959#define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6))
1960#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
670245ed 1961
b6e116e8
WYG
1962#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1963 IWLAGN_BT_VALID_BOOST | \
1964 IWLAGN_BT_VALID_MAX_KILL | \
1965 IWLAGN_BT_VALID_3W_TIMERS | \
1966 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1967 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1968 IWLAGN_BT_VALID_BT4_TIMES | \
1969 IWLAGN_BT_VALID_3W_LUT)
670245ed 1970
6013270a 1971struct iwl_basic_bt_cmd {
670245ed
JB
1972 u8 flags;
1973 u8 ledtime; /* unused */
1974 u8 max_kill;
1975 u8 bt3_timer_t7_value;
1976 __le32 kill_ack_mask;
1977 __le32 kill_cts_mask;
1978 u8 bt3_prio_sample_time;
1979 u8 bt3_timer_t2_value;
1980 __le16 bt4_reaction_time; /* unused */
1981 __le32 bt3_lookup_table[12];
1982 __le16 bt4_decision_time; /* unused */
1983 __le16 valid;
6013270a
WYG
1984};
1985
1986struct iwl6000_bt_cmd {
1987 struct iwl_basic_bt_cmd basic;
670245ed 1988 u8 prio_boost;
b345f4da
WYG
1989 /*
1990 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1991 * if configure the following patterns
1992 */
1993 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1994 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
670245ed
JB
1995};
1996
d6f62655 1997struct iwl2000_bt_cmd {
6013270a 1998 struct iwl_basic_bt_cmd basic;
d6f62655
WYG
1999 __le32 prio_boost;
2000 /*
2001 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
2002 * if configure the following patterns
2003 */
2004 u8 reserved;
2005 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
2006 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
2007};
2008
b6e116e8 2009#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
9e4afc21 2010
b6e116e8 2011struct iwlagn_bt_sco_cmd {
9e4afc21
JB
2012 __le32 flags;
2013};
2014
b481de9c
ZY
2015/******************************************************************************
2016 * (6)
2017 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2018 *
2019 *****************************************************************************/
2020
2021/*
2022 * Spectrum Management
2023 */
2024#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2025 RXON_FILTER_CTL2HOST_MSK | \
2026 RXON_FILTER_ACCEPT_GRP_MSK | \
2027 RXON_FILTER_DIS_DECRYPT_MSK | \
2028 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2029 RXON_FILTER_ASSOC_MSK | \
2030 RXON_FILTER_BCON_AWARE_MSK)
2031
2aa6ab86 2032struct iwl_measure_channel {
b481de9c
ZY
2033 __le32 duration; /* measurement duration in extended beacon
2034 * format */
2035 u8 channel; /* channel to measure */
2aa6ab86 2036 u8 type; /* see enum iwl_measure_type */
b481de9c 2037 __le16 reserved;
ba2d3587 2038} __packed;
b481de9c
ZY
2039
2040/*
2041 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2042 */
2aa6ab86 2043struct iwl_spectrum_cmd {
b481de9c
ZY
2044 __le16 len; /* number of bytes starting from token */
2045 u8 token; /* token id */
2046 u8 id; /* measurement id -- 0 or 1 */
2047 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2048 u8 periodic; /* 1 = periodic */
2049 __le16 path_loss_timeout;
2050 __le32 start_time; /* start time in extended beacon format */
2051 __le32 reserved2;
2052 __le32 flags; /* rxon flags */
2053 __le32 filter_flags; /* rxon filter flags */
2054 __le16 channel_count; /* minimum 1, maximum 10 */
2055 __le16 reserved3;
2aa6ab86 2056 struct iwl_measure_channel channels[10];
ba2d3587 2057} __packed;
b481de9c
ZY
2058
2059/*
2060 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2061 */
2aa6ab86 2062struct iwl_spectrum_resp {
b481de9c
ZY
2063 u8 token;
2064 u8 id; /* id of the prior command replaced, or 0xff */
2065 __le16 status; /* 0 - command will be handled
2066 * 1 - cannot handle (conflicts with another
2067 * measurement) */
ba2d3587 2068} __packed;
b481de9c 2069
2aa6ab86 2070enum iwl_measurement_state {
b481de9c
ZY
2071 IWL_MEASUREMENT_START = 0,
2072 IWL_MEASUREMENT_STOP = 1,
2073};
2074
2aa6ab86 2075enum iwl_measurement_status {
b481de9c
ZY
2076 IWL_MEASUREMENT_OK = 0,
2077 IWL_MEASUREMENT_CONCURRENT = 1,
2078 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2079 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2080 /* 4-5 reserved */
2081 IWL_MEASUREMENT_STOPPED = 6,
2082 IWL_MEASUREMENT_TIMEOUT = 7,
2083 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2084};
2085
2086#define NUM_ELEMENTS_IN_HISTOGRAM 8
2087
2aa6ab86 2088struct iwl_measurement_histogram {
b481de9c
ZY
2089 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2090 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
ba2d3587 2091} __packed;
b481de9c
ZY
2092
2093/* clear channel availability counters */
2aa6ab86 2094struct iwl_measurement_cca_counters {
b481de9c
ZY
2095 __le32 ofdm;
2096 __le32 cck;
ba2d3587 2097} __packed;
b481de9c 2098
2aa6ab86 2099enum iwl_measure_type {
b481de9c
ZY
2100 IWL_MEASURE_BASIC = (1 << 0),
2101 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2102 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2103 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2104 IWL_MEASURE_FRAME = (1 << 4),
2105 /* bits 5:6 are reserved */
2106 IWL_MEASURE_IDLE = (1 << 7),
2107};
2108
2109/*
2110 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2111 */
2aa6ab86 2112struct iwl_spectrum_notification {
b481de9c
ZY
2113 u8 id; /* measurement id -- 0 or 1 */
2114 u8 token;
2115 u8 channel_index; /* index in measurement channel list */
2116 u8 state; /* 0 - start, 1 - stop */
2117 __le32 start_time; /* lower 32-bits of TSF */
2118 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2119 u8 channel;
2aa6ab86 2120 u8 type; /* see enum iwl_measurement_type */
b481de9c
ZY
2121 u8 reserved1;
2122 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2123 * valid if applicable for measurement type requested. */
2124 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2125 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2126 __le32 cca_time; /* channel load time in usecs */
2127 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2128 * unidentified */
2129 u8 reserved2[3];
2aa6ab86 2130 struct iwl_measurement_histogram histogram;
b481de9c 2131 __le32 stop_time; /* lower 32-bits of TSF */
2aa6ab86 2132 __le32 status; /* see iwl_measurement_status */
ba2d3587 2133} __packed;
b481de9c
ZY
2134
2135/******************************************************************************
2136 * (7)
2137 * Power Management Commands, Responses, Notifications:
2138 *
2139 *****************************************************************************/
2140
2141/**
ca579617 2142 * struct iwl_powertable_cmd - Power Table Command
b481de9c
ZY
2143 * @flags: See below:
2144 *
2145 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2146 *
2147 * PM allow:
2148 * bit 0 - '0' Driver not allow power management
2149 * '1' Driver allow PM (use rest of parameters)
e312c24c 2150 *
b481de9c
ZY
2151 * uCode send sleep notifications:
2152 * bit 1 - '0' Don't send sleep notification
2153 * '1' send sleep notification (SEND_PM_NOTIFICATION)
e312c24c 2154 *
b481de9c
ZY
2155 * Sleep over DTIM
2156 * bit 2 - '0' PM have to walk up every DTIM
2157 * '1' PM could sleep over DTIM till listen Interval.
e312c24c 2158 *
b481de9c 2159 * PCI power managed
e7b63581
TW
2160 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2161 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
e312c24c
JB
2162 *
2163 * Fast PD
2164 * bit 4 - '1' Put radio to sleep when receiving frame for others
2165 *
b481de9c
ZY
2166 * Force sleep Modes
2167 * bit 31/30- '00' use both mac/xtal sleeps
2168 * '01' force Mac sleep
2169 * '10' force xtal sleep
2170 * '11' Illegal set
2171 *
2172 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
a96a27f9 2173 * ucode assume sleep over DTIM is allowed and we don't need to wake up
b481de9c
ZY
2174 * for every DTIM.
2175 */
2176#define IWL_POWER_VEC_SIZE 5
2177
600c0e11 2178#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
35162ba7
WYG
2179#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2180#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
600c0e11
TW
2181#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2182#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2183#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
97badb0e
WYG
2184#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2185#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2186#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2187#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
35162ba7 2188#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
600c0e11 2189
ca579617 2190struct iwl_powertable_cmd {
b481de9c 2191 __le16 flags;
600c0e11
TW
2192 u8 keep_alive_seconds; /* 3945 reserved */
2193 u8 debug_flags; /* 3945 reserved */
b481de9c
ZY
2194 __le32 rx_data_timeout;
2195 __le32 tx_data_timeout;
2196 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2197 __le32 keep_alive_beacons;
ba2d3587 2198} __packed;
b481de9c
ZY
2199
2200/*
2201 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
767d055d 2202 * all devices identical.
b481de9c 2203 */
2aa6ab86 2204struct iwl_sleep_notification {
b481de9c
ZY
2205 u8 pm_sleep_mode;
2206 u8 pm_wakeup_src;
2207 __le16 reserved;
2208 __le32 sleep_time;
2209 __le32 tsf_low;
2210 __le32 bcon_timer;
ba2d3587 2211} __packed;
b481de9c 2212
767d055d 2213/* Sleep states. all devices identical. */
b481de9c
ZY
2214enum {
2215 IWL_PM_NO_SLEEP = 0,
2216 IWL_PM_SLP_MAC = 1,
2217 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2218 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2219 IWL_PM_SLP_PHY = 4,
2220 IWL_PM_SLP_REPENT = 5,
2221 IWL_PM_WAKEUP_BY_TIMER = 6,
2222 IWL_PM_WAKEUP_BY_DRIVER = 7,
2223 IWL_PM_WAKEUP_BY_RFKILL = 8,
2224 /* 3 reserved */
2225 IWL_PM_NUM_OF_MODES = 12,
2226};
2227
2228/*
2229 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2230 */
2231#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2232#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2233#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2aa6ab86 2234struct iwl_card_state_cmd {
b481de9c 2235 __le32 status; /* CARD_STATE_CMD_* request new power state */
ba2d3587 2236} __packed;
b481de9c
ZY
2237
2238/*
2239 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2240 */
2aa6ab86 2241struct iwl_card_state_notif {
b481de9c 2242 __le32 flags;
ba2d3587 2243} __packed;
b481de9c
ZY
2244
2245#define HW_CARD_DISABLED 0x01
2246#define SW_CARD_DISABLED 0x02
3a41bbd5 2247#define CT_CARD_DISABLED 0x04
b481de9c
ZY
2248#define RXON_CARD_DISABLED 0x10
2249
47f4a587 2250struct iwl_ct_kill_config {
b481de9c
ZY
2251 __le32 reserved;
2252 __le32 critical_temperature_M;
2253 __le32 critical_temperature_R;
ba2d3587 2254} __packed;
b481de9c 2255
672639de
WYG
2256/* 1000, and 6x00 */
2257struct iwl_ct_kill_throttling_config {
2258 __le32 critical_temperature_exit;
2259 __le32 reserved;
2260 __le32 critical_temperature_enter;
ba2d3587 2261} __packed;
672639de 2262
b481de9c
ZY
2263/******************************************************************************
2264 * (8)
2265 * Scan Commands, Responses, Notifications:
2266 *
2267 *****************************************************************************/
2268
51e9bf5d
HH
2269#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2270#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
d16dc48a 2271
3058f021 2272/**
2a421b91 2273 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
3058f021
BC
2274 *
2275 * One for each channel in the scan list.
2276 * Each channel can independently select:
2277 * 1) SSID for directed active scans
2278 * 2) Txpower setting (for rate specified within Tx command)
2279 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2280 * quiet_plcp_th, good_CRC_th)
2281 *
2282 * To avoid uCode errors, make sure the following are true (see comments
2a421b91 2283 * under struct iwl_scan_cmd about max_out_time and quiet_time):
3058f021
BC
2284 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2285 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2286 * 2) quiet_time <= active_dwell
2287 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2288 * passive_dwell < max_out_time
2289 * active_dwell < max_out_time
2290 */
3d24a9f7 2291
2a421b91 2292struct iwl_scan_channel {
3058f021
BC
2293 /*
2294 * type is defined as:
2295 * 0:0 1 = active, 0 = passive
d16dc48a 2296 * 1:20 SSID direct bit map; if a bit is set, then corresponding
3058f021 2297 * SSID IE is transmitted in probe request.
d16dc48a 2298 * 21:31 reserved
b481de9c 2299 */
d16dc48a
TW
2300 __le32 type;
2301 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
f53696de
TW
2302 u8 tx_gain; /* gain for analog radio */
2303 u8 dsp_atten; /* gain for DSP */
3058f021
BC
2304 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2305 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
ba2d3587 2306} __packed;
b481de9c 2307
0d21044e
WT
2308/* set number of direct probes __le32 type */
2309#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2310
3058f021 2311/**
2a421b91 2312 * struct iwl_ssid_ie - directed scan network information element
3058f021 2313 *
2a3b793d
BC
2314 * Up to 20 of these may appear in REPLY_SCAN_CMD (Note: Only 4 are in
2315 * 3945 SCAN api), selected by "type" bit field in struct iwl_scan_channel;
2316 * each channel may select different ssids from among the 20 (4) entries.
2317 * SSID IEs get transmitted in reverse order of entry.
3058f021 2318 */
2a421b91 2319struct iwl_ssid_ie {
b481de9c
ZY
2320 u8 id;
2321 u8 len;
2322 u8 ssid[32];
ba2d3587 2323} __packed;
b481de9c 2324
9b3bf06a
JB
2325#define PROBE_OPTION_MAX_3945 4
2326#define PROBE_OPTION_MAX 20
51e9bf5d 2327#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
96ff5641
JB
2328#define IWL_GOOD_CRC_TH_DISABLED 0
2329#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2330#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
b481de9c 2331#define IWL_MAX_SCAN_SIZE 1024
89612124 2332#define IWL_MAX_CMD_SIZE 4096
b481de9c
ZY
2333
2334/*
2335 * REPLY_SCAN_CMD = 0x80 (command)
3058f021
BC
2336 *
2337 * The hardware scan command is very powerful; the driver can set it up to
2338 * maintain (relatively) normal network traffic while doing a scan in the
2339 * background. The max_out_time and suspend_time control the ratio of how
2340 * long the device stays on an associated network channel ("service channel")
2341 * vs. how long it's away from the service channel, i.e. tuned to other channels
2342 * for scanning.
2343 *
2344 * max_out_time is the max time off-channel (in usec), and suspend_time
2345 * is how long (in "extended beacon" format) that the scan is "suspended"
2346 * after returning to the service channel. That is, suspend_time is the
2347 * time that we stay on the service channel, doing normal work, between
2348 * scan segments. The driver may set these parameters differently to support
2349 * scanning when associated vs. not associated, and light vs. heavy traffic
2350 * loads when associated.
2351 *
2352 * After receiving this command, the device's scan engine does the following;
2353 *
2354 * 1) Sends SCAN_START notification to driver
2355 * 2) Checks to see if it has time to do scan for one channel
2356 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2357 * to tell AP that we're going off-channel
2358 * 4) Tunes to first channel in scan list, does active or passive scan
2359 * 5) Sends SCAN_RESULT notification to driver
2360 * 6) Checks to see if it has time to do scan on *next* channel in list
2361 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2362 * before max_out_time expires
2363 * 8) Returns to service channel
2364 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2365 * 10) Stays on service channel until suspend_time expires
2366 * 11) Repeats entire process 2-10 until list is complete
2367 * 12) Sends SCAN_COMPLETE notification
2368 *
2369 * For fast, efficient scans, the scan command also has support for staying on
2370 * a channel for just a short time, if doing active scanning and getting no
2371 * responses to the transmitted probe request. This time is controlled by
2372 * quiet_time, and the number of received packets below which a channel is
2373 * considered "quiet" is controlled by quiet_plcp_threshold.
2374 *
2375 * For active scanning on channels that have regulatory restrictions against
2376 * blindly transmitting, the scan can listen before transmitting, to make sure
2377 * that there is already legitimate activity on the channel. If enough
2378 * packets are cleanly received on the channel (controlled by good_CRC_th,
2379 * typical value 1), the scan engine starts transmitting probe requests.
2380 *
2381 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2382 *
2383 * To avoid uCode errors, see timing restrictions described under
2a421b91 2384 * struct iwl_scan_channel.
b481de9c 2385 */
3d24a9f7 2386
266af4c7
JB
2387enum iwl_scan_flags {
2388 /* BIT(0) currently unused */
2389 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2390 /* bits 2-7 reserved */
2391};
2392
2a421b91 2393struct iwl_scan_cmd {
b481de9c 2394 __le16 len;
266af4c7 2395 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
3058f021
BC
2396 u8 channel_count; /* # channels in channel list */
2397 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2398 * (only for active scan) */
2399 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2400 __le16 good_CRC_th; /* passive -> active promotion threshold */
2401 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2402 __le32 max_out_time; /* max usec to be away from associated (service)
2403 * channel */
2404 __le32 suspend_time; /* pause scan this long (in "extended beacon
2405 * format") when returning to service chnl:
2406 * 3945; 31:24 # beacons, 19:0 additional usec,
2407 * 4965; 31:22 # beacons, 21:0 additional usec.
2408 */
2409 __le32 flags; /* RXON_FLG_* */
2410 __le32 filter_flags; /* RXON_FILTER_* */
2411
2412 /* For active scans (set to all-0s for passive scans).
2413 * Does not include payload. Must specify Tx rate; no rate scaling. */
83d527d9 2414 struct iwl_tx_cmd tx_cmd;
3058f021
BC
2415
2416 /* For directed active scans (set to all-0s otherwise) */
2a421b91 2417 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
b481de9c 2418
b481de9c 2419 /*
3058f021
BC
2420 * Probe request frame, followed by channel list.
2421 *
2422 * Size of probe request frame is specified by byte count in tx_cmd.
2423 * Channel list follows immediately after probe request frame.
2424 * Number of channels in list is specified by channel_count.
2425 * Each channel in list is of type:
b481de9c 2426 *
2aa6ab86 2427 * struct iwl_scan_channel channels[0];
b481de9c
ZY
2428 *
2429 * NOTE: Only one band of channels can be scanned per pass. You
3058f021
BC
2430 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2431 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2432 * before requesting another scan.
b481de9c 2433 */
3058f021 2434 u8 data[0];
ba2d3587 2435} __packed;
b481de9c
ZY
2436
2437/* Can abort will notify by complete notification with abort status. */
51e9bf5d 2438#define CAN_ABORT_STATUS cpu_to_le32(0x1)
b481de9c
ZY
2439/* complete notification statuses */
2440#define ABORT_STATUS 0x2
2441
2442/*
2443 * REPLY_SCAN_CMD = 0x80 (response)
2444 */
2a421b91 2445struct iwl_scanreq_notification {
b481de9c 2446 __le32 status; /* 1: okay, 2: cannot fulfill request */
ba2d3587 2447} __packed;
b481de9c
ZY
2448
2449/*
2450 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2451 */
2a421b91 2452struct iwl_scanstart_notification {
b481de9c
ZY
2453 __le32 tsf_low;
2454 __le32 tsf_high;
2455 __le32 beacon_timer;
2456 u8 channel;
2457 u8 band;
2458 u8 reserved[2];
2459 __le32 status;
ba2d3587 2460} __packed;
b481de9c
ZY
2461
2462#define SCAN_OWNER_STATUS 0x1;
2463#define MEASURE_OWNER_STATUS 0x2;
2464
0288d237
JB
2465#define IWL_PROBE_STATUS_OK 0
2466#define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2467/* error statuses combined with TX_FAILED */
2468#define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2469#define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2470
b481de9c
ZY
2471#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2472/*
2473 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2474 */
2a421b91 2475struct iwl_scanresults_notification {
b481de9c
ZY
2476 u8 channel;
2477 u8 band;
0288d237
JB
2478 u8 probe_status;
2479 u8 num_probe_not_sent; /* not enough time to send */
b481de9c
ZY
2480 __le32 tsf_low;
2481 __le32 tsf_high;
2482 __le32 statistics[NUMBER_OF_STATISTICS];
ba2d3587 2483} __packed;
b481de9c
ZY
2484
2485/*
2486 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2487 */
2a421b91 2488struct iwl_scancomplete_notification {
b481de9c
ZY
2489 u8 scanned_channels;
2490 u8 status;
f78e5454 2491 u8 bt_status; /* BT On/Off status */
b481de9c
ZY
2492 u8 last_channel;
2493 __le32 tsf_low;
2494 __le32 tsf_high;
ba2d3587 2495} __packed;
b481de9c
ZY
2496
2497
2498/******************************************************************************
2499 * (9)
2500 * IBSS/AP Commands and Notifications:
2501 *
2502 *****************************************************************************/
2503
a85d7cca
JB
2504enum iwl_ibss_manager {
2505 IWL_NOT_IBSS_MANAGER = 0,
2506 IWL_IBSS_MANAGER = 1,
2507};
2508
b481de9c
ZY
2509/*
2510 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2511 */
3d24a9f7 2512
241887a2
JB
2513struct iwlagn_beacon_notif {
2514 struct iwlagn_tx_resp beacon_notify_hdr;
2515 __le32 low_tsf;
2516 __le32 high_tsf;
2517 __le32 ibss_mgr_status;
2518} __packed;
2519
b481de9c
ZY
2520/*
2521 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2522 */
3d24a9f7 2523
4bf64efd 2524struct iwl_tx_beacon_cmd {
83d527d9 2525 struct iwl_tx_cmd tx;
b481de9c
ZY
2526 __le16 tim_idx;
2527 u8 tim_size;
2528 u8 reserved1;
2529 struct ieee80211_hdr frame[0]; /* beacon frame */
ba2d3587 2530} __packed;
b481de9c
ZY
2531
2532/******************************************************************************
2533 * (10)
2534 * Statistics Commands and Notifications:
2535 *
2536 *****************************************************************************/
2537
2538#define IWL_TEMP_CONVERT 260
2539
2540#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2541#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2542#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2543
2544/* Used for passing to driver number of successes and failures per rate */
2545struct rate_histogram {
2546 union {
2547 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2548 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2549 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2550 } success;
2551 union {
2552 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2553 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2554 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2555 } failed;
ba2d3587 2556} __packed;
b481de9c
ZY
2557
2558/* statistics command response */
2559
3d24a9f7
TW
2560struct statistics_dbg {
2561 __le32 burst_check;
2562 __le32 burst_count;
7c094c5c
WYG
2563 __le32 wait_for_silence_timeout_cnt;
2564 __le32 reserved[3];
ba2d3587 2565} __packed;
3d24a9f7 2566
b481de9c
ZY
2567struct statistics_rx_phy {
2568 __le32 ina_cnt;
2569 __le32 fina_cnt;
2570 __le32 plcp_err;
2571 __le32 crc32_err;
2572 __le32 overrun_err;
2573 __le32 early_overrun_err;
2574 __le32 crc32_good;
2575 __le32 false_alarm_cnt;
2576 __le32 fina_sync_err_cnt;
2577 __le32 sfd_timeout;
2578 __le32 fina_timeout;
2579 __le32 unresponded_rts;
2580 __le32 rxe_frame_limit_overrun;
2581 __le32 sent_ack_cnt;
2582 __le32 sent_cts_cnt;
b481de9c
ZY
2583 __le32 sent_ba_rsp_cnt;
2584 __le32 dsp_self_kill;
2585 __le32 mh_format_err;
2586 __le32 re_acq_main_rssi_sum;
2587 __le32 reserved3;
ba2d3587 2588} __packed;
b481de9c 2589
b481de9c
ZY
2590struct statistics_rx_ht_phy {
2591 __le32 plcp_err;
2592 __le32 overrun_err;
2593 __le32 early_overrun_err;
2594 __le32 crc32_good;
2595 __le32 crc32_err;
2596 __le32 mh_format_err;
2597 __le32 agg_crc32_good;
2598 __le32 agg_mpdu_cnt;
2599 __le32 agg_cnt;
f0118a45 2600 __le32 unsupport_mcs;
ba2d3587 2601} __packed;
b481de9c 2602
c1b4aa3f 2603#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
34c22cf9 2604
b481de9c
ZY
2605struct statistics_rx_non_phy {
2606 __le32 bogus_cts; /* CTS received when not expecting CTS */
2607 __le32 bogus_ack; /* ACK received when not expecting ACK */
2608 __le32 non_bssid_frames; /* number of frames with BSSID that
2609 * doesn't belong to the STA BSSID */
2610 __le32 filtered_frames; /* count frames that were dumped in the
2611 * filtering process */
2612 __le32 non_channel_beacons; /* beacons with our bss id but not on
2613 * our serving channel */
b481de9c
ZY
2614 __le32 channel_beacons; /* beacons with our bss id and in our
2615 * serving channel */
2616 __le32 num_missed_bcon; /* number of missed beacons */
2617 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2618 * ADC was in saturation */
2619 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2620 * for INA */
2621 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2622 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2623 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2624 __le32 interference_data_flag; /* flag for interference data
2625 * availability. 1 when data is
2626 * available. */
3058f021 2627 __le32 channel_load; /* counts RX Enable time in uSec */
b481de9c
ZY
2628 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2629 * and CCK) counter */
2630 __le32 beacon_rssi_a;
2631 __le32 beacon_rssi_b;
2632 __le32 beacon_rssi_c;
2633 __le32 beacon_energy_a;
2634 __le32 beacon_energy_b;
2635 __le32 beacon_energy_c;
ba2d3587 2636} __packed;
b481de9c 2637
325322ee
WYG
2638struct statistics_rx_non_phy_bt {
2639 struct statistics_rx_non_phy common;
2640 /* additional stats for bt */
2641 __le32 num_bt_kills;
2642 __le32 reserved[2];
da22f795 2643} __packed;
325322ee 2644
b481de9c
ZY
2645struct statistics_rx {
2646 struct statistics_rx_phy ofdm;
2647 struct statistics_rx_phy cck;
2648 struct statistics_rx_non_phy general;
b481de9c 2649 struct statistics_rx_ht_phy ofdm_ht;
ba2d3587 2650} __packed;
b481de9c 2651
325322ee
WYG
2652struct statistics_rx_bt {
2653 struct statistics_rx_phy ofdm;
2654 struct statistics_rx_phy cck;
2655 struct statistics_rx_non_phy_bt general;
2656 struct statistics_rx_ht_phy ofdm_ht;
da22f795 2657} __packed;
325322ee 2658
fcbaf8b0
WYG
2659/**
2660 * struct statistics_tx_power - current tx power
2661 *
2662 * @ant_a: current tx power on chain a in 1/2 dB step
2663 * @ant_b: current tx power on chain b in 1/2 dB step
2664 * @ant_c: current tx power on chain c in 1/2 dB step
2665 */
2666struct statistics_tx_power {
2667 u8 ant_a;
2668 u8 ant_b;
2669 u8 ant_c;
2670 u8 reserved;
ba2d3587 2671} __packed;
fcbaf8b0 2672
b481de9c
ZY
2673struct statistics_tx_non_phy_agg {
2674 __le32 ba_timeout;
2675 __le32 ba_reschedule_frames;
2676 __le32 scd_query_agg_frame_cnt;
2677 __le32 scd_query_no_agg;
2678 __le32 scd_query_agg;
2679 __le32 scd_query_mismatch;
2680 __le32 frame_not_ready;
2681 __le32 underrun;
2682 __le32 bt_prio_kill;
2683 __le32 rx_ba_rsp_cnt;
ba2d3587 2684} __packed;
b481de9c
ZY
2685
2686struct statistics_tx {
2687 __le32 preamble_cnt;
2688 __le32 rx_detected_cnt;
2689 __le32 bt_prio_defer_cnt;
2690 __le32 bt_prio_kill_cnt;
2691 __le32 few_bytes_cnt;
2692 __le32 cts_timeout;
2693 __le32 ack_timeout;
2694 __le32 expected_ack_cnt;
2695 __le32 actual_ack_cnt;
b481de9c
ZY
2696 __le32 dump_msdu_cnt;
2697 __le32 burst_abort_next_frame_mismatch_cnt;
2698 __le32 burst_abort_missing_next_frame_cnt;
2699 __le32 cts_timeout_collision;
2700 __le32 ack_or_ba_timeout_collision;
2701 struct statistics_tx_non_phy_agg agg;
470356b8
WYG
2702 /*
2703 * "tx_power" are optional parameters provided by uCode,
2704 * 6000 series is the only device provide the information,
2705 * Those are reserved fields for all the other devices
2706 */
fcbaf8b0
WYG
2707 struct statistics_tx_power tx_power;
2708 __le32 reserved1;
ba2d3587 2709} __packed;
b481de9c 2710
b481de9c
ZY
2711
2712struct statistics_div {
2713 __le32 tx_on_a;
2714 __le32 tx_on_b;
2715 __le32 exec_time;
2716 __le32 probe_time;
b481de9c
ZY
2717 __le32 reserved1;
2718 __le32 reserved2;
ba2d3587 2719} __packed;
b481de9c 2720
325322ee 2721struct statistics_general_common {
f0118a45
WYG
2722 __le32 temperature; /* radio temperature */
2723 __le32 temperature_m; /* for 5000 and up, this is radio voltage */
b481de9c
ZY
2724 struct statistics_dbg dbg;
2725 __le32 sleep_time;
2726 __le32 slots_out;
2727 __le32 slots_idle;
2728 __le32 ttl_timestamp;
2729 struct statistics_div div;
b481de9c 2730 __le32 rx_enable_counter;
11fc5249
WYG
2731 /*
2732 * num_of_sos_states:
2733 * count the number of times we have to re-tune
2734 * in order to get out of bad PHY status
2735 */
2736 __le32 num_of_sos_states;
da22f795 2737} __packed;
325322ee
WYG
2738
2739struct statistics_bt_activity {
2740 /* Tx statistics */
2741 __le32 hi_priority_tx_req_cnt;
2742 __le32 hi_priority_tx_denied_cnt;
2743 __le32 lo_priority_tx_req_cnt;
2744 __le32 lo_priority_tx_denied_cnt;
2745 /* Rx statistics */
2746 __le32 hi_priority_rx_req_cnt;
2747 __le32 hi_priority_rx_denied_cnt;
2748 __le32 lo_priority_rx_req_cnt;
2749 __le32 lo_priority_rx_denied_cnt;
da22f795 2750} __packed;
325322ee
WYG
2751
2752struct statistics_general {
2753 struct statistics_general_common common;
2754 __le32 reserved2;
2755 __le32 reserved3;
da22f795 2756} __packed;
325322ee
WYG
2757
2758struct statistics_general_bt {
2759 struct statistics_general_common common;
2760 struct statistics_bt_activity activity;
b481de9c
ZY
2761 __le32 reserved2;
2762 __le32 reserved3;
ba2d3587 2763} __packed;
b481de9c 2764
ef8d5529
WYG
2765#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2766#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2767#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2768
b481de9c
ZY
2769/*
2770 * REPLY_STATISTICS_CMD = 0x9c,
767d055d 2771 * all devices identical.
b481de9c
ZY
2772 *
2773 * This command triggers an immediate response containing uCode statistics.
2774 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2775 *
2776 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2777 * internal copy of the statistics (counters) after issuing the response.
2778 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2779 *
2780 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2781 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2782 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2783 */
51e9bf5d
HH
2784#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2785#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
8f91aecb 2786struct iwl_statistics_cmd {
b481de9c 2787 __le32 configuration_flags; /* IWL_STATS_CONF_* */
ba2d3587 2788} __packed;
b481de9c
ZY
2789
2790/*
2791 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2792 *
2793 * By default, uCode issues this notification after receiving a beacon
2794 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2795 * REPLY_STATISTICS_CMD 0x9c, above.
2796 *
2797 * Statistics counters continue to increment beacon after beacon, but are
2798 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2799 * 0x9c with CLEAR_STATS bit set (see above).
2800 *
2801 * uCode also issues this notification during scans. uCode clears statistics
2802 * appropriately so that each notification contains statistics for only the
2803 * one channel that has just been scanned.
2804 */
51e9bf5d 2805#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
7aafef1c 2806#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
3d24a9f7 2807
8f91aecb 2808struct iwl_notif_statistics {
b481de9c
ZY
2809 __le32 flag;
2810 struct statistics_rx rx;
2811 struct statistics_tx tx;
2812 struct statistics_general general;
ba2d3587 2813} __packed;
b481de9c 2814
325322ee
WYG
2815struct iwl_bt_notif_statistics {
2816 __le32 flag;
2817 struct statistics_rx_bt rx;
2818 struct statistics_tx tx;
2819 struct statistics_general_bt general;
da22f795 2820} __packed;
b481de9c
ZY
2821
2822/*
2823 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
a13d276f
WYG
2824 *
2825 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2826 * in regardless of how many missed beacons, which mean when driver receive the
2827 * notification, inside the command, it can find all the beacons information
2828 * which include number of total missed beacons, number of consecutive missed
2829 * beacons, number of beacons received and number of beacons expected to
2830 * receive.
2831 *
2832 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2833 * in order to bring the radio/PHY back to working state; which has no relation
2834 * to when driver will perform sensitivity calibration.
2835 *
2836 * Driver should set it own missed_beacon_threshold to decide when to perform
2837 * sensitivity calibration based on number of consecutive missed beacons in
2838 * order to improve overall performance, especially in noisy environment.
2839 *
b481de9c 2840 */
a13d276f
WYG
2841
2842#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2843#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2844#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
b481de9c 2845
2aa6ab86 2846struct iwl_missed_beacon_notif {
a13d276f 2847 __le32 consecutive_missed_beacons;
b481de9c
ZY
2848 __le32 total_missed_becons;
2849 __le32 num_expected_beacons;
2850 __le32 num_recvd_beacons;
ba2d3587 2851} __packed;
b481de9c 2852
f7d09d7c 2853
b481de9c
ZY
2854/******************************************************************************
2855 * (11)
2856 * Rx Calibration Commands:
2857 *
f7d09d7c
BC
2858 * With the uCode used for open source drivers, most Tx calibration (except
2859 * for Tx Power) and most Rx calibration is done by uCode during the
2860 * "initialize" phase of uCode boot. Driver must calibrate only:
2861 *
2862 * 1) Tx power (depends on temperature), described elsewhere
2863 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2864 * 3) Receiver sensitivity (to optimize signal detection)
2865 *
b481de9c
ZY
2866 *****************************************************************************/
2867
f7d09d7c
BC
2868/**
2869 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2870 *
2871 * This command sets up the Rx signal detector for a sensitivity level that
2872 * is high enough to lock onto all signals within the associated network,
2873 * but low enough to ignore signals that are below a certain threshold, so as
2874 * not to have too many "false alarms". False alarms are signals that the
2875 * Rx DSP tries to lock onto, but then discards after determining that they
2876 * are noise.
2877 *
2878 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2879 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2880 * time listening, not transmitting). Driver must adjust sensitivity so that
2881 * the ratio of actual false alarms to actual Rx time falls within this range.
2882 *
2883 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2884 * received beacon. These provide information to the driver to analyze the
2885 * sensitivity. Don't analyze statistics that come in from scanning, or any
2886 * other non-associated-network source. Pertinent statistics include:
2887 *
2888 * From "general" statistics (struct statistics_rx_non_phy):
2889 *
2890 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2891 * Measure of energy of desired signal. Used for establishing a level
2892 * below which the device does not detect signals.
2893 *
2894 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2895 * Measure of background noise in silent period after beacon.
2896 *
2897 * channel_load
2898 * uSecs of actual Rx time during beacon period (varies according to
2899 * how much time was spent transmitting).
2900 *
2901 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2902 *
2903 * false_alarm_cnt
2904 * Signal locks abandoned early (before phy-level header).
2905 *
2906 * plcp_err
2907 * Signal locks abandoned late (during phy-level header).
2908 *
2909 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2910 * beacon to beacon, i.e. each value is an accumulation of all errors
2911 * before and including the latest beacon. Values will wrap around to 0
2912 * after counting up to 2^32 - 1. Driver must differentiate vs.
2913 * previous beacon's values to determine # false alarms in the current
2914 * beacon period.
2915 *
2916 * Total number of false alarms = false_alarms + plcp_errs
2917 *
2918 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2919 * (notice that the start points for OFDM are at or close to settings for
2920 * maximum sensitivity):
2921 *
2922 * START / MIN / MAX
2923 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2924 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2925 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2926 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2927 *
2928 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2929 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2930 * by *adding* 1 to all 4 of the table entries above, up to the max for
2931 * each entry. Conversely, if false alarm rate is too low (less than 5
2932 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2933 * increase sensitivity.
2934 *
2935 * For CCK sensitivity, keep track of the following:
2936 *
2937 * 1). 20-beacon history of maximum background noise, indicated by
2938 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2939 * 3 receivers. For any given beacon, the "silence reference" is
2940 * the maximum of last 60 samples (20 beacons * 3 receivers).
2941 *
2942 * 2). 10-beacon history of strongest signal level, as indicated
2943 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2944 * i.e. the strength of the signal through the best receiver at the
2945 * moment. These measurements are "upside down", with lower values
2946 * for stronger signals, so max energy will be *minimum* value.
2947 *
2948 * Then for any given beacon, the driver must determine the *weakest*
2949 * of the strongest signals; this is the minimum level that needs to be
2950 * successfully detected, when using the best receiver at the moment.
2951 * "Max cck energy" is the maximum (higher value means lower energy!)
2952 * of the last 10 minima. Once this is determined, driver must add
2953 * a little margin by adding "6" to it.
2954 *
2955 * 3). Number of consecutive beacon periods with too few false alarms.
2956 * Reset this to 0 at the first beacon period that falls within the
2957 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2958 *
2959 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2960 * (notice that the start points for CCK are at maximum sensitivity):
2961 *
2962 * START / MIN / MAX
2963 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2964 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2965 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2966 *
2967 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2968 * (greater than 50 for each 204.8 msecs listening), method for reducing
2969 * sensitivity is:
2970 *
2971 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2972 * up to max 400.
2973 *
2974 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2975 * sensitivity has been reduced a significant amount; bring it up to
2976 * a moderate 161. Otherwise, *add* 3, up to max 200.
2977 *
2978 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2979 * sensitivity has been reduced only a moderate or small amount;
2980 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2981 * down to min 0. Otherwise (if gain has been significantly reduced),
2982 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2983 *
2984 * b) Save a snapshot of the "silence reference".
2985 *
2986 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2987 * (less than 5 for each 204.8 msecs listening), method for increasing
2988 * sensitivity is used only if:
2989 *
2990 * 1a) Previous beacon did not have too many false alarms
2991 * 1b) AND difference between previous "silence reference" and current
2992 * "silence reference" (prev - current) is 2 or more,
2993 * OR 2) 100 or more consecutive beacon periods have had rate of
2994 * less than 5 false alarms per 204.8 milliseconds rx time.
2995 *
2996 * Method for increasing sensitivity:
2997 *
2998 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2999 * down to min 125.
3000 *
3001 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
3002 * down to min 200.
3003 *
3004 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
3005 *
3006 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
3007 * (between 5 and 50 for each 204.8 msecs listening):
3008 *
3009 * 1) Save a snapshot of the silence reference.
3010 *
3011 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
3012 * give some extra margin to energy threshold by *subtracting* 8
3013 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
3014 *
3015 * For all cases (too few, too many, good range), make sure that the CCK
3016 * detection threshold (energy) is below the energy level for robust
3017 * detection over the past 10 beacon periods, the "Max cck energy".
3018 * Lower values mean higher energy; this means making sure that the value
3019 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3020 *
f7d09d7c
BC
3021 */
3022
3023/*
f0832f13 3024 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
f7d09d7c
BC
3025 */
3026#define HD_TABLE_SIZE (11) /* number of entries */
3027#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3028#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3029#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3030#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3031#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3032#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3033#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3034#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3035#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3036#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3037#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3038
c8312fac
WYG
3039/*
3040 * Additional table entries in enhance SENSITIVITY_CMD
3041 */
3042#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3043#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3044#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3045#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3046#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3047#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3048#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3049#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3050#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3051#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3052#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3053#define HD_RESERVED (22)
3054
3055/* number of entries for enhanced tbl */
3056#define ENHANCE_HD_TABLE_SIZE (23)
3057
3058/* number of additional entries for enhanced tbl */
3059#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3060
3061#define HD_INA_NON_SQUARE_DET_OFDM_DATA cpu_to_le16(0)
3062#define HD_INA_NON_SQUARE_DET_CCK_DATA cpu_to_le16(0)
3063#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA cpu_to_le16(0)
3064#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(668)
3065#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3066#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(486)
3067#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(37)
3068#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(853)
3069#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3070#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(476)
3071#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(99)
3072
3073
f0832f13 3074/* Control field in struct iwl_sensitivity_cmd */
51e9bf5d
HH
3075#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3076#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
b481de9c 3077
f7d09d7c 3078/**
f0832f13 3079 * struct iwl_sensitivity_cmd
f7d09d7c
BC
3080 * @control: (1) updates working table, (0) updates default table
3081 * @table: energy threshold values, use HD_* as index into table
3082 *
3083 * Always use "1" in "control" to update uCode's working table and DSP.
3084 */
f0832f13 3085struct iwl_sensitivity_cmd {
f7d09d7c
BC
3086 __le16 control; /* always use "1" */
3087 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
ba2d3587 3088} __packed;
b481de9c 3089
c8312fac
WYG
3090/*
3091 *
3092 */
3093struct iwl_enhance_sensitivity_cmd {
3094 __le16 control; /* always use "1" */
3095 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
0e954099 3096} __packed;
c8312fac 3097
f7d09d7c
BC
3098
3099/**
3100 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3101 *
767d055d 3102 * This command sets the relative gains of agn device's 3 radio receiver chains.
f7d09d7c
BC
3103 *
3104 * After the first association, driver should accumulate signal and noise
3105 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3106 * beacons from the associated network (don't collect statistics that come
3107 * in from scanning, or any other non-network source).
3108 *
3109 * DISCONNECTED ANTENNA:
3110 *
3111 * Driver should determine which antennas are actually connected, by comparing
3112 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3113 * following values over 20 beacons, one accumulator for each of the chains
3114 * a/b/c, from struct statistics_rx_non_phy:
3115 *
3116 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3117 *
3118 * Find the strongest signal from among a/b/c. Compare the other two to the
3119 * strongest. If any signal is more than 15 dB (times 20, unless you
3120 * divide the accumulated values by 20) below the strongest, the driver
3121 * considers that antenna to be disconnected, and should not try to use that
3122 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3123 * driver should declare the stronger one as connected, and attempt to use it
3124 * (A and B are the only 2 Tx chains!).
3125 *
3126 *
3127 * RX BALANCE:
3128 *
3129 * Driver should balance the 3 receivers (but just the ones that are connected
3130 * to antennas, see above) for gain, by comparing the average signal levels
3131 * detected during the silence after each beacon (background noise).
3132 * Accumulate (add) the following values over 20 beacons, one accumulator for
3133 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3134 *
3135 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3136 *
3137 * Find the weakest background noise level from among a/b/c. This Rx chain
3138 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3139 * finding noise difference:
3140 *
3141 * (accum_noise[i] - accum_noise[reference]) / 30
3142 *
3143 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3144 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3145 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3146 * and set bit 2 to indicate "reduce gain". The value for the reference
3147 * (weakest) chain should be "0".
3148 *
3149 * diff_gain_[abc] bit fields:
3150 * 2: (1) reduce gain, (0) increase gain
3151 * 1-0: amount of gain, units of 1.5 dB
3152 */
3153
f69f42a6 3154/* Phy calibration command for series */
642454cc
SZ
3155/* The default calibrate table size if not specified by firmware */
3156#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
33fd5033 3157enum {
f69f42a6
TW
3158 IWL_PHY_CALIBRATE_DC_CMD = 8,
3159 IWL_PHY_CALIBRATE_LO_CMD = 9,
f69f42a6 3160 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
f69f42a6
TW
3161 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3162 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3163 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
bf53f939
SZ
3164 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3165 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19,
33fd5033
EG
3166};
3167
6a822d06 3168#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253)
f69f42a6 3169
6d6a1afd
SZ
3170/* This enum defines the bitmap of various calibrations to enable in both
3171 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3172 */
3173enum iwl_ucode_calib_cfg {
45d50024
WYG
3174 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3175 IWL_CALIB_CFG_DC_IDX = BIT(1),
3176 IWL_CALIB_CFG_LO_IDX = BIT(2),
3177 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3178 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3179 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3180 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3181 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3182 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3183 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3184 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
6d6a1afd
SZ
3185};
3186
ad3f7124
WYG
3187#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3188 IWL_CALIB_CFG_DC_IDX | \
3189 IWL_CALIB_CFG_LO_IDX | \
3190 IWL_CALIB_CFG_TX_IQ_IDX | \
3191 IWL_CALIB_CFG_RX_IQ_IDX | \
3192 IWL_CALIB_CFG_NOISE_IDX | \
3193 IWL_CALIB_CFG_CRYSTAL_IDX | \
3194 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3195 IWL_CALIB_CFG_PAPD_IDX | \
3196 IWL_CALIB_CFG_SENSITIVITY_IDX | \
3197 IWL_CALIB_CFG_TX_PWR_IDX)
3198
3199#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
6d6a1afd 3200
7c616cba
TW
3201struct iwl_calib_cfg_elmnt_s {
3202 __le32 is_enable;
3203 __le32 start;
3204 __le32 send_res;
3205 __le32 apply_res;
3206 __le32 reserved;
ba2d3587 3207} __packed;
7c616cba
TW
3208
3209struct iwl_calib_cfg_status_s {
3210 struct iwl_calib_cfg_elmnt_s once;
3211 struct iwl_calib_cfg_elmnt_s perd;
3212 __le32 flags;
ba2d3587 3213} __packed;
7c616cba 3214
f69f42a6 3215struct iwl_calib_cfg_cmd {
7c616cba
TW
3216 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3217 struct iwl_calib_cfg_status_s drv_calib_cfg;
3218 __le32 reserved1;
ba2d3587 3219} __packed;
7c616cba 3220
f69f42a6 3221struct iwl_calib_hdr {
7c616cba
TW
3222 u8 op_code;
3223 u8 first_group;
3224 u8 groups_num;
3225 u8 data_valid;
ba2d3587 3226} __packed;
7c616cba 3227
f69f42a6
TW
3228struct iwl_calib_cmd {
3229 struct iwl_calib_hdr hdr;
be5d56ed 3230 u8 data[0];
ba2d3587 3231} __packed;
be5d56ed 3232
0d950d84
TW
3233struct iwl_calib_xtal_freq_cmd {
3234 struct iwl_calib_hdr hdr;
3235 u8 cap_pin1;
3236 u8 cap_pin2;
3237 u8 pad[2];
ba2d3587 3238} __packed;
33fd5033 3239
2e277996 3240#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
bf53f939
SZ
3241struct iwl_calib_temperature_offset_cmd {
3242 struct iwl_calib_hdr hdr;
2e277996
WYG
3243 __le16 radio_sensor_offset;
3244 __le16 reserved;
bf53f939
SZ
3245} __packed;
3246
0d950d84
TW
3247/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3248struct iwl_calib_chain_noise_reset_cmd {
3249 struct iwl_calib_hdr hdr;
3250 u8 data[0];
3251};
3252
3253/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
f69f42a6 3254struct iwl_calib_chain_noise_gain_cmd {
0d950d84 3255 struct iwl_calib_hdr hdr;
33fd5033
EG
3256 u8 delta_gain_1;
3257 u8 delta_gain_2;
0d950d84 3258 u8 pad[2];
ba2d3587 3259} __packed;
33fd5033 3260
b481de9c
ZY
3261/******************************************************************************
3262 * (12)
3263 * Miscellaneous Commands:
3264 *
3265 *****************************************************************************/
3266
3267/*
3268 * LEDs Command & Response
3269 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3270 *
3271 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3272 * this command turns it on or off, or sets up a periodic blinking cycle.
3273 */
ec1a7460 3274struct iwl_led_cmd {
b481de9c
ZY
3275 __le32 interval; /* "interval" in uSec */
3276 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3277 u8 off; /* # intervals off while blinking;
3278 * "0", with >0 "on" value, turns LED on */
3279 u8 on; /* # intervals on while blinking;
3280 * "0", regardless of "off", turns LED off */
3281 u8 reserved;
ba2d3587 3282} __packed;
b481de9c 3283
9636e583 3284/*
fe1bcbfd
WYG
3285 * station priority table entries
3286 * also used as potential "events" value for both
3287 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
9636e583 3288 */
1933ac4d
WYG
3289
3290/*
3291 * COEX events entry flag masks
3292 * RP - Requested Priority
3293 * WP - Win Medium Priority: priority assigned when the contention has been won
3294 */
3295#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3296#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3297#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3298
3299#define COEX_CU_UNASSOC_IDLE_RP 4
3300#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3301#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3302#define COEX_CU_CALIBRATION_RP 4
3303#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3304#define COEX_CU_CONNECTION_ESTAB_RP 4
3305#define COEX_CU_ASSOCIATED_IDLE_RP 4
3306#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3307#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3308#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3309#define COEX_CU_RF_ON_RP 6
3310#define COEX_CU_RF_OFF_RP 4
3311#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3312#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3313#define COEX_CU_RSRVD1_RP 4
3314#define COEX_CU_RSRVD2_RP 4
3315
3316#define COEX_CU_UNASSOC_IDLE_WP 3
3317#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3318#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3319#define COEX_CU_CALIBRATION_WP 3
3320#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3321#define COEX_CU_CONNECTION_ESTAB_WP 3
3322#define COEX_CU_ASSOCIATED_IDLE_WP 3
3323#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3324#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3325#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3326#define COEX_CU_RF_ON_WP 3
3327#define COEX_CU_RF_OFF_WP 3
3328#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3329#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3330#define COEX_CU_RSRVD1_WP 3
3331#define COEX_CU_RSRVD2_WP 3
3332
3333#define COEX_UNASSOC_IDLE_FLAGS 0
3334#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3335 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3336 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3337#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3338 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3339 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3340#define COEX_CALIBRATION_FLAGS \
3341 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3342 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3343#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3344/*
3345 * COEX_CONNECTION_ESTAB:
3346 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3347 */
3348#define COEX_CONNECTION_ESTAB_FLAGS \
3349 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3350 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3351 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3352#define COEX_ASSOCIATED_IDLE_FLAGS 0
3353#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3354 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3355 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3356#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3357 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3358 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3359#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3360#define COEX_RF_ON_FLAGS 0
3361#define COEX_RF_OFF_FLAGS 0
3362#define COEX_STAND_ALONE_DEBUG_FLAGS \
3363 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3364 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3365#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3366 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3367 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3368 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3369#define COEX_RSRVD1_FLAGS 0
3370#define COEX_RSRVD2_FLAGS 0
3371/*
3372 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3373 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3374 */
3375#define COEX_CU_RF_ON_FLAGS \
3376 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3377 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3378 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3379
3380
9636e583 3381enum {
fe1bcbfd 3382 /* un-association part */
9636e583
RR
3383 COEX_UNASSOC_IDLE = 0,
3384 COEX_UNASSOC_MANUAL_SCAN = 1,
3385 COEX_UNASSOC_AUTO_SCAN = 2,
fe1bcbfd 3386 /* calibration */
9636e583
RR
3387 COEX_CALIBRATION = 3,
3388 COEX_PERIODIC_CALIBRATION = 4,
fe1bcbfd 3389 /* connection */
9636e583 3390 COEX_CONNECTION_ESTAB = 5,
fe1bcbfd 3391 /* association part */
9636e583
RR
3392 COEX_ASSOCIATED_IDLE = 6,
3393 COEX_ASSOC_MANUAL_SCAN = 7,
3394 COEX_ASSOC_AUTO_SCAN = 8,
3395 COEX_ASSOC_ACTIVE_LEVEL = 9,
fe1bcbfd 3396 /* RF ON/OFF */
9636e583
RR
3397 COEX_RF_ON = 10,
3398 COEX_RF_OFF = 11,
3399 COEX_STAND_ALONE_DEBUG = 12,
fe1bcbfd 3400 /* IPAN */
9636e583 3401 COEX_IPAN_ASSOC_LEVEL = 13,
fe1bcbfd 3402 /* reserved */
9636e583
RR
3403 COEX_RSRVD1 = 14,
3404 COEX_RSRVD2 = 15,
3405 COEX_NUM_OF_EVENTS = 16
3406};
3407
fe1bcbfd
WYG
3408/*
3409 * Coexistence WIFI/WIMAX Command
3410 * COEX_PRIORITY_TABLE_CMD = 0x5a
3411 *
3412 */
9636e583
RR
3413struct iwl_wimax_coex_event_entry {
3414 u8 request_prio;
3415 u8 win_medium_prio;
3416 u8 reserved;
3417 u8 flags;
ba2d3587 3418} __packed;
9636e583
RR
3419
3420/* COEX flag masks */
3421
a96a27f9 3422/* Station table is valid */
9636e583 3423#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
a96a27f9 3424/* UnMask wake up src at unassociated sleep */
9636e583 3425#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
a96a27f9 3426/* UnMask wake up src at associated sleep */
9636e583
RR
3427#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3428/* Enable CoEx feature. */
3429#define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3430
3431struct iwl_wimax_coex_cmd {
3432 u8 flags;
3433 u8 reserved[3];
3434 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
ba2d3587 3435} __packed;
9636e583 3436
fe1bcbfd
WYG
3437/*
3438 * Coexistence MEDIUM NOTIFICATION
3439 * COEX_MEDIUM_NOTIFICATION = 0x5b
3440 *
3441 * notification from uCode to host to indicate medium changes
3442 *
3443 */
3444/*
3445 * status field
3446 * bit 0 - 2: medium status
3447 * bit 3: medium change indication
3448 * bit 4 - 31: reserved
3449 */
3450/* status option values, (0 - 2 bits) */
3451#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3452#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3453#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3454#define COEX_MEDIUM_MSK (0x7)
3455
3456/* send notification status (1 bit) */
3457#define COEX_MEDIUM_CHANGED (0x8)
3458#define COEX_MEDIUM_CHANGED_MSK (0x8)
3459#define COEX_MEDIUM_SHIFT (3)
3460
3461struct iwl_coex_medium_notification {
3462 __le32 status;
3463 __le32 events;
ba2d3587 3464} __packed;
fe1bcbfd
WYG
3465
3466/*
3467 * Coexistence EVENT Command
3468 * COEX_EVENT_CMD = 0x5c
3469 *
3470 * send from host to uCode for coex event request.
3471 */
3472/* flags options */
3473#define COEX_EVENT_REQUEST_MSK (0x1)
3474
3475struct iwl_coex_event_cmd {
3476 u8 flags;
3477 u8 event;
3478 __le16 reserved;
ba2d3587 3479} __packed;
fe1bcbfd
WYG
3480
3481struct iwl_coex_event_resp {
3482 __le32 status;
ba2d3587 3483} __packed;
fe1bcbfd
WYG
3484
3485
0288d237
JB
3486/******************************************************************************
3487 * Bluetooth Coexistence commands
3488 *
3489 *****************************************************************************/
3490
3491/*
3492 * BT Status notification
fbba9410 3493 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
0288d237
JB
3494 */
3495enum iwl_bt_coex_profile_traffic_load {
3496 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3497 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3498 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3499 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3500/*
3501 * There are no more even though below is a u8, the
3502 * indication from the BT device only has two bits.
3503 */
3504};
3505
6013270a
WYG
3506#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3507#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3508
d7220f0d 3509/* BT UART message - Share Part (BT -> WiFi) */
fbba9410
WYG
3510#define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3511#define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3512 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3513#define BT_UART_MSG_FRAME1SSN_POS (3)
3514#define BT_UART_MSG_FRAME1SSN_MSK \
3515 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3516#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3517#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3518 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3519#define BT_UART_MSG_FRAME1RESERVED_POS (6)
3520#define BT_UART_MSG_FRAME1RESERVED_MSK \
3521 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3522
3523#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3524#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3525 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3526#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3527#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3528 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3529#define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3530#define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3531 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3532#define BT_UART_MSG_FRAME2INBAND_POS (5)
3533#define BT_UART_MSG_FRAME2INBAND_MSK \
3534 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3535#define BT_UART_MSG_FRAME2RESERVED_POS (6)
3536#define BT_UART_MSG_FRAME2RESERVED_MSK \
3537 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3538
3539#define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3540#define BT_UART_MSG_FRAME3SCOESCO_MSK \
3541 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3542#define BT_UART_MSG_FRAME3SNIFF_POS (1)
3543#define BT_UART_MSG_FRAME3SNIFF_MSK \
3544 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3545#define BT_UART_MSG_FRAME3A2DP_POS (2)
3546#define BT_UART_MSG_FRAME3A2DP_MSK \
3547 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3548#define BT_UART_MSG_FRAME3ACL_POS (3)
3549#define BT_UART_MSG_FRAME3ACL_MSK \
3550 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3551#define BT_UART_MSG_FRAME3MASTER_POS (4)
3552#define BT_UART_MSG_FRAME3MASTER_MSK \
3553 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3554#define BT_UART_MSG_FRAME3OBEX_POS (5)
3555#define BT_UART_MSG_FRAME3OBEX_MSK \
3556 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3557#define BT_UART_MSG_FRAME3RESERVED_POS (6)
3558#define BT_UART_MSG_FRAME3RESERVED_MSK \
3559 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3560
3561#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3562#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3563 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3564#define BT_UART_MSG_FRAME4RESERVED_POS (6)
3565#define BT_UART_MSG_FRAME4RESERVED_MSK \
3566 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3567
3568#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3569#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3570 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3571#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3572#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3573 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3574#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3575#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3576 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3577#define BT_UART_MSG_FRAME5RESERVED_POS (6)
3578#define BT_UART_MSG_FRAME5RESERVED_MSK \
3579 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3580
3581#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3582#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3583 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3584#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3585#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3586 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3587#define BT_UART_MSG_FRAME6RESERVED_POS (6)
3588#define BT_UART_MSG_FRAME6RESERVED_MSK \
3589 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3590
3591#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3592#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3593 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
399f66fd
WYG
3594#define BT_UART_MSG_FRAME7PAGE_POS (3)
3595#define BT_UART_MSG_FRAME7PAGE_MSK \
3596 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3597#define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3598#define BT_UART_MSG_FRAME7INQUIRY_MSK \
3599 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
fbba9410
WYG
3600#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3601#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3602 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3603#define BT_UART_MSG_FRAME7RESERVED_POS (6)
3604#define BT_UART_MSG_FRAME7RESERVED_MSK \
3605 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3606
d7220f0d
WYG
3607/* BT Session Activity 2 UART message (BT -> WiFi) */
3608#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3609#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3610 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3611#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3612#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3613 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3614
3615#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3616#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3617 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3618#define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3619#define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3620 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3621
3622#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3623#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3624 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3625#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3626#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3627 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3628#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3629#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3630 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3631#define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3632#define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3633 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3634
3635#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3636#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3637 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3638#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3639#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3640 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3641#define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3642#define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3643 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3644
3645#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3646#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3647 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3648#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3649#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3650 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3651#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3652#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3653 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3654#define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3655#define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3656 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3657
3658#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3659#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3660 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3661#define BT_UART_MSG_2_FRAME6RFU_POS (5)
3662#define BT_UART_MSG_2_FRAME6RFU_MSK \
3663 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3664#define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3665#define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3666 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3667
3668#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3669#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3670 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3671#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3672#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3673 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3674#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3675#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3676 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3677#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3678#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3679 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3680#define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3681#define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3682 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3683
fbba9410
WYG
3684
3685struct iwl_bt_uart_msg {
3686 u8 header;
3687 u8 frame1;
3688 u8 frame2;
3689 u8 frame3;
3690 u8 frame4;
3691 u8 frame5;
3692 u8 frame6;
3693 u8 frame7;
3694} __attribute__((packed));
3695
0288d237 3696struct iwl_bt_coex_profile_notif {
fbba9410 3697 struct iwl_bt_uart_msg last_bt_uart_msg;
0288d237
JB
3698 u8 bt_status; /* 0 - off, 1 - on */
3699 u8 bt_traffic_load; /* 0 .. 3? */
3700 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3701 u8 reserved;
3702} __attribute__((packed));
3703
aeb4a2ee
WYG
3704#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3705#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3706#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3707#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3708#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3709#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3710#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
0288d237
JB
3711
3712/*
3713 * BT Coexistence Priority table
3714 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3715 */
aeb4a2ee
WYG
3716enum bt_coex_prio_table_events {
3717 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3718 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3719 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3720 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3721 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3722 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3723 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3724 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3725 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3726 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3727 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3728 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3729 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3730 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3731 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3732 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3733 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3734 BT_COEX_PRIO_TBL_EVT_MAX,
3735};
3736
3737enum bt_coex_prio_table_priorities {
3738 BT_COEX_PRIO_TBL_DISABLED = 0,
3739 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3740 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3741 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3742 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3743 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3744 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3745 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3746 BT_COEX_PRIO_TBL_MAX,
3747};
3748
0288d237 3749struct iwl_bt_coex_prio_table_cmd {
aeb4a2ee 3750 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
0288d237
JB
3751} __attribute__((packed));
3752
aeb4a2ee
WYG
3753#define IWL_BT_COEX_ENV_CLOSE 0
3754#define IWL_BT_COEX_ENV_OPEN 1
0288d237
JB
3755/*
3756 * BT Protection Envelope
3757 * REPLY_BT_COEX_PROT_ENV = 0xcd
3758 */
3759struct iwl_bt_coex_prot_env_cmd {
aeb4a2ee 3760 u8 action; /* 0 = closed, 1 = open */
0288d237
JB
3761 u8 type; /* 0 .. 15 */
3762 u8 reserved[2];
3763} __attribute__((packed));
3764
b481de9c
ZY
3765/******************************************************************************
3766 * (13)
3767 * Union of all expected notifications/responses:
3768 *
3769 *****************************************************************************/
3770
db11d634 3771struct iwl_rx_packet {
2f301227
ZY
3772 /*
3773 * The first 4 bytes of the RX frame header contain both the RX frame
3774 * size and some flags.
3775 * Bit fields:
3776 * 31: flag flush RB request
3777 * 30: flag ignore TC (terminal counter) request
3778 * 29: flag fast IRQ request
3779 * 28-14: Reserved
3780 * 13-00: RX frame size
3781 */
396887a2 3782 __le32 len_n_flags;
857485c0 3783 struct iwl_cmd_header hdr;
b481de9c 3784 union {
885ba202 3785 struct iwl_alive_resp alive_frame;
2aa6ab86
TW
3786 struct iwl_spectrum_notification spectrum_notif;
3787 struct iwl_csa_notification csa_notif;
885ba202 3788 struct iwl_error_resp err_resp;
2aa6ab86 3789 struct iwl_card_state_notif card_state_notif;
7a999bf0
TW
3790 struct iwl_add_sta_resp add_sta;
3791 struct iwl_rem_sta_resp rem_sta;
2aa6ab86
TW
3792 struct iwl_sleep_notification sleep_notif;
3793 struct iwl_spectrum_resp spectrum;
8f91aecb 3794 struct iwl_notif_statistics stats;
7980fba5 3795 struct iwl_bt_notif_statistics stats_bt;
653fa4a0 3796 struct iwl_compressed_ba_resp compressed_ba;
2aa6ab86 3797 struct iwl_missed_beacon_notif missed_beacon;
fe1bcbfd
WYG
3798 struct iwl_coex_medium_notification coex_medium_notif;
3799 struct iwl_coex_event_resp coex_event;
0288d237 3800 struct iwl_bt_coex_profile_notif bt_coex_profile_notif;
b481de9c
ZY
3801 __le32 status;
3802 u8 raw[0];
3803 } u;
ba2d3587 3804} __packed;
b481de9c 3805
a3139c59 3806int iwl_agn_check_rxon_cmd(struct iwl_priv *priv);
8f5c87dc 3807
946ba30d
JB
3808/*
3809 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3810 */
3811
94073919
JB
3812/*
3813 * Minimum slot time in TU
3814 */
3815#define IWL_MIN_SLOT_TIME 20
3816
946ba30d
JB
3817/**
3818 * struct iwl_wipan_slot
3819 * @width: Time in TU
3820 * @type:
3821 * 0 - BSS
3822 * 1 - PAN
3823 */
3824struct iwl_wipan_slot {
3825 __le16 width;
3826 u8 type;
3827 u8 reserved;
3828} __packed;
3829
3830#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3831#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3832#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3833#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3834#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3835
3836/**
3837 * struct iwl_wipan_params_cmd
3838 * @flags:
3839 * bit0: reserved
3840 * bit1: CP leave channel with CTS
3841 * bit2: CP leave channel qith Quiet
3842 * bit3: slotted mode
3843 * 1 - work in slotted mode
3844 * 0 - work in non slotted mode
3845 * bit4: filter beacon notification
3846 * bit5: full tx slotted mode. if this flag is set,
3847 * uCode will perform leaving channel methods in context switch
3848 * also when working in same channel mode
3849 * @num_slots: 1 - 10
3850 */
3851struct iwl_wipan_params_cmd {
3852 __le16 flags;
3853 u8 reserved;
3854 u8 num_slots;
3855 struct iwl_wipan_slot slots[10];
3856} __packed;
3857
3858/*
3859 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3860 *
3861 * TODO: Figure out what this is used for,
3862 * it can only switch between 2.4 GHz
3863 * channels!!
3864 */
3865
3866struct iwl_wipan_p2p_channel_switch_cmd {
3867 __le16 channel;
3868 __le16 reserved;
3869};
3870
3871/*
3872 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3873 *
3874 * This is used by the device to notify us of the
3875 * NoA schedule it determined so we can forward it
3876 * to userspace for inclusion in probe responses.
3877 *
3878 * In beacons, the NoA schedule is simply appended
3879 * to the frame we give the device.
3880 */
3881
3882struct iwl_wipan_noa_descriptor {
3883 u8 count;
3884 __le32 duration;
3885 __le32 interval;
3886 __le32 starttime;
3887} __packed;
3888
3889struct iwl_wipan_noa_attribute {
3890 u8 id;
3891 __le16 length;
3892 u8 index;
3893 u8 ct_window;
3894 struct iwl_wipan_noa_descriptor descr0, descr1;
3895 u8 reserved;
3896} __packed;
3897
3898struct iwl_wipan_noa_notification {
3899 u32 noa_active;
3900 struct iwl_wipan_noa_attribute noa_attribute;
3901} __packed;
3902
6a63578d 3903#endif /* __iwl_commands_h__ */
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