iwlagn: rewrite HW crypto
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-commands.h
CommitLineData
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
901069c7 8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
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9 *
10 * This program is free software; you can redistribute it and/or modify
01ebd063 11 * it under the terms of version 2 of the GNU General Public License as
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12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
759ef89f 28 * Intel Linux Wireless <ilw@linux.intel.com>
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29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
901069c7 33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
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34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
fcd427bb 63/*
5a36ba0e 64 * Please use this file (iwl-commands.h) only for uCode API definitions.
767d055d 65 * Please use iwl-xxxx-hw.h for hardware-related definitions.
3e0d4cb1 66 * Please use iwl-dev.h for driver implementation definitions.
fcd427bb 67 */
b481de9c 68
6a63578d
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69#ifndef __iwl_commands_h__
70#define __iwl_commands_h__
b481de9c 71
a3139c59
SO
72struct iwl_priv;
73
c02b3acd
CR
74/* uCode version contains 4 values: Major/Minor/API/Serial */
75#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
76#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
77#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
78#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
79
4c897253
TW
80
81/* Tx rates */
82#define IWL_CCK_RATES 4
83#define IWL_OFDM_RATES 8
84#define IWL_MAX_RATES (IWL_CCK_RATES + IWL_OFDM_RATES)
85
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86enum {
87 REPLY_ALIVE = 0x1,
88 REPLY_ERROR = 0x2,
89
90 /* RXON and QOS commands */
91 REPLY_RXON = 0x10,
92 REPLY_RXON_ASSOC = 0x11,
93 REPLY_QOS_PARAM = 0x13,
94 REPLY_RXON_TIMING = 0x14,
95
96 /* Multi-Station support */
97 REPLY_ADD_STA = 0x18,
fc66be2a 98 REPLY_REMOVE_STA = 0x19,
b481de9c 99 REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
947279ee 100 REPLY_TXFIFO_FLUSH = 0x1e,
b481de9c 101
0a0bed1d
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102 /* Security */
103 REPLY_WEPKEY = 0x20,
104
b481de9c 105 /* RX, TX, LEDs */
b481de9c 106 REPLY_TX = 0x1c,
b481de9c 107 REPLY_LEDS_CMD = 0x48,
4c8d1913 108 REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 and up */
b481de9c 109
9636e583 110 /* WiMAX coexistence */
d23000cd 111 COEX_PRIORITY_TABLE_CMD = 0x5a, /* for 5000 series and up */
9636e583
RR
112 COEX_MEDIUM_NOTIFICATION = 0x5b,
113 COEX_EVENT_CMD = 0x5c,
114
be5d56ed 115 /* Calibration */
1a5c3d61 116 TEMPERATURE_NOTIFICATION = 0x62,
be5d56ed
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117 CALIBRATION_CFG_CMD = 0x65,
118 CALIBRATION_RES_NOTIFICATION = 0x66,
119 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
120
b481de9c 121 /* 802.11h related */
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122 REPLY_QUIET_CMD = 0x71, /* not used */
123 REPLY_CHANNEL_SWITCH = 0x72,
124 CHANNEL_SWITCH_NOTIFICATION = 0x73,
125 REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
126 SPECTRUM_MEASURE_NOTIFICATION = 0x75,
127
128 /* Power Management */
129 POWER_TABLE_CMD = 0x77,
130 PM_SLEEP_NOTIFICATION = 0x7A,
131 PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
132
133 /* Scan commands and notifications */
134 REPLY_SCAN_CMD = 0x80,
135 REPLY_SCAN_ABORT_CMD = 0x81,
136 SCAN_START_NOTIFICATION = 0x82,
137 SCAN_RESULTS_NOTIFICATION = 0x83,
138 SCAN_COMPLETE_NOTIFICATION = 0x84,
139
140 /* IBSS/AP commands */
141 BEACON_NOTIFICATION = 0x90,
142 REPLY_TX_BEACON = 0x91,
143 WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
144
145 /* Miscellaneous commands */
76a2407a 146 REPLY_TX_POWER_DBM_CMD = 0x95,
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147 QUIET_NOTIFICATION = 0x96, /* not used */
148 REPLY_TX_PWR_TABLE_CMD = 0x97,
76a2407a 149 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
2f748dec 150 TX_ANT_CONFIGURATION_CMD = 0x98,
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151 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
152
a96a27f9 153 /* Bluetooth device coexistence config command */
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154 REPLY_BT_CONFIG = 0x9b,
155
80cc0c38 156 /* Statistics */
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157 REPLY_STATISTICS_CMD = 0x9c,
158 STATISTICS_NOTIFICATION = 0x9d,
159
160 /* RF-KILL commands and notifications */
161 REPLY_CARD_STATE_CMD = 0xa0,
162 CARD_STATE_NOTIFICATION = 0xa1,
163
164 /* Missed beacons notification */
165 MISSED_BEACONS_NOTIFICATION = 0xa2,
166
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167 REPLY_CT_KILL_CONFIG_CMD = 0xa4,
168 SENSITIVITY_CMD = 0xa8,
169 REPLY_PHY_CALIBRATION_CMD = 0xb0,
170 REPLY_RX_PHY_CMD = 0xc0,
171 REPLY_RX_MPDU_CMD = 0xc1,
857485c0 172 REPLY_RX = 0xc3,
b481de9c 173 REPLY_COMPRESSED_BA = 0xc5,
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174
175 /* BT Coex */
176 REPLY_BT_COEX_PRIO_TABLE = 0xcc,
177 REPLY_BT_COEX_PROT_ENV = 0xcd,
178 REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
179
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180 /* PAN commands */
181 REPLY_WIPAN_PARAMS = 0xb2,
182 REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
183 REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
184 REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
185 REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
186 REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
187 REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
188 REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
311dce71 189 REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
946ba30d 190
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191 REPLY_MAX = 0xff
192};
193
194/******************************************************************************
195 * (0)
abceddb4 196 * Commonly used structures and definitions:
80cc0c38 197 * Command header, rate_n_flags, txpower
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198 *
199 *****************************************************************************/
200
857485c0 201/* iwl_cmd_header flags value */
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202#define IWL_CMD_FAILED_MSK 0x40
203
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204#define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f)
205#define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8)
206#define SEQ_TO_INDEX(s) ((s) & 0xff)
207#define INDEX_TO_SEQ(i) ((i) & 0xff)
51e9bf5d 208#define SEQ_RX_FRAME cpu_to_le16(0x8000)
9734cb23 209
075416cd 210/**
857485c0 211 * struct iwl_cmd_header
075416cd
BC
212 *
213 * This header format appears in the beginning of each command sent from the
214 * driver, and each response/notification received from uCode.
215 */
857485c0 216struct iwl_cmd_header {
075416cd 217 u8 cmd; /* Command ID: REPLY_RXON, etc. */
9734cb23 218 u8 flags; /* 0:5 reserved, 6 abort, 7 internal */
075416cd 219 /*
a96a27f9 220 * The driver sets up the sequence number to values of its choosing.
075416cd
BC
221 * uCode does not use this value, but passes it back to the driver
222 * when sending the response to each driver-originated command, so
223 * the driver can match the response to the command. Since the values
224 * don't get used by uCode, the driver may set up an arbitrary format.
b481de9c 225 *
075416cd
BC
226 * There is one exception: uCode sets bit 15 when it originates
227 * the response/notification, i.e. when the response/notification
228 * is not a direct response to a command sent by the driver. For
3240cab3 229 * example, uCode issues REPLY_RX when it sends a received frame
075416cd 230 * to the driver; it is not a direct response to any driver command.
b481de9c 231 *
075416cd
BC
232 * The Linux driver uses the following format:
233 *
9734cb23
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234 * 0:7 tfd index - position within TX queue
235 * 8:12 TX queue id
4ce7cc2b 236 * 13:14 reserved
9734cb23 237 * 15 unsolicited RX or uCode-originated notification
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238 */
239 __le16 sequence;
240
075416cd 241 /* command or response/notification data follows immediately */
b481de9c 242 u8 data[0];
ba2d3587 243} __packed;
b481de9c 244
3d24a9f7 245
abceddb4 246/**
5c5aa3f1 247 * iwlagn rate_n_flags bit fields
abceddb4 248 *
5c5aa3f1 249 * rate_n_flags format is used in following iwlagn commands:
857485c0 250 * REPLY_RX (response only)
5c5aa3f1 251 * REPLY_RX_MPDU (response only)
abceddb4
BC
252 * REPLY_TX (both command and response)
253 * REPLY_TX_LINK_QUALITY_CMD
254 *
255 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
256 * 2-0: 0) 6 Mbps
257 * 1) 12 Mbps
258 * 2) 18 Mbps
259 * 3) 24 Mbps
260 * 4) 36 Mbps
261 * 5) 48 Mbps
262 * 6) 54 Mbps
263 * 7) 60 Mbps
264 *
5c5aa3f1 265 * 4-3: 0) Single stream (SISO)
abceddb4 266 * 1) Dual stream (MIMO)
5c5aa3f1 267 * 2) Triple stream (MIMO)
abceddb4 268 *
7aafef1c 269 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
abceddb4
BC
270 *
271 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
272 * 3-0: 0xD) 6 Mbps
273 * 0xF) 9 Mbps
274 * 0x5) 12 Mbps
275 * 0x7) 18 Mbps
276 * 0x9) 24 Mbps
277 * 0xB) 36 Mbps
278 * 0x1) 48 Mbps
279 * 0x3) 54 Mbps
280 *
281 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
10617879 282 * 6-0: 10) 1 Mbps
abceddb4
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283 * 20) 2 Mbps
284 * 55) 5.5 Mbps
285 * 110) 11 Mbps
286 */
287#define RATE_MCS_CODE_MSK 0x7
5c5aa3f1
HD
288#define RATE_MCS_SPATIAL_POS 3
289#define RATE_MCS_SPATIAL_MSK 0x18
abceddb4
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290#define RATE_MCS_HT_DUP_POS 5
291#define RATE_MCS_HT_DUP_MSK 0x20
2520546a
DH
292/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
293#define RATE_MCS_RATE_MSK 0xff
abceddb4 294
075416cd 295/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
abceddb4
BC
296#define RATE_MCS_FLAGS_POS 8
297#define RATE_MCS_HT_POS 8
298#define RATE_MCS_HT_MSK 0x100
299
075416cd 300/* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
abceddb4
BC
301#define RATE_MCS_CCK_POS 9
302#define RATE_MCS_CCK_MSK 0x200
303
075416cd 304/* Bit 10: (1) Use Green Field preamble */
abceddb4
BC
305#define RATE_MCS_GF_POS 10
306#define RATE_MCS_GF_MSK 0x400
307
7aafef1c
WYG
308/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
309#define RATE_MCS_HT40_POS 11
310#define RATE_MCS_HT40_MSK 0x800
abceddb4 311
7aafef1c 312/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
abceddb4
BC
313#define RATE_MCS_DUP_POS 12
314#define RATE_MCS_DUP_MSK 0x1000
315
075416cd 316/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
abceddb4
BC
317#define RATE_MCS_SGI_POS 13
318#define RATE_MCS_SGI_MSK 0x2000
319
320/**
76eff18b
TW
321 * rate_n_flags Tx antenna masks
322 * 4965 has 2 transmitters
323 * 5100 has 1 transmitter B
324 * 5150 has 1 transmitter A
325 * 5300 has 3 transmitters
326 * 5350 has 3 transmitters
327 * bit14:16
abceddb4 328 */
600c0e11
TW
329#define RATE_MCS_ANT_POS 14
330#define RATE_MCS_ANT_A_MSK 0x04000
331#define RATE_MCS_ANT_B_MSK 0x08000
332#define RATE_MCS_ANT_C_MSK 0x10000
333#define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
334#define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
76eff18b 335#define RATE_ANT_NUM 3
80cc0c38
BC
336
337#define POWER_TABLE_NUM_ENTRIES 33
338#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
339#define POWER_TABLE_CCK_ENTRY 32
340
e57f1489
WYG
341#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
342#define IWL_PWR_CCK_ENTRIES 2
343
80cc0c38
BC
344/**
345 * struct tx_power_dual_stream
346 *
347 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
348 *
349 * Same format as iwl_tx_power_dual_stream, but __le32
350 */
351struct tx_power_dual_stream {
352 __le32 dw;
ba2d3587 353} __packed;
80cc0c38 354
630fe9b6 355/**
a96a27f9 356 * Command REPLY_TX_POWER_DBM_CMD = 0x98
ab63c68a 357 * struct iwlagn_tx_power_dbm_cmd
630fe9b6 358 */
ab63c68a
WYG
359#define IWLAGN_TX_POWER_AUTO 0x7f
360#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
853554ac 361
ab63c68a 362struct iwlagn_tx_power_dbm_cmd {
630fe9b6
TW
363 s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
364 u8 flags;
365 s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
366 u8 reserved;
ba2d3587 367} __packed;
80cc0c38 368
2f748dec
WYG
369/**
370 * Command TX_ANT_CONFIGURATION_CMD = 0x98
371 * This command is used to configure valid Tx antenna.
372 * By default uCode concludes the valid antenna according to the radio flavor.
373 * This command enables the driver to override/modify this conclusion.
374 */
375struct iwl_tx_ant_config_cmd {
376 __le32 valid;
ba2d3587 377} __packed;
2f748dec 378
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379/******************************************************************************
380 * (0a)
381 * Alive and Error Commands & Responses:
382 *
383 *****************************************************************************/
384
51e9bf5d 385#define UCODE_VALID_OK cpu_to_le32(0x1)
ca7966c8 386
075416cd
BC
387/**
388 * REPLY_ALIVE = 0x1 (response only, not a command)
389 *
390 * uCode issues this "alive" notification once the runtime image is ready
391 * to receive commands from the driver. This is the *second* "alive"
392 * notification that the driver will receive after rebooting uCode;
393 * this "alive" is indicated by subtype field != 9.
394 *
395 * See comments documenting "BSM" (bootstrap state machine).
396 *
397 * This response includes two pointers to structures within the device's
398 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
399 *
400 * 1) log_event_table_ptr indicates base of the event log. This traces
401 * a 256-entry history of uCode execution within a circular buffer.
402 * Its header format is:
403 *
404 * __le32 log_size; log capacity (in number of entries)
405 * __le32 type; (1) timestamp with each entry, (0) no timestamp
406 * __le32 wraps; # times uCode has wrapped to top of circular buffer
407 * __le32 write_index; next circular buffer entry that uCode would fill
408 *
409 * The header is followed by the circular buffer of log entries. Entries
410 * with timestamps have the following format:
411 *
412 * __le32 event_id; range 0 - 1500
413 * __le32 timestamp; low 32 bits of TSF (of network, if associated)
414 * __le32 data; event_id-specific data value
415 *
416 * Entries without timestamps contain only event_id and data.
417 *
461ef382 418 *
075416cd 419 * 2) error_event_table_ptr indicates base of the error log. This contains
461ef382 420 * information about any uCode error that occurs. For agn, the format
e46f6538 421 * of the error log is defined by struct iwl_error_event_table.
075416cd
BC
422 *
423 * The Linux driver can print both logs to the system log when a uCode error
424 * occurs.
425 */
e46f6538
JB
426
427/*
428 * Note: This structure is read from the device with IO accesses,
429 * and the reading already does the endian conversion. As it is
430 * read with u32-sized accesses, any members with a different size
431 * need to be ordered correctly though!
432 */
433struct iwl_error_event_table {
434 u32 valid; /* (nonzero) valid, (0) log is empty */
435 u32 error_id; /* type of error */
436 u32 pc; /* program counter */
437 u32 blink1; /* branch link */
438 u32 blink2; /* branch link */
439 u32 ilink1; /* interrupt link */
440 u32 ilink2; /* interrupt link */
441 u32 data1; /* error-specific data */
442 u32 data2; /* error-specific data */
443 u32 line; /* source code line of error */
444 u32 bcon_time; /* beacon timer */
445 u32 tsf_low; /* network timestamp function timer */
446 u32 tsf_hi; /* network timestamp function timer */
447 u32 gp1; /* GP1 timer register */
448 u32 gp2; /* GP2 timer register */
449 u32 gp3; /* GP3 timer register */
450 u32 ucode_ver; /* uCode version */
451 u32 hw_ver; /* HW Silicon version */
452 u32 brd_ver; /* HW board version */
453 u32 log_pc; /* log program counter */
454 u32 frame_ptr; /* frame pointer */
455 u32 stack_ptr; /* stack pointer */
456 u32 hcmd; /* last host command header */
457#if 0
458 /* no need to read the remainder, we don't use the values */
459 u32 isr0; /* isr status register LMPM_NIC_ISR0: rxtx_flag */
460 u32 isr1; /* isr status register LMPM_NIC_ISR1: host_flag */
461 u32 isr2; /* isr status register LMPM_NIC_ISR2: enc_flag */
462 u32 isr3; /* isr status register LMPM_NIC_ISR3: time_flag */
463 u32 isr4; /* isr status register LMPM_NIC_ISR4: wico interrupt */
464 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
465 u32 wait_event; /* wait event() caller address */
466 u32 l2p_control; /* L2pControlField */
467 u32 l2p_duration; /* L2pDurationField */
468 u32 l2p_mhvalid; /* L2pMhValidBits */
469 u32 l2p_addr_match; /* L2pAddrMatchStat */
470 u32 lmpm_pmg_sel; /* indicate which clocks are turned on (LMPM_PMG_SEL) */
471 u32 u_timestamp; /* indicate when the date and time of the compilation */
472 u32 flow_handler; /* FH read/write pointers, RX credit */
473#endif
474} __packed;
475
885ba202 476struct iwl_alive_resp {
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477 u8 ucode_minor;
478 u8 ucode_major;
479 __le16 reserved1;
480 u8 sw_rev[8];
481 u8 ver_type;
075416cd 482 u8 ver_subtype; /* not "9" for runtime alive */
b481de9c 483 __le16 reserved2;
075416cd
BC
484 __le32 log_event_table_ptr; /* SRAM address for event log */
485 __le32 error_event_table_ptr; /* SRAM address for error log */
b481de9c
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486 __le32 timestamp;
487 __le32 is_valid;
ba2d3587 488} __packed;
b481de9c 489
b481de9c
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490/*
491 * REPLY_ERROR = 0x2 (response only, not a command)
492 */
885ba202 493struct iwl_error_resp {
b481de9c
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494 __le32 error_type;
495 u8 cmd_id;
496 u8 reserved1;
497 __le16 bad_cmd_seq_num;
b481de9c 498 __le32 error_info;
3195c1f3 499 __le64 timestamp;
ba2d3587 500} __packed;
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501
502/******************************************************************************
503 * (1)
504 * RXON Commands & Responses:
505 *
506 *****************************************************************************/
507
508/*
509 * Rx config defines & structure
510 */
511/* rx_config device types */
512enum {
513 RXON_DEV_TYPE_AP = 1,
514 RXON_DEV_TYPE_ESS = 3,
515 RXON_DEV_TYPE_IBSS = 4,
516 RXON_DEV_TYPE_SNIFFER = 6,
946ba30d
JB
517 RXON_DEV_TYPE_CP = 7,
518 RXON_DEV_TYPE_2STA = 8,
519 RXON_DEV_TYPE_P2P = 9,
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520};
521
14519a0b 522
51e9bf5d 523#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
7b841727 524#define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
51e9bf5d 525#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
14519a0b 526#define RXON_RX_CHAIN_VALID_POS (1)
51e9bf5d 527#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
14519a0b 528#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
51e9bf5d 529#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
14519a0b 530#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
51e9bf5d 531#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
14519a0b 532#define RXON_RX_CHAIN_CNT_POS (10)
51e9bf5d 533#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
14519a0b 534#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
51e9bf5d 535#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
14519a0b
BC
536#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
537
b481de9c
ZY
538/* rx_config flags */
539/* band & modulation selection */
51e9bf5d
HH
540#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
541#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
b481de9c 542/* auto detection enable */
51e9bf5d 543#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
b481de9c 544/* TGg protection when tx */
51e9bf5d 545#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
b481de9c 546/* cck short slot & preamble */
51e9bf5d
HH
547#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
548#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
b481de9c 549/* antenna selection */
51e9bf5d
HH
550#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
551#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
552#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
553#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 554/* radar detection enable */
51e9bf5d
HH
555#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
556#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
b481de9c
ZY
557/* rx response to host with 8-byte TSF
558* (according to ON_AIR deassertion) */
51e9bf5d 559#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
b481de9c 560
14519a0b
BC
561
562/* HT flags */
563#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
51e9bf5d 564#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
14519a0b
BC
565
566#define RXON_FLG_HT_OPERATING_MODE_POS (23)
567
51e9bf5d 568#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
7aafef1c 569#define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
14519a0b
BC
570
571#define RXON_FLG_CHANNEL_MODE_POS (25)
51e9bf5d 572#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
a2b0f02e
WYG
573
574/* channel mode */
575enum {
576 CHANNEL_MODE_LEGACY = 0,
577 CHANNEL_MODE_PURE_40 = 1,
578 CHANNEL_MODE_MIXED = 2,
579 CHANNEL_MODE_RESERVED = 3,
580};
581#define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
582#define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
583#define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
584
a326a5d0 585/* CTS to self (if spec allows) flag */
51e9bf5d 586#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
14519a0b 587
b481de9c
ZY
588/* rx_config filter flags */
589/* accept all data frames */
51e9bf5d 590#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
b481de9c 591/* pass control & management to host */
51e9bf5d 592#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
b481de9c 593/* accept multi-cast */
51e9bf5d 594#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
b481de9c 595/* don't decrypt uni-cast frames */
51e9bf5d 596#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
b481de9c 597/* don't decrypt multi-cast frames */
51e9bf5d 598#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
b481de9c 599/* STA is associated */
51e9bf5d 600#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
b481de9c 601/* transfer to host non bssid beacons in associated state */
51e9bf5d 602#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
b481de9c 603
80cc0c38 604/**
b481de9c 605 * REPLY_RXON = 0x10 (command, has simple generic response)
80cc0c38
BC
606 *
607 * RXON tunes the radio tuner to a service channel, and sets up a number
608 * of parameters that are used primarily for Rx, but also for Tx operations.
609 *
610 * NOTE: When tuning to a new channel, driver must set the
611 * RXON_FILTER_ASSOC_MSK to 0. This will clear station-dependent
612 * info within the device, including the station tables, tx retry
613 * rate tables, and txpower tables. Driver must build a new station
614 * table and txpower table before transmitting anything on the RXON
615 * channel.
616 *
617 * NOTE: All RXONs wipe clean the internal txpower table. Driver must
618 * issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
619 * regardless of whether RXON_FILTER_ASSOC_MSK is set.
b481de9c 620 */
3d24a9f7 621
c1adf9fb
GG
622struct iwl_rxon_cmd {
623 u8 node_addr[6];
624 __le16 reserved1;
625 u8 bssid_addr[6];
626 __le16 reserved2;
627 u8 wlap_bssid_addr[6];
628 __le16 reserved3;
629 u8 dev_type;
630 u8 air_propagation;
631 __le16 rx_chain;
632 u8 ofdm_basic_rates;
633 u8 cck_basic_rates;
634 __le16 assoc_id;
635 __le32 flags;
636 __le32 filter_flags;
637 __le16 channel;
638 u8 ofdm_ht_single_stream_basic_rates;
639 u8 ofdm_ht_dual_stream_basic_rates;
640 u8 ofdm_ht_triple_stream_basic_rates;
641 u8 reserved5;
642 __le16 acquisition_data;
643 __le16 reserved6;
ba2d3587 644} __packed;
c1adf9fb 645
3d24a9f7
TW
646/*
647 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
648 */
89e746b2 649struct iwl_rxon_assoc_cmd {
b481de9c
ZY
650 __le32 flags;
651 __le32 filter_flags;
652 u8 ofdm_basic_rates;
653 u8 cck_basic_rates;
3d24a9f7 654 __le16 reserved1;
b481de9c
ZY
655 u8 ofdm_ht_single_stream_basic_rates;
656 u8 ofdm_ht_dual_stream_basic_rates;
3d24a9f7
TW
657 u8 ofdm_ht_triple_stream_basic_rates;
658 u8 reserved2;
b481de9c 659 __le16 rx_chain_select_flags;
3d24a9f7
TW
660 __le16 acquisition_data;
661 __le32 reserved3;
ba2d3587 662} __packed;
b481de9c 663
b5d7be5e 664#define IWL_CONN_MAX_LISTEN_INTERVAL 10
2c2f3b33
TW
665#define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
666#define IWL39_MAX_UCODE_BEACON_INTERVAL 1 /* 1024 */
fe7a90c2 667
b481de9c
ZY
668/*
669 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
670 */
3195c1f3
TW
671struct iwl_rxon_time_cmd {
672 __le64 timestamp;
b481de9c
ZY
673 __le16 beacon_interval;
674 __le16 atim_window;
675 __le32 beacon_init_val;
676 __le16 listen_interval;
946ba30d
JB
677 u8 dtim_period;
678 u8 delta_cp_bss_tbtts;
ba2d3587 679} __packed;
b481de9c 680
b481de9c
ZY
681/*
682 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
683 */
e57f1489
WYG
684/**
685 * struct iwl5000_channel_switch_cmd
686 * @band: 0- 5.2GHz, 1- 2.4GHz
687 * @expect_beacon: 0- resume transmits after channel switch
688 * 1- wait for beacon to resume transmits
689 * @channel: new channel number
690 * @rxon_flags: Rx on flags
691 * @rxon_filter_flags: filtering parameters
692 * @switch_time: switch time in extended beacon format
693 * @reserved: reserved bytes
694 */
695struct iwl5000_channel_switch_cmd {
696 u8 band;
697 u8 expect_beacon;
698 __le16 channel;
699 __le32 rxon_flags;
700 __le32 rxon_filter_flags;
701 __le32 switch_time;
702 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 703} __packed;
e57f1489
WYG
704
705/**
706 * struct iwl6000_channel_switch_cmd
707 * @band: 0- 5.2GHz, 1- 2.4GHz
708 * @expect_beacon: 0- resume transmits after channel switch
709 * 1- wait for beacon to resume transmits
710 * @channel: new channel number
711 * @rxon_flags: Rx on flags
712 * @rxon_filter_flags: filtering parameters
713 * @switch_time: switch time in extended beacon format
714 * @reserved: reserved bytes
715 */
716struct iwl6000_channel_switch_cmd {
717 u8 band;
718 u8 expect_beacon;
719 __le16 channel;
720 __le32 rxon_flags;
721 __le32 rxon_filter_flags;
722 __le32 switch_time;
723 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
ba2d3587 724} __packed;
e57f1489 725
b481de9c
ZY
726/*
727 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
728 */
2aa6ab86 729struct iwl_csa_notification {
b481de9c
ZY
730 __le16 band;
731 __le16 channel;
732 __le32 status; /* 0 - OK, 1 - fail */
ba2d3587 733} __packed;
b481de9c
ZY
734
735/******************************************************************************
736 * (2)
737 * Quality-of-Service (QOS) Commands & Responses:
738 *
739 *****************************************************************************/
2054a00b
BC
740
741/**
742 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
743 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
744 *
745 * @cw_min: Contention window, start value in numbers of slots.
746 * Should be a power-of-2, minus 1. Device's default is 0x0f.
747 * @cw_max: Contention window, max value in numbers of slots.
748 * Should be a power-of-2, minus 1. Device's default is 0x3f.
749 * @aifsn: Number of slots in Arbitration Interframe Space (before
750 * performing random backoff timing prior to Tx). Device default 1.
751 * @edca_txop: Length of Tx opportunity, in uSecs. Device default is 0.
752 *
753 * Device will automatically increase contention window by (2*CW) + 1 for each
754 * transmission retry. Device uses cw_max as a bit mask, ANDed with new CW
755 * value, to cap the CW value.
756 */
1ff50bda 757struct iwl_ac_qos {
b481de9c
ZY
758 __le16 cw_min;
759 __le16 cw_max;
760 u8 aifsn;
761 u8 reserved1;
762 __le16 edca_txop;
ba2d3587 763} __packed;
b481de9c
ZY
764
765/* QoS flags defines */
51e9bf5d
HH
766#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
767#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
768#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
b481de9c 769
2054a00b 770/* Number of Access Categories (AC) (EDCA), queues 0..3 */
b481de9c
ZY
771#define AC_NUM 4
772
773/*
774 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
2054a00b
BC
775 *
776 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
777 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
b481de9c 778 */
1ff50bda 779struct iwl_qosparam_cmd {
b481de9c 780 __le32 qos_flags;
1ff50bda 781 struct iwl_ac_qos ac[AC_NUM];
ba2d3587 782} __packed;
b481de9c
ZY
783
784/******************************************************************************
785 * (3)
786 * Add/Modify Stations Commands & Responses:
787 *
788 *****************************************************************************/
789/*
790 * Multi station support
791 */
2054a00b
BC
792
793/* Special, dedicated locations within device's station table */
b481de9c 794#define IWL_AP_ID 0
946ba30d 795#define IWL_AP_ID_PAN 1
b481de9c 796#define IWL_STA_ID 2
946ba30d 797#define IWLAGN_PAN_BCAST_ID 14
bf3c7fdd
WYG
798#define IWLAGN_BROADCAST_ID 15
799#define IWLAGN_STATION_COUNT 16
b481de9c 800
b481de9c
ZY
801#define IWL_INVALID_STATION 255
802
1bd14eaf
JB
803#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
804#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
946ba30d 805#define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
51e9bf5d
HH
806#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
807#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
74093ddf 808#define STA_FLG_MAX_AGG_SIZE_POS (19)
51e9bf5d 809#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
7aafef1c 810#define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
51e9bf5d 811#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
74093ddf 812#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
51e9bf5d 813#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
b481de9c 814
2054a00b 815/* Use in mode field. 1: modify existing entry, 0: add new station entry */
b481de9c
ZY
816#define STA_CONTROL_MODIFY_MSK 0x01
817
818/* key flags __le16*/
51e9bf5d
HH
819#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
820#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
821#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
822#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
823#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
b481de9c
ZY
824
825#define STA_KEY_FLG_KEYID_POS 8
51e9bf5d 826#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
eaaf7894 827/* wep key is either from global key (0) or from station info array (1) */
51e9bf5d 828#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
eaaf7894
EG
829
830/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
51e9bf5d
HH
831#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
832#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
deb09c43 833#define STA_KEY_MAX_NUM 8
c10afb6e 834#define STA_KEY_MAX_NUM_PAN 16
5a3d9882
JB
835/* must not match WEP_INVALID_OFFSET */
836#define IWLAGN_HW_KEY_DEFAULT 0xfe
b481de9c 837
2054a00b 838/* Flags indicate whether to modify vs. don't change various station params */
b481de9c
ZY
839#define STA_MODIFY_KEY_MASK 0x01
840#define STA_MODIFY_TID_DISABLE_TX 0x02
841#define STA_MODIFY_TX_RATE_MSK 0x04
842#define STA_MODIFY_ADDBA_TID_MSK 0x08
843#define STA_MODIFY_DELBA_TID_MSK 0x10
6ab10ff8 844#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
2054a00b
BC
845
846/* Receiver address (actually, Rx station's index into station table),
847 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
b481de9c
ZY
848#define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
849
a8029bb7 850/* agn */
133636de
TW
851struct iwl_keyinfo {
852 __le16 key_flags;
853 u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
854 u8 reserved1;
855 __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
856 u8 key_offset;
857 u8 reserved2;
858 u8 key[16]; /* 16-byte unicast decryption key */
859 __le64 tx_secur_seq_cnt;
860 __le64 hw_tkip_mic_rx_key;
861 __le64 hw_tkip_mic_tx_key;
ba2d3587 862} __packed;
133636de 863
2054a00b
BC
864/**
865 * struct sta_id_modify
866 * @addr[ETH_ALEN]: station's MAC address
867 * @sta_id: index of station in uCode's station table
868 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
869 *
870 * Driver selects unused table index when adding new station,
871 * or the index to a pre-existing station entry when modifying that station.
872 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
873 *
874 * modify_mask flags select which parameters to modify vs. leave alone.
875 */
b481de9c
ZY
876struct sta_id_modify {
877 u8 addr[ETH_ALEN];
878 __le16 reserved1;
879 u8 sta_id;
880 u8 modify_mask;
881 __le16 reserved2;
ba2d3587 882} __packed;
b481de9c
ZY
883
884/*
885 * REPLY_ADD_STA = 0x18 (command)
2054a00b
BC
886 *
887 * The device contains an internal table of per-station information,
888 * with info on security keys, aggregation parameters, and Tx rates for
767d055d
WYG
889 * initial Tx attempt and any retries (agn devices uses
890 * REPLY_TX_LINK_QUALITY_CMD,
2054a00b
BC
891 *
892 * REPLY_ADD_STA sets up the table entry for one station, either creating
893 * a new entry, or modifying a pre-existing one.
894 *
895 * NOTE: RXON command (without "associated" bit set) wipes the station table
896 * clean. Moving into RF_KILL state does this also. Driver must set up
897 * new station table before transmitting anything on the RXON channel
898 * (except active scans or active measurements; those commands carry
899 * their own txpower/rate setup data).
900 *
901 * When getting started on a new channel, driver must set up the
902 * IWL_BROADCAST_ID entry (last entry in the table). For a client
903 * station in a BSS, once an AP is selected, driver sets up the AP STA
904 * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
905 * are all that are needed for a BSS client station. If the device is
906 * used as AP, or in an IBSS network, driver must set up station table
907 * entries for all STAs in network, starting with index IWL_STA_ID.
b481de9c 908 */
3d24a9f7 909
133636de
TW
910struct iwl_addsta_cmd {
911 u8 mode; /* 1: modify existing, 0: add new station */
912 u8 reserved[3];
913 struct sta_id_modify sta;
914 struct iwl_keyinfo key;
915 __le32 station_flags; /* STA_FLG_* */
916 __le32 station_flags_msk; /* STA_FLG_* */
917
918 /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
919 * corresponding to bit (e.g. bit 5 controls TID 5).
920 * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
921 __le16 tid_disable_tx;
922
c587de0b 923 __le16 rate_n_flags; /* 3945 only */
133636de
TW
924
925 /* TID for which to add block-ack support.
926 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
927 u8 add_immediate_ba_tid;
928
929 /* TID for which to remove block-ack support.
930 * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
931 u8 remove_immediate_ba_tid;
932
933 /* Starting Sequence Number for added block-ack support.
934 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
935 __le16 add_immediate_ba_ssn;
936
9bb487b4
JB
937 /*
938 * Number of packets OK to transmit to station even though
939 * it is asleep -- used to synchronise PS-poll and u-APSD
940 * responses while ucode keeps track of STA sleep state.
941 */
942 __le16 sleep_tx_count;
943
944 __le16 reserved2;
ba2d3587 945} __packed;
133636de
TW
946
947
2054a00b
BC
948#define ADD_STA_SUCCESS_MSK 0x1
949#define ADD_STA_NO_ROOM_IN_TABLE 0x2
950#define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
951#define ADD_STA_MODIFY_NON_EXIST_STA 0x8
b481de9c
ZY
952/*
953 * REPLY_ADD_STA = 0x18 (response)
954 */
7a999bf0 955struct iwl_add_sta_resp {
2054a00b 956 u8 status; /* ADD_STA_* */
ba2d3587 957} __packed;
b481de9c 958
7a999bf0
TW
959#define REM_STA_SUCCESS_MSK 0x1
960/*
961 * REPLY_REM_STA = 0x19 (response)
962 */
963struct iwl_rem_sta_resp {
964 u8 status;
ba2d3587 965} __packed;
7a999bf0
TW
966
967/*
968 * REPLY_REM_STA = 0x19 (command)
969 */
970struct iwl_rem_sta_cmd {
971 u8 num_sta; /* number of removed stations */
972 u8 reserved[3];
973 u8 addr[ETH_ALEN]; /* MAC addr of the first station */
974 u8 reserved2[2];
ba2d3587 975} __packed;
7a999bf0 976
f88e0ecc
WYG
977
978/* WiFi queues mask */
979#define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
980#define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
981#define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
982#define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
983#define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
984
985/* PAN queues mask */
986#define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
987#define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
988#define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
989#define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
990#define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
991#define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
992
947279ee
WYG
993#define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
994
716c74b0 995#define IWL_DROP_SINGLE 0
ecdbe86e 996#define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN))
716c74b0 997
947279ee
WYG
998/*
999 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
1000 *
1001 * When using full FIFO flush this command checks the scheduler HW block WR/RD
1002 * pointers to check if all the frames were transferred by DMA into the
1003 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
1004 * empty the command can finish.
1005 * This command is used to flush the TXFIFO from transmit commands, it may
1006 * operate on single or multiple queues, the command queue can't be flushed by
1007 * this command. The command response is returned when all the queue flush
1008 * operations are done. Each TX command flushed return response with the FLUSH
1009 * status set in the TX response status. When FIFO flush operation is used,
1010 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1011 * are set.
1012 *
1013 * @fifo_control: bit mask for which queues to flush
1014 * @flush_control: flush controls
1015 * 0: Dump single MSDU
1016 * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1017 * 2: Dump all FIFO
1018 */
1019struct iwl_txfifo_flush_cmd {
1020 __le32 fifo_control;
1021 __le16 flush_control;
1022 __le16 reserved;
0e954099 1023} __packed;
947279ee 1024
0a0bed1d
EG
1025/*
1026 * REPLY_WEP_KEY = 0x20
1027 */
1028struct iwl_wep_key {
1029 u8 key_index;
1030 u8 key_offset;
1031 u8 reserved1[2];
1032 u8 key_size;
1033 u8 reserved2[3];
1034 u8 key[16];
ba2d3587 1035} __packed;
0a0bed1d
EG
1036
1037struct iwl_wep_cmd {
1038 u8 num_keys;
1039 u8 global_key_type;
1040 u8 flags;
1041 u8 reserved;
1042 struct iwl_wep_key key[0];
ba2d3587 1043} __packed;
0a0bed1d
EG
1044
1045#define WEP_KEY_WEP_TYPE 1
1046#define WEP_KEYS_MAX 4
1047#define WEP_INVALID_OFFSET 0xff
4564ce8b 1048#define WEP_KEY_LEN_64 5
0a0bed1d 1049#define WEP_KEY_LEN_128 13
b481de9c
ZY
1050
1051/******************************************************************************
1052 * (4)
1053 * Rx Responses:
1054 *
1055 *****************************************************************************/
1056
51e9bf5d
HH
1057#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1058#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
8211ef78 1059
51e9bf5d
HH
1060#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1061#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1062#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1063#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
9024adf5 1064#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
9f30e04e 1065#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
8211ef78
TW
1066
1067#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1068#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1069#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1070#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1071#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
17e476b8
EG
1072#define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1073
1074#define RX_RES_STATUS_STATION_FOUND (1<<6)
1075#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
8211ef78
TW
1076
1077#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1078#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1079#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1080#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1081#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
b481de9c 1082
17e476b8
EG
1083#define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1084#define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1085#define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1086#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1087
3d24a9f7 1088
7ccc896f
WYG
1089#define IWLAGN_RX_RES_PHY_CNT 8
1090#define IWLAGN_RX_RES_AGC_IDX 1
1091#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1092#define IWLAGN_RX_RES_RSSI_C_IDX 3
1093#define IWLAGN_OFDM_AGC_MSK 0xfe00
1094#define IWLAGN_OFDM_AGC_BIT_POS 9
1095#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1096#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1097#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1098#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1099#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1100#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1101#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1102#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1103#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1104
1105struct iwlagn_non_cfg_phy {
1106 __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
ba2d3587 1107} __packed;
caab8f1a
TW
1108
1109
b481de9c 1110/*
857485c0 1111 * REPLY_RX = 0xc3 (response only, not a command)
b481de9c
ZY
1112 * Used only for legacy (non 11n) frames.
1113 */
caab8f1a 1114struct iwl_rx_phy_res {
b481de9c
ZY
1115 u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1116 u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1117 u8 stat_id; /* configurable DSP phy data set ID */
1118 u8 reserved1;
1119 __le64 timestamp; /* TSF at on air rise */
1120 __le32 beacon_time_stamp; /* beacon at on-air rise */
1121 __le16 phy_flags; /* general phy flags: band, modulation, ... */
1122 __le16 channel; /* channel number */
caab8f1a 1123 u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
52969981
BC
1124 __le32 rate_n_flags; /* RATE_MCS_* */
1125 __le16 byte_count; /* frame's byte-count */
30c1b0f7 1126 __le16 frame_time; /* frame's time on the air */
ba2d3587 1127} __packed;
b481de9c 1128
2fb291ee 1129struct iwl_rx_mpdu_res_start {
b481de9c
ZY
1130 __le16 byte_count;
1131 __le16 reserved;
ba2d3587 1132} __packed;
b481de9c
ZY
1133
1134
1135/******************************************************************************
1136 * (5)
1137 * Tx Commands & Responses:
1138 *
52969981
BC
1139 * Driver must place each REPLY_TX command into one of the prioritized Tx
1140 * queues in host DRAM, shared between driver and device (see comments for
1141 * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1142 * are preparing to transmit, the device pulls the Tx command over the PCI
1143 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1144 * from which data will be transmitted.
1145 *
1146 * uCode handles all timing and protocol related to control frames
1147 * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1148 * handle reception of block-acks; uCode updates the host driver via
767d055d 1149 * REPLY_COMPRESSED_BA.
52969981
BC
1150 *
1151 * uCode handles retrying Tx when an ACK is expected but not received.
1152 * This includes trying lower data rates than the one requested in the Tx
1153 * command, as set up by the REPLY_RATE_SCALE (for 3945) or
767d055d 1154 * REPLY_TX_LINK_QUALITY_CMD (agn).
52969981
BC
1155 *
1156 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1157 * This command must be executed after every RXON command, before Tx can occur.
b481de9c
ZY
1158 *****************************************************************************/
1159
52969981
BC
1160/* REPLY_TX Tx flags field */
1161
4e3243f5
WYG
1162/*
1163 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
a326a5d0 1164 * before this frame. if CTS-to-self required check
4e3243f5
WYG
1165 * RXON_FLG_SELF_CTS_EN status.
1166 * unused in 3945/4965, used in 5000 series and after
1167 */
1168#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
a326a5d0 1169
4e3243f5
WYG
1170/*
1171 * 1: Use Request-To-Send protocol before this frame.
1172 * Mutually exclusive vs. TX_CMD_FLG_CTS_MSK.
1173 * used in 3945/4965, unused in 5000 series and after
1174 */
51e9bf5d 1175#define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1)
52969981 1176
4e3243f5
WYG
1177/*
1178 * 1: Transmit Clear-To-Send to self before this frame.
52969981 1179 * Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames.
4e3243f5
WYG
1180 * Mutually exclusive vs. TX_CMD_FLG_RTS_MSK.
1181 * used in 3945/4965, unused in 5000 series and after
1182 */
51e9bf5d 1183#define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2)
52969981
BC
1184
1185/* 1: Expect ACK from receiving station
1186 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1187 * Set this for unicast frames, but not broadcast/multicast. */
51e9bf5d 1188#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
52969981 1189
767d055d 1190/* For agn devices:
52969981
BC
1191 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1192 * Tx command's initial_rate_index indicates first rate to try;
1193 * uCode walks through table for additional Tx attempts.
1194 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1195 * This rate will be used for all Tx attempts; it will not be scaled. */
51e9bf5d 1196#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
52969981
BC
1197
1198/* 1: Expect immediate block-ack.
1199 * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
51e9bf5d 1200#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
52969981 1201
4e3243f5
WYG
1202/*
1203 * 1: Frame requires full Tx-Op protection.
1204 * Set this if either RTS or CTS Tx Flag gets set.
1205 * used in 3945/4965, unused in 5000 series and after
1206 */
51e9bf5d 1207#define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7)
52969981 1208
767d055d 1209/* Tx antenna selection field; used only for 3945, reserved (0) for agn devices.
52969981 1210 * Set field to "0" to allow 3945 uCode to select antenna (normal usage). */
51e9bf5d
HH
1211#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1212#define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
1213#define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
b481de9c 1214
52969981
BC
1215/* 1: Ignore Bluetooth priority for this frame.
1216 * 0: Delay Tx until Bluetooth device is done (normal usage). */
b2e8690d 1217#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
b481de9c 1218
52969981
BC
1219/* 1: uCode overrides sequence control field in MAC header.
1220 * 0: Driver provides sequence control field in MAC header.
1221 * Set this for management frames, non-QOS data frames, non-unicast frames,
1222 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
51e9bf5d 1223#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
b481de9c 1224
52969981
BC
1225/* 1: This frame is non-last MPDU; more fragments are coming.
1226 * 0: Last fragment, or not using fragmentation. */
51e9bf5d 1227#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
b481de9c 1228
52969981
BC
1229/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1230 * 0: No TSF required in outgoing frame.
1231 * Set this for transmitting beacons and probe responses. */
51e9bf5d 1232#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
b481de9c 1233
52969981
BC
1234/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1235 * alignment of frame's payload data field.
1236 * 0: No pad
1237 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1238 * field (but not both). Driver must align frame data (i.e. data following
1239 * MAC header) to DWORD boundary. */
51e9bf5d 1240#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
b481de9c 1241
8236e183
MS
1242/* accelerate aggregation support
1243 * 0 - no CCMP encryption; 1 - CCMP encryption */
51e9bf5d 1244#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
8236e183 1245
b481de9c 1246/* HCCA-AP - disable duration overwriting. */
51e9bf5d 1247#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
b481de9c 1248
52969981 1249
b481de9c
ZY
1250/*
1251 * TX command security control
1252 */
1253#define TX_CMD_SEC_WEP 0x01
1254#define TX_CMD_SEC_CCM 0x02
1255#define TX_CMD_SEC_TKIP 0x03
1256#define TX_CMD_SEC_MSK 0x03
1257#define TX_CMD_SEC_SHIFT 6
1258#define TX_CMD_SEC_KEY128 0x08
1259
3195cdb7
TW
1260/*
1261 * security overhead sizes
1262 */
1263#define WEP_IV_LEN 4
1264#define WEP_ICV_LEN 4
1265#define CCMP_MIC_LEN 8
1266#define TKIP_ICV_LEN 4
1267
3d24a9f7
TW
1268/*
1269 * REPLY_TX = 0x1c (command)
1270 */
1271
b481de9c 1272/*
52969981
BC
1273 * 4965 uCode updates these Tx attempt count values in host DRAM.
1274 * Used for managing Tx retries when expecting block-acks.
1275 * Driver should set these fields to 0.
b481de9c 1276 */
2aa6ab86 1277struct iwl_dram_scratch {
52969981
BC
1278 u8 try_cnt; /* Tx attempts */
1279 u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
b481de9c 1280 __le16 reserved;
ba2d3587 1281} __packed;
b481de9c 1282
83d527d9 1283struct iwl_tx_cmd {
52969981
BC
1284 /*
1285 * MPDU byte count:
1286 * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1287 * + 8 byte IV for CCM or TKIP (not used for WEP)
1288 * + Data payload
1289 * + 8-byte MIC (not used for CCM/WEP)
1290 * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1291 * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1292 * Range: 14-2342 bytes.
1293 */
b481de9c 1294 __le16 len;
52969981
BC
1295
1296 /*
1297 * MPDU or MSDU byte count for next frame.
1298 * Used for fragmentation and bursting, but not 11n aggregation.
1299 * Same as "len", but for next frame. Set to 0 if not applicable.
1300 */
b481de9c 1301 __le16 next_frame_len;
52969981
BC
1302
1303 __le32 tx_flags; /* TX_CMD_FLG_* */
1304
2aa6ab86 1305 /* uCode may modify this field of the Tx command (in host DRAM!).
52969981 1306 * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
2aa6ab86 1307 struct iwl_dram_scratch scratch;
52969981
BC
1308
1309 /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1310 __le32 rate_n_flags; /* RATE_MCS_* */
1311
1312 /* Index of destination station in uCode's station table */
b481de9c 1313 u8 sta_id;
52969981
BC
1314
1315 /* Type of security encryption: CCM or TKIP */
1316 u8 sec_ctl; /* TX_CMD_SEC_* */
1317
1318 /*
1319 * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1320 * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1321 * data frames, this field may be used to selectively reduce initial
1322 * rate (via non-0 value) for special frames (e.g. management), while
1323 * still supporting rate scaling for all frames.
1324 */
b481de9c
ZY
1325 u8 initial_rate_index;
1326 u8 reserved;
b481de9c 1327 u8 key[16];
b481de9c
ZY
1328 __le16 next_frame_flags;
1329 __le16 reserved2;
b481de9c
ZY
1330 union {
1331 __le32 life_time;
1332 __le32 attempt;
1333 } stop_time;
52969981
BC
1334
1335 /* Host DRAM physical address pointer to "scratch" in this command.
1336 * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
b481de9c
ZY
1337 __le32 dram_lsb_ptr;
1338 u8 dram_msb_ptr;
52969981 1339
b481de9c
ZY
1340 u8 rts_retry_limit; /*byte 50 */
1341 u8 data_retry_limit; /*byte 51 */
b481de9c 1342 u8 tid_tspec;
b481de9c
ZY
1343 union {
1344 __le16 pm_frame_timeout;
1345 __le16 attempt_duration;
1346 } timeout;
52969981
BC
1347
1348 /*
1349 * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1350 * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1351 */
b481de9c 1352 __le16 driver_txop;
52969981
BC
1353
1354 /*
1355 * MAC header goes here, followed by 2 bytes padding if MAC header
1356 * length is 26 or 30 bytes, followed by payload data
1357 */
b481de9c
ZY
1358 u8 payload[0];
1359 struct ieee80211_hdr hdr[0];
ba2d3587 1360} __packed;
b481de9c 1361
04569cbe
WYG
1362/*
1363 * TX command response is sent after *agn* transmission attempts.
1364 *
1365 * both postpone and abort status are expected behavior from uCode. there is
1366 * no special operation required from driver; except for RFKILL_FLUSH,
1367 * which required tx flush host command to flush all the tx frames in queues
1368 */
b481de9c
ZY
1369enum {
1370 TX_STATUS_SUCCESS = 0x01,
1371 TX_STATUS_DIRECT_DONE = 0x02,
04569cbe
WYG
1372 /* postpone TX */
1373 TX_STATUS_POSTPONE_DELAY = 0x40,
1374 TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1375 TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1376 TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1377 TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1378 /* abort TX */
1379 TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
b481de9c
ZY
1380 TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1381 TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1382 TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
04569cbe
WYG
1383 TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1384 TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
b481de9c
ZY
1385 TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1386 TX_STATUS_FAIL_DEST_PS = 0x88,
04569cbe 1387 TX_STATUS_FAIL_HOST_ABORTED = 0x89,
b481de9c
ZY
1388 TX_STATUS_FAIL_BT_RETRY = 0x8a,
1389 TX_STATUS_FAIL_STA_INVALID = 0x8b,
1390 TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1391 TX_STATUS_FAIL_TID_DISABLE = 0x8d,
04569cbe 1392 TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
b481de9c 1393 TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1d270075
WYG
1394 TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1395 TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
b481de9c
ZY
1396};
1397
1398#define TX_PACKET_MODE_REGULAR 0x0000
1399#define TX_PACKET_MODE_BURST_SEQ 0x0100
1400#define TX_PACKET_MODE_BURST_FIRST 0x0200
1401
1402enum {
1403 TX_POWER_PA_NOT_ACTIVE = 0x0,
1404};
1405
1406enum {
3fd07a1e 1407 TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
b481de9c
ZY
1408 TX_STATUS_DELAY_MSK = 0x00000040,
1409 TX_STATUS_ABORT_MSK = 0x00000080,
1410 TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1411 TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
3fd07a1e 1412 TX_RESERVED = 0x00780000, /* bits 19:22 */
b481de9c
ZY
1413 TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1414 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1415};
1416
1417/* *******************************
52969981 1418 * TX aggregation status
b481de9c
ZY
1419 ******************************* */
1420
1421enum {
1422 AGG_TX_STATE_TRANSMITTED = 0x00,
1423 AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1424 AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1425 AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1426 AGG_TX_STATE_ABORT_MSK = 0x08,
1427 AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1428 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1429 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1430 AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1431 AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1432 AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1433 AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1434 AGG_TX_STATE_DELAY_TX_MSK = 0x400
1435};
1436
e1b3fa0c
WYG
1437#define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1438#define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1439
3fd07a1e
TW
1440#define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1441 AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1442 AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
b481de9c 1443
52969981 1444/* # tx attempts for first frame in aggregation */
b481de9c
ZY
1445#define AGG_TX_STATE_TRY_CNT_POS 12
1446#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1447
52969981 1448/* Command ID and sequence number of Tx command for this frame */
b481de9c
ZY
1449#define AGG_TX_STATE_SEQ_NUM_POS 16
1450#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1451
1452/*
1453 * REPLY_TX = 0x1c (response)
52969981
BC
1454 *
1455 * This response may be in one of two slightly different formats, indicated
1456 * by the frame_count field:
1457 *
1458 * 1) No aggregation (frame_count == 1). This reports Tx results for
1459 * a single frame. Multiple attempts, at various bit rates, may have
1460 * been made for this frame.
1461 *
1462 * 2) Aggregation (frame_count > 1). This reports Tx results for
1463 * 2 or more frames that used block-acknowledge. All frames were
1464 * transmitted at same rate. Rate scaling may have been used if first
1465 * frame in this new agg block failed in previous agg block(s).
1466 *
1467 * Note that, for aggregation, ACK (block-ack) status is not delivered here;
767d055d
WYG
1468 * block-ack has not been received by the time the agn device records
1469 * this status.
52969981 1470 * This status relates to reasons the tx might have been blocked or aborted
767d055d 1471 * within the sending station (this agn device), rather than whether it was
52969981 1472 * received successfully by the destination station.
b481de9c 1473 */
001caff0
RR
1474struct agg_tx_status {
1475 __le16 status;
1476 __le16 sequence;
ba2d3587 1477} __packed;
001caff0 1478
3fd07a1e
TW
1479/*
1480 * definitions for initial rate index field
a96a27f9 1481 * bits [3:0] initial rate index
3fd07a1e
TW
1482 * bits [6:4] rate table color, used for the initial rate
1483 * bit-7 invalid rate indication
1484 * i.e. rate was not chosen from rate table
1485 * or rate table color was changed during frame retries
1486 * refer tlc rate info
1487 */
1488
1489#define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1490#define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1491#define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1492#define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1493#define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1494
1495/* refer to ra_tid */
898dade1
WYG
1496#define IWLAGN_TX_RES_TID_POS 0
1497#define IWLAGN_TX_RES_TID_MSK 0x0f
1498#define IWLAGN_TX_RES_RA_POS 4
1499#define IWLAGN_TX_RES_RA_MSK 0xf0
3fd07a1e 1500
898dade1 1501struct iwlagn_tx_resp {
001caff0
RR
1502 u8 frame_count; /* 1 no aggregation, >1 aggregation */
1503 u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1504 u8 failure_rts; /* # failures due to unsuccessful RTS */
1505 u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1506
1507 /* For non-agg: Rate at which frame was successful.
1508 * For agg: Rate at which all frames were transmitted. */
1509 __le32 rate_n_flags; /* RATE_MCS_* */
1510
1511 /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1512 * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1513 __le16 wireless_media_time; /* uSecs */
1514
3fd07a1e
TW
1515 u8 pa_status; /* RF power amplifier measurement (not used) */
1516 u8 pa_integ_res_a[3];
1517 u8 pa_integ_res_b[3];
1518 u8 pa_integ_res_C[3];
001caff0
RR
1519
1520 __le32 tfd_info;
1521 __le16 seq_ctl;
1522 __le16 byte_cnt;
3fd07a1e
TW
1523 u8 tlc_info;
1524 u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1525 __le16 frame_ctrl;
001caff0
RR
1526 /*
1527 * For non-agg: frame status TX_STATUS_*
1528 * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1529 * fields follow this one, up to frame_count.
1530 * Bit fields:
1531 * 11- 0: AGG_TX_STATE_* status code
1532 * 15-12: Retry count for 1st frame in aggregation (retries
1533 * occur if tx failed for this frame when it was a
1534 * member of a previous aggregation block). If rate
1535 * scaling is used, retry count indicates the rate
1536 * table entry used for all frames in the new agg.
1537 * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1538 */
1539 struct agg_tx_status status; /* TX status (in aggregation -
1540 * status of 1st frame) */
ba2d3587 1541} __packed;
b481de9c
ZY
1542/*
1543 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
52969981
BC
1544 *
1545 * Reports Block-Acknowledge from recipient station
b481de9c 1546 */
653fa4a0 1547struct iwl_compressed_ba_resp {
b481de9c
ZY
1548 __le32 sta_addr_lo32;
1549 __le16 sta_addr_hi16;
1550 __le16 reserved;
52969981
BC
1551
1552 /* Index of recipient (BA-sending) station in uCode's station table */
b481de9c
ZY
1553 u8 sta_id;
1554 u8 tid;
fe01b477
RR
1555 __le16 seq_ctl;
1556 __le64 bitmap;
b481de9c
ZY
1557 __le16 scd_flow;
1558 __le16 scd_ssn;
8829c9e2
WYG
1559 /* following only for 5000 series and up */
1560 u8 txed; /* number of frames sent */
1561 u8 txed_2_done; /* number of frames acked */
ba2d3587 1562} __packed;
b481de9c
ZY
1563
1564/*
1565 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
2bdc7031 1566 *
3d24a9f7 1567 */
3d24a9f7 1568
b481de9c 1569/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
8a1b0245 1570#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
b481de9c 1571
2bdc7031 1572/* # of EDCA prioritized tx fifos */
b481de9c 1573#define LINK_QUAL_AC_NUM AC_NUM
2bdc7031
BC
1574
1575/* # entries in rate scale table to support Tx retries */
b481de9c
ZY
1576#define LINK_QUAL_MAX_RETRY_NUM 16
1577
2bdc7031 1578/* Tx antenna selection values */
8a1b0245
RC
1579#define LINK_QUAL_ANT_A_MSK (1 << 0)
1580#define LINK_QUAL_ANT_B_MSK (1 << 1)
b481de9c
ZY
1581#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1582
2bdc7031
BC
1583
1584/**
66c73db7 1585 * struct iwl_link_qual_general_params
2bdc7031
BC
1586 *
1587 * Used in REPLY_TX_LINK_QUALITY_CMD
1588 */
66c73db7 1589struct iwl_link_qual_general_params {
b481de9c 1590 u8 flags;
2bdc7031
BC
1591
1592 /* No entries at or above this (driver chosen) index contain MIMO */
b481de9c 1593 u8 mimo_delimiter;
2bdc7031
BC
1594
1595 /* Best single antenna to use for single stream (legacy, SISO). */
1596 u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1597
1598 /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1599 u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1600
1601 /*
1602 * If driver needs to use different initial rates for different
1603 * EDCA QOS access categories (as implemented by tx fifos 0-3),
1604 * this table will set that up, by indicating the indexes in the
1605 * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1606 * Otherwise, driver should set all entries to 0.
1607 *
1608 * Entry usage:
1609 * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1610 * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1611 */
b481de9c 1612 u8 start_rate_index[LINK_QUAL_AC_NUM];
ba2d3587 1613} __packed;
b481de9c 1614
13c33a09 1615#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
b15826a7
WYG
1616#define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1617#define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
13c33a09
WYG
1618
1619#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1620#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1621#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1622
4263108c 1623#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
b623a9f7 1624#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
13c33a09
WYG
1625#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1626
2bdc7031 1627/**
66c73db7 1628 * struct iwl_link_qual_agg_params
2bdc7031
BC
1629 *
1630 * Used in REPLY_TX_LINK_QUALITY_CMD
1631 */
66c73db7 1632struct iwl_link_qual_agg_params {
2bdc7031 1633
7469701e
WYG
1634 /*
1635 *Maximum number of uSec in aggregation.
1636 * default set to 4000 (4 milliseconds) if not configured in .cfg
1637 */
b481de9c 1638 __le16 agg_time_limit;
2bdc7031
BC
1639
1640 /*
1641 * Number of Tx retries allowed for a frame, before that frame will
1642 * no longer be considered for the start of an aggregation sequence
1643 * (scheduler will then try to tx it as single frame).
1644 * Driver should set this to 3.
1645 */
b481de9c 1646 u8 agg_dis_start_th;
2bdc7031
BC
1647
1648 /*
1649 * Maximum number of frames in aggregation.
1650 * 0 = no limit (default). 1 = no aggregation.
1651 * Other values = max # frames in aggregation.
1652 */
b481de9c 1653 u8 agg_frame_cnt_limit;
2bdc7031 1654
b481de9c 1655 __le32 reserved;
ba2d3587 1656} __packed;
b481de9c
ZY
1657
1658/*
1659 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
2bdc7031 1660 *
767d055d 1661 * For agn devices only; 3945 uses REPLY_RATE_SCALE.
2bdc7031 1662 *
767d055d
WYG
1663 * Each station in the agn device's internal station table has its own table
1664 * of 16
2bdc7031
BC
1665 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1666 * an ACK is not received. This command replaces the entire table for
1667 * one station.
1668 *
767d055d
WYG
1669 * NOTE: Station must already be in agn device's station table.
1670 * Use REPLY_ADD_STA.
2bdc7031
BC
1671 *
1672 * The rate scaling procedures described below work well. Of course, other
1673 * procedures are possible, and may work better for particular environments.
1674 *
1675 *
1676 * FILLING THE RATE TABLE
1677 *
1678 * Given a particular initial rate and mode, as determined by the rate
1679 * scaling algorithm described below, the Linux driver uses the following
1680 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1681 * Link Quality command:
1682 *
1683 *
1684 * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1685 * a) Use this same initial rate for first 3 entries.
1686 * b) Find next lower available rate using same mode (SISO or MIMO),
1687 * use for next 3 entries. If no lower rate available, switch to
7aafef1c 1688 * legacy mode (no HT40 channel, no MIMO, no short guard interval).
2bdc7031
BC
1689 * c) If using MIMO, set command's mimo_delimiter to number of entries
1690 * using MIMO (3 or 6).
7aafef1c 1691 * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
2bdc7031
BC
1692 * no MIMO, no short guard interval), at the next lower bit rate
1693 * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1694 * legacy procedure for remaining table entries.
1695 *
1696 * 2) If using legacy initial rate:
1697 * a) Use the initial rate for only one entry.
1698 * b) For each following entry, reduce the rate to next lower available
1699 * rate, until reaching the lowest available rate.
1700 * c) When reducing rate, also switch antenna selection.
1701 * d) Once lowest available rate is reached, repeat this rate until
1702 * rate table is filled (16 entries), switching antenna each entry.
1703 *
1704 *
1705 * ACCUMULATING HISTORY
1706 *
767d055d
WYG
1707 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1708 * uses two sets of frame Tx success history: One for the current/active
1709 * modulation mode, and one for a speculative/search mode that is being
1710 * attempted. If the speculative mode turns out to be more effective (i.e.
1711 * actual transfer rate is better), then the driver continues to use the
1712 * speculative mode as the new current active mode.
2bdc7031
BC
1713 *
1714 * Each history set contains, separately for each possible rate, data for a
1715 * sliding window of the 62 most recent tx attempts at that rate. The data
1716 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1717 * and attempted frames, from which the driver can additionally calculate a
1718 * success ratio (success / attempted) and number of failures
1719 * (attempted - success), and control the size of the window (attempted).
1720 * The driver uses the bit map to remove successes from the success sum, as
1721 * the oldest tx attempts fall out of the window.
1722 *
767d055d
WYG
1723 * When the agn device makes multiple tx attempts for a given frame, each
1724 * attempt might be at a different rate, and have different modulation
1725 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1726 * up in the rate scaling table in the Link Quality command. The driver must
1727 * determine which rate table entry was used for each tx attempt, to determine
1728 * which rate-specific history to update, and record only those attempts that
2bdc7031
BC
1729 * match the modulation characteristics of the history set.
1730 *
1731 * When using block-ack (aggregation), all frames are transmitted at the same
a96a27f9 1732 * rate, since there is no per-attempt acknowledgment from the destination
2bdc7031
BC
1733 * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1734 * rate_n_flags field. After receiving a block-ack, the driver can update
1735 * history for the entire block all at once.
1736 *
1737 *
1738 * FINDING BEST STARTING RATE:
1739 *
1740 * When working with a selected initial modulation mode (see below), the
1741 * driver attempts to find a best initial rate. The initial rate is the
1742 * first entry in the Link Quality command's rate table.
1743 *
1744 * 1) Calculate actual throughput (success ratio * expected throughput, see
1745 * table below) for current initial rate. Do this only if enough frames
1746 * have been attempted to make the value meaningful: at least 6 failed
1747 * tx attempts, or at least 8 successes. If not enough, don't try rate
1748 * scaling yet.
1749 *
1750 * 2) Find available rates adjacent to current initial rate. Available means:
1751 * a) supported by hardware &&
1752 * b) supported by association &&
1753 * c) within any constraints selected by user
1754 *
1755 * 3) Gather measured throughputs for adjacent rates. These might not have
1756 * enough history to calculate a throughput. That's okay, we might try
1757 * using one of them anyway!
1758 *
1759 * 4) Try decreasing rate if, for current rate:
1760 * a) success ratio is < 15% ||
1761 * b) lower adjacent rate has better measured throughput ||
1762 * c) higher adjacent rate has worse throughput, and lower is unmeasured
1763 *
1764 * As a sanity check, if decrease was determined above, leave rate
1765 * unchanged if:
1766 * a) lower rate unavailable
1767 * b) success ratio at current rate > 85% (very good)
1768 * c) current measured throughput is better than expected throughput
1769 * of lower rate (under perfect 100% tx conditions, see table below)
1770 *
1771 * 5) Try increasing rate if, for current rate:
1772 * a) success ratio is < 15% ||
1773 * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1774 * b) higher adjacent rate has better measured throughput ||
1775 * c) lower adjacent rate has worse throughput, and higher is unmeasured
1776 *
1777 * As a sanity check, if increase was determined above, leave rate
1778 * unchanged if:
1779 * a) success ratio at current rate < 70%. This is not particularly
1780 * good performance; higher rate is sure to have poorer success.
1781 *
1782 * 6) Re-evaluate the rate after each tx frame. If working with block-
1783 * acknowledge, history and statistics may be calculated for the entire
1784 * block (including prior history that fits within the history windows),
1785 * before re-evaluation.
1786 *
1787 * FINDING BEST STARTING MODULATION MODE:
1788 *
1789 * After working with a modulation mode for a "while" (and doing rate scaling),
1790 * the driver searches for a new initial mode in an attempt to improve
1791 * throughput. The "while" is measured by numbers of attempted frames:
1792 *
1793 * For legacy mode, search for new mode after:
1794 * 480 successful frames, or 160 failed frames
1795 * For high-throughput modes (SISO or MIMO), search for new mode after:
1796 * 4500 successful frames, or 400 failed frames
1797 *
1798 * Mode switch possibilities are (3 for each mode):
1799 *
1800 * For legacy:
1801 * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1802 * For SISO:
1803 * Change antenna, try MIMO, try shortened guard interval (SGI)
1804 * For MIMO:
1805 * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1806 *
1807 * When trying a new mode, use the same bit rate as the old/current mode when
1808 * trying antenna switches and shortened guard interval. When switching to
1809 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1810 * for which the expected throughput (under perfect conditions) is about the
1811 * same or slightly better than the actual measured throughput delivered by
1812 * the old/current mode.
1813 *
1814 * Actual throughput can be estimated by multiplying the expected throughput
1815 * by the success ratio (successful / attempted tx frames). Frame size is
1816 * not considered in this calculation; it assumes that frame size will average
1817 * out to be fairly consistent over several samples. The following are
1818 * metric values for expected throughput assuming 100% success ratio.
1819 * Only G band has support for CCK rates:
1820 *
1821 * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1822 *
1823 * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1824 * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1825 * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1826 * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1827 * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1828 * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1829 * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1830 * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1831 * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1832 * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1833 *
1834 * After the new mode has been tried for a short while (minimum of 6 failed
1835 * frames or 8 successful frames), compare success ratio and actual throughput
1836 * estimate of the new mode with the old. If either is better with the new
1837 * mode, continue to use the new mode.
1838 *
1839 * Continue comparing modes until all 3 possibilities have been tried.
1840 * If moving from legacy to HT, try all 3 possibilities from the new HT
1841 * mode. After trying all 3, a best mode is found. Continue to use this mode
1842 * for the longer "while" described above (e.g. 480 successful frames for
1843 * legacy), and then repeat the search process.
1844 *
b481de9c 1845 */
66c73db7 1846struct iwl_link_quality_cmd {
2bdc7031
BC
1847
1848 /* Index of destination/recipient station in uCode's station table */
b481de9c
ZY
1849 u8 sta_id;
1850 u8 reserved1;
2bdc7031 1851 __le16 control; /* not used */
66c73db7
TW
1852 struct iwl_link_qual_general_params general_params;
1853 struct iwl_link_qual_agg_params agg_params;
2bdc7031
BC
1854
1855 /*
1856 * Rate info; when using rate-scaling, Tx command's initial_rate_index
1857 * specifies 1st Tx rate attempted, via index into this table.
767d055d 1858 * agn devices works its way through table when retrying Tx.
2bdc7031 1859 */
b481de9c 1860 struct {
2bdc7031 1861 __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
b481de9c
ZY
1862 } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1863 __le32 reserved2;
ba2d3587 1864} __packed;
b481de9c 1865
dab1c161
WYG
1866/*
1867 * BT configuration enable flags:
1868 * bit 0 - 1: BT channel announcement enabled
1869 * 0: disable
1870 * bit 1 - 1: priority of BT device enabled
1871 * 0: disable
1872 * bit 2 - 1: BT 2 wire support enabled
1873 * 0: disable
1874 */
456d0f76 1875#define BT_COEX_DISABLE (0x0)
dab1c161
WYG
1876#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1877#define BT_ENABLE_PRIORITY BIT(1)
1878#define BT_ENABLE_2_WIRE BIT(2)
456d0f76 1879
06702a73
WYG
1880#define BT_COEX_DISABLE (0x0)
1881#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1882
456d0f76
WYG
1883#define BT_LEAD_TIME_MIN (0x0)
1884#define BT_LEAD_TIME_DEF (0x1E)
1885#define BT_LEAD_TIME_MAX (0xFF)
1886
1887#define BT_MAX_KILL_MIN (0x1)
1888#define BT_MAX_KILL_DEF (0x5)
1889#define BT_MAX_KILL_MAX (0xFF)
1890
22bf59a0
WYG
1891#define BT_DURATION_LIMIT_DEF 625
1892#define BT_DURATION_LIMIT_MAX 1250
1893#define BT_DURATION_LIMIT_MIN 625
1894
1895#define BT_ON_THRESHOLD_DEF 4
1896#define BT_ON_THRESHOLD_MAX 1000
1897#define BT_ON_THRESHOLD_MIN 1
1898
1899#define BT_FRAG_THRESHOLD_DEF 0
1900#define BT_FRAG_THRESHOLD_MAX 0
1901#define BT_FRAG_THRESHOLD_MIN 0
1902
95a5ede3
WYG
1903#define BT_AGG_THRESHOLD_DEF 1200
1904#define BT_AGG_THRESHOLD_MAX 8000
1905#define BT_AGG_THRESHOLD_MIN 400
22bf59a0 1906
b481de9c
ZY
1907/*
1908 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
3058f021 1909 *
767d055d 1910 * 3945 and agn devices support hardware handshake with Bluetooth device on
3058f021 1911 * same platform. Bluetooth device alerts wireless device when it will Tx;
a96a27f9 1912 * wireless device can delay or kill its own Tx to accommodate.
b481de9c 1913 */
2aa6ab86 1914struct iwl_bt_cmd {
b481de9c
ZY
1915 u8 flags;
1916 u8 lead_time;
1917 u8 max_kill;
1918 u8 reserved;
1919 __le32 kill_ack_mask;
1920 __le32 kill_cts_mask;
ba2d3587 1921} __packed;
b481de9c 1922
b6e116e8 1923#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
670245ed 1924
b6e116e8
WYG
1925#define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1926#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1927#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1928#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1929#define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1930#define IWLAGN_BT_FLAG_COEX_MODE_4W 3
670245ed 1931
eeb1f83f
WYG
1932#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1933/* Disable Sync PSPoll on SCO/eSCO */
1934#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
670245ed 1935
207ecc5e
MV
1936#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1937#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1938
b6e116e8
WYG
1939#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1940#define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1941#define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
670245ed 1942
b6e116e8 1943#define IWLAGN_BT_MAX_KILL_DEFAULT 5
670245ed 1944
b6e116e8 1945#define IWLAGN_BT3_T7_DEFAULT 1
670245ed 1946
05433df2
WYG
1947#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1948#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
506aa156 1949#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
670245ed 1950
b6e116e8 1951#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
670245ed 1952
b6e116e8 1953#define IWLAGN_BT3_T2_DEFAULT 0xc
670245ed 1954
b6e116e8
WYG
1955#define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1956#define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1957#define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1958#define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1959#define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1960#define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1961#define IWLAGN_BT_VALID_BT4_TIMES cpu_to_le16(BIT(6))
1962#define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
670245ed 1963
b6e116e8
WYG
1964#define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1965 IWLAGN_BT_VALID_BOOST | \
1966 IWLAGN_BT_VALID_MAX_KILL | \
1967 IWLAGN_BT_VALID_3W_TIMERS | \
1968 IWLAGN_BT_VALID_KILL_ACK_MASK | \
1969 IWLAGN_BT_VALID_KILL_CTS_MASK | \
1970 IWLAGN_BT_VALID_BT4_TIMES | \
1971 IWLAGN_BT_VALID_3W_LUT)
670245ed 1972
6013270a 1973struct iwl_basic_bt_cmd {
670245ed
JB
1974 u8 flags;
1975 u8 ledtime; /* unused */
1976 u8 max_kill;
1977 u8 bt3_timer_t7_value;
1978 __le32 kill_ack_mask;
1979 __le32 kill_cts_mask;
1980 u8 bt3_prio_sample_time;
1981 u8 bt3_timer_t2_value;
1982 __le16 bt4_reaction_time; /* unused */
1983 __le32 bt3_lookup_table[12];
1984 __le16 bt4_decision_time; /* unused */
1985 __le16 valid;
6013270a
WYG
1986};
1987
1988struct iwl6000_bt_cmd {
1989 struct iwl_basic_bt_cmd basic;
670245ed 1990 u8 prio_boost;
b345f4da
WYG
1991 /*
1992 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1993 * if configure the following patterns
1994 */
1995 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1996 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
670245ed
JB
1997};
1998
d6f62655 1999struct iwl2000_bt_cmd {
6013270a 2000 struct iwl_basic_bt_cmd basic;
d6f62655
WYG
2001 __le32 prio_boost;
2002 /*
2003 * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
2004 * if configure the following patterns
2005 */
2006 u8 reserved;
2007 u8 tx_prio_boost; /* SW boost of WiFi tx priority */
2008 __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
2009};
2010
b6e116e8 2011#define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
9e4afc21 2012
b6e116e8 2013struct iwlagn_bt_sco_cmd {
9e4afc21
JB
2014 __le32 flags;
2015};
2016
b481de9c
ZY
2017/******************************************************************************
2018 * (6)
2019 * Spectrum Management (802.11h) Commands, Responses, Notifications:
2020 *
2021 *****************************************************************************/
2022
2023/*
2024 * Spectrum Management
2025 */
2026#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2027 RXON_FILTER_CTL2HOST_MSK | \
2028 RXON_FILTER_ACCEPT_GRP_MSK | \
2029 RXON_FILTER_DIS_DECRYPT_MSK | \
2030 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2031 RXON_FILTER_ASSOC_MSK | \
2032 RXON_FILTER_BCON_AWARE_MSK)
2033
2aa6ab86 2034struct iwl_measure_channel {
b481de9c
ZY
2035 __le32 duration; /* measurement duration in extended beacon
2036 * format */
2037 u8 channel; /* channel to measure */
2aa6ab86 2038 u8 type; /* see enum iwl_measure_type */
b481de9c 2039 __le16 reserved;
ba2d3587 2040} __packed;
b481de9c
ZY
2041
2042/*
2043 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2044 */
2aa6ab86 2045struct iwl_spectrum_cmd {
b481de9c
ZY
2046 __le16 len; /* number of bytes starting from token */
2047 u8 token; /* token id */
2048 u8 id; /* measurement id -- 0 or 1 */
2049 u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2050 u8 periodic; /* 1 = periodic */
2051 __le16 path_loss_timeout;
2052 __le32 start_time; /* start time in extended beacon format */
2053 __le32 reserved2;
2054 __le32 flags; /* rxon flags */
2055 __le32 filter_flags; /* rxon filter flags */
2056 __le16 channel_count; /* minimum 1, maximum 10 */
2057 __le16 reserved3;
2aa6ab86 2058 struct iwl_measure_channel channels[10];
ba2d3587 2059} __packed;
b481de9c
ZY
2060
2061/*
2062 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2063 */
2aa6ab86 2064struct iwl_spectrum_resp {
b481de9c
ZY
2065 u8 token;
2066 u8 id; /* id of the prior command replaced, or 0xff */
2067 __le16 status; /* 0 - command will be handled
2068 * 1 - cannot handle (conflicts with another
2069 * measurement) */
ba2d3587 2070} __packed;
b481de9c 2071
2aa6ab86 2072enum iwl_measurement_state {
b481de9c
ZY
2073 IWL_MEASUREMENT_START = 0,
2074 IWL_MEASUREMENT_STOP = 1,
2075};
2076
2aa6ab86 2077enum iwl_measurement_status {
b481de9c
ZY
2078 IWL_MEASUREMENT_OK = 0,
2079 IWL_MEASUREMENT_CONCURRENT = 1,
2080 IWL_MEASUREMENT_CSA_CONFLICT = 2,
2081 IWL_MEASUREMENT_TGH_CONFLICT = 3,
2082 /* 4-5 reserved */
2083 IWL_MEASUREMENT_STOPPED = 6,
2084 IWL_MEASUREMENT_TIMEOUT = 7,
2085 IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2086};
2087
2088#define NUM_ELEMENTS_IN_HISTOGRAM 8
2089
2aa6ab86 2090struct iwl_measurement_histogram {
b481de9c
ZY
2091 __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2092 __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
ba2d3587 2093} __packed;
b481de9c
ZY
2094
2095/* clear channel availability counters */
2aa6ab86 2096struct iwl_measurement_cca_counters {
b481de9c
ZY
2097 __le32 ofdm;
2098 __le32 cck;
ba2d3587 2099} __packed;
b481de9c 2100
2aa6ab86 2101enum iwl_measure_type {
b481de9c
ZY
2102 IWL_MEASURE_BASIC = (1 << 0),
2103 IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2104 IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2105 IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2106 IWL_MEASURE_FRAME = (1 << 4),
2107 /* bits 5:6 are reserved */
2108 IWL_MEASURE_IDLE = (1 << 7),
2109};
2110
2111/*
2112 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2113 */
2aa6ab86 2114struct iwl_spectrum_notification {
b481de9c
ZY
2115 u8 id; /* measurement id -- 0 or 1 */
2116 u8 token;
2117 u8 channel_index; /* index in measurement channel list */
2118 u8 state; /* 0 - start, 1 - stop */
2119 __le32 start_time; /* lower 32-bits of TSF */
2120 u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2121 u8 channel;
2aa6ab86 2122 u8 type; /* see enum iwl_measurement_type */
b481de9c
ZY
2123 u8 reserved1;
2124 /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2125 * valid if applicable for measurement type requested. */
2126 __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2127 __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2128 __le32 cca_time; /* channel load time in usecs */
2129 u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2130 * unidentified */
2131 u8 reserved2[3];
2aa6ab86 2132 struct iwl_measurement_histogram histogram;
b481de9c 2133 __le32 stop_time; /* lower 32-bits of TSF */
2aa6ab86 2134 __le32 status; /* see iwl_measurement_status */
ba2d3587 2135} __packed;
b481de9c
ZY
2136
2137/******************************************************************************
2138 * (7)
2139 * Power Management Commands, Responses, Notifications:
2140 *
2141 *****************************************************************************/
2142
2143/**
ca579617 2144 * struct iwl_powertable_cmd - Power Table Command
b481de9c
ZY
2145 * @flags: See below:
2146 *
2147 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2148 *
2149 * PM allow:
2150 * bit 0 - '0' Driver not allow power management
2151 * '1' Driver allow PM (use rest of parameters)
e312c24c 2152 *
b481de9c
ZY
2153 * uCode send sleep notifications:
2154 * bit 1 - '0' Don't send sleep notification
2155 * '1' send sleep notification (SEND_PM_NOTIFICATION)
e312c24c 2156 *
b481de9c
ZY
2157 * Sleep over DTIM
2158 * bit 2 - '0' PM have to walk up every DTIM
2159 * '1' PM could sleep over DTIM till listen Interval.
e312c24c 2160 *
b481de9c 2161 * PCI power managed
e7b63581
TW
2162 * bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2163 * '1' !(PCI_CFG_LINK_CTRL & 0x1)
e312c24c
JB
2164 *
2165 * Fast PD
2166 * bit 4 - '1' Put radio to sleep when receiving frame for others
2167 *
b481de9c
ZY
2168 * Force sleep Modes
2169 * bit 31/30- '00' use both mac/xtal sleeps
2170 * '01' force Mac sleep
2171 * '10' force xtal sleep
2172 * '11' Illegal set
2173 *
2174 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
a96a27f9 2175 * ucode assume sleep over DTIM is allowed and we don't need to wake up
b481de9c
ZY
2176 * for every DTIM.
2177 */
2178#define IWL_POWER_VEC_SIZE 5
2179
600c0e11 2180#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
35162ba7
WYG
2181#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2182#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
600c0e11
TW
2183#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2184#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2185#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
97badb0e
WYG
2186#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2187#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2188#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2189#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
35162ba7 2190#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
600c0e11 2191
ca579617 2192struct iwl_powertable_cmd {
b481de9c 2193 __le16 flags;
600c0e11
TW
2194 u8 keep_alive_seconds; /* 3945 reserved */
2195 u8 debug_flags; /* 3945 reserved */
b481de9c
ZY
2196 __le32 rx_data_timeout;
2197 __le32 tx_data_timeout;
2198 __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2199 __le32 keep_alive_beacons;
ba2d3587 2200} __packed;
b481de9c
ZY
2201
2202/*
2203 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
767d055d 2204 * all devices identical.
b481de9c 2205 */
2aa6ab86 2206struct iwl_sleep_notification {
b481de9c
ZY
2207 u8 pm_sleep_mode;
2208 u8 pm_wakeup_src;
2209 __le16 reserved;
2210 __le32 sleep_time;
2211 __le32 tsf_low;
2212 __le32 bcon_timer;
ba2d3587 2213} __packed;
b481de9c 2214
767d055d 2215/* Sleep states. all devices identical. */
b481de9c
ZY
2216enum {
2217 IWL_PM_NO_SLEEP = 0,
2218 IWL_PM_SLP_MAC = 1,
2219 IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2220 IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2221 IWL_PM_SLP_PHY = 4,
2222 IWL_PM_SLP_REPENT = 5,
2223 IWL_PM_WAKEUP_BY_TIMER = 6,
2224 IWL_PM_WAKEUP_BY_DRIVER = 7,
2225 IWL_PM_WAKEUP_BY_RFKILL = 8,
2226 /* 3 reserved */
2227 IWL_PM_NUM_OF_MODES = 12,
2228};
2229
2230/*
2231 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2232 */
2233#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2234#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2235#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2aa6ab86 2236struct iwl_card_state_cmd {
b481de9c 2237 __le32 status; /* CARD_STATE_CMD_* request new power state */
ba2d3587 2238} __packed;
b481de9c
ZY
2239
2240/*
2241 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2242 */
2aa6ab86 2243struct iwl_card_state_notif {
b481de9c 2244 __le32 flags;
ba2d3587 2245} __packed;
b481de9c
ZY
2246
2247#define HW_CARD_DISABLED 0x01
2248#define SW_CARD_DISABLED 0x02
3a41bbd5 2249#define CT_CARD_DISABLED 0x04
b481de9c
ZY
2250#define RXON_CARD_DISABLED 0x10
2251
47f4a587 2252struct iwl_ct_kill_config {
b481de9c
ZY
2253 __le32 reserved;
2254 __le32 critical_temperature_M;
2255 __le32 critical_temperature_R;
ba2d3587 2256} __packed;
b481de9c 2257
672639de
WYG
2258/* 1000, and 6x00 */
2259struct iwl_ct_kill_throttling_config {
2260 __le32 critical_temperature_exit;
2261 __le32 reserved;
2262 __le32 critical_temperature_enter;
ba2d3587 2263} __packed;
672639de 2264
b481de9c
ZY
2265/******************************************************************************
2266 * (8)
2267 * Scan Commands, Responses, Notifications:
2268 *
2269 *****************************************************************************/
2270
51e9bf5d
HH
2271#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2272#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
d16dc48a 2273
3058f021 2274/**
2a421b91 2275 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
3058f021
BC
2276 *
2277 * One for each channel in the scan list.
2278 * Each channel can independently select:
2279 * 1) SSID for directed active scans
2280 * 2) Txpower setting (for rate specified within Tx command)
2281 * 3) How long to stay on-channel (behavior may be modified by quiet_time,
2282 * quiet_plcp_th, good_CRC_th)
2283 *
2284 * To avoid uCode errors, make sure the following are true (see comments
2a421b91 2285 * under struct iwl_scan_cmd about max_out_time and quiet_time):
3058f021
BC
2286 * 1) If using passive_dwell (i.e. passive_dwell != 0):
2287 * active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2288 * 2) quiet_time <= active_dwell
2289 * 3) If restricting off-channel time (i.e. max_out_time !=0):
2290 * passive_dwell < max_out_time
2291 * active_dwell < max_out_time
2292 */
3d24a9f7 2293
2a421b91 2294struct iwl_scan_channel {
3058f021
BC
2295 /*
2296 * type is defined as:
2297 * 0:0 1 = active, 0 = passive
d16dc48a 2298 * 1:20 SSID direct bit map; if a bit is set, then corresponding
3058f021 2299 * SSID IE is transmitted in probe request.
d16dc48a 2300 * 21:31 reserved
b481de9c 2301 */
d16dc48a
TW
2302 __le32 type;
2303 __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
f53696de
TW
2304 u8 tx_gain; /* gain for analog radio */
2305 u8 dsp_atten; /* gain for DSP */
3058f021
BC
2306 __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2307 __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
ba2d3587 2308} __packed;
b481de9c 2309
0d21044e
WT
2310/* set number of direct probes __le32 type */
2311#define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2312
3058f021 2313/**
2a421b91 2314 * struct iwl_ssid_ie - directed scan network information element
3058f021 2315 *
2a3b793d
BC
2316 * Up to 20 of these may appear in REPLY_SCAN_CMD (Note: Only 4 are in
2317 * 3945 SCAN api), selected by "type" bit field in struct iwl_scan_channel;
2318 * each channel may select different ssids from among the 20 (4) entries.
2319 * SSID IEs get transmitted in reverse order of entry.
3058f021 2320 */
2a421b91 2321struct iwl_ssid_ie {
b481de9c
ZY
2322 u8 id;
2323 u8 len;
2324 u8 ssid[32];
ba2d3587 2325} __packed;
b481de9c 2326
9b3bf06a
JB
2327#define PROBE_OPTION_MAX_3945 4
2328#define PROBE_OPTION_MAX 20
51e9bf5d 2329#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
96ff5641
JB
2330#define IWL_GOOD_CRC_TH_DISABLED 0
2331#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2332#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
b481de9c 2333#define IWL_MAX_SCAN_SIZE 1024
89612124 2334#define IWL_MAX_CMD_SIZE 4096
b481de9c
ZY
2335
2336/*
2337 * REPLY_SCAN_CMD = 0x80 (command)
3058f021
BC
2338 *
2339 * The hardware scan command is very powerful; the driver can set it up to
2340 * maintain (relatively) normal network traffic while doing a scan in the
2341 * background. The max_out_time and suspend_time control the ratio of how
2342 * long the device stays on an associated network channel ("service channel")
2343 * vs. how long it's away from the service channel, i.e. tuned to other channels
2344 * for scanning.
2345 *
2346 * max_out_time is the max time off-channel (in usec), and suspend_time
2347 * is how long (in "extended beacon" format) that the scan is "suspended"
2348 * after returning to the service channel. That is, suspend_time is the
2349 * time that we stay on the service channel, doing normal work, between
2350 * scan segments. The driver may set these parameters differently to support
2351 * scanning when associated vs. not associated, and light vs. heavy traffic
2352 * loads when associated.
2353 *
2354 * After receiving this command, the device's scan engine does the following;
2355 *
2356 * 1) Sends SCAN_START notification to driver
2357 * 2) Checks to see if it has time to do scan for one channel
2358 * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2359 * to tell AP that we're going off-channel
2360 * 4) Tunes to first channel in scan list, does active or passive scan
2361 * 5) Sends SCAN_RESULT notification to driver
2362 * 6) Checks to see if it has time to do scan on *next* channel in list
2363 * 7) Repeats 4-6 until it no longer has time to scan the next channel
2364 * before max_out_time expires
2365 * 8) Returns to service channel
2366 * 9) Sends NULL packet with PS=0 to tell AP that we're back
2367 * 10) Stays on service channel until suspend_time expires
2368 * 11) Repeats entire process 2-10 until list is complete
2369 * 12) Sends SCAN_COMPLETE notification
2370 *
2371 * For fast, efficient scans, the scan command also has support for staying on
2372 * a channel for just a short time, if doing active scanning and getting no
2373 * responses to the transmitted probe request. This time is controlled by
2374 * quiet_time, and the number of received packets below which a channel is
2375 * considered "quiet" is controlled by quiet_plcp_threshold.
2376 *
2377 * For active scanning on channels that have regulatory restrictions against
2378 * blindly transmitting, the scan can listen before transmitting, to make sure
2379 * that there is already legitimate activity on the channel. If enough
2380 * packets are cleanly received on the channel (controlled by good_CRC_th,
2381 * typical value 1), the scan engine starts transmitting probe requests.
2382 *
2383 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2384 *
2385 * To avoid uCode errors, see timing restrictions described under
2a421b91 2386 * struct iwl_scan_channel.
b481de9c 2387 */
3d24a9f7 2388
266af4c7
JB
2389enum iwl_scan_flags {
2390 /* BIT(0) currently unused */
2391 IWL_SCAN_FLAGS_ACTION_FRAME_TX = BIT(1),
2392 /* bits 2-7 reserved */
2393};
2394
2a421b91 2395struct iwl_scan_cmd {
b481de9c 2396 __le16 len;
266af4c7 2397 u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
3058f021
BC
2398 u8 channel_count; /* # channels in channel list */
2399 __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2400 * (only for active scan) */
2401 __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2402 __le16 good_CRC_th; /* passive -> active promotion threshold */
2403 __le16 rx_chain; /* RXON_RX_CHAIN_* */
2404 __le32 max_out_time; /* max usec to be away from associated (service)
2405 * channel */
2406 __le32 suspend_time; /* pause scan this long (in "extended beacon
2407 * format") when returning to service chnl:
2408 * 3945; 31:24 # beacons, 19:0 additional usec,
2409 * 4965; 31:22 # beacons, 21:0 additional usec.
2410 */
2411 __le32 flags; /* RXON_FLG_* */
2412 __le32 filter_flags; /* RXON_FILTER_* */
2413
2414 /* For active scans (set to all-0s for passive scans).
2415 * Does not include payload. Must specify Tx rate; no rate scaling. */
83d527d9 2416 struct iwl_tx_cmd tx_cmd;
3058f021
BC
2417
2418 /* For directed active scans (set to all-0s otherwise) */
2a421b91 2419 struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
b481de9c 2420
b481de9c 2421 /*
3058f021
BC
2422 * Probe request frame, followed by channel list.
2423 *
2424 * Size of probe request frame is specified by byte count in tx_cmd.
2425 * Channel list follows immediately after probe request frame.
2426 * Number of channels in list is specified by channel_count.
2427 * Each channel in list is of type:
b481de9c 2428 *
2aa6ab86 2429 * struct iwl_scan_channel channels[0];
b481de9c
ZY
2430 *
2431 * NOTE: Only one band of channels can be scanned per pass. You
3058f021
BC
2432 * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2433 * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2434 * before requesting another scan.
b481de9c 2435 */
3058f021 2436 u8 data[0];
ba2d3587 2437} __packed;
b481de9c
ZY
2438
2439/* Can abort will notify by complete notification with abort status. */
51e9bf5d 2440#define CAN_ABORT_STATUS cpu_to_le32(0x1)
b481de9c
ZY
2441/* complete notification statuses */
2442#define ABORT_STATUS 0x2
2443
2444/*
2445 * REPLY_SCAN_CMD = 0x80 (response)
2446 */
2a421b91 2447struct iwl_scanreq_notification {
b481de9c 2448 __le32 status; /* 1: okay, 2: cannot fulfill request */
ba2d3587 2449} __packed;
b481de9c
ZY
2450
2451/*
2452 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2453 */
2a421b91 2454struct iwl_scanstart_notification {
b481de9c
ZY
2455 __le32 tsf_low;
2456 __le32 tsf_high;
2457 __le32 beacon_timer;
2458 u8 channel;
2459 u8 band;
2460 u8 reserved[2];
2461 __le32 status;
ba2d3587 2462} __packed;
b481de9c
ZY
2463
2464#define SCAN_OWNER_STATUS 0x1;
2465#define MEASURE_OWNER_STATUS 0x2;
2466
0288d237
JB
2467#define IWL_PROBE_STATUS_OK 0
2468#define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2469/* error statuses combined with TX_FAILED */
2470#define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2471#define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2472
b481de9c
ZY
2473#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2474/*
2475 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2476 */
2a421b91 2477struct iwl_scanresults_notification {
b481de9c
ZY
2478 u8 channel;
2479 u8 band;
0288d237
JB
2480 u8 probe_status;
2481 u8 num_probe_not_sent; /* not enough time to send */
b481de9c
ZY
2482 __le32 tsf_low;
2483 __le32 tsf_high;
2484 __le32 statistics[NUMBER_OF_STATISTICS];
ba2d3587 2485} __packed;
b481de9c
ZY
2486
2487/*
2488 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2489 */
2a421b91 2490struct iwl_scancomplete_notification {
b481de9c
ZY
2491 u8 scanned_channels;
2492 u8 status;
f78e5454 2493 u8 bt_status; /* BT On/Off status */
b481de9c
ZY
2494 u8 last_channel;
2495 __le32 tsf_low;
2496 __le32 tsf_high;
ba2d3587 2497} __packed;
b481de9c
ZY
2498
2499
2500/******************************************************************************
2501 * (9)
2502 * IBSS/AP Commands and Notifications:
2503 *
2504 *****************************************************************************/
2505
a85d7cca
JB
2506enum iwl_ibss_manager {
2507 IWL_NOT_IBSS_MANAGER = 0,
2508 IWL_IBSS_MANAGER = 1,
2509};
2510
b481de9c
ZY
2511/*
2512 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2513 */
3d24a9f7 2514
241887a2
JB
2515struct iwlagn_beacon_notif {
2516 struct iwlagn_tx_resp beacon_notify_hdr;
2517 __le32 low_tsf;
2518 __le32 high_tsf;
2519 __le32 ibss_mgr_status;
2520} __packed;
2521
b481de9c
ZY
2522/*
2523 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2524 */
3d24a9f7 2525
4bf64efd 2526struct iwl_tx_beacon_cmd {
83d527d9 2527 struct iwl_tx_cmd tx;
b481de9c
ZY
2528 __le16 tim_idx;
2529 u8 tim_size;
2530 u8 reserved1;
2531 struct ieee80211_hdr frame[0]; /* beacon frame */
ba2d3587 2532} __packed;
b481de9c
ZY
2533
2534/******************************************************************************
2535 * (10)
2536 * Statistics Commands and Notifications:
2537 *
2538 *****************************************************************************/
2539
2540#define IWL_TEMP_CONVERT 260
2541
2542#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2543#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2544#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2545
2546/* Used for passing to driver number of successes and failures per rate */
2547struct rate_histogram {
2548 union {
2549 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2550 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2551 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2552 } success;
2553 union {
2554 __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2555 __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2556 __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2557 } failed;
ba2d3587 2558} __packed;
b481de9c
ZY
2559
2560/* statistics command response */
2561
3d24a9f7
TW
2562struct statistics_dbg {
2563 __le32 burst_check;
2564 __le32 burst_count;
7c094c5c
WYG
2565 __le32 wait_for_silence_timeout_cnt;
2566 __le32 reserved[3];
ba2d3587 2567} __packed;
3d24a9f7 2568
b481de9c
ZY
2569struct statistics_rx_phy {
2570 __le32 ina_cnt;
2571 __le32 fina_cnt;
2572 __le32 plcp_err;
2573 __le32 crc32_err;
2574 __le32 overrun_err;
2575 __le32 early_overrun_err;
2576 __le32 crc32_good;
2577 __le32 false_alarm_cnt;
2578 __le32 fina_sync_err_cnt;
2579 __le32 sfd_timeout;
2580 __le32 fina_timeout;
2581 __le32 unresponded_rts;
2582 __le32 rxe_frame_limit_overrun;
2583 __le32 sent_ack_cnt;
2584 __le32 sent_cts_cnt;
b481de9c
ZY
2585 __le32 sent_ba_rsp_cnt;
2586 __le32 dsp_self_kill;
2587 __le32 mh_format_err;
2588 __le32 re_acq_main_rssi_sum;
2589 __le32 reserved3;
ba2d3587 2590} __packed;
b481de9c 2591
b481de9c
ZY
2592struct statistics_rx_ht_phy {
2593 __le32 plcp_err;
2594 __le32 overrun_err;
2595 __le32 early_overrun_err;
2596 __le32 crc32_good;
2597 __le32 crc32_err;
2598 __le32 mh_format_err;
2599 __le32 agg_crc32_good;
2600 __le32 agg_mpdu_cnt;
2601 __le32 agg_cnt;
f0118a45 2602 __le32 unsupport_mcs;
ba2d3587 2603} __packed;
b481de9c 2604
c1b4aa3f 2605#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
34c22cf9 2606
b481de9c
ZY
2607struct statistics_rx_non_phy {
2608 __le32 bogus_cts; /* CTS received when not expecting CTS */
2609 __le32 bogus_ack; /* ACK received when not expecting ACK */
2610 __le32 non_bssid_frames; /* number of frames with BSSID that
2611 * doesn't belong to the STA BSSID */
2612 __le32 filtered_frames; /* count frames that were dumped in the
2613 * filtering process */
2614 __le32 non_channel_beacons; /* beacons with our bss id but not on
2615 * our serving channel */
b481de9c
ZY
2616 __le32 channel_beacons; /* beacons with our bss id and in our
2617 * serving channel */
2618 __le32 num_missed_bcon; /* number of missed beacons */
2619 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2620 * ADC was in saturation */
2621 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2622 * for INA */
2623 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2624 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2625 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2626 __le32 interference_data_flag; /* flag for interference data
2627 * availability. 1 when data is
2628 * available. */
3058f021 2629 __le32 channel_load; /* counts RX Enable time in uSec */
b481de9c
ZY
2630 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2631 * and CCK) counter */
2632 __le32 beacon_rssi_a;
2633 __le32 beacon_rssi_b;
2634 __le32 beacon_rssi_c;
2635 __le32 beacon_energy_a;
2636 __le32 beacon_energy_b;
2637 __le32 beacon_energy_c;
ba2d3587 2638} __packed;
b481de9c 2639
325322ee
WYG
2640struct statistics_rx_non_phy_bt {
2641 struct statistics_rx_non_phy common;
2642 /* additional stats for bt */
2643 __le32 num_bt_kills;
2644 __le32 reserved[2];
da22f795 2645} __packed;
325322ee 2646
b481de9c
ZY
2647struct statistics_rx {
2648 struct statistics_rx_phy ofdm;
2649 struct statistics_rx_phy cck;
2650 struct statistics_rx_non_phy general;
b481de9c 2651 struct statistics_rx_ht_phy ofdm_ht;
ba2d3587 2652} __packed;
b481de9c 2653
325322ee
WYG
2654struct statistics_rx_bt {
2655 struct statistics_rx_phy ofdm;
2656 struct statistics_rx_phy cck;
2657 struct statistics_rx_non_phy_bt general;
2658 struct statistics_rx_ht_phy ofdm_ht;
da22f795 2659} __packed;
325322ee 2660
fcbaf8b0
WYG
2661/**
2662 * struct statistics_tx_power - current tx power
2663 *
2664 * @ant_a: current tx power on chain a in 1/2 dB step
2665 * @ant_b: current tx power on chain b in 1/2 dB step
2666 * @ant_c: current tx power on chain c in 1/2 dB step
2667 */
2668struct statistics_tx_power {
2669 u8 ant_a;
2670 u8 ant_b;
2671 u8 ant_c;
2672 u8 reserved;
ba2d3587 2673} __packed;
fcbaf8b0 2674
b481de9c
ZY
2675struct statistics_tx_non_phy_agg {
2676 __le32 ba_timeout;
2677 __le32 ba_reschedule_frames;
2678 __le32 scd_query_agg_frame_cnt;
2679 __le32 scd_query_no_agg;
2680 __le32 scd_query_agg;
2681 __le32 scd_query_mismatch;
2682 __le32 frame_not_ready;
2683 __le32 underrun;
2684 __le32 bt_prio_kill;
2685 __le32 rx_ba_rsp_cnt;
ba2d3587 2686} __packed;
b481de9c
ZY
2687
2688struct statistics_tx {
2689 __le32 preamble_cnt;
2690 __le32 rx_detected_cnt;
2691 __le32 bt_prio_defer_cnt;
2692 __le32 bt_prio_kill_cnt;
2693 __le32 few_bytes_cnt;
2694 __le32 cts_timeout;
2695 __le32 ack_timeout;
2696 __le32 expected_ack_cnt;
2697 __le32 actual_ack_cnt;
b481de9c
ZY
2698 __le32 dump_msdu_cnt;
2699 __le32 burst_abort_next_frame_mismatch_cnt;
2700 __le32 burst_abort_missing_next_frame_cnt;
2701 __le32 cts_timeout_collision;
2702 __le32 ack_or_ba_timeout_collision;
2703 struct statistics_tx_non_phy_agg agg;
470356b8
WYG
2704 /*
2705 * "tx_power" are optional parameters provided by uCode,
2706 * 6000 series is the only device provide the information,
2707 * Those are reserved fields for all the other devices
2708 */
fcbaf8b0
WYG
2709 struct statistics_tx_power tx_power;
2710 __le32 reserved1;
ba2d3587 2711} __packed;
b481de9c 2712
b481de9c
ZY
2713
2714struct statistics_div {
2715 __le32 tx_on_a;
2716 __le32 tx_on_b;
2717 __le32 exec_time;
2718 __le32 probe_time;
b481de9c
ZY
2719 __le32 reserved1;
2720 __le32 reserved2;
ba2d3587 2721} __packed;
b481de9c 2722
325322ee 2723struct statistics_general_common {
f0118a45
WYG
2724 __le32 temperature; /* radio temperature */
2725 __le32 temperature_m; /* for 5000 and up, this is radio voltage */
b481de9c
ZY
2726 struct statistics_dbg dbg;
2727 __le32 sleep_time;
2728 __le32 slots_out;
2729 __le32 slots_idle;
2730 __le32 ttl_timestamp;
2731 struct statistics_div div;
b481de9c 2732 __le32 rx_enable_counter;
11fc5249
WYG
2733 /*
2734 * num_of_sos_states:
2735 * count the number of times we have to re-tune
2736 * in order to get out of bad PHY status
2737 */
2738 __le32 num_of_sos_states;
da22f795 2739} __packed;
325322ee
WYG
2740
2741struct statistics_bt_activity {
2742 /* Tx statistics */
2743 __le32 hi_priority_tx_req_cnt;
2744 __le32 hi_priority_tx_denied_cnt;
2745 __le32 lo_priority_tx_req_cnt;
2746 __le32 lo_priority_tx_denied_cnt;
2747 /* Rx statistics */
2748 __le32 hi_priority_rx_req_cnt;
2749 __le32 hi_priority_rx_denied_cnt;
2750 __le32 lo_priority_rx_req_cnt;
2751 __le32 lo_priority_rx_denied_cnt;
da22f795 2752} __packed;
325322ee
WYG
2753
2754struct statistics_general {
2755 struct statistics_general_common common;
2756 __le32 reserved2;
2757 __le32 reserved3;
da22f795 2758} __packed;
325322ee
WYG
2759
2760struct statistics_general_bt {
2761 struct statistics_general_common common;
2762 struct statistics_bt_activity activity;
b481de9c
ZY
2763 __le32 reserved2;
2764 __le32 reserved3;
ba2d3587 2765} __packed;
b481de9c 2766
ef8d5529
WYG
2767#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2768#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2769#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2770
b481de9c
ZY
2771/*
2772 * REPLY_STATISTICS_CMD = 0x9c,
767d055d 2773 * all devices identical.
b481de9c
ZY
2774 *
2775 * This command triggers an immediate response containing uCode statistics.
2776 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2777 *
2778 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2779 * internal copy of the statistics (counters) after issuing the response.
2780 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2781 *
2782 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2783 * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2784 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2785 */
51e9bf5d
HH
2786#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2787#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
8f91aecb 2788struct iwl_statistics_cmd {
b481de9c 2789 __le32 configuration_flags; /* IWL_STATS_CONF_* */
ba2d3587 2790} __packed;
b481de9c
ZY
2791
2792/*
2793 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2794 *
2795 * By default, uCode issues this notification after receiving a beacon
2796 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2797 * REPLY_STATISTICS_CMD 0x9c, above.
2798 *
2799 * Statistics counters continue to increment beacon after beacon, but are
2800 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2801 * 0x9c with CLEAR_STATS bit set (see above).
2802 *
2803 * uCode also issues this notification during scans. uCode clears statistics
2804 * appropriately so that each notification contains statistics for only the
2805 * one channel that has just been scanned.
2806 */
51e9bf5d 2807#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
7aafef1c 2808#define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
3d24a9f7 2809
8f91aecb 2810struct iwl_notif_statistics {
b481de9c
ZY
2811 __le32 flag;
2812 struct statistics_rx rx;
2813 struct statistics_tx tx;
2814 struct statistics_general general;
ba2d3587 2815} __packed;
b481de9c 2816
325322ee
WYG
2817struct iwl_bt_notif_statistics {
2818 __le32 flag;
2819 struct statistics_rx_bt rx;
2820 struct statistics_tx tx;
2821 struct statistics_general_bt general;
da22f795 2822} __packed;
b481de9c
ZY
2823
2824/*
2825 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
a13d276f
WYG
2826 *
2827 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2828 * in regardless of how many missed beacons, which mean when driver receive the
2829 * notification, inside the command, it can find all the beacons information
2830 * which include number of total missed beacons, number of consecutive missed
2831 * beacons, number of beacons received and number of beacons expected to
2832 * receive.
2833 *
2834 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2835 * in order to bring the radio/PHY back to working state; which has no relation
2836 * to when driver will perform sensitivity calibration.
2837 *
2838 * Driver should set it own missed_beacon_threshold to decide when to perform
2839 * sensitivity calibration based on number of consecutive missed beacons in
2840 * order to improve overall performance, especially in noisy environment.
2841 *
b481de9c 2842 */
a13d276f
WYG
2843
2844#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2845#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2846#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
b481de9c 2847
2aa6ab86 2848struct iwl_missed_beacon_notif {
a13d276f 2849 __le32 consecutive_missed_beacons;
b481de9c
ZY
2850 __le32 total_missed_becons;
2851 __le32 num_expected_beacons;
2852 __le32 num_recvd_beacons;
ba2d3587 2853} __packed;
b481de9c 2854
f7d09d7c 2855
b481de9c
ZY
2856/******************************************************************************
2857 * (11)
2858 * Rx Calibration Commands:
2859 *
f7d09d7c
BC
2860 * With the uCode used for open source drivers, most Tx calibration (except
2861 * for Tx Power) and most Rx calibration is done by uCode during the
2862 * "initialize" phase of uCode boot. Driver must calibrate only:
2863 *
2864 * 1) Tx power (depends on temperature), described elsewhere
2865 * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2866 * 3) Receiver sensitivity (to optimize signal detection)
2867 *
b481de9c
ZY
2868 *****************************************************************************/
2869
f7d09d7c
BC
2870/**
2871 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2872 *
2873 * This command sets up the Rx signal detector for a sensitivity level that
2874 * is high enough to lock onto all signals within the associated network,
2875 * but low enough to ignore signals that are below a certain threshold, so as
2876 * not to have too many "false alarms". False alarms are signals that the
2877 * Rx DSP tries to lock onto, but then discards after determining that they
2878 * are noise.
2879 *
2880 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2881 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2882 * time listening, not transmitting). Driver must adjust sensitivity so that
2883 * the ratio of actual false alarms to actual Rx time falls within this range.
2884 *
2885 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2886 * received beacon. These provide information to the driver to analyze the
2887 * sensitivity. Don't analyze statistics that come in from scanning, or any
2888 * other non-associated-network source. Pertinent statistics include:
2889 *
2890 * From "general" statistics (struct statistics_rx_non_phy):
2891 *
2892 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2893 * Measure of energy of desired signal. Used for establishing a level
2894 * below which the device does not detect signals.
2895 *
2896 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2897 * Measure of background noise in silent period after beacon.
2898 *
2899 * channel_load
2900 * uSecs of actual Rx time during beacon period (varies according to
2901 * how much time was spent transmitting).
2902 *
2903 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2904 *
2905 * false_alarm_cnt
2906 * Signal locks abandoned early (before phy-level header).
2907 *
2908 * plcp_err
2909 * Signal locks abandoned late (during phy-level header).
2910 *
2911 * NOTE: Both false_alarm_cnt and plcp_err increment monotonically from
2912 * beacon to beacon, i.e. each value is an accumulation of all errors
2913 * before and including the latest beacon. Values will wrap around to 0
2914 * after counting up to 2^32 - 1. Driver must differentiate vs.
2915 * previous beacon's values to determine # false alarms in the current
2916 * beacon period.
2917 *
2918 * Total number of false alarms = false_alarms + plcp_errs
2919 *
2920 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2921 * (notice that the start points for OFDM are at or close to settings for
2922 * maximum sensitivity):
2923 *
2924 * START / MIN / MAX
2925 * HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX 90 / 85 / 120
2926 * HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX 170 / 170 / 210
2927 * HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX 105 / 105 / 140
2928 * HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX 220 / 220 / 270
2929 *
2930 * If actual rate of OFDM false alarms (+ plcp_errors) is too high
2931 * (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2932 * by *adding* 1 to all 4 of the table entries above, up to the max for
2933 * each entry. Conversely, if false alarm rate is too low (less than 5
2934 * for each 204.8 msecs listening), *subtract* 1 from each entry to
2935 * increase sensitivity.
2936 *
2937 * For CCK sensitivity, keep track of the following:
2938 *
2939 * 1). 20-beacon history of maximum background noise, indicated by
2940 * (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2941 * 3 receivers. For any given beacon, the "silence reference" is
2942 * the maximum of last 60 samples (20 beacons * 3 receivers).
2943 *
2944 * 2). 10-beacon history of strongest signal level, as indicated
2945 * by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2946 * i.e. the strength of the signal through the best receiver at the
2947 * moment. These measurements are "upside down", with lower values
2948 * for stronger signals, so max energy will be *minimum* value.
2949 *
2950 * Then for any given beacon, the driver must determine the *weakest*
2951 * of the strongest signals; this is the minimum level that needs to be
2952 * successfully detected, when using the best receiver at the moment.
2953 * "Max cck energy" is the maximum (higher value means lower energy!)
2954 * of the last 10 minima. Once this is determined, driver must add
2955 * a little margin by adding "6" to it.
2956 *
2957 * 3). Number of consecutive beacon periods with too few false alarms.
2958 * Reset this to 0 at the first beacon period that falls within the
2959 * "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2960 *
2961 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2962 * (notice that the start points for CCK are at maximum sensitivity):
2963 *
2964 * START / MIN / MAX
2965 * HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX 125 / 125 / 200
2966 * HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX 200 / 200 / 400
2967 * HD_MIN_ENERGY_CCK_DET_INDEX 100 / 0 / 100
2968 *
2969 * If actual rate of CCK false alarms (+ plcp_errors) is too high
2970 * (greater than 50 for each 204.8 msecs listening), method for reducing
2971 * sensitivity is:
2972 *
2973 * 1) *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2974 * up to max 400.
2975 *
2976 * 2) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2977 * sensitivity has been reduced a significant amount; bring it up to
2978 * a moderate 161. Otherwise, *add* 3, up to max 200.
2979 *
2980 * 3) a) If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2981 * sensitivity has been reduced only a moderate or small amount;
2982 * *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2983 * down to min 0. Otherwise (if gain has been significantly reduced),
2984 * don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2985 *
2986 * b) Save a snapshot of the "silence reference".
2987 *
2988 * If actual rate of CCK false alarms (+ plcp_errors) is too low
2989 * (less than 5 for each 204.8 msecs listening), method for increasing
2990 * sensitivity is used only if:
2991 *
2992 * 1a) Previous beacon did not have too many false alarms
2993 * 1b) AND difference between previous "silence reference" and current
2994 * "silence reference" (prev - current) is 2 or more,
2995 * OR 2) 100 or more consecutive beacon periods have had rate of
2996 * less than 5 false alarms per 204.8 milliseconds rx time.
2997 *
2998 * Method for increasing sensitivity:
2999 *
3000 * 1) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
3001 * down to min 125.
3002 *
3003 * 2) *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
3004 * down to min 200.
3005 *
3006 * 3) *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
3007 *
3008 * If actual rate of CCK false alarms (+ plcp_errors) is within good range
3009 * (between 5 and 50 for each 204.8 msecs listening):
3010 *
3011 * 1) Save a snapshot of the silence reference.
3012 *
3013 * 2) If previous beacon had too many CCK false alarms (+ plcp_errors),
3014 * give some extra margin to energy threshold by *subtracting* 8
3015 * from value in HD_MIN_ENERGY_CCK_DET_INDEX.
3016 *
3017 * For all cases (too few, too many, good range), make sure that the CCK
3018 * detection threshold (energy) is below the energy level for robust
3019 * detection over the past 10 beacon periods, the "Max cck energy".
3020 * Lower values mean higher energy; this means making sure that the value
3021 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3022 *
f7d09d7c
BC
3023 */
3024
3025/*
f0832f13 3026 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
f7d09d7c
BC
3027 */
3028#define HD_TABLE_SIZE (11) /* number of entries */
3029#define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3030#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3031#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3032#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3033#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3034#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3035#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3036#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3037#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3038#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3039#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3040
c8312fac
WYG
3041/*
3042 * Additional table entries in enhance SENSITIVITY_CMD
3043 */
3044#define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3045#define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3046#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3047#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3048#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3049#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3050#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3051#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3052#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3053#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3054#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3055#define HD_RESERVED (22)
3056
3057/* number of entries for enhanced tbl */
3058#define ENHANCE_HD_TABLE_SIZE (23)
3059
3060/* number of additional entries for enhanced tbl */
3061#define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3062
3063#define HD_INA_NON_SQUARE_DET_OFDM_DATA cpu_to_le16(0)
3064#define HD_INA_NON_SQUARE_DET_CCK_DATA cpu_to_le16(0)
3065#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA cpu_to_le16(0)
3066#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(668)
3067#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3068#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(486)
3069#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(37)
3070#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA cpu_to_le16(853)
3071#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA cpu_to_le16(4)
3072#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA cpu_to_le16(476)
3073#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA cpu_to_le16(99)
3074
3075
f0832f13 3076/* Control field in struct iwl_sensitivity_cmd */
51e9bf5d
HH
3077#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3078#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
b481de9c 3079
f7d09d7c 3080/**
f0832f13 3081 * struct iwl_sensitivity_cmd
f7d09d7c
BC
3082 * @control: (1) updates working table, (0) updates default table
3083 * @table: energy threshold values, use HD_* as index into table
3084 *
3085 * Always use "1" in "control" to update uCode's working table and DSP.
3086 */
f0832f13 3087struct iwl_sensitivity_cmd {
f7d09d7c
BC
3088 __le16 control; /* always use "1" */
3089 __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
ba2d3587 3090} __packed;
b481de9c 3091
c8312fac
WYG
3092/*
3093 *
3094 */
3095struct iwl_enhance_sensitivity_cmd {
3096 __le16 control; /* always use "1" */
3097 __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
0e954099 3098} __packed;
c8312fac 3099
f7d09d7c
BC
3100
3101/**
3102 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3103 *
767d055d 3104 * This command sets the relative gains of agn device's 3 radio receiver chains.
f7d09d7c
BC
3105 *
3106 * After the first association, driver should accumulate signal and noise
3107 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3108 * beacons from the associated network (don't collect statistics that come
3109 * in from scanning, or any other non-network source).
3110 *
3111 * DISCONNECTED ANTENNA:
3112 *
3113 * Driver should determine which antennas are actually connected, by comparing
3114 * average beacon signal levels for the 3 Rx chains. Accumulate (add) the
3115 * following values over 20 beacons, one accumulator for each of the chains
3116 * a/b/c, from struct statistics_rx_non_phy:
3117 *
3118 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3119 *
3120 * Find the strongest signal from among a/b/c. Compare the other two to the
3121 * strongest. If any signal is more than 15 dB (times 20, unless you
3122 * divide the accumulated values by 20) below the strongest, the driver
3123 * considers that antenna to be disconnected, and should not try to use that
3124 * antenna/chain for Rx or Tx. If both A and B seem to be disconnected,
3125 * driver should declare the stronger one as connected, and attempt to use it
3126 * (A and B are the only 2 Tx chains!).
3127 *
3128 *
3129 * RX BALANCE:
3130 *
3131 * Driver should balance the 3 receivers (but just the ones that are connected
3132 * to antennas, see above) for gain, by comparing the average signal levels
3133 * detected during the silence after each beacon (background noise).
3134 * Accumulate (add) the following values over 20 beacons, one accumulator for
3135 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3136 *
3137 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3138 *
3139 * Find the weakest background noise level from among a/b/c. This Rx chain
3140 * will be the reference, with 0 gain adjustment. Attenuate other channels by
3141 * finding noise difference:
3142 *
3143 * (accum_noise[i] - accum_noise[reference]) / 30
3144 *
3145 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3146 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3147 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3148 * and set bit 2 to indicate "reduce gain". The value for the reference
3149 * (weakest) chain should be "0".
3150 *
3151 * diff_gain_[abc] bit fields:
3152 * 2: (1) reduce gain, (0) increase gain
3153 * 1-0: amount of gain, units of 1.5 dB
3154 */
3155
f69f42a6 3156/* Phy calibration command for series */
642454cc
SZ
3157/* The default calibrate table size if not specified by firmware */
3158#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
33fd5033 3159enum {
f69f42a6
TW
3160 IWL_PHY_CALIBRATE_DC_CMD = 8,
3161 IWL_PHY_CALIBRATE_LO_CMD = 9,
f69f42a6 3162 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
f69f42a6
TW
3163 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3164 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3165 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
bf53f939
SZ
3166 IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD = 18,
3167 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19,
33fd5033
EG
3168};
3169
6a822d06 3170#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE (253)
f69f42a6 3171
6d6a1afd
SZ
3172/* This enum defines the bitmap of various calibrations to enable in both
3173 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3174 */
3175enum iwl_ucode_calib_cfg {
45d50024
WYG
3176 IWL_CALIB_CFG_RX_BB_IDX = BIT(0),
3177 IWL_CALIB_CFG_DC_IDX = BIT(1),
3178 IWL_CALIB_CFG_LO_IDX = BIT(2),
3179 IWL_CALIB_CFG_TX_IQ_IDX = BIT(3),
3180 IWL_CALIB_CFG_RX_IQ_IDX = BIT(4),
3181 IWL_CALIB_CFG_NOISE_IDX = BIT(5),
3182 IWL_CALIB_CFG_CRYSTAL_IDX = BIT(6),
3183 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(7),
3184 IWL_CALIB_CFG_PAPD_IDX = BIT(8),
3185 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(9),
3186 IWL_CALIB_CFG_TX_PWR_IDX = BIT(10),
6d6a1afd
SZ
3187};
3188
ad3f7124
WYG
3189#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3190 IWL_CALIB_CFG_DC_IDX | \
3191 IWL_CALIB_CFG_LO_IDX | \
3192 IWL_CALIB_CFG_TX_IQ_IDX | \
3193 IWL_CALIB_CFG_RX_IQ_IDX | \
3194 IWL_CALIB_CFG_NOISE_IDX | \
3195 IWL_CALIB_CFG_CRYSTAL_IDX | \
3196 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3197 IWL_CALIB_CFG_PAPD_IDX | \
3198 IWL_CALIB_CFG_SENSITIVITY_IDX | \
3199 IWL_CALIB_CFG_TX_PWR_IDX)
3200
3201#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
6d6a1afd 3202
7c616cba
TW
3203struct iwl_calib_cfg_elmnt_s {
3204 __le32 is_enable;
3205 __le32 start;
3206 __le32 send_res;
3207 __le32 apply_res;
3208 __le32 reserved;
ba2d3587 3209} __packed;
7c616cba
TW
3210
3211struct iwl_calib_cfg_status_s {
3212 struct iwl_calib_cfg_elmnt_s once;
3213 struct iwl_calib_cfg_elmnt_s perd;
3214 __le32 flags;
ba2d3587 3215} __packed;
7c616cba 3216
f69f42a6 3217struct iwl_calib_cfg_cmd {
7c616cba
TW
3218 struct iwl_calib_cfg_status_s ucd_calib_cfg;
3219 struct iwl_calib_cfg_status_s drv_calib_cfg;
3220 __le32 reserved1;
ba2d3587 3221} __packed;
7c616cba 3222
f69f42a6 3223struct iwl_calib_hdr {
7c616cba
TW
3224 u8 op_code;
3225 u8 first_group;
3226 u8 groups_num;
3227 u8 data_valid;
ba2d3587 3228} __packed;
7c616cba 3229
f69f42a6
TW
3230struct iwl_calib_cmd {
3231 struct iwl_calib_hdr hdr;
be5d56ed 3232 u8 data[0];
ba2d3587 3233} __packed;
be5d56ed 3234
0d950d84
TW
3235struct iwl_calib_xtal_freq_cmd {
3236 struct iwl_calib_hdr hdr;
3237 u8 cap_pin1;
3238 u8 cap_pin2;
3239 u8 pad[2];
ba2d3587 3240} __packed;
33fd5033 3241
2e277996 3242#define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
bf53f939
SZ
3243struct iwl_calib_temperature_offset_cmd {
3244 struct iwl_calib_hdr hdr;
2e277996
WYG
3245 __le16 radio_sensor_offset;
3246 __le16 reserved;
bf53f939
SZ
3247} __packed;
3248
0d950d84
TW
3249/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3250struct iwl_calib_chain_noise_reset_cmd {
3251 struct iwl_calib_hdr hdr;
3252 u8 data[0];
3253};
3254
3255/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
f69f42a6 3256struct iwl_calib_chain_noise_gain_cmd {
0d950d84 3257 struct iwl_calib_hdr hdr;
33fd5033
EG
3258 u8 delta_gain_1;
3259 u8 delta_gain_2;
0d950d84 3260 u8 pad[2];
ba2d3587 3261} __packed;
33fd5033 3262
b481de9c
ZY
3263/******************************************************************************
3264 * (12)
3265 * Miscellaneous Commands:
3266 *
3267 *****************************************************************************/
3268
3269/*
3270 * LEDs Command & Response
3271 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3272 *
3273 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3274 * this command turns it on or off, or sets up a periodic blinking cycle.
3275 */
ec1a7460 3276struct iwl_led_cmd {
b481de9c
ZY
3277 __le32 interval; /* "interval" in uSec */
3278 u8 id; /* 1: Activity, 2: Link, 3: Tech */
3279 u8 off; /* # intervals off while blinking;
3280 * "0", with >0 "on" value, turns LED on */
3281 u8 on; /* # intervals on while blinking;
3282 * "0", regardless of "off", turns LED off */
3283 u8 reserved;
ba2d3587 3284} __packed;
b481de9c 3285
9636e583 3286/*
fe1bcbfd
WYG
3287 * station priority table entries
3288 * also used as potential "events" value for both
3289 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
9636e583 3290 */
1933ac4d
WYG
3291
3292/*
3293 * COEX events entry flag masks
3294 * RP - Requested Priority
3295 * WP - Win Medium Priority: priority assigned when the contention has been won
3296 */
3297#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3298#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3299#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3300
3301#define COEX_CU_UNASSOC_IDLE_RP 4
3302#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3303#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3304#define COEX_CU_CALIBRATION_RP 4
3305#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3306#define COEX_CU_CONNECTION_ESTAB_RP 4
3307#define COEX_CU_ASSOCIATED_IDLE_RP 4
3308#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3309#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3310#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3311#define COEX_CU_RF_ON_RP 6
3312#define COEX_CU_RF_OFF_RP 4
3313#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3314#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3315#define COEX_CU_RSRVD1_RP 4
3316#define COEX_CU_RSRVD2_RP 4
3317
3318#define COEX_CU_UNASSOC_IDLE_WP 3
3319#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3320#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3321#define COEX_CU_CALIBRATION_WP 3
3322#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3323#define COEX_CU_CONNECTION_ESTAB_WP 3
3324#define COEX_CU_ASSOCIATED_IDLE_WP 3
3325#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3326#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3327#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3328#define COEX_CU_RF_ON_WP 3
3329#define COEX_CU_RF_OFF_WP 3
3330#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3331#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3332#define COEX_CU_RSRVD1_WP 3
3333#define COEX_CU_RSRVD2_WP 3
3334
3335#define COEX_UNASSOC_IDLE_FLAGS 0
3336#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3337 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3338 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3339#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3340 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3341 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3342#define COEX_CALIBRATION_FLAGS \
3343 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3344 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3345#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3346/*
3347 * COEX_CONNECTION_ESTAB:
3348 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3349 */
3350#define COEX_CONNECTION_ESTAB_FLAGS \
3351 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3352 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3353 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3354#define COEX_ASSOCIATED_IDLE_FLAGS 0
3355#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3356 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3357 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3358#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3359 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3360 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3361#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3362#define COEX_RF_ON_FLAGS 0
3363#define COEX_RF_OFF_FLAGS 0
3364#define COEX_STAND_ALONE_DEBUG_FLAGS \
3365 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3366 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3367#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3368 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3369 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3370 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3371#define COEX_RSRVD1_FLAGS 0
3372#define COEX_RSRVD2_FLAGS 0
3373/*
3374 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3375 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3376 */
3377#define COEX_CU_RF_ON_FLAGS \
3378 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3379 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3380 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3381
3382
9636e583 3383enum {
fe1bcbfd 3384 /* un-association part */
9636e583
RR
3385 COEX_UNASSOC_IDLE = 0,
3386 COEX_UNASSOC_MANUAL_SCAN = 1,
3387 COEX_UNASSOC_AUTO_SCAN = 2,
fe1bcbfd 3388 /* calibration */
9636e583
RR
3389 COEX_CALIBRATION = 3,
3390 COEX_PERIODIC_CALIBRATION = 4,
fe1bcbfd 3391 /* connection */
9636e583 3392 COEX_CONNECTION_ESTAB = 5,
fe1bcbfd 3393 /* association part */
9636e583
RR
3394 COEX_ASSOCIATED_IDLE = 6,
3395 COEX_ASSOC_MANUAL_SCAN = 7,
3396 COEX_ASSOC_AUTO_SCAN = 8,
3397 COEX_ASSOC_ACTIVE_LEVEL = 9,
fe1bcbfd 3398 /* RF ON/OFF */
9636e583
RR
3399 COEX_RF_ON = 10,
3400 COEX_RF_OFF = 11,
3401 COEX_STAND_ALONE_DEBUG = 12,
fe1bcbfd 3402 /* IPAN */
9636e583 3403 COEX_IPAN_ASSOC_LEVEL = 13,
fe1bcbfd 3404 /* reserved */
9636e583
RR
3405 COEX_RSRVD1 = 14,
3406 COEX_RSRVD2 = 15,
3407 COEX_NUM_OF_EVENTS = 16
3408};
3409
fe1bcbfd
WYG
3410/*
3411 * Coexistence WIFI/WIMAX Command
3412 * COEX_PRIORITY_TABLE_CMD = 0x5a
3413 *
3414 */
9636e583
RR
3415struct iwl_wimax_coex_event_entry {
3416 u8 request_prio;
3417 u8 win_medium_prio;
3418 u8 reserved;
3419 u8 flags;
ba2d3587 3420} __packed;
9636e583
RR
3421
3422/* COEX flag masks */
3423
a96a27f9 3424/* Station table is valid */
9636e583 3425#define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
a96a27f9 3426/* UnMask wake up src at unassociated sleep */
9636e583 3427#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
a96a27f9 3428/* UnMask wake up src at associated sleep */
9636e583
RR
3429#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3430/* Enable CoEx feature. */
3431#define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3432
3433struct iwl_wimax_coex_cmd {
3434 u8 flags;
3435 u8 reserved[3];
3436 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
ba2d3587 3437} __packed;
9636e583 3438
fe1bcbfd
WYG
3439/*
3440 * Coexistence MEDIUM NOTIFICATION
3441 * COEX_MEDIUM_NOTIFICATION = 0x5b
3442 *
3443 * notification from uCode to host to indicate medium changes
3444 *
3445 */
3446/*
3447 * status field
3448 * bit 0 - 2: medium status
3449 * bit 3: medium change indication
3450 * bit 4 - 31: reserved
3451 */
3452/* status option values, (0 - 2 bits) */
3453#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3454#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3455#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3456#define COEX_MEDIUM_MSK (0x7)
3457
3458/* send notification status (1 bit) */
3459#define COEX_MEDIUM_CHANGED (0x8)
3460#define COEX_MEDIUM_CHANGED_MSK (0x8)
3461#define COEX_MEDIUM_SHIFT (3)
3462
3463struct iwl_coex_medium_notification {
3464 __le32 status;
3465 __le32 events;
ba2d3587 3466} __packed;
fe1bcbfd
WYG
3467
3468/*
3469 * Coexistence EVENT Command
3470 * COEX_EVENT_CMD = 0x5c
3471 *
3472 * send from host to uCode for coex event request.
3473 */
3474/* flags options */
3475#define COEX_EVENT_REQUEST_MSK (0x1)
3476
3477struct iwl_coex_event_cmd {
3478 u8 flags;
3479 u8 event;
3480 __le16 reserved;
ba2d3587 3481} __packed;
fe1bcbfd
WYG
3482
3483struct iwl_coex_event_resp {
3484 __le32 status;
ba2d3587 3485} __packed;
fe1bcbfd
WYG
3486
3487
0288d237
JB
3488/******************************************************************************
3489 * Bluetooth Coexistence commands
3490 *
3491 *****************************************************************************/
3492
3493/*
3494 * BT Status notification
fbba9410 3495 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
0288d237
JB
3496 */
3497enum iwl_bt_coex_profile_traffic_load {
3498 IWL_BT_COEX_TRAFFIC_LOAD_NONE = 0,
3499 IWL_BT_COEX_TRAFFIC_LOAD_LOW = 1,
3500 IWL_BT_COEX_TRAFFIC_LOAD_HIGH = 2,
3501 IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS = 3,
3502/*
3503 * There are no more even though below is a u8, the
3504 * indication from the BT device only has two bits.
3505 */
3506};
3507
6013270a
WYG
3508#define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3509#define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3510
d7220f0d 3511/* BT UART message - Share Part (BT -> WiFi) */
fbba9410
WYG
3512#define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3513#define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3514 (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3515#define BT_UART_MSG_FRAME1SSN_POS (3)
3516#define BT_UART_MSG_FRAME1SSN_MSK \
3517 (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3518#define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3519#define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3520 (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3521#define BT_UART_MSG_FRAME1RESERVED_POS (6)
3522#define BT_UART_MSG_FRAME1RESERVED_MSK \
3523 (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3524
3525#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3526#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3527 (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3528#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3529#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3530 (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3531#define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3532#define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3533 (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3534#define BT_UART_MSG_FRAME2INBAND_POS (5)
3535#define BT_UART_MSG_FRAME2INBAND_MSK \
3536 (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3537#define BT_UART_MSG_FRAME2RESERVED_POS (6)
3538#define BT_UART_MSG_FRAME2RESERVED_MSK \
3539 (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3540
3541#define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3542#define BT_UART_MSG_FRAME3SCOESCO_MSK \
3543 (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3544#define BT_UART_MSG_FRAME3SNIFF_POS (1)
3545#define BT_UART_MSG_FRAME3SNIFF_MSK \
3546 (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3547#define BT_UART_MSG_FRAME3A2DP_POS (2)
3548#define BT_UART_MSG_FRAME3A2DP_MSK \
3549 (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3550#define BT_UART_MSG_FRAME3ACL_POS (3)
3551#define BT_UART_MSG_FRAME3ACL_MSK \
3552 (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3553#define BT_UART_MSG_FRAME3MASTER_POS (4)
3554#define BT_UART_MSG_FRAME3MASTER_MSK \
3555 (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3556#define BT_UART_MSG_FRAME3OBEX_POS (5)
3557#define BT_UART_MSG_FRAME3OBEX_MSK \
3558 (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3559#define BT_UART_MSG_FRAME3RESERVED_POS (6)
3560#define BT_UART_MSG_FRAME3RESERVED_MSK \
3561 (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3562
3563#define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3564#define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3565 (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3566#define BT_UART_MSG_FRAME4RESERVED_POS (6)
3567#define BT_UART_MSG_FRAME4RESERVED_MSK \
3568 (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3569
3570#define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3571#define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3572 (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3573#define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3574#define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3575 (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3576#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3577#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3578 (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3579#define BT_UART_MSG_FRAME5RESERVED_POS (6)
3580#define BT_UART_MSG_FRAME5RESERVED_MSK \
3581 (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3582
3583#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3584#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3585 (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3586#define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3587#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3588 (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3589#define BT_UART_MSG_FRAME6RESERVED_POS (6)
3590#define BT_UART_MSG_FRAME6RESERVED_MSK \
3591 (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3592
3593#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3594#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3595 (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
399f66fd
WYG
3596#define BT_UART_MSG_FRAME7PAGE_POS (3)
3597#define BT_UART_MSG_FRAME7PAGE_MSK \
3598 (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3599#define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3600#define BT_UART_MSG_FRAME7INQUIRY_MSK \
3601 (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
fbba9410
WYG
3602#define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3603#define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3604 (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3605#define BT_UART_MSG_FRAME7RESERVED_POS (6)
3606#define BT_UART_MSG_FRAME7RESERVED_MSK \
3607 (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3608
d7220f0d
WYG
3609/* BT Session Activity 2 UART message (BT -> WiFi) */
3610#define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3611#define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3612 (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3613#define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3614#define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3615 (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3616
3617#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3618#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3619 (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3620#define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3621#define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3622 (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3623
3624#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3625#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3626 (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3627#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3628#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3629 (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3630#define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3631#define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3632 (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3633#define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3634#define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3635 (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3636
3637#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3638#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3639 (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3640#define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3641#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3642 (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3643#define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3644#define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3645 (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3646
3647#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3648#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3649 (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3650#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3651#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3652 (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3653#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3654#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3655 (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3656#define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3657#define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3658 (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3659
3660#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3661#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3662 (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3663#define BT_UART_MSG_2_FRAME6RFU_POS (5)
3664#define BT_UART_MSG_2_FRAME6RFU_MSK \
3665 (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3666#define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3667#define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3668 (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3669
3670#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3671#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3672 (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3673#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3674#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3675 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3676#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3677#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3678 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3679#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3680#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3681 (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3682#define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3683#define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3684 (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3685
fbba9410
WYG
3686
3687struct iwl_bt_uart_msg {
3688 u8 header;
3689 u8 frame1;
3690 u8 frame2;
3691 u8 frame3;
3692 u8 frame4;
3693 u8 frame5;
3694 u8 frame6;
3695 u8 frame7;
3696} __attribute__((packed));
3697
0288d237 3698struct iwl_bt_coex_profile_notif {
fbba9410 3699 struct iwl_bt_uart_msg last_bt_uart_msg;
0288d237
JB
3700 u8 bt_status; /* 0 - off, 1 - on */
3701 u8 bt_traffic_load; /* 0 .. 3? */
3702 u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3703 u8 reserved;
3704} __attribute__((packed));
3705
aeb4a2ee
WYG
3706#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3707#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3708#define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3709#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3710#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3711#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3712#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
0288d237
JB
3713
3714/*
3715 * BT Coexistence Priority table
3716 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3717 */
aeb4a2ee
WYG
3718enum bt_coex_prio_table_events {
3719 BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3720 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3721 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3722 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3723 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3724 BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3725 BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3726 BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3727 BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3728 BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3729 BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3730 BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3731 BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3732 BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3733 BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3734 BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3735 /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3736 BT_COEX_PRIO_TBL_EVT_MAX,
3737};
3738
3739enum bt_coex_prio_table_priorities {
3740 BT_COEX_PRIO_TBL_DISABLED = 0,
3741 BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3742 BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3743 BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3744 BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3745 BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3746 BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3747 BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3748 BT_COEX_PRIO_TBL_MAX,
3749};
3750
0288d237 3751struct iwl_bt_coex_prio_table_cmd {
aeb4a2ee 3752 u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
0288d237
JB
3753} __attribute__((packed));
3754
aeb4a2ee
WYG
3755#define IWL_BT_COEX_ENV_CLOSE 0
3756#define IWL_BT_COEX_ENV_OPEN 1
0288d237
JB
3757/*
3758 * BT Protection Envelope
3759 * REPLY_BT_COEX_PROT_ENV = 0xcd
3760 */
3761struct iwl_bt_coex_prot_env_cmd {
aeb4a2ee 3762 u8 action; /* 0 = closed, 1 = open */
0288d237
JB
3763 u8 type; /* 0 .. 15 */
3764 u8 reserved[2];
3765} __attribute__((packed));
3766
b481de9c
ZY
3767/******************************************************************************
3768 * (13)
3769 * Union of all expected notifications/responses:
3770 *
3771 *****************************************************************************/
3772
db11d634 3773struct iwl_rx_packet {
2f301227
ZY
3774 /*
3775 * The first 4 bytes of the RX frame header contain both the RX frame
3776 * size and some flags.
3777 * Bit fields:
3778 * 31: flag flush RB request
3779 * 30: flag ignore TC (terminal counter) request
3780 * 29: flag fast IRQ request
3781 * 28-14: Reserved
3782 * 13-00: RX frame size
3783 */
396887a2 3784 __le32 len_n_flags;
857485c0 3785 struct iwl_cmd_header hdr;
b481de9c 3786 union {
885ba202 3787 struct iwl_alive_resp alive_frame;
2aa6ab86
TW
3788 struct iwl_spectrum_notification spectrum_notif;
3789 struct iwl_csa_notification csa_notif;
885ba202 3790 struct iwl_error_resp err_resp;
2aa6ab86 3791 struct iwl_card_state_notif card_state_notif;
7a999bf0
TW
3792 struct iwl_add_sta_resp add_sta;
3793 struct iwl_rem_sta_resp rem_sta;
2aa6ab86
TW
3794 struct iwl_sleep_notification sleep_notif;
3795 struct iwl_spectrum_resp spectrum;
8f91aecb 3796 struct iwl_notif_statistics stats;
7980fba5 3797 struct iwl_bt_notif_statistics stats_bt;
653fa4a0 3798 struct iwl_compressed_ba_resp compressed_ba;
2aa6ab86 3799 struct iwl_missed_beacon_notif missed_beacon;
fe1bcbfd
WYG
3800 struct iwl_coex_medium_notification coex_medium_notif;
3801 struct iwl_coex_event_resp coex_event;
0288d237 3802 struct iwl_bt_coex_profile_notif bt_coex_profile_notif;
b481de9c
ZY
3803 __le32 status;
3804 u8 raw[0];
3805 } u;
ba2d3587 3806} __packed;
b481de9c 3807
a3139c59 3808int iwl_agn_check_rxon_cmd(struct iwl_priv *priv);
8f5c87dc 3809
946ba30d
JB
3810/*
3811 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3812 */
3813
94073919
JB
3814/*
3815 * Minimum slot time in TU
3816 */
3817#define IWL_MIN_SLOT_TIME 20
3818
946ba30d
JB
3819/**
3820 * struct iwl_wipan_slot
3821 * @width: Time in TU
3822 * @type:
3823 * 0 - BSS
3824 * 1 - PAN
3825 */
3826struct iwl_wipan_slot {
3827 __le16 width;
3828 u8 type;
3829 u8 reserved;
3830} __packed;
3831
3832#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3833#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3834#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3835#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3836#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3837
3838/**
3839 * struct iwl_wipan_params_cmd
3840 * @flags:
3841 * bit0: reserved
3842 * bit1: CP leave channel with CTS
3843 * bit2: CP leave channel qith Quiet
3844 * bit3: slotted mode
3845 * 1 - work in slotted mode
3846 * 0 - work in non slotted mode
3847 * bit4: filter beacon notification
3848 * bit5: full tx slotted mode. if this flag is set,
3849 * uCode will perform leaving channel methods in context switch
3850 * also when working in same channel mode
3851 * @num_slots: 1 - 10
3852 */
3853struct iwl_wipan_params_cmd {
3854 __le16 flags;
3855 u8 reserved;
3856 u8 num_slots;
3857 struct iwl_wipan_slot slots[10];
3858} __packed;
3859
3860/*
3861 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3862 *
3863 * TODO: Figure out what this is used for,
3864 * it can only switch between 2.4 GHz
3865 * channels!!
3866 */
3867
3868struct iwl_wipan_p2p_channel_switch_cmd {
3869 __le16 channel;
3870 __le16 reserved;
3871};
3872
3873/*
3874 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3875 *
3876 * This is used by the device to notify us of the
3877 * NoA schedule it determined so we can forward it
3878 * to userspace for inclusion in probe responses.
3879 *
3880 * In beacons, the NoA schedule is simply appended
3881 * to the frame we give the device.
3882 */
3883
3884struct iwl_wipan_noa_descriptor {
3885 u8 count;
3886 __le32 duration;
3887 __le32 interval;
3888 __le32 starttime;
3889} __packed;
3890
3891struct iwl_wipan_noa_attribute {
3892 u8 id;
3893 __le16 length;
3894 u8 index;
3895 u8 ct_window;
3896 struct iwl_wipan_noa_descriptor descr0, descr1;
3897 u8 reserved;
3898} __packed;
3899
3900struct iwl_wipan_noa_notification {
3901 u32 noa_active;
3902 struct iwl_wipan_noa_attribute noa_attribute;
3903} __packed;
3904
6a63578d 3905#endif /* __iwl_commands_h__ */
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