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iwlagn: init cmd_queue earlier
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
901069c7 5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
06702a73
WYG		 46/*
47 * set bt_coex_active to true, uCode will do kill/defer
48 * every time the priority line is asserted (BT is sending signals on the
49 * priority line in the PCIx).
50 * set bt_coex_active to false, uCode will ignore the BT activity and
51 * perform the normal operation
52 *
53 * User might experience transmit issue on some platform due to WiFi/BT
54 * co-exist problem. The possible behaviors are:
55 * Able to scan and finding all the available AP
56 * Not able to associate with any AP
57 * On those platforms, WiFi communication can be restored by set
58 * "bt_coex_active" module parameter to "false"
59 *
60 * default: bt_coex_active = true (BT_COEX_ENABLE)
61 */
670245ed 62bool bt_coex_active = true;
06702a73 63module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 64MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 65
a562a9dd 66u32 iwl_debug_level;
a562a9dd 67
57bd1bea 68const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
57bd1bea
TW		 69
70
1d0a082d 71/* This function both allocates and initializes hw and priv. */
dc21b545 72struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
1d0a082d
AK		 73{
74 struct iwl_priv *priv;
1d0a082d
AK		 75 /* mac80211 allocates memory for this device instance, including
76 * space for this driver's private structure */
dc21b545
JB		 77 struct ieee80211_hw *hw;
78
79 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv),
80 cfg->ops->ieee80211_ops);
1d0a082d 81 if (hw == NULL) {
c96c31e4 82 pr_err("%s: Can not allocate network device\n",
a3139c59 83 cfg->name);
1d0a082d
AK		 84 goto out;
85 }
86
87 priv = hw->priv;
88 priv->hw = hw;
89
90out:
91 return hw;
92}
1d0a082d 93
d9fe60de
JB		 94#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
95#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 96static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 97 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 98 enum ieee80211_band band)
99{
39130df3
RR		 100 u16 max_bit_rate = 0;
101 u8 rx_chains_num = priv->hw_params.rx_chains_num;
102 u8 tx_chains_num = priv->hw_params.tx_chains_num;
103
c7de35cd 104 ht_info->cap = 0;
d9fe60de 105 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 106
d9fe60de 107 ht_info->ht_supported = true;
c7de35cd 108
7cb1b088
WYG		 109 if (priv->cfg->ht_params &&
110 priv->cfg->ht_params->ht_greenfield_support)
b261793d 111 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 112 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 113 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 114 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 115 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
116 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
117 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 118 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 119 }
c7de35cd
RR		 120
121 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 122 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 123
124 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
7cb1b088
WYG		 125 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
126 ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
c7de35cd 127 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
7cb1b088
WYG		 128 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
129 ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
c7de35cd 130
d9fe60de 131 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 132 if (rx_chains_num >= 2)
d9fe60de 133 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 134 if (rx_chains_num >= 3)
d9fe60de 135 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 136
137 /* Highest supported Rx data rate */
138 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 139 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
140 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 141
142 /* Tx MCS capabilities */
d9fe60de 143 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 144 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 145 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
146 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
147 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 148 }
c7de35cd 149}
c7de35cd 150
c7de35cd
RR		 151/**
152 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
153 */
534166de 154int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 155{
156 struct iwl_channel_info *ch;
157 struct ieee80211_supported_band *sband;
158 struct ieee80211_channel *channels;
159 struct ieee80211_channel *geo_ch;
160 struct ieee80211_rate *rates;
161 int i = 0;
162
163 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
164 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 165 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 166 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
167 return 0;
168 }
169
170 channels = kzalloc(sizeof(struct ieee80211_channel) *
171 priv->channel_count, GFP_KERNEL);
172 if (!channels)
173 return -ENOMEM;
174
5027309b 175 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 176 GFP_KERNEL);
177 if (!rates) {
178 kfree(channels);
179 return -ENOMEM;
180 }
181
182 /* 5.2GHz channels start after the 2.4GHz channels */
183 sband = &priv->bands[IEEE80211_BAND_5GHZ];
184 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
185 /* just OFDM */
186 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 187 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 188
49779293 189 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 190 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 191 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 192
193 sband = &priv->bands[IEEE80211_BAND_2GHZ];
194 sband->channels = channels;
195 /* OFDM & CCK */
196 sband->bitrates = rates;
5027309b 197 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 198
49779293 199 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 200 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 201 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 202
203 priv->ieee_channels = channels;
204 priv->ieee_rates = rates;
205
c7de35cd
RR		 206 for (i = 0; i < priv->channel_count; i++) {
207 ch = &priv->channel_info[i];
208
209 /* FIXME: might be removed if scan is OK */
210 if (!is_channel_valid(ch))
211 continue;
212
5a3a0352 213 sband = &priv->bands[ch->band];
c7de35cd
RR		 214
215 geo_ch = &sband->channels[sband->n_channels++];
216
217 geo_ch->center_freq =
5a3a0352 218 ieee80211_channel_to_frequency(ch->channel, ch->band);
c7de35cd
RR		 219 geo_ch->max_power = ch->max_power_avg;
220 geo_ch->max_antenna_gain = 0xff;
221 geo_ch->hw_value = ch->channel;
222
223 if (is_channel_valid(ch)) {
224 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
225 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
226
227 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
228 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
229
230 if (ch->flags & EEPROM_CHANNEL_RADAR)
231 geo_ch->flags |= IEEE80211_CHAN_RADAR;
232
7aafef1c 233 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 234
dc1b0973
WYG		 235 if (ch->max_power_avg > priv->tx_power_device_lmt)
236 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 237 } else {
238 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
239 }
240
e1623446 241 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 242 ch->channel, geo_ch->center_freq,
243 is_channel_a_band(ch) ? "5.2" : "2.4",
244 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
245 "restricted" : "valid",
246 geo_ch->flags);
247 }
248
249 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
250 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 251 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
252 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 253 priv->pci_dev->device,
254 priv->pci_dev->subsystem_device);
c7de35cd
RR		 255 priv->cfg->sku &= ~IWL_SKU_A;
256 }
257
978785a3 258 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 259 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
260 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 261
262 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
263
264 return 0;
265}
266
267/*
268 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
269 */
534166de 270void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 271{
272 kfree(priv->ieee_channels);
273 kfree(priv->ieee_rates);
274 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
275}
c7de35cd 276
7e6a5886
JB		 277static bool iwl_is_channel_extension(struct iwl_priv *priv,
278 enum ieee80211_band band,
279 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 280{
281 const struct iwl_channel_info *ch_info;
282
283 ch_info = iwl_get_channel_info(priv, band, channel);
284 if (!is_channel_valid(ch_info))
7e6a5886 285 return false;
47c5196e 286
d9fe60de 287 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 288 return !(ch_info->ht40_extension_channel &
689da1b3 289 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 290 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 291 return !(ch_info->ht40_extension_channel &
689da1b3 292 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 293
7e6a5886 294 return false;
47c5196e
TW		 295}
296
7e6a5886
JB		 297bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
298 struct iwl_rxon_context *ctx,
299 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 300{
7e6a5886
JB		 301 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
302 return false;
47c5196e 303
7e6a5886
JB		 304 /*
305 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 306 * the bit will not set if it is pure 40MHz case
307 */
7e6a5886
JB		 308 if (ht_cap && !ht_cap->ht_supported)
309 return false;
310
d73e4923 311#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 312 if (priv->disable_ht40)
7e6a5886 313 return false;
1e4247d4 314#endif
7e6a5886 315
611d3eb7 316 return iwl_is_channel_extension(priv, priv->band,
246ed355 317 le16_to_cpu(ctx->staging.channel),
7e6a5886 318 ctx->ht.extension_chan_offset);
47c5196e 319}
47c5196e 320
2c2f3b33
TW		 321static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
322{
ea196fdb
JB		 323 u16 new_val;
324 u16 beacon_factor;
325
326 /*
327 * If mac80211 hasn't given us a beacon interval, program
328 * the default into the device (not checking this here
329 * would cause the adjustment below to return the maximum
330 * value, which may break PAN.)
331 */
332 if (!beacon_val)
333 return DEFAULT_BEACON_INTERVAL;
334
335 /*
336 * If the beacon interval we obtained from the peer
337 * is too large, we'll have to wake up more often
338 * (and in IBSS case, we'll beacon too much)
339 *
340 * For example, if max_beacon_val is 4096, and the
341 * requested beacon interval is 7000, we'll have to
342 * use 3500 to be able to wake up on the beacons.
343 *
344 * This could badly influence beacon detection stats.
345 */
2c2f3b33
TW		 346
347 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
348 new_val = beacon_val / beacon_factor;
349
350 if (!new_val)
351 new_val = max_beacon_val;
352
353 return new_val;
354}
355
47313e34 356int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW		 357{
358 u64 tsf;
359 s32 interval_tm, rem;
2c2f3b33
TW		 360 struct ieee80211_conf *conf = NULL;
361 u16 beacon_int;
47313e34 362 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW		 363
364 conf = ieee80211_get_hw_conf(priv->hw);
365
948f5a2f
JB		 366 lockdep_assert_held(&priv->mutex);
367
246ed355 368 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 369
246ed355
JB		 370 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
371 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 372
47313e34 373 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 374
47313e34
JB		 375 /*
376 * TODO: For IBSS we need to get atim_window from mac80211,
377 * for now just always use 0
378 */
379 ctx->timing.atim_window = 0;
2c2f3b33 380
bde4530e 381 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB		 382 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
383 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
384 priv->contexts[IWL_RXON_CTX_BSS].vif &&
385 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB		 386 ctx->timing.beacon_interval =
387 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
388 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB		 389 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
390 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
391 priv->contexts[IWL_RXON_CTX_PAN].vif &&
392 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
393 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
394 !ctx->vif->bss_conf.beacon_int)) {
395 ctx->timing.beacon_interval =
396 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
397 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB		 398 } else {
399 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 400 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB		 401 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
402 }
2c2f3b33
TW		 403
404 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 405 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 406 rem = do_div(tsf, interval_tm);
246ed355 407 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 408
47313e34 409 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 410
2c2f3b33
TW		 411 IWL_DEBUG_ASSOC(priv,
412 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 413 le16_to_cpu(ctx->timing.beacon_interval),
414 le32_to_cpu(ctx->timing.beacon_init_val),
415 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 416
8f2d3d2a 417 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 418 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 419}
2c2f3b33 420
246ed355
JB		 421void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
422 int hw_decrypt)
8ccde88a 423{
246ed355 424 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 425
426 if (hw_decrypt)
427 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
428 else
429 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
430
431}
8ccde88a 432
dacefedb 433/* validate RXON structure is valid */
246ed355 434int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a 435{
246ed355 436 struct iwl_rxon_cmd *rxon = &ctx->staging;
dacefedb 437 bool error = false;
8ccde88a
SO		 438
439 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
dacefedb
JB		 440 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
441 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
442 error = true;
443 }
444 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
445 IWL_WARN(priv, "check 2.4G: wrong radar\n");
446 error = true;
447 }
8ccde88a 448 } else {
dacefedb
JB		 449 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
450 IWL_WARN(priv, "check 5.2G: not short slot!\n");
451 error = true;
452 }
453 if (rxon->flags & RXON_FLG_CCK_MSK) {
454 IWL_WARN(priv, "check 5.2G: CCK!\n");
455 error = true;
456 }
457 }
458 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
459 IWL_WARN(priv, "mac/bssid mcast!\n");
460 error = true;
8ccde88a 461 }
8ccde88a
SO		 462
463 /* make sure basic rates 6Mbps and 1Mbps are supported */
dacefedb
JB		 464 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
465 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
466 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
467 error = true;
468 }
8ccde88a 469
dacefedb
JB		 470 if (le16_to_cpu(rxon->assoc_id) > 2007) {
471 IWL_WARN(priv, "aid > 2007\n");
472 error = true;
473 }
8ccde88a 474
dacefedb
JB		 475 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
476 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
477 IWL_WARN(priv, "CCK and short slot\n");
478 error = true;
479 }
8ccde88a 480
dacefedb
JB		 481 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
482 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
483 IWL_WARN(priv, "CCK and auto detect");
484 error = true;
485 }
8ccde88a 486
dacefedb
JB		 487 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
488 RXON_FLG_TGG_PROTECT_MSK)) ==
489 RXON_FLG_TGG_PROTECT_MSK) {
490 IWL_WARN(priv, "TGg but no auto-detect\n");
491 error = true;
492 }
8ccde88a
SO		 493
494 if (error)
495 IWL_WARN(priv, "Tuning to channel %d\n",
496 le16_to_cpu(rxon->channel));
497
498 if (error) {
dacefedb
JB		 499 IWL_ERR(priv, "Invalid RXON\n");
500 return -EINVAL;
8ccde88a
SO		 501 }
502 return 0;
503}
8ccde88a
SO		 504
505/**
506 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
507 * @priv: staging_rxon is compared to active_rxon
508 *
509 * If the RXON structure is changing enough to require a new tune,
510 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
511 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
512 */
246ed355
JB		 513int iwl_full_rxon_required(struct iwl_priv *priv,
514 struct iwl_rxon_context *ctx)
8ccde88a 515{
246ed355
JB		 516 const struct iwl_rxon_cmd *staging = &ctx->staging;
517 const struct iwl_rxon_cmd *active = &ctx->active;
518
519#define CHK(cond) \
520 if ((cond)) { \
521 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
522 return 1; \
523 }
524
525#define CHK_NEQ(c1, c2) \
526 if ((c1) != (c2)) { \
527 IWL_DEBUG_INFO(priv, "need full RXON - " \
528 #c1 " != " #c2 " - %d != %d\n", \
529 (c1), (c2)); \
530 return 1; \
531 }
8ccde88a
SO		 532
533 /* These items are only settable from the full RXON command */
246ed355
JB		 534 CHK(!iwl_is_associated_ctx(ctx));
535 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
536 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
537 CHK(compare_ether_addr(staging->wlap_bssid_addr,
538 active->wlap_bssid_addr));
539 CHK_NEQ(staging->dev_type, active->dev_type);
540 CHK_NEQ(staging->channel, active->channel);
541 CHK_NEQ(staging->air_propagation, active->air_propagation);
542 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
543 active->ofdm_ht_single_stream_basic_rates);
544 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
545 active->ofdm_ht_dual_stream_basic_rates);
546 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
547 active->ofdm_ht_triple_stream_basic_rates);
548 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 549
550 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
551 * be updated with the RXON_ASSOC command -- however only some
552 * flag transitions are allowed using RXON_ASSOC */
553
554 /* Check if we are not switching bands */
246ed355
JB		 555 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
556 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 557
558 /* Check if we are switching association toggle */
246ed355
JB		 559 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
560 active->filter_flags & RXON_FILTER_ASSOC_MSK);
561
562#undef CHK
563#undef CHK_NEQ
8ccde88a
SO		 564
565 return 0;
566}
8ccde88a 567
76d04815
JB		 568u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
569 struct iwl_rxon_context *ctx)
8ccde88a 570{
4a02886b
JB		 571 /*
572 * Assign the lowest rate -- should really get this from
573 * the beacon skb from mac80211.
574 */
246ed355 575 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO		 576 return IWL_RATE_1M_PLCP;
577 else
578 return IWL_RATE_6M_PLCP;
579}
8ccde88a 580
246ed355
JB		 581static void _iwl_set_rxon_ht(struct iwl_priv *priv,
582 struct iwl_ht_config *ht_conf,
583 struct iwl_rxon_context *ctx)
47c5196e 584{
246ed355 585 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 586
7e6a5886 587 if (!ctx->ht.enabled) {
a2b0f02e 588 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 589 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 590 RXON_FLG_HT40_PROT_MSK |
42eb7c64 591 RXON_FLG_HT_PROT_MSK);
47c5196e 592 return;
42eb7c64 593 }
47c5196e 594
7e6a5886 595 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 596 * will be needed for rxon->flags
597 */
7e6a5886 598 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 599
600 /* Set up channel bandwidth:
7aafef1c 601 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 602 /* clear the HT channel mode before set the mode */
603 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
604 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 605 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 606 /* pure ht40 */
7e6a5886 607 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 608 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 609 /* Note: control channel is opposite of extension channel */
7e6a5886 610 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 611 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
612 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
613 break;
614 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
615 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
616 break;
617 }
618 } else {
a2b0f02e 619 /* Note: control channel is opposite of extension channel */
7e6a5886 620 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 621 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
622 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
623 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
624 break;
625 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
626 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
627 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
628 break;
629 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
630 default:
631 /* channel location only valid if in Mixed mode */
632 IWL_ERR(priv, "invalid extension channel offset\n");
633 break;
634 }
635 }
636 } else {
637 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 638 }
639
45823531 640 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 641 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 642
02bb1bea 643 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 644 "extension channel offset 0x%x\n",
7e6a5886
JB		 645 le32_to_cpu(rxon->flags), ctx->ht.protection,
646 ctx->ht.extension_chan_offset);
47c5196e 647}
246ed355
JB		 648
649void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
650{
651 struct iwl_rxon_context *ctx;
652
653 for_each_context(priv, ctx)
654 _iwl_set_rxon_ht(priv, ht_conf, ctx);
655}
47c5196e 656
246ed355 657/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 658u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 659 enum ieee80211_band band)
14023641
AK		 660{
661 const struct iwl_channel_info *ch_info;
662 int i;
663 u8 channel = 0;
246ed355
JB		 664 u8 min, max;
665 struct iwl_rxon_context *ctx;
14023641 666
14023641 667 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 668 min = 14;
669 max = priv->channel_count;
14023641 670 } else {
246ed355
JB		 671 min = 0;
672 max = 14;
673 }
674
675 for (i = min; i < max; i++) {
676 bool busy = false;
677
678 for_each_context(priv, ctx) {
679 busy = priv->channel_info[i].channel ==
680 le16_to_cpu(ctx->staging.channel);
681 if (busy)
682 break;
14023641 683 }
246ed355
JB		 684
685 if (busy)
686 continue;
687
688 channel = priv->channel_info[i].channel;
689 ch_info = iwl_get_channel_info(priv, band, channel);
690 if (is_channel_valid(ch_info))
691 break;
14023641
AK		 692 }
693
694 return channel;
695}
14023641 696
bf85ea4f 697/**
3edb5fd6
SZ		 698 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
699 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 700
bf85ea4f 701 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 702 * in the staging RXON flag structure based on the ch->band
bf85ea4f 703 */
246ed355
JB		 704int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
705 struct iwl_rxon_context *ctx)
bf85ea4f 706{
17e72782 707 enum ieee80211_band band = ch->band;
81e95430 708 u16 channel = ch->hw_value;
17e72782 709
246ed355 710 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK		 711 (priv->band == band))
712 return 0;
713
246ed355 714 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 715 if (band == IEEE80211_BAND_5GHZ)
246ed355 716 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 717 else
246ed355 718 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 719
720 priv->band = band;
721
e1623446 722 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 723
724 return 0;
725}
bf85ea4f 726
79d07325 727void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 728 struct iwl_rxon_context *ctx,
79d07325
WYG		 729 enum ieee80211_band band,
730 struct ieee80211_vif *vif)
8ccde88a
SO		 731{
732 if (band == IEEE80211_BAND_5GHZ) {
246ed355 733 ctx->staging.flags &=
8ccde88a
SO		 734 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
735 | RXON_FLG_CCK_MSK);
246ed355 736 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 737 } else {
738 /* Copied from iwl_post_associate() */
c213d745 739 if (vif && vif->bss_conf.use_short_slot)
246ed355 740 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 741 else
246ed355 742 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 743
246ed355
JB		 744 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
745 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
746 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 747 }
748}
8ccde88a
SO		 749
750/*
751 * initialize rxon structure with default values from eeprom
752 */
1dda6d28 753void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 754 struct iwl_rxon_context *ctx)
8ccde88a
SO		 755{
756 const struct iwl_channel_info *ch_info;
757
246ed355 758 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 759
d0fe478c
JB		 760 if (!ctx->vif) {
761 ctx->staging.dev_type = ctx->unused_devtype;
762 } else switch (ctx->vif->type) {
8ccde88a 763 case NL80211_IFTYPE_AP:
d0fe478c 764 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO		 765 break;
766
767 case NL80211_IFTYPE_STATION:
d0fe478c 768 ctx->staging.dev_type = ctx->station_devtype;
246ed355 769 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 770 break;
771
772 case NL80211_IFTYPE_ADHOC:
d0fe478c 773 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB		 774 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
775 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 776 RXON_FILTER_ACCEPT_GRP_MSK;
777 break;
778
8ccde88a 779 default:
d0fe478c
JB		 780 IWL_ERR(priv, "Unsupported interface type %d\n",
781 ctx->vif->type);
8ccde88a
SO		 782 break;
783 }
784
785#if 0
786 /* TODO: Figure out when short_preamble would be set and cache from
787 * that */
788 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 789 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 790 else
246ed355 791 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 792#endif
793
794 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 795 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 796
797 if (!ch_info)
798 ch_info = &priv->channel_info[0];
799
246ed355 800 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 801 priv->band = ch_info->band;
802
d0fe478c 803 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 804
246ed355 805 ctx->staging.ofdm_basic_rates =
8ccde88a 806 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 807 ctx->staging.cck_basic_rates =
8ccde88a
SO		 808 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
809
a2b0f02e 810 /* clear both MIX and PURE40 mode flag */
246ed355 811 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 812 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB		 813 if (ctx->vif)
814 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 815
246ed355
JB		 816 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
817 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
818 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a 819}
8ccde88a 820
79d07325 821void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 822{
823 const struct ieee80211_supported_band *hw = NULL;
824 struct ieee80211_rate *rate;
246ed355 825 struct iwl_rxon_context *ctx;
8ccde88a
SO		 826 int i;
827
828 hw = iwl_get_hw_mode(priv, priv->band);
829 if (!hw) {
830 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
831 return;
832 }
833
834 priv->active_rate = 0;
8ccde88a
SO		 835
836 for (i = 0; i < hw->n_bitrates; i++) {
837 rate = &(hw->bitrates[i]);
5027309b 838 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 839 priv->active_rate |= (1 << rate->hw_value);
840 }
841
4a02886b 842 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 843
246ed355
JB		 844 for_each_context(priv, ctx) {
845 ctx->staging.cck_basic_rates =
846 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 847
246ed355
JB		 848 ctx->staging.ofdm_basic_rates =
849 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
850 }
8ccde88a 851}
79d07325
WYG		 852
853void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
854{
8bd413e6
JB		 855 /*
856 * MULTI-FIXME
857 * See iwl_mac_channel_switch.
858 */
859 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
860
79d07325
WYG		 861 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
862 return;
863
864 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 865 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG		 866 mutex_lock(&priv->mutex);
867 priv->switch_rxon.switch_in_progress = false;
868 mutex_unlock(&priv->mutex);
869 }
870}
8ccde88a 871
8ccde88a 872#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB		 873void iwl_print_rx_config_cmd(struct iwl_priv *priv,
874 struct iwl_rxon_context *ctx)
8ccde88a 875{
246ed355 876 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 877
e1623446 878 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 879 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 880 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
881 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
882 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 883 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 884 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
885 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 886 rxon->ofdm_basic_rates);
e1623446
TW		 887 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
888 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
889 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
890 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 891}
6686d17e 892#endif
e649437f
JB		 893
894void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
8ccde88a 895{
491bc292
WYG		 896 unsigned int reload_msec;
897 unsigned long reload_jiffies;
898
8ccde88a
SO		 899 /* Set the FW error flag -- cleared on iwl_down */
900 set_bit(STATUS_FW_ERROR, &priv->status);
901
902 /* Cancel currently queued command. */
903 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
904
e649437f
JB		 905 /* Keep the restart process from trying to send host
906 * commands by clearing the ready bit */
907 clear_bit(STATUS_READY, &priv->status);
908
909 wake_up_interruptible(&priv->wait_command_queue);
910
911 if (!ondemand) {
912 /*
913 * If firmware keep reloading, then it indicate something
914 * serious wrong and firmware having problem to recover
915 * from it. Instead of keep trying which will fill the syslog
916 * and hang the system, let's just stop it
917 */
918 reload_jiffies = jiffies;
919 reload_msec = jiffies_to_msecs((long) reload_jiffies -
920 (long) priv->reload_jiffies);
921 priv->reload_jiffies = reload_jiffies;
922 if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
923 priv->reload_count++;
924 if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
925 IWL_ERR(priv, "BUG_ON, Stop restarting\n");
926 return;
927 }
928 } else
929 priv->reload_count = 0;
930 }
931
932 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
933 if (priv->cfg->mod_params->restart_fw) {
934 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
935 "Restarting adapter due to uCode error.\n");
936 queue_work(priv->workqueue, &priv->restart);
937 } else
938 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
939 "Detected FW error, but not restarting\n");
940 }
941}
942
943/**
944 * iwl_irq_handle_error - called for HW or SW error interrupt from card
945 */
946void iwl_irq_handle_error(struct iwl_priv *priv)
947{
50619ac9
WYG		 948 /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
949 if (priv->cfg->internal_wimax_coex &&
950 (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
951 APMS_CLK_VAL_MRB_FUNC_MODE) ||
952 (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
953 APMG_PS_CTRL_VAL_RESET_REQ))) {
50619ac9 954 /*
e649437f
JB		 955 * Keep the restart process from trying to send host
956 * commands by clearing the ready bit.
50619ac9
WYG		 957 */
958 clear_bit(STATUS_READY, &priv->status);
e649437f
JB		 959 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
960 wake_up_interruptible(&priv->wait_command_queue);
50619ac9
WYG		 961 IWL_ERR(priv, "RF is used by WiMAX\n");
962 return;
963 }
964
459bc732
SZ		 965 IWL_ERR(priv, "Loaded firmware version: %s\n",
966 priv->hw->wiphy->fw_version);
967
3a3ff72c 968 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 969 if (priv->cfg->ops->lib->dump_csr)
970 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 971 if (priv->cfg->ops->lib->dump_fh)
972 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 973 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 974#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 975 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB		 976 iwl_print_rx_config_cmd(priv,
977 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO		 978#endif
979
e649437f 980 iwlagn_fw_error(priv, false);
8ccde88a 981}
8ccde88a 982
f8e200de 983static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 984{
5220af0c 985 int ret = 0;
d68b603c 986
5220af0c 987 /* stop device's busmaster DMA activity */
d68b603c
AK		 988 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
989
5220af0c 990 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 991 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 992 if (ret)
993 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 994
d68b603c
AK		 995 IWL_DEBUG_INFO(priv, "stop master\n");
996
5220af0c 997 return ret;
d68b603c 998}
d68b603c
AK		 999
1000void iwl_apm_stop(struct iwl_priv *priv)
1001{
fadb3582
BC		 1002 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1003
5220af0c 1004 /* Stop device's DMA activity */
d68b603c
AK		 1005 iwl_apm_stop_master(priv);
1006
5220af0c 1007 /* Reset the entire device */
d68b603c
AK		 1008 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1009
1010 udelay(10);
5220af0c
BC		 1011
1012 /*
1013 * Clear "initialization complete" bit to move adapter from
1014 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1015 */
d68b603c 1016 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c 1017}
d68b603c 1018
fadb3582
BC		 1019
1020/*
1021 * Start up NIC's basic functionality after it has been reset
1022 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1023 * NOTE: This does not load uCode nor start the embedded processor
1024 */
1025int iwl_apm_init(struct iwl_priv *priv)
1026{
1027 int ret = 0;
1028 u16 lctl;
1029
1030 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1031
1032 /*
1033 * Use "set_bit" below rather than "write", to preserve any hardware
1034 * bits already set by default after reset.
1035 */
1036
1037 /* Disable L0S exit timer (platform NMI Work/Around) */
1038 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1039 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1040
1041 /*
1042 * Disable L0s without affecting L1;
1043 * don't wait for ICH L0s (ICH bug W/A)
1044 */
1045 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1046 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1047
1048 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1049 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1050
1051 /*
1052 * Enable HAP INTA (interrupt from management bus) to
1053 * wake device's PCI Express link L1a -> L0s
1054 * NOTE: This is no-op for 3945 (non-existant bit)
1055 */
1056 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1057 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1058
1059 /*
a6c5c731
BC		 1060 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1061 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1062 * If so (likely), disable L0S, so device moves directly L0->L1;
1063 * costs negligible amount of power savings.
1064 * If not (unlikely), enable L0S, so there is at least some
1065 * power savings, even without L1.
fadb3582 1066 */
7cb1b088 1067 if (priv->cfg->base_params->set_l0s) {
fadb3582
BC		 1068 lctl = iwl_pcie_link_ctl(priv);
1069 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1070 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1071 /* L1-ASPM enabled; disable(!) L0S */
1072 iwl_set_bit(priv, CSR_GIO_REG,
1073 CSR_GIO_REG_VAL_L0S_ENABLED);
1074 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1075 } else {
1076 /* L1-ASPM disabled; enable(!) L0S */
1077 iwl_clear_bit(priv, CSR_GIO_REG,
1078 CSR_GIO_REG_VAL_L0S_ENABLED);
1079 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1080 }
1081 }
1082
1083 /* Configure analog phase-lock-loop before activating to D0A */
7cb1b088
WYG		 1084 if (priv->cfg->base_params->pll_cfg_val)
1085 iwl_set_bit(priv, CSR_ANA_PLL_CFG,
1086 priv->cfg->base_params->pll_cfg_val);
fadb3582
BC		 1087
1088 /*
1089 * Set "initialization complete" bit to move adapter from
1090 * D0U* --> D0A* (powered-up active) state.
1091 */
1092 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1093
1094 /*
1095 * Wait for clock stabilization; once stabilized, access to
1096 * device-internal resources is supported, e.g. iwl_write_prph()
1097 * and accesses to uCode SRAM.
1098 */
1099 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1100 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1101 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1102 if (ret < 0) {
1103 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1104 goto out;
1105 }
1106
1107 /*
1108 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1109 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1110 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1111 * and don't need BSM to restore data after power-saving sleep.
1112 *
1113 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1114 * do not disable clocks. This preserves any hardware bits already
1115 * set by default in "CLK_CTRL_REG" after reset.
1116 */
7cb1b088 1117 if (priv->cfg->base_params->use_bsm)
fadb3582
BC		 1118 iwl_write_prph(priv, APMG_CLK_EN_REG,
1119 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1120 else
1121 iwl_write_prph(priv, APMG_CLK_EN_REG,
1122 APMG_CLK_VAL_DMA_CLK_RQT);
1123 udelay(20);
1124
1125 /* Disable L1-Active */
1126 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1127 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1128
1129out:
1130 return ret;
1131}
fadb3582
BC		 1132
1133
630fe9b6
TW		 1134int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1135{
a25a66ac
SG		 1136 int ret;
1137 s8 prev_tx_power;
f844a709
SG		 1138 bool defer;
1139 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
a25a66ac
SG		 1140
1141 lockdep_assert_held(&priv->mutex);
1142
1143 if (priv->tx_power_user_lmt == tx_power && !force)
1144 return 0;
1145
1146 if (!priv->cfg->ops->lib->send_tx_power)
1147 return -EOPNOTSUPP;
5eadd94b 1148
b744cb79
WYG		 1149 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1150 IWL_WARN(priv,
1151 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1152 tx_power,
b744cb79 1153 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1154 return -EINVAL;
1155 }
1156
dc1b0973 1157 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1158 IWL_WARN(priv,
1159 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1160 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1161 return -EINVAL;
1162 }
1163
a25a66ac
SG		 1164 if (!iwl_is_ready_rf(priv))
1165 return -EIO;
630fe9b6 1166
f844a709
SG		 1167 /* scan complete and commit_rxon use tx_power_next value,
1168 * it always need to be updated for newest request */
a25a66ac 1169 priv->tx_power_next = tx_power;
f844a709
SG		 1170
1171 /* do not set tx power when scanning or channel changing */
1172 defer = test_bit(STATUS_SCANNING, &priv->status) ||
1173 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
1174 if (defer && !force) {
1175 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
a25a66ac 1176 return 0;
5eadd94b 1177 }
630fe9b6 1178
a25a66ac
SG		 1179 prev_tx_power = priv->tx_power_user_lmt;
1180 priv->tx_power_user_lmt = tx_power;
1181
1182 ret = priv->cfg->ops->lib->send_tx_power(priv);
1183
1184 /* if fail to set tx_power, restore the orig. tx power */
1185 if (ret) {
1186 priv->tx_power_user_lmt = prev_tx_power;
1187 priv->tx_power_next = prev_tx_power;
1188 }
630fe9b6
TW		 1189 return ret;
1190}
630fe9b6 1191
65b52bde 1192void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1193{
1194 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1195 .lead_time = BT_LEAD_TIME_DEF,
1196 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1197 .kill_ack_mask = 0,
1198 .kill_cts_mask = 0,
1199 };
1200
06702a73
WYG		 1201 if (!bt_coex_active)
1202 bt_cmd.flags = BT_COEX_DISABLE;
1203 else
1204 bt_cmd.flags = BT_COEX_ENABLE;
1205
f21dd005 1206 priv->bt_enable_flag = bt_cmd.flags;
06702a73
WYG		 1207 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1208 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1209
65b52bde
JB		 1210 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1211 sizeof(struct iwl_bt_cmd), &bt_cmd))
1212 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd 1213}
17f841cd 1214
ef8d5529 1215int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1216{
ef8d5529
WYG		 1217 struct iwl_statistics_cmd statistics_cmd = {
1218 .configuration_flags =
1219 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1220 };
ef8d5529
WYG		 1221
1222 if (flags & CMD_ASYNC)
1223 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1224 sizeof(struct iwl_statistics_cmd),
1225 &statistics_cmd, NULL);
1226 else
1227 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1228 sizeof(struct iwl_statistics_cmd),
1229 &statistics_cmd);
49ea8596 1230}
7e8c519e 1231
a83b9141
WYG		 1232void iwl_clear_isr_stats(struct iwl_priv *priv)
1233{
1234 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1235}
a83b9141 1236
488829f1
AK		 1237int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1238 const struct ieee80211_tx_queue_params *params)
1239{
1240 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1241 struct iwl_rxon_context *ctx;
488829f1
AK		 1242 unsigned long flags;
1243 int q;
1244
1245 IWL_DEBUG_MAC80211(priv, "enter\n");
1246
1247 if (!iwl_is_ready_rf(priv)) {
1248 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1249 return -EIO;
1250 }
1251
1252 if (queue >= AC_NUM) {
1253 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1254 return 0;
1255 }
1256
1257 q = AC_NUM - 1 - queue;
1258
1259 spin_lock_irqsave(&priv->lock, flags);
1260
8dfdb9d5
JB		 1261 /*
1262 * MULTI-FIXME
1263 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1264 */
1265 for_each_context(priv, ctx) {
1266 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1267 cpu_to_le16(params->cw_min);
1268 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1269 cpu_to_le16(params->cw_max);
1270 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1271 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1272 cpu_to_le16((params->txop * 32));
1273
1274 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1275 }
488829f1
AK		 1276
1277 spin_unlock_irqrestore(&priv->lock, flags);
1278
1279 IWL_DEBUG_MAC80211(priv, "leave\n");
1280 return 0;
1281}
5bbe233b 1282
a85d7cca
JB		 1283int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1284{
1285 struct iwl_priv *priv = hw->priv;
1286
1287 return priv->ibss_manager == IWL_IBSS_MANAGER;
1288}
a85d7cca 1289
d4daaea6 1290static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
727882d6 1291{
d0fe478c 1292 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK		 1293
1294 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1295 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1296
246ed355 1297 return iwlcore_commit_rxon(priv, ctx);
727882d6 1298}
727882d6 1299
d4daaea6
JB		 1300static int iwl_setup_interface(struct iwl_priv *priv,
1301 struct iwl_rxon_context *ctx)
1302{
1303 struct ieee80211_vif *vif = ctx->vif;
1304 int err;
1305
1306 lockdep_assert_held(&priv->mutex);
1307
1308 /*
1309 * This variable will be correct only when there's just
1310 * a single context, but all code using it is for hardware
1311 * that supports only one context.
1312 */
1313 priv->iw_mode = vif->type;
1314
1315 ctx->is_active = true;
1316
1317 err = iwl_set_mode(priv, ctx);
1318 if (err) {
1319 if (!ctx->always_active)
1320 ctx->is_active = false;
1321 return err;
1322 }
1323
1324 if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
1325 vif->type == NL80211_IFTYPE_ADHOC) {
1326 /*
1327 * pretend to have high BT traffic as long as we
1328 * are operating in IBSS mode, as this will cause
1329 * the rate scaling etc. to behave as intended.
1330 */
1331 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1332 }
1333
1334 return 0;
1335}
1336
b55e75ed 1337int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1338{
1339 struct iwl_priv *priv = hw->priv;
246ed355 1340 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1341 struct iwl_rxon_context *tmp, *ctx = NULL;
d4daaea6 1342 int err;
f35c0c56 1343 enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
cbb6ab94 1344
3779db10 1345 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
f35c0c56 1346 viftype, vif->addr);
cbb6ab94 1347
47e28f41
JB		 1348 mutex_lock(&priv->mutex);
1349
4bd530f3
SG		 1350 if (!iwl_is_ready_rf(priv)) {
1351 IWL_WARN(priv, "Try to add interface when device not ready\n");
b55e75ed
JB		 1352 err = -EINVAL;
1353 goto out;
1354 }
1355
d0fe478c
JB		 1356 for_each_context(priv, tmp) {
1357 u32 possible_modes =
1358 tmp->interface_modes | tmp->exclusive_interface_modes;
1359
1360 if (tmp->vif) {
1361 /* check if this busy context is exclusive */
1362 if (tmp->exclusive_interface_modes &
1363 BIT(tmp->vif->type)) {
1364 err = -EINVAL;
1365 goto out;
1366 }
1367 continue;
1368 }
1369
f35c0c56 1370 if (!(possible_modes & BIT(viftype)))
d0fe478c
JB		 1371 continue;
1372
1373 /* have maybe usable context w/o interface */
1374 ctx = tmp;
1375 break;
1376 }
1377
1378 if (!ctx) {
47e28f41
JB		 1379 err = -EOPNOTSUPP;
1380 goto out;
cbb6ab94
AK		 1381 }
1382
d0fe478c 1383 vif_priv->ctx = ctx;
8bd413e6 1384 ctx->vif = vif;
59079949 1385
d4daaea6
JB		 1386 err = iwl_setup_interface(priv, ctx);
1387 if (!err)
1388 goto out;
cbb6ab94 1389
8bd413e6 1390 ctx->vif = NULL;
b55e75ed 1391 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1392 out:
cbb6ab94
AK		 1393 mutex_unlock(&priv->mutex);
1394
1395 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1396 return err;
cbb6ab94 1397}
cbb6ab94 1398
d4daaea6
JB		 1399static void iwl_teardown_interface(struct iwl_priv *priv,
1400 struct ieee80211_vif *vif,
1401 bool mode_change)
d8052319 1402{
246ed355 1403 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
d8052319 1404
d4daaea6 1405 lockdep_assert_held(&priv->mutex);
d0fe478c 1406
e7e16b90
SG		 1407 if (priv->scan_vif == vif) {
1408 iwl_scan_cancel_timeout(priv, 200);
1409 iwl_force_scan_end(priv);
1410 }
8bd413e6 1411
d4daaea6
JB		 1412 if (!mode_change) {
1413 iwl_set_mode(priv, ctx);
1414 if (!ctx->always_active)
1415 ctx->is_active = false;
1416 }
763cc3bf 1417
59079949
JB		 1418 /*
1419 * When removing the IBSS interface, overwrite the
1420 * BT traffic load with the stored one from the last
1421 * notification, if any. If this is a device that
1422 * doesn't implement this, this has no effect since
1423 * both values are the same and zero.
1424 */
1425 if (vif->type == NL80211_IFTYPE_ADHOC)
66e863a5 1426 priv->bt_traffic_load = priv->last_bt_traffic_load;
d4daaea6
JB		 1427}
1428
1429void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1430 struct ieee80211_vif *vif)
1431{
1432 struct iwl_priv *priv = hw->priv;
1433 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1434
1435 IWL_DEBUG_MAC80211(priv, "enter\n");
1436
1437 mutex_lock(&priv->mutex);
1438
1439 WARN_ON(ctx->vif != vif);
1440 ctx->vif = NULL;
1441
1442 iwl_teardown_interface(priv, vif, false);
59079949 1443
d8052319
AK		 1444 mutex_unlock(&priv->mutex);
1445
1446 IWL_DEBUG_MAC80211(priv, "leave\n");
1447
1448}
d8052319 1449
88804e2b
WYG		 1450int iwl_alloc_txq_mem(struct iwl_priv *priv)
1451{
1452 if (!priv->txq)
1453 priv->txq = kzalloc(
7cb1b088
WYG		 1454 sizeof(struct iwl_tx_queue) *
1455 priv->cfg->base_params->num_of_queues,
88804e2b
WYG		 1456 GFP_KERNEL);
1457 if (!priv->txq) {
91dd6c27 1458 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 1459 return -ENOMEM;
1460 }
1461 return 0;
1462}
88804e2b
WYG		 1463
1464void iwl_free_txq_mem(struct iwl_priv *priv)
1465{
1466 kfree(priv->txq);
1467 priv->txq = NULL;
1468}
88804e2b 1469
20594eb0
WYG		 1470#ifdef CONFIG_IWLWIFI_DEBUGFS
1471
1472#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
1473
1474void iwl_reset_traffic_log(struct iwl_priv *priv)
1475{
1476 priv->tx_traffic_idx = 0;
1477 priv->rx_traffic_idx = 0;
1478 if (priv->tx_traffic)
1479 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1480 if (priv->rx_traffic)
1481 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1482}
1483
1484int iwl_alloc_traffic_mem(struct iwl_priv *priv)
1485{
1486 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1487
1488 if (iwl_debug_level & IWL_DL_TX) {
1489 if (!priv->tx_traffic) {
1490 priv->tx_traffic =
1491 kzalloc(traffic_size, GFP_KERNEL);
1492 if (!priv->tx_traffic)
1493 return -ENOMEM;
1494 }
1495 }
1496 if (iwl_debug_level & IWL_DL_RX) {
1497 if (!priv->rx_traffic) {
1498 priv->rx_traffic =
1499 kzalloc(traffic_size, GFP_KERNEL);
1500 if (!priv->rx_traffic)
1501 return -ENOMEM;
1502 }
1503 }
1504 iwl_reset_traffic_log(priv);
1505 return 0;
1506}
20594eb0
WYG		 1507
1508void iwl_free_traffic_mem(struct iwl_priv *priv)
1509{
1510 kfree(priv->tx_traffic);
1511 priv->tx_traffic = NULL;
1512
1513 kfree(priv->rx_traffic);
1514 priv->rx_traffic = NULL;
1515}
20594eb0
WYG		 1516
1517void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1518 u16 length, struct ieee80211_hdr *header)
1519{
1520 __le16 fc;
1521 u16 len;
1522
1523 if (likely(!(iwl_debug_level & IWL_DL_TX)))
1524 return;
1525
1526 if (!priv->tx_traffic)
1527 return;
1528
1529 fc = header->frame_control;
1530 if (ieee80211_is_data(fc)) {
1531 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1532 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1533 memcpy((priv->tx_traffic +
1534 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1535 header, len);
1536 priv->tx_traffic_idx =
1537 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1538 }
1539}
20594eb0
WYG		 1540
1541void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1542 u16 length, struct ieee80211_hdr *header)
1543{
1544 __le16 fc;
1545 u16 len;
1546
1547 if (likely(!(iwl_debug_level & IWL_DL_RX)))
1548 return;
1549
1550 if (!priv->rx_traffic)
1551 return;
1552
1553 fc = header->frame_control;
1554 if (ieee80211_is_data(fc)) {
1555 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1556 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1557 memcpy((priv->rx_traffic +
1558 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1559 header, len);
1560 priv->rx_traffic_idx =
1561 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1562 }
1563}
22fdf3c9
WYG		 1564
1565const char *get_mgmt_string(int cmd)
1566{
1567 switch (cmd) {
1568 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1569 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1570 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1571 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1572 IWL_CMD(MANAGEMENT_PROBE_REQ);
1573 IWL_CMD(MANAGEMENT_PROBE_RESP);
1574 IWL_CMD(MANAGEMENT_BEACON);
1575 IWL_CMD(MANAGEMENT_ATIM);
1576 IWL_CMD(MANAGEMENT_DISASSOC);
1577 IWL_CMD(MANAGEMENT_AUTH);
1578 IWL_CMD(MANAGEMENT_DEAUTH);
1579 IWL_CMD(MANAGEMENT_ACTION);
1580 default:
1581 return "UNKNOWN";
1582
1583 }
1584}
1585
1586const char *get_ctrl_string(int cmd)
1587{
1588 switch (cmd) {
1589 IWL_CMD(CONTROL_BACK_REQ);
1590 IWL_CMD(CONTROL_BACK);
1591 IWL_CMD(CONTROL_PSPOLL);
1592 IWL_CMD(CONTROL_RTS);
1593 IWL_CMD(CONTROL_CTS);
1594 IWL_CMD(CONTROL_ACK);
1595 IWL_CMD(CONTROL_CFEND);
1596 IWL_CMD(CONTROL_CFENDACK);
1597 default:
1598 return "UNKNOWN";
1599
1600 }
1601}
1602
7163b8a4 1603void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 1604{
1605 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9
WYG		 1606 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
1607}
1608
1609/*
1610 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1611 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1612 * Use debugFs to display the rx/rx_statistics
1613 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1614 * information will be recorded, but DATA pkt still will be recorded
1615 * for the reason of iwl_led.c need to control the led blinking based on
1616 * number of tx and rx data.
1617 *
1618 */
1619void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1620{
1621 struct traffic_stats *stats;
1622
1623 if (is_tx)
1624 stats = &priv->tx_stats;
1625 else
1626 stats = &priv->rx_stats;
1627
1628 if (ieee80211_is_mgmt(fc)) {
1629 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1630 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1631 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1632 break;
1633 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1634 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1635 break;
1636 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1637 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1638 break;
1639 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1640 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1641 break;
1642 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1643 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1644 break;
1645 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1646 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1647 break;
1648 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1649 stats->mgmt[MANAGEMENT_BEACON]++;
1650 break;
1651 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1652 stats->mgmt[MANAGEMENT_ATIM]++;
1653 break;
1654 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1655 stats->mgmt[MANAGEMENT_DISASSOC]++;
1656 break;
1657 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1658 stats->mgmt[MANAGEMENT_AUTH]++;
1659 break;
1660 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1661 stats->mgmt[MANAGEMENT_DEAUTH]++;
1662 break;
1663 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1664 stats->mgmt[MANAGEMENT_ACTION]++;
1665 break;
1666 }
1667 } else if (ieee80211_is_ctl(fc)) {
1668 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1669 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1670 stats->ctrl[CONTROL_BACK_REQ]++;
1671 break;
1672 case cpu_to_le16(IEEE80211_STYPE_BACK):
1673 stats->ctrl[CONTROL_BACK]++;
1674 break;
1675 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1676 stats->ctrl[CONTROL_PSPOLL]++;
1677 break;
1678 case cpu_to_le16(IEEE80211_STYPE_RTS):
1679 stats->ctrl[CONTROL_RTS]++;
1680 break;
1681 case cpu_to_le16(IEEE80211_STYPE_CTS):
1682 stats->ctrl[CONTROL_CTS]++;
1683 break;
1684 case cpu_to_le16(IEEE80211_STYPE_ACK):
1685 stats->ctrl[CONTROL_ACK]++;
1686 break;
1687 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1688 stats->ctrl[CONTROL_CFEND]++;
1689 break;
1690 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1691 stats->ctrl[CONTROL_CFENDACK]++;
1692 break;
1693 }
1694 } else {
1695 /* data */
1696 stats->data_cnt++;
1697 stats->data_bytes += len;
1698 }
1699}
20594eb0
WYG		 1700#endif
1701
a93e7973 1702static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 1703{
1704 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1705 return;
1706
246ed355 1707 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 1708 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1709 return;
1710 }
1711 /*
1712 * There is no easy and better way to force reset the radio,
1713 * the only known method is switching channel which will force to
1714 * reset and tune the radio.
1715 * Use internal short scan (single channel) operation to should
1716 * achieve this objective.
1717 * Driver should reset the radio when number of consecutive missed
1718 * beacon, or any other uCode error condition detected.
1719 */
1720 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1721 iwl_internal_short_hw_scan(priv);
afbdd69a 1722}
a93e7973 1723
a93e7973 1724
c04f9f22 1725int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 1726{
8a472da4
WYG		 1727 struct iwl_force_reset *force_reset;
1728
a93e7973
WYG		 1729 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1730 return -EINVAL;
1731
8a472da4
WYG		 1732 if (mode >= IWL_MAX_FORCE_RESET) {
1733 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1734 return -EINVAL;
1735 }
1736 force_reset = &priv->force_reset[mode];
1737 force_reset->reset_request_count++;
c04f9f22
WYG		 1738 if (!external) {
1739 if (force_reset->last_force_reset_jiffies &&
1740 time_after(force_reset->last_force_reset_jiffies +
1741 force_reset->reset_duration, jiffies)) {
1742 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1743 force_reset->reset_reject_count++;
1744 return -EAGAIN;
1745 }
a93e7973 1746 }
8a472da4
WYG		 1747 force_reset->reset_success_count++;
1748 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 1749 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 1750 switch (mode) {
1751 case IWL_RF_RESET:
1752 iwl_force_rf_reset(priv);
1753 break;
1754 case IWL_FW_RESET:
c04f9f22
WYG		 1755 /*
1756 * if the request is from external(ex: debugfs),
1757 * then always perform the request in regardless the module
1758 * parameter setting
1759 * if the request is from internal (uCode error or driver
1760 * detect failure), then fw_restart module parameter
1761 * need to be check before performing firmware reload
1762 */
1763 if (!external && !priv->cfg->mod_params->restart_fw) {
1764 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1765 "module parameter setting\n");
1766 break;
1767 }
a93e7973 1768 IWL_ERR(priv, "On demand firmware reload\n");
e649437f 1769 iwlagn_fw_error(priv, true);
a93e7973 1770 break;
a93e7973 1771 }
a93e7973
WYG		 1772 return 0;
1773}
b74e31a9 1774
d4daaea6
JB		 1775int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1776 enum nl80211_iftype newtype, bool newp2p)
1777{
1778 struct iwl_priv *priv = hw->priv;
1779 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1780 struct iwl_rxon_context *tmp;
1781 u32 interface_modes;
1782 int err;
1783
1784 newtype = ieee80211_iftype_p2p(newtype, newp2p);
1785
1786 mutex_lock(&priv->mutex);
1787
1788 interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
1789
1790 if (!(interface_modes & BIT(newtype))) {
1791 err = -EBUSY;
1792 goto out;
1793 }
1794
1795 if (ctx->exclusive_interface_modes & BIT(newtype)) {
1796 for_each_context(priv, tmp) {
1797 if (ctx == tmp)
1798 continue;
1799
1800 if (!tmp->vif)
1801 continue;
1802
1803 /*
1804 * The current mode switch would be exclusive, but
1805 * another context is active ... refuse the switch.
1806 */
1807 err = -EBUSY;
1808 goto out;
1809 }
1810 }
1811
1812 /* success */
1813 iwl_teardown_interface(priv, vif, true);
1814 vif->type = newtype;
1815 err = iwl_setup_interface(priv, ctx);
1816 WARN_ON(err);
1817 /*
1818 * We've switched internally, but submitting to the
1819 * device may have failed for some reason. Mask this
1820 * error, because otherwise mac80211 will not switch
1821 * (and set the interface type back) and we'll be
1822 * out of sync with it.
1823 */
1824 err = 0;
1825
1826 out:
1827 mutex_unlock(&priv->mutex);
1828 return err;
1829}
d4daaea6 1830
b74e31a9 1831/*
22de94de
SG		 1832 * On every watchdog tick we check (latest) time stamp. If it does not
1833 * change during timeout period and queue is not empty we reset firmware.
b74e31a9 1834 */
b74e31a9
WYG		 1835static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
1836{
22de94de
SG		 1837 struct iwl_tx_queue *txq = &priv->txq[cnt];
1838 struct iwl_queue *q = &txq->q;
1839 unsigned long timeout;
1840 int ret;
b74e31a9 1841
22de94de
SG		 1842 if (q->read_ptr == q->write_ptr) {
1843 txq->time_stamp = jiffies;
7cb1b088 1844 return 0;
22de94de 1845 }
7cb1b088 1846
22de94de
SG		 1847 timeout = txq->time_stamp +
1848 msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
1849
1850 if (time_after(jiffies, timeout)) {
1851 IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
1852 q->id, priv->cfg->base_params->wd_timeout);
1853 ret = iwl_force_reset(priv, IWL_FW_RESET, false);
1854 return (ret == -EAGAIN) ? 0 : 1;
b74e31a9 1855 }
22de94de 1856
b74e31a9
WYG		 1857 return 0;
1858}
1859
22de94de
SG		 1860/*
1861 * Making watchdog tick be a quarter of timeout assure we will
1862 * discover the queue hung between timeout and 1.25*timeout
1863 */
1864#define IWL_WD_TICK(timeout) ((timeout) / 4)
1865
1866/*
1867 * Watchdog timer callback, we check each tx queue for stuck, if if hung
1868 * we reset the firmware. If everything is fine just rearm the timer.
1869 */
1870void iwl_bg_watchdog(unsigned long data)
b74e31a9
WYG		 1871{
1872 struct iwl_priv *priv = (struct iwl_priv *)data;
1873 int cnt;
22de94de 1874 unsigned long timeout;
b74e31a9
WYG		 1875
1876 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1877 return;
1878
22de94de
SG		 1879 timeout = priv->cfg->base_params->wd_timeout;
1880 if (timeout == 0)
1881 return;
1882
b74e31a9 1883 /* monitor and check for stuck cmd queue */
13bb9483 1884 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG		 1885 return;
1886
1887 /* monitor and check for other stuck queues */
246ed355 1888 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG		 1889 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
1890 /* skip as we already checked the command queue */
13bb9483 1891 if (cnt == priv->cmd_queue)
b74e31a9
WYG		 1892 continue;
1893 if (iwl_check_stuck_queue(priv, cnt))
1894 return;
1895 }
1896 }
22de94de
SG		 1897
1898 mod_timer(&priv->watchdog, jiffies +
1899 msecs_to_jiffies(IWL_WD_TICK(timeout)));
b74e31a9 1900}
22de94de
SG		 1901
1902void iwl_setup_watchdog(struct iwl_priv *priv)
1903{
1904 unsigned int timeout = priv->cfg->base_params->wd_timeout;
afbdd69a 1905
22de94de
SG		 1906 if (timeout)
1907 mod_timer(&priv->watchdog,
1908 jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
1909 else
1910 del_timer(&priv->watchdog);
1911}
a0ee74cf
WYG		 1912
1913/*
1914 * extended beacon time format
1915 * time in usec will be changed into a 32-bit value in extended:internal format
1916 * the extended part is the beacon counts
1917 * the internal part is the time in usec within one beacon interval
1918 */
1919u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1920{
1921 u32 quot;
1922 u32 rem;
1923 u32 interval = beacon_interval * TIME_UNIT;
1924
1925 if (!interval || !usec)
1926 return 0;
1927
1928 quot = (usec / interval) &
1929 (iwl_beacon_time_mask_high(priv,
1930 priv->hw_params.beacon_time_tsf_bits) >>
1931 priv->hw_params.beacon_time_tsf_bits);
1932 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
1933 priv->hw_params.beacon_time_tsf_bits);
1934
1935 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
1936}
a0ee74cf
WYG		 1937
1938/* base is usually what we get from ucode with each received frame,
1939 * the same as HW timer counter counting down
1940 */
1941__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1942 u32 addon, u32 beacon_interval)
1943{
1944 u32 base_low = base & iwl_beacon_time_mask_low(priv,
1945 priv->hw_params.beacon_time_tsf_bits);
1946 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
1947 priv->hw_params.beacon_time_tsf_bits);
1948 u32 interval = beacon_interval * TIME_UNIT;
1949 u32 res = (base & iwl_beacon_time_mask_high(priv,
1950 priv->hw_params.beacon_time_tsf_bits)) +
1951 (addon & iwl_beacon_time_mask_high(priv,
1952 priv->hw_params.beacon_time_tsf_bits));
1953
1954 if (base_low > addon_low)
1955 res += base_low - addon_low;
1956 else if (base_low < addon_low) {
1957 res += interval + base_low - addon_low;
1958 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1959 } else
1960 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1961
1962 return cpu_to_le32(res);
1963}
a0ee74cf 1964
6da3a13e
WYG		 1965#ifdef CONFIG_PM
1966
f60dc013 1967int iwl_pci_suspend(struct device *device)
6da3a13e 1968{
f60dc013 1969 struct pci_dev *pdev = to_pci_dev(device);
6da3a13e
WYG		 1970 struct iwl_priv *priv = pci_get_drvdata(pdev);
1971
1972 /*
1973 * This function is called when system goes into suspend state
1974 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
1975 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1976 * it will not call apm_ops.stop() to stop the DMA operation.
1977 * Calling apm_ops.stop here to make sure we stop the DMA.
1978 */
14e8e4af 1979 iwl_apm_stop(priv);
6da3a13e 1980
6da3a13e
WYG		 1981 return 0;
1982}
6da3a13e 1983
f60dc013 1984int iwl_pci_resume(struct device *device)
6da3a13e 1985{
f60dc013 1986 struct pci_dev *pdev = to_pci_dev(device);
6da3a13e 1987 struct iwl_priv *priv = pci_get_drvdata(pdev);
0ab84cff 1988 bool hw_rfkill = false;
6da3a13e 1989
cd398c31
AK		 1990 /*
1991 * We disable the RETRY_TIMEOUT register (0x41) to keep
1992 * PCI Tx retries from interfering with C3 CPU state.
1993 */
1994 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
1995
6da3a13e
WYG		 1996 iwl_enable_interrupts(priv);
1997
0ab84cff
JB		 1998 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1999 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2000 hw_rfkill = true;
2001
2002 if (hw_rfkill)
2003 set_bit(STATUS_RF_KILL_HW, &priv->status);
2004 else
2005 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2006
2007 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2008
6da3a13e
WYG		 2009 return 0;
2010}
6da3a13e 2011
f60dc013
JL		 2012const struct dev_pm_ops iwl_pm_ops = {
2013 .suspend = iwl_pci_suspend,
2014 .resume = iwl_pci_resume,
2015 .freeze = iwl_pci_suspend,
2016 .thaw = iwl_pci_resume,
2017 .poweroff = iwl_pci_suspend,
2018 .restore = iwl_pci_resume,
2019};
f60dc013 2020
6da3a13e 2021#endif /* CONFIG_PM */
Linux kernel - Deliverables
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