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iwlwifi: manage IBSS station properly
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
1d0a082d 33#include <net/mac80211.h>
df48c323 34
6bc913bd 35#include "iwl-eeprom.h"
3e0d4cb1 36#include "iwl-dev.h" /* FIXME: remove */
19335774 37#include "iwl-debug.h"
df48c323 38#include "iwl-core.h"
b661c819 39#include "iwl-io.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
ef850d7c 42#include "iwl-helpers.h"
df48c323 43
1d0a082d 44
df48c323
TW		 45MODULE_DESCRIPTION("iwl core");
46MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 47MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 48MODULE_LICENSE("GPL");
df48c323 49
06702a73
WYG		 50/*
51 * set bt_coex_active to true, uCode will do kill/defer
52 * every time the priority line is asserted (BT is sending signals on the
53 * priority line in the PCIx).
54 * set bt_coex_active to false, uCode will ignore the BT activity and
55 * perform the normal operation
56 *
57 * User might experience transmit issue on some platform due to WiFi/BT
58 * co-exist problem. The possible behaviors are:
59 * Able to scan and finding all the available AP
60 * Not able to associate with any AP
61 * On those platforms, WiFi communication can be restored by set
62 * "bt_coex_active" module parameter to "false"
63 *
64 * default: bt_coex_active = true (BT_COEX_ENABLE)
65 */
66static bool bt_coex_active = true;
67module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 68MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 69
c7de35cd
RR		 70#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
71 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
72 IWL_RATE_SISO_##s##M_PLCP, \
73 IWL_RATE_MIMO2_##s##M_PLCP,\
74 IWL_RATE_MIMO3_##s##M_PLCP,\
75 IWL_RATE_##r##M_IEEE, \
76 IWL_RATE_##ip##M_INDEX, \
77 IWL_RATE_##in##M_INDEX, \
78 IWL_RATE_##rp##M_INDEX, \
79 IWL_RATE_##rn##M_INDEX, \
80 IWL_RATE_##pp##M_INDEX, \
81 IWL_RATE_##np##M_INDEX }
82
a562a9dd
RC		 83u32 iwl_debug_level;
84EXPORT_SYMBOL(iwl_debug_level);
85
c7de35cd
RR		 86/*
87 * Parameter order:
88 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
89 *
90 * If there isn't a valid next or previous rate then INV is used which
91 * maps to IWL_RATE_INVALID
92 *
93 */
1826dcc0 94const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 95 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
96 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
97 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
98 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
99 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
100 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
101 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
102 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
103 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
104 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
105 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
106 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
107 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
108 /* FIXME:RS: ^^ should be INV (legacy) */
109};
1826dcc0 110EXPORT_SYMBOL(iwl_rates);
c7de35cd 111
e7d326ac
TW		 112int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
113{
114 int idx = 0;
115
116 /* HT rate format */
117 if (rate_n_flags & RATE_MCS_HT_MSK) {
118 idx = (rate_n_flags & 0xff);
119
60d32215
DH		 120 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
121 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
122 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 123 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
124
125 idx += IWL_FIRST_OFDM_RATE;
126 /* skip 9M not supported in ht*/
127 if (idx >= IWL_RATE_9M_INDEX)
128 idx += 1;
129 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
130 return idx;
131
132 /* legacy rate format, search for match in table */
133 } else {
134 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
135 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
136 return idx;
137 }
138
139 return -1;
140}
141EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
142
76eff18b
TW		 143u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
144{
145 int i;
146 u8 ind = ant;
147 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
148 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
149 if (priv->hw_params.valid_tx_ant & BIT(ind))
150 return ind;
151 }
152 return ant;
153}
47ff65c4 154EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 155
156const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
157EXPORT_SYMBOL(iwl_bcast_addr);
158
159
1d0a082d
AK		 160/* This function both allocates and initializes hw and priv. */
161struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
162 struct ieee80211_ops *hw_ops)
163{
164 struct iwl_priv *priv;
165
166 /* mac80211 allocates memory for this device instance, including
167 * space for this driver's private structure */
168 struct ieee80211_hw *hw =
169 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
170 if (hw == NULL) {
a3139c59
SO		 171 printk(KERN_ERR "%s: Can not allocate network device\n",
172 cfg->name);
1d0a082d
AK		 173 goto out;
174 }
175
176 priv = hw->priv;
177 priv->hw = hw;
178
179out:
180 return hw;
181}
182EXPORT_SYMBOL(iwl_alloc_all);
183
b661c819
TW		 184void iwl_hw_detect(struct iwl_priv *priv)
185{
186 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
187 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
188 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
189}
190EXPORT_SYMBOL(iwl_hw_detect);
191
14d2aac5
AK		 192/*
193 * QoS support
194*/
e61146e3 195static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 196{
197 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
198 return;
199
200 priv->qos_data.def_qos_parm.qos_flags = 0;
201
14d2aac5
AK		 202 if (priv->qos_data.qos_active)
203 priv->qos_data.def_qos_parm.qos_flags |=
204 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
205
206 if (priv->current_ht_config.is_ht)
207 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
208
e61146e3
SG		 209 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
210 priv->qos_data.qos_active,
211 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 212
e61146e3
SG		 213 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
214 sizeof(struct iwl_qosparam_cmd),
215 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 216}
c7de35cd 217
d9fe60de
JB		 218#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
219#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 220static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 221 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 222 enum ieee80211_band band)
223{
39130df3
RR		 224 u16 max_bit_rate = 0;
225 u8 rx_chains_num = priv->hw_params.rx_chains_num;
226 u8 tx_chains_num = priv->hw_params.tx_chains_num;
227
c7de35cd 228 ht_info->cap = 0;
d9fe60de 229 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 230
d9fe60de 231 ht_info->ht_supported = true;
c7de35cd 232
b261793d
DH		 233 if (priv->cfg->ht_greenfield_support)
234 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 235 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 236 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 237 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 238 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
239 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
240 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 241 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 242 }
c7de35cd
RR		 243
244 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 245 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 246
247 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
248 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
249
d9fe60de 250 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 251 if (rx_chains_num >= 2)
d9fe60de 252 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 253 if (rx_chains_num >= 3)
d9fe60de 254 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 255
256 /* Highest supported Rx data rate */
257 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 258 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
259 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 260
261 /* Tx MCS capabilities */
d9fe60de 262 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 263 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 264 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
265 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
266 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 267 }
c7de35cd 268}
c7de35cd 269
c7de35cd
RR		 270/**
271 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
272 */
534166de 273int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 274{
275 struct iwl_channel_info *ch;
276 struct ieee80211_supported_band *sband;
277 struct ieee80211_channel *channels;
278 struct ieee80211_channel *geo_ch;
279 struct ieee80211_rate *rates;
280 int i = 0;
281
282 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
283 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 284 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 285 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
286 return 0;
287 }
288
289 channels = kzalloc(sizeof(struct ieee80211_channel) *
290 priv->channel_count, GFP_KERNEL);
291 if (!channels)
292 return -ENOMEM;
293
5027309b 294 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 295 GFP_KERNEL);
296 if (!rates) {
297 kfree(channels);
298 return -ENOMEM;
299 }
300
301 /* 5.2GHz channels start after the 2.4GHz channels */
302 sband = &priv->bands[IEEE80211_BAND_5GHZ];
303 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
304 /* just OFDM */
305 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 306 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 307
49779293 308 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 309 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 310 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 311
312 sband = &priv->bands[IEEE80211_BAND_2GHZ];
313 sband->channels = channels;
314 /* OFDM & CCK */
315 sband->bitrates = rates;
5027309b 316 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 317
49779293 318 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 319 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 320 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 321
322 priv->ieee_channels = channels;
323 priv->ieee_rates = rates;
324
c7de35cd
RR		 325 for (i = 0; i < priv->channel_count; i++) {
326 ch = &priv->channel_info[i];
327
328 /* FIXME: might be removed if scan is OK */
329 if (!is_channel_valid(ch))
330 continue;
331
332 if (is_channel_a_band(ch))
333 sband = &priv->bands[IEEE80211_BAND_5GHZ];
334 else
335 sband = &priv->bands[IEEE80211_BAND_2GHZ];
336
337 geo_ch = &sband->channels[sband->n_channels++];
338
339 geo_ch->center_freq =
340 ieee80211_channel_to_frequency(ch->channel);
341 geo_ch->max_power = ch->max_power_avg;
342 geo_ch->max_antenna_gain = 0xff;
343 geo_ch->hw_value = ch->channel;
344
345 if (is_channel_valid(ch)) {
346 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
347 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
348
349 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
350 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
351
352 if (ch->flags & EEPROM_CHANNEL_RADAR)
353 geo_ch->flags |= IEEE80211_CHAN_RADAR;
354
7aafef1c 355 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 356
dc1b0973
WYG		 357 if (ch->max_power_avg > priv->tx_power_device_lmt)
358 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 359 } else {
360 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
361 }
362
e1623446 363 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 364 ch->channel, geo_ch->center_freq,
365 is_channel_a_band(ch) ? "5.2" : "2.4",
366 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
367 "restricted" : "valid",
368 geo_ch->flags);
369 }
370
371 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
372 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 373 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
374 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 375 priv->pci_dev->device,
376 priv->pci_dev->subsystem_device);
c7de35cd
RR		 377 priv->cfg->sku &= ~IWL_SKU_A;
378 }
379
978785a3 380 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 381 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
382 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 383
384 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
385
386 return 0;
387}
534166de 388EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 389
390/*
391 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
392 */
534166de 393void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 394{
395 kfree(priv->ieee_channels);
396 kfree(priv->ieee_rates);
397 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
398}
534166de 399EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 400
37dc70fe
AK		 401/*
402 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
403 * function.
404 */
405void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
406 __le32 *tx_flags)
407{
408 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
409 *tx_flags |= TX_CMD_FLG_RTS_MSK;
410 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
411 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
412 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
413 *tx_flags |= TX_CMD_FLG_CTS_MSK;
414 }
415}
416EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
417
28a6b07a 418static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 419{
ba37a3d0 420 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 421 priv->current_ht_config.single_chain_sufficient;
c7de35cd 422}
963f5517 423
47c5196e
TW		 424static u8 iwl_is_channel_extension(struct iwl_priv *priv,
425 enum ieee80211_band band,
426 u16 channel, u8 extension_chan_offset)
427{
428 const struct iwl_channel_info *ch_info;
429
430 ch_info = iwl_get_channel_info(priv, band, channel);
431 if (!is_channel_valid(ch_info))
432 return 0;
433
d9fe60de 434 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 435 return !(ch_info->ht40_extension_channel &
689da1b3 436 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 437 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 438 return !(ch_info->ht40_extension_channel &
689da1b3 439 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 440
441 return 0;
442}
443
7aafef1c 444u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 445 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 446{
fad95bf5 447 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 448
fad95bf5 449 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 450 return 0;
451
a2b0f02e
WYG		 452 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
453 * the bit will not set if it is pure 40MHz case
454 */
47c5196e 455 if (sta_ht_inf) {
a2b0f02e 456 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 457 return 0;
458 }
1e4247d4
WYG		 459#ifdef CONFIG_IWLWIFI_DEBUG
460 if (priv->disable_ht40)
461 return 0;
462#endif
611d3eb7
WYG		 463 return iwl_is_channel_extension(priv, priv->band,
464 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 465 ht_conf->extension_chan_offset);
47c5196e 466}
7aafef1c 467EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 468
2c2f3b33
TW		 469static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
470{
471 u16 new_val = 0;
472 u16 beacon_factor = 0;
473
474 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
475 new_val = beacon_val / beacon_factor;
476
477 if (!new_val)
478 new_val = max_beacon_val;
479
480 return new_val;
481}
482
483void iwl_setup_rxon_timing(struct iwl_priv *priv)
484{
485 u64 tsf;
486 s32 interval_tm, rem;
487 unsigned long flags;
488 struct ieee80211_conf *conf = NULL;
489 u16 beacon_int;
490
491 conf = ieee80211_get_hw_conf(priv->hw);
492
493 spin_lock_irqsave(&priv->lock, flags);
494 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
495 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
496
497 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
498 beacon_int = priv->beacon_int;
499 priv->rxon_timing.atim_window = 0;
500 } else {
501 beacon_int = priv->vif->bss_conf.beacon_int;
502
503 /* TODO: we need to get atim_window from upper stack
504 * for now we set to 0 */
505 priv->rxon_timing.atim_window = 0;
506 }
507
508 beacon_int = iwl_adjust_beacon_interval(beacon_int,
509 priv->hw_params.max_beacon_itrvl * 1024);
510 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
511
512 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
513 interval_tm = beacon_int * 1024;
514 rem = do_div(tsf, interval_tm);
515 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
516
517 spin_unlock_irqrestore(&priv->lock, flags);
518 IWL_DEBUG_ASSOC(priv,
519 "beacon interval %d beacon timer %d beacon tim %d\n",
520 le16_to_cpu(priv->rxon_timing.beacon_interval),
521 le32_to_cpu(priv->rxon_timing.beacon_init_val),
522 le16_to_cpu(priv->rxon_timing.atim_window));
523}
524EXPORT_SYMBOL(iwl_setup_rxon_timing);
525
8ccde88a
SO		 526void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
527{
528 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
529
530 if (hw_decrypt)
531 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
532 else
533 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
534
535}
536EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
537
538/**
539 * iwl_check_rxon_cmd - validate RXON structure is valid
540 *
541 * NOTE: This is really only useful during development and can eventually
542 * be #ifdef'd out once the driver is stable and folks aren't actively
543 * making changes
544 */
545int iwl_check_rxon_cmd(struct iwl_priv *priv)
546{
547 int error = 0;
548 int counter = 1;
549 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
550
551 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
552 error |= le32_to_cpu(rxon->flags &
553 (RXON_FLG_TGJ_NARROW_BAND_MSK |
554 RXON_FLG_RADAR_DETECT_MSK));
555 if (error)
556 IWL_WARN(priv, "check 24G fields %d | %d\n",
557 counter++, error);
558 } else {
559 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
560 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
561 if (error)
562 IWL_WARN(priv, "check 52 fields %d | %d\n",
563 counter++, error);
564 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
565 if (error)
566 IWL_WARN(priv, "check 52 CCK %d | %d\n",
567 counter++, error);
568 }
569 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
570 if (error)
571 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
572
573 /* make sure basic rates 6Mbps and 1Mbps are supported */
574 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
575 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
576 if (error)
577 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
578
579 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
580 if (error)
581 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
582
583 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
584 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
585 if (error)
586 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
587 counter++, error);
588
589 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
590 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
591 if (error)
592 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
593 counter++, error);
594
595 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
596 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
597 if (error)
598 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
599 counter++, error);
600
601 if (error)
602 IWL_WARN(priv, "Tuning to channel %d\n",
603 le16_to_cpu(rxon->channel));
604
605 if (error) {
606 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
607 return -1;
608 }
609 return 0;
610}
611EXPORT_SYMBOL(iwl_check_rxon_cmd);
612
613/**
614 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
615 * @priv: staging_rxon is compared to active_rxon
616 *
617 * If the RXON structure is changing enough to require a new tune,
618 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
619 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
620 */
621int iwl_full_rxon_required(struct iwl_priv *priv)
622{
623
624 /* These items are only settable from the full RXON command */
625 if (!(iwl_is_associated(priv)) ||
626 compare_ether_addr(priv->staging_rxon.bssid_addr,
627 priv->active_rxon.bssid_addr) ||
628 compare_ether_addr(priv->staging_rxon.node_addr,
629 priv->active_rxon.node_addr) ||
630 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
631 priv->active_rxon.wlap_bssid_addr) ||
632 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
633 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
634 (priv->staging_rxon.air_propagation !=
635 priv->active_rxon.air_propagation) ||
636 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
637 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
638 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
639 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 640 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
641 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 642 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
643 return 1;
644
645 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
646 * be updated with the RXON_ASSOC command -- however only some
647 * flag transitions are allowed using RXON_ASSOC */
648
649 /* Check if we are not switching bands */
650 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
651 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
652 return 1;
653
654 /* Check if we are switching association toggle */
655 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
656 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
657 return 1;
658
659 return 0;
660}
661EXPORT_SYMBOL(iwl_full_rxon_required);
662
663u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
664{
4a02886b
JB		 665 /*
666 * Assign the lowest rate -- should really get this from
667 * the beacon skb from mac80211.
668 */
8ccde88a
SO		 669 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
670 return IWL_RATE_1M_PLCP;
671 else
672 return IWL_RATE_6M_PLCP;
673}
674EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
675
fad95bf5 676void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 677{
c1adf9fb 678 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 679
fad95bf5 680 if (!ht_conf->is_ht) {
a2b0f02e 681 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 682 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 683 RXON_FLG_HT40_PROT_MSK |
42eb7c64 684 RXON_FLG_HT_PROT_MSK);
47c5196e 685 return;
42eb7c64 686 }
47c5196e 687
a2b0f02e
WYG		 688 /* FIXME: if the definition of ht_protection changed, the "translation"
689 * will be needed for rxon->flags
690 */
fad95bf5 691 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 692
693 /* Set up channel bandwidth:
7aafef1c 694 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 695 /* clear the HT channel mode before set the mode */
696 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
697 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 698 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
699 /* pure ht40 */
fad95bf5 700 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 701 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 702 /* Note: control channel is opposite of extension channel */
fad95bf5 703 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 704 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
705 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
706 break;
707 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
708 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
709 break;
710 }
711 } else {
a2b0f02e 712 /* Note: control channel is opposite of extension channel */
fad95bf5 713 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 714 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
715 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
716 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
717 break;
718 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
719 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
720 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
721 break;
722 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
723 default:
724 /* channel location only valid if in Mixed mode */
725 IWL_ERR(priv, "invalid extension channel offset\n");
726 break;
727 }
728 }
729 } else {
730 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 731 }
732
45823531
AK		 733 if (priv->cfg->ops->hcmd->set_rxon_chain)
734 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 735
02bb1bea 736 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 737 "extension channel offset 0x%x\n",
fad95bf5
JB		 738 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
739 ht_conf->extension_chan_offset);
47c5196e
TW		 740 return;
741}
742EXPORT_SYMBOL(iwl_set_rxon_ht);
743
9e5e6c32
TW		 744#define IWL_NUM_RX_CHAINS_MULTIPLE 3
745#define IWL_NUM_RX_CHAINS_SINGLE 2
746#define IWL_NUM_IDLE_CHAINS_DUAL 2
747#define IWL_NUM_IDLE_CHAINS_SINGLE 1
748
2b396a12
JB		 749/*
750 * Determine how many receiver/antenna chains to use.
751 *
752 * More provides better reception via diversity. Fewer saves power
753 * at the expense of throughput, but only when not in powersave to
754 * start with.
755 *
c7de35cd
RR		 756 * MIMO (dual stream) requires at least 2, but works better with 3.
757 * This does not determine *which* chains to use, just how many.
758 */
28a6b07a 759static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 760{
c7de35cd 761 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 762 if (is_single_rx_stream(priv))
9e5e6c32 763 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 764 else
9e5e6c32 765 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 766}
c7de35cd 767
2b396a12 768/*
3f3e0376
WYG		 769 * When we are in power saving mode, unless device support spatial
770 * multiplexing power save, use the active count for rx chain count.
2b396a12 771 */
28a6b07a
TW		 772static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
773{
ba37a3d0
JB		 774 /* # Rx chains when idling, depending on SMPS mode */
775 switch (priv->current_ht_config.smps) {
776 case IEEE80211_SMPS_STATIC:
777 case IEEE80211_SMPS_DYNAMIC:
778 return IWL_NUM_IDLE_CHAINS_SINGLE;
779 case IEEE80211_SMPS_OFF:
780 return active_cnt;
c15d20c1 781 default:
ba37a3d0
JB		 782 WARN(1, "invalid SMPS mode %d",
783 priv->current_ht_config.smps);
784 return active_cnt;
3f3e0376 785 }
c7de35cd
RR		 786}
787
04816448
GE		 788/* up to 4 chains */
789static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
790{
791 u8 res;
792 res = (chain_bitmap & BIT(0)) >> 0;
793 res += (chain_bitmap & BIT(1)) >> 1;
794 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 795 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 796 return res;
797}
798
c7de35cd
RR		 799/**
800 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
801 *
802 * Selects how many and which Rx receivers/antennas/chains to use.
803 * This should not be used for scan command ... it puts data in wrong place.
804 */
805void iwl_set_rxon_chain(struct iwl_priv *priv)
806{
28a6b07a
TW		 807 bool is_single = is_single_rx_stream(priv);
808 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 809 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
810 u32 active_chains;
28a6b07a 811 u16 rx_chain;
c7de35cd
RR		 812
813 /* Tell uCode which antennas are actually connected.
814 * Before first association, we assume all antennas are connected.
815 * Just after first association, iwl_chain_noise_calibration()
816 * checks which antennas actually *are* connected. */
04816448
GE		 817 if (priv->chain_noise_data.active_chains)
818 active_chains = priv->chain_noise_data.active_chains;
819 else
820 active_chains = priv->hw_params.valid_rx_ant;
821
822 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 823
824 /* How many receivers should we use? */
28a6b07a
TW		 825 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
826 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
827
28a6b07a 828
04816448
GE		 829 /* correct rx chain count according hw settings
830 * and chain noise calibration
831 */
832 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
833 if (valid_rx_cnt < active_rx_cnt)
834 active_rx_cnt = valid_rx_cnt;
835
836 if (valid_rx_cnt < idle_rx_cnt)
837 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 838
839 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
840 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
841
842 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
843
9e5e6c32 844 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 845 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
846 else
847 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
848
e1623446 849 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 850 priv->staging_rxon.rx_chain,
851 active_rx_cnt, idle_rx_cnt);
852
853 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
854 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 855}
856EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 857
858/**
17e72782 859 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 860 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
861 * @channel: Any channel valid for the requested phymode
862
863 * In addition to setting the staging RXON, priv->phymode is also set.
864 *
865 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
866 * in the staging RXON flag structure based on the phymode
867 */
17e72782 868int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 869{
17e72782
TW		 870 enum ieee80211_band band = ch->band;
871 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
872
8622e705 873 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 874 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 875 channel, band);
876 return -EINVAL;
877 }
878
879 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
880 (priv->band == band))
881 return 0;
882
883 priv->staging_rxon.channel = cpu_to_le16(channel);
884 if (band == IEEE80211_BAND_5GHZ)
885 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
886 else
887 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
888
889 priv->band = band;
890
e1623446 891 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 892
893 return 0;
894}
c7de35cd 895EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 896
8ccde88a
SO		 897void iwl_set_flags_for_band(struct iwl_priv *priv,
898 enum ieee80211_band band)
899{
900 if (band == IEEE80211_BAND_5GHZ) {
901 priv->staging_rxon.flags &=
902 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
903 | RXON_FLG_CCK_MSK);
904 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
905 } else {
906 /* Copied from iwl_post_associate() */
907 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
908 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
909 else
910 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
911
912 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
913 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
914
915 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
916 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
917 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
918 }
919}
8ccde88a
SO		 920
921/*
922 * initialize rxon structure with default values from eeprom
923 */
924void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
925{
926 const struct iwl_channel_info *ch_info;
927
928 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
929
930 switch (mode) {
931 case NL80211_IFTYPE_AP:
932 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
933 break;
934
935 case NL80211_IFTYPE_STATION:
936 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
937 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
938 break;
939
940 case NL80211_IFTYPE_ADHOC:
941 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
942 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
943 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
944 RXON_FILTER_ACCEPT_GRP_MSK;
945 break;
946
8ccde88a
SO		 947 default:
948 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
949 break;
950 }
951
952#if 0
953 /* TODO: Figure out when short_preamble would be set and cache from
954 * that */
955 if (!hw_to_local(priv->hw)->short_preamble)
956 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
957 else
958 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
959#endif
960
961 ch_info = iwl_get_channel_info(priv, priv->band,
962 le16_to_cpu(priv->active_rxon.channel));
963
964 if (!ch_info)
965 ch_info = &priv->channel_info[0];
966
8ccde88a
SO		 967 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
968 priv->band = ch_info->band;
969
970 iwl_set_flags_for_band(priv, priv->band);
971
972 priv->staging_rxon.ofdm_basic_rates =
973 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
974 priv->staging_rxon.cck_basic_rates =
975 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
976
a2b0f02e
WYG		 977 /* clear both MIX and PURE40 mode flag */
978 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
979 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 980 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
981 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
982 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
983 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 984 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 985}
986EXPORT_SYMBOL(iwl_connection_init_rx_config);
987
782571f4 988static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 989{
990 const struct ieee80211_supported_band *hw = NULL;
991 struct ieee80211_rate *rate;
992 int i;
993
994 hw = iwl_get_hw_mode(priv, priv->band);
995 if (!hw) {
996 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
997 return;
998 }
999
1000 priv->active_rate = 0;
8ccde88a
SO		 1001
1002 for (i = 0; i < hw->n_bitrates; i++) {
1003 rate = &(hw->bitrates[i]);
5027309b 1004 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1005 priv->active_rate |= (1 << rate->hw_value);
1006 }
1007
4a02886b 1008 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1009
4a02886b
JB		 1010 priv->staging_rxon.cck_basic_rates =
1011 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1012
1013 priv->staging_rxon.ofdm_basic_rates =
1014 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1015}
8ccde88a
SO		 1016
1017void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1018{
2f301227 1019 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1020 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1021 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1022
0924e519
WYG		 1023 if (priv->switch_rxon.switch_in_progress) {
1024 if (!le32_to_cpu(csa->status) &&
1025 (csa->channel == priv->switch_rxon.channel)) {
1026 rxon->channel = csa->channel;
1027 priv->staging_rxon.channel = csa->channel;
1028 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1029 le16_to_cpu(csa->channel));
1030 } else
1031 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1032 le16_to_cpu(csa->channel));
1033
1034 priv->switch_rxon.switch_in_progress = false;
1035 }
8ccde88a
SO		 1036}
1037EXPORT_SYMBOL(iwl_rx_csa);
1038
1039#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1040void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1041{
1042 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1043
e1623446 1044 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1045 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1046 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1047 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1048 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1049 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1050 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1051 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1052 rxon->ofdm_basic_rates);
e1623446
TW		 1053 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1054 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1055 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1056 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1057}
a643565e 1058EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1059#endif
8ccde88a
SO		 1060/**
1061 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1062 */
1063void iwl_irq_handle_error(struct iwl_priv *priv)
1064{
1065 /* Set the FW error flag -- cleared on iwl_down */
1066 set_bit(STATUS_FW_ERROR, &priv->status);
1067
1068 /* Cancel currently queued command. */
1069 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1070
459bc732
SZ		 1071 IWL_ERR(priv, "Loaded firmware version: %s\n",
1072 priv->hw->wiphy->fw_version);
1073
3a3ff72c 1074 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1075 if (priv->cfg->ops->lib->dump_csr)
1076 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1077 if (priv->cfg->ops->lib->dump_fh)
1078 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1079 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1080#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1081 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1082 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1083#endif
1084
1085 wake_up_interruptible(&priv->wait_command_queue);
1086
1087 /* Keep the restart process from trying to send host
1088 * commands by clearing the INIT status bit */
1089 clear_bit(STATUS_READY, &priv->status);
1090
1091 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1092 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1093 "Restarting adapter due to uCode error.\n");
1094
8ccde88a
SO		 1095 if (priv->cfg->mod_params->restart_fw)
1096 queue_work(priv->workqueue, &priv->restart);
1097 }
1098}
1099EXPORT_SYMBOL(iwl_irq_handle_error);
1100
f8e200de 1101static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1102{
5220af0c 1103 int ret = 0;
d68b603c 1104
5220af0c 1105 /* stop device's busmaster DMA activity */
d68b603c
AK		 1106 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1107
5220af0c 1108 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1109 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1110 if (ret)
1111 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1112
d68b603c
AK		 1113 IWL_DEBUG_INFO(priv, "stop master\n");
1114
5220af0c 1115 return ret;
d68b603c 1116}
d68b603c
AK		 1117
1118void iwl_apm_stop(struct iwl_priv *priv)
1119{
fadb3582
BC		 1120 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1121
5220af0c 1122 /* Stop device's DMA activity */
d68b603c
AK		 1123 iwl_apm_stop_master(priv);
1124
5220af0c 1125 /* Reset the entire device */
d68b603c
AK		 1126 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1127
1128 udelay(10);
5220af0c
BC		 1129
1130 /*
1131 * Clear "initialization complete" bit to move adapter from
1132 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1133 */
d68b603c 1134 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1135}
1136EXPORT_SYMBOL(iwl_apm_stop);
1137
fadb3582
BC		 1138
1139/*
1140 * Start up NIC's basic functionality after it has been reset
1141 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1142 * NOTE: This does not load uCode nor start the embedded processor
1143 */
1144int iwl_apm_init(struct iwl_priv *priv)
1145{
1146 int ret = 0;
1147 u16 lctl;
1148
1149 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1150
1151 /*
1152 * Use "set_bit" below rather than "write", to preserve any hardware
1153 * bits already set by default after reset.
1154 */
1155
1156 /* Disable L0S exit timer (platform NMI Work/Around) */
1157 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1158 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1159
1160 /*
1161 * Disable L0s without affecting L1;
1162 * don't wait for ICH L0s (ICH bug W/A)
1163 */
1164 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1165 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1166
1167 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1168 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1169
1170 /*
1171 * Enable HAP INTA (interrupt from management bus) to
1172 * wake device's PCI Express link L1a -> L0s
1173 * NOTE: This is no-op for 3945 (non-existant bit)
1174 */
1175 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1176 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1177
1178 /*
a6c5c731
BC		 1179 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1180 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1181 * If so (likely), disable L0S, so device moves directly L0->L1;
1182 * costs negligible amount of power savings.
1183 * If not (unlikely), enable L0S, so there is at least some
1184 * power savings, even without L1.
fadb3582
BC		 1185 */
1186 if (priv->cfg->set_l0s) {
1187 lctl = iwl_pcie_link_ctl(priv);
1188 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1189 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1190 /* L1-ASPM enabled; disable(!) L0S */
1191 iwl_set_bit(priv, CSR_GIO_REG,
1192 CSR_GIO_REG_VAL_L0S_ENABLED);
1193 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1194 } else {
1195 /* L1-ASPM disabled; enable(!) L0S */
1196 iwl_clear_bit(priv, CSR_GIO_REG,
1197 CSR_GIO_REG_VAL_L0S_ENABLED);
1198 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1199 }
1200 }
1201
1202 /* Configure analog phase-lock-loop before activating to D0A */
1203 if (priv->cfg->pll_cfg_val)
1204 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1205
1206 /*
1207 * Set "initialization complete" bit to move adapter from
1208 * D0U* --> D0A* (powered-up active) state.
1209 */
1210 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1211
1212 /*
1213 * Wait for clock stabilization; once stabilized, access to
1214 * device-internal resources is supported, e.g. iwl_write_prph()
1215 * and accesses to uCode SRAM.
1216 */
1217 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1218 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1219 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1220 if (ret < 0) {
1221 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1222 goto out;
1223 }
1224
1225 /*
1226 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1227 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1228 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1229 * and don't need BSM to restore data after power-saving sleep.
1230 *
1231 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1232 * do not disable clocks. This preserves any hardware bits already
1233 * set by default in "CLK_CTRL_REG" after reset.
1234 */
1235 if (priv->cfg->use_bsm)
1236 iwl_write_prph(priv, APMG_CLK_EN_REG,
1237 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1238 else
1239 iwl_write_prph(priv, APMG_CLK_EN_REG,
1240 APMG_CLK_VAL_DMA_CLK_RQT);
1241 udelay(20);
1242
1243 /* Disable L1-Active */
1244 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1245 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1246
1247out:
1248 return ret;
1249}
1250EXPORT_SYMBOL(iwl_apm_init);
1251
1252
1253
8ccde88a
SO		 1254void iwl_configure_filter(struct ieee80211_hw *hw,
1255 unsigned int changed_flags,
1256 unsigned int *total_flags,
3ac64bee 1257 u64 multicast)
8ccde88a
SO		 1258{
1259 struct iwl_priv *priv = hw->priv;
1260 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1261
e1623446 1262 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1263 changed_flags, *total_flags);
1264
1265 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1266 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1267 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1268 else
1269 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1270 }
1271 if (changed_flags & FIF_ALLMULTI) {
1272 if (*total_flags & FIF_ALLMULTI)
1273 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1274 else
1275 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1276 }
1277 if (changed_flags & FIF_CONTROL) {
1278 if (*total_flags & FIF_CONTROL)
1279 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1280 else
1281 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1282 }
1283 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1284 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1285 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1286 else
1287 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1288 }
1289
1290 /* We avoid iwl_commit_rxon here to commit the new filter flags
1291 * since mac80211 will call ieee80211_hw_config immediately.
1292 * (mc_list is not supported at this time). Otherwise, we need to
1293 * queue a background iwl_commit_rxon work.
1294 */
1295
1296 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1297 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1298}
1299EXPORT_SYMBOL(iwl_configure_filter);
1300
da154e30
RR		 1301int iwl_set_hw_params(struct iwl_priv *priv)
1302{
da154e30
RR		 1303 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1304 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1305 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1306 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1307 else
2f301227 1308 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1309
2c2f3b33
TW		 1310 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1311
49779293
RR		 1312 if (priv->cfg->mod_params->disable_11n)
1313 priv->cfg->sku &= ~IWL_SKU_N;
1314
da154e30
RR		 1315 /* Device-specific setup */
1316 return priv->cfg->ops->lib->set_hw_params(priv);
1317}
1318EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1319
630fe9b6
TW		 1320int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1321{
1322 int ret = 0;
5eadd94b
WYG		 1323 s8 prev_tx_power = priv->tx_power_user_lmt;
1324
b744cb79
WYG		 1325 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1326 IWL_WARN(priv,
1327 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1328 tx_power,
b744cb79 1329 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1330 return -EINVAL;
1331 }
1332
dc1b0973 1333 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1334 IWL_WARN(priv,
1335 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1336 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1337 return -EINVAL;
1338 }
1339
1340 if (priv->tx_power_user_lmt != tx_power)
1341 force = true;
1342
019fb97d 1343 /* if nic is not up don't send command */
5eadd94b
WYG		 1344 if (iwl_is_ready_rf(priv)) {
1345 priv->tx_power_user_lmt = tx_power;
1346 if (force && priv->cfg->ops->lib->send_tx_power)
1347 ret = priv->cfg->ops->lib->send_tx_power(priv);
1348 else if (!priv->cfg->ops->lib->send_tx_power)
1349 ret = -EOPNOTSUPP;
1350 /*
1351 * if fail to set tx_power, restore the orig. tx power
1352 */
1353 if (ret)
1354 priv->tx_power_user_lmt = prev_tx_power;
1355 }
630fe9b6 1356
5eadd94b
WYG		 1357 /*
1358 * Even this is an async host command, the command
1359 * will always report success from uCode
1360 * So once driver can placing the command into the queue
1361 * successfully, driver can use priv->tx_power_user_lmt
1362 * to reflect the current tx power
1363 */
630fe9b6
TW		 1364 return ret;
1365}
1366EXPORT_SYMBOL(iwl_set_tx_power);
1367
ef850d7c 1368irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1369{
1370 struct iwl_priv *priv = data;
1371 u32 inta, inta_mask;
1372 u32 inta_fh;
6e8cc38d 1373 unsigned long flags;
f17d08a6
AK		 1374 if (!priv)
1375 return IRQ_NONE;
1376
6e8cc38d 1377 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1378
1379 /* Disable (but don't clear!) interrupts here to avoid
1380 * back-to-back ISRs and sporadic interrupts from our NIC.
1381 * If we have something to service, the tasklet will re-enable ints.
1382 * If we *don't* have something, we'll re-enable before leaving here. */
1383 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1384 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1385
1386 /* Discover which interrupts are active/pending */
1387 inta = iwl_read32(priv, CSR_INT);
1388 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1389
1390 /* Ignore interrupt if there's nothing in NIC to service.
1391 * This may be due to IRQ shared with another device,
1392 * or due to sporadic interrupts thrown from our NIC. */
1393 if (!inta && !inta_fh) {
1394 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1395 goto none;
1396 }
1397
1398 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1399 /* Hardware disappeared. It might have already raised
1400 * an interrupt */
1401 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1402 goto unplugged;
1403 }
1404
1405 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1406 inta, inta_mask, inta_fh);
1407
1408 inta &= ~CSR_INT_BIT_SCD;
1409
1410 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1411 if (likely(inta || inta_fh))
1412 tasklet_schedule(&priv->irq_tasklet);
1413
1414 unplugged:
6e8cc38d 1415 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1416 return IRQ_HANDLED;
1417
1418 none:
1419 /* re-enable interrupts here since we don't have anything to service. */
1420 /* only Re-enable if diabled by irq */
1421 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1422 iwl_enable_interrupts(priv);
6e8cc38d 1423 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1424 return IRQ_NONE;
1425}
ef850d7c 1426EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1427
65b52bde 1428void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1429{
1430 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1431 .lead_time = BT_LEAD_TIME_DEF,
1432 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1433 .kill_ack_mask = 0,
1434 .kill_cts_mask = 0,
1435 };
1436
06702a73
WYG		 1437 if (!bt_coex_active)
1438 bt_cmd.flags = BT_COEX_DISABLE;
1439 else
1440 bt_cmd.flags = BT_COEX_ENABLE;
1441
1442 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1443 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1444
65b52bde
JB		 1445 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1446 sizeof(struct iwl_bt_cmd), &bt_cmd))
1447 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1448}
1449EXPORT_SYMBOL(iwl_send_bt_config);
1450
ef8d5529 1451int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1452{
ef8d5529
WYG		 1453 struct iwl_statistics_cmd statistics_cmd = {
1454 .configuration_flags =
1455 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1456 };
ef8d5529
WYG		 1457
1458 if (flags & CMD_ASYNC)
1459 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1460 sizeof(struct iwl_statistics_cmd),
1461 &statistics_cmd, NULL);
1462 else
1463 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1464 sizeof(struct iwl_statistics_cmd),
1465 &statistics_cmd);
49ea8596
EG		 1466}
1467EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1468
b0692f2f
EG		 1469/**
1470 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1471 * using sample data 100 bytes apart. If these sample points are good,
1472 * it's a pretty good bet that everything between them is good, too.
1473 */
1474static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1475{
1476 u32 val;
1477 int ret = 0;
1478 u32 errcnt = 0;
1479 u32 i;
1480
e1623446 1481 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1482
b0692f2f
EG		 1483 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1484 /* read data comes through single port, auto-incr addr */
1485 /* NOTE: Use the debugless read so we don't flood kernel log
1486 * if IWL_DL_IO is set */
1487 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1488 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1489 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1490 if (val != le32_to_cpu(*image)) {
1491 ret = -EIO;
1492 errcnt++;
1493 if (errcnt >= 3)
1494 break;
1495 }
1496 }
1497
b0692f2f
EG		 1498 return ret;
1499}
1500
1501/**
1502 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1503 * looking at all data.
1504 */
1505static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1506 u32 len)
1507{
1508 u32 val;
1509 u32 save_len = len;
1510 int ret = 0;
1511 u32 errcnt;
1512
e1623446 1513 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1514
250bdd21
SO		 1515 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1516 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1517
1518 errcnt = 0;
1519 for (; len > 0; len -= sizeof(u32), image++) {
1520 /* read data comes through single port, auto-incr addr */
1521 /* NOTE: Use the debugless read so we don't flood kernel log
1522 * if IWL_DL_IO is set */
1523 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1524 if (val != le32_to_cpu(*image)) {
15b1687c 1525 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1526 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1527 save_len - len, val, le32_to_cpu(*image));
1528 ret = -EIO;
1529 errcnt++;
1530 if (errcnt >= 20)
1531 break;
1532 }
1533 }
1534
b0692f2f 1535 if (!errcnt)
e1623446
TW		 1536 IWL_DEBUG_INFO(priv,
1537 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1538
1539 return ret;
1540}
1541
1542/**
1543 * iwl_verify_ucode - determine which instruction image is in SRAM,
1544 * and verify its contents
1545 */
1546int iwl_verify_ucode(struct iwl_priv *priv)
1547{
1548 __le32 *image;
1549 u32 len;
1550 int ret;
1551
1552 /* Try bootstrap */
1553 image = (__le32 *)priv->ucode_boot.v_addr;
1554 len = priv->ucode_boot.len;
1555 ret = iwlcore_verify_inst_sparse(priv, image, len);
1556 if (!ret) {
e1623446 1557 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1558 return 0;
1559 }
1560
1561 /* Try initialize */
1562 image = (__le32 *)priv->ucode_init.v_addr;
1563 len = priv->ucode_init.len;
1564 ret = iwlcore_verify_inst_sparse(priv, image, len);
1565 if (!ret) {
e1623446 1566 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1567 return 0;
1568 }
1569
1570 /* Try runtime/protocol */
1571 image = (__le32 *)priv->ucode_code.v_addr;
1572 len = priv->ucode_code.len;
1573 ret = iwlcore_verify_inst_sparse(priv, image, len);
1574 if (!ret) {
e1623446 1575 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1576 return 0;
1577 }
1578
15b1687c 1579 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1580
1581 /* Since nothing seems to match, show first several data entries in
1582 * instruction SRAM, so maybe visual inspection will give a clue.
1583 * Selection of bootstrap image (vs. other images) is arbitrary. */
1584 image = (__le32 *)priv->ucode_boot.v_addr;
1585 len = priv->ucode_boot.len;
1586 ret = iwl_verify_inst_full(priv, image, len);
1587
1588 return ret;
1589}
1590EXPORT_SYMBOL(iwl_verify_ucode);
1591
56e12615 1592
47f4a587
EG		 1593void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1594{
1595 struct iwl_ct_kill_config cmd;
672639de 1596 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1597 unsigned long flags;
1598 int ret = 0;
1599
1600 spin_lock_irqsave(&priv->lock, flags);
1601 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1602 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1603 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1604 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1605
480e8407 1606 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1607 adv_cmd.critical_temperature_enter =
1608 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1609 adv_cmd.critical_temperature_exit =
1610 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1611
1612 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1613 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1614 if (ret)
1615 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1616 else
1617 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1618 "succeeded, "
1619 "critical temperature enter is %d,"
1620 "exit is %d\n",
1621 priv->hw_params.ct_kill_threshold,
1622 priv->hw_params.ct_kill_exit_threshold);
480e8407 1623 } else {
672639de
WYG		 1624 cmd.critical_temperature_R =
1625 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1626
672639de
WYG		 1627 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1628 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1629 if (ret)
1630 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1631 else
1632 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1633 "succeeded, "
1634 "critical temperature is %d\n",
1635 priv->hw_params.ct_kill_threshold);
672639de 1636 }
47f4a587
EG		 1637}
1638EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1639
0ad91a35 1640
14a08a7f
EG		 1641/*
1642 * CARD_STATE_CMD
1643 *
1644 * Use: Sets the device's internal card state to enable, disable, or halt
1645 *
1646 * When in the 'enable' state the card operates as normal.
1647 * When in the 'disable' state, the card enters into a low power mode.
1648 * When in the 'halt' state, the card is shut down and must be fully
1649 * restarted to come back on.
1650 */
c496294e 1651int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1652{
1653 struct iwl_host_cmd cmd = {
1654 .id = REPLY_CARD_STATE_CMD,
1655 .len = sizeof(u32),
1656 .data = &flags,
c2acea8e 1657 .flags = meta_flag,
14a08a7f
EG		 1658 };
1659
1660 return iwl_send_cmd(priv, &cmd);
1661}
1662
030f05ed
AK		 1663void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1664 struct iwl_rx_mem_buffer *rxb)
1665{
1666#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1667 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1668 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1669 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1670 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1671#endif
1672}
1673EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1674
1675void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1676 struct iwl_rx_mem_buffer *rxb)
1677{
2f301227 1678 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1679 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1680 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1681 "notification for %s:\n", len,
1682 get_cmd_string(pkt->hdr.cmd));
1683 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1684}
1685EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1686
1687void iwl_rx_reply_error(struct iwl_priv *priv,
1688 struct iwl_rx_mem_buffer *rxb)
1689{
2f301227 1690 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1691
1692 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1693 "seq 0x%04X ser 0x%08X\n",
1694 le32_to_cpu(pkt->u.err_resp.error_type),
1695 get_cmd_string(pkt->u.err_resp.cmd_id),
1696 pkt->u.err_resp.cmd_id,
1697 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1698 le32_to_cpu(pkt->u.err_resp.error_info));
1699}
1700EXPORT_SYMBOL(iwl_rx_reply_error);
1701
a83b9141
WYG		 1702void iwl_clear_isr_stats(struct iwl_priv *priv)
1703{
1704 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1705}
a83b9141 1706
488829f1
AK		 1707int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1708 const struct ieee80211_tx_queue_params *params)
1709{
1710 struct iwl_priv *priv = hw->priv;
1711 unsigned long flags;
1712 int q;
1713
1714 IWL_DEBUG_MAC80211(priv, "enter\n");
1715
1716 if (!iwl_is_ready_rf(priv)) {
1717 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1718 return -EIO;
1719 }
1720
1721 if (queue >= AC_NUM) {
1722 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1723 return 0;
1724 }
1725
1726 q = AC_NUM - 1 - queue;
1727
1728 spin_lock_irqsave(&priv->lock, flags);
1729
1730 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1731 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1732 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1733 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1734 cpu_to_le16((params->txop * 32));
1735
1736 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1737
1738 spin_unlock_irqrestore(&priv->lock, flags);
1739
1740 IWL_DEBUG_MAC80211(priv, "leave\n");
1741 return 0;
1742}
1743EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1744
1745static void iwl_ht_conf(struct iwl_priv *priv,
02bb1bea 1746 struct ieee80211_bss_conf *bss_conf)
5bbe233b 1747{
fad95bf5 1748 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b
AK		 1749 struct ieee80211_sta *sta;
1750
91dd6c27 1751 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1752
fad95bf5 1753 if (!ht_conf->is_ht)
5bbe233b
AK		 1754 return;
1755
fad95bf5 1756 ht_conf->ht_protection =
9ed6bcce 1757 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1758 ht_conf->non_GF_STA_present =
9ed6bcce 1759 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1760
02bb1bea
JB		 1761 ht_conf->single_chain_sufficient = false;
1762
1763 switch (priv->iw_mode) {
1764 case NL80211_IFTYPE_STATION:
1765 rcu_read_lock();
5ed176e1 1766 sta = ieee80211_find_sta(priv->vif, priv->bssid);
02bb1bea
JB		 1767 if (sta) {
1768 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1769 int maxstreams;
1770
1771 maxstreams = (ht_cap->mcs.tx_params &
1772 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1773 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1774 maxstreams += 1;
1775
1776 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1777 (ht_cap->mcs.rx_mask[2] == 0))
1778 ht_conf->single_chain_sufficient = true;
1779 if (maxstreams <= 1)
1780 ht_conf->single_chain_sufficient = true;
1781 } else {
1782 /*
1783 * If at all, this can only happen through a race
1784 * when the AP disconnects us while we're still
1785 * setting up the connection, in that case mac80211
1786 * will soon tell us about that.
1787 */
1788 ht_conf->single_chain_sufficient = true;
1789 }
1790 rcu_read_unlock();
1791 break;
1792 case NL80211_IFTYPE_ADHOC:
1793 ht_conf->single_chain_sufficient = true;
1794 break;
1795 default:
1796 break;
1797 }
5bbe233b
AK		 1798
1799 IWL_DEBUG_MAC80211(priv, "leave\n");
1800}
1801
c91c3efc
AK		 1802static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1803{
1804 priv->assoc_id = 0;
1805 iwl_led_disassociate(priv);
1806 /*
1807 * inform the ucode that there is no longer an
1808 * association and that no more packets should be
1809 * sent
1810 */
1811 priv->staging_rxon.filter_flags &=
1812 ~RXON_FILTER_ASSOC_MSK;
1813 priv->staging_rxon.assoc_id = 0;
1814 iwlcore_commit_rxon(priv);
1815}
1816
5bbe233b 1817void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1818 struct ieee80211_vif *vif,
1819 struct ieee80211_bss_conf *bss_conf,
1820 u32 changes)
5bbe233b
AK		 1821{
1822 struct iwl_priv *priv = hw->priv;
3a650292 1823 int ret;
5bbe233b
AK		 1824
1825 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1826
2d0ddec5
JB		 1827 if (!iwl_is_alive(priv))
1828 return;
1829
1830 mutex_lock(&priv->mutex);
1831
92445c95 1832 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1833 dev_kfree_skb(priv->ibss_beacon);
1834 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1835 }
1836
d7129e19
JB		 1837 if (changes & BSS_CHANGED_BEACON_INT) {
1838 priv->beacon_int = bss_conf->beacon_int;
1839 /* TODO: in AP mode, do something to make this take effect */
1840 }
1841
1842 if (changes & BSS_CHANGED_BSSID) {
1843 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1844
1845 /*
1846 * If there is currently a HW scan going on in the
1847 * background then we need to cancel it else the RXON
1848 * below/in post_associate will fail.
1849 */
2d0ddec5 1850 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1851 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1852 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1853 mutex_unlock(&priv->mutex);
1854 return;
1855 }
2d0ddec5 1856
d7129e19 1857 /* mac80211 only sets assoc when in STATION mode */
92445c95 1858 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB		 1859 memcpy(priv->staging_rxon.bssid_addr,
1860 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1861
d7129e19
JB		 1862 /* currently needed in a few places */
1863 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1864 } else {
1865 priv->staging_rxon.filter_flags &=
1866 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1867 }
d7129e19 1868
2d0ddec5
JB		 1869 }
1870
d7129e19
JB		 1871 /*
1872 * This needs to be after setting the BSSID in case
1873 * mac80211 decides to do both changes at once because
1874 * it will invoke post_associate.
1875 */
92445c95 1876 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1877 changes & BSS_CHANGED_BEACON) {
1878 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1879
1880 if (beacon)
1881 iwl_mac_beacon_update(hw, beacon);
1882 }
1883
5bbe233b
AK		 1884 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1885 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1886 bss_conf->use_short_preamble);
1887 if (bss_conf->use_short_preamble)
1888 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1889 else
1890 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1891 }
1892
1893 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1894 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1895 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1896 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1897 else
1898 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1899 }
1900
d7129e19
JB		 1901 if (changes & BSS_CHANGED_BASIC_RATES) {
1902 /* XXX use this information
1903 *
1904 * To do that, remove code from iwl_set_rate() and put something
1905 * like this here:
1906 *
1907 if (A-band)
1908 priv->staging_rxon.ofdm_basic_rates =
1909 bss_conf->basic_rates;
1910 else
1911 priv->staging_rxon.ofdm_basic_rates =
1912 bss_conf->basic_rates >> 4;
1913 priv->staging_rxon.cck_basic_rates =
1914 bss_conf->basic_rates & 0xF;
1915 */
1916 }
1917
5bbe233b
AK		 1918 if (changes & BSS_CHANGED_HT) {
1919 iwl_ht_conf(priv, bss_conf);
45823531
AK		 1920
1921 if (priv->cfg->ops->hcmd->set_rxon_chain)
1922 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1923 }
1924
1925 if (changes & BSS_CHANGED_ASSOC) {
1926 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 1927 if (bss_conf->assoc) {
1928 priv->assoc_id = bss_conf->aid;
1929 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 1930 priv->timestamp = bss_conf->timestamp;
1931 priv->assoc_capability = bss_conf->assoc_capability;
1932
e932a609
JB		 1933 iwl_led_associate(priv);
1934
d7129e19
JB		 1935 if (!iwl_is_rfkill(priv))
1936 priv->cfg->ops->lib->post_associate(priv);
c91c3efc
AK		 1937 } else
1938 iwl_set_no_assoc(priv);
d7129e19
JB		 1939 }
1940
1941 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
1942 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1943 changes);
1944 ret = iwl_send_rxon_assoc(priv);
1945 if (!ret) {
1946 /* Sync active_rxon with latest change. */
1947 memcpy((void *)&priv->active_rxon,
1948 &priv->staging_rxon,
1949 sizeof(struct iwl_rxon_cmd));
5bbe233b 1950 }
5bbe233b 1951 }
d7129e19 1952
c91c3efc
AK		 1953 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1954 if (vif->bss_conf.enable_beacon) {
1955 memcpy(priv->staging_rxon.bssid_addr,
1956 bss_conf->bssid, ETH_ALEN);
1957 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1958 iwlcore_config_ap(priv);
1959 } else
1960 iwl_set_no_assoc(priv);
f513dfff
DH		 1961 }
1962
1fa61b2e
JB		 1963 if (changes & BSS_CHANGED_IBSS) {
1964 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1965 bss_conf->ibss_joined);
1966 if (ret)
1967 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1968 bss_conf->ibss_joined ? "add" : "remove",
1969 bss_conf->bssid);
1970 }
1971
d7129e19
JB		 1972 mutex_unlock(&priv->mutex);
1973
2d0ddec5 1974 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1975}
1976EXPORT_SYMBOL(iwl_bss_info_changed);
1977
9944b938
AK		 1978int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1979{
1980 struct iwl_priv *priv = hw->priv;
1981 unsigned long flags;
1982 __le64 timestamp;
1983
1984 IWL_DEBUG_MAC80211(priv, "enter\n");
1985
1986 if (!iwl_is_ready_rf(priv)) {
1987 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1988 return -EIO;
1989 }
1990
9944b938
AK		 1991 spin_lock_irqsave(&priv->lock, flags);
1992
1993 if (priv->ibss_beacon)
1994 dev_kfree_skb(priv->ibss_beacon);
1995
1996 priv->ibss_beacon = skb;
1997
1998 priv->assoc_id = 0;
1999 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2000 priv->timestamp = le64_to_cpu(timestamp);
2001
2002 IWL_DEBUG_MAC80211(priv, "leave\n");
2003 spin_unlock_irqrestore(&priv->lock, flags);
2004
9944b938
AK		 2005 priv->cfg->ops->lib->post_associate(priv);
2006
9944b938
AK		 2007 return 0;
2008}
2009EXPORT_SYMBOL(iwl_mac_beacon_update);
2010
b55e75ed 2011static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 2012{
b55e75ed 2013 iwl_connection_init_rx_config(priv, vif->type);
727882d6
AK		 2014
2015 if (priv->cfg->ops->hcmd->set_rxon_chain)
2016 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2017
2018 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2019
b55e75ed 2020 return iwlcore_commit_rxon(priv);
727882d6 2021}
727882d6 2022
b55e75ed 2023int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 2024{
2025 struct iwl_priv *priv = hw->priv;
47e28f41 2026 int err = 0;
cbb6ab94 2027
1ed32e4f 2028 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
cbb6ab94 2029
47e28f41
JB		 2030 mutex_lock(&priv->mutex);
2031
b55e75ed
JB		 2032 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2033 err = -EINVAL;
2034 goto out;
2035 }
2036
cbb6ab94
AK		 2037 if (priv->vif) {
2038 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 2039 err = -EOPNOTSUPP;
2040 goto out;
cbb6ab94
AK		 2041 }
2042
1ed32e4f
JB		 2043 priv->vif = vif;
2044 priv->iw_mode = vif->type;
cbb6ab94 2045
b55e75ed
JB		 2046 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2047 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
cbb6ab94 2048
b55e75ed
JB		 2049 err = iwl_set_mode(priv, vif);
2050 if (err)
2051 goto out_err;
7e246191
RC		 2052
2053 /* Add the broadcast address so we can send broadcast frames */
d2e210ae
RC		 2054 err = priv->cfg->ops->lib->add_bcast_station(priv);
2055 if (err)
2056 goto out_err;
7e246191 2057
b55e75ed 2058 goto out;
cbb6ab94 2059
b55e75ed
JB		 2060 out_err:
2061 priv->vif = NULL;
2062 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2063 out:
cbb6ab94
AK		 2064 mutex_unlock(&priv->mutex);
2065
2066 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2067 return err;
cbb6ab94
AK		 2068}
2069EXPORT_SYMBOL(iwl_mac_add_interface);
2070
d8052319 2071void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2072 struct ieee80211_vif *vif)
d8052319
AK		 2073{
2074 struct iwl_priv *priv = hw->priv;
2075
2076 IWL_DEBUG_MAC80211(priv, "enter\n");
2077
2078 mutex_lock(&priv->mutex);
2079
7e246191
RC		 2080 iwl_clear_ucode_stations(priv, true);
2081
d8052319
AK		 2082 if (iwl_is_ready_rf(priv)) {
2083 iwl_scan_cancel_timeout(priv, 100);
2084 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2085 iwlcore_commit_rxon(priv);
2086 }
1ed32e4f 2087 if (priv->vif == vif) {
d8052319
AK		 2088 priv->vif = NULL;
2089 memset(priv->bssid, 0, ETH_ALEN);
2090 }
2091 mutex_unlock(&priv->mutex);
2092
2093 IWL_DEBUG_MAC80211(priv, "leave\n");
2094
2095}
2096EXPORT_SYMBOL(iwl_mac_remove_interface);
2097
4808368d
AK		 2098/**
2099 * iwl_mac_config - mac80211 config callback
4808368d
AK		 2100 */
2101int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2102{
2103 struct iwl_priv *priv = hw->priv;
2104 const struct iwl_channel_info *ch_info;
2105 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2106 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2107 unsigned long flags = 0;
2108 int ret = 0;
2109 u16 ch;
2110 int scan_active = 0;
2111
2112 mutex_lock(&priv->mutex);
2113
4808368d
AK		 2114 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2115 conf->channel->hw_value, changed);
2116
2117 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2118 test_bit(STATUS_SCANNING, &priv->status))) {
2119 scan_active = 1;
2120 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2121 }
2122
ba37a3d0
JB		 2123 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2124 IEEE80211_CONF_CHANGE_CHANNEL)) {
2125 /* mac80211 uses static for non-HT which is what we want */
2126 priv->current_ht_config.smps = conf->smps_mode;
2127
2128 /*
2129 * Recalculate chain counts.
2130 *
2131 * If monitor mode is enabled then mac80211 will
2132 * set up the SM PS mode to OFF if an HT channel is
2133 * configured.
2134 */
2135 if (priv->cfg->ops->hcmd->set_rxon_chain)
2136 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2137 }
4808368d
AK		 2138
2139 /* during scanning mac80211 will delay channel setting until
2140 * scan finish with changed = 0
2141 */
2142 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2143 if (scan_active)
2144 goto set_ch_out;
2145
2146 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2147 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2148 if (!is_channel_valid(ch_info)) {
2149 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2150 ret = -EINVAL;
2151 goto set_ch_out;
2152 }
2153
4808368d
AK		 2154 spin_lock_irqsave(&priv->lock, flags);
2155
28bd723b
DH		 2156 /* Configure HT40 channels */
2157 ht_conf->is_ht = conf_is_ht(conf);
2158 if (ht_conf->is_ht) {
2159 if (conf_is_ht40_minus(conf)) {
2160 ht_conf->extension_chan_offset =
2161 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2162 ht_conf->is_40mhz = true;
28bd723b
DH		 2163 } else if (conf_is_ht40_plus(conf)) {
2164 ht_conf->extension_chan_offset =
2165 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2166 ht_conf->is_40mhz = true;
28bd723b
DH		 2167 } else {
2168 ht_conf->extension_chan_offset =
2169 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2170 ht_conf->is_40mhz = false;
28bd723b
DH		 2171 }
2172 } else
c812ee24 2173 ht_conf->is_40mhz = false;
28bd723b
DH		 2174 /* Default to no protection. Protection mode will later be set
2175 * from BSS config in iwl_ht_conf */
2176 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2177
2178 /* if we are switching from ht to 2.4 clear flags
2179 * from any ht related info since 2.4 does not
2180 * support ht */
2181 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2182 priv->staging_rxon.flags = 0;
2183
2184 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2185 iwl_set_rxon_ht(priv, ht_conf);
4808368d
AK		 2186
2187 iwl_set_flags_for_band(priv, conf->channel->band);
2188 spin_unlock_irqrestore(&priv->lock, flags);
0924e519
WYG		 2189 if (iwl_is_associated(priv) &&
2190 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2191 priv->cfg->ops->lib->set_channel_switch) {
2192 iwl_set_rate(priv);
2193 /*
2194 * at this point, staging_rxon has the
2195 * configuration for channel switch
2196 */
2197 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2198 ch);
2199 if (!ret) {
2200 iwl_print_rx_config_cmd(priv);
2201 goto out;
2202 }
2203 priv->switch_rxon.switch_in_progress = false;
2204 }
4808368d
AK		 2205 set_ch_out:
2206 /* The list of supported rates and rate mask can be different
2207 * for each band; since the band may have changed, reset
2208 * the rate mask to what mac80211 lists */
2209 iwl_set_rate(priv);
2210 }
2211
78f5fb7f
JB		 2212 if (changed & (IEEE80211_CONF_CHANGE_PS |
2213 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2214 ret = iwl_power_update_mode(priv, false);
4808368d 2215 if (ret)
e312c24c 2216 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2217 }
2218
2219 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2220 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2221 priv->tx_power_user_lmt, conf->power_level);
2222
2223 iwl_set_tx_power(priv, conf->power_level, false);
2224 }
2225
e61146e3
SG		 2226 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2227 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2228
2229 spin_lock_irqsave(&priv->lock, flags);
2230 priv->qos_data.qos_active = qos_active;
2231 iwl_update_qos(priv);
2232 spin_unlock_irqrestore(&priv->lock, flags);
2233 }
2234
0cf4c01e
MA		 2235 if (!iwl_is_ready(priv)) {
2236 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2237 goto out;
2238 }
2239
4808368d
AK		 2240 if (scan_active)
2241 goto out;
2242
2243 if (memcmp(&priv->active_rxon,
2244 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2245 iwlcore_commit_rxon(priv);
2246 else
2247 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2248
2249
2250out:
2251 IWL_DEBUG_MAC80211(priv, "leave\n");
2252 mutex_unlock(&priv->mutex);
2253 return ret;
2254}
2255EXPORT_SYMBOL(iwl_mac_config);
2256
bd564261
AK		 2257void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2258{
2259 struct iwl_priv *priv = hw->priv;
2260 unsigned long flags;
2261
2262 mutex_lock(&priv->mutex);
2263 IWL_DEBUG_MAC80211(priv, "enter\n");
2264
2265 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2266 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2267 spin_unlock_irqrestore(&priv->lock, flags);
2268
bd564261
AK		 2269 spin_lock_irqsave(&priv->lock, flags);
2270 priv->assoc_id = 0;
2271 priv->assoc_capability = 0;
bd564261
AK		 2272
2273 /* new association get rid of ibss beacon skb */
2274 if (priv->ibss_beacon)
2275 dev_kfree_skb(priv->ibss_beacon);
2276
2277 priv->ibss_beacon = NULL;
2278
57c4d7b4 2279 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261 2280 priv->timestamp = 0;
bd564261
AK		 2281
2282 spin_unlock_irqrestore(&priv->lock, flags);
2283
2284 if (!iwl_is_ready_rf(priv)) {
2285 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2286 mutex_unlock(&priv->mutex);
2287 return;
2288 }
2289
2290 /* we are restarting association process
2291 * clear RXON_FILTER_ASSOC_MSK bit
2292 */
b4665df4
JB		 2293 iwl_scan_cancel_timeout(priv, 100);
2294 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2295 iwlcore_commit_rxon(priv);
bd564261
AK		 2296
2297 iwl_set_rate(priv);
2298
2299 mutex_unlock(&priv->mutex);
2300
2301 IWL_DEBUG_MAC80211(priv, "leave\n");
2302}
2303EXPORT_SYMBOL(iwl_mac_reset_tsf);
2304
88804e2b
WYG		 2305int iwl_alloc_txq_mem(struct iwl_priv *priv)
2306{
2307 if (!priv->txq)
2308 priv->txq = kzalloc(
2309 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2310 GFP_KERNEL);
2311 if (!priv->txq) {
91dd6c27 2312 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2313 return -ENOMEM;
2314 }
2315 return 0;
2316}
2317EXPORT_SYMBOL(iwl_alloc_txq_mem);
2318
2319void iwl_free_txq_mem(struct iwl_priv *priv)
2320{
2321 kfree(priv->txq);
2322 priv->txq = NULL;
2323}
2324EXPORT_SYMBOL(iwl_free_txq_mem);
2325
20594eb0
WYG		 2326#ifdef CONFIG_IWLWIFI_DEBUGFS
2327
2328#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2329
2330void iwl_reset_traffic_log(struct iwl_priv *priv)
2331{
2332 priv->tx_traffic_idx = 0;
2333 priv->rx_traffic_idx = 0;
2334 if (priv->tx_traffic)
2335 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2336 if (priv->rx_traffic)
2337 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2338}
2339
2340int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2341{
2342 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2343
2344 if (iwl_debug_level & IWL_DL_TX) {
2345 if (!priv->tx_traffic) {
2346 priv->tx_traffic =
2347 kzalloc(traffic_size, GFP_KERNEL);
2348 if (!priv->tx_traffic)
2349 return -ENOMEM;
2350 }
2351 }
2352 if (iwl_debug_level & IWL_DL_RX) {
2353 if (!priv->rx_traffic) {
2354 priv->rx_traffic =
2355 kzalloc(traffic_size, GFP_KERNEL);
2356 if (!priv->rx_traffic)
2357 return -ENOMEM;
2358 }
2359 }
2360 iwl_reset_traffic_log(priv);
2361 return 0;
2362}
2363EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2364
2365void iwl_free_traffic_mem(struct iwl_priv *priv)
2366{
2367 kfree(priv->tx_traffic);
2368 priv->tx_traffic = NULL;
2369
2370 kfree(priv->rx_traffic);
2371 priv->rx_traffic = NULL;
2372}
2373EXPORT_SYMBOL(iwl_free_traffic_mem);
2374
2375void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2376 u16 length, struct ieee80211_hdr *header)
2377{
2378 __le16 fc;
2379 u16 len;
2380
2381 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2382 return;
2383
2384 if (!priv->tx_traffic)
2385 return;
2386
2387 fc = header->frame_control;
2388 if (ieee80211_is_data(fc)) {
2389 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2390 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2391 memcpy((priv->tx_traffic +
2392 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2393 header, len);
2394 priv->tx_traffic_idx =
2395 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2396 }
2397}
2398EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2399
2400void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2401 u16 length, struct ieee80211_hdr *header)
2402{
2403 __le16 fc;
2404 u16 len;
2405
2406 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2407 return;
2408
2409 if (!priv->rx_traffic)
2410 return;
2411
2412 fc = header->frame_control;
2413 if (ieee80211_is_data(fc)) {
2414 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2415 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2416 memcpy((priv->rx_traffic +
2417 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2418 header, len);
2419 priv->rx_traffic_idx =
2420 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2421 }
2422}
2423EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2424
2425const char *get_mgmt_string(int cmd)
2426{
2427 switch (cmd) {
2428 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2429 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2430 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2431 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2432 IWL_CMD(MANAGEMENT_PROBE_REQ);
2433 IWL_CMD(MANAGEMENT_PROBE_RESP);
2434 IWL_CMD(MANAGEMENT_BEACON);
2435 IWL_CMD(MANAGEMENT_ATIM);
2436 IWL_CMD(MANAGEMENT_DISASSOC);
2437 IWL_CMD(MANAGEMENT_AUTH);
2438 IWL_CMD(MANAGEMENT_DEAUTH);
2439 IWL_CMD(MANAGEMENT_ACTION);
2440 default:
2441 return "UNKNOWN";
2442
2443 }
2444}
2445
2446const char *get_ctrl_string(int cmd)
2447{
2448 switch (cmd) {
2449 IWL_CMD(CONTROL_BACK_REQ);
2450 IWL_CMD(CONTROL_BACK);
2451 IWL_CMD(CONTROL_PSPOLL);
2452 IWL_CMD(CONTROL_RTS);
2453 IWL_CMD(CONTROL_CTS);
2454 IWL_CMD(CONTROL_ACK);
2455 IWL_CMD(CONTROL_CFEND);
2456 IWL_CMD(CONTROL_CFENDACK);
2457 default:
2458 return "UNKNOWN";
2459
2460 }
2461}
2462
7163b8a4 2463void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2464{
2465 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2466 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2467 priv->led_tpt = 0;
22fdf3c9
WYG		 2468}
2469
2470/*
2471 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2472 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2473 * Use debugFs to display the rx/rx_statistics
2474 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2475 * information will be recorded, but DATA pkt still will be recorded
2476 * for the reason of iwl_led.c need to control the led blinking based on
2477 * number of tx and rx data.
2478 *
2479 */
2480void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2481{
2482 struct traffic_stats *stats;
2483
2484 if (is_tx)
2485 stats = &priv->tx_stats;
2486 else
2487 stats = &priv->rx_stats;
2488
2489 if (ieee80211_is_mgmt(fc)) {
2490 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2491 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2492 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2493 break;
2494 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2495 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2496 break;
2497 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2498 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2499 break;
2500 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2501 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2502 break;
2503 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2504 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2505 break;
2506 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2507 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2508 break;
2509 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2510 stats->mgmt[MANAGEMENT_BEACON]++;
2511 break;
2512 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2513 stats->mgmt[MANAGEMENT_ATIM]++;
2514 break;
2515 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2516 stats->mgmt[MANAGEMENT_DISASSOC]++;
2517 break;
2518 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2519 stats->mgmt[MANAGEMENT_AUTH]++;
2520 break;
2521 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2522 stats->mgmt[MANAGEMENT_DEAUTH]++;
2523 break;
2524 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2525 stats->mgmt[MANAGEMENT_ACTION]++;
2526 break;
2527 }
2528 } else if (ieee80211_is_ctl(fc)) {
2529 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2530 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2531 stats->ctrl[CONTROL_BACK_REQ]++;
2532 break;
2533 case cpu_to_le16(IEEE80211_STYPE_BACK):
2534 stats->ctrl[CONTROL_BACK]++;
2535 break;
2536 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2537 stats->ctrl[CONTROL_PSPOLL]++;
2538 break;
2539 case cpu_to_le16(IEEE80211_STYPE_RTS):
2540 stats->ctrl[CONTROL_RTS]++;
2541 break;
2542 case cpu_to_le16(IEEE80211_STYPE_CTS):
2543 stats->ctrl[CONTROL_CTS]++;
2544 break;
2545 case cpu_to_le16(IEEE80211_STYPE_ACK):
2546 stats->ctrl[CONTROL_ACK]++;
2547 break;
2548 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2549 stats->ctrl[CONTROL_CFEND]++;
2550 break;
2551 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2552 stats->ctrl[CONTROL_CFENDACK]++;
2553 break;
2554 }
2555 } else {
2556 /* data */
2557 stats->data_cnt++;
2558 stats->data_bytes += len;
2559 }
d5f4cf71 2560 iwl_leds_background(priv);
22fdf3c9
WYG		 2561}
2562EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2563#endif
2564
696bdee3
WYG		 2565const static char *get_csr_string(int cmd)
2566{
2567 switch (cmd) {
2568 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2569 IWL_CMD(CSR_INT_COALESCING);
2570 IWL_CMD(CSR_INT);
2571 IWL_CMD(CSR_INT_MASK);
2572 IWL_CMD(CSR_FH_INT_STATUS);
2573 IWL_CMD(CSR_GPIO_IN);
2574 IWL_CMD(CSR_RESET);
2575 IWL_CMD(CSR_GP_CNTRL);
2576 IWL_CMD(CSR_HW_REV);
2577 IWL_CMD(CSR_EEPROM_REG);
2578 IWL_CMD(CSR_EEPROM_GP);
2579 IWL_CMD(CSR_OTP_GP_REG);
2580 IWL_CMD(CSR_GIO_REG);
2581 IWL_CMD(CSR_GP_UCODE_REG);
2582 IWL_CMD(CSR_GP_DRIVER_REG);
2583 IWL_CMD(CSR_UCODE_DRV_GP1);
2584 IWL_CMD(CSR_UCODE_DRV_GP2);
2585 IWL_CMD(CSR_LED_REG);
2586 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2587 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2588 IWL_CMD(CSR_ANA_PLL_CFG);
2589 IWL_CMD(CSR_HW_REV_WA_REG);
2590 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2591 default:
2592 return "UNKNOWN";
2593
2594 }
2595}
2596
2597void iwl_dump_csr(struct iwl_priv *priv)
2598{
2599 int i;
2600 u32 csr_tbl[] = {
2601 CSR_HW_IF_CONFIG_REG,
2602 CSR_INT_COALESCING,
2603 CSR_INT,
2604 CSR_INT_MASK,
2605 CSR_FH_INT_STATUS,
2606 CSR_GPIO_IN,
2607 CSR_RESET,
2608 CSR_GP_CNTRL,
2609 CSR_HW_REV,
2610 CSR_EEPROM_REG,
2611 CSR_EEPROM_GP,
2612 CSR_OTP_GP_REG,
2613 CSR_GIO_REG,
2614 CSR_GP_UCODE_REG,
2615 CSR_GP_DRIVER_REG,
2616 CSR_UCODE_DRV_GP1,
2617 CSR_UCODE_DRV_GP2,
2618 CSR_LED_REG,
2619 CSR_DRAM_INT_TBL_REG,
2620 CSR_GIO_CHICKEN_BITS,
2621 CSR_ANA_PLL_CFG,
2622 CSR_HW_REV_WA_REG,
2623 CSR_DBG_HPET_MEM_REG
2624 };
2625 IWL_ERR(priv, "CSR values:\n");
2626 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2627 "CSR_INT_PERIODIC_REG)\n");
2628 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2629 IWL_ERR(priv, " %25s: 0X%08x\n",
2630 get_csr_string(csr_tbl[i]),
2631 iwl_read32(priv, csr_tbl[i]));
2632 }
2633}
2634EXPORT_SYMBOL(iwl_dump_csr);
2635
1b3eb823
WYG		 2636const static char *get_fh_string(int cmd)
2637{
2638 switch (cmd) {
2639 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2640 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2641 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2642 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2643 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2644 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2645 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2646 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2647 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2648 default:
2649 return "UNKNOWN";
2650
2651 }
2652}
2653
2654int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2655{
2656 int i;
2657#ifdef CONFIG_IWLWIFI_DEBUG
2658 int pos = 0;
2659 size_t bufsz = 0;
2660#endif
2661 u32 fh_tbl[] = {
2662 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2663 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2664 FH_RSCSR_CHNL0_WPTR,
2665 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2666 FH_MEM_RSSR_SHARED_CTRL_REG,
2667 FH_MEM_RSSR_RX_STATUS_REG,
2668 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2669 FH_TSSR_TX_STATUS_REG,
2670 FH_TSSR_TX_ERROR_REG
2671 };
2672#ifdef CONFIG_IWLWIFI_DEBUG
2673 if (display) {
2674 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2675 *buf = kmalloc(bufsz, GFP_KERNEL);
2676 if (!*buf)
2677 return -ENOMEM;
2678 pos += scnprintf(*buf + pos, bufsz - pos,
2679 "FH register values:\n");
2680 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2681 pos += scnprintf(*buf + pos, bufsz - pos,
2682 " %34s: 0X%08x\n",
2683 get_fh_string(fh_tbl[i]),
2684 iwl_read_direct32(priv, fh_tbl[i]));
2685 }
2686 return pos;
2687 }
2688#endif
2689 IWL_ERR(priv, "FH register values:\n");
2690 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2691 IWL_ERR(priv, " %34s: 0X%08x\n",
2692 get_fh_string(fh_tbl[i]),
2693 iwl_read_direct32(priv, fh_tbl[i]));
2694 }
2695 return 0;
2696}
2697EXPORT_SYMBOL(iwl_dump_fh);
2698
a93e7973 2699static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2700{
2701 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2702 return;
2703
2704 if (!iwl_is_associated(priv)) {
2705 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2706 return;
2707 }
2708 /*
2709 * There is no easy and better way to force reset the radio,
2710 * the only known method is switching channel which will force to
2711 * reset and tune the radio.
2712 * Use internal short scan (single channel) operation to should
2713 * achieve this objective.
2714 * Driver should reset the radio when number of consecutive missed
2715 * beacon, or any other uCode error condition detected.
2716 */
2717 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2718 iwl_internal_short_hw_scan(priv);
afbdd69a 2719}
a93e7973 2720
a93e7973
WYG		 2721
2722int iwl_force_reset(struct iwl_priv *priv, int mode)
2723{
8a472da4
WYG		 2724 struct iwl_force_reset *force_reset;
2725
a93e7973
WYG		 2726 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2727 return -EINVAL;
2728
8a472da4
WYG		 2729 if (mode >= IWL_MAX_FORCE_RESET) {
2730 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2731 return -EINVAL;
2732 }
2733 force_reset = &priv->force_reset[mode];
2734 force_reset->reset_request_count++;
2735 if (force_reset->last_force_reset_jiffies &&
2736 time_after(force_reset->last_force_reset_jiffies +
2737 force_reset->reset_duration, jiffies)) {
a93e7973 2738 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 2739 force_reset->reset_reject_count++;
a93e7973
WYG		 2740 return -EAGAIN;
2741 }
8a472da4
WYG		 2742 force_reset->reset_success_count++;
2743 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2744 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2745 switch (mode) {
2746 case IWL_RF_RESET:
2747 iwl_force_rf_reset(priv);
2748 break;
2749 case IWL_FW_RESET:
2750 IWL_ERR(priv, "On demand firmware reload\n");
2751 /* Set the FW error flag -- cleared on iwl_down */
2752 set_bit(STATUS_FW_ERROR, &priv->status);
2753 wake_up_interruptible(&priv->wait_command_queue);
2754 /*
2755 * Keep the restart process from trying to send host
2756 * commands by clearing the INIT status bit
2757 */
2758 clear_bit(STATUS_READY, &priv->status);
2759 queue_work(priv->workqueue, &priv->restart);
2760 break;
a93e7973 2761 }
a93e7973
WYG		 2762 return 0;
2763}
b74e31a9
WYG		 2764EXPORT_SYMBOL(iwl_force_reset);
2765
2766/**
2767 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2768 *
2769 * During normal condition (no queue is stuck), the timer is continually set to
2770 * execute every monitor_recover_period milliseconds after the last timer
2771 * expired. When the queue read_ptr is at the same place, the timer is
2772 * shorten to 100mSecs. This is
2773 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2774 * 2) to detect the stuck queues quicker before the station and AP can
2775 * disassociate each other.
2776 *
2777 * This function monitors all the tx queues and recover from it if any
2778 * of the queues are stuck.
2779 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2780 * it will recover by resetting the firmware and return.
2781 * 2. Then, it checks for station association. If it associates it will check
2782 * other queues. If any queue is stuck, it will recover by resetting
2783 * the firmware.
2784 * Note: It the number of times the queue read_ptr to be at the same place to
2785 * be MAX_REPEAT+1 in order to consider to be stuck.
2786 */
2787/*
2788 * The maximum number of times the read pointer of the tx queue at the
2789 * same place without considering to be stuck.
2790 */
2791#define MAX_REPEAT (2)
2792static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2793{
2794 struct iwl_tx_queue *txq;
2795 struct iwl_queue *q;
2796
2797 txq = &priv->txq[cnt];
2798 q = &txq->q;
2799 /* queue is empty, skip */
2800 if (q->read_ptr != q->write_ptr) {
2801 if (q->read_ptr == q->last_read_ptr) {
2802 /* a queue has not been read from last time */
2803 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2804 IWL_ERR(priv,
2805 "queue %d stuck %d time. Fw reload.\n",
2806 q->id, q->repeat_same_read_ptr);
2807 q->repeat_same_read_ptr = 0;
2808 iwl_force_reset(priv, IWL_FW_RESET);
2809 } else {
2810 q->repeat_same_read_ptr++;
2811 IWL_DEBUG_RADIO(priv,
2812 "queue %d, not read %d time\n",
2813 q->id,
2814 q->repeat_same_read_ptr);
2815 mod_timer(&priv->monitor_recover, jiffies +
2816 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2817 }
2818 return 1;
2819 } else {
2820 q->last_read_ptr = q->read_ptr;
2821 q->repeat_same_read_ptr = 0;
2822 }
2823 }
2824 return 0;
2825}
2826
2827void iwl_bg_monitor_recover(unsigned long data)
2828{
2829 struct iwl_priv *priv = (struct iwl_priv *)data;
2830 int cnt;
2831
2832 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2833 return;
2834
2835 /* monitor and check for stuck cmd queue */
2836 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2837 return;
2838
2839 /* monitor and check for other stuck queues */
2840 if (iwl_is_associated(priv)) {
2841 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2842 /* skip as we already checked the command queue */
2843 if (cnt == IWL_CMD_QUEUE_NUM)
2844 continue;
2845 if (iwl_check_stuck_queue(priv, cnt))
2846 return;
2847 }
2848 }
2849 /*
2850 * Reschedule the timer to occur in
2851 * priv->cfg->monitor_recover_period
2852 */
2853 mod_timer(&priv->monitor_recover,
2854 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2855}
2856EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2857
6da3a13e
WYG		 2858#ifdef CONFIG_PM
2859
2860int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2861{
2862 struct iwl_priv *priv = pci_get_drvdata(pdev);
2863
2864 /*
2865 * This function is called when system goes into suspend state
2866 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2867 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2868 * it will not call apm_ops.stop() to stop the DMA operation.
2869 * Calling apm_ops.stop here to make sure we stop the DMA.
2870 */
2871 priv->cfg->ops->lib->apm_ops.stop(priv);
2872
2873 pci_save_state(pdev);
2874 pci_disable_device(pdev);
2875 pci_set_power_state(pdev, PCI_D3hot);
2876
2877 return 0;
2878}
2879EXPORT_SYMBOL(iwl_pci_suspend);
2880
2881int iwl_pci_resume(struct pci_dev *pdev)
2882{
2883 struct iwl_priv *priv = pci_get_drvdata(pdev);
2884 int ret;
2885
cd398c31
AK		 2886 /*
2887 * We disable the RETRY_TIMEOUT register (0x41) to keep
2888 * PCI Tx retries from interfering with C3 CPU state.
2889 */
2890 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2891
6da3a13e
WYG		 2892 pci_set_power_state(pdev, PCI_D0);
2893 ret = pci_enable_device(pdev);
2894 if (ret)
2895 return ret;
2896 pci_restore_state(pdev);
2897 iwl_enable_interrupts(priv);
2898
2899 return 0;
2900}
2901EXPORT_SYMBOL(iwl_pci_resume);
2902
2903#endif /* CONFIG_PM */
Linux kernel - Deliverables
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