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Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux...
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
01f8162a 5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
1d0a082d 32#include <net/mac80211.h>
df48c323 33
6bc913bd 34#include "iwl-eeprom.h"
3e0d4cb1 35#include "iwl-dev.h" /* FIXME: remove */
19335774 36#include "iwl-debug.h"
df48c323 37#include "iwl-core.h"
b661c819 38#include "iwl-io.h"
5da4b55f 39#include "iwl-power.h"
83dde8c9 40#include "iwl-sta.h"
ef850d7c 41#include "iwl-helpers.h"
df48c323 42
1d0a082d 43
df48c323
TW		 44MODULE_DESCRIPTION("iwl core");
45MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 46MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 47MODULE_LICENSE("GPL");
df48c323 48
c7de35cd
RR		 49#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
a562a9dd
RC		 62u32 iwl_debug_level;
63EXPORT_SYMBOL(iwl_debug_level);
64
ef850d7c
MA		 65static irqreturn_t iwl_isr(int irq, void *data);
66
c7de35cd
RR		 67/*
68 * Parameter order:
69 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
70 *
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
73 *
74 */
1826dcc0 75const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 76 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
88 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
89 /* FIXME:RS: ^^ should be INV (legacy) */
90};
1826dcc0 91EXPORT_SYMBOL(iwl_rates);
c7de35cd 92
e7d326ac
TW		 93/**
94 * translate ucode response to mac80211 tx status control values
95 */
96void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 97 struct ieee80211_tx_info *info)
e7d326ac 98{
e6a9854b 99 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 100
e6a9854b 101 info->antenna_sel_tx =
e7d326ac
TW		 102 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
103 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 104 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 105 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 106 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
7aafef1c 107 if (rate_n_flags & RATE_MCS_HT40_MSK)
e6a9854b 108 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 109 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 110 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 111 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 112 r->flags |= IEEE80211_TX_RC_SHORT_GI;
31513be8 113 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
e7d326ac
TW		 114}
115EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
116
117int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
118{
119 int idx = 0;
120
121 /* HT rate format */
122 if (rate_n_flags & RATE_MCS_HT_MSK) {
123 idx = (rate_n_flags & 0xff);
124
60d32215
DH		 125 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
126 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
127 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 128 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
129
130 idx += IWL_FIRST_OFDM_RATE;
131 /* skip 9M not supported in ht*/
132 if (idx >= IWL_RATE_9M_INDEX)
133 idx += 1;
134 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
135 return idx;
136
137 /* legacy rate format, search for match in table */
138 } else {
139 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
140 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
141 return idx;
142 }
143
144 return -1;
145}
146EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
147
31513be8
DH		 148int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
149{
150 int idx = 0;
151 int band_offset = 0;
152
153 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
154 if (rate_n_flags & RATE_MCS_HT_MSK) {
155 idx = (rate_n_flags & 0xff);
156 return idx;
157 /* Legacy rate format, search for match in table */
158 } else {
159 if (band == IEEE80211_BAND_5GHZ)
160 band_offset = IWL_FIRST_OFDM_RATE;
161 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
162 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
163 return idx - band_offset;
164 }
165
166 return -1;
167}
168
76eff18b
TW		 169u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
170{
171 int i;
172 u8 ind = ant;
173 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
174 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
175 if (priv->hw_params.valid_tx_ant & BIT(ind))
176 return ind;
177 }
178 return ant;
179}
57bd1bea
TW		 180
181const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
182EXPORT_SYMBOL(iwl_bcast_addr);
183
184
1d0a082d
AK		 185/* This function both allocates and initializes hw and priv. */
186struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
187 struct ieee80211_ops *hw_ops)
188{
189 struct iwl_priv *priv;
190
191 /* mac80211 allocates memory for this device instance, including
192 * space for this driver's private structure */
193 struct ieee80211_hw *hw =
194 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
195 if (hw == NULL) {
a3139c59
SO		 196 printk(KERN_ERR "%s: Can not allocate network device\n",
197 cfg->name);
1d0a082d
AK		 198 goto out;
199 }
200
201 priv = hw->priv;
202 priv->hw = hw;
203
204out:
205 return hw;
206}
207EXPORT_SYMBOL(iwl_alloc_all);
208
b661c819
TW		 209void iwl_hw_detect(struct iwl_priv *priv)
210{
211 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
212 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
213 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
214}
215EXPORT_SYMBOL(iwl_hw_detect);
216
1053d35f
RR		 217int iwl_hw_nic_init(struct iwl_priv *priv)
218{
219 unsigned long flags;
220 struct iwl_rx_queue *rxq = &priv->rxq;
221 int ret;
222
223 /* nic_init */
1053d35f 224 spin_lock_irqsave(&priv->lock, flags);
1b73af82 225 priv->cfg->ops->lib->apm_ops.init(priv);
1053d35f
RR		 226 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
227 spin_unlock_irqrestore(&priv->lock, flags);
228
229 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
230
231 priv->cfg->ops->lib->apm_ops.config(priv);
232
233 /* Allocate the RX queue, or reset if it is already allocated */
234 if (!rxq->bd) {
235 ret = iwl_rx_queue_alloc(priv);
236 if (ret) {
15b1687c 237 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 238 return -ENOMEM;
239 }
240 } else
241 iwl_rx_queue_reset(priv, rxq);
242
243 iwl_rx_replenish(priv);
244
245 iwl_rx_init(priv, rxq);
246
247 spin_lock_irqsave(&priv->lock, flags);
248
249 rxq->need_update = 1;
250 iwl_rx_queue_update_write_ptr(priv, rxq);
251
252 spin_unlock_irqrestore(&priv->lock, flags);
253
254 /* Allocate and init all Tx and Command queues */
255 ret = iwl_txq_ctx_reset(priv);
256 if (ret)
257 return ret;
258
259 set_bit(STATUS_INIT, &priv->status);
260
261 return 0;
262}
263EXPORT_SYMBOL(iwl_hw_nic_init);
264
14d2aac5
AK		 265/*
266 * QoS support
267*/
268void iwl_activate_qos(struct iwl_priv *priv, u8 force)
269{
270 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
271 return;
272
273 priv->qos_data.def_qos_parm.qos_flags = 0;
274
275 if (priv->qos_data.qos_cap.q_AP.queue_request &&
276 !priv->qos_data.qos_cap.q_AP.txop_request)
277 priv->qos_data.def_qos_parm.qos_flags |=
278 QOS_PARAM_FLG_TXOP_TYPE_MSK;
279 if (priv->qos_data.qos_active)
280 priv->qos_data.def_qos_parm.qos_flags |=
281 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
282
283 if (priv->current_ht_config.is_ht)
284 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
285
286 if (force || iwl_is_associated(priv)) {
287 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
288 priv->qos_data.qos_active,
289 priv->qos_data.def_qos_parm.qos_flags);
290
291 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
292 sizeof(struct iwl_qosparam_cmd),
293 &priv->qos_data.def_qos_parm, NULL);
294 }
295}
296EXPORT_SYMBOL(iwl_activate_qos);
297
f2c95b04
WYG		 298/*
299 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
300 * (802.11b) (802.11a/g)
301 * AC_BK 15 1023 7 0 0
302 * AC_BE 15 1023 3 0 0
303 * AC_VI 7 15 2 6.016ms 3.008ms
304 * AC_VO 3 7 2 3.264ms 1.504ms
305 */
c7de35cd 306void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 307{
308 u16 cw_min = 15;
309 u16 cw_max = 1023;
310 u8 aifs = 2;
30dab79e 311 bool is_legacy = false;
bf85ea4f
AK		 312 unsigned long flags;
313 int i;
314
315 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 316 /* QoS always active in AP and ADHOC mode
317 * In STA mode wait for association
318 */
319 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
320 priv->iw_mode == NL80211_IFTYPE_AP)
321 priv->qos_data.qos_active = 1;
322 else
323 priv->qos_data.qos_active = 0;
bf85ea4f 324
30dab79e
WT		 325 /* check for legacy mode */
326 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
327 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
328 (priv->iw_mode == NL80211_IFTYPE_STATION &&
329 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 330 cw_min = 31;
331 is_legacy = 1;
332 }
333
334 if (priv->qos_data.qos_active)
335 aifs = 3;
336
f2c95b04 337 /* AC_BE */
bf85ea4f
AK		 338 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
339 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
340 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
341 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
342 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
343
344 if (priv->qos_data.qos_active) {
f2c95b04 345 /* AC_BK */
bf85ea4f
AK		 346 i = 1;
347 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
348 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
349 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
350 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
351 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
352
f2c95b04 353 /* AC_VI */
bf85ea4f
AK		 354 i = 2;
355 priv->qos_data.def_qos_parm.ac[i].cw_min =
356 cpu_to_le16((cw_min + 1) / 2 - 1);
357 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 358 cpu_to_le16(cw_min);
bf85ea4f
AK		 359 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
360 if (is_legacy)
361 priv->qos_data.def_qos_parm.ac[i].edca_txop =
362 cpu_to_le16(6016);
363 else
364 priv->qos_data.def_qos_parm.ac[i].edca_txop =
365 cpu_to_le16(3008);
366 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
367
f2c95b04 368 /* AC_VO */
bf85ea4f
AK		 369 i = 3;
370 priv->qos_data.def_qos_parm.ac[i].cw_min =
371 cpu_to_le16((cw_min + 1) / 4 - 1);
372 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 373 cpu_to_le16((cw_min + 1) / 2 - 1);
bf85ea4f
AK		 374 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
375 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
376 if (is_legacy)
377 priv->qos_data.def_qos_parm.ac[i].edca_txop =
378 cpu_to_le16(3264);
379 else
380 priv->qos_data.def_qos_parm.ac[i].edca_txop =
381 cpu_to_le16(1504);
382 } else {
383 for (i = 1; i < 4; i++) {
384 priv->qos_data.def_qos_parm.ac[i].cw_min =
385 cpu_to_le16(cw_min);
386 priv->qos_data.def_qos_parm.ac[i].cw_max =
387 cpu_to_le16(cw_max);
388 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
389 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
390 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
391 }
392 }
e1623446 393 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 394
395 spin_unlock_irqrestore(&priv->lock, flags);
396}
c7de35cd
RR		 397EXPORT_SYMBOL(iwl_reset_qos);
398
d9fe60de
JB		 399#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
400#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 401static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 402 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 403 enum ieee80211_band band)
404{
39130df3
RR		 405 u16 max_bit_rate = 0;
406 u8 rx_chains_num = priv->hw_params.rx_chains_num;
407 u8 tx_chains_num = priv->hw_params.tx_chains_num;
408
c7de35cd 409 ht_info->cap = 0;
d9fe60de 410 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 411
d9fe60de 412 ht_info->ht_supported = true;
c7de35cd 413
b261793d
DH		 414 if (priv->cfg->ht_greenfield_support)
415 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de
JB		 416 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
417 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
00c5ae2f 418 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
39130df3
RR		 419
420 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 421 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 422 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
423 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
424 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 425 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 426 }
c7de35cd
RR		 427
428 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 429 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 430
431 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
432 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
433
d9fe60de 434 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 435 if (rx_chains_num >= 2)
d9fe60de 436 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 437 if (rx_chains_num >= 3)
d9fe60de 438 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 439
440 /* Highest supported Rx data rate */
441 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 442 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
443 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 444
445 /* Tx MCS capabilities */
d9fe60de 446 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 447 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 448 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
449 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
450 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 451 }
c7de35cd 452}
c7de35cd
RR		 453
454static void iwlcore_init_hw_rates(struct iwl_priv *priv,
455 struct ieee80211_rate *rates)
456{
457 int i;
458
5027309b 459 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1826dcc0 460 rates[i].bitrate = iwl_rates[i].ieee * 5;
c7de35cd
RR		 461 rates[i].hw_value = i; /* Rate scaling will work on indexes */
462 rates[i].hw_value_short = i;
463 rates[i].flags = 0;
5027309b 464 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
c7de35cd
RR		 465 /*
466 * If CCK != 1M then set short preamble rate flag.
467 */
468 rates[i].flags |=
1826dcc0 469 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
c7de35cd
RR		 470 0 : IEEE80211_RATE_SHORT_PREAMBLE;
471 }
472 }
473}
474
8ccde88a 475
c7de35cd
RR		 476/**
477 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
478 */
534166de 479int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 480{
481 struct iwl_channel_info *ch;
482 struct ieee80211_supported_band *sband;
483 struct ieee80211_channel *channels;
484 struct ieee80211_channel *geo_ch;
485 struct ieee80211_rate *rates;
486 int i = 0;
487
488 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
489 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 490 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 491 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
492 return 0;
493 }
494
495 channels = kzalloc(sizeof(struct ieee80211_channel) *
496 priv->channel_count, GFP_KERNEL);
497 if (!channels)
498 return -ENOMEM;
499
5027309b 500 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 501 GFP_KERNEL);
502 if (!rates) {
503 kfree(channels);
504 return -ENOMEM;
505 }
506
507 /* 5.2GHz channels start after the 2.4GHz channels */
508 sband = &priv->bands[IEEE80211_BAND_5GHZ];
509 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
510 /* just OFDM */
511 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 512 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 513
49779293 514 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 515 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 516 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 517
518 sband = &priv->bands[IEEE80211_BAND_2GHZ];
519 sband->channels = channels;
520 /* OFDM & CCK */
521 sband->bitrates = rates;
5027309b 522 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 523
49779293 524 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 525 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 526 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 527
528 priv->ieee_channels = channels;
529 priv->ieee_rates = rates;
530
c7de35cd
RR		 531 for (i = 0; i < priv->channel_count; i++) {
532 ch = &priv->channel_info[i];
533
534 /* FIXME: might be removed if scan is OK */
535 if (!is_channel_valid(ch))
536 continue;
537
538 if (is_channel_a_band(ch))
539 sband = &priv->bands[IEEE80211_BAND_5GHZ];
540 else
541 sband = &priv->bands[IEEE80211_BAND_2GHZ];
542
543 geo_ch = &sband->channels[sband->n_channels++];
544
545 geo_ch->center_freq =
546 ieee80211_channel_to_frequency(ch->channel);
547 geo_ch->max_power = ch->max_power_avg;
548 geo_ch->max_antenna_gain = 0xff;
549 geo_ch->hw_value = ch->channel;
550
551 if (is_channel_valid(ch)) {
552 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
553 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
554
555 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
556 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
557
558 if (ch->flags & EEPROM_CHANNEL_RADAR)
559 geo_ch->flags |= IEEE80211_CHAN_RADAR;
560
7aafef1c 561 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 562
dc1b0973
WYG		 563 if (ch->max_power_avg > priv->tx_power_device_lmt)
564 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 565 } else {
566 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
567 }
568
e1623446 569 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 570 ch->channel, geo_ch->center_freq,
571 is_channel_a_band(ch) ? "5.2" : "2.4",
572 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
573 "restricted" : "valid",
574 geo_ch->flags);
575 }
576
577 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
578 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 579 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
580 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 581 priv->pci_dev->device,
582 priv->pci_dev->subsystem_device);
c7de35cd
RR		 583 priv->cfg->sku &= ~IWL_SKU_A;
584 }
585
978785a3 586 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 587 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
588 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 589
590 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
591
592 return 0;
593}
534166de 594EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 595
596/*
597 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
598 */
534166de 599void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 600{
601 kfree(priv->ieee_channels);
602 kfree(priv->ieee_rates);
603 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
604}
534166de 605EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 606
28a6b07a 607static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd
RR		 608{
609 return !priv->current_ht_config.is_ht ||
d9fe60de
JB		 610 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
611 (priv->current_ht_config.mcs.rx_mask[2] == 0));
c7de35cd 612}
963f5517 613
47c5196e
TW		 614static u8 iwl_is_channel_extension(struct iwl_priv *priv,
615 enum ieee80211_band band,
616 u16 channel, u8 extension_chan_offset)
617{
618 const struct iwl_channel_info *ch_info;
619
620 ch_info = iwl_get_channel_info(priv, band, channel);
621 if (!is_channel_valid(ch_info))
622 return 0;
623
d9fe60de 624 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 625 return !(ch_info->ht40_extension_channel &
689da1b3 626 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 627 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 628 return !(ch_info->ht40_extension_channel &
689da1b3 629 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 630
631 return 0;
632}
633
7aafef1c 634u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 635 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e
TW		 636{
637 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
638
639 if ((!iwl_ht_conf->is_ht) ||
a2b0f02e 640 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
47c5196e
TW		 641 return 0;
642
a2b0f02e
WYG		 643 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
644 * the bit will not set if it is pure 40MHz case
645 */
47c5196e 646 if (sta_ht_inf) {
a2b0f02e 647 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 648 return 0;
649 }
1e4247d4
WYG		 650#ifdef CONFIG_IWLWIFI_DEBUG
651 if (priv->disable_ht40)
652 return 0;
653#endif
611d3eb7
WYG		 654 return iwl_is_channel_extension(priv, priv->band,
655 le16_to_cpu(priv->staging_rxon.channel),
656 iwl_ht_conf->extension_chan_offset);
47c5196e 657}
7aafef1c 658EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 659
2c2f3b33
TW		 660static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
661{
662 u16 new_val = 0;
663 u16 beacon_factor = 0;
664
665 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
666 new_val = beacon_val / beacon_factor;
667
668 if (!new_val)
669 new_val = max_beacon_val;
670
671 return new_val;
672}
673
674void iwl_setup_rxon_timing(struct iwl_priv *priv)
675{
676 u64 tsf;
677 s32 interval_tm, rem;
678 unsigned long flags;
679 struct ieee80211_conf *conf = NULL;
680 u16 beacon_int;
681
682 conf = ieee80211_get_hw_conf(priv->hw);
683
684 spin_lock_irqsave(&priv->lock, flags);
685 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
686 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
687
688 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
689 beacon_int = priv->beacon_int;
690 priv->rxon_timing.atim_window = 0;
691 } else {
692 beacon_int = priv->vif->bss_conf.beacon_int;
693
694 /* TODO: we need to get atim_window from upper stack
695 * for now we set to 0 */
696 priv->rxon_timing.atim_window = 0;
697 }
698
699 beacon_int = iwl_adjust_beacon_interval(beacon_int,
700 priv->hw_params.max_beacon_itrvl * 1024);
701 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
702
703 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
704 interval_tm = beacon_int * 1024;
705 rem = do_div(tsf, interval_tm);
706 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
707
708 spin_unlock_irqrestore(&priv->lock, flags);
709 IWL_DEBUG_ASSOC(priv,
710 "beacon interval %d beacon timer %d beacon tim %d\n",
711 le16_to_cpu(priv->rxon_timing.beacon_interval),
712 le32_to_cpu(priv->rxon_timing.beacon_init_val),
713 le16_to_cpu(priv->rxon_timing.atim_window));
714}
715EXPORT_SYMBOL(iwl_setup_rxon_timing);
716
8ccde88a
SO		 717void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
718{
719 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
720
721 if (hw_decrypt)
722 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
723 else
724 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
725
726}
727EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
728
729/**
730 * iwl_check_rxon_cmd - validate RXON structure is valid
731 *
732 * NOTE: This is really only useful during development and can eventually
733 * be #ifdef'd out once the driver is stable and folks aren't actively
734 * making changes
735 */
736int iwl_check_rxon_cmd(struct iwl_priv *priv)
737{
738 int error = 0;
739 int counter = 1;
740 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
741
742 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
743 error |= le32_to_cpu(rxon->flags &
744 (RXON_FLG_TGJ_NARROW_BAND_MSK |
745 RXON_FLG_RADAR_DETECT_MSK));
746 if (error)
747 IWL_WARN(priv, "check 24G fields %d | %d\n",
748 counter++, error);
749 } else {
750 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
751 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
752 if (error)
753 IWL_WARN(priv, "check 52 fields %d | %d\n",
754 counter++, error);
755 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
756 if (error)
757 IWL_WARN(priv, "check 52 CCK %d | %d\n",
758 counter++, error);
759 }
760 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
761 if (error)
762 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
763
764 /* make sure basic rates 6Mbps and 1Mbps are supported */
765 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
766 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
767 if (error)
768 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
769
770 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
771 if (error)
772 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
773
774 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
775 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
776 if (error)
777 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
778 counter++, error);
779
780 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
781 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
782 if (error)
783 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
784 counter++, error);
785
786 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
787 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
788 if (error)
789 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
790 counter++, error);
791
792 if (error)
793 IWL_WARN(priv, "Tuning to channel %d\n",
794 le16_to_cpu(rxon->channel));
795
796 if (error) {
797 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
798 return -1;
799 }
800 return 0;
801}
802EXPORT_SYMBOL(iwl_check_rxon_cmd);
803
804/**
805 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
806 * @priv: staging_rxon is compared to active_rxon
807 *
808 * If the RXON structure is changing enough to require a new tune,
809 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
810 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
811 */
812int iwl_full_rxon_required(struct iwl_priv *priv)
813{
814
815 /* These items are only settable from the full RXON command */
816 if (!(iwl_is_associated(priv)) ||
817 compare_ether_addr(priv->staging_rxon.bssid_addr,
818 priv->active_rxon.bssid_addr) ||
819 compare_ether_addr(priv->staging_rxon.node_addr,
820 priv->active_rxon.node_addr) ||
821 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
822 priv->active_rxon.wlap_bssid_addr) ||
823 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
824 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
825 (priv->staging_rxon.air_propagation !=
826 priv->active_rxon.air_propagation) ||
827 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
828 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
829 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
830 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 831 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
832 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 833 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
834 return 1;
835
836 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
837 * be updated with the RXON_ASSOC command -- however only some
838 * flag transitions are allowed using RXON_ASSOC */
839
840 /* Check if we are not switching bands */
841 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
842 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
843 return 1;
844
845 /* Check if we are switching association toggle */
846 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
847 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
848 return 1;
849
850 return 0;
851}
852EXPORT_SYMBOL(iwl_full_rxon_required);
853
854u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
855{
856 int i;
857 int rate_mask;
858
859 /* Set rate mask*/
860 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
861 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
862 else
863 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
864
865 /* Find lowest valid rate */
866 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
867 i = iwl_rates[i].next_ieee) {
868 if (rate_mask & (1 << i))
869 return iwl_rates[i].plcp;
870 }
871
872 /* No valid rate was found. Assign the lowest one */
873 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
874 return IWL_RATE_1M_PLCP;
875 else
876 return IWL_RATE_6M_PLCP;
877}
878EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
879
47c5196e
TW		 880void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
881{
c1adf9fb 882 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 883
42eb7c64 884 if (!ht_info->is_ht) {
a2b0f02e 885 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 886 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 887 RXON_FLG_HT40_PROT_MSK |
42eb7c64 888 RXON_FLG_HT_PROT_MSK);
47c5196e 889 return;
42eb7c64 890 }
47c5196e 891
a2b0f02e
WYG		 892 /* FIXME: if the definition of ht_protection changed, the "translation"
893 * will be needed for rxon->flags
894 */
895 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
896
897 /* Set up channel bandwidth:
7aafef1c 898 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 899 /* clear the HT channel mode before set the mode */
900 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
901 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 902 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
903 /* pure ht40 */
508b08e7 904 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 905 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7
WYG		 906 /* Note: control channel is opposite of extension channel */
907 switch (ht_info->extension_chan_offset) {
908 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
909 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
910 break;
911 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
912 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
913 break;
914 }
915 } else {
a2b0f02e
WYG		 916 /* Note: control channel is opposite of extension channel */
917 switch (ht_info->extension_chan_offset) {
918 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
919 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
920 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
921 break;
922 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
923 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
924 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
925 break;
926 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
927 default:
928 /* channel location only valid if in Mixed mode */
929 IWL_ERR(priv, "invalid extension channel offset\n");
930 break;
931 }
932 }
933 } else {
934 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 935 }
936
45823531
AK		 937 if (priv->cfg->ops->hcmd->set_rxon_chain)
938 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 939
e1623446 940 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
47c5196e 941 "rxon flags 0x%X operation mode :0x%X "
ae5eb026 942 "extension channel offset 0x%x\n",
d9fe60de
JB		 943 ht_info->mcs.rx_mask[0],
944 ht_info->mcs.rx_mask[1],
945 ht_info->mcs.rx_mask[2],
47c5196e 946 le32_to_cpu(rxon->flags), ht_info->ht_protection,
ae5eb026 947 ht_info->extension_chan_offset);
47c5196e
TW		 948 return;
949}
950EXPORT_SYMBOL(iwl_set_rxon_ht);
951
9e5e6c32
TW		 952#define IWL_NUM_RX_CHAINS_MULTIPLE 3
953#define IWL_NUM_RX_CHAINS_SINGLE 2
954#define IWL_NUM_IDLE_CHAINS_DUAL 2
955#define IWL_NUM_IDLE_CHAINS_SINGLE 1
956
957/* Determine how many receiver/antenna chains to use.
c7de35cd
RR		 958 * More provides better reception via diversity. Fewer saves power.
959 * MIMO (dual stream) requires at least 2, but works better with 3.
960 * This does not determine *which* chains to use, just how many.
961 */
28a6b07a 962static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 963{
28a6b07a
TW		 964 bool is_single = is_single_rx_stream(priv);
965 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd
RR		 966
967 /* # of Rx chains to use when expecting MIMO. */
12837be1
RR		 968 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
969 WLAN_HT_CAP_SM_PS_STATIC)))
9e5e6c32 970 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 971 else
9e5e6c32 972 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 973}
c7de35cd 974
28a6b07a
TW		 975static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
976{
977 int idle_cnt;
978 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd 979 /* # Rx chains when idling and maybe trying to save power */
12837be1 980 switch (priv->current_ht_config.sm_ps) {
00c5ae2f
TW		 981 case WLAN_HT_CAP_SM_PS_STATIC:
982 case WLAN_HT_CAP_SM_PS_DYNAMIC:
9e5e6c32
TW		 983 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
984 IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 985 break;
00c5ae2f 986 case WLAN_HT_CAP_SM_PS_DISABLED:
9e5e6c32 987 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 988 break;
00c5ae2f 989 case WLAN_HT_CAP_SM_PS_INVALID:
c7de35cd 990 default:
15b1687c 991 IWL_ERR(priv, "invalid mimo ps mode %d\n",
12837be1 992 priv->current_ht_config.sm_ps);
28a6b07a
TW		 993 WARN_ON(1);
994 idle_cnt = -1;
c7de35cd
RR		 995 break;
996 }
28a6b07a 997 return idle_cnt;
c7de35cd
RR		 998}
999
04816448
GE		 1000/* up to 4 chains */
1001static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1002{
1003 u8 res;
1004 res = (chain_bitmap & BIT(0)) >> 0;
1005 res += (chain_bitmap & BIT(1)) >> 1;
1006 res += (chain_bitmap & BIT(2)) >> 2;
1007 res += (chain_bitmap & BIT(4)) >> 4;
1008 return res;
1009}
1010
4c4df78f
CR		 1011/**
1012 * iwl_is_monitor_mode - Determine if interface in monitor mode
1013 *
1014 * priv->iw_mode is set in add_interface, but add_interface is
1015 * never called for monitor mode. The only way mac80211 informs us about
1016 * monitor mode is through configuring filters (call to configure_filter).
1017 */
279b05d4 1018bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 1019{
1020 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1021}
279b05d4 1022EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 1023
c7de35cd
RR		 1024/**
1025 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1026 *
1027 * Selects how many and which Rx receivers/antennas/chains to use.
1028 * This should not be used for scan command ... it puts data in wrong place.
1029 */
1030void iwl_set_rxon_chain(struct iwl_priv *priv)
1031{
28a6b07a
TW		 1032 bool is_single = is_single_rx_stream(priv);
1033 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 1034 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1035 u32 active_chains;
28a6b07a 1036 u16 rx_chain;
c7de35cd
RR		 1037
1038 /* Tell uCode which antennas are actually connected.
1039 * Before first association, we assume all antennas are connected.
1040 * Just after first association, iwl_chain_noise_calibration()
1041 * checks which antennas actually *are* connected. */
04816448
GE		 1042 if (priv->chain_noise_data.active_chains)
1043 active_chains = priv->chain_noise_data.active_chains;
1044 else
1045 active_chains = priv->hw_params.valid_rx_ant;
1046
1047 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 1048
1049 /* How many receivers should we use? */
28a6b07a
TW		 1050 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1051 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1052
28a6b07a 1053
04816448
GE		 1054 /* correct rx chain count according hw settings
1055 * and chain noise calibration
1056 */
1057 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1058 if (valid_rx_cnt < active_rx_cnt)
1059 active_rx_cnt = valid_rx_cnt;
1060
1061 if (valid_rx_cnt < idle_rx_cnt)
1062 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 1063
1064 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1065 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1066
7b841727
RF		 1067 /* copied from 'iwl_bg_request_scan()' */
1068 /* Force use of chains B and C (0x6) for Rx for 4965
1069 * Avoid A (0x1) because of its off-channel reception on A-band.
1070 * MIMO is not used here, but value is required */
1071 if (iwl_is_monitor_mode(priv) &&
1072 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1073 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
fff7a434
WYG		 1074 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1075 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1076 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1077 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 1078 }
1079
28a6b07a
TW		 1080 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1081
9e5e6c32 1082 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 1083 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1084 else
1085 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1086
e1623446 1087 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 1088 priv->staging_rxon.rx_chain,
1089 active_rx_cnt, idle_rx_cnt);
1090
1091 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1092 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 1093}
1094EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 1095
1096/**
17e72782 1097 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 1098 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1099 * @channel: Any channel valid for the requested phymode
1100
1101 * In addition to setting the staging RXON, priv->phymode is also set.
1102 *
1103 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1104 * in the staging RXON flag structure based on the phymode
1105 */
17e72782 1106int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 1107{
17e72782
TW		 1108 enum ieee80211_band band = ch->band;
1109 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1110
8622e705 1111 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1112 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1113 channel, band);
1114 return -EINVAL;
1115 }
1116
1117 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1118 (priv->band == band))
1119 return 0;
1120
1121 priv->staging_rxon.channel = cpu_to_le16(channel);
1122 if (band == IEEE80211_BAND_5GHZ)
1123 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1124 else
1125 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1126
1127 priv->band = band;
1128
e1623446 1129 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1130
1131 return 0;
1132}
c7de35cd 1133EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1134
8ccde88a
SO		 1135void iwl_set_flags_for_band(struct iwl_priv *priv,
1136 enum ieee80211_band band)
1137{
1138 if (band == IEEE80211_BAND_5GHZ) {
1139 priv->staging_rxon.flags &=
1140 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1141 | RXON_FLG_CCK_MSK);
1142 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1143 } else {
1144 /* Copied from iwl_post_associate() */
1145 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1146 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1147 else
1148 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1149
1150 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1151 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1152
1153 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1154 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1155 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1156 }
1157}
8ccde88a
SO		 1158
1159/*
1160 * initialize rxon structure with default values from eeprom
1161 */
1162void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1163{
1164 const struct iwl_channel_info *ch_info;
1165
1166 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1167
1168 switch (mode) {
1169 case NL80211_IFTYPE_AP:
1170 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1171 break;
1172
1173 case NL80211_IFTYPE_STATION:
1174 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1175 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1176 break;
1177
1178 case NL80211_IFTYPE_ADHOC:
1179 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1180 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1181 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1182 RXON_FILTER_ACCEPT_GRP_MSK;
1183 break;
1184
8ccde88a
SO		 1185 default:
1186 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1187 break;
1188 }
1189
1190#if 0
1191 /* TODO: Figure out when short_preamble would be set and cache from
1192 * that */
1193 if (!hw_to_local(priv->hw)->short_preamble)
1194 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1195 else
1196 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1197#endif
1198
1199 ch_info = iwl_get_channel_info(priv, priv->band,
1200 le16_to_cpu(priv->active_rxon.channel));
1201
1202 if (!ch_info)
1203 ch_info = &priv->channel_info[0];
1204
1205 /*
1206 * in some case A channels are all non IBSS
1207 * in this case force B/G channel
1208 */
1209 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1210 !(is_channel_ibss(ch_info)))
1211 ch_info = &priv->channel_info[0];
1212
1213 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1214 priv->band = ch_info->band;
1215
1216 iwl_set_flags_for_band(priv, priv->band);
1217
1218 priv->staging_rxon.ofdm_basic_rates =
1219 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1220 priv->staging_rxon.cck_basic_rates =
1221 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1222
a2b0f02e
WYG		 1223 /* clear both MIX and PURE40 mode flag */
1224 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1225 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1226 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1227 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1228 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1229 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1230 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1231}
1232EXPORT_SYMBOL(iwl_connection_init_rx_config);
1233
782571f4 1234static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1235{
1236 const struct ieee80211_supported_band *hw = NULL;
1237 struct ieee80211_rate *rate;
1238 int i;
1239
1240 hw = iwl_get_hw_mode(priv, priv->band);
1241 if (!hw) {
1242 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1243 return;
1244 }
1245
1246 priv->active_rate = 0;
1247 priv->active_rate_basic = 0;
1248
1249 for (i = 0; i < hw->n_bitrates; i++) {
1250 rate = &(hw->bitrates[i]);
5027309b 1251 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1252 priv->active_rate |= (1 << rate->hw_value);
1253 }
1254
e1623446 1255 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1256 priv->active_rate, priv->active_rate_basic);
1257
1258 /*
1259 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1260 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1261 * OFDM
1262 */
1263 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1264 priv->staging_rxon.cck_basic_rates =
1265 ((priv->active_rate_basic &
1266 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1267 else
1268 priv->staging_rxon.cck_basic_rates =
1269 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1270
1271 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1272 priv->staging_rxon.ofdm_basic_rates =
1273 ((priv->active_rate_basic &
1274 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1275 IWL_FIRST_OFDM_RATE) & 0xFF;
1276 else
1277 priv->staging_rxon.ofdm_basic_rates =
1278 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1279}
8ccde88a
SO		 1280
1281void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1282{
1283 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1284 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1285 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
e1623446 1286 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
8ccde88a
SO		 1287 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1288 rxon->channel = csa->channel;
1289 priv->staging_rxon.channel = csa->channel;
1290}
1291EXPORT_SYMBOL(iwl_rx_csa);
1292
1293#ifdef CONFIG_IWLWIFI_DEBUG
1294static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1295{
1296 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1297
e1623446 1298 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1299 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1300 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1301 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1302 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1303 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1304 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1305 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1306 rxon->ofdm_basic_rates);
e1623446
TW		 1307 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1308 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1309 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1310 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1311}
8ccde88a 1312
a94ca4e7
JB		 1313static const char *desc_lookup_text[] = {
1314 "OK",
1315 "FAIL",
1316 "BAD_PARAM",
1317 "BAD_CHECKSUM",
1318 "NMI_INTERRUPT_WDG",
1319 "SYSASSERT",
1320 "FATAL_ERROR",
1321 "BAD_COMMAND",
1322 "HW_ERROR_TUNE_LOCK",
1323 "HW_ERROR_TEMPERATURE",
1324 "ILLEGAL_CHAN_FREQ",
1325 "VCC_NOT_STABLE",
1326 "FH_ERROR",
1327 "NMI_INTERRUPT_HOST",
1328 "NMI_INTERRUPT_ACTION_PT",
1329 "NMI_INTERRUPT_UNKNOWN",
1330 "UCODE_VERSION_MISMATCH",
1331 "HW_ERROR_ABS_LOCK",
1332 "HW_ERROR_CAL_LOCK_FAIL",
1333 "NMI_INTERRUPT_INST_ACTION_PT",
1334 "NMI_INTERRUPT_DATA_ACTION_PT",
1335 "NMI_TRM_HW_ER",
1336 "NMI_INTERRUPT_TRM",
1337 "NMI_INTERRUPT_BREAK_POINT"
1338 "DEBUG_0",
1339 "DEBUG_1",
1340 "DEBUG_2",
1341 "DEBUG_3",
1342 "UNKNOWN"
1343};
1344
1345static const char *desc_lookup(int i)
1346{
1347 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1348
1349 if (i < 0 || i > max)
1350 i = max;
1351
1352 return desc_lookup_text[i];
1353}
1354
1355#define ERROR_START_OFFSET (1 * sizeof(u32))
1356#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1357
1358static void iwl_dump_nic_error_log(struct iwl_priv *priv)
1359{
1360 u32 data2, line;
1361 u32 desc, time, count, base, data1;
1362 u32 blink1, blink2, ilink1, ilink2;
1363
c03ea162 1364 if (priv->ucode_type == UCODE_INIT)
34a66de6 1365 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
c03ea162
RC		 1366 else
1367 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
a94ca4e7
JB		 1368
1369 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1370 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1371 return;
1372 }
1373
1374 count = iwl_read_targ_mem(priv, base);
1375
1376 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1377 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1378 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1379 priv->status, count);
1380 }
1381
1382 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1383 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1384 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1385 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1386 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1387 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1388 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1389 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1390 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1391
1392 IWL_ERR(priv, "Desc Time "
1393 "data1 data2 line\n");
1394 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1395 desc_lookup(desc), desc, time, data1, data2, line);
1396 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1397 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1398 ilink1, ilink2);
1399
1400}
1401
1402#define EVENT_START_OFFSET (4 * sizeof(u32))
1403
1404/**
1405 * iwl_print_event_log - Dump error event log to syslog
1406 *
1407 */
1408static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1409 u32 num_events, u32 mode)
1410{
1411 u32 i;
1412 u32 base; /* SRAM byte address of event log header */
1413 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1414 u32 ptr; /* SRAM byte address of log data */
1415 u32 ev, time, data; /* event log data */
1416
1417 if (num_events == 0)
1418 return;
c03ea162 1419 if (priv->ucode_type == UCODE_INIT)
34a66de6 1420 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
c03ea162
RC		 1421 else
1422 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
a94ca4e7
JB		 1423
1424 if (mode == 0)
1425 event_size = 2 * sizeof(u32);
1426 else
1427 event_size = 3 * sizeof(u32);
1428
1429 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1430
1431 /* "time" is actually "data" for mode 0 (no timestamp).
1432 * place event id # at far right for easier visual parsing. */
1433 for (i = 0; i < num_events; i++) {
1434 ev = iwl_read_targ_mem(priv, ptr);
1435 ptr += sizeof(u32);
1436 time = iwl_read_targ_mem(priv, ptr);
1437 ptr += sizeof(u32);
1438 if (mode == 0) {
1439 /* data, ev */
1440 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1441 } else {
1442 data = iwl_read_targ_mem(priv, ptr);
1443 ptr += sizeof(u32);
1444 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1445 time, data, ev);
1446 }
1447 }
1448}
1449
1450void iwl_dump_nic_event_log(struct iwl_priv *priv)
1451{
1452 u32 base; /* SRAM byte address of event log header */
1453 u32 capacity; /* event log capacity in # entries */
1454 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1455 u32 num_wraps; /* # times uCode wrapped to top of log */
1456 u32 next_entry; /* index of next entry to be written by uCode */
1457 u32 size; /* # entries that we'll print */
1458
c03ea162 1459 if (priv->ucode_type == UCODE_INIT)
34a66de6 1460 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
c03ea162
RC		 1461 else
1462 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
a94ca4e7
JB		 1463
1464 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1465 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1466 return;
1467 }
1468
1469 /* event log header */
1470 capacity = iwl_read_targ_mem(priv, base);
1471 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1472 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1473 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1474
1475 size = num_wraps ? capacity : next_entry;
1476
1477 /* bail out if nothing in log */
1478 if (size == 0) {
1479 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1480 return;
1481 }
1482
1483 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1484 size, num_wraps);
1485
1486 /* if uCode has wrapped back to top of log, start at the oldest entry,
1487 * i.e the next one that uCode would fill. */
1488 if (num_wraps)
1489 iwl_print_event_log(priv, next_entry,
1490 capacity - next_entry, mode);
1491 /* (then/else) start at top of log */
1492 iwl_print_event_log(priv, 0, next_entry, mode);
1493
1494}
6686d17e 1495#endif
8ccde88a
SO		 1496/**
1497 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1498 */
1499void iwl_irq_handle_error(struct iwl_priv *priv)
1500{
1501 /* Set the FW error flag -- cleared on iwl_down */
1502 set_bit(STATUS_FW_ERROR, &priv->status);
1503
1504 /* Cancel currently queued command. */
1505 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1506
1507#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1508 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
8ccde88a
SO		 1509 iwl_dump_nic_error_log(priv);
1510 iwl_dump_nic_event_log(priv);
1511 iwl_print_rx_config_cmd(priv);
1512 }
1513#endif
1514
1515 wake_up_interruptible(&priv->wait_command_queue);
1516
1517 /* Keep the restart process from trying to send host
1518 * commands by clearing the INIT status bit */
1519 clear_bit(STATUS_READY, &priv->status);
1520
1521 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1522 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1523 "Restarting adapter due to uCode error.\n");
1524
8ccde88a
SO		 1525 if (priv->cfg->mod_params->restart_fw)
1526 queue_work(priv->workqueue, &priv->restart);
1527 }
1528}
1529EXPORT_SYMBOL(iwl_irq_handle_error);
1530
1531void iwl_configure_filter(struct ieee80211_hw *hw,
1532 unsigned int changed_flags,
1533 unsigned int *total_flags,
3ac64bee 1534 u64 multicast)
8ccde88a
SO		 1535{
1536 struct iwl_priv *priv = hw->priv;
1537 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1538
e1623446 1539 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1540 changed_flags, *total_flags);
1541
1542 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1543 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1544 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1545 else
1546 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1547 }
1548 if (changed_flags & FIF_ALLMULTI) {
1549 if (*total_flags & FIF_ALLMULTI)
1550 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1551 else
1552 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1553 }
1554 if (changed_flags & FIF_CONTROL) {
1555 if (*total_flags & FIF_CONTROL)
1556 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1557 else
1558 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1559 }
1560 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1561 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1562 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1563 else
1564 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1565 }
1566
1567 /* We avoid iwl_commit_rxon here to commit the new filter flags
1568 * since mac80211 will call ieee80211_hw_config immediately.
1569 * (mc_list is not supported at this time). Otherwise, we need to
1570 * queue a background iwl_commit_rxon work.
1571 */
1572
1573 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1574 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1575}
1576EXPORT_SYMBOL(iwl_configure_filter);
1577
6ba87956 1578int iwl_setup_mac(struct iwl_priv *priv)
bf85ea4f 1579{
6ba87956 1580 int ret;
bf85ea4f 1581 struct ieee80211_hw *hw = priv->hw;
e227ceac 1582 hw->rate_control_algorithm = "iwl-agn-rs";
bf85ea4f 1583
566bfe5a 1584 /* Tell mac80211 our characteristics */
605a0bd6 1585 hw->flags = IEEE80211_HW_SIGNAL_DBM |
8b30b1fe 1586 IEEE80211_HW_NOISE_DBM |
4be8c387 1587 IEEE80211_HW_AMPDU_AGGREGATION |
559a4741
JB		 1588 IEEE80211_HW_SPECTRUM_MGMT;
1589
1590 if (!priv->cfg->broken_powersave)
1591 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
1592 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
1593
f59ac048 1594 hw->wiphy->interface_modes =
f59ac048
LR		 1595 BIT(NL80211_IFTYPE_STATION) |
1596 BIT(NL80211_IFTYPE_ADHOC);
ea4a82dc 1597
2a44f911 1598 hw->wiphy->custom_regulatory = true;
1ecf9fc1 1599
37184244
LR		 1600 /* Firmware does not support this */
1601 hw->wiphy->disable_beacon_hints = true;
1602
b23da49e
JB		 1603 /*
1604 * For now, disable PS by default because it affects
1605 * RX performance significantly.
1606 */
1607 hw->wiphy->ps_default = false;
1608
1ecf9fc1
JB		 1609 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1610 /* we create the 802.11 header and a zero-length SSID element */
1611 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
ea4a82dc 1612
bf85ea4f
AK		 1613 /* Default value; 4 EDCA QOS priorities */
1614 hw->queues = 4;
6ba87956 1615
b5d7be5e 1616 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
6ba87956
TW		 1617
1618 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1619 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1620 &priv->bands[IEEE80211_BAND_2GHZ];
1621 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1622 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1623 &priv->bands[IEEE80211_BAND_5GHZ];
1624
1625 ret = ieee80211_register_hw(priv->hw);
1626 if (ret) {
15b1687c 1627 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
6ba87956
TW		 1628 return ret;
1629 }
1630 priv->mac80211_registered = 1;
1631
1632 return 0;
bf85ea4f 1633}
6ba87956 1634EXPORT_SYMBOL(iwl_setup_mac);
bf85ea4f 1635
da154e30
RR		 1636int iwl_set_hw_params(struct iwl_priv *priv)
1637{
da154e30
RR		 1638 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1639 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1640 if (priv->cfg->mod_params->amsdu_size_8K)
1641 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1642 else
1643 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1644 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1645
2c2f3b33
TW		 1646 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1647
49779293
RR		 1648 if (priv->cfg->mod_params->disable_11n)
1649 priv->cfg->sku &= ~IWL_SKU_N;
1650
da154e30
RR		 1651 /* Device-specific setup */
1652 return priv->cfg->ops->lib->set_hw_params(priv);
1653}
1654EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956
TW		 1655
1656int iwl_init_drv(struct iwl_priv *priv)
c7de35cd
RR		 1657{
1658 int ret;
c7de35cd 1659
c7de35cd
RR		 1660 priv->ibss_beacon = NULL;
1661
1662 spin_lock_init(&priv->lock);
c7de35cd
RR		 1663 spin_lock_init(&priv->sta_lock);
1664 spin_lock_init(&priv->hcmd_lock);
c7de35cd 1665
c7de35cd
RR		 1666 INIT_LIST_HEAD(&priv->free_frames);
1667
1668 mutex_init(&priv->mutex);
1669
1670 /* Clear the driver's (not device's) station table */
c587de0b 1671 iwl_clear_stations_table(priv);
c7de35cd
RR		 1672
1673 priv->data_retry_limit = -1;
1674 priv->ieee_channels = NULL;
1675 priv->ieee_rates = NULL;
1676 priv->band = IEEE80211_BAND_2GHZ;
1677
05c914fe 1678 priv->iw_mode = NL80211_IFTYPE_STATION;
c7de35cd 1679
12837be1 1680 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
c7de35cd
RR		 1681
1682 /* Choose which receivers/antennas to use */
45823531
AK		 1683 if (priv->cfg->ops->hcmd->set_rxon_chain)
1684 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1685
f53696de 1686 iwl_init_scan_params(priv);
c7de35cd
RR		 1687
1688 iwl_reset_qos(priv);
1689
1690 priv->qos_data.qos_active = 0;
1691 priv->qos_data.qos_cap.val = 0;
1692
c7de35cd 1693 priv->rates_mask = IWL_RATES_MASK;
02eec9c5
WYG		 1694 /* Set the tx_power_user_lmt to the lowest power level
1695 * this value will get overwritten by channel max power avg
1696 * from eeprom */
1697 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR		 1698
1699 ret = iwl_init_channel_map(priv);
1700 if (ret) {
15b1687c 1701 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
c7de35cd
RR		 1702 goto err;
1703 }
1704
1705 ret = iwlcore_init_geos(priv);
1706 if (ret) {
15b1687c 1707 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
c7de35cd
RR		 1708 goto err_free_channel_map;
1709 }
534166de 1710 iwlcore_init_hw_rates(priv, priv->ieee_rates);
c7de35cd 1711
c7de35cd
RR		 1712 return 0;
1713
c7de35cd
RR		 1714err_free_channel_map:
1715 iwl_free_channel_map(priv);
1716err:
1717 return ret;
1718}
6ba87956 1719EXPORT_SYMBOL(iwl_init_drv);
c7de35cd 1720
630fe9b6
TW		 1721int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1722{
1723 int ret = 0;
5eadd94b
WYG		 1724 s8 prev_tx_power = priv->tx_power_user_lmt;
1725
630fe9b6 1726 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1727 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1728 tx_power,
1729 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1730 return -EINVAL;
1731 }
1732
dc1b0973 1733 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1734 IWL_WARN(priv,
1735 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1736 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1737 return -EINVAL;
1738 }
1739
1740 if (priv->tx_power_user_lmt != tx_power)
1741 force = true;
1742
019fb97d 1743 /* if nic is not up don't send command */
5eadd94b
WYG		 1744 if (iwl_is_ready_rf(priv)) {
1745 priv->tx_power_user_lmt = tx_power;
1746 if (force && priv->cfg->ops->lib->send_tx_power)
1747 ret = priv->cfg->ops->lib->send_tx_power(priv);
1748 else if (!priv->cfg->ops->lib->send_tx_power)
1749 ret = -EOPNOTSUPP;
1750 /*
1751 * if fail to set tx_power, restore the orig. tx power
1752 */
1753 if (ret)
1754 priv->tx_power_user_lmt = prev_tx_power;
1755 }
630fe9b6 1756
5eadd94b
WYG		 1757 /*
1758 * Even this is an async host command, the command
1759 * will always report success from uCode
1760 * So once driver can placing the command into the queue
1761 * successfully, driver can use priv->tx_power_user_lmt
1762 * to reflect the current tx power
1763 */
630fe9b6
TW		 1764 return ret;
1765}
1766EXPORT_SYMBOL(iwl_set_tx_power);
1767
6ba87956 1768void iwl_uninit_drv(struct iwl_priv *priv)
bf85ea4f 1769{
6e21f2c1 1770 iwl_calib_free_results(priv);
6ba87956
TW		 1771 iwlcore_free_geos(priv);
1772 iwl_free_channel_map(priv);
261415f7 1773 kfree(priv->scan);
bf85ea4f 1774}
6ba87956 1775EXPORT_SYMBOL(iwl_uninit_drv);
bf85ea4f 1776
ef850d7c
MA		 1777#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1778
1779/* Free dram table */
1780void iwl_free_isr_ict(struct iwl_priv *priv)
1781{
1782 if (priv->ict_tbl_vir) {
1783 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1784 PAGE_SIZE, priv->ict_tbl_vir,
1785 priv->ict_tbl_dma);
1786 priv->ict_tbl_vir = NULL;
1787 }
1788}
1789EXPORT_SYMBOL(iwl_free_isr_ict);
1790
1791
1792/* allocate dram shared table it is a PAGE_SIZE aligned
1793 * also reset all data related to ICT table interrupt.
1794 */
1795int iwl_alloc_isr_ict(struct iwl_priv *priv)
1796{
1797
1798 if (priv->cfg->use_isr_legacy)
1799 return 0;
1800 /* allocate shrared data table */
1801 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1802 ICT_COUNT) + PAGE_SIZE,
1803 &priv->ict_tbl_dma);
1804 if (!priv->ict_tbl_vir)
1805 return -ENOMEM;
1806
1807 /* align table to PAGE_SIZE boundry */
1808 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1809
1810 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1811 (unsigned long long)priv->ict_tbl_dma,
1812 (unsigned long long)priv->aligned_ict_tbl_dma,
1813 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1814
1815 priv->ict_tbl = priv->ict_tbl_vir +
1816 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1817
1818 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1819 priv->ict_tbl, priv->ict_tbl_vir,
1820 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1821
1822 /* reset table and index to all 0 */
1823 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1824 priv->ict_index = 0;
1825
40cefda9
MA		 1826 /* add periodic RX interrupt */
1827 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
ef850d7c
MA		 1828 return 0;
1829}
1830EXPORT_SYMBOL(iwl_alloc_isr_ict);
1831
1832/* Device is going up inform it about using ICT interrupt table,
1833 * also we need to tell the driver to start using ICT interrupt.
1834 */
1835int iwl_reset_ict(struct iwl_priv *priv)
1836{
1837 u32 val;
1838 unsigned long flags;
1839
1840 if (!priv->ict_tbl_vir)
1841 return 0;
1842
1843 spin_lock_irqsave(&priv->lock, flags);
1844 iwl_disable_interrupts(priv);
1845
1303dcfd 1846 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
ef850d7c
MA		 1847
1848 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1849
1850 val |= CSR_DRAM_INT_TBL_ENABLE;
1851 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1852
1853 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1854 "aligned dma address %Lx\n",
1855 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1856
1857 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1858 priv->use_ict = true;
1859 priv->ict_index = 0;
40cefda9 1860 iwl_write32(priv, CSR_INT, priv->inta_mask);
ef850d7c
MA		 1861 iwl_enable_interrupts(priv);
1862 spin_unlock_irqrestore(&priv->lock, flags);
1863
1864 return 0;
1865}
1866EXPORT_SYMBOL(iwl_reset_ict);
1867
1868/* Device is going down disable ict interrupt usage */
1869void iwl_disable_ict(struct iwl_priv *priv)
1870{
1871 unsigned long flags;
1872
1873 spin_lock_irqsave(&priv->lock, flags);
1874 priv->use_ict = false;
1875 spin_unlock_irqrestore(&priv->lock, flags);
1876}
1877EXPORT_SYMBOL(iwl_disable_ict);
1878
1879/* interrupt handler using ict table, with this interrupt driver will
1880 * stop using INTA register to get device's interrupt, reading this register
1881 * is expensive, device will write interrupts in ICT dram table, increment
1882 * index then will fire interrupt to driver, driver will OR all ICT table
1883 * entries from current index up to table entry with 0 value. the result is
1884 * the interrupt we need to service, driver will set the entries back to 0 and
1885 * set index.
1886 */
1887irqreturn_t iwl_isr_ict(int irq, void *data)
1888{
1889 struct iwl_priv *priv = data;
1890 u32 inta, inta_mask;
1891 u32 val = 0;
1892
1893 if (!priv)
1894 return IRQ_NONE;
1895
1896 /* dram interrupt table not set yet,
1897 * use legacy interrupt.
1898 */
1899 if (!priv->use_ict)
1900 return iwl_isr(irq, data);
1901
1902 spin_lock(&priv->lock);
1903
1904 /* Disable (but don't clear!) interrupts here to avoid
1905 * back-to-back ISRs and sporadic interrupts from our NIC.
1906 * If we have something to service, the tasklet will re-enable ints.
1907 * If we *don't* have something, we'll re-enable before leaving here.
1908 */
1909 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1910 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1911
1912
1913 /* Ignore interrupt if there's nothing in NIC to service.
1914 * This may be due to IRQ shared with another device,
1915 * or due to sporadic interrupts thrown from our NIC. */
1916 if (!priv->ict_tbl[priv->ict_index]) {
1917 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1918 goto none;
1919 }
1920
1921 /* read all entries that not 0 start with ict_index */
1922 while (priv->ict_tbl[priv->ict_index]) {
1923
1303dcfd 1924 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
ef850d7c 1925 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1303dcfd
JB		 1926 priv->ict_index,
1927 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
ef850d7c
MA		 1928 priv->ict_tbl[priv->ict_index] = 0;
1929 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1303dcfd 1930 ICT_COUNT);
ef850d7c
MA		 1931
1932 }
1933
1934 /* We should not get this value, just ignore it. */
1935 if (val == 0xffffffff)
1936 val = 0;
1937
1938 inta = (0xff & val) | ((0xff00 & val) << 16);
1939 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1940 inta, inta_mask, val);
1941
40cefda9 1942 inta &= priv->inta_mask;
ef850d7c
MA		 1943 priv->inta |= inta;
1944
1945 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1946 if (likely(inta))
1947 tasklet_schedule(&priv->irq_tasklet);
1948 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1949 /* Allow interrupt if was disabled by this handler and
1950 * no tasklet was schedules, We should not enable interrupt,
1951 * tasklet will enable it.
1952 */
1953 iwl_enable_interrupts(priv);
1954 }
1955
1956 spin_unlock(&priv->lock);
1957 return IRQ_HANDLED;
1958
1959 none:
1960 /* re-enable interrupts here since we don't have anything to service.
1961 * only Re-enable if disabled by irq.
1962 */
1963 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1964 iwl_enable_interrupts(priv);
1965
1966 spin_unlock(&priv->lock);
1967 return IRQ_NONE;
1968}
1969EXPORT_SYMBOL(iwl_isr_ict);
1970
1971
1972static irqreturn_t iwl_isr(int irq, void *data)
1973{
1974 struct iwl_priv *priv = data;
1975 u32 inta, inta_mask;
d651ae32 1976#ifdef CONFIG_IWLWIFI_DEBUG
ef850d7c 1977 u32 inta_fh;
d651ae32 1978#endif
ef850d7c
MA		 1979 if (!priv)
1980 return IRQ_NONE;
1981
1982 spin_lock(&priv->lock);
1983
1984 /* Disable (but don't clear!) interrupts here to avoid
1985 * back-to-back ISRs and sporadic interrupts from our NIC.
1986 * If we have something to service, the tasklet will re-enable ints.
1987 * If we *don't* have something, we'll re-enable before leaving here. */
1988 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1989 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1990
1991 /* Discover which interrupts are active/pending */
1992 inta = iwl_read32(priv, CSR_INT);
1993
1994 /* Ignore interrupt if there's nothing in NIC to service.
1995 * This may be due to IRQ shared with another device,
1996 * or due to sporadic interrupts thrown from our NIC. */
1997 if (!inta) {
1998 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1999 goto none;
2000 }
2001
2002 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2003 /* Hardware disappeared. It might have already raised
2004 * an interrupt */
2005 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
2006 goto unplugged;
2007 }
2008
2009#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 2010 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
ef850d7c
MA		 2011 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2012 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
2013 "fh 0x%08x\n", inta, inta_mask, inta_fh);
2014 }
2015#endif
2016
2017 priv->inta |= inta;
2018 /* iwl_irq_tasklet() will service interrupts and re-enable them */
2019 if (likely(inta))
2020 tasklet_schedule(&priv->irq_tasklet);
2021 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2022 iwl_enable_interrupts(priv);
2023
2024 unplugged:
2025 spin_unlock(&priv->lock);
2026 return IRQ_HANDLED;
2027
2028 none:
2029 /* re-enable interrupts here since we don't have anything to service. */
2030 /* only Re-enable if diabled by irq and no schedules tasklet. */
2031 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2032 iwl_enable_interrupts(priv);
2033
2034 spin_unlock(&priv->lock);
2035 return IRQ_NONE;
2036}
2037
2038irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 2039{
2040 struct iwl_priv *priv = data;
2041 u32 inta, inta_mask;
2042 u32 inta_fh;
2043 if (!priv)
2044 return IRQ_NONE;
2045
2046 spin_lock(&priv->lock);
2047
2048 /* Disable (but don't clear!) interrupts here to avoid
2049 * back-to-back ISRs and sporadic interrupts from our NIC.
2050 * If we have something to service, the tasklet will re-enable ints.
2051 * If we *don't* have something, we'll re-enable before leaving here. */
2052 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
2053 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
2054
2055 /* Discover which interrupts are active/pending */
2056 inta = iwl_read32(priv, CSR_INT);
2057 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2058
2059 /* Ignore interrupt if there's nothing in NIC to service.
2060 * This may be due to IRQ shared with another device,
2061 * or due to sporadic interrupts thrown from our NIC. */
2062 if (!inta && !inta_fh) {
2063 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
2064 goto none;
2065 }
2066
2067 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2068 /* Hardware disappeared. It might have already raised
2069 * an interrupt */
2070 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
2071 goto unplugged;
2072 }
2073
2074 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2075 inta, inta_mask, inta_fh);
2076
2077 inta &= ~CSR_INT_BIT_SCD;
2078
2079 /* iwl_irq_tasklet() will service interrupts and re-enable them */
2080 if (likely(inta || inta_fh))
2081 tasklet_schedule(&priv->irq_tasklet);
2082
2083 unplugged:
2084 spin_unlock(&priv->lock);
2085 return IRQ_HANDLED;
2086
2087 none:
2088 /* re-enable interrupts here since we don't have anything to service. */
2089 /* only Re-enable if diabled by irq */
2090 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2091 iwl_enable_interrupts(priv);
2092 spin_unlock(&priv->lock);
2093 return IRQ_NONE;
2094}
ef850d7c 2095EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 2096
17f841cd
SO		 2097int iwl_send_bt_config(struct iwl_priv *priv)
2098{
2099 struct iwl_bt_cmd bt_cmd = {
2100 .flags = 3,
2101 .lead_time = 0xAA,
2102 .max_kill = 1,
2103 .kill_ack_mask = 0,
2104 .kill_cts_mask = 0,
2105 };
2106
2107 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2108 sizeof(struct iwl_bt_cmd), &bt_cmd);
2109}
2110EXPORT_SYMBOL(iwl_send_bt_config);
2111
49ea8596
EG		 2112int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
2113{
2114 u32 stat_flags = 0;
2115 struct iwl_host_cmd cmd = {
2116 .id = REPLY_STATISTICS_CMD,
c2acea8e 2117 .flags = flags,
49ea8596
EG		 2118 .len = sizeof(stat_flags),
2119 .data = (u8 *) &stat_flags,
2120 };
2121 return iwl_send_cmd(priv, &cmd);
2122}
2123EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 2124
b0692f2f
EG		 2125/**
2126 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2127 * using sample data 100 bytes apart. If these sample points are good,
2128 * it's a pretty good bet that everything between them is good, too.
2129 */
2130static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2131{
2132 u32 val;
2133 int ret = 0;
2134 u32 errcnt = 0;
2135 u32 i;
2136
e1623446 2137 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 2138
b0692f2f
EG		 2139 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2140 /* read data comes through single port, auto-incr addr */
2141 /* NOTE: Use the debugless read so we don't flood kernel log
2142 * if IWL_DL_IO is set */
2143 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2144 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 2145 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2146 if (val != le32_to_cpu(*image)) {
2147 ret = -EIO;
2148 errcnt++;
2149 if (errcnt >= 3)
2150 break;
2151 }
2152 }
2153
b0692f2f
EG		 2154 return ret;
2155}
2156
2157/**
2158 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2159 * looking at all data.
2160 */
2161static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2162 u32 len)
2163{
2164 u32 val;
2165 u32 save_len = len;
2166 int ret = 0;
2167 u32 errcnt;
2168
e1623446 2169 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 2170
250bdd21
SO		 2171 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2172 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 2173
2174 errcnt = 0;
2175 for (; len > 0; len -= sizeof(u32), image++) {
2176 /* read data comes through single port, auto-incr addr */
2177 /* NOTE: Use the debugless read so we don't flood kernel log
2178 * if IWL_DL_IO is set */
2179 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2180 if (val != le32_to_cpu(*image)) {
15b1687c 2181 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 2182 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2183 save_len - len, val, le32_to_cpu(*image));
2184 ret = -EIO;
2185 errcnt++;
2186 if (errcnt >= 20)
2187 break;
2188 }
2189 }
2190
b0692f2f 2191 if (!errcnt)
e1623446
TW		 2192 IWL_DEBUG_INFO(priv,
2193 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 2194
2195 return ret;
2196}
2197
2198/**
2199 * iwl_verify_ucode - determine which instruction image is in SRAM,
2200 * and verify its contents
2201 */
2202int iwl_verify_ucode(struct iwl_priv *priv)
2203{
2204 __le32 *image;
2205 u32 len;
2206 int ret;
2207
2208 /* Try bootstrap */
2209 image = (__le32 *)priv->ucode_boot.v_addr;
2210 len = priv->ucode_boot.len;
2211 ret = iwlcore_verify_inst_sparse(priv, image, len);
2212 if (!ret) {
e1623446 2213 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 2214 return 0;
2215 }
2216
2217 /* Try initialize */
2218 image = (__le32 *)priv->ucode_init.v_addr;
2219 len = priv->ucode_init.len;
2220 ret = iwlcore_verify_inst_sparse(priv, image, len);
2221 if (!ret) {
e1623446 2222 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 2223 return 0;
2224 }
2225
2226 /* Try runtime/protocol */
2227 image = (__le32 *)priv->ucode_code.v_addr;
2228 len = priv->ucode_code.len;
2229 ret = iwlcore_verify_inst_sparse(priv, image, len);
2230 if (!ret) {
e1623446 2231 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 2232 return 0;
2233 }
2234
15b1687c 2235 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 2236
2237 /* Since nothing seems to match, show first several data entries in
2238 * instruction SRAM, so maybe visual inspection will give a clue.
2239 * Selection of bootstrap image (vs. other images) is arbitrary. */
2240 image = (__le32 *)priv->ucode_boot.v_addr;
2241 len = priv->ucode_boot.len;
2242 ret = iwl_verify_inst_full(priv, image, len);
2243
2244 return ret;
2245}
2246EXPORT_SYMBOL(iwl_verify_ucode);
2247
56e12615 2248
47f4a587
EG		 2249void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2250{
2251 struct iwl_ct_kill_config cmd;
672639de 2252 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 2253 unsigned long flags;
2254 int ret = 0;
2255
2256 spin_lock_irqsave(&priv->lock, flags);
2257 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2258 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2259 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 2260 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 2261
672639de
WYG		 2262 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
2263 case CSR_HW_REV_TYPE_1000:
2264 case CSR_HW_REV_TYPE_6x00:
2265 case CSR_HW_REV_TYPE_6x50:
2266 adv_cmd.critical_temperature_enter =
2267 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2268 adv_cmd.critical_temperature_exit =
2269 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2270
2271 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2272 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 2273 if (ret)
2274 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2275 else
2276 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2277 "succeeded, "
2278 "critical temperature enter is %d,"
2279 "exit is %d\n",
2280 priv->hw_params.ct_kill_threshold,
2281 priv->hw_params.ct_kill_exit_threshold);
672639de
WYG		 2282 break;
2283 default:
2284 cmd.critical_temperature_R =
2285 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 2286
672639de
WYG		 2287 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2288 sizeof(cmd), &cmd);
d91b1ba3
WYG		 2289 if (ret)
2290 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2291 else
2292 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2293 "succeeded, "
2294 "critical temperature is %d\n",
2295 priv->hw_params.ct_kill_threshold);
672639de
WYG		 2296 break;
2297 }
47f4a587
EG		 2298}
2299EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 2300
0ad91a35 2301
14a08a7f
EG		 2302/*
2303 * CARD_STATE_CMD
2304 *
2305 * Use: Sets the device's internal card state to enable, disable, or halt
2306 *
2307 * When in the 'enable' state the card operates as normal.
2308 * When in the 'disable' state, the card enters into a low power mode.
2309 * When in the 'halt' state, the card is shut down and must be fully
2310 * restarted to come back on.
2311 */
c496294e 2312int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 2313{
2314 struct iwl_host_cmd cmd = {
2315 .id = REPLY_CARD_STATE_CMD,
2316 .len = sizeof(u32),
2317 .data = &flags,
c2acea8e 2318 .flags = meta_flag,
14a08a7f
EG		 2319 };
2320
2321 return iwl_send_cmd(priv, &cmd);
2322}
2323
030f05ed
AK		 2324void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2325 struct iwl_rx_mem_buffer *rxb)
2326{
2327#ifdef CONFIG_IWLWIFI_DEBUG
2328 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2329 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2330 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2331 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2332#endif
2333}
2334EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2335
2336void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2337 struct iwl_rx_mem_buffer *rxb)
2338{
2339 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
396887a2 2340 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 2341 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 2342 "notification for %s:\n", len,
2343 get_cmd_string(pkt->hdr.cmd));
2344 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 2345}
2346EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 2347
2348void iwl_rx_reply_error(struct iwl_priv *priv,
2349 struct iwl_rx_mem_buffer *rxb)
2350{
2351 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2352
2353 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2354 "seq 0x%04X ser 0x%08X\n",
2355 le32_to_cpu(pkt->u.err_resp.error_type),
2356 get_cmd_string(pkt->u.err_resp.cmd_id),
2357 pkt->u.err_resp.cmd_id,
2358 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2359 le32_to_cpu(pkt->u.err_resp.error_info));
2360}
2361EXPORT_SYMBOL(iwl_rx_reply_error);
2362
a83b9141
WYG		 2363void iwl_clear_isr_stats(struct iwl_priv *priv)
2364{
2365 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2366}
a83b9141 2367
488829f1
AK		 2368int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2369 const struct ieee80211_tx_queue_params *params)
2370{
2371 struct iwl_priv *priv = hw->priv;
2372 unsigned long flags;
2373 int q;
2374
2375 IWL_DEBUG_MAC80211(priv, "enter\n");
2376
2377 if (!iwl_is_ready_rf(priv)) {
2378 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2379 return -EIO;
2380 }
2381
2382 if (queue >= AC_NUM) {
2383 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2384 return 0;
2385 }
2386
2387 q = AC_NUM - 1 - queue;
2388
2389 spin_lock_irqsave(&priv->lock, flags);
2390
2391 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2392 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2393 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2394 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2395 cpu_to_le16((params->txop * 32));
2396
2397 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2398 priv->qos_data.qos_active = 1;
2399
2400 if (priv->iw_mode == NL80211_IFTYPE_AP)
2401 iwl_activate_qos(priv, 1);
2402 else if (priv->assoc_id && iwl_is_associated(priv))
2403 iwl_activate_qos(priv, 0);
2404
2405 spin_unlock_irqrestore(&priv->lock, flags);
2406
2407 IWL_DEBUG_MAC80211(priv, "leave\n");
2408 return 0;
2409}
2410EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2411
2412static void iwl_ht_conf(struct iwl_priv *priv,
2413 struct ieee80211_bss_conf *bss_conf)
2414{
2415 struct ieee80211_sta_ht_cap *ht_conf;
2416 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2417 struct ieee80211_sta *sta;
2418
2419 IWL_DEBUG_MAC80211(priv, "enter: \n");
2420
2421 if (!iwl_conf->is_ht)
2422 return;
2423
2424
2425 /*
2426 * It is totally wrong to base global information on something
2427 * that is valid only when associated, alas, this driver works
2428 * that way and I don't know how to fix it.
2429 */
2430
2431 rcu_read_lock();
2432 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2433 if (!sta) {
2434 rcu_read_unlock();
2435 return;
2436 }
2437 ht_conf = &sta->ht_cap;
2438
5bbe233b
AK		 2439 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2440
2441 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2442
5bbe233b 2443 iwl_conf->ht_protection =
9ed6bcce 2444 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5bbe233b 2445 iwl_conf->non_GF_STA_present =
9ed6bcce 2446 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b
AK		 2447
2448 rcu_read_unlock();
2449
2450 IWL_DEBUG_MAC80211(priv, "leave\n");
2451}
2452
2453#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2454void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2455 struct ieee80211_vif *vif,
2456 struct ieee80211_bss_conf *bss_conf,
2457 u32 changes)
5bbe233b
AK		 2458{
2459 struct iwl_priv *priv = hw->priv;
3a650292 2460 int ret;
5bbe233b
AK		 2461
2462 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2463
2d0ddec5
JB		 2464 if (!iwl_is_alive(priv))
2465 return;
2466
2467 mutex_lock(&priv->mutex);
2468
2469 if (changes & BSS_CHANGED_BEACON &&
2470 priv->iw_mode == NL80211_IFTYPE_AP) {
2471 dev_kfree_skb(priv->ibss_beacon);
2472 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2473 }
2474
d7129e19
JB		 2475 if (changes & BSS_CHANGED_BEACON_INT) {
2476 priv->beacon_int = bss_conf->beacon_int;
2477 /* TODO: in AP mode, do something to make this take effect */
2478 }
2479
2480 if (changes & BSS_CHANGED_BSSID) {
2481 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2482
2483 /*
2484 * If there is currently a HW scan going on in the
2485 * background then we need to cancel it else the RXON
2486 * below/in post_associate will fail.
2487 */
2d0ddec5 2488 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 2489 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 2490 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2491 mutex_unlock(&priv->mutex);
2492 return;
2493 }
2d0ddec5 2494
d7129e19
JB		 2495 /* mac80211 only sets assoc when in STATION mode */
2496 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2497 bss_conf->assoc) {
2498 memcpy(priv->staging_rxon.bssid_addr,
2499 bss_conf->bssid, ETH_ALEN);
2d0ddec5 2500
d7129e19
JB		 2501 /* currently needed in a few places */
2502 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2503 } else {
2504 priv->staging_rxon.filter_flags &=
2505 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 2506 }
d7129e19 2507
2d0ddec5
JB		 2508 }
2509
d7129e19
JB		 2510 /*
2511 * This needs to be after setting the BSSID in case
2512 * mac80211 decides to do both changes at once because
2513 * it will invoke post_associate.
2514 */
2d0ddec5
JB		 2515 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2516 changes & BSS_CHANGED_BEACON) {
2517 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2518
2519 if (beacon)
2520 iwl_mac_beacon_update(hw, beacon);
2521 }
2522
5bbe233b
AK		 2523 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2524 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2525 bss_conf->use_short_preamble);
2526 if (bss_conf->use_short_preamble)
2527 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2528 else
2529 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2530 }
2531
2532 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2533 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2534 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2535 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2536 else
2537 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2538 }
2539
d7129e19
JB		 2540 if (changes & BSS_CHANGED_BASIC_RATES) {
2541 /* XXX use this information
2542 *
2543 * To do that, remove code from iwl_set_rate() and put something
2544 * like this here:
2545 *
2546 if (A-band)
2547 priv->staging_rxon.ofdm_basic_rates =
2548 bss_conf->basic_rates;
2549 else
2550 priv->staging_rxon.ofdm_basic_rates =
2551 bss_conf->basic_rates >> 4;
2552 priv->staging_rxon.cck_basic_rates =
2553 bss_conf->basic_rates & 0xF;
2554 */
2555 }
2556
5bbe233b
AK		 2557 if (changes & BSS_CHANGED_HT) {
2558 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2559
2560 if (priv->cfg->ops->hcmd->set_rxon_chain)
2561 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2562 }
2563
2564 if (changes & BSS_CHANGED_ASSOC) {
2565 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 2566 if (bss_conf->assoc) {
2567 priv->assoc_id = bss_conf->aid;
2568 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 2569 priv->timestamp = bss_conf->timestamp;
2570 priv->assoc_capability = bss_conf->assoc_capability;
2571
d7129e19
JB		 2572 /*
2573 * We have just associated, don't start scan too early
2574 * leave time for EAPOL exchange to complete.
2575 *
2576 * XXX: do this in mac80211
5bbe233b
AK		 2577 */
2578 priv->next_scan_jiffies = jiffies +
2579 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
d7129e19
JB		 2580 if (!iwl_is_rfkill(priv))
2581 priv->cfg->ops->lib->post_associate(priv);
2582 } else
5bbe233b 2583 priv->assoc_id = 0;
d7129e19
JB		 2584
2585 }
2586
2587 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2588 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2589 changes);
2590 ret = iwl_send_rxon_assoc(priv);
2591 if (!ret) {
2592 /* Sync active_rxon with latest change. */
2593 memcpy((void *)&priv->active_rxon,
2594 &priv->staging_rxon,
2595 sizeof(struct iwl_rxon_cmd));
5bbe233b 2596 }
5bbe233b 2597 }
d7129e19
JB		 2598
2599 mutex_unlock(&priv->mutex);
2600
2d0ddec5 2601 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2602}
2603EXPORT_SYMBOL(iwl_bss_info_changed);
2604
9944b938
AK		 2605int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2606{
2607 struct iwl_priv *priv = hw->priv;
2608 unsigned long flags;
2609 __le64 timestamp;
2610
2611 IWL_DEBUG_MAC80211(priv, "enter\n");
2612
2613 if (!iwl_is_ready_rf(priv)) {
2614 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2615 return -EIO;
2616 }
2617
2618 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2619 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2620 return -EIO;
2621 }
2622
2623 spin_lock_irqsave(&priv->lock, flags);
2624
2625 if (priv->ibss_beacon)
2626 dev_kfree_skb(priv->ibss_beacon);
2627
2628 priv->ibss_beacon = skb;
2629
2630 priv->assoc_id = 0;
2631 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2632 priv->timestamp = le64_to_cpu(timestamp);
2633
2634 IWL_DEBUG_MAC80211(priv, "leave\n");
2635 spin_unlock_irqrestore(&priv->lock, flags);
2636
2637 iwl_reset_qos(priv);
2638
2639 priv->cfg->ops->lib->post_associate(priv);
2640
2641
2642 return 0;
2643}
2644EXPORT_SYMBOL(iwl_mac_beacon_update);
2645
727882d6
AK		 2646int iwl_set_mode(struct iwl_priv *priv, int mode)
2647{
2648 if (mode == NL80211_IFTYPE_ADHOC) {
2649 const struct iwl_channel_info *ch_info;
2650
2651 ch_info = iwl_get_channel_info(priv,
2652 priv->band,
2653 le16_to_cpu(priv->staging_rxon.channel));
2654
2655 if (!ch_info || !is_channel_ibss(ch_info)) {
2656 IWL_ERR(priv, "channel %d not IBSS channel\n",
2657 le16_to_cpu(priv->staging_rxon.channel));
2658 return -EINVAL;
2659 }
2660 }
2661
2662 iwl_connection_init_rx_config(priv, mode);
2663
2664 if (priv->cfg->ops->hcmd->set_rxon_chain)
2665 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2666
2667 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2668
c587de0b 2669 iwl_clear_stations_table(priv);
727882d6
AK		 2670
2671 /* dont commit rxon if rf-kill is on*/
2672 if (!iwl_is_ready_rf(priv))
2673 return -EAGAIN;
2674
727882d6
AK		 2675 iwlcore_commit_rxon(priv);
2676
2677 return 0;
2678}
2679EXPORT_SYMBOL(iwl_set_mode);
2680
cbb6ab94
AK		 2681int iwl_mac_add_interface(struct ieee80211_hw *hw,
2682 struct ieee80211_if_init_conf *conf)
2683{
2684 struct iwl_priv *priv = hw->priv;
2685 unsigned long flags;
2686
2687 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2688
2689 if (priv->vif) {
2690 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2691 return -EOPNOTSUPP;
2692 }
2693
2694 spin_lock_irqsave(&priv->lock, flags);
2695 priv->vif = conf->vif;
2696 priv->iw_mode = conf->type;
2697
2698 spin_unlock_irqrestore(&priv->lock, flags);
2699
2700 mutex_lock(&priv->mutex);
2701
2702 if (conf->mac_addr) {
2703 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2704 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2705 }
2706
2707 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2708 /* we are not ready, will run again when ready */
2709 set_bit(STATUS_MODE_PENDING, &priv->status);
2710
2711 mutex_unlock(&priv->mutex);
2712
2713 IWL_DEBUG_MAC80211(priv, "leave\n");
2714 return 0;
2715}
2716EXPORT_SYMBOL(iwl_mac_add_interface);
2717
d8052319
AK		 2718void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2719 struct ieee80211_if_init_conf *conf)
2720{
2721 struct iwl_priv *priv = hw->priv;
2722
2723 IWL_DEBUG_MAC80211(priv, "enter\n");
2724
2725 mutex_lock(&priv->mutex);
2726
2727 if (iwl_is_ready_rf(priv)) {
2728 iwl_scan_cancel_timeout(priv, 100);
2729 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2730 iwlcore_commit_rxon(priv);
2731 }
2732 if (priv->vif == conf->vif) {
2733 priv->vif = NULL;
2734 memset(priv->bssid, 0, ETH_ALEN);
2735 }
2736 mutex_unlock(&priv->mutex);
2737
2738 IWL_DEBUG_MAC80211(priv, "leave\n");
2739
2740}
2741EXPORT_SYMBOL(iwl_mac_remove_interface);
2742
4808368d
AK		 2743/**
2744 * iwl_mac_config - mac80211 config callback
2745 *
2746 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2747 * be set inappropriately and the driver currently sets the hardware up to
2748 * use it whenever needed.
2749 */
2750int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2751{
2752 struct iwl_priv *priv = hw->priv;
2753 const struct iwl_channel_info *ch_info;
2754 struct ieee80211_conf *conf = &hw->conf;
28bd723b 2755 struct iwl_ht_info *ht_conf = &priv->current_ht_config;
4808368d
AK		 2756 unsigned long flags = 0;
2757 int ret = 0;
2758 u16 ch;
2759 int scan_active = 0;
2760
2761 mutex_lock(&priv->mutex);
2762
4808368d
AK		 2763 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2764 conf->channel->hw_value, changed);
2765
2766 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2767 test_bit(STATUS_SCANNING, &priv->status))) {
2768 scan_active = 1;
2769 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2770 }
2771
2772
2773 /* during scanning mac80211 will delay channel setting until
2774 * scan finish with changed = 0
2775 */
2776 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2777 if (scan_active)
2778 goto set_ch_out;
2779
2780 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2781 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2782 if (!is_channel_valid(ch_info)) {
2783 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2784 ret = -EINVAL;
2785 goto set_ch_out;
2786 }
2787
2788 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2789 !is_channel_ibss(ch_info)) {
2790 IWL_ERR(priv, "channel %d in band %d not "
2791 "IBSS channel\n",
2792 conf->channel->hw_value, conf->channel->band);
2793 ret = -EINVAL;
2794 goto set_ch_out;
2795 }
2796
4808368d
AK		 2797 spin_lock_irqsave(&priv->lock, flags);
2798
28bd723b
DH		 2799 /* Configure HT40 channels */
2800 ht_conf->is_ht = conf_is_ht(conf);
2801 if (ht_conf->is_ht) {
2802 if (conf_is_ht40_minus(conf)) {
2803 ht_conf->extension_chan_offset =
2804 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2805 ht_conf->supported_chan_width =
2806 IWL_CHANNEL_WIDTH_40MHZ;
2807 } else if (conf_is_ht40_plus(conf)) {
2808 ht_conf->extension_chan_offset =
2809 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2810 ht_conf->supported_chan_width =
2811 IWL_CHANNEL_WIDTH_40MHZ;
2812 } else {
2813 ht_conf->extension_chan_offset =
2814 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2815 ht_conf->supported_chan_width =
2816 IWL_CHANNEL_WIDTH_20MHZ;
2817 }
2818 } else
2819 ht_conf->supported_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
2820 /* Default to no protection. Protection mode will later be set
2821 * from BSS config in iwl_ht_conf */
2822 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2823
2824 /* if we are switching from ht to 2.4 clear flags
2825 * from any ht related info since 2.4 does not
2826 * support ht */
2827 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2828 priv->staging_rxon.flags = 0;
2829
2830 iwl_set_rxon_channel(priv, conf->channel);
2831
2832 iwl_set_flags_for_band(priv, conf->channel->band);
2833 spin_unlock_irqrestore(&priv->lock, flags);
2834 set_ch_out:
2835 /* The list of supported rates and rate mask can be different
2836 * for each band; since the band may have changed, reset
2837 * the rate mask to what mac80211 lists */
2838 iwl_set_rate(priv);
2839 }
2840
e312c24c
JB		 2841 if (changed & IEEE80211_CONF_CHANGE_PS) {
2842 ret = iwl_power_update_mode(priv, false);
4808368d 2843 if (ret)
e312c24c 2844 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2845 }
2846
2847 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2848 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2849 priv->tx_power_user_lmt, conf->power_level);
2850
2851 iwl_set_tx_power(priv, conf->power_level, false);
2852 }
2853
2854 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2855 if (priv->cfg->ops->hcmd->set_rxon_chain)
2856 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2857
0cf4c01e
MA		 2858 if (!iwl_is_ready(priv)) {
2859 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2860 goto out;
2861 }
2862
4808368d
AK		 2863 if (scan_active)
2864 goto out;
2865
2866 if (memcmp(&priv->active_rxon,
2867 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2868 iwlcore_commit_rxon(priv);
2869 else
2870 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2871
2872
2873out:
2874 IWL_DEBUG_MAC80211(priv, "leave\n");
2875 mutex_unlock(&priv->mutex);
2876 return ret;
2877}
2878EXPORT_SYMBOL(iwl_mac_config);
2879
aa89f31e
AK		 2880int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2881 struct ieee80211_tx_queue_stats *stats)
2882{
2883 struct iwl_priv *priv = hw->priv;
2884 int i, avail;
2885 struct iwl_tx_queue *txq;
2886 struct iwl_queue *q;
2887 unsigned long flags;
2888
2889 IWL_DEBUG_MAC80211(priv, "enter\n");
2890
2891 if (!iwl_is_ready_rf(priv)) {
2892 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2893 return -EIO;
2894 }
2895
2896 spin_lock_irqsave(&priv->lock, flags);
2897
2898 for (i = 0; i < AC_NUM; i++) {
2899 txq = &priv->txq[i];
2900 q = &txq->q;
2901 avail = iwl_queue_space(q);
2902
2903 stats[i].len = q->n_window - avail;
2904 stats[i].limit = q->n_window - q->high_mark;
2905 stats[i].count = q->n_window;
2906
2907 }
2908 spin_unlock_irqrestore(&priv->lock, flags);
2909
2910 IWL_DEBUG_MAC80211(priv, "leave\n");
2911
2912 return 0;
2913}
2914EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2915
bd564261
AK		 2916void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2917{
2918 struct iwl_priv *priv = hw->priv;
2919 unsigned long flags;
2920
2921 mutex_lock(&priv->mutex);
2922 IWL_DEBUG_MAC80211(priv, "enter\n");
2923
2924 spin_lock_irqsave(&priv->lock, flags);
2925 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2926 spin_unlock_irqrestore(&priv->lock, flags);
2927
2928 iwl_reset_qos(priv);
2929
2930 spin_lock_irqsave(&priv->lock, flags);
2931 priv->assoc_id = 0;
2932 priv->assoc_capability = 0;
2933 priv->assoc_station_added = 0;
2934
2935 /* new association get rid of ibss beacon skb */
2936 if (priv->ibss_beacon)
2937 dev_kfree_skb(priv->ibss_beacon);
2938
2939 priv->ibss_beacon = NULL;
2940
57c4d7b4 2941 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2942 priv->timestamp = 0;
2943 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2944 priv->beacon_int = 0;
2945
2946 spin_unlock_irqrestore(&priv->lock, flags);
2947
2948 if (!iwl_is_ready_rf(priv)) {
2949 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2950 mutex_unlock(&priv->mutex);
2951 return;
2952 }
2953
2954 /* we are restarting association process
2955 * clear RXON_FILTER_ASSOC_MSK bit
2956 */
2957 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2958 iwl_scan_cancel_timeout(priv, 100);
2959 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2960 iwlcore_commit_rxon(priv);
2961 }
2962
bd564261 2963 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
bd564261
AK		 2964 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2965 mutex_unlock(&priv->mutex);
2966 return;
2967 }
2968
2969 iwl_set_rate(priv);
2970
2971 mutex_unlock(&priv->mutex);
2972
2973 IWL_DEBUG_MAC80211(priv, "leave\n");
2974}
2975EXPORT_SYMBOL(iwl_mac_reset_tsf);
2976
20594eb0
WYG		 2977#ifdef CONFIG_IWLWIFI_DEBUGFS
2978
2979#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2980
2981void iwl_reset_traffic_log(struct iwl_priv *priv)
2982{
2983 priv->tx_traffic_idx = 0;
2984 priv->rx_traffic_idx = 0;
2985 if (priv->tx_traffic)
2986 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2987 if (priv->rx_traffic)
2988 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2989}
2990
2991int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2992{
2993 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2994
2995 if (iwl_debug_level & IWL_DL_TX) {
2996 if (!priv->tx_traffic) {
2997 priv->tx_traffic =
2998 kzalloc(traffic_size, GFP_KERNEL);
2999 if (!priv->tx_traffic)
3000 return -ENOMEM;
3001 }
3002 }
3003 if (iwl_debug_level & IWL_DL_RX) {
3004 if (!priv->rx_traffic) {
3005 priv->rx_traffic =
3006 kzalloc(traffic_size, GFP_KERNEL);
3007 if (!priv->rx_traffic)
3008 return -ENOMEM;
3009 }
3010 }
3011 iwl_reset_traffic_log(priv);
3012 return 0;
3013}
3014EXPORT_SYMBOL(iwl_alloc_traffic_mem);
3015
3016void iwl_free_traffic_mem(struct iwl_priv *priv)
3017{
3018 kfree(priv->tx_traffic);
3019 priv->tx_traffic = NULL;
3020
3021 kfree(priv->rx_traffic);
3022 priv->rx_traffic = NULL;
3023}
3024EXPORT_SYMBOL(iwl_free_traffic_mem);
3025
3026void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
3027 u16 length, struct ieee80211_hdr *header)
3028{
3029 __le16 fc;
3030 u16 len;
3031
3032 if (likely(!(iwl_debug_level & IWL_DL_TX)))
3033 return;
3034
3035 if (!priv->tx_traffic)
3036 return;
3037
3038 fc = header->frame_control;
3039 if (ieee80211_is_data(fc)) {
3040 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3041 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3042 memcpy((priv->tx_traffic +
3043 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3044 header, len);
3045 priv->tx_traffic_idx =
3046 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3047 }
3048}
3049EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3050
3051void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3052 u16 length, struct ieee80211_hdr *header)
3053{
3054 __le16 fc;
3055 u16 len;
3056
3057 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3058 return;
3059
3060 if (!priv->rx_traffic)
3061 return;
3062
3063 fc = header->frame_control;
3064 if (ieee80211_is_data(fc)) {
3065 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3066 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3067 memcpy((priv->rx_traffic +
3068 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3069 header, len);
3070 priv->rx_traffic_idx =
3071 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3072 }
3073}
3074EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 3075
3076const char *get_mgmt_string(int cmd)
3077{
3078 switch (cmd) {
3079 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3080 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3081 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3082 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3083 IWL_CMD(MANAGEMENT_PROBE_REQ);
3084 IWL_CMD(MANAGEMENT_PROBE_RESP);
3085 IWL_CMD(MANAGEMENT_BEACON);
3086 IWL_CMD(MANAGEMENT_ATIM);
3087 IWL_CMD(MANAGEMENT_DISASSOC);
3088 IWL_CMD(MANAGEMENT_AUTH);
3089 IWL_CMD(MANAGEMENT_DEAUTH);
3090 IWL_CMD(MANAGEMENT_ACTION);
3091 default:
3092 return "UNKNOWN";
3093
3094 }
3095}
3096
3097const char *get_ctrl_string(int cmd)
3098{
3099 switch (cmd) {
3100 IWL_CMD(CONTROL_BACK_REQ);
3101 IWL_CMD(CONTROL_BACK);
3102 IWL_CMD(CONTROL_PSPOLL);
3103 IWL_CMD(CONTROL_RTS);
3104 IWL_CMD(CONTROL_CTS);
3105 IWL_CMD(CONTROL_ACK);
3106 IWL_CMD(CONTROL_CFEND);
3107 IWL_CMD(CONTROL_CFENDACK);
3108 default:
3109 return "UNKNOWN";
3110
3111 }
3112}
3113
3114void iwl_clear_tx_stats(struct iwl_priv *priv)
3115{
3116 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3117
3118}
3119
3120void iwl_clear_rx_stats(struct iwl_priv *priv)
3121{
3122 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3123}
3124
3125/*
3126 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3127 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3128 * Use debugFs to display the rx/rx_statistics
3129 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3130 * information will be recorded, but DATA pkt still will be recorded
3131 * for the reason of iwl_led.c need to control the led blinking based on
3132 * number of tx and rx data.
3133 *
3134 */
3135void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3136{
3137 struct traffic_stats *stats;
3138
3139 if (is_tx)
3140 stats = &priv->tx_stats;
3141 else
3142 stats = &priv->rx_stats;
3143
3144 if (ieee80211_is_mgmt(fc)) {
3145 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3146 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3147 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3148 break;
3149 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3150 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3151 break;
3152 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3153 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3154 break;
3155 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3156 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3157 break;
3158 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3159 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3160 break;
3161 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3162 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3163 break;
3164 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3165 stats->mgmt[MANAGEMENT_BEACON]++;
3166 break;
3167 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3168 stats->mgmt[MANAGEMENT_ATIM]++;
3169 break;
3170 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3171 stats->mgmt[MANAGEMENT_DISASSOC]++;
3172 break;
3173 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3174 stats->mgmt[MANAGEMENT_AUTH]++;
3175 break;
3176 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3177 stats->mgmt[MANAGEMENT_DEAUTH]++;
3178 break;
3179 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3180 stats->mgmt[MANAGEMENT_ACTION]++;
3181 break;
3182 }
3183 } else if (ieee80211_is_ctl(fc)) {
3184 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3185 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3186 stats->ctrl[CONTROL_BACK_REQ]++;
3187 break;
3188 case cpu_to_le16(IEEE80211_STYPE_BACK):
3189 stats->ctrl[CONTROL_BACK]++;
3190 break;
3191 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3192 stats->ctrl[CONTROL_PSPOLL]++;
3193 break;
3194 case cpu_to_le16(IEEE80211_STYPE_RTS):
3195 stats->ctrl[CONTROL_RTS]++;
3196 break;
3197 case cpu_to_le16(IEEE80211_STYPE_CTS):
3198 stats->ctrl[CONTROL_CTS]++;
3199 break;
3200 case cpu_to_le16(IEEE80211_STYPE_ACK):
3201 stats->ctrl[CONTROL_ACK]++;
3202 break;
3203 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3204 stats->ctrl[CONTROL_CFEND]++;
3205 break;
3206 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3207 stats->ctrl[CONTROL_CFENDACK]++;
3208 break;
3209 }
3210 } else {
3211 /* data */
3212 stats->data_cnt++;
3213 stats->data_bytes += len;
3214 }
3215}
3216EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 3217#endif
3218
6da3a13e
WYG		 3219#ifdef CONFIG_PM
3220
3221int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3222{
3223 struct iwl_priv *priv = pci_get_drvdata(pdev);
3224
3225 /*
3226 * This function is called when system goes into suspend state
3227 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3228 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3229 * it will not call apm_ops.stop() to stop the DMA operation.
3230 * Calling apm_ops.stop here to make sure we stop the DMA.
3231 */
3232 priv->cfg->ops->lib->apm_ops.stop(priv);
3233
3234 pci_save_state(pdev);
3235 pci_disable_device(pdev);
3236 pci_set_power_state(pdev, PCI_D3hot);
3237
3238 return 0;
3239}
3240EXPORT_SYMBOL(iwl_pci_suspend);
3241
3242int iwl_pci_resume(struct pci_dev *pdev)
3243{
3244 struct iwl_priv *priv = pci_get_drvdata(pdev);
3245 int ret;
3246
3247 pci_set_power_state(pdev, PCI_D0);
3248 ret = pci_enable_device(pdev);
3249 if (ret)
3250 return ret;
3251 pci_restore_state(pdev);
3252 iwl_enable_interrupts(priv);
3253
3254 return 0;
3255}
3256EXPORT_SYMBOL(iwl_pci_resume);
3257
3258#endif /* CONFIG_PM */
Linux kernel - Deliverables
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