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iwlwifi: remove mac_addr assignment
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 70
c7de35cd
RR		 71#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
a562a9dd
RC		 84u32 iwl_debug_level;
85EXPORT_SYMBOL(iwl_debug_level);
86
c7de35cd
RR		 87/*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
1826dcc0 95const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110};
1826dcc0 111EXPORT_SYMBOL(iwl_rates);
c7de35cd 112
e7d326ac
TW		 113int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114{
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
60d32215
DH		 121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141}
142EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
76eff18b
TW		 144u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
145{
146 int i;
147 u8 ind = ant;
148 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
149 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
150 if (priv->hw_params.valid_tx_ant & BIT(ind))
151 return ind;
152 }
153 return ant;
154}
47ff65c4 155EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 156
157const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
158EXPORT_SYMBOL(iwl_bcast_addr);
159
160
1d0a082d
AK		 161/* This function both allocates and initializes hw and priv. */
162struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
163 struct ieee80211_ops *hw_ops)
164{
165 struct iwl_priv *priv;
166
167 /* mac80211 allocates memory for this device instance, including
168 * space for this driver's private structure */
169 struct ieee80211_hw *hw =
170 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
171 if (hw == NULL) {
a3139c59
SO		 172 printk(KERN_ERR "%s: Can not allocate network device\n",
173 cfg->name);
1d0a082d
AK		 174 goto out;
175 }
176
177 priv = hw->priv;
178 priv->hw = hw;
179
180out:
181 return hw;
182}
183EXPORT_SYMBOL(iwl_alloc_all);
184
b661c819
TW		 185void iwl_hw_detect(struct iwl_priv *priv)
186{
187 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
188 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
189 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
190}
191EXPORT_SYMBOL(iwl_hw_detect);
192
14d2aac5
AK		 193/*
194 * QoS support
195*/
e61146e3 196static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 197{
198 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
199 return;
200
201 priv->qos_data.def_qos_parm.qos_flags = 0;
202
14d2aac5
AK		 203 if (priv->qos_data.qos_active)
204 priv->qos_data.def_qos_parm.qos_flags |=
205 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
206
207 if (priv->current_ht_config.is_ht)
208 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
209
e61146e3
SG		 210 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
211 priv->qos_data.qos_active,
212 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 213
e61146e3
SG		 214 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
215 sizeof(struct iwl_qosparam_cmd),
216 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 217}
c7de35cd 218
d9fe60de
JB		 219#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
220#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 221static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 222 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 223 enum ieee80211_band band)
224{
39130df3
RR		 225 u16 max_bit_rate = 0;
226 u8 rx_chains_num = priv->hw_params.rx_chains_num;
227 u8 tx_chains_num = priv->hw_params.tx_chains_num;
228
c7de35cd 229 ht_info->cap = 0;
d9fe60de 230 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 231
d9fe60de 232 ht_info->ht_supported = true;
c7de35cd 233
b261793d
DH		 234 if (priv->cfg->ht_greenfield_support)
235 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 236 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 237 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 238 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 239 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
240 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
241 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 242 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 243 }
c7de35cd
RR		 244
245 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 246 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 247
248 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
250
d9fe60de 251 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 252 if (rx_chains_num >= 2)
d9fe60de 253 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 254 if (rx_chains_num >= 3)
d9fe60de 255 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 256
257 /* Highest supported Rx data rate */
258 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 259 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
260 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 261
262 /* Tx MCS capabilities */
d9fe60de 263 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 264 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 265 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
266 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
267 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 268 }
c7de35cd 269}
c7de35cd 270
c7de35cd
RR		 271/**
272 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
273 */
534166de 274int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 275{
276 struct iwl_channel_info *ch;
277 struct ieee80211_supported_band *sband;
278 struct ieee80211_channel *channels;
279 struct ieee80211_channel *geo_ch;
280 struct ieee80211_rate *rates;
281 int i = 0;
282
283 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
284 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 285 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 286 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
287 return 0;
288 }
289
290 channels = kzalloc(sizeof(struct ieee80211_channel) *
291 priv->channel_count, GFP_KERNEL);
292 if (!channels)
293 return -ENOMEM;
294
5027309b 295 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 296 GFP_KERNEL);
297 if (!rates) {
298 kfree(channels);
299 return -ENOMEM;
300 }
301
302 /* 5.2GHz channels start after the 2.4GHz channels */
303 sband = &priv->bands[IEEE80211_BAND_5GHZ];
304 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
305 /* just OFDM */
306 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 307 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 308
49779293 309 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 310 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 311 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 312
313 sband = &priv->bands[IEEE80211_BAND_2GHZ];
314 sband->channels = channels;
315 /* OFDM & CCK */
316 sband->bitrates = rates;
5027309b 317 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 318
49779293 319 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 320 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 321 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 322
323 priv->ieee_channels = channels;
324 priv->ieee_rates = rates;
325
c7de35cd
RR		 326 for (i = 0; i < priv->channel_count; i++) {
327 ch = &priv->channel_info[i];
328
329 /* FIXME: might be removed if scan is OK */
330 if (!is_channel_valid(ch))
331 continue;
332
333 if (is_channel_a_band(ch))
334 sband = &priv->bands[IEEE80211_BAND_5GHZ];
335 else
336 sband = &priv->bands[IEEE80211_BAND_2GHZ];
337
338 geo_ch = &sband->channels[sband->n_channels++];
339
340 geo_ch->center_freq =
341 ieee80211_channel_to_frequency(ch->channel);
342 geo_ch->max_power = ch->max_power_avg;
343 geo_ch->max_antenna_gain = 0xff;
344 geo_ch->hw_value = ch->channel;
345
346 if (is_channel_valid(ch)) {
347 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
348 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
349
350 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
351 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
352
353 if (ch->flags & EEPROM_CHANNEL_RADAR)
354 geo_ch->flags |= IEEE80211_CHAN_RADAR;
355
7aafef1c 356 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 357
dc1b0973
WYG		 358 if (ch->max_power_avg > priv->tx_power_device_lmt)
359 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 360 } else {
361 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
362 }
363
e1623446 364 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 365 ch->channel, geo_ch->center_freq,
366 is_channel_a_band(ch) ? "5.2" : "2.4",
367 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
368 "restricted" : "valid",
369 geo_ch->flags);
370 }
371
372 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
373 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 374 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
375 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 376 priv->pci_dev->device,
377 priv->pci_dev->subsystem_device);
c7de35cd
RR		 378 priv->cfg->sku &= ~IWL_SKU_A;
379 }
380
978785a3 381 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 382 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
383 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 384
385 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
386
387 return 0;
388}
534166de 389EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 390
391/*
392 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
393 */
534166de 394void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 395{
396 kfree(priv->ieee_channels);
397 kfree(priv->ieee_rates);
398 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
399}
534166de 400EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 401
37dc70fe
AK		 402/*
403 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
404 * function.
405 */
406void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
407 __le32 *tx_flags)
408{
409 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
410 *tx_flags |= TX_CMD_FLG_RTS_MSK;
411 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
412 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
413 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
414 *tx_flags |= TX_CMD_FLG_CTS_MSK;
415 }
416}
417EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
418
28a6b07a 419static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 420{
ba37a3d0 421 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 422 priv->current_ht_config.single_chain_sufficient;
c7de35cd 423}
963f5517 424
47c5196e
TW		 425static u8 iwl_is_channel_extension(struct iwl_priv *priv,
426 enum ieee80211_band band,
427 u16 channel, u8 extension_chan_offset)
428{
429 const struct iwl_channel_info *ch_info;
430
431 ch_info = iwl_get_channel_info(priv, band, channel);
432 if (!is_channel_valid(ch_info))
433 return 0;
434
d9fe60de 435 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 436 return !(ch_info->ht40_extension_channel &
689da1b3 437 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 438 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 439 return !(ch_info->ht40_extension_channel &
689da1b3 440 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 441
442 return 0;
443}
444
7aafef1c 445u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 446 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 447{
fad95bf5 448 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 449
fad95bf5 450 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 451 return 0;
452
a2b0f02e
WYG		 453 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
454 * the bit will not set if it is pure 40MHz case
455 */
47c5196e 456 if (sta_ht_inf) {
a2b0f02e 457 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 458 return 0;
459 }
d73e4923 460#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG		 461 if (priv->disable_ht40)
462 return 0;
463#endif
611d3eb7
WYG		 464 return iwl_is_channel_extension(priv, priv->band,
465 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 466 ht_conf->extension_chan_offset);
47c5196e 467}
7aafef1c 468EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 469
2c2f3b33
TW		 470static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
471{
472 u16 new_val = 0;
473 u16 beacon_factor = 0;
474
475 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
476 new_val = beacon_val / beacon_factor;
477
478 if (!new_val)
479 new_val = max_beacon_val;
480
481 return new_val;
482}
483
1dda6d28 484void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW		 485{
486 u64 tsf;
487 s32 interval_tm, rem;
488 unsigned long flags;
489 struct ieee80211_conf *conf = NULL;
490 u16 beacon_int;
491
492 conf = ieee80211_get_hw_conf(priv->hw);
493
494 spin_lock_irqsave(&priv->lock, flags);
495 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
496 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
497
1dda6d28 498 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 499
1dda6d28 500 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW		 501 /* TODO: we need to get atim_window from upper stack
502 * for now we set to 0 */
503 priv->rxon_timing.atim_window = 0;
1dda6d28
JB		 504 } else {
505 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW		 506 }
507
508 beacon_int = iwl_adjust_beacon_interval(beacon_int,
509 priv->hw_params.max_beacon_itrvl * 1024);
510 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
511
512 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
513 interval_tm = beacon_int * 1024;
514 rem = do_div(tsf, interval_tm);
515 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
516
517 spin_unlock_irqrestore(&priv->lock, flags);
518 IWL_DEBUG_ASSOC(priv,
519 "beacon interval %d beacon timer %d beacon tim %d\n",
520 le16_to_cpu(priv->rxon_timing.beacon_interval),
521 le32_to_cpu(priv->rxon_timing.beacon_init_val),
522 le16_to_cpu(priv->rxon_timing.atim_window));
523}
524EXPORT_SYMBOL(iwl_setup_rxon_timing);
525
8ccde88a
SO		 526void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
527{
528 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
529
530 if (hw_decrypt)
531 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
532 else
533 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
534
535}
536EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
537
538/**
539 * iwl_check_rxon_cmd - validate RXON structure is valid
540 *
541 * NOTE: This is really only useful during development and can eventually
542 * be #ifdef'd out once the driver is stable and folks aren't actively
543 * making changes
544 */
545int iwl_check_rxon_cmd(struct iwl_priv *priv)
546{
547 int error = 0;
548 int counter = 1;
549 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
550
551 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
552 error |= le32_to_cpu(rxon->flags &
553 (RXON_FLG_TGJ_NARROW_BAND_MSK |
554 RXON_FLG_RADAR_DETECT_MSK));
555 if (error)
556 IWL_WARN(priv, "check 24G fields %d | %d\n",
557 counter++, error);
558 } else {
559 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
560 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
561 if (error)
562 IWL_WARN(priv, "check 52 fields %d | %d\n",
563 counter++, error);
564 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
565 if (error)
566 IWL_WARN(priv, "check 52 CCK %d | %d\n",
567 counter++, error);
568 }
569 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
570 if (error)
571 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
572
573 /* make sure basic rates 6Mbps and 1Mbps are supported */
574 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
575 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
576 if (error)
577 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
578
579 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
580 if (error)
581 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
582
583 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
584 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
585 if (error)
586 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
587 counter++, error);
588
589 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
590 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
591 if (error)
592 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
593 counter++, error);
594
595 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
596 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
597 if (error)
598 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
599 counter++, error);
600
601 if (error)
602 IWL_WARN(priv, "Tuning to channel %d\n",
603 le16_to_cpu(rxon->channel));
604
605 if (error) {
606 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
607 return -1;
608 }
609 return 0;
610}
611EXPORT_SYMBOL(iwl_check_rxon_cmd);
612
613/**
614 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
615 * @priv: staging_rxon is compared to active_rxon
616 *
617 * If the RXON structure is changing enough to require a new tune,
618 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
619 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
620 */
621int iwl_full_rxon_required(struct iwl_priv *priv)
622{
623
624 /* These items are only settable from the full RXON command */
625 if (!(iwl_is_associated(priv)) ||
626 compare_ether_addr(priv->staging_rxon.bssid_addr,
627 priv->active_rxon.bssid_addr) ||
628 compare_ether_addr(priv->staging_rxon.node_addr,
629 priv->active_rxon.node_addr) ||
630 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
631 priv->active_rxon.wlap_bssid_addr) ||
632 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
633 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
634 (priv->staging_rxon.air_propagation !=
635 priv->active_rxon.air_propagation) ||
636 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
637 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
638 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
639 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 640 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
641 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 642 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
643 return 1;
644
645 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
646 * be updated with the RXON_ASSOC command -- however only some
647 * flag transitions are allowed using RXON_ASSOC */
648
649 /* Check if we are not switching bands */
650 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
651 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
652 return 1;
653
654 /* Check if we are switching association toggle */
655 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
656 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
657 return 1;
658
659 return 0;
660}
661EXPORT_SYMBOL(iwl_full_rxon_required);
662
663u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
664{
4a02886b
JB		 665 /*
666 * Assign the lowest rate -- should really get this from
667 * the beacon skb from mac80211.
668 */
8ccde88a
SO		 669 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
670 return IWL_RATE_1M_PLCP;
671 else
672 return IWL_RATE_6M_PLCP;
673}
674EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
675
fad95bf5 676void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 677{
c1adf9fb 678 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 679
fad95bf5 680 if (!ht_conf->is_ht) {
a2b0f02e 681 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 682 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 683 RXON_FLG_HT40_PROT_MSK |
42eb7c64 684 RXON_FLG_HT_PROT_MSK);
47c5196e 685 return;
42eb7c64 686 }
47c5196e 687
a2b0f02e
WYG		 688 /* FIXME: if the definition of ht_protection changed, the "translation"
689 * will be needed for rxon->flags
690 */
fad95bf5 691 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 692
693 /* Set up channel bandwidth:
7aafef1c 694 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 695 /* clear the HT channel mode before set the mode */
696 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
697 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 698 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
699 /* pure ht40 */
fad95bf5 700 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 701 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 702 /* Note: control channel is opposite of extension channel */
fad95bf5 703 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 704 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
705 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
706 break;
707 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
708 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
709 break;
710 }
711 } else {
a2b0f02e 712 /* Note: control channel is opposite of extension channel */
fad95bf5 713 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 714 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
715 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
716 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
717 break;
718 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
719 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
720 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
721 break;
722 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
723 default:
724 /* channel location only valid if in Mixed mode */
725 IWL_ERR(priv, "invalid extension channel offset\n");
726 break;
727 }
728 }
729 } else {
730 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 731 }
732
45823531
AK		 733 if (priv->cfg->ops->hcmd->set_rxon_chain)
734 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 735
02bb1bea 736 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 737 "extension channel offset 0x%x\n",
fad95bf5
JB		 738 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
739 ht_conf->extension_chan_offset);
47c5196e
TW		 740}
741EXPORT_SYMBOL(iwl_set_rxon_ht);
742
9e5e6c32
TW		 743#define IWL_NUM_RX_CHAINS_MULTIPLE 3
744#define IWL_NUM_RX_CHAINS_SINGLE 2
745#define IWL_NUM_IDLE_CHAINS_DUAL 2
746#define IWL_NUM_IDLE_CHAINS_SINGLE 1
747
2b396a12
JB		 748/*
749 * Determine how many receiver/antenna chains to use.
750 *
751 * More provides better reception via diversity. Fewer saves power
752 * at the expense of throughput, but only when not in powersave to
753 * start with.
754 *
c7de35cd
RR		 755 * MIMO (dual stream) requires at least 2, but works better with 3.
756 * This does not determine *which* chains to use, just how many.
757 */
28a6b07a 758static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 759{
c7de35cd 760 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 761 if (is_single_rx_stream(priv))
9e5e6c32 762 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 763 else
9e5e6c32 764 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 765}
c7de35cd 766
2b396a12 767/*
3f3e0376
WYG		 768 * When we are in power saving mode, unless device support spatial
769 * multiplexing power save, use the active count for rx chain count.
2b396a12 770 */
28a6b07a
TW		 771static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
772{
ba37a3d0
JB		 773 /* # Rx chains when idling, depending on SMPS mode */
774 switch (priv->current_ht_config.smps) {
775 case IEEE80211_SMPS_STATIC:
776 case IEEE80211_SMPS_DYNAMIC:
777 return IWL_NUM_IDLE_CHAINS_SINGLE;
778 case IEEE80211_SMPS_OFF:
779 return active_cnt;
c15d20c1 780 default:
ba37a3d0
JB		 781 WARN(1, "invalid SMPS mode %d",
782 priv->current_ht_config.smps);
783 return active_cnt;
3f3e0376 784 }
c7de35cd
RR		 785}
786
04816448
GE		 787/* up to 4 chains */
788static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
789{
790 u8 res;
791 res = (chain_bitmap & BIT(0)) >> 0;
792 res += (chain_bitmap & BIT(1)) >> 1;
793 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 794 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 795 return res;
796}
797
c7de35cd
RR		 798/**
799 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
800 *
801 * Selects how many and which Rx receivers/antennas/chains to use.
802 * This should not be used for scan command ... it puts data in wrong place.
803 */
804void iwl_set_rxon_chain(struct iwl_priv *priv)
805{
28a6b07a
TW		 806 bool is_single = is_single_rx_stream(priv);
807 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 808 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
809 u32 active_chains;
28a6b07a 810 u16 rx_chain;
c7de35cd
RR		 811
812 /* Tell uCode which antennas are actually connected.
813 * Before first association, we assume all antennas are connected.
814 * Just after first association, iwl_chain_noise_calibration()
815 * checks which antennas actually *are* connected. */
04816448
GE		 816 if (priv->chain_noise_data.active_chains)
817 active_chains = priv->chain_noise_data.active_chains;
818 else
819 active_chains = priv->hw_params.valid_rx_ant;
820
821 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 822
823 /* How many receivers should we use? */
28a6b07a
TW		 824 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
825 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
826
28a6b07a 827
04816448
GE		 828 /* correct rx chain count according hw settings
829 * and chain noise calibration
830 */
831 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
832 if (valid_rx_cnt < active_rx_cnt)
833 active_rx_cnt = valid_rx_cnt;
834
835 if (valid_rx_cnt < idle_rx_cnt)
836 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 837
838 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
839 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
840
841 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
842
9e5e6c32 843 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 844 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
845 else
846 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
847
e1623446 848 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 849 priv->staging_rxon.rx_chain,
850 active_rx_cnt, idle_rx_cnt);
851
852 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
853 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 854}
855EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 856
857/**
17e72782 858 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 859 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
860 * @channel: Any channel valid for the requested phymode
861
862 * In addition to setting the staging RXON, priv->phymode is also set.
863 *
864 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
865 * in the staging RXON flag structure based on the phymode
866 */
17e72782 867int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 868{
17e72782
TW		 869 enum ieee80211_band band = ch->band;
870 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
871
8622e705 872 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 873 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 874 channel, band);
875 return -EINVAL;
876 }
877
878 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
879 (priv->band == band))
880 return 0;
881
882 priv->staging_rxon.channel = cpu_to_le16(channel);
883 if (band == IEEE80211_BAND_5GHZ)
884 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
885 else
886 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
887
888 priv->band = band;
889
e1623446 890 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 891
892 return 0;
893}
c7de35cd 894EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 895
1dda6d28
JB		 896static void iwl_set_flags_for_band(struct iwl_priv *priv,
897 enum ieee80211_band band,
898 struct ieee80211_vif *vif)
8ccde88a
SO		 899{
900 if (band == IEEE80211_BAND_5GHZ) {
901 priv->staging_rxon.flags &=
902 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
903 | RXON_FLG_CCK_MSK);
904 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
905 } else {
906 /* Copied from iwl_post_associate() */
c213d745 907 if (vif && vif->bss_conf.use_short_slot)
8ccde88a
SO		 908 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
909 else
910 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
911
8ccde88a
SO		 912 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
913 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
914 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
915 }
916}
8ccde88a
SO		 917
918/*
919 * initialize rxon structure with default values from eeprom
920 */
1dda6d28
JB		 921void iwl_connection_init_rx_config(struct iwl_priv *priv,
922 struct ieee80211_vif *vif)
8ccde88a
SO		 923{
924 const struct iwl_channel_info *ch_info;
1dda6d28
JB		 925 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
926
927 if (vif)
928 type = vif->type;
8ccde88a
SO		 929
930 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
931
1dda6d28 932 switch (type) {
8ccde88a
SO		 933 case NL80211_IFTYPE_AP:
934 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
935 break;
936
937 case NL80211_IFTYPE_STATION:
938 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
939 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
940 break;
941
942 case NL80211_IFTYPE_ADHOC:
943 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
944 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
945 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
946 RXON_FILTER_ACCEPT_GRP_MSK;
947 break;
948
8ccde88a 949 default:
1dda6d28 950 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO		 951 break;
952 }
953
954#if 0
955 /* TODO: Figure out when short_preamble would be set and cache from
956 * that */
957 if (!hw_to_local(priv->hw)->short_preamble)
958 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
959 else
960 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
961#endif
962
963 ch_info = iwl_get_channel_info(priv, priv->band,
964 le16_to_cpu(priv->active_rxon.channel));
965
966 if (!ch_info)
967 ch_info = &priv->channel_info[0];
968
8ccde88a
SO		 969 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
970 priv->band = ch_info->band;
971
1dda6d28 972 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO		 973
974 priv->staging_rxon.ofdm_basic_rates =
975 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
976 priv->staging_rxon.cck_basic_rates =
977 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
978
a2b0f02e
WYG		 979 /* clear both MIX and PURE40 mode flag */
980 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
981 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a 982 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
8ccde88a
SO		 983 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
984 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 985 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 986}
987EXPORT_SYMBOL(iwl_connection_init_rx_config);
988
782571f4 989static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 990{
991 const struct ieee80211_supported_band *hw = NULL;
992 struct ieee80211_rate *rate;
993 int i;
994
995 hw = iwl_get_hw_mode(priv, priv->band);
996 if (!hw) {
997 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
998 return;
999 }
1000
1001 priv->active_rate = 0;
8ccde88a
SO		 1002
1003 for (i = 0; i < hw->n_bitrates; i++) {
1004 rate = &(hw->bitrates[i]);
5027309b 1005 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1006 priv->active_rate |= (1 << rate->hw_value);
1007 }
1008
4a02886b 1009 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1010
4a02886b
JB		 1011 priv->staging_rxon.cck_basic_rates =
1012 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1013
1014 priv->staging_rxon.ofdm_basic_rates =
1015 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1016}
8ccde88a
SO		 1017
1018void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1019{
2f301227 1020 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1021 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1022 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1023
0924e519
WYG		 1024 if (priv->switch_rxon.switch_in_progress) {
1025 if (!le32_to_cpu(csa->status) &&
1026 (csa->channel == priv->switch_rxon.channel)) {
1027 rxon->channel = csa->channel;
1028 priv->staging_rxon.channel = csa->channel;
1029 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1030 le16_to_cpu(csa->channel));
1031 } else
1032 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1033 le16_to_cpu(csa->channel));
1034
1035 priv->switch_rxon.switch_in_progress = false;
1036 }
8ccde88a
SO		 1037}
1038EXPORT_SYMBOL(iwl_rx_csa);
1039
1040#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1041void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1042{
1043 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1044
e1623446 1045 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1046 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1047 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1048 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1049 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1050 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1051 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1052 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1053 rxon->ofdm_basic_rates);
e1623446
TW		 1054 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1055 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1056 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1057 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1058}
a643565e 1059EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1060#endif
8ccde88a
SO		 1061/**
1062 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1063 */
1064void iwl_irq_handle_error(struct iwl_priv *priv)
1065{
1066 /* Set the FW error flag -- cleared on iwl_down */
1067 set_bit(STATUS_FW_ERROR, &priv->status);
1068
1069 /* Cancel currently queued command. */
1070 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1071
459bc732
SZ		 1072 IWL_ERR(priv, "Loaded firmware version: %s\n",
1073 priv->hw->wiphy->fw_version);
1074
3a3ff72c 1075 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1076 if (priv->cfg->ops->lib->dump_csr)
1077 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1078 if (priv->cfg->ops->lib->dump_fh)
1079 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1080 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1081#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1082 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1083 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1084#endif
1085
1086 wake_up_interruptible(&priv->wait_command_queue);
1087
1088 /* Keep the restart process from trying to send host
1089 * commands by clearing the INIT status bit */
1090 clear_bit(STATUS_READY, &priv->status);
1091
1092 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1093 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1094 "Restarting adapter due to uCode error.\n");
1095
8ccde88a
SO		 1096 if (priv->cfg->mod_params->restart_fw)
1097 queue_work(priv->workqueue, &priv->restart);
1098 }
1099}
1100EXPORT_SYMBOL(iwl_irq_handle_error);
1101
f8e200de 1102static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1103{
5220af0c 1104 int ret = 0;
d68b603c 1105
5220af0c 1106 /* stop device's busmaster DMA activity */
d68b603c
AK		 1107 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1108
5220af0c 1109 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1110 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1111 if (ret)
1112 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1113
d68b603c
AK		 1114 IWL_DEBUG_INFO(priv, "stop master\n");
1115
5220af0c 1116 return ret;
d68b603c 1117}
d68b603c
AK		 1118
1119void iwl_apm_stop(struct iwl_priv *priv)
1120{
fadb3582
BC		 1121 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1122
5220af0c 1123 /* Stop device's DMA activity */
d68b603c
AK		 1124 iwl_apm_stop_master(priv);
1125
5220af0c 1126 /* Reset the entire device */
d68b603c
AK		 1127 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1128
1129 udelay(10);
5220af0c
BC		 1130
1131 /*
1132 * Clear "initialization complete" bit to move adapter from
1133 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1134 */
d68b603c 1135 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1136}
1137EXPORT_SYMBOL(iwl_apm_stop);
1138
fadb3582
BC		 1139
1140/*
1141 * Start up NIC's basic functionality after it has been reset
1142 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1143 * NOTE: This does not load uCode nor start the embedded processor
1144 */
1145int iwl_apm_init(struct iwl_priv *priv)
1146{
1147 int ret = 0;
1148 u16 lctl;
1149
1150 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1151
1152 /*
1153 * Use "set_bit" below rather than "write", to preserve any hardware
1154 * bits already set by default after reset.
1155 */
1156
1157 /* Disable L0S exit timer (platform NMI Work/Around) */
1158 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1159 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1160
1161 /*
1162 * Disable L0s without affecting L1;
1163 * don't wait for ICH L0s (ICH bug W/A)
1164 */
1165 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1166 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1167
1168 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1169 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1170
1171 /*
1172 * Enable HAP INTA (interrupt from management bus) to
1173 * wake device's PCI Express link L1a -> L0s
1174 * NOTE: This is no-op for 3945 (non-existant bit)
1175 */
1176 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1177 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1178
1179 /*
a6c5c731
BC		 1180 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1181 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1182 * If so (likely), disable L0S, so device moves directly L0->L1;
1183 * costs negligible amount of power savings.
1184 * If not (unlikely), enable L0S, so there is at least some
1185 * power savings, even without L1.
fadb3582
BC		 1186 */
1187 if (priv->cfg->set_l0s) {
1188 lctl = iwl_pcie_link_ctl(priv);
1189 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1190 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1191 /* L1-ASPM enabled; disable(!) L0S */
1192 iwl_set_bit(priv, CSR_GIO_REG,
1193 CSR_GIO_REG_VAL_L0S_ENABLED);
1194 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1195 } else {
1196 /* L1-ASPM disabled; enable(!) L0S */
1197 iwl_clear_bit(priv, CSR_GIO_REG,
1198 CSR_GIO_REG_VAL_L0S_ENABLED);
1199 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1200 }
1201 }
1202
1203 /* Configure analog phase-lock-loop before activating to D0A */
1204 if (priv->cfg->pll_cfg_val)
1205 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1206
1207 /*
1208 * Set "initialization complete" bit to move adapter from
1209 * D0U* --> D0A* (powered-up active) state.
1210 */
1211 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1212
1213 /*
1214 * Wait for clock stabilization; once stabilized, access to
1215 * device-internal resources is supported, e.g. iwl_write_prph()
1216 * and accesses to uCode SRAM.
1217 */
1218 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1219 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1220 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1221 if (ret < 0) {
1222 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1223 goto out;
1224 }
1225
1226 /*
1227 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1228 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1229 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1230 * and don't need BSM to restore data after power-saving sleep.
1231 *
1232 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1233 * do not disable clocks. This preserves any hardware bits already
1234 * set by default in "CLK_CTRL_REG" after reset.
1235 */
1236 if (priv->cfg->use_bsm)
1237 iwl_write_prph(priv, APMG_CLK_EN_REG,
1238 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1239 else
1240 iwl_write_prph(priv, APMG_CLK_EN_REG,
1241 APMG_CLK_VAL_DMA_CLK_RQT);
1242 udelay(20);
1243
1244 /* Disable L1-Active */
1245 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1246 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1247
1248out:
1249 return ret;
1250}
1251EXPORT_SYMBOL(iwl_apm_init);
1252
1253
1254
8ccde88a
SO		 1255void iwl_configure_filter(struct ieee80211_hw *hw,
1256 unsigned int changed_flags,
1257 unsigned int *total_flags,
3ac64bee 1258 u64 multicast)
8ccde88a
SO		 1259{
1260 struct iwl_priv *priv = hw->priv;
3474ad63
JB		 1261 __le32 filter_or = 0, filter_nand = 0;
1262
1263#define CHK(test, flag) do { \
1264 if (*total_flags & (test)) \
1265 filter_or |= (flag); \
1266 else \
1267 filter_nand |= (flag); \
1268 } while (0)
8ccde88a 1269
e1623446 1270 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1271 changed_flags, *total_flags);
1272
3474ad63
JB		 1273 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
1274 CHK(FIF_ALLMULTI, RXON_FILTER_ACCEPT_GRP_MSK);
1275 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1276 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
8ccde88a 1277
3474ad63
JB		 1278#undef CHK
1279
1280 mutex_lock(&priv->mutex);
1281
1282 priv->staging_rxon.filter_flags &= ~filter_nand;
1283 priv->staging_rxon.filter_flags |= filter_or;
1284
1285 iwlcore_commit_rxon(priv);
1286
1287 mutex_unlock(&priv->mutex);
8ccde88a
SO		 1288
1289 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1290 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1291}
1292EXPORT_SYMBOL(iwl_configure_filter);
1293
da154e30
RR		 1294int iwl_set_hw_params(struct iwl_priv *priv)
1295{
da154e30
RR		 1296 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1297 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1298 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1299 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1300 else
2f301227 1301 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1302
2c2f3b33
TW		 1303 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1304
49779293
RR		 1305 if (priv->cfg->mod_params->disable_11n)
1306 priv->cfg->sku &= ~IWL_SKU_N;
1307
da154e30
RR		 1308 /* Device-specific setup */
1309 return priv->cfg->ops->lib->set_hw_params(priv);
1310}
1311EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1312
630fe9b6
TW		 1313int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1314{
1315 int ret = 0;
5eadd94b
WYG		 1316 s8 prev_tx_power = priv->tx_power_user_lmt;
1317
b744cb79
WYG		 1318 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1319 IWL_WARN(priv,
1320 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1321 tx_power,
b744cb79 1322 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1323 return -EINVAL;
1324 }
1325
dc1b0973 1326 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1327 IWL_WARN(priv,
1328 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1329 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1330 return -EINVAL;
1331 }
1332
1333 if (priv->tx_power_user_lmt != tx_power)
1334 force = true;
1335
019fb97d 1336 /* if nic is not up don't send command */
5eadd94b
WYG		 1337 if (iwl_is_ready_rf(priv)) {
1338 priv->tx_power_user_lmt = tx_power;
1339 if (force && priv->cfg->ops->lib->send_tx_power)
1340 ret = priv->cfg->ops->lib->send_tx_power(priv);
1341 else if (!priv->cfg->ops->lib->send_tx_power)
1342 ret = -EOPNOTSUPP;
1343 /*
1344 * if fail to set tx_power, restore the orig. tx power
1345 */
1346 if (ret)
1347 priv->tx_power_user_lmt = prev_tx_power;
1348 }
630fe9b6 1349
5eadd94b
WYG		 1350 /*
1351 * Even this is an async host command, the command
1352 * will always report success from uCode
1353 * So once driver can placing the command into the queue
1354 * successfully, driver can use priv->tx_power_user_lmt
1355 * to reflect the current tx power
1356 */
630fe9b6
TW		 1357 return ret;
1358}
1359EXPORT_SYMBOL(iwl_set_tx_power);
1360
ef850d7c 1361irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1362{
1363 struct iwl_priv *priv = data;
1364 u32 inta, inta_mask;
1365 u32 inta_fh;
6e8cc38d 1366 unsigned long flags;
f17d08a6
AK		 1367 if (!priv)
1368 return IRQ_NONE;
1369
6e8cc38d 1370 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1371
1372 /* Disable (but don't clear!) interrupts here to avoid
1373 * back-to-back ISRs and sporadic interrupts from our NIC.
1374 * If we have something to service, the tasklet will re-enable ints.
1375 * If we *don't* have something, we'll re-enable before leaving here. */
1376 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1377 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1378
1379 /* Discover which interrupts are active/pending */
1380 inta = iwl_read32(priv, CSR_INT);
1381 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1382
1383 /* Ignore interrupt if there's nothing in NIC to service.
1384 * This may be due to IRQ shared with another device,
1385 * or due to sporadic interrupts thrown from our NIC. */
1386 if (!inta && !inta_fh) {
1387 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1388 goto none;
1389 }
1390
1391 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1392 /* Hardware disappeared. It might have already raised
1393 * an interrupt */
1394 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1395 goto unplugged;
1396 }
1397
1398 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1399 inta, inta_mask, inta_fh);
1400
1401 inta &= ~CSR_INT_BIT_SCD;
1402
1403 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1404 if (likely(inta || inta_fh))
1405 tasklet_schedule(&priv->irq_tasklet);
1406
1407 unplugged:
6e8cc38d 1408 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1409 return IRQ_HANDLED;
1410
1411 none:
1412 /* re-enable interrupts here since we don't have anything to service. */
1413 /* only Re-enable if diabled by irq */
1414 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1415 iwl_enable_interrupts(priv);
6e8cc38d 1416 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1417 return IRQ_NONE;
1418}
ef850d7c 1419EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1420
65b52bde 1421void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1422{
1423 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1424 .lead_time = BT_LEAD_TIME_DEF,
1425 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1426 .kill_ack_mask = 0,
1427 .kill_cts_mask = 0,
1428 };
1429
06702a73
WYG		 1430 if (!bt_coex_active)
1431 bt_cmd.flags = BT_COEX_DISABLE;
1432 else
1433 bt_cmd.flags = BT_COEX_ENABLE;
1434
1435 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1436 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1437
65b52bde
JB		 1438 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1439 sizeof(struct iwl_bt_cmd), &bt_cmd))
1440 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1441}
1442EXPORT_SYMBOL(iwl_send_bt_config);
1443
ef8d5529 1444int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1445{
ef8d5529
WYG		 1446 struct iwl_statistics_cmd statistics_cmd = {
1447 .configuration_flags =
1448 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1449 };
ef8d5529
WYG		 1450
1451 if (flags & CMD_ASYNC)
1452 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1453 sizeof(struct iwl_statistics_cmd),
1454 &statistics_cmd, NULL);
1455 else
1456 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1457 sizeof(struct iwl_statistics_cmd),
1458 &statistics_cmd);
49ea8596
EG		 1459}
1460EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1461
47f4a587
EG		 1462void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1463{
1464 struct iwl_ct_kill_config cmd;
672639de 1465 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1466 unsigned long flags;
1467 int ret = 0;
1468
1469 spin_lock_irqsave(&priv->lock, flags);
1470 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1471 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1472 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1473 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1474
480e8407 1475 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1476 adv_cmd.critical_temperature_enter =
1477 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1478 adv_cmd.critical_temperature_exit =
1479 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1480
1481 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1482 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1483 if (ret)
1484 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1485 else
1486 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1487 "succeeded, "
1488 "critical temperature enter is %d,"
1489 "exit is %d\n",
1490 priv->hw_params.ct_kill_threshold,
1491 priv->hw_params.ct_kill_exit_threshold);
480e8407 1492 } else {
672639de
WYG		 1493 cmd.critical_temperature_R =
1494 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1495
672639de
WYG		 1496 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1497 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1498 if (ret)
1499 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1500 else
1501 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1502 "succeeded, "
1503 "critical temperature is %d\n",
1504 priv->hw_params.ct_kill_threshold);
672639de 1505 }
47f4a587
EG		 1506}
1507EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1508
0ad91a35 1509
14a08a7f
EG		 1510/*
1511 * CARD_STATE_CMD
1512 *
1513 * Use: Sets the device's internal card state to enable, disable, or halt
1514 *
1515 * When in the 'enable' state the card operates as normal.
1516 * When in the 'disable' state, the card enters into a low power mode.
1517 * When in the 'halt' state, the card is shut down and must be fully
1518 * restarted to come back on.
1519 */
c496294e 1520int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1521{
1522 struct iwl_host_cmd cmd = {
1523 .id = REPLY_CARD_STATE_CMD,
1524 .len = sizeof(u32),
1525 .data = &flags,
c2acea8e 1526 .flags = meta_flag,
14a08a7f
EG		 1527 };
1528
1529 return iwl_send_cmd(priv, &cmd);
1530}
1531
030f05ed
AK		 1532void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1533 struct iwl_rx_mem_buffer *rxb)
1534{
1535#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1536 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1537 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1538 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1539 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1540#endif
1541}
1542EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1543
1544void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1545 struct iwl_rx_mem_buffer *rxb)
1546{
2f301227 1547 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1548 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1549 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1550 "notification for %s:\n", len,
1551 get_cmd_string(pkt->hdr.cmd));
1552 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1553}
1554EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1555
1556void iwl_rx_reply_error(struct iwl_priv *priv,
1557 struct iwl_rx_mem_buffer *rxb)
1558{
2f301227 1559 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1560
1561 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1562 "seq 0x%04X ser 0x%08X\n",
1563 le32_to_cpu(pkt->u.err_resp.error_type),
1564 get_cmd_string(pkt->u.err_resp.cmd_id),
1565 pkt->u.err_resp.cmd_id,
1566 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1567 le32_to_cpu(pkt->u.err_resp.error_info));
1568}
1569EXPORT_SYMBOL(iwl_rx_reply_error);
1570
a83b9141
WYG		 1571void iwl_clear_isr_stats(struct iwl_priv *priv)
1572{
1573 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1574}
a83b9141 1575
488829f1
AK		 1576int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1577 const struct ieee80211_tx_queue_params *params)
1578{
1579 struct iwl_priv *priv = hw->priv;
1580 unsigned long flags;
1581 int q;
1582
1583 IWL_DEBUG_MAC80211(priv, "enter\n");
1584
1585 if (!iwl_is_ready_rf(priv)) {
1586 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1587 return -EIO;
1588 }
1589
1590 if (queue >= AC_NUM) {
1591 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1592 return 0;
1593 }
1594
1595 q = AC_NUM - 1 - queue;
1596
1597 spin_lock_irqsave(&priv->lock, flags);
1598
1599 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1600 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1601 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1602 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1603 cpu_to_le16((params->txop * 32));
1604
1605 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1606
1607 spin_unlock_irqrestore(&priv->lock, flags);
1608
1609 IWL_DEBUG_MAC80211(priv, "leave\n");
1610 return 0;
1611}
1612EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1613
1614static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1615 struct ieee80211_vif *vif)
5bbe233b 1616{
fad95bf5 1617 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1618 struct ieee80211_sta *sta;
ca3c1f59 1619 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1620
91dd6c27 1621 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1622
fad95bf5 1623 if (!ht_conf->is_ht)
5bbe233b
AK		 1624 return;
1625
fad95bf5 1626 ht_conf->ht_protection =
9ed6bcce 1627 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1628 ht_conf->non_GF_STA_present =
9ed6bcce 1629 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1630
02bb1bea
JB		 1631 ht_conf->single_chain_sufficient = false;
1632
ca3c1f59 1633 switch (vif->type) {
02bb1bea
JB		 1634 case NL80211_IFTYPE_STATION:
1635 rcu_read_lock();
ca3c1f59 1636 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1637 if (sta) {
1638 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1639 int maxstreams;
1640
1641 maxstreams = (ht_cap->mcs.tx_params &
1642 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1643 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1644 maxstreams += 1;
1645
1646 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1647 (ht_cap->mcs.rx_mask[2] == 0))
1648 ht_conf->single_chain_sufficient = true;
1649 if (maxstreams <= 1)
1650 ht_conf->single_chain_sufficient = true;
1651 } else {
1652 /*
1653 * If at all, this can only happen through a race
1654 * when the AP disconnects us while we're still
1655 * setting up the connection, in that case mac80211
1656 * will soon tell us about that.
1657 */
1658 ht_conf->single_chain_sufficient = true;
1659 }
1660 rcu_read_unlock();
1661 break;
1662 case NL80211_IFTYPE_ADHOC:
1663 ht_conf->single_chain_sufficient = true;
1664 break;
1665 default:
1666 break;
1667 }
5bbe233b
AK		 1668
1669 IWL_DEBUG_MAC80211(priv, "leave\n");
1670}
1671
c91c3efc
AK		 1672static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1673{
c91c3efc
AK		 1674 iwl_led_disassociate(priv);
1675 /*
1676 * inform the ucode that there is no longer an
1677 * association and that no more packets should be
1678 * sent
1679 */
1680 priv->staging_rxon.filter_flags &=
1681 ~RXON_FILTER_ASSOC_MSK;
1682 priv->staging_rxon.assoc_id = 0;
1683 iwlcore_commit_rxon(priv);
1684}
1685
5bbe233b 1686void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1687 struct ieee80211_vif *vif,
1688 struct ieee80211_bss_conf *bss_conf,
1689 u32 changes)
5bbe233b
AK		 1690{
1691 struct iwl_priv *priv = hw->priv;
3a650292 1692 int ret;
5bbe233b
AK		 1693
1694 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1695
2d0ddec5
JB		 1696 if (!iwl_is_alive(priv))
1697 return;
1698
1699 mutex_lock(&priv->mutex);
1700
92445c95 1701 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1702 dev_kfree_skb(priv->ibss_beacon);
1703 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1704 }
1705
d7129e19 1706 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB		 1707 /* TODO: in AP mode, do something to make this take effect */
1708 }
1709
1710 if (changes & BSS_CHANGED_BSSID) {
1711 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1712
1713 /*
1714 * If there is currently a HW scan going on in the
1715 * background then we need to cancel it else the RXON
1716 * below/in post_associate will fail.
1717 */
2d0ddec5 1718 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1719 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1720 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1721 mutex_unlock(&priv->mutex);
1722 return;
1723 }
2d0ddec5 1724
d7129e19 1725 /* mac80211 only sets assoc when in STATION mode */
92445c95 1726 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB		 1727 memcpy(priv->staging_rxon.bssid_addr,
1728 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1729
d7129e19
JB		 1730 /* currently needed in a few places */
1731 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1732 } else {
1733 priv->staging_rxon.filter_flags &=
1734 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1735 }
d7129e19 1736
2d0ddec5
JB		 1737 }
1738
d7129e19
JB		 1739 /*
1740 * This needs to be after setting the BSSID in case
1741 * mac80211 decides to do both changes at once because
1742 * it will invoke post_associate.
1743 */
92445c95 1744 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1745 changes & BSS_CHANGED_BEACON) {
1746 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1747
1748 if (beacon)
1749 iwl_mac_beacon_update(hw, beacon);
1750 }
1751
5bbe233b
AK		 1752 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1753 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1754 bss_conf->use_short_preamble);
1755 if (bss_conf->use_short_preamble)
1756 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1757 else
1758 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1759 }
1760
1761 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1762 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1763 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1764 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1765 else
1766 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1767 }
1768
d7129e19
JB		 1769 if (changes & BSS_CHANGED_BASIC_RATES) {
1770 /* XXX use this information
1771 *
1772 * To do that, remove code from iwl_set_rate() and put something
1773 * like this here:
1774 *
1775 if (A-band)
1776 priv->staging_rxon.ofdm_basic_rates =
1777 bss_conf->basic_rates;
1778 else
1779 priv->staging_rxon.ofdm_basic_rates =
1780 bss_conf->basic_rates >> 4;
1781 priv->staging_rxon.cck_basic_rates =
1782 bss_conf->basic_rates & 0xF;
1783 */
1784 }
1785
5bbe233b 1786 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1787 iwl_ht_conf(priv, vif);
45823531
AK		 1788
1789 if (priv->cfg->ops->hcmd->set_rxon_chain)
1790 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1791 }
1792
1793 if (changes & BSS_CHANGED_ASSOC) {
1794 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1795 if (bss_conf->assoc) {
5bbe233b 1796 priv->timestamp = bss_conf->timestamp;
5bbe233b 1797
e932a609
JB		 1798 iwl_led_associate(priv);
1799
d7129e19 1800 if (!iwl_is_rfkill(priv))
1dda6d28 1801 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK		 1802 } else
1803 iwl_set_no_assoc(priv);
d7129e19
JB		 1804 }
1805
1dda6d28 1806 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB		 1807 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1808 changes);
1809 ret = iwl_send_rxon_assoc(priv);
1810 if (!ret) {
1811 /* Sync active_rxon with latest change. */
1812 memcpy((void *)&priv->active_rxon,
1813 &priv->staging_rxon,
1814 sizeof(struct iwl_rxon_cmd));
5bbe233b 1815 }
5bbe233b 1816 }
d7129e19 1817
c91c3efc
AK		 1818 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1819 if (vif->bss_conf.enable_beacon) {
1820 memcpy(priv->staging_rxon.bssid_addr,
1821 bss_conf->bssid, ETH_ALEN);
1822 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1823 iwlcore_config_ap(priv, vif);
c91c3efc
AK		 1824 } else
1825 iwl_set_no_assoc(priv);
f513dfff
DH		 1826 }
1827
1fa61b2e
JB		 1828 if (changes & BSS_CHANGED_IBSS) {
1829 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1830 bss_conf->ibss_joined);
1831 if (ret)
1832 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1833 bss_conf->ibss_joined ? "add" : "remove",
1834 bss_conf->bssid);
1835 }
1836
d7129e19
JB		 1837 mutex_unlock(&priv->mutex);
1838
2d0ddec5 1839 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1840}
1841EXPORT_SYMBOL(iwl_bss_info_changed);
1842
9944b938
AK		 1843int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1844{
1845 struct iwl_priv *priv = hw->priv;
1846 unsigned long flags;
1847 __le64 timestamp;
1848
1849 IWL_DEBUG_MAC80211(priv, "enter\n");
1850
1851 if (!iwl_is_ready_rf(priv)) {
1852 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1853 return -EIO;
1854 }
1855
9944b938
AK		 1856 spin_lock_irqsave(&priv->lock, flags);
1857
1858 if (priv->ibss_beacon)
1859 dev_kfree_skb(priv->ibss_beacon);
1860
1861 priv->ibss_beacon = skb;
1862
9944b938
AK		 1863 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1864 priv->timestamp = le64_to_cpu(timestamp);
1865
1866 IWL_DEBUG_MAC80211(priv, "leave\n");
1867 spin_unlock_irqrestore(&priv->lock, flags);
1868
1dda6d28 1869 priv->cfg->ops->lib->post_associate(priv, priv->vif);
9944b938 1870
9944b938
AK		 1871 return 0;
1872}
1873EXPORT_SYMBOL(iwl_mac_beacon_update);
1874
b55e75ed 1875static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1876{
1dda6d28 1877 iwl_connection_init_rx_config(priv, vif);
727882d6
AK		 1878
1879 if (priv->cfg->ops->hcmd->set_rxon_chain)
1880 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1881
b55e75ed 1882 return iwlcore_commit_rxon(priv);
727882d6 1883}
727882d6 1884
b55e75ed 1885int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1886{
1887 struct iwl_priv *priv = hw->priv;
47e28f41 1888 int err = 0;
cbb6ab94 1889
1ed32e4f 1890 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
cbb6ab94 1891
47e28f41
JB		 1892 mutex_lock(&priv->mutex);
1893
b55e75ed
JB		 1894 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1895 err = -EINVAL;
1896 goto out;
1897 }
1898
cbb6ab94
AK		 1899 if (priv->vif) {
1900 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 1901 err = -EOPNOTSUPP;
1902 goto out;
cbb6ab94
AK		 1903 }
1904
1ed32e4f
JB		 1905 priv->vif = vif;
1906 priv->iw_mode = vif->type;
cbb6ab94 1907
b55e75ed
JB		 1908 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
1909 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
cbb6ab94 1910
b55e75ed
JB		 1911 err = iwl_set_mode(priv, vif);
1912 if (err)
1913 goto out_err;
7e246191 1914
b55e75ed 1915 goto out;
cbb6ab94 1916
b55e75ed
JB		 1917 out_err:
1918 priv->vif = NULL;
1919 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1920 out:
cbb6ab94
AK		 1921 mutex_unlock(&priv->mutex);
1922
1923 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1924 return err;
cbb6ab94
AK		 1925}
1926EXPORT_SYMBOL(iwl_mac_add_interface);
1927
d8052319 1928void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 1929 struct ieee80211_vif *vif)
d8052319
AK		 1930{
1931 struct iwl_priv *priv = hw->priv;
1932
1933 IWL_DEBUG_MAC80211(priv, "enter\n");
1934
1935 mutex_lock(&priv->mutex);
1936
1937 if (iwl_is_ready_rf(priv)) {
1938 iwl_scan_cancel_timeout(priv, 100);
1939 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1940 iwlcore_commit_rxon(priv);
1941 }
1ed32e4f 1942 if (priv->vif == vif) {
d8052319
AK		 1943 priv->vif = NULL;
1944 memset(priv->bssid, 0, ETH_ALEN);
1945 }
1946 mutex_unlock(&priv->mutex);
1947
1948 IWL_DEBUG_MAC80211(priv, "leave\n");
1949
1950}
1951EXPORT_SYMBOL(iwl_mac_remove_interface);
1952
4808368d
AK		 1953/**
1954 * iwl_mac_config - mac80211 config callback
4808368d
AK		 1955 */
1956int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
1957{
1958 struct iwl_priv *priv = hw->priv;
1959 const struct iwl_channel_info *ch_info;
1960 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 1961 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 1962 unsigned long flags = 0;
1963 int ret = 0;
1964 u16 ch;
1965 int scan_active = 0;
1966
1967 mutex_lock(&priv->mutex);
1968
4808368d
AK		 1969 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
1970 conf->channel->hw_value, changed);
1971
1972 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
1973 test_bit(STATUS_SCANNING, &priv->status))) {
1974 scan_active = 1;
1975 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
1976 }
1977
ba37a3d0
JB		 1978 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
1979 IEEE80211_CONF_CHANGE_CHANNEL)) {
1980 /* mac80211 uses static for non-HT which is what we want */
1981 priv->current_ht_config.smps = conf->smps_mode;
1982
1983 /*
1984 * Recalculate chain counts.
1985 *
1986 * If monitor mode is enabled then mac80211 will
1987 * set up the SM PS mode to OFF if an HT channel is
1988 * configured.
1989 */
1990 if (priv->cfg->ops->hcmd->set_rxon_chain)
1991 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1992 }
4808368d
AK		 1993
1994 /* during scanning mac80211 will delay channel setting until
1995 * scan finish with changed = 0
1996 */
1997 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1998 if (scan_active)
1999 goto set_ch_out;
2000
2001 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2002 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2003 if (!is_channel_valid(ch_info)) {
2004 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2005 ret = -EINVAL;
2006 goto set_ch_out;
2007 }
2008
4808368d
AK		 2009 spin_lock_irqsave(&priv->lock, flags);
2010
28bd723b
DH		 2011 /* Configure HT40 channels */
2012 ht_conf->is_ht = conf_is_ht(conf);
2013 if (ht_conf->is_ht) {
2014 if (conf_is_ht40_minus(conf)) {
2015 ht_conf->extension_chan_offset =
2016 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2017 ht_conf->is_40mhz = true;
28bd723b
DH		 2018 } else if (conf_is_ht40_plus(conf)) {
2019 ht_conf->extension_chan_offset =
2020 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2021 ht_conf->is_40mhz = true;
28bd723b
DH		 2022 } else {
2023 ht_conf->extension_chan_offset =
2024 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2025 ht_conf->is_40mhz = false;
28bd723b
DH		 2026 }
2027 } else
c812ee24 2028 ht_conf->is_40mhz = false;
28bd723b
DH		 2029 /* Default to no protection. Protection mode will later be set
2030 * from BSS config in iwl_ht_conf */
2031 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2032
2033 /* if we are switching from ht to 2.4 clear flags
2034 * from any ht related info since 2.4 does not
2035 * support ht */
2036 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2037 priv->staging_rxon.flags = 0;
2038
2039 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2040 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2041
1dda6d28 2042 iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
4808368d 2043 spin_unlock_irqrestore(&priv->lock, flags);
0924e519
WYG		 2044 if (iwl_is_associated(priv) &&
2045 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2046 priv->cfg->ops->lib->set_channel_switch) {
2047 iwl_set_rate(priv);
2048 /*
2049 * at this point, staging_rxon has the
2050 * configuration for channel switch
2051 */
2052 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2053 ch);
2054 if (!ret) {
2055 iwl_print_rx_config_cmd(priv);
2056 goto out;
2057 }
2058 priv->switch_rxon.switch_in_progress = false;
2059 }
4808368d
AK		 2060 set_ch_out:
2061 /* The list of supported rates and rate mask can be different
2062 * for each band; since the band may have changed, reset
2063 * the rate mask to what mac80211 lists */
2064 iwl_set_rate(priv);
2065 }
2066
78f5fb7f
JB		 2067 if (changed & (IEEE80211_CONF_CHANGE_PS |
2068 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2069 ret = iwl_power_update_mode(priv, false);
4808368d 2070 if (ret)
e312c24c 2071 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2072 }
2073
2074 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2075 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2076 priv->tx_power_user_lmt, conf->power_level);
2077
2078 iwl_set_tx_power(priv, conf->power_level, false);
2079 }
2080
e61146e3
SG		 2081 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2082 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2083
2084 spin_lock_irqsave(&priv->lock, flags);
2085 priv->qos_data.qos_active = qos_active;
2086 iwl_update_qos(priv);
2087 spin_unlock_irqrestore(&priv->lock, flags);
2088 }
2089
0cf4c01e
MA		 2090 if (!iwl_is_ready(priv)) {
2091 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2092 goto out;
2093 }
2094
4808368d
AK		 2095 if (scan_active)
2096 goto out;
2097
2098 if (memcmp(&priv->active_rxon,
2099 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2100 iwlcore_commit_rxon(priv);
2101 else
2102 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2103
2104
2105out:
2106 IWL_DEBUG_MAC80211(priv, "leave\n");
2107 mutex_unlock(&priv->mutex);
2108 return ret;
2109}
2110EXPORT_SYMBOL(iwl_mac_config);
2111
bd564261
AK		 2112void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2113{
2114 struct iwl_priv *priv = hw->priv;
2115 unsigned long flags;
2116
2117 mutex_lock(&priv->mutex);
2118 IWL_DEBUG_MAC80211(priv, "enter\n");
2119
2120 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2121 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2122 spin_unlock_irqrestore(&priv->lock, flags);
2123
bd564261 2124 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2125
2126 /* new association get rid of ibss beacon skb */
2127 if (priv->ibss_beacon)
2128 dev_kfree_skb(priv->ibss_beacon);
2129
2130 priv->ibss_beacon = NULL;
2131
bd564261 2132 priv->timestamp = 0;
bd564261
AK		 2133
2134 spin_unlock_irqrestore(&priv->lock, flags);
2135
2136 if (!iwl_is_ready_rf(priv)) {
2137 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2138 mutex_unlock(&priv->mutex);
2139 return;
2140 }
2141
2142 /* we are restarting association process
2143 * clear RXON_FILTER_ASSOC_MSK bit
2144 */
b4665df4
JB		 2145 iwl_scan_cancel_timeout(priv, 100);
2146 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2147 iwlcore_commit_rxon(priv);
bd564261
AK		 2148
2149 iwl_set_rate(priv);
2150
2151 mutex_unlock(&priv->mutex);
2152
2153 IWL_DEBUG_MAC80211(priv, "leave\n");
2154}
2155EXPORT_SYMBOL(iwl_mac_reset_tsf);
2156
88804e2b
WYG		 2157int iwl_alloc_txq_mem(struct iwl_priv *priv)
2158{
2159 if (!priv->txq)
2160 priv->txq = kzalloc(
2161 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2162 GFP_KERNEL);
2163 if (!priv->txq) {
91dd6c27 2164 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2165 return -ENOMEM;
2166 }
2167 return 0;
2168}
2169EXPORT_SYMBOL(iwl_alloc_txq_mem);
2170
2171void iwl_free_txq_mem(struct iwl_priv *priv)
2172{
2173 kfree(priv->txq);
2174 priv->txq = NULL;
2175}
2176EXPORT_SYMBOL(iwl_free_txq_mem);
2177
20594eb0
WYG		 2178#ifdef CONFIG_IWLWIFI_DEBUGFS
2179
2180#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2181
2182void iwl_reset_traffic_log(struct iwl_priv *priv)
2183{
2184 priv->tx_traffic_idx = 0;
2185 priv->rx_traffic_idx = 0;
2186 if (priv->tx_traffic)
2187 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2188 if (priv->rx_traffic)
2189 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2190}
2191
2192int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2193{
2194 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2195
2196 if (iwl_debug_level & IWL_DL_TX) {
2197 if (!priv->tx_traffic) {
2198 priv->tx_traffic =
2199 kzalloc(traffic_size, GFP_KERNEL);
2200 if (!priv->tx_traffic)
2201 return -ENOMEM;
2202 }
2203 }
2204 if (iwl_debug_level & IWL_DL_RX) {
2205 if (!priv->rx_traffic) {
2206 priv->rx_traffic =
2207 kzalloc(traffic_size, GFP_KERNEL);
2208 if (!priv->rx_traffic)
2209 return -ENOMEM;
2210 }
2211 }
2212 iwl_reset_traffic_log(priv);
2213 return 0;
2214}
2215EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2216
2217void iwl_free_traffic_mem(struct iwl_priv *priv)
2218{
2219 kfree(priv->tx_traffic);
2220 priv->tx_traffic = NULL;
2221
2222 kfree(priv->rx_traffic);
2223 priv->rx_traffic = NULL;
2224}
2225EXPORT_SYMBOL(iwl_free_traffic_mem);
2226
2227void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2228 u16 length, struct ieee80211_hdr *header)
2229{
2230 __le16 fc;
2231 u16 len;
2232
2233 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2234 return;
2235
2236 if (!priv->tx_traffic)
2237 return;
2238
2239 fc = header->frame_control;
2240 if (ieee80211_is_data(fc)) {
2241 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2242 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2243 memcpy((priv->tx_traffic +
2244 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2245 header, len);
2246 priv->tx_traffic_idx =
2247 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2248 }
2249}
2250EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2251
2252void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2253 u16 length, struct ieee80211_hdr *header)
2254{
2255 __le16 fc;
2256 u16 len;
2257
2258 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2259 return;
2260
2261 if (!priv->rx_traffic)
2262 return;
2263
2264 fc = header->frame_control;
2265 if (ieee80211_is_data(fc)) {
2266 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2267 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2268 memcpy((priv->rx_traffic +
2269 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2270 header, len);
2271 priv->rx_traffic_idx =
2272 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2273 }
2274}
2275EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2276
2277const char *get_mgmt_string(int cmd)
2278{
2279 switch (cmd) {
2280 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2281 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2282 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2283 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2284 IWL_CMD(MANAGEMENT_PROBE_REQ);
2285 IWL_CMD(MANAGEMENT_PROBE_RESP);
2286 IWL_CMD(MANAGEMENT_BEACON);
2287 IWL_CMD(MANAGEMENT_ATIM);
2288 IWL_CMD(MANAGEMENT_DISASSOC);
2289 IWL_CMD(MANAGEMENT_AUTH);
2290 IWL_CMD(MANAGEMENT_DEAUTH);
2291 IWL_CMD(MANAGEMENT_ACTION);
2292 default:
2293 return "UNKNOWN";
2294
2295 }
2296}
2297
2298const char *get_ctrl_string(int cmd)
2299{
2300 switch (cmd) {
2301 IWL_CMD(CONTROL_BACK_REQ);
2302 IWL_CMD(CONTROL_BACK);
2303 IWL_CMD(CONTROL_PSPOLL);
2304 IWL_CMD(CONTROL_RTS);
2305 IWL_CMD(CONTROL_CTS);
2306 IWL_CMD(CONTROL_ACK);
2307 IWL_CMD(CONTROL_CFEND);
2308 IWL_CMD(CONTROL_CFENDACK);
2309 default:
2310 return "UNKNOWN";
2311
2312 }
2313}
2314
7163b8a4 2315void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2316{
2317 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2318 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2319 priv->led_tpt = 0;
22fdf3c9
WYG		 2320}
2321
2322/*
2323 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2324 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2325 * Use debugFs to display the rx/rx_statistics
2326 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2327 * information will be recorded, but DATA pkt still will be recorded
2328 * for the reason of iwl_led.c need to control the led blinking based on
2329 * number of tx and rx data.
2330 *
2331 */
2332void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2333{
2334 struct traffic_stats *stats;
2335
2336 if (is_tx)
2337 stats = &priv->tx_stats;
2338 else
2339 stats = &priv->rx_stats;
2340
2341 if (ieee80211_is_mgmt(fc)) {
2342 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2343 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2344 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2345 break;
2346 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2347 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2348 break;
2349 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2350 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2351 break;
2352 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2353 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2354 break;
2355 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2356 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2357 break;
2358 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2359 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2360 break;
2361 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2362 stats->mgmt[MANAGEMENT_BEACON]++;
2363 break;
2364 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2365 stats->mgmt[MANAGEMENT_ATIM]++;
2366 break;
2367 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2368 stats->mgmt[MANAGEMENT_DISASSOC]++;
2369 break;
2370 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2371 stats->mgmt[MANAGEMENT_AUTH]++;
2372 break;
2373 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2374 stats->mgmt[MANAGEMENT_DEAUTH]++;
2375 break;
2376 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2377 stats->mgmt[MANAGEMENT_ACTION]++;
2378 break;
2379 }
2380 } else if (ieee80211_is_ctl(fc)) {
2381 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2382 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2383 stats->ctrl[CONTROL_BACK_REQ]++;
2384 break;
2385 case cpu_to_le16(IEEE80211_STYPE_BACK):
2386 stats->ctrl[CONTROL_BACK]++;
2387 break;
2388 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2389 stats->ctrl[CONTROL_PSPOLL]++;
2390 break;
2391 case cpu_to_le16(IEEE80211_STYPE_RTS):
2392 stats->ctrl[CONTROL_RTS]++;
2393 break;
2394 case cpu_to_le16(IEEE80211_STYPE_CTS):
2395 stats->ctrl[CONTROL_CTS]++;
2396 break;
2397 case cpu_to_le16(IEEE80211_STYPE_ACK):
2398 stats->ctrl[CONTROL_ACK]++;
2399 break;
2400 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2401 stats->ctrl[CONTROL_CFEND]++;
2402 break;
2403 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2404 stats->ctrl[CONTROL_CFENDACK]++;
2405 break;
2406 }
2407 } else {
2408 /* data */
2409 stats->data_cnt++;
2410 stats->data_bytes += len;
2411 }
d5f4cf71 2412 iwl_leds_background(priv);
22fdf3c9
WYG		 2413}
2414EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2415#endif
2416
a0ea9493 2417static const char *get_csr_string(int cmd)
696bdee3
WYG		 2418{
2419 switch (cmd) {
2420 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2421 IWL_CMD(CSR_INT_COALESCING);
2422 IWL_CMD(CSR_INT);
2423 IWL_CMD(CSR_INT_MASK);
2424 IWL_CMD(CSR_FH_INT_STATUS);
2425 IWL_CMD(CSR_GPIO_IN);
2426 IWL_CMD(CSR_RESET);
2427 IWL_CMD(CSR_GP_CNTRL);
2428 IWL_CMD(CSR_HW_REV);
2429 IWL_CMD(CSR_EEPROM_REG);
2430 IWL_CMD(CSR_EEPROM_GP);
2431 IWL_CMD(CSR_OTP_GP_REG);
2432 IWL_CMD(CSR_GIO_REG);
2433 IWL_CMD(CSR_GP_UCODE_REG);
2434 IWL_CMD(CSR_GP_DRIVER_REG);
2435 IWL_CMD(CSR_UCODE_DRV_GP1);
2436 IWL_CMD(CSR_UCODE_DRV_GP2);
2437 IWL_CMD(CSR_LED_REG);
2438 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2439 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2440 IWL_CMD(CSR_ANA_PLL_CFG);
2441 IWL_CMD(CSR_HW_REV_WA_REG);
2442 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2443 default:
2444 return "UNKNOWN";
2445
2446 }
2447}
2448
2449void iwl_dump_csr(struct iwl_priv *priv)
2450{
2451 int i;
2452 u32 csr_tbl[] = {
2453 CSR_HW_IF_CONFIG_REG,
2454 CSR_INT_COALESCING,
2455 CSR_INT,
2456 CSR_INT_MASK,
2457 CSR_FH_INT_STATUS,
2458 CSR_GPIO_IN,
2459 CSR_RESET,
2460 CSR_GP_CNTRL,
2461 CSR_HW_REV,
2462 CSR_EEPROM_REG,
2463 CSR_EEPROM_GP,
2464 CSR_OTP_GP_REG,
2465 CSR_GIO_REG,
2466 CSR_GP_UCODE_REG,
2467 CSR_GP_DRIVER_REG,
2468 CSR_UCODE_DRV_GP1,
2469 CSR_UCODE_DRV_GP2,
2470 CSR_LED_REG,
2471 CSR_DRAM_INT_TBL_REG,
2472 CSR_GIO_CHICKEN_BITS,
2473 CSR_ANA_PLL_CFG,
2474 CSR_HW_REV_WA_REG,
2475 CSR_DBG_HPET_MEM_REG
2476 };
2477 IWL_ERR(priv, "CSR values:\n");
2478 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2479 "CSR_INT_PERIODIC_REG)\n");
2480 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2481 IWL_ERR(priv, " %25s: 0X%08x\n",
2482 get_csr_string(csr_tbl[i]),
2483 iwl_read32(priv, csr_tbl[i]));
2484 }
2485}
2486EXPORT_SYMBOL(iwl_dump_csr);
2487
a0ea9493 2488static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2489{
2490 switch (cmd) {
2491 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2492 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2493 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2494 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2495 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2496 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2497 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2498 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2499 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2500 default:
2501 return "UNKNOWN";
2502
2503 }
2504}
2505
2506int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2507{
2508 int i;
2509#ifdef CONFIG_IWLWIFI_DEBUG
2510 int pos = 0;
2511 size_t bufsz = 0;
2512#endif
2513 u32 fh_tbl[] = {
2514 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2515 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2516 FH_RSCSR_CHNL0_WPTR,
2517 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2518 FH_MEM_RSSR_SHARED_CTRL_REG,
2519 FH_MEM_RSSR_RX_STATUS_REG,
2520 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2521 FH_TSSR_TX_STATUS_REG,
2522 FH_TSSR_TX_ERROR_REG
2523 };
2524#ifdef CONFIG_IWLWIFI_DEBUG
2525 if (display) {
2526 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2527 *buf = kmalloc(bufsz, GFP_KERNEL);
2528 if (!*buf)
2529 return -ENOMEM;
2530 pos += scnprintf(*buf + pos, bufsz - pos,
2531 "FH register values:\n");
2532 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2533 pos += scnprintf(*buf + pos, bufsz - pos,
2534 " %34s: 0X%08x\n",
2535 get_fh_string(fh_tbl[i]),
2536 iwl_read_direct32(priv, fh_tbl[i]));
2537 }
2538 return pos;
2539 }
2540#endif
2541 IWL_ERR(priv, "FH register values:\n");
2542 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2543 IWL_ERR(priv, " %34s: 0X%08x\n",
2544 get_fh_string(fh_tbl[i]),
2545 iwl_read_direct32(priv, fh_tbl[i]));
2546 }
2547 return 0;
2548}
2549EXPORT_SYMBOL(iwl_dump_fh);
2550
a93e7973 2551static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2552{
2553 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2554 return;
2555
2556 if (!iwl_is_associated(priv)) {
2557 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2558 return;
2559 }
2560 /*
2561 * There is no easy and better way to force reset the radio,
2562 * the only known method is switching channel which will force to
2563 * reset and tune the radio.
2564 * Use internal short scan (single channel) operation to should
2565 * achieve this objective.
2566 * Driver should reset the radio when number of consecutive missed
2567 * beacon, or any other uCode error condition detected.
2568 */
2569 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2570 iwl_internal_short_hw_scan(priv);
afbdd69a 2571}
a93e7973 2572
a93e7973
WYG		 2573
2574int iwl_force_reset(struct iwl_priv *priv, int mode)
2575{
8a472da4
WYG		 2576 struct iwl_force_reset *force_reset;
2577
a93e7973
WYG		 2578 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2579 return -EINVAL;
2580
8a472da4
WYG		 2581 if (mode >= IWL_MAX_FORCE_RESET) {
2582 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2583 return -EINVAL;
2584 }
2585 force_reset = &priv->force_reset[mode];
2586 force_reset->reset_request_count++;
2587 if (force_reset->last_force_reset_jiffies &&
2588 time_after(force_reset->last_force_reset_jiffies +
2589 force_reset->reset_duration, jiffies)) {
a93e7973 2590 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 2591 force_reset->reset_reject_count++;
a93e7973
WYG		 2592 return -EAGAIN;
2593 }
8a472da4
WYG		 2594 force_reset->reset_success_count++;
2595 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2596 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2597 switch (mode) {
2598 case IWL_RF_RESET:
2599 iwl_force_rf_reset(priv);
2600 break;
2601 case IWL_FW_RESET:
2602 IWL_ERR(priv, "On demand firmware reload\n");
2603 /* Set the FW error flag -- cleared on iwl_down */
2604 set_bit(STATUS_FW_ERROR, &priv->status);
2605 wake_up_interruptible(&priv->wait_command_queue);
2606 /*
2607 * Keep the restart process from trying to send host
2608 * commands by clearing the INIT status bit
2609 */
2610 clear_bit(STATUS_READY, &priv->status);
2611 queue_work(priv->workqueue, &priv->restart);
2612 break;
a93e7973 2613 }
a93e7973
WYG		 2614 return 0;
2615}
b74e31a9
WYG		 2616EXPORT_SYMBOL(iwl_force_reset);
2617
2618/**
2619 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2620 *
2621 * During normal condition (no queue is stuck), the timer is continually set to
2622 * execute every monitor_recover_period milliseconds after the last timer
2623 * expired. When the queue read_ptr is at the same place, the timer is
2624 * shorten to 100mSecs. This is
2625 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2626 * 2) to detect the stuck queues quicker before the station and AP can
2627 * disassociate each other.
2628 *
2629 * This function monitors all the tx queues and recover from it if any
2630 * of the queues are stuck.
2631 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2632 * it will recover by resetting the firmware and return.
2633 * 2. Then, it checks for station association. If it associates it will check
2634 * other queues. If any queue is stuck, it will recover by resetting
2635 * the firmware.
2636 * Note: It the number of times the queue read_ptr to be at the same place to
2637 * be MAX_REPEAT+1 in order to consider to be stuck.
2638 */
2639/*
2640 * The maximum number of times the read pointer of the tx queue at the
2641 * same place without considering to be stuck.
2642 */
2643#define MAX_REPEAT (2)
2644static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2645{
2646 struct iwl_tx_queue *txq;
2647 struct iwl_queue *q;
2648
2649 txq = &priv->txq[cnt];
2650 q = &txq->q;
2651 /* queue is empty, skip */
2652 if (q->read_ptr != q->write_ptr) {
2653 if (q->read_ptr == q->last_read_ptr) {
2654 /* a queue has not been read from last time */
2655 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2656 IWL_ERR(priv,
2657 "queue %d stuck %d time. Fw reload.\n",
2658 q->id, q->repeat_same_read_ptr);
2659 q->repeat_same_read_ptr = 0;
2660 iwl_force_reset(priv, IWL_FW_RESET);
2661 } else {
2662 q->repeat_same_read_ptr++;
2663 IWL_DEBUG_RADIO(priv,
2664 "queue %d, not read %d time\n",
2665 q->id,
2666 q->repeat_same_read_ptr);
2667 mod_timer(&priv->monitor_recover, jiffies +
2668 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2669 }
2670 return 1;
2671 } else {
2672 q->last_read_ptr = q->read_ptr;
2673 q->repeat_same_read_ptr = 0;
2674 }
2675 }
2676 return 0;
2677}
2678
2679void iwl_bg_monitor_recover(unsigned long data)
2680{
2681 struct iwl_priv *priv = (struct iwl_priv *)data;
2682 int cnt;
2683
2684 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2685 return;
2686
2687 /* monitor and check for stuck cmd queue */
2688 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2689 return;
2690
2691 /* monitor and check for other stuck queues */
2692 if (iwl_is_associated(priv)) {
2693 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2694 /* skip as we already checked the command queue */
2695 if (cnt == IWL_CMD_QUEUE_NUM)
2696 continue;
2697 if (iwl_check_stuck_queue(priv, cnt))
2698 return;
2699 }
2700 }
2701 /*
2702 * Reschedule the timer to occur in
2703 * priv->cfg->monitor_recover_period
2704 */
2705 mod_timer(&priv->monitor_recover,
2706 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2707}
2708EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2709
6da3a13e
WYG		 2710#ifdef CONFIG_PM
2711
2712int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2713{
2714 struct iwl_priv *priv = pci_get_drvdata(pdev);
2715
2716 /*
2717 * This function is called when system goes into suspend state
2718 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2719 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2720 * it will not call apm_ops.stop() to stop the DMA operation.
2721 * Calling apm_ops.stop here to make sure we stop the DMA.
2722 */
2723 priv->cfg->ops->lib->apm_ops.stop(priv);
2724
2725 pci_save_state(pdev);
2726 pci_disable_device(pdev);
2727 pci_set_power_state(pdev, PCI_D3hot);
2728
2729 return 0;
2730}
2731EXPORT_SYMBOL(iwl_pci_suspend);
2732
2733int iwl_pci_resume(struct pci_dev *pdev)
2734{
2735 struct iwl_priv *priv = pci_get_drvdata(pdev);
2736 int ret;
2737
cd398c31
AK		 2738 /*
2739 * We disable the RETRY_TIMEOUT register (0x41) to keep
2740 * PCI Tx retries from interfering with C3 CPU state.
2741 */
2742 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2743
6da3a13e
WYG		 2744 pci_set_power_state(pdev, PCI_D0);
2745 ret = pci_enable_device(pdev);
2746 if (ret)
2747 return ret;
2748 pci_restore_state(pdev);
2749 iwl_enable_interrupts(priv);
2750
2751 return 0;
2752}
2753EXPORT_SYMBOL(iwl_pci_resume);
2754
2755#endif /* CONFIG_PM */
Linux kernel - Deliverables
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