projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
iwlwifi: remove priv->mac_addr
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 70
c7de35cd
RR		 71#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
a562a9dd
RC		 84u32 iwl_debug_level;
85EXPORT_SYMBOL(iwl_debug_level);
86
c7de35cd
RR		 87/*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
1826dcc0 95const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110};
1826dcc0 111EXPORT_SYMBOL(iwl_rates);
c7de35cd 112
e7d326ac
TW		 113int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114{
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
60d32215
DH		 121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141}
142EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
76eff18b
TW		 144u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
145{
146 int i;
147 u8 ind = ant;
148 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
149 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
150 if (priv->hw_params.valid_tx_ant & BIT(ind))
151 return ind;
152 }
153 return ant;
154}
47ff65c4 155EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 156
157const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
158EXPORT_SYMBOL(iwl_bcast_addr);
159
160
1d0a082d
AK		 161/* This function both allocates and initializes hw and priv. */
162struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
163 struct ieee80211_ops *hw_ops)
164{
165 struct iwl_priv *priv;
166
167 /* mac80211 allocates memory for this device instance, including
168 * space for this driver's private structure */
169 struct ieee80211_hw *hw =
170 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
171 if (hw == NULL) {
a3139c59
SO		 172 printk(KERN_ERR "%s: Can not allocate network device\n",
173 cfg->name);
1d0a082d
AK		 174 goto out;
175 }
176
177 priv = hw->priv;
178 priv->hw = hw;
179
180out:
181 return hw;
182}
183EXPORT_SYMBOL(iwl_alloc_all);
184
b661c819
TW		 185void iwl_hw_detect(struct iwl_priv *priv)
186{
187 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
188 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
189 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
190}
191EXPORT_SYMBOL(iwl_hw_detect);
192
14d2aac5
AK		 193/*
194 * QoS support
195*/
e61146e3 196static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 197{
198 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
199 return;
200
201 priv->qos_data.def_qos_parm.qos_flags = 0;
202
14d2aac5
AK		 203 if (priv->qos_data.qos_active)
204 priv->qos_data.def_qos_parm.qos_flags |=
205 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
206
207 if (priv->current_ht_config.is_ht)
208 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
209
e61146e3
SG		 210 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
211 priv->qos_data.qos_active,
212 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 213
e61146e3
SG		 214 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
215 sizeof(struct iwl_qosparam_cmd),
216 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 217}
c7de35cd 218
d9fe60de
JB		 219#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
220#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 221static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 222 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 223 enum ieee80211_band band)
224{
39130df3
RR		 225 u16 max_bit_rate = 0;
226 u8 rx_chains_num = priv->hw_params.rx_chains_num;
227 u8 tx_chains_num = priv->hw_params.tx_chains_num;
228
c7de35cd 229 ht_info->cap = 0;
d9fe60de 230 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 231
d9fe60de 232 ht_info->ht_supported = true;
c7de35cd 233
b261793d
DH		 234 if (priv->cfg->ht_greenfield_support)
235 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 236 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 237 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 238 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 239 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
240 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
241 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 242 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 243 }
c7de35cd
RR		 244
245 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 246 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 247
248 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
250
d9fe60de 251 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 252 if (rx_chains_num >= 2)
d9fe60de 253 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 254 if (rx_chains_num >= 3)
d9fe60de 255 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 256
257 /* Highest supported Rx data rate */
258 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 259 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
260 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 261
262 /* Tx MCS capabilities */
d9fe60de 263 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 264 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 265 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
266 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
267 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 268 }
c7de35cd 269}
c7de35cd 270
c7de35cd
RR		 271/**
272 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
273 */
534166de 274int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 275{
276 struct iwl_channel_info *ch;
277 struct ieee80211_supported_band *sband;
278 struct ieee80211_channel *channels;
279 struct ieee80211_channel *geo_ch;
280 struct ieee80211_rate *rates;
281 int i = 0;
282
283 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
284 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 285 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 286 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
287 return 0;
288 }
289
290 channels = kzalloc(sizeof(struct ieee80211_channel) *
291 priv->channel_count, GFP_KERNEL);
292 if (!channels)
293 return -ENOMEM;
294
5027309b 295 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 296 GFP_KERNEL);
297 if (!rates) {
298 kfree(channels);
299 return -ENOMEM;
300 }
301
302 /* 5.2GHz channels start after the 2.4GHz channels */
303 sband = &priv->bands[IEEE80211_BAND_5GHZ];
304 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
305 /* just OFDM */
306 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 307 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 308
49779293 309 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 310 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 311 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 312
313 sband = &priv->bands[IEEE80211_BAND_2GHZ];
314 sband->channels = channels;
315 /* OFDM & CCK */
316 sband->bitrates = rates;
5027309b 317 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 318
49779293 319 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 320 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 321 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 322
323 priv->ieee_channels = channels;
324 priv->ieee_rates = rates;
325
c7de35cd
RR		 326 for (i = 0; i < priv->channel_count; i++) {
327 ch = &priv->channel_info[i];
328
329 /* FIXME: might be removed if scan is OK */
330 if (!is_channel_valid(ch))
331 continue;
332
333 if (is_channel_a_band(ch))
334 sband = &priv->bands[IEEE80211_BAND_5GHZ];
335 else
336 sband = &priv->bands[IEEE80211_BAND_2GHZ];
337
338 geo_ch = &sband->channels[sband->n_channels++];
339
340 geo_ch->center_freq =
341 ieee80211_channel_to_frequency(ch->channel);
342 geo_ch->max_power = ch->max_power_avg;
343 geo_ch->max_antenna_gain = 0xff;
344 geo_ch->hw_value = ch->channel;
345
346 if (is_channel_valid(ch)) {
347 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
348 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
349
350 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
351 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
352
353 if (ch->flags & EEPROM_CHANNEL_RADAR)
354 geo_ch->flags |= IEEE80211_CHAN_RADAR;
355
7aafef1c 356 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 357
dc1b0973
WYG		 358 if (ch->max_power_avg > priv->tx_power_device_lmt)
359 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 360 } else {
361 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
362 }
363
e1623446 364 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 365 ch->channel, geo_ch->center_freq,
366 is_channel_a_band(ch) ? "5.2" : "2.4",
367 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
368 "restricted" : "valid",
369 geo_ch->flags);
370 }
371
372 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
373 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 374 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
375 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 376 priv->pci_dev->device,
377 priv->pci_dev->subsystem_device);
c7de35cd
RR		 378 priv->cfg->sku &= ~IWL_SKU_A;
379 }
380
978785a3 381 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 382 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
383 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 384
385 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
386
387 return 0;
388}
534166de 389EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 390
391/*
392 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
393 */
534166de 394void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 395{
396 kfree(priv->ieee_channels);
397 kfree(priv->ieee_rates);
398 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
399}
534166de 400EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 401
37dc70fe
AK		 402/*
403 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
404 * function.
405 */
406void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
407 __le32 *tx_flags)
408{
409 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
410 *tx_flags |= TX_CMD_FLG_RTS_MSK;
411 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
412 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
413 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
414 *tx_flags |= TX_CMD_FLG_CTS_MSK;
415 }
416}
417EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
418
28a6b07a 419static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 420{
ba37a3d0 421 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 422 priv->current_ht_config.single_chain_sufficient;
c7de35cd 423}
963f5517 424
47c5196e
TW		 425static u8 iwl_is_channel_extension(struct iwl_priv *priv,
426 enum ieee80211_band band,
427 u16 channel, u8 extension_chan_offset)
428{
429 const struct iwl_channel_info *ch_info;
430
431 ch_info = iwl_get_channel_info(priv, band, channel);
432 if (!is_channel_valid(ch_info))
433 return 0;
434
d9fe60de 435 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 436 return !(ch_info->ht40_extension_channel &
689da1b3 437 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 438 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 439 return !(ch_info->ht40_extension_channel &
689da1b3 440 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 441
442 return 0;
443}
444
7aafef1c 445u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 446 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 447{
fad95bf5 448 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 449
fad95bf5 450 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 451 return 0;
452
a2b0f02e
WYG		 453 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
454 * the bit will not set if it is pure 40MHz case
455 */
47c5196e 456 if (sta_ht_inf) {
a2b0f02e 457 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 458 return 0;
459 }
d73e4923 460#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG		 461 if (priv->disable_ht40)
462 return 0;
463#endif
611d3eb7
WYG		 464 return iwl_is_channel_extension(priv, priv->band,
465 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 466 ht_conf->extension_chan_offset);
47c5196e 467}
7aafef1c 468EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 469
2c2f3b33
TW		 470static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
471{
472 u16 new_val = 0;
473 u16 beacon_factor = 0;
474
475 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
476 new_val = beacon_val / beacon_factor;
477
478 if (!new_val)
479 new_val = max_beacon_val;
480
481 return new_val;
482}
483
1dda6d28 484void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW		 485{
486 u64 tsf;
487 s32 interval_tm, rem;
488 unsigned long flags;
489 struct ieee80211_conf *conf = NULL;
490 u16 beacon_int;
491
492 conf = ieee80211_get_hw_conf(priv->hw);
493
494 spin_lock_irqsave(&priv->lock, flags);
495 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
496 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
497
1dda6d28 498 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 499
1dda6d28 500 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW		 501 /* TODO: we need to get atim_window from upper stack
502 * for now we set to 0 */
503 priv->rxon_timing.atim_window = 0;
1dda6d28
JB		 504 } else {
505 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW		 506 }
507
508 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 509 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
2c2f3b33
TW		 510 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
511
512 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 513 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33
TW		 514 rem = do_div(tsf, interval_tm);
515 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
516
517 spin_unlock_irqrestore(&priv->lock, flags);
518 IWL_DEBUG_ASSOC(priv,
519 "beacon interval %d beacon timer %d beacon tim %d\n",
520 le16_to_cpu(priv->rxon_timing.beacon_interval),
521 le32_to_cpu(priv->rxon_timing.beacon_init_val),
522 le16_to_cpu(priv->rxon_timing.atim_window));
523}
524EXPORT_SYMBOL(iwl_setup_rxon_timing);
525
8ccde88a
SO		 526void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
527{
528 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
529
530 if (hw_decrypt)
531 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
532 else
533 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
534
535}
536EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
537
538/**
539 * iwl_check_rxon_cmd - validate RXON structure is valid
540 *
541 * NOTE: This is really only useful during development and can eventually
542 * be #ifdef'd out once the driver is stable and folks aren't actively
543 * making changes
544 */
545int iwl_check_rxon_cmd(struct iwl_priv *priv)
546{
547 int error = 0;
548 int counter = 1;
549 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
550
551 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
552 error |= le32_to_cpu(rxon->flags &
553 (RXON_FLG_TGJ_NARROW_BAND_MSK |
554 RXON_FLG_RADAR_DETECT_MSK));
555 if (error)
556 IWL_WARN(priv, "check 24G fields %d | %d\n",
557 counter++, error);
558 } else {
559 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
560 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
561 if (error)
562 IWL_WARN(priv, "check 52 fields %d | %d\n",
563 counter++, error);
564 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
565 if (error)
566 IWL_WARN(priv, "check 52 CCK %d | %d\n",
567 counter++, error);
568 }
569 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
570 if (error)
571 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
572
573 /* make sure basic rates 6Mbps and 1Mbps are supported */
574 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
575 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
576 if (error)
577 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
578
579 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
580 if (error)
581 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
582
583 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
584 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
585 if (error)
586 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
587 counter++, error);
588
589 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
590 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
591 if (error)
592 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
593 counter++, error);
594
595 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
596 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
597 if (error)
598 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
599 counter++, error);
600
601 if (error)
602 IWL_WARN(priv, "Tuning to channel %d\n",
603 le16_to_cpu(rxon->channel));
604
605 if (error) {
606 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
607 return -1;
608 }
609 return 0;
610}
611EXPORT_SYMBOL(iwl_check_rxon_cmd);
612
613/**
614 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
615 * @priv: staging_rxon is compared to active_rxon
616 *
617 * If the RXON structure is changing enough to require a new tune,
618 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
619 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
620 */
621int iwl_full_rxon_required(struct iwl_priv *priv)
622{
623
624 /* These items are only settable from the full RXON command */
625 if (!(iwl_is_associated(priv)) ||
626 compare_ether_addr(priv->staging_rxon.bssid_addr,
627 priv->active_rxon.bssid_addr) ||
628 compare_ether_addr(priv->staging_rxon.node_addr,
629 priv->active_rxon.node_addr) ||
630 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
631 priv->active_rxon.wlap_bssid_addr) ||
632 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
633 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
634 (priv->staging_rxon.air_propagation !=
635 priv->active_rxon.air_propagation) ||
636 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
637 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
638 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
639 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 640 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
641 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 642 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
643 return 1;
644
645 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
646 * be updated with the RXON_ASSOC command -- however only some
647 * flag transitions are allowed using RXON_ASSOC */
648
649 /* Check if we are not switching bands */
650 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
651 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
652 return 1;
653
654 /* Check if we are switching association toggle */
655 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
656 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
657 return 1;
658
659 return 0;
660}
661EXPORT_SYMBOL(iwl_full_rxon_required);
662
663u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
664{
4a02886b
JB		 665 /*
666 * Assign the lowest rate -- should really get this from
667 * the beacon skb from mac80211.
668 */
8ccde88a
SO		 669 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
670 return IWL_RATE_1M_PLCP;
671 else
672 return IWL_RATE_6M_PLCP;
673}
674EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
675
fad95bf5 676void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 677{
c1adf9fb 678 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 679
fad95bf5 680 if (!ht_conf->is_ht) {
a2b0f02e 681 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 682 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 683 RXON_FLG_HT40_PROT_MSK |
42eb7c64 684 RXON_FLG_HT_PROT_MSK);
47c5196e 685 return;
42eb7c64 686 }
47c5196e 687
a2b0f02e
WYG		 688 /* FIXME: if the definition of ht_protection changed, the "translation"
689 * will be needed for rxon->flags
690 */
fad95bf5 691 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 692
693 /* Set up channel bandwidth:
7aafef1c 694 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 695 /* clear the HT channel mode before set the mode */
696 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
697 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 698 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
699 /* pure ht40 */
fad95bf5 700 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 701 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 702 /* Note: control channel is opposite of extension channel */
fad95bf5 703 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 704 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
705 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
706 break;
707 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
708 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
709 break;
710 }
711 } else {
a2b0f02e 712 /* Note: control channel is opposite of extension channel */
fad95bf5 713 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 714 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
715 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
716 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
717 break;
718 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
719 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
720 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
721 break;
722 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
723 default:
724 /* channel location only valid if in Mixed mode */
725 IWL_ERR(priv, "invalid extension channel offset\n");
726 break;
727 }
728 }
729 } else {
730 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 731 }
732
45823531
AK		 733 if (priv->cfg->ops->hcmd->set_rxon_chain)
734 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 735
02bb1bea 736 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 737 "extension channel offset 0x%x\n",
fad95bf5
JB		 738 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
739 ht_conf->extension_chan_offset);
47c5196e
TW		 740}
741EXPORT_SYMBOL(iwl_set_rxon_ht);
742
9e5e6c32
TW		 743#define IWL_NUM_RX_CHAINS_MULTIPLE 3
744#define IWL_NUM_RX_CHAINS_SINGLE 2
745#define IWL_NUM_IDLE_CHAINS_DUAL 2
746#define IWL_NUM_IDLE_CHAINS_SINGLE 1
747
2b396a12
JB		 748/*
749 * Determine how many receiver/antenna chains to use.
750 *
751 * More provides better reception via diversity. Fewer saves power
752 * at the expense of throughput, but only when not in powersave to
753 * start with.
754 *
c7de35cd
RR		 755 * MIMO (dual stream) requires at least 2, but works better with 3.
756 * This does not determine *which* chains to use, just how many.
757 */
28a6b07a 758static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 759{
c7de35cd 760 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 761 if (is_single_rx_stream(priv))
9e5e6c32 762 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 763 else
9e5e6c32 764 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 765}
c7de35cd 766
2b396a12 767/*
3f3e0376
WYG		 768 * When we are in power saving mode, unless device support spatial
769 * multiplexing power save, use the active count for rx chain count.
2b396a12 770 */
28a6b07a
TW		 771static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
772{
ba37a3d0
JB		 773 /* # Rx chains when idling, depending on SMPS mode */
774 switch (priv->current_ht_config.smps) {
775 case IEEE80211_SMPS_STATIC:
776 case IEEE80211_SMPS_DYNAMIC:
777 return IWL_NUM_IDLE_CHAINS_SINGLE;
778 case IEEE80211_SMPS_OFF:
779 return active_cnt;
c15d20c1 780 default:
ba37a3d0
JB		 781 WARN(1, "invalid SMPS mode %d",
782 priv->current_ht_config.smps);
783 return active_cnt;
3f3e0376 784 }
c7de35cd
RR		 785}
786
04816448
GE		 787/* up to 4 chains */
788static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
789{
790 u8 res;
791 res = (chain_bitmap & BIT(0)) >> 0;
792 res += (chain_bitmap & BIT(1)) >> 1;
793 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 794 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 795 return res;
796}
797
c7de35cd
RR		 798/**
799 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
800 *
801 * Selects how many and which Rx receivers/antennas/chains to use.
802 * This should not be used for scan command ... it puts data in wrong place.
803 */
804void iwl_set_rxon_chain(struct iwl_priv *priv)
805{
28a6b07a
TW		 806 bool is_single = is_single_rx_stream(priv);
807 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 808 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
809 u32 active_chains;
28a6b07a 810 u16 rx_chain;
c7de35cd
RR		 811
812 /* Tell uCode which antennas are actually connected.
813 * Before first association, we assume all antennas are connected.
814 * Just after first association, iwl_chain_noise_calibration()
815 * checks which antennas actually *are* connected. */
04816448
GE		 816 if (priv->chain_noise_data.active_chains)
817 active_chains = priv->chain_noise_data.active_chains;
818 else
819 active_chains = priv->hw_params.valid_rx_ant;
820
821 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 822
823 /* How many receivers should we use? */
28a6b07a
TW		 824 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
825 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
826
28a6b07a 827
04816448
GE		 828 /* correct rx chain count according hw settings
829 * and chain noise calibration
830 */
831 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
832 if (valid_rx_cnt < active_rx_cnt)
833 active_rx_cnt = valid_rx_cnt;
834
835 if (valid_rx_cnt < idle_rx_cnt)
836 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 837
838 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
839 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
840
841 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
842
9e5e6c32 843 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 844 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
845 else
846 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
847
e1623446 848 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 849 priv->staging_rxon.rx_chain,
850 active_rx_cnt, idle_rx_cnt);
851
852 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
853 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 854}
855EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 856
857/**
17e72782 858 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 859 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
860 * @channel: Any channel valid for the requested phymode
861
862 * In addition to setting the staging RXON, priv->phymode is also set.
863 *
864 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
865 * in the staging RXON flag structure based on the phymode
866 */
17e72782 867int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 868{
17e72782
TW		 869 enum ieee80211_band band = ch->band;
870 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
871
8622e705 872 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 873 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 874 channel, band);
875 return -EINVAL;
876 }
877
878 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
879 (priv->band == band))
880 return 0;
881
882 priv->staging_rxon.channel = cpu_to_le16(channel);
883 if (band == IEEE80211_BAND_5GHZ)
884 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
885 else
886 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
887
888 priv->band = band;
889
e1623446 890 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 891
892 return 0;
893}
c7de35cd 894EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 895
79d07325
WYG		 896void iwl_set_flags_for_band(struct iwl_priv *priv,
897 enum ieee80211_band band,
898 struct ieee80211_vif *vif)
8ccde88a
SO		 899{
900 if (band == IEEE80211_BAND_5GHZ) {
901 priv->staging_rxon.flags &=
902 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
903 | RXON_FLG_CCK_MSK);
904 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
905 } else {
906 /* Copied from iwl_post_associate() */
c213d745 907 if (vif && vif->bss_conf.use_short_slot)
8ccde88a
SO		 908 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
909 else
910 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
911
8ccde88a
SO		 912 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
913 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
914 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
915 }
916}
79d07325 917EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 918
919/*
920 * initialize rxon structure with default values from eeprom
921 */
1dda6d28
JB		 922void iwl_connection_init_rx_config(struct iwl_priv *priv,
923 struct ieee80211_vif *vif)
8ccde88a
SO		 924{
925 const struct iwl_channel_info *ch_info;
1dda6d28
JB		 926 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
927
928 if (vif)
929 type = vif->type;
8ccde88a
SO		 930
931 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
932
1dda6d28 933 switch (type) {
8ccde88a
SO		 934 case NL80211_IFTYPE_AP:
935 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
936 break;
937
938 case NL80211_IFTYPE_STATION:
939 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
940 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
941 break;
942
943 case NL80211_IFTYPE_ADHOC:
944 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
945 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
946 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
947 RXON_FILTER_ACCEPT_GRP_MSK;
948 break;
949
8ccde88a 950 default:
1dda6d28 951 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO		 952 break;
953 }
954
955#if 0
956 /* TODO: Figure out when short_preamble would be set and cache from
957 * that */
958 if (!hw_to_local(priv->hw)->short_preamble)
959 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
960 else
961 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
962#endif
963
964 ch_info = iwl_get_channel_info(priv, priv->band,
965 le16_to_cpu(priv->active_rxon.channel));
966
967 if (!ch_info)
968 ch_info = &priv->channel_info[0];
969
8ccde88a
SO		 970 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
971 priv->band = ch_info->band;
972
1dda6d28 973 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO		 974
975 priv->staging_rxon.ofdm_basic_rates =
976 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
977 priv->staging_rxon.cck_basic_rates =
978 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
979
a2b0f02e
WYG		 980 /* clear both MIX and PURE40 mode flag */
981 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
982 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408
JB		 983
984 if (vif)
985 memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN);
986
8ccde88a
SO		 987 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
988 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 989 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 990}
991EXPORT_SYMBOL(iwl_connection_init_rx_config);
992
79d07325 993void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 994{
995 const struct ieee80211_supported_band *hw = NULL;
996 struct ieee80211_rate *rate;
997 int i;
998
999 hw = iwl_get_hw_mode(priv, priv->band);
1000 if (!hw) {
1001 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1002 return;
1003 }
1004
1005 priv->active_rate = 0;
8ccde88a
SO		 1006
1007 for (i = 0; i < hw->n_bitrates; i++) {
1008 rate = &(hw->bitrates[i]);
5027309b 1009 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1010 priv->active_rate |= (1 << rate->hw_value);
1011 }
1012
4a02886b 1013 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1014
4a02886b
JB		 1015 priv->staging_rxon.cck_basic_rates =
1016 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1017
1018 priv->staging_rxon.ofdm_basic_rates =
1019 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1020}
79d07325
WYG		 1021EXPORT_SYMBOL(iwl_set_rate);
1022
1023void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1024{
1025 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1026 return;
1027
1028 if (priv->switch_rxon.switch_in_progress) {
1029 ieee80211_chswitch_done(priv->vif, is_success);
1030 mutex_lock(&priv->mutex);
1031 priv->switch_rxon.switch_in_progress = false;
1032 mutex_unlock(&priv->mutex);
1033 }
1034}
1035EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 1036
1037void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1038{
2f301227 1039 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1040 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1041 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1042
0924e519
WYG		 1043 if (priv->switch_rxon.switch_in_progress) {
1044 if (!le32_to_cpu(csa->status) &&
1045 (csa->channel == priv->switch_rxon.channel)) {
1046 rxon->channel = csa->channel;
1047 priv->staging_rxon.channel = csa->channel;
1048 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1049 le16_to_cpu(csa->channel));
79d07325
WYG		 1050 iwl_chswitch_done(priv, true);
1051 } else {
0924e519
WYG		 1052 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1053 le16_to_cpu(csa->channel));
79d07325
WYG		 1054 iwl_chswitch_done(priv, false);
1055 }
0924e519 1056 }
8ccde88a
SO		 1057}
1058EXPORT_SYMBOL(iwl_rx_csa);
1059
1060#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1061void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1062{
1063 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1064
e1623446 1065 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1066 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1067 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1068 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1069 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1070 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1071 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1072 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1073 rxon->ofdm_basic_rates);
e1623446
TW		 1074 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1075 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1076 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1077 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1078}
a643565e 1079EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1080#endif
8ccde88a
SO		 1081/**
1082 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1083 */
1084void iwl_irq_handle_error(struct iwl_priv *priv)
1085{
1086 /* Set the FW error flag -- cleared on iwl_down */
1087 set_bit(STATUS_FW_ERROR, &priv->status);
1088
1089 /* Cancel currently queued command. */
1090 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1091
459bc732
SZ		 1092 IWL_ERR(priv, "Loaded firmware version: %s\n",
1093 priv->hw->wiphy->fw_version);
1094
3a3ff72c 1095 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1096 if (priv->cfg->ops->lib->dump_csr)
1097 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1098 if (priv->cfg->ops->lib->dump_fh)
1099 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1100 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1101#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1102 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1103 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1104#endif
1105
1106 wake_up_interruptible(&priv->wait_command_queue);
1107
1108 /* Keep the restart process from trying to send host
1109 * commands by clearing the INIT status bit */
1110 clear_bit(STATUS_READY, &priv->status);
1111
1112 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1113 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1114 "Restarting adapter due to uCode error.\n");
1115
8ccde88a
SO		 1116 if (priv->cfg->mod_params->restart_fw)
1117 queue_work(priv->workqueue, &priv->restart);
1118 }
1119}
1120EXPORT_SYMBOL(iwl_irq_handle_error);
1121
f8e200de 1122static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1123{
5220af0c 1124 int ret = 0;
d68b603c 1125
5220af0c 1126 /* stop device's busmaster DMA activity */
d68b603c
AK		 1127 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1128
5220af0c 1129 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1130 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1131 if (ret)
1132 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1133
d68b603c
AK		 1134 IWL_DEBUG_INFO(priv, "stop master\n");
1135
5220af0c 1136 return ret;
d68b603c 1137}
d68b603c
AK		 1138
1139void iwl_apm_stop(struct iwl_priv *priv)
1140{
fadb3582
BC		 1141 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1142
5220af0c 1143 /* Stop device's DMA activity */
d68b603c
AK		 1144 iwl_apm_stop_master(priv);
1145
5220af0c 1146 /* Reset the entire device */
d68b603c
AK		 1147 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1148
1149 udelay(10);
5220af0c
BC		 1150
1151 /*
1152 * Clear "initialization complete" bit to move adapter from
1153 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1154 */
d68b603c 1155 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1156}
1157EXPORT_SYMBOL(iwl_apm_stop);
1158
fadb3582
BC		 1159
1160/*
1161 * Start up NIC's basic functionality after it has been reset
1162 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1163 * NOTE: This does not load uCode nor start the embedded processor
1164 */
1165int iwl_apm_init(struct iwl_priv *priv)
1166{
1167 int ret = 0;
1168 u16 lctl;
1169
1170 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1171
1172 /*
1173 * Use "set_bit" below rather than "write", to preserve any hardware
1174 * bits already set by default after reset.
1175 */
1176
1177 /* Disable L0S exit timer (platform NMI Work/Around) */
1178 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1179 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1180
1181 /*
1182 * Disable L0s without affecting L1;
1183 * don't wait for ICH L0s (ICH bug W/A)
1184 */
1185 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1186 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1187
1188 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1189 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1190
1191 /*
1192 * Enable HAP INTA (interrupt from management bus) to
1193 * wake device's PCI Express link L1a -> L0s
1194 * NOTE: This is no-op for 3945 (non-existant bit)
1195 */
1196 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1197 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1198
1199 /*
a6c5c731
BC		 1200 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1201 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1202 * If so (likely), disable L0S, so device moves directly L0->L1;
1203 * costs negligible amount of power savings.
1204 * If not (unlikely), enable L0S, so there is at least some
1205 * power savings, even without L1.
fadb3582
BC		 1206 */
1207 if (priv->cfg->set_l0s) {
1208 lctl = iwl_pcie_link_ctl(priv);
1209 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1210 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1211 /* L1-ASPM enabled; disable(!) L0S */
1212 iwl_set_bit(priv, CSR_GIO_REG,
1213 CSR_GIO_REG_VAL_L0S_ENABLED);
1214 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1215 } else {
1216 /* L1-ASPM disabled; enable(!) L0S */
1217 iwl_clear_bit(priv, CSR_GIO_REG,
1218 CSR_GIO_REG_VAL_L0S_ENABLED);
1219 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1220 }
1221 }
1222
1223 /* Configure analog phase-lock-loop before activating to D0A */
1224 if (priv->cfg->pll_cfg_val)
1225 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1226
1227 /*
1228 * Set "initialization complete" bit to move adapter from
1229 * D0U* --> D0A* (powered-up active) state.
1230 */
1231 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1232
1233 /*
1234 * Wait for clock stabilization; once stabilized, access to
1235 * device-internal resources is supported, e.g. iwl_write_prph()
1236 * and accesses to uCode SRAM.
1237 */
1238 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1239 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1240 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1241 if (ret < 0) {
1242 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1243 goto out;
1244 }
1245
1246 /*
1247 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1248 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1249 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1250 * and don't need BSM to restore data after power-saving sleep.
1251 *
1252 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1253 * do not disable clocks. This preserves any hardware bits already
1254 * set by default in "CLK_CTRL_REG" after reset.
1255 */
1256 if (priv->cfg->use_bsm)
1257 iwl_write_prph(priv, APMG_CLK_EN_REG,
1258 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1259 else
1260 iwl_write_prph(priv, APMG_CLK_EN_REG,
1261 APMG_CLK_VAL_DMA_CLK_RQT);
1262 udelay(20);
1263
1264 /* Disable L1-Active */
1265 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1266 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1267
1268out:
1269 return ret;
1270}
1271EXPORT_SYMBOL(iwl_apm_init);
1272
1273
1274
8ccde88a
SO		 1275void iwl_configure_filter(struct ieee80211_hw *hw,
1276 unsigned int changed_flags,
1277 unsigned int *total_flags,
3ac64bee 1278 u64 multicast)
8ccde88a
SO		 1279{
1280 struct iwl_priv *priv = hw->priv;
3474ad63
JB		 1281 __le32 filter_or = 0, filter_nand = 0;
1282
1283#define CHK(test, flag) do { \
1284 if (*total_flags & (test)) \
1285 filter_or |= (flag); \
1286 else \
1287 filter_nand |= (flag); \
1288 } while (0)
8ccde88a 1289
e1623446 1290 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1291 changed_flags, *total_flags);
1292
3474ad63
JB		 1293 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
1294 CHK(FIF_ALLMULTI, RXON_FILTER_ACCEPT_GRP_MSK);
1295 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1296 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
8ccde88a 1297
3474ad63
JB		 1298#undef CHK
1299
1300 mutex_lock(&priv->mutex);
1301
1302 priv->staging_rxon.filter_flags &= ~filter_nand;
1303 priv->staging_rxon.filter_flags |= filter_or;
1304
1305 iwlcore_commit_rxon(priv);
1306
1307 mutex_unlock(&priv->mutex);
8ccde88a
SO		 1308
1309 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1310 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1311}
1312EXPORT_SYMBOL(iwl_configure_filter);
1313
da154e30
RR		 1314int iwl_set_hw_params(struct iwl_priv *priv)
1315{
da154e30
RR		 1316 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1317 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1318 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1319 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1320 else
2f301227 1321 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1322
2c2f3b33
TW		 1323 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1324
49779293
RR		 1325 if (priv->cfg->mod_params->disable_11n)
1326 priv->cfg->sku &= ~IWL_SKU_N;
1327
da154e30
RR		 1328 /* Device-specific setup */
1329 return priv->cfg->ops->lib->set_hw_params(priv);
1330}
1331EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1332
630fe9b6
TW		 1333int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1334{
1335 int ret = 0;
5eadd94b
WYG		 1336 s8 prev_tx_power = priv->tx_power_user_lmt;
1337
b744cb79
WYG		 1338 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1339 IWL_WARN(priv,
1340 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1341 tx_power,
b744cb79 1342 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1343 return -EINVAL;
1344 }
1345
dc1b0973 1346 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1347 IWL_WARN(priv,
1348 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1349 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1350 return -EINVAL;
1351 }
1352
1353 if (priv->tx_power_user_lmt != tx_power)
1354 force = true;
1355
019fb97d 1356 /* if nic is not up don't send command */
5eadd94b
WYG		 1357 if (iwl_is_ready_rf(priv)) {
1358 priv->tx_power_user_lmt = tx_power;
1359 if (force && priv->cfg->ops->lib->send_tx_power)
1360 ret = priv->cfg->ops->lib->send_tx_power(priv);
1361 else if (!priv->cfg->ops->lib->send_tx_power)
1362 ret = -EOPNOTSUPP;
1363 /*
1364 * if fail to set tx_power, restore the orig. tx power
1365 */
1366 if (ret)
1367 priv->tx_power_user_lmt = prev_tx_power;
1368 }
630fe9b6 1369
5eadd94b
WYG		 1370 /*
1371 * Even this is an async host command, the command
1372 * will always report success from uCode
1373 * So once driver can placing the command into the queue
1374 * successfully, driver can use priv->tx_power_user_lmt
1375 * to reflect the current tx power
1376 */
630fe9b6
TW		 1377 return ret;
1378}
1379EXPORT_SYMBOL(iwl_set_tx_power);
1380
ef850d7c 1381irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1382{
1383 struct iwl_priv *priv = data;
1384 u32 inta, inta_mask;
1385 u32 inta_fh;
6e8cc38d 1386 unsigned long flags;
f17d08a6
AK		 1387 if (!priv)
1388 return IRQ_NONE;
1389
6e8cc38d 1390 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1391
1392 /* Disable (but don't clear!) interrupts here to avoid
1393 * back-to-back ISRs and sporadic interrupts from our NIC.
1394 * If we have something to service, the tasklet will re-enable ints.
1395 * If we *don't* have something, we'll re-enable before leaving here. */
1396 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1397 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1398
1399 /* Discover which interrupts are active/pending */
1400 inta = iwl_read32(priv, CSR_INT);
1401 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1402
1403 /* Ignore interrupt if there's nothing in NIC to service.
1404 * This may be due to IRQ shared with another device,
1405 * or due to sporadic interrupts thrown from our NIC. */
1406 if (!inta && !inta_fh) {
1407 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1408 goto none;
1409 }
1410
1411 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1412 /* Hardware disappeared. It might have already raised
1413 * an interrupt */
1414 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1415 goto unplugged;
1416 }
1417
1418 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1419 inta, inta_mask, inta_fh);
1420
1421 inta &= ~CSR_INT_BIT_SCD;
1422
1423 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1424 if (likely(inta || inta_fh))
1425 tasklet_schedule(&priv->irq_tasklet);
1426
1427 unplugged:
6e8cc38d 1428 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1429 return IRQ_HANDLED;
1430
1431 none:
1432 /* re-enable interrupts here since we don't have anything to service. */
1433 /* only Re-enable if diabled by irq */
1434 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1435 iwl_enable_interrupts(priv);
6e8cc38d 1436 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1437 return IRQ_NONE;
1438}
ef850d7c 1439EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1440
65b52bde 1441void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1442{
1443 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1444 .lead_time = BT_LEAD_TIME_DEF,
1445 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1446 .kill_ack_mask = 0,
1447 .kill_cts_mask = 0,
1448 };
1449
06702a73
WYG		 1450 if (!bt_coex_active)
1451 bt_cmd.flags = BT_COEX_DISABLE;
1452 else
1453 bt_cmd.flags = BT_COEX_ENABLE;
1454
1455 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1456 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1457
65b52bde
JB		 1458 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1459 sizeof(struct iwl_bt_cmd), &bt_cmd))
1460 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1461}
1462EXPORT_SYMBOL(iwl_send_bt_config);
1463
ef8d5529 1464int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1465{
ef8d5529
WYG		 1466 struct iwl_statistics_cmd statistics_cmd = {
1467 .configuration_flags =
1468 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1469 };
ef8d5529
WYG		 1470
1471 if (flags & CMD_ASYNC)
1472 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1473 sizeof(struct iwl_statistics_cmd),
1474 &statistics_cmd, NULL);
1475 else
1476 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1477 sizeof(struct iwl_statistics_cmd),
1478 &statistics_cmd);
49ea8596
EG		 1479}
1480EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1481
47f4a587
EG		 1482void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1483{
1484 struct iwl_ct_kill_config cmd;
672639de 1485 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1486 unsigned long flags;
1487 int ret = 0;
1488
1489 spin_lock_irqsave(&priv->lock, flags);
1490 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1491 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1492 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1493 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1494
480e8407 1495 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1496 adv_cmd.critical_temperature_enter =
1497 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1498 adv_cmd.critical_temperature_exit =
1499 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1500
1501 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1502 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1503 if (ret)
1504 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1505 else
1506 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1507 "succeeded, "
1508 "critical temperature enter is %d,"
1509 "exit is %d\n",
1510 priv->hw_params.ct_kill_threshold,
1511 priv->hw_params.ct_kill_exit_threshold);
480e8407 1512 } else {
672639de
WYG		 1513 cmd.critical_temperature_R =
1514 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1515
672639de
WYG		 1516 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1517 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1518 if (ret)
1519 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1520 else
1521 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1522 "succeeded, "
1523 "critical temperature is %d\n",
1524 priv->hw_params.ct_kill_threshold);
672639de 1525 }
47f4a587
EG		 1526}
1527EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1528
0ad91a35 1529
14a08a7f
EG		 1530/*
1531 * CARD_STATE_CMD
1532 *
1533 * Use: Sets the device's internal card state to enable, disable, or halt
1534 *
1535 * When in the 'enable' state the card operates as normal.
1536 * When in the 'disable' state, the card enters into a low power mode.
1537 * When in the 'halt' state, the card is shut down and must be fully
1538 * restarted to come back on.
1539 */
c496294e 1540int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1541{
1542 struct iwl_host_cmd cmd = {
1543 .id = REPLY_CARD_STATE_CMD,
1544 .len = sizeof(u32),
1545 .data = &flags,
c2acea8e 1546 .flags = meta_flag,
14a08a7f
EG		 1547 };
1548
1549 return iwl_send_cmd(priv, &cmd);
1550}
1551
030f05ed
AK		 1552void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1553 struct iwl_rx_mem_buffer *rxb)
1554{
1555#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1556 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1557 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1558 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1559 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1560#endif
1561}
1562EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1563
1564void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1565 struct iwl_rx_mem_buffer *rxb)
1566{
2f301227 1567 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1568 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1569 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1570 "notification for %s:\n", len,
1571 get_cmd_string(pkt->hdr.cmd));
1572 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1573}
1574EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1575
1576void iwl_rx_reply_error(struct iwl_priv *priv,
1577 struct iwl_rx_mem_buffer *rxb)
1578{
2f301227 1579 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1580
1581 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1582 "seq 0x%04X ser 0x%08X\n",
1583 le32_to_cpu(pkt->u.err_resp.error_type),
1584 get_cmd_string(pkt->u.err_resp.cmd_id),
1585 pkt->u.err_resp.cmd_id,
1586 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1587 le32_to_cpu(pkt->u.err_resp.error_info));
1588}
1589EXPORT_SYMBOL(iwl_rx_reply_error);
1590
a83b9141
WYG		 1591void iwl_clear_isr_stats(struct iwl_priv *priv)
1592{
1593 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1594}
a83b9141 1595
488829f1
AK		 1596int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1597 const struct ieee80211_tx_queue_params *params)
1598{
1599 struct iwl_priv *priv = hw->priv;
1600 unsigned long flags;
1601 int q;
1602
1603 IWL_DEBUG_MAC80211(priv, "enter\n");
1604
1605 if (!iwl_is_ready_rf(priv)) {
1606 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1607 return -EIO;
1608 }
1609
1610 if (queue >= AC_NUM) {
1611 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1612 return 0;
1613 }
1614
1615 q = AC_NUM - 1 - queue;
1616
1617 spin_lock_irqsave(&priv->lock, flags);
1618
1619 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1620 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1621 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1622 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1623 cpu_to_le16((params->txop * 32));
1624
1625 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1626
1627 spin_unlock_irqrestore(&priv->lock, flags);
1628
1629 IWL_DEBUG_MAC80211(priv, "leave\n");
1630 return 0;
1631}
1632EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1633
1634static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1635 struct ieee80211_vif *vif)
5bbe233b 1636{
fad95bf5 1637 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1638 struct ieee80211_sta *sta;
ca3c1f59 1639 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1640
91dd6c27 1641 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1642
fad95bf5 1643 if (!ht_conf->is_ht)
5bbe233b
AK		 1644 return;
1645
fad95bf5 1646 ht_conf->ht_protection =
9ed6bcce 1647 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1648 ht_conf->non_GF_STA_present =
9ed6bcce 1649 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1650
02bb1bea
JB		 1651 ht_conf->single_chain_sufficient = false;
1652
ca3c1f59 1653 switch (vif->type) {
02bb1bea
JB		 1654 case NL80211_IFTYPE_STATION:
1655 rcu_read_lock();
ca3c1f59 1656 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1657 if (sta) {
1658 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1659 int maxstreams;
1660
1661 maxstreams = (ht_cap->mcs.tx_params &
1662 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1663 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1664 maxstreams += 1;
1665
1666 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1667 (ht_cap->mcs.rx_mask[2] == 0))
1668 ht_conf->single_chain_sufficient = true;
1669 if (maxstreams <= 1)
1670 ht_conf->single_chain_sufficient = true;
1671 } else {
1672 /*
1673 * If at all, this can only happen through a race
1674 * when the AP disconnects us while we're still
1675 * setting up the connection, in that case mac80211
1676 * will soon tell us about that.
1677 */
1678 ht_conf->single_chain_sufficient = true;
1679 }
1680 rcu_read_unlock();
1681 break;
1682 case NL80211_IFTYPE_ADHOC:
1683 ht_conf->single_chain_sufficient = true;
1684 break;
1685 default:
1686 break;
1687 }
5bbe233b
AK		 1688
1689 IWL_DEBUG_MAC80211(priv, "leave\n");
1690}
1691
c91c3efc
AK		 1692static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1693{
c91c3efc
AK		 1694 iwl_led_disassociate(priv);
1695 /*
1696 * inform the ucode that there is no longer an
1697 * association and that no more packets should be
1698 * sent
1699 */
1700 priv->staging_rxon.filter_flags &=
1701 ~RXON_FILTER_ASSOC_MSK;
1702 priv->staging_rxon.assoc_id = 0;
1703 iwlcore_commit_rxon(priv);
1704}
1705
5bbe233b 1706void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1707 struct ieee80211_vif *vif,
1708 struct ieee80211_bss_conf *bss_conf,
1709 u32 changes)
5bbe233b
AK		 1710{
1711 struct iwl_priv *priv = hw->priv;
3a650292 1712 int ret;
5bbe233b
AK		 1713
1714 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1715
2d0ddec5
JB		 1716 if (!iwl_is_alive(priv))
1717 return;
1718
1719 mutex_lock(&priv->mutex);
1720
92445c95 1721 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1722 dev_kfree_skb(priv->ibss_beacon);
1723 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1724 }
1725
d7129e19 1726 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB		 1727 /* TODO: in AP mode, do something to make this take effect */
1728 }
1729
1730 if (changes & BSS_CHANGED_BSSID) {
1731 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1732
1733 /*
1734 * If there is currently a HW scan going on in the
1735 * background then we need to cancel it else the RXON
1736 * below/in post_associate will fail.
1737 */
2d0ddec5 1738 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1739 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1740 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1741 mutex_unlock(&priv->mutex);
1742 return;
1743 }
2d0ddec5 1744
d7129e19 1745 /* mac80211 only sets assoc when in STATION mode */
92445c95 1746 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB		 1747 memcpy(priv->staging_rxon.bssid_addr,
1748 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1749
d7129e19
JB		 1750 /* currently needed in a few places */
1751 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1752 } else {
1753 priv->staging_rxon.filter_flags &=
1754 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1755 }
d7129e19 1756
2d0ddec5
JB		 1757 }
1758
d7129e19
JB		 1759 /*
1760 * This needs to be after setting the BSSID in case
1761 * mac80211 decides to do both changes at once because
1762 * it will invoke post_associate.
1763 */
92445c95 1764 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1765 changes & BSS_CHANGED_BEACON) {
1766 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1767
1768 if (beacon)
1769 iwl_mac_beacon_update(hw, beacon);
1770 }
1771
5bbe233b
AK		 1772 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1773 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1774 bss_conf->use_short_preamble);
1775 if (bss_conf->use_short_preamble)
1776 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1777 else
1778 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1779 }
1780
1781 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1782 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1783 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1784 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1785 else
1786 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1787 }
1788
d7129e19
JB		 1789 if (changes & BSS_CHANGED_BASIC_RATES) {
1790 /* XXX use this information
1791 *
1792 * To do that, remove code from iwl_set_rate() and put something
1793 * like this here:
1794 *
1795 if (A-band)
1796 priv->staging_rxon.ofdm_basic_rates =
1797 bss_conf->basic_rates;
1798 else
1799 priv->staging_rxon.ofdm_basic_rates =
1800 bss_conf->basic_rates >> 4;
1801 priv->staging_rxon.cck_basic_rates =
1802 bss_conf->basic_rates & 0xF;
1803 */
1804 }
1805
5bbe233b 1806 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1807 iwl_ht_conf(priv, vif);
45823531
AK		 1808
1809 if (priv->cfg->ops->hcmd->set_rxon_chain)
1810 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1811 }
1812
1813 if (changes & BSS_CHANGED_ASSOC) {
1814 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1815 if (bss_conf->assoc) {
5bbe233b 1816 priv->timestamp = bss_conf->timestamp;
5bbe233b 1817
e932a609
JB		 1818 iwl_led_associate(priv);
1819
d7129e19 1820 if (!iwl_is_rfkill(priv))
1dda6d28 1821 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK		 1822 } else
1823 iwl_set_no_assoc(priv);
d7129e19
JB		 1824 }
1825
1dda6d28 1826 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB		 1827 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1828 changes);
1829 ret = iwl_send_rxon_assoc(priv);
1830 if (!ret) {
1831 /* Sync active_rxon with latest change. */
1832 memcpy((void *)&priv->active_rxon,
1833 &priv->staging_rxon,
1834 sizeof(struct iwl_rxon_cmd));
5bbe233b 1835 }
5bbe233b 1836 }
d7129e19 1837
c91c3efc
AK		 1838 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1839 if (vif->bss_conf.enable_beacon) {
1840 memcpy(priv->staging_rxon.bssid_addr,
1841 bss_conf->bssid, ETH_ALEN);
1842 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1843 iwlcore_config_ap(priv, vif);
c91c3efc
AK		 1844 } else
1845 iwl_set_no_assoc(priv);
f513dfff
DH		 1846 }
1847
1fa61b2e
JB		 1848 if (changes & BSS_CHANGED_IBSS) {
1849 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1850 bss_conf->ibss_joined);
1851 if (ret)
1852 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1853 bss_conf->ibss_joined ? "add" : "remove",
1854 bss_conf->bssid);
1855 }
1856
d7129e19
JB		 1857 mutex_unlock(&priv->mutex);
1858
2d0ddec5 1859 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1860}
1861EXPORT_SYMBOL(iwl_bss_info_changed);
1862
9944b938
AK		 1863int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1864{
1865 struct iwl_priv *priv = hw->priv;
1866 unsigned long flags;
1867 __le64 timestamp;
1868
1869 IWL_DEBUG_MAC80211(priv, "enter\n");
1870
1871 if (!iwl_is_ready_rf(priv)) {
1872 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1873 return -EIO;
1874 }
1875
9944b938
AK		 1876 spin_lock_irqsave(&priv->lock, flags);
1877
1878 if (priv->ibss_beacon)
1879 dev_kfree_skb(priv->ibss_beacon);
1880
1881 priv->ibss_beacon = skb;
1882
9944b938
AK		 1883 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1884 priv->timestamp = le64_to_cpu(timestamp);
1885
1886 IWL_DEBUG_MAC80211(priv, "leave\n");
1887 spin_unlock_irqrestore(&priv->lock, flags);
1888
1dda6d28 1889 priv->cfg->ops->lib->post_associate(priv, priv->vif);
9944b938 1890
9944b938
AK		 1891 return 0;
1892}
1893EXPORT_SYMBOL(iwl_mac_beacon_update);
1894
b55e75ed 1895static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1896{
1dda6d28 1897 iwl_connection_init_rx_config(priv, vif);
727882d6
AK		 1898
1899 if (priv->cfg->ops->hcmd->set_rxon_chain)
1900 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1901
b55e75ed 1902 return iwlcore_commit_rxon(priv);
727882d6 1903}
727882d6 1904
b55e75ed 1905int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1906{
1907 struct iwl_priv *priv = hw->priv;
47e28f41 1908 int err = 0;
cbb6ab94 1909
3779db10
JB		 1910 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1911 vif->type, vif->addr);
cbb6ab94 1912
47e28f41
JB		 1913 mutex_lock(&priv->mutex);
1914
b55e75ed
JB		 1915 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1916 err = -EINVAL;
1917 goto out;
1918 }
1919
cbb6ab94
AK		 1920 if (priv->vif) {
1921 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 1922 err = -EOPNOTSUPP;
1923 goto out;
cbb6ab94
AK		 1924 }
1925
1ed32e4f
JB		 1926 priv->vif = vif;
1927 priv->iw_mode = vif->type;
cbb6ab94 1928
b55e75ed
JB		 1929 err = iwl_set_mode(priv, vif);
1930 if (err)
1931 goto out_err;
7e246191 1932
b55e75ed 1933 goto out;
cbb6ab94 1934
b55e75ed
JB		 1935 out_err:
1936 priv->vif = NULL;
1937 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1938 out:
cbb6ab94
AK		 1939 mutex_unlock(&priv->mutex);
1940
1941 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1942 return err;
cbb6ab94
AK		 1943}
1944EXPORT_SYMBOL(iwl_mac_add_interface);
1945
d8052319 1946void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 1947 struct ieee80211_vif *vif)
d8052319
AK		 1948{
1949 struct iwl_priv *priv = hw->priv;
1950
1951 IWL_DEBUG_MAC80211(priv, "enter\n");
1952
1953 mutex_lock(&priv->mutex);
1954
1955 if (iwl_is_ready_rf(priv)) {
1956 iwl_scan_cancel_timeout(priv, 100);
1957 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1958 iwlcore_commit_rxon(priv);
1959 }
1ed32e4f 1960 if (priv->vif == vif) {
d8052319
AK		 1961 priv->vif = NULL;
1962 memset(priv->bssid, 0, ETH_ALEN);
1963 }
1964 mutex_unlock(&priv->mutex);
1965
1966 IWL_DEBUG_MAC80211(priv, "leave\n");
1967
1968}
1969EXPORT_SYMBOL(iwl_mac_remove_interface);
1970
4808368d
AK		 1971/**
1972 * iwl_mac_config - mac80211 config callback
4808368d
AK		 1973 */
1974int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
1975{
1976 struct iwl_priv *priv = hw->priv;
1977 const struct iwl_channel_info *ch_info;
1978 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 1979 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 1980 unsigned long flags = 0;
1981 int ret = 0;
1982 u16 ch;
1983 int scan_active = 0;
1984
1985 mutex_lock(&priv->mutex);
1986
4808368d
AK		 1987 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
1988 conf->channel->hw_value, changed);
1989
1990 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
1991 test_bit(STATUS_SCANNING, &priv->status))) {
1992 scan_active = 1;
1993 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
1994 }
1995
ba37a3d0
JB		 1996 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
1997 IEEE80211_CONF_CHANGE_CHANNEL)) {
1998 /* mac80211 uses static for non-HT which is what we want */
1999 priv->current_ht_config.smps = conf->smps_mode;
2000
2001 /*
2002 * Recalculate chain counts.
2003 *
2004 * If monitor mode is enabled then mac80211 will
2005 * set up the SM PS mode to OFF if an HT channel is
2006 * configured.
2007 */
2008 if (priv->cfg->ops->hcmd->set_rxon_chain)
2009 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2010 }
4808368d
AK		 2011
2012 /* during scanning mac80211 will delay channel setting until
2013 * scan finish with changed = 0
2014 */
2015 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2016 if (scan_active)
2017 goto set_ch_out;
2018
2019 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2020 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2021 if (!is_channel_valid(ch_info)) {
2022 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2023 ret = -EINVAL;
2024 goto set_ch_out;
2025 }
2026
4808368d
AK		 2027 spin_lock_irqsave(&priv->lock, flags);
2028
28bd723b
DH		 2029 /* Configure HT40 channels */
2030 ht_conf->is_ht = conf_is_ht(conf);
2031 if (ht_conf->is_ht) {
2032 if (conf_is_ht40_minus(conf)) {
2033 ht_conf->extension_chan_offset =
2034 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2035 ht_conf->is_40mhz = true;
28bd723b
DH		 2036 } else if (conf_is_ht40_plus(conf)) {
2037 ht_conf->extension_chan_offset =
2038 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2039 ht_conf->is_40mhz = true;
28bd723b
DH		 2040 } else {
2041 ht_conf->extension_chan_offset =
2042 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2043 ht_conf->is_40mhz = false;
28bd723b
DH		 2044 }
2045 } else
c812ee24 2046 ht_conf->is_40mhz = false;
28bd723b
DH		 2047 /* Default to no protection. Protection mode will later be set
2048 * from BSS config in iwl_ht_conf */
2049 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2050
2051 /* if we are switching from ht to 2.4 clear flags
2052 * from any ht related info since 2.4 does not
2053 * support ht */
2054 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2055 priv->staging_rxon.flags = 0;
2056
2057 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2058 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2059
1dda6d28 2060 iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
4808368d 2061 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2062
4808368d
AK		 2063 set_ch_out:
2064 /* The list of supported rates and rate mask can be different
2065 * for each band; since the band may have changed, reset
2066 * the rate mask to what mac80211 lists */
2067 iwl_set_rate(priv);
2068 }
2069
78f5fb7f
JB		 2070 if (changed & (IEEE80211_CONF_CHANGE_PS |
2071 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2072 ret = iwl_power_update_mode(priv, false);
4808368d 2073 if (ret)
e312c24c 2074 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2075 }
2076
2077 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2078 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2079 priv->tx_power_user_lmt, conf->power_level);
2080
2081 iwl_set_tx_power(priv, conf->power_level, false);
2082 }
2083
e61146e3
SG		 2084 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2085 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2086
2087 spin_lock_irqsave(&priv->lock, flags);
2088 priv->qos_data.qos_active = qos_active;
2089 iwl_update_qos(priv);
2090 spin_unlock_irqrestore(&priv->lock, flags);
2091 }
2092
0cf4c01e
MA		 2093 if (!iwl_is_ready(priv)) {
2094 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2095 goto out;
2096 }
2097
4808368d
AK		 2098 if (scan_active)
2099 goto out;
2100
2101 if (memcmp(&priv->active_rxon,
2102 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2103 iwlcore_commit_rxon(priv);
2104 else
2105 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2106
2107
2108out:
2109 IWL_DEBUG_MAC80211(priv, "leave\n");
2110 mutex_unlock(&priv->mutex);
2111 return ret;
2112}
2113EXPORT_SYMBOL(iwl_mac_config);
2114
bd564261
AK		 2115void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2116{
2117 struct iwl_priv *priv = hw->priv;
2118 unsigned long flags;
2119
2120 mutex_lock(&priv->mutex);
2121 IWL_DEBUG_MAC80211(priv, "enter\n");
2122
2123 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2124 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2125 spin_unlock_irqrestore(&priv->lock, flags);
2126
bd564261 2127 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2128
2129 /* new association get rid of ibss beacon skb */
2130 if (priv->ibss_beacon)
2131 dev_kfree_skb(priv->ibss_beacon);
2132
2133 priv->ibss_beacon = NULL;
2134
bd564261 2135 priv->timestamp = 0;
bd564261
AK		 2136
2137 spin_unlock_irqrestore(&priv->lock, flags);
2138
2139 if (!iwl_is_ready_rf(priv)) {
2140 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2141 mutex_unlock(&priv->mutex);
2142 return;
2143 }
2144
2145 /* we are restarting association process
2146 * clear RXON_FILTER_ASSOC_MSK bit
2147 */
b4665df4
JB		 2148 iwl_scan_cancel_timeout(priv, 100);
2149 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2150 iwlcore_commit_rxon(priv);
bd564261
AK		 2151
2152 iwl_set_rate(priv);
2153
2154 mutex_unlock(&priv->mutex);
2155
2156 IWL_DEBUG_MAC80211(priv, "leave\n");
2157}
2158EXPORT_SYMBOL(iwl_mac_reset_tsf);
2159
88804e2b
WYG		 2160int iwl_alloc_txq_mem(struct iwl_priv *priv)
2161{
2162 if (!priv->txq)
2163 priv->txq = kzalloc(
2164 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2165 GFP_KERNEL);
2166 if (!priv->txq) {
91dd6c27 2167 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2168 return -ENOMEM;
2169 }
2170 return 0;
2171}
2172EXPORT_SYMBOL(iwl_alloc_txq_mem);
2173
2174void iwl_free_txq_mem(struct iwl_priv *priv)
2175{
2176 kfree(priv->txq);
2177 priv->txq = NULL;
2178}
2179EXPORT_SYMBOL(iwl_free_txq_mem);
2180
20594eb0
WYG		 2181#ifdef CONFIG_IWLWIFI_DEBUGFS
2182
2183#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2184
2185void iwl_reset_traffic_log(struct iwl_priv *priv)
2186{
2187 priv->tx_traffic_idx = 0;
2188 priv->rx_traffic_idx = 0;
2189 if (priv->tx_traffic)
2190 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2191 if (priv->rx_traffic)
2192 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2193}
2194
2195int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2196{
2197 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2198
2199 if (iwl_debug_level & IWL_DL_TX) {
2200 if (!priv->tx_traffic) {
2201 priv->tx_traffic =
2202 kzalloc(traffic_size, GFP_KERNEL);
2203 if (!priv->tx_traffic)
2204 return -ENOMEM;
2205 }
2206 }
2207 if (iwl_debug_level & IWL_DL_RX) {
2208 if (!priv->rx_traffic) {
2209 priv->rx_traffic =
2210 kzalloc(traffic_size, GFP_KERNEL);
2211 if (!priv->rx_traffic)
2212 return -ENOMEM;
2213 }
2214 }
2215 iwl_reset_traffic_log(priv);
2216 return 0;
2217}
2218EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2219
2220void iwl_free_traffic_mem(struct iwl_priv *priv)
2221{
2222 kfree(priv->tx_traffic);
2223 priv->tx_traffic = NULL;
2224
2225 kfree(priv->rx_traffic);
2226 priv->rx_traffic = NULL;
2227}
2228EXPORT_SYMBOL(iwl_free_traffic_mem);
2229
2230void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2231 u16 length, struct ieee80211_hdr *header)
2232{
2233 __le16 fc;
2234 u16 len;
2235
2236 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2237 return;
2238
2239 if (!priv->tx_traffic)
2240 return;
2241
2242 fc = header->frame_control;
2243 if (ieee80211_is_data(fc)) {
2244 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2245 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2246 memcpy((priv->tx_traffic +
2247 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2248 header, len);
2249 priv->tx_traffic_idx =
2250 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2251 }
2252}
2253EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2254
2255void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2256 u16 length, struct ieee80211_hdr *header)
2257{
2258 __le16 fc;
2259 u16 len;
2260
2261 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2262 return;
2263
2264 if (!priv->rx_traffic)
2265 return;
2266
2267 fc = header->frame_control;
2268 if (ieee80211_is_data(fc)) {
2269 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2270 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2271 memcpy((priv->rx_traffic +
2272 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2273 header, len);
2274 priv->rx_traffic_idx =
2275 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2276 }
2277}
2278EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2279
2280const char *get_mgmt_string(int cmd)
2281{
2282 switch (cmd) {
2283 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2284 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2285 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2286 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2287 IWL_CMD(MANAGEMENT_PROBE_REQ);
2288 IWL_CMD(MANAGEMENT_PROBE_RESP);
2289 IWL_CMD(MANAGEMENT_BEACON);
2290 IWL_CMD(MANAGEMENT_ATIM);
2291 IWL_CMD(MANAGEMENT_DISASSOC);
2292 IWL_CMD(MANAGEMENT_AUTH);
2293 IWL_CMD(MANAGEMENT_DEAUTH);
2294 IWL_CMD(MANAGEMENT_ACTION);
2295 default:
2296 return "UNKNOWN";
2297
2298 }
2299}
2300
2301const char *get_ctrl_string(int cmd)
2302{
2303 switch (cmd) {
2304 IWL_CMD(CONTROL_BACK_REQ);
2305 IWL_CMD(CONTROL_BACK);
2306 IWL_CMD(CONTROL_PSPOLL);
2307 IWL_CMD(CONTROL_RTS);
2308 IWL_CMD(CONTROL_CTS);
2309 IWL_CMD(CONTROL_ACK);
2310 IWL_CMD(CONTROL_CFEND);
2311 IWL_CMD(CONTROL_CFENDACK);
2312 default:
2313 return "UNKNOWN";
2314
2315 }
2316}
2317
7163b8a4 2318void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2319{
2320 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2321 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2322 priv->led_tpt = 0;
22fdf3c9
WYG		 2323}
2324
2325/*
2326 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2327 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2328 * Use debugFs to display the rx/rx_statistics
2329 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2330 * information will be recorded, but DATA pkt still will be recorded
2331 * for the reason of iwl_led.c need to control the led blinking based on
2332 * number of tx and rx data.
2333 *
2334 */
2335void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2336{
2337 struct traffic_stats *stats;
2338
2339 if (is_tx)
2340 stats = &priv->tx_stats;
2341 else
2342 stats = &priv->rx_stats;
2343
2344 if (ieee80211_is_mgmt(fc)) {
2345 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2346 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2347 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2348 break;
2349 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2350 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2351 break;
2352 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2353 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2354 break;
2355 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2356 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2357 break;
2358 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2359 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2360 break;
2361 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2362 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2363 break;
2364 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2365 stats->mgmt[MANAGEMENT_BEACON]++;
2366 break;
2367 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2368 stats->mgmt[MANAGEMENT_ATIM]++;
2369 break;
2370 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2371 stats->mgmt[MANAGEMENT_DISASSOC]++;
2372 break;
2373 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2374 stats->mgmt[MANAGEMENT_AUTH]++;
2375 break;
2376 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2377 stats->mgmt[MANAGEMENT_DEAUTH]++;
2378 break;
2379 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2380 stats->mgmt[MANAGEMENT_ACTION]++;
2381 break;
2382 }
2383 } else if (ieee80211_is_ctl(fc)) {
2384 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2385 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2386 stats->ctrl[CONTROL_BACK_REQ]++;
2387 break;
2388 case cpu_to_le16(IEEE80211_STYPE_BACK):
2389 stats->ctrl[CONTROL_BACK]++;
2390 break;
2391 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2392 stats->ctrl[CONTROL_PSPOLL]++;
2393 break;
2394 case cpu_to_le16(IEEE80211_STYPE_RTS):
2395 stats->ctrl[CONTROL_RTS]++;
2396 break;
2397 case cpu_to_le16(IEEE80211_STYPE_CTS):
2398 stats->ctrl[CONTROL_CTS]++;
2399 break;
2400 case cpu_to_le16(IEEE80211_STYPE_ACK):
2401 stats->ctrl[CONTROL_ACK]++;
2402 break;
2403 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2404 stats->ctrl[CONTROL_CFEND]++;
2405 break;
2406 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2407 stats->ctrl[CONTROL_CFENDACK]++;
2408 break;
2409 }
2410 } else {
2411 /* data */
2412 stats->data_cnt++;
2413 stats->data_bytes += len;
2414 }
d5f4cf71 2415 iwl_leds_background(priv);
22fdf3c9
WYG		 2416}
2417EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2418#endif
2419
a0ea9493 2420static const char *get_csr_string(int cmd)
696bdee3
WYG		 2421{
2422 switch (cmd) {
2423 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2424 IWL_CMD(CSR_INT_COALESCING);
2425 IWL_CMD(CSR_INT);
2426 IWL_CMD(CSR_INT_MASK);
2427 IWL_CMD(CSR_FH_INT_STATUS);
2428 IWL_CMD(CSR_GPIO_IN);
2429 IWL_CMD(CSR_RESET);
2430 IWL_CMD(CSR_GP_CNTRL);
2431 IWL_CMD(CSR_HW_REV);
2432 IWL_CMD(CSR_EEPROM_REG);
2433 IWL_CMD(CSR_EEPROM_GP);
2434 IWL_CMD(CSR_OTP_GP_REG);
2435 IWL_CMD(CSR_GIO_REG);
2436 IWL_CMD(CSR_GP_UCODE_REG);
2437 IWL_CMD(CSR_GP_DRIVER_REG);
2438 IWL_CMD(CSR_UCODE_DRV_GP1);
2439 IWL_CMD(CSR_UCODE_DRV_GP2);
2440 IWL_CMD(CSR_LED_REG);
2441 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2442 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2443 IWL_CMD(CSR_ANA_PLL_CFG);
2444 IWL_CMD(CSR_HW_REV_WA_REG);
2445 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2446 default:
2447 return "UNKNOWN";
2448
2449 }
2450}
2451
2452void iwl_dump_csr(struct iwl_priv *priv)
2453{
2454 int i;
2455 u32 csr_tbl[] = {
2456 CSR_HW_IF_CONFIG_REG,
2457 CSR_INT_COALESCING,
2458 CSR_INT,
2459 CSR_INT_MASK,
2460 CSR_FH_INT_STATUS,
2461 CSR_GPIO_IN,
2462 CSR_RESET,
2463 CSR_GP_CNTRL,
2464 CSR_HW_REV,
2465 CSR_EEPROM_REG,
2466 CSR_EEPROM_GP,
2467 CSR_OTP_GP_REG,
2468 CSR_GIO_REG,
2469 CSR_GP_UCODE_REG,
2470 CSR_GP_DRIVER_REG,
2471 CSR_UCODE_DRV_GP1,
2472 CSR_UCODE_DRV_GP2,
2473 CSR_LED_REG,
2474 CSR_DRAM_INT_TBL_REG,
2475 CSR_GIO_CHICKEN_BITS,
2476 CSR_ANA_PLL_CFG,
2477 CSR_HW_REV_WA_REG,
2478 CSR_DBG_HPET_MEM_REG
2479 };
2480 IWL_ERR(priv, "CSR values:\n");
2481 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2482 "CSR_INT_PERIODIC_REG)\n");
2483 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2484 IWL_ERR(priv, " %25s: 0X%08x\n",
2485 get_csr_string(csr_tbl[i]),
2486 iwl_read32(priv, csr_tbl[i]));
2487 }
2488}
2489EXPORT_SYMBOL(iwl_dump_csr);
2490
a0ea9493 2491static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2492{
2493 switch (cmd) {
2494 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2495 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2496 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2497 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2498 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2499 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2500 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2501 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2502 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2503 default:
2504 return "UNKNOWN";
2505
2506 }
2507}
2508
2509int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2510{
2511 int i;
2512#ifdef CONFIG_IWLWIFI_DEBUG
2513 int pos = 0;
2514 size_t bufsz = 0;
2515#endif
2516 u32 fh_tbl[] = {
2517 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2518 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2519 FH_RSCSR_CHNL0_WPTR,
2520 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2521 FH_MEM_RSSR_SHARED_CTRL_REG,
2522 FH_MEM_RSSR_RX_STATUS_REG,
2523 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2524 FH_TSSR_TX_STATUS_REG,
2525 FH_TSSR_TX_ERROR_REG
2526 };
2527#ifdef CONFIG_IWLWIFI_DEBUG
2528 if (display) {
2529 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2530 *buf = kmalloc(bufsz, GFP_KERNEL);
2531 if (!*buf)
2532 return -ENOMEM;
2533 pos += scnprintf(*buf + pos, bufsz - pos,
2534 "FH register values:\n");
2535 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2536 pos += scnprintf(*buf + pos, bufsz - pos,
2537 " %34s: 0X%08x\n",
2538 get_fh_string(fh_tbl[i]),
2539 iwl_read_direct32(priv, fh_tbl[i]));
2540 }
2541 return pos;
2542 }
2543#endif
2544 IWL_ERR(priv, "FH register values:\n");
2545 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2546 IWL_ERR(priv, " %34s: 0X%08x\n",
2547 get_fh_string(fh_tbl[i]),
2548 iwl_read_direct32(priv, fh_tbl[i]));
2549 }
2550 return 0;
2551}
2552EXPORT_SYMBOL(iwl_dump_fh);
2553
a93e7973 2554static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2555{
2556 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2557 return;
2558
2559 if (!iwl_is_associated(priv)) {
2560 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2561 return;
2562 }
2563 /*
2564 * There is no easy and better way to force reset the radio,
2565 * the only known method is switching channel which will force to
2566 * reset and tune the radio.
2567 * Use internal short scan (single channel) operation to should
2568 * achieve this objective.
2569 * Driver should reset the radio when number of consecutive missed
2570 * beacon, or any other uCode error condition detected.
2571 */
2572 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2573 iwl_internal_short_hw_scan(priv);
afbdd69a 2574}
a93e7973 2575
a93e7973
WYG		 2576
2577int iwl_force_reset(struct iwl_priv *priv, int mode)
2578{
8a472da4
WYG		 2579 struct iwl_force_reset *force_reset;
2580
a93e7973
WYG		 2581 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2582 return -EINVAL;
2583
8a472da4
WYG		 2584 if (mode >= IWL_MAX_FORCE_RESET) {
2585 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2586 return -EINVAL;
2587 }
2588 force_reset = &priv->force_reset[mode];
2589 force_reset->reset_request_count++;
2590 if (force_reset->last_force_reset_jiffies &&
2591 time_after(force_reset->last_force_reset_jiffies +
2592 force_reset->reset_duration, jiffies)) {
a93e7973 2593 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 2594 force_reset->reset_reject_count++;
a93e7973
WYG		 2595 return -EAGAIN;
2596 }
8a472da4
WYG		 2597 force_reset->reset_success_count++;
2598 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2599 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2600 switch (mode) {
2601 case IWL_RF_RESET:
2602 iwl_force_rf_reset(priv);
2603 break;
2604 case IWL_FW_RESET:
2605 IWL_ERR(priv, "On demand firmware reload\n");
2606 /* Set the FW error flag -- cleared on iwl_down */
2607 set_bit(STATUS_FW_ERROR, &priv->status);
2608 wake_up_interruptible(&priv->wait_command_queue);
2609 /*
2610 * Keep the restart process from trying to send host
2611 * commands by clearing the INIT status bit
2612 */
2613 clear_bit(STATUS_READY, &priv->status);
2614 queue_work(priv->workqueue, &priv->restart);
2615 break;
a93e7973 2616 }
a93e7973
WYG		 2617 return 0;
2618}
b74e31a9
WYG		 2619EXPORT_SYMBOL(iwl_force_reset);
2620
2621/**
2622 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2623 *
2624 * During normal condition (no queue is stuck), the timer is continually set to
2625 * execute every monitor_recover_period milliseconds after the last timer
2626 * expired. When the queue read_ptr is at the same place, the timer is
2627 * shorten to 100mSecs. This is
2628 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2629 * 2) to detect the stuck queues quicker before the station and AP can
2630 * disassociate each other.
2631 *
2632 * This function monitors all the tx queues and recover from it if any
2633 * of the queues are stuck.
2634 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2635 * it will recover by resetting the firmware and return.
2636 * 2. Then, it checks for station association. If it associates it will check
2637 * other queues. If any queue is stuck, it will recover by resetting
2638 * the firmware.
2639 * Note: It the number of times the queue read_ptr to be at the same place to
2640 * be MAX_REPEAT+1 in order to consider to be stuck.
2641 */
2642/*
2643 * The maximum number of times the read pointer of the tx queue at the
2644 * same place without considering to be stuck.
2645 */
2646#define MAX_REPEAT (2)
2647static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2648{
2649 struct iwl_tx_queue *txq;
2650 struct iwl_queue *q;
2651
2652 txq = &priv->txq[cnt];
2653 q = &txq->q;
2654 /* queue is empty, skip */
2655 if (q->read_ptr != q->write_ptr) {
2656 if (q->read_ptr == q->last_read_ptr) {
2657 /* a queue has not been read from last time */
2658 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2659 IWL_ERR(priv,
2660 "queue %d stuck %d time. Fw reload.\n",
2661 q->id, q->repeat_same_read_ptr);
2662 q->repeat_same_read_ptr = 0;
2663 iwl_force_reset(priv, IWL_FW_RESET);
2664 } else {
2665 q->repeat_same_read_ptr++;
2666 IWL_DEBUG_RADIO(priv,
2667 "queue %d, not read %d time\n",
2668 q->id,
2669 q->repeat_same_read_ptr);
2670 mod_timer(&priv->monitor_recover, jiffies +
2671 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2672 }
2673 return 1;
2674 } else {
2675 q->last_read_ptr = q->read_ptr;
2676 q->repeat_same_read_ptr = 0;
2677 }
2678 }
2679 return 0;
2680}
2681
2682void iwl_bg_monitor_recover(unsigned long data)
2683{
2684 struct iwl_priv *priv = (struct iwl_priv *)data;
2685 int cnt;
2686
2687 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2688 return;
2689
2690 /* monitor and check for stuck cmd queue */
2691 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2692 return;
2693
2694 /* monitor and check for other stuck queues */
2695 if (iwl_is_associated(priv)) {
2696 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2697 /* skip as we already checked the command queue */
2698 if (cnt == IWL_CMD_QUEUE_NUM)
2699 continue;
2700 if (iwl_check_stuck_queue(priv, cnt))
2701 return;
2702 }
2703 }
2704 /*
2705 * Reschedule the timer to occur in
2706 * priv->cfg->monitor_recover_period
2707 */
2708 mod_timer(&priv->monitor_recover,
2709 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2710}
2711EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2712
a0ee74cf
WYG		 2713
2714/*
2715 * extended beacon time format
2716 * time in usec will be changed into a 32-bit value in extended:internal format
2717 * the extended part is the beacon counts
2718 * the internal part is the time in usec within one beacon interval
2719 */
2720u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2721{
2722 u32 quot;
2723 u32 rem;
2724 u32 interval = beacon_interval * TIME_UNIT;
2725
2726 if (!interval || !usec)
2727 return 0;
2728
2729 quot = (usec / interval) &
2730 (iwl_beacon_time_mask_high(priv,
2731 priv->hw_params.beacon_time_tsf_bits) >>
2732 priv->hw_params.beacon_time_tsf_bits);
2733 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2734 priv->hw_params.beacon_time_tsf_bits);
2735
2736 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2737}
2738EXPORT_SYMBOL(iwl_usecs_to_beacons);
2739
2740/* base is usually what we get from ucode with each received frame,
2741 * the same as HW timer counter counting down
2742 */
2743__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2744 u32 addon, u32 beacon_interval)
2745{
2746 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2747 priv->hw_params.beacon_time_tsf_bits);
2748 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2749 priv->hw_params.beacon_time_tsf_bits);
2750 u32 interval = beacon_interval * TIME_UNIT;
2751 u32 res = (base & iwl_beacon_time_mask_high(priv,
2752 priv->hw_params.beacon_time_tsf_bits)) +
2753 (addon & iwl_beacon_time_mask_high(priv,
2754 priv->hw_params.beacon_time_tsf_bits));
2755
2756 if (base_low > addon_low)
2757 res += base_low - addon_low;
2758 else if (base_low < addon_low) {
2759 res += interval + base_low - addon_low;
2760 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2761 } else
2762 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2763
2764 return cpu_to_le32(res);
2765}
2766EXPORT_SYMBOL(iwl_add_beacon_time);
2767
6da3a13e
WYG		 2768#ifdef CONFIG_PM
2769
2770int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2771{
2772 struct iwl_priv *priv = pci_get_drvdata(pdev);
2773
2774 /*
2775 * This function is called when system goes into suspend state
2776 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2777 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2778 * it will not call apm_ops.stop() to stop the DMA operation.
2779 * Calling apm_ops.stop here to make sure we stop the DMA.
2780 */
2781 priv->cfg->ops->lib->apm_ops.stop(priv);
2782
2783 pci_save_state(pdev);
2784 pci_disable_device(pdev);
2785 pci_set_power_state(pdev, PCI_D3hot);
2786
2787 return 0;
2788}
2789EXPORT_SYMBOL(iwl_pci_suspend);
2790
2791int iwl_pci_resume(struct pci_dev *pdev)
2792{
2793 struct iwl_priv *priv = pci_get_drvdata(pdev);
2794 int ret;
2795
cd398c31
AK		 2796 /*
2797 * We disable the RETRY_TIMEOUT register (0x41) to keep
2798 * PCI Tx retries from interfering with C3 CPU state.
2799 */
2800 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2801
6da3a13e
WYG		 2802 pci_set_power_state(pdev, PCI_D0);
2803 ret = pci_enable_device(pdev);
2804 if (ret)
2805 return ret;
2806 pci_restore_state(pdev);
2807 iwl_enable_interrupts(priv);
2808
2809 return 0;
2810}
2811EXPORT_SYMBOL(iwl_pci_resume);
2812
2813#endif /* CONFIG_PM */
Linux kernel - Deliverables
This page took 0.630877 seconds and 5 git commands to generate.