iwlagn: keep BT settings across restart
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW
2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW
46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG
51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
670245ed
JB
67bool bt_coex_active = true;
68EXPORT_SYMBOL_GPL(bt_coex_active);
06702a73 69module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 70MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 71
c7de35cd
RR
72#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
73 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
74 IWL_RATE_SISO_##s##M_PLCP, \
75 IWL_RATE_MIMO2_##s##M_PLCP,\
76 IWL_RATE_MIMO3_##s##M_PLCP,\
77 IWL_RATE_##r##M_IEEE, \
78 IWL_RATE_##ip##M_INDEX, \
79 IWL_RATE_##in##M_INDEX, \
80 IWL_RATE_##rp##M_INDEX, \
81 IWL_RATE_##rn##M_INDEX, \
82 IWL_RATE_##pp##M_INDEX, \
83 IWL_RATE_##np##M_INDEX }
84
a562a9dd
RC
85u32 iwl_debug_level;
86EXPORT_SYMBOL(iwl_debug_level);
87
c7de35cd
RR
88/*
89 * Parameter order:
90 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
91 *
92 * If there isn't a valid next or previous rate then INV is used which
93 * maps to IWL_RATE_INVALID
94 *
95 */
1826dcc0 96const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR
97 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
98 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
99 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
100 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
101 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
102 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
103 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
104 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
105 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
106 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
107 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
108 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
109 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
110 /* FIXME:RS: ^^ should be INV (legacy) */
111};
1826dcc0 112EXPORT_SYMBOL(iwl_rates);
c7de35cd 113
e7d326ac
TW
114int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
115{
116 int idx = 0;
117
118 /* HT rate format */
119 if (rate_n_flags & RATE_MCS_HT_MSK) {
120 idx = (rate_n_flags & 0xff);
121
60d32215
DH
122 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
123 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
124 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW
125 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
126
127 idx += IWL_FIRST_OFDM_RATE;
128 /* skip 9M not supported in ht*/
129 if (idx >= IWL_RATE_9M_INDEX)
130 idx += 1;
131 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
132 return idx;
133
134 /* legacy rate format, search for match in table */
135 } else {
136 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
137 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
138 return idx;
139 }
140
141 return -1;
142}
143EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
144
0e1654fa 145u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW
146{
147 int i;
148 u8 ind = ant;
0e1654fa 149
76eff18b
TW
150 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
151 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 152 if (valid & BIT(ind))
76eff18b
TW
153 return ind;
154 }
155 return ant;
156}
47ff65c4 157EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW
158
159const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
160EXPORT_SYMBOL(iwl_bcast_addr);
161
162
1d0a082d
AK
163/* This function both allocates and initializes hw and priv. */
164struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
165 struct ieee80211_ops *hw_ops)
166{
167 struct iwl_priv *priv;
168
169 /* mac80211 allocates memory for this device instance, including
170 * space for this driver's private structure */
171 struct ieee80211_hw *hw =
172 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
173 if (hw == NULL) {
c96c31e4 174 pr_err("%s: Can not allocate network device\n",
a3139c59 175 cfg->name);
1d0a082d
AK
176 goto out;
177 }
178
179 priv = hw->priv;
180 priv->hw = hw;
181
182out:
183 return hw;
184}
185EXPORT_SYMBOL(iwl_alloc_all);
186
14d2aac5
AK
187/*
188 * QoS support
189*/
e61146e3 190static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK
191{
192 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
193 return;
194
195 priv->qos_data.def_qos_parm.qos_flags = 0;
196
14d2aac5
AK
197 if (priv->qos_data.qos_active)
198 priv->qos_data.def_qos_parm.qos_flags |=
199 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
200
201 if (priv->current_ht_config.is_ht)
202 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
203
e61146e3
SG
204 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
205 priv->qos_data.qos_active,
206 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 207
e61146e3
SG
208 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
209 sizeof(struct iwl_qosparam_cmd),
210 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 211}
c7de35cd 212
d9fe60de
JB
213#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
214#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 215static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 216 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR
217 enum ieee80211_band band)
218{
39130df3
RR
219 u16 max_bit_rate = 0;
220 u8 rx_chains_num = priv->hw_params.rx_chains_num;
221 u8 tx_chains_num = priv->hw_params.tx_chains_num;
222
c7de35cd 223 ht_info->cap = 0;
d9fe60de 224 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 225
d9fe60de 226 ht_info->ht_supported = true;
c7de35cd 227
b261793d
DH
228 if (priv->cfg->ht_greenfield_support)
229 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 230 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 231 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 232 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB
233 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
234 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
235 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 236 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 237 }
c7de35cd
RR
238
239 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 240 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR
241
242 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
172c1d11
WYG
243 if (priv->cfg->ampdu_factor)
244 ht_info->ampdu_factor = priv->cfg->ampdu_factor;
c7de35cd 245 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
172c1d11
WYG
246 if (priv->cfg->ampdu_density)
247 ht_info->ampdu_density = priv->cfg->ampdu_density;
c7de35cd 248
d9fe60de 249 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 250 if (rx_chains_num >= 2)
d9fe60de 251 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 252 if (rx_chains_num >= 3)
d9fe60de 253 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR
254
255 /* Highest supported Rx data rate */
256 max_bit_rate *= rx_chains_num;
d9fe60de
JB
257 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
258 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR
259
260 /* Tx MCS capabilities */
d9fe60de 261 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 262 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB
263 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
264 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
265 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 266 }
c7de35cd 267}
c7de35cd 268
c7de35cd
RR
269/**
270 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
271 */
534166de 272int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR
273{
274 struct iwl_channel_info *ch;
275 struct ieee80211_supported_band *sband;
276 struct ieee80211_channel *channels;
277 struct ieee80211_channel *geo_ch;
278 struct ieee80211_rate *rates;
279 int i = 0;
280
281 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
282 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 283 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR
284 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
285 return 0;
286 }
287
288 channels = kzalloc(sizeof(struct ieee80211_channel) *
289 priv->channel_count, GFP_KERNEL);
290 if (!channels)
291 return -ENOMEM;
292
5027309b 293 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR
294 GFP_KERNEL);
295 if (!rates) {
296 kfree(channels);
297 return -ENOMEM;
298 }
299
300 /* 5.2GHz channels start after the 2.4GHz channels */
301 sband = &priv->bands[IEEE80211_BAND_5GHZ];
302 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
303 /* just OFDM */
304 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 305 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 306
49779293 307 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 308 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 309 IEEE80211_BAND_5GHZ);
c7de35cd
RR
310
311 sband = &priv->bands[IEEE80211_BAND_2GHZ];
312 sband->channels = channels;
313 /* OFDM & CCK */
314 sband->bitrates = rates;
5027309b 315 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 316
49779293 317 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 318 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 319 IEEE80211_BAND_2GHZ);
c7de35cd
RR
320
321 priv->ieee_channels = channels;
322 priv->ieee_rates = rates;
323
c7de35cd
RR
324 for (i = 0; i < priv->channel_count; i++) {
325 ch = &priv->channel_info[i];
326
327 /* FIXME: might be removed if scan is OK */
328 if (!is_channel_valid(ch))
329 continue;
330
331 if (is_channel_a_band(ch))
332 sband = &priv->bands[IEEE80211_BAND_5GHZ];
333 else
334 sband = &priv->bands[IEEE80211_BAND_2GHZ];
335
336 geo_ch = &sband->channels[sband->n_channels++];
337
338 geo_ch->center_freq =
339 ieee80211_channel_to_frequency(ch->channel);
340 geo_ch->max_power = ch->max_power_avg;
341 geo_ch->max_antenna_gain = 0xff;
342 geo_ch->hw_value = ch->channel;
343
344 if (is_channel_valid(ch)) {
345 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
346 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
347
348 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
349 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
350
351 if (ch->flags & EEPROM_CHANNEL_RADAR)
352 geo_ch->flags |= IEEE80211_CHAN_RADAR;
353
7aafef1c 354 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 355
dc1b0973
WYG
356 if (ch->max_power_avg > priv->tx_power_device_lmt)
357 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR
358 } else {
359 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
360 }
361
e1623446 362 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR
363 ch->channel, geo_ch->center_freq,
364 is_channel_a_band(ch) ? "5.2" : "2.4",
365 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
366 "restricted" : "valid",
367 geo_ch->flags);
368 }
369
370 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
371 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW
372 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
373 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO
374 priv->pci_dev->device,
375 priv->pci_dev->subsystem_device);
c7de35cd
RR
376 priv->cfg->sku &= ~IWL_SKU_A;
377 }
378
978785a3 379 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO
380 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
381 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR
382
383 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
384
385 return 0;
386}
534166de 387EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR
388
389/*
390 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
391 */
534166de 392void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR
393{
394 kfree(priv->ieee_channels);
395 kfree(priv->ieee_rates);
396 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
397}
534166de 398EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 399
37dc70fe 400/*
94597ab2 401 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK
402 * function.
403 */
94597ab2
JB
404void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
405 struct ieee80211_tx_info *info,
406 __le16 fc, __le32 *tx_flags)
37dc70fe
AK
407{
408 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
409 *tx_flags |= TX_CMD_FLG_RTS_MSK;
410 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB
411 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
412
413 if (!ieee80211_is_mgmt(fc))
414 return;
415
416 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
417 case cpu_to_le16(IEEE80211_STYPE_AUTH):
418 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
419 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
420 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
421 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
422 *tx_flags |= TX_CMD_FLG_CTS_MSK;
423 break;
424 }
37dc70fe
AK
425 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
426 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
427 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 428 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK
429 }
430}
94597ab2
JB
431EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
432
37dc70fe 433
28a6b07a 434static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 435{
ba37a3d0 436 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 437 priv->current_ht_config.single_chain_sufficient;
c7de35cd 438}
963f5517 439
47c5196e
TW
440static u8 iwl_is_channel_extension(struct iwl_priv *priv,
441 enum ieee80211_band band,
442 u16 channel, u8 extension_chan_offset)
443{
444 const struct iwl_channel_info *ch_info;
445
446 ch_info = iwl_get_channel_info(priv, band, channel);
447 if (!is_channel_valid(ch_info))
448 return 0;
449
d9fe60de 450 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 451 return !(ch_info->ht40_extension_channel &
689da1b3 452 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 453 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 454 return !(ch_info->ht40_extension_channel &
689da1b3 455 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW
456
457 return 0;
458}
459
7aafef1c 460u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 461 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 462{
fad95bf5 463 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 464
fad95bf5 465 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW
466 return 0;
467
a2b0f02e
WYG
468 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
469 * the bit will not set if it is pure 40MHz case
470 */
47c5196e 471 if (sta_ht_inf) {
a2b0f02e 472 if (!sta_ht_inf->ht_supported)
47c5196e
TW
473 return 0;
474 }
d73e4923 475#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG
476 if (priv->disable_ht40)
477 return 0;
478#endif
611d3eb7
WYG
479 return iwl_is_channel_extension(priv, priv->band,
480 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 481 ht_conf->extension_chan_offset);
47c5196e 482}
7aafef1c 483EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 484
2c2f3b33
TW
485static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
486{
487 u16 new_val = 0;
488 u16 beacon_factor = 0;
489
490 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
491 new_val = beacon_val / beacon_factor;
492
493 if (!new_val)
494 new_val = max_beacon_val;
495
496 return new_val;
497}
498
948f5a2f 499int iwl_send_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW
500{
501 u64 tsf;
502 s32 interval_tm, rem;
2c2f3b33
TW
503 struct ieee80211_conf *conf = NULL;
504 u16 beacon_int;
505
506 conf = ieee80211_get_hw_conf(priv->hw);
507
948f5a2f
JB
508 lockdep_assert_held(&priv->mutex);
509
510 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
511
2c2f3b33
TW
512 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
513 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
514
1dda6d28 515 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 516
1dda6d28 517 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW
518 /* TODO: we need to get atim_window from upper stack
519 * for now we set to 0 */
520 priv->rxon_timing.atim_window = 0;
1dda6d28
JB
521 } else {
522 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW
523 }
524
525 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 526 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
2c2f3b33
TW
527 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
528
529 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 530 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33
TW
531 rem = do_div(tsf, interval_tm);
532 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
533
2c2f3b33
TW
534 IWL_DEBUG_ASSOC(priv,
535 "beacon interval %d beacon timer %d beacon tim %d\n",
536 le16_to_cpu(priv->rxon_timing.beacon_interval),
537 le32_to_cpu(priv->rxon_timing.beacon_init_val),
538 le16_to_cpu(priv->rxon_timing.atim_window));
948f5a2f
JB
539
540 return iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
541 sizeof(priv->rxon_timing), &priv->rxon_timing);
2c2f3b33 542}
948f5a2f 543EXPORT_SYMBOL(iwl_send_rxon_timing);
2c2f3b33 544
8ccde88a
SO
545void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
546{
547 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
548
549 if (hw_decrypt)
550 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
551 else
552 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
553
554}
555EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
556
557/**
558 * iwl_check_rxon_cmd - validate RXON structure is valid
559 *
560 * NOTE: This is really only useful during development and can eventually
561 * be #ifdef'd out once the driver is stable and folks aren't actively
562 * making changes
563 */
564int iwl_check_rxon_cmd(struct iwl_priv *priv)
565{
566 int error = 0;
567 int counter = 1;
568 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
569
570 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
571 error |= le32_to_cpu(rxon->flags &
572 (RXON_FLG_TGJ_NARROW_BAND_MSK |
573 RXON_FLG_RADAR_DETECT_MSK));
574 if (error)
575 IWL_WARN(priv, "check 24G fields %d | %d\n",
576 counter++, error);
577 } else {
578 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
579 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
580 if (error)
581 IWL_WARN(priv, "check 52 fields %d | %d\n",
582 counter++, error);
583 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
584 if (error)
585 IWL_WARN(priv, "check 52 CCK %d | %d\n",
586 counter++, error);
587 }
588 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
589 if (error)
590 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
591
592 /* make sure basic rates 6Mbps and 1Mbps are supported */
593 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
594 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
595 if (error)
596 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
597
598 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
599 if (error)
600 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
601
602 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
603 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
604 if (error)
605 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
606 counter++, error);
607
608 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
609 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
610 if (error)
611 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
612 counter++, error);
613
614 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
615 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
616 if (error)
617 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
618 counter++, error);
619
620 if (error)
621 IWL_WARN(priv, "Tuning to channel %d\n",
622 le16_to_cpu(rxon->channel));
623
624 if (error) {
625 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
626 return -1;
627 }
628 return 0;
629}
630EXPORT_SYMBOL(iwl_check_rxon_cmd);
631
632/**
633 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
634 * @priv: staging_rxon is compared to active_rxon
635 *
636 * If the RXON structure is changing enough to require a new tune,
637 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
638 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
639 */
640int iwl_full_rxon_required(struct iwl_priv *priv)
641{
642
643 /* These items are only settable from the full RXON command */
644 if (!(iwl_is_associated(priv)) ||
645 compare_ether_addr(priv->staging_rxon.bssid_addr,
646 priv->active_rxon.bssid_addr) ||
647 compare_ether_addr(priv->staging_rxon.node_addr,
648 priv->active_rxon.node_addr) ||
649 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
650 priv->active_rxon.wlap_bssid_addr) ||
651 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
652 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
653 (priv->staging_rxon.air_propagation !=
654 priv->active_rxon.air_propagation) ||
655 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
656 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
657 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
658 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH
659 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
660 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO
661 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
662 return 1;
663
664 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
665 * be updated with the RXON_ASSOC command -- however only some
666 * flag transitions are allowed using RXON_ASSOC */
667
668 /* Check if we are not switching bands */
669 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
670 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
671 return 1;
672
673 /* Check if we are switching association toggle */
674 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
675 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
676 return 1;
677
678 return 0;
679}
680EXPORT_SYMBOL(iwl_full_rxon_required);
681
682u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
683{
4a02886b
JB
684 /*
685 * Assign the lowest rate -- should really get this from
686 * the beacon skb from mac80211.
687 */
8ccde88a
SO
688 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
689 return IWL_RATE_1M_PLCP;
690 else
691 return IWL_RATE_6M_PLCP;
692}
693EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
694
fad95bf5 695void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 696{
c1adf9fb 697 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 698
fad95bf5 699 if (!ht_conf->is_ht) {
a2b0f02e 700 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 701 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 702 RXON_FLG_HT40_PROT_MSK |
42eb7c64 703 RXON_FLG_HT_PROT_MSK);
47c5196e 704 return;
42eb7c64 705 }
47c5196e 706
a2b0f02e
WYG
707 /* FIXME: if the definition of ht_protection changed, the "translation"
708 * will be needed for rxon->flags
709 */
fad95bf5 710 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG
711
712 /* Set up channel bandwidth:
7aafef1c 713 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG
714 /* clear the HT channel mode before set the mode */
715 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
716 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG
717 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
718 /* pure ht40 */
fad95bf5 719 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 720 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 721 /* Note: control channel is opposite of extension channel */
fad95bf5 722 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG
723 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
724 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
725 break;
726 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
727 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
728 break;
729 }
730 } else {
a2b0f02e 731 /* Note: control channel is opposite of extension channel */
fad95bf5 732 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG
733 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
734 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
735 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
736 break;
737 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
738 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
739 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
740 break;
741 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
742 default:
743 /* channel location only valid if in Mixed mode */
744 IWL_ERR(priv, "invalid extension channel offset\n");
745 break;
746 }
747 }
748 } else {
749 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW
750 }
751
45823531
AK
752 if (priv->cfg->ops->hcmd->set_rxon_chain)
753 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 754
02bb1bea 755 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 756 "extension channel offset 0x%x\n",
fad95bf5
JB
757 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
758 ht_conf->extension_chan_offset);
47c5196e
TW
759}
760EXPORT_SYMBOL(iwl_set_rxon_ht);
761
9e5e6c32
TW
762#define IWL_NUM_RX_CHAINS_MULTIPLE 3
763#define IWL_NUM_RX_CHAINS_SINGLE 2
764#define IWL_NUM_IDLE_CHAINS_DUAL 2
765#define IWL_NUM_IDLE_CHAINS_SINGLE 1
766
2b396a12
JB
767/*
768 * Determine how many receiver/antenna chains to use.
769 *
770 * More provides better reception via diversity. Fewer saves power
771 * at the expense of throughput, but only when not in powersave to
772 * start with.
773 *
c7de35cd
RR
774 * MIMO (dual stream) requires at least 2, but works better with 3.
775 * This does not determine *which* chains to use, just how many.
776 */
28a6b07a 777static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 778{
c7de35cd 779 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 780 if (is_single_rx_stream(priv))
9e5e6c32 781 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 782 else
9e5e6c32 783 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 784}
c7de35cd 785
2b396a12 786/*
3f3e0376
WYG
787 * When we are in power saving mode, unless device support spatial
788 * multiplexing power save, use the active count for rx chain count.
2b396a12 789 */
28a6b07a
TW
790static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
791{
ba37a3d0
JB
792 /* # Rx chains when idling, depending on SMPS mode */
793 switch (priv->current_ht_config.smps) {
794 case IEEE80211_SMPS_STATIC:
795 case IEEE80211_SMPS_DYNAMIC:
796 return IWL_NUM_IDLE_CHAINS_SINGLE;
797 case IEEE80211_SMPS_OFF:
798 return active_cnt;
c15d20c1 799 default:
ba37a3d0
JB
800 WARN(1, "invalid SMPS mode %d",
801 priv->current_ht_config.smps);
802 return active_cnt;
3f3e0376 803 }
c7de35cd
RR
804}
805
04816448
GE
806/* up to 4 chains */
807static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
808{
809 u8 res;
810 res = (chain_bitmap & BIT(0)) >> 0;
811 res += (chain_bitmap & BIT(1)) >> 1;
812 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 813 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE
814 return res;
815}
816
c7de35cd
RR
817/**
818 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
819 *
820 * Selects how many and which Rx receivers/antennas/chains to use.
821 * This should not be used for scan command ... it puts data in wrong place.
822 */
823void iwl_set_rxon_chain(struct iwl_priv *priv)
824{
28a6b07a
TW
825 bool is_single = is_single_rx_stream(priv);
826 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE
827 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
828 u32 active_chains;
28a6b07a 829 u16 rx_chain;
c7de35cd
RR
830
831 /* Tell uCode which antennas are actually connected.
832 * Before first association, we assume all antennas are connected.
833 * Just after first association, iwl_chain_noise_calibration()
834 * checks which antennas actually *are* connected. */
04816448
GE
835 if (priv->chain_noise_data.active_chains)
836 active_chains = priv->chain_noise_data.active_chains;
837 else
838 active_chains = priv->hw_params.valid_rx_ant;
839
840 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR
841
842 /* How many receivers should we use? */
28a6b07a
TW
843 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
844 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
845
28a6b07a 846
04816448
GE
847 /* correct rx chain count according hw settings
848 * and chain noise calibration
849 */
850 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
851 if (valid_rx_cnt < active_rx_cnt)
852 active_rx_cnt = valid_rx_cnt;
853
854 if (valid_rx_cnt < idle_rx_cnt)
855 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW
856
857 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
858 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
859
860 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
861
9e5e6c32 862 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR
863 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
864 else
865 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
866
e1623446 867 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW
868 priv->staging_rxon.rx_chain,
869 active_rx_cnt, idle_rx_cnt);
870
871 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
872 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR
873}
874EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 875
14023641
AK
876/* Return valid channel */
877u8 iwl_get_single_channel_number(struct iwl_priv *priv,
878 enum ieee80211_band band)
879{
880 const struct iwl_channel_info *ch_info;
881 int i;
882 u8 channel = 0;
883
884 /* only scan single channel, good enough to reset the RF */
885 /* pick the first valid not in-use channel */
886 if (band == IEEE80211_BAND_5GHZ) {
887 for (i = 14; i < priv->channel_count; i++) {
888 if (priv->channel_info[i].channel !=
889 le16_to_cpu(priv->staging_rxon.channel)) {
890 channel = priv->channel_info[i].channel;
891 ch_info = iwl_get_channel_info(priv,
892 band, channel);
893 if (is_channel_valid(ch_info))
894 break;
895 }
896 }
897 } else {
898 for (i = 0; i < 14; i++) {
899 if (priv->channel_info[i].channel !=
900 le16_to_cpu(priv->staging_rxon.channel)) {
901 channel =
902 priv->channel_info[i].channel;
903 ch_info = iwl_get_channel_info(priv,
904 band, channel);
905 if (is_channel_valid(ch_info))
906 break;
907 }
908 }
909 }
910
911 return channel;
912}
913EXPORT_SYMBOL(iwl_get_single_channel_number);
914
bf85ea4f 915/**
3edb5fd6
SZ
916 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
917 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 918
3edb5fd6 919 * In addition to setting the staging RXON, priv->band is also set.
bf85ea4f
AK
920 *
921 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 922 * in the staging RXON flag structure based on the ch->band
bf85ea4f 923 */
17e72782 924int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 925{
17e72782 926 enum ieee80211_band band = ch->band;
81e95430 927 u16 channel = ch->hw_value;
17e72782 928
bf85ea4f
AK
929 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
930 (priv->band == band))
931 return 0;
932
933 priv->staging_rxon.channel = cpu_to_le16(channel);
934 if (band == IEEE80211_BAND_5GHZ)
935 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
936 else
937 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
938
939 priv->band = band;
940
e1623446 941 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK
942
943 return 0;
944}
c7de35cd 945EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 946
79d07325
WYG
947void iwl_set_flags_for_band(struct iwl_priv *priv,
948 enum ieee80211_band band,
949 struct ieee80211_vif *vif)
8ccde88a
SO
950{
951 if (band == IEEE80211_BAND_5GHZ) {
952 priv->staging_rxon.flags &=
953 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
954 | RXON_FLG_CCK_MSK);
955 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
956 } else {
957 /* Copied from iwl_post_associate() */
c213d745 958 if (vif && vif->bss_conf.use_short_slot)
8ccde88a
SO
959 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
960 else
961 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
962
8ccde88a
SO
963 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
964 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
965 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
966 }
967}
79d07325 968EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO
969
970/*
971 * initialize rxon structure with default values from eeprom
972 */
1dda6d28
JB
973void iwl_connection_init_rx_config(struct iwl_priv *priv,
974 struct ieee80211_vif *vif)
8ccde88a
SO
975{
976 const struct iwl_channel_info *ch_info;
1dda6d28
JB
977 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
978
979 if (vif)
980 type = vif->type;
8ccde88a
SO
981
982 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
983
1dda6d28 984 switch (type) {
8ccde88a
SO
985 case NL80211_IFTYPE_AP:
986 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
987 break;
988
989 case NL80211_IFTYPE_STATION:
990 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
991 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
992 break;
993
994 case NL80211_IFTYPE_ADHOC:
995 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
996 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
997 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
998 RXON_FILTER_ACCEPT_GRP_MSK;
999 break;
1000
8ccde88a 1001 default:
1dda6d28 1002 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO
1003 break;
1004 }
1005
1006#if 0
1007 /* TODO: Figure out when short_preamble would be set and cache from
1008 * that */
1009 if (!hw_to_local(priv->hw)->short_preamble)
1010 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1011 else
1012 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1013#endif
1014
1015 ch_info = iwl_get_channel_info(priv, priv->band,
1016 le16_to_cpu(priv->active_rxon.channel));
1017
1018 if (!ch_info)
1019 ch_info = &priv->channel_info[0];
1020
8ccde88a
SO
1021 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1022 priv->band = ch_info->band;
1023
1dda6d28 1024 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO
1025
1026 priv->staging_rxon.ofdm_basic_rates =
1027 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1028 priv->staging_rxon.cck_basic_rates =
1029 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1030
a2b0f02e
WYG
1031 /* clear both MIX and PURE40 mode flag */
1032 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1033 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408
JB
1034
1035 if (vif)
1036 memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN);
1037
8ccde88a
SO
1038 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1039 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1040 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO
1041}
1042EXPORT_SYMBOL(iwl_connection_init_rx_config);
1043
79d07325 1044void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO
1045{
1046 const struct ieee80211_supported_band *hw = NULL;
1047 struct ieee80211_rate *rate;
1048 int i;
1049
1050 hw = iwl_get_hw_mode(priv, priv->band);
1051 if (!hw) {
1052 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1053 return;
1054 }
1055
1056 priv->active_rate = 0;
8ccde88a
SO
1057
1058 for (i = 0; i < hw->n_bitrates; i++) {
1059 rate = &(hw->bitrates[i]);
5027309b 1060 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO
1061 priv->active_rate |= (1 << rate->hw_value);
1062 }
1063
4a02886b 1064 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1065
4a02886b
JB
1066 priv->staging_rxon.cck_basic_rates =
1067 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1068
1069 priv->staging_rxon.ofdm_basic_rates =
1070 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1071}
79d07325
WYG
1072EXPORT_SYMBOL(iwl_set_rate);
1073
1074void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1075{
1076 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1077 return;
1078
1079 if (priv->switch_rxon.switch_in_progress) {
1080 ieee80211_chswitch_done(priv->vif, is_success);
1081 mutex_lock(&priv->mutex);
1082 priv->switch_rxon.switch_in_progress = false;
1083 mutex_unlock(&priv->mutex);
1084 }
1085}
1086EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO
1087
1088void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1089{
2f301227 1090 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO
1091 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1092 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1093
0924e519
WYG
1094 if (priv->switch_rxon.switch_in_progress) {
1095 if (!le32_to_cpu(csa->status) &&
1096 (csa->channel == priv->switch_rxon.channel)) {
1097 rxon->channel = csa->channel;
1098 priv->staging_rxon.channel = csa->channel;
1099 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1100 le16_to_cpu(csa->channel));
79d07325
WYG
1101 iwl_chswitch_done(priv, true);
1102 } else {
0924e519
WYG
1103 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1104 le16_to_cpu(csa->channel));
79d07325
WYG
1105 iwl_chswitch_done(priv, false);
1106 }
0924e519 1107 }
8ccde88a
SO
1108}
1109EXPORT_SYMBOL(iwl_rx_csa);
1110
1111#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1112void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO
1113{
1114 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1115
e1623446 1116 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1117 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW
1118 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1119 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1120 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1121 le32_to_cpu(rxon->filter_flags));
e1623446
TW
1122 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1123 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1124 rxon->ofdm_basic_rates);
e1623446
TW
1125 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1126 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1127 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1128 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1129}
a643565e 1130EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1131#endif
8ccde88a
SO
1132/**
1133 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1134 */
1135void iwl_irq_handle_error(struct iwl_priv *priv)
1136{
1137 /* Set the FW error flag -- cleared on iwl_down */
1138 set_bit(STATUS_FW_ERROR, &priv->status);
1139
1140 /* Cancel currently queued command. */
1141 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1142
459bc732
SZ
1143 IWL_ERR(priv, "Loaded firmware version: %s\n",
1144 priv->hw->wiphy->fw_version);
1145
3a3ff72c 1146 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG
1147 if (priv->cfg->ops->lib->dump_csr)
1148 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG
1149 if (priv->cfg->ops->lib->dump_fh)
1150 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1151 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1152#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1153 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1154 iwl_print_rx_config_cmd(priv);
8ccde88a
SO
1155#endif
1156
1157 wake_up_interruptible(&priv->wait_command_queue);
1158
1159 /* Keep the restart process from trying to send host
1160 * commands by clearing the INIT status bit */
1161 clear_bit(STATUS_READY, &priv->status);
1162
1163 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1164 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO
1165 "Restarting adapter due to uCode error.\n");
1166
8ccde88a
SO
1167 if (priv->cfg->mod_params->restart_fw)
1168 queue_work(priv->workqueue, &priv->restart);
1169 }
1170}
1171EXPORT_SYMBOL(iwl_irq_handle_error);
1172
f8e200de 1173static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1174{
5220af0c 1175 int ret = 0;
d68b603c 1176
5220af0c 1177 /* stop device's busmaster DMA activity */
d68b603c
AK
1178 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1179
5220af0c 1180 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1181 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC
1182 if (ret)
1183 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1184
d68b603c
AK
1185 IWL_DEBUG_INFO(priv, "stop master\n");
1186
5220af0c 1187 return ret;
d68b603c 1188}
d68b603c
AK
1189
1190void iwl_apm_stop(struct iwl_priv *priv)
1191{
fadb3582
BC
1192 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1193
5220af0c 1194 /* Stop device's DMA activity */
d68b603c
AK
1195 iwl_apm_stop_master(priv);
1196
5220af0c 1197 /* Reset the entire device */
d68b603c
AK
1198 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1199
1200 udelay(10);
5220af0c
BC
1201
1202 /*
1203 * Clear "initialization complete" bit to move adapter from
1204 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1205 */
d68b603c 1206 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK
1207}
1208EXPORT_SYMBOL(iwl_apm_stop);
1209
fadb3582
BC
1210
1211/*
1212 * Start up NIC's basic functionality after it has been reset
1213 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1214 * NOTE: This does not load uCode nor start the embedded processor
1215 */
1216int iwl_apm_init(struct iwl_priv *priv)
1217{
1218 int ret = 0;
1219 u16 lctl;
1220
1221 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1222
1223 /*
1224 * Use "set_bit" below rather than "write", to preserve any hardware
1225 * bits already set by default after reset.
1226 */
1227
1228 /* Disable L0S exit timer (platform NMI Work/Around) */
1229 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1230 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1231
1232 /*
1233 * Disable L0s without affecting L1;
1234 * don't wait for ICH L0s (ICH bug W/A)
1235 */
1236 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1237 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1238
1239 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1240 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1241
1242 /*
1243 * Enable HAP INTA (interrupt from management bus) to
1244 * wake device's PCI Express link L1a -> L0s
1245 * NOTE: This is no-op for 3945 (non-existant bit)
1246 */
1247 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1248 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1249
1250 /*
a6c5c731
BC
1251 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1252 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1253 * If so (likely), disable L0S, so device moves directly L0->L1;
1254 * costs negligible amount of power savings.
1255 * If not (unlikely), enable L0S, so there is at least some
1256 * power savings, even without L1.
fadb3582
BC
1257 */
1258 if (priv->cfg->set_l0s) {
1259 lctl = iwl_pcie_link_ctl(priv);
1260 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1261 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1262 /* L1-ASPM enabled; disable(!) L0S */
1263 iwl_set_bit(priv, CSR_GIO_REG,
1264 CSR_GIO_REG_VAL_L0S_ENABLED);
1265 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1266 } else {
1267 /* L1-ASPM disabled; enable(!) L0S */
1268 iwl_clear_bit(priv, CSR_GIO_REG,
1269 CSR_GIO_REG_VAL_L0S_ENABLED);
1270 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1271 }
1272 }
1273
1274 /* Configure analog phase-lock-loop before activating to D0A */
1275 if (priv->cfg->pll_cfg_val)
1276 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1277
1278 /*
1279 * Set "initialization complete" bit to move adapter from
1280 * D0U* --> D0A* (powered-up active) state.
1281 */
1282 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1283
1284 /*
1285 * Wait for clock stabilization; once stabilized, access to
1286 * device-internal resources is supported, e.g. iwl_write_prph()
1287 * and accesses to uCode SRAM.
1288 */
1289 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1290 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1291 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1292 if (ret < 0) {
1293 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1294 goto out;
1295 }
1296
1297 /*
1298 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1299 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1300 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1301 * and don't need BSM to restore data after power-saving sleep.
1302 *
1303 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1304 * do not disable clocks. This preserves any hardware bits already
1305 * set by default in "CLK_CTRL_REG" after reset.
1306 */
1307 if (priv->cfg->use_bsm)
1308 iwl_write_prph(priv, APMG_CLK_EN_REG,
1309 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1310 else
1311 iwl_write_prph(priv, APMG_CLK_EN_REG,
1312 APMG_CLK_VAL_DMA_CLK_RQT);
1313 udelay(20);
1314
1315 /* Disable L1-Active */
1316 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1317 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1318
1319out:
1320 return ret;
1321}
1322EXPORT_SYMBOL(iwl_apm_init);
1323
1324
630fe9b6
TW
1325int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1326{
1327 int ret = 0;
5eadd94b
WYG
1328 s8 prev_tx_power = priv->tx_power_user_lmt;
1329
b744cb79
WYG
1330 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1331 IWL_WARN(priv,
1332 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1333 tx_power,
b744cb79 1334 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW
1335 return -EINVAL;
1336 }
1337
dc1b0973 1338 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG
1339 IWL_WARN(priv,
1340 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1341 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW
1342 return -EINVAL;
1343 }
1344
1345 if (priv->tx_power_user_lmt != tx_power)
1346 force = true;
1347
019fb97d 1348 /* if nic is not up don't send command */
5eadd94b
WYG
1349 if (iwl_is_ready_rf(priv)) {
1350 priv->tx_power_user_lmt = tx_power;
1351 if (force && priv->cfg->ops->lib->send_tx_power)
1352 ret = priv->cfg->ops->lib->send_tx_power(priv);
1353 else if (!priv->cfg->ops->lib->send_tx_power)
1354 ret = -EOPNOTSUPP;
1355 /*
1356 * if fail to set tx_power, restore the orig. tx power
1357 */
1358 if (ret)
1359 priv->tx_power_user_lmt = prev_tx_power;
1360 }
630fe9b6 1361
5eadd94b
WYG
1362 /*
1363 * Even this is an async host command, the command
1364 * will always report success from uCode
1365 * So once driver can placing the command into the queue
1366 * successfully, driver can use priv->tx_power_user_lmt
1367 * to reflect the current tx power
1368 */
630fe9b6
TW
1369 return ret;
1370}
1371EXPORT_SYMBOL(iwl_set_tx_power);
1372
ef850d7c 1373irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK
1374{
1375 struct iwl_priv *priv = data;
1376 u32 inta, inta_mask;
1377 u32 inta_fh;
6e8cc38d 1378 unsigned long flags;
f17d08a6
AK
1379 if (!priv)
1380 return IRQ_NONE;
1381
6e8cc38d 1382 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK
1383
1384 /* Disable (but don't clear!) interrupts here to avoid
1385 * back-to-back ISRs and sporadic interrupts from our NIC.
1386 * If we have something to service, the tasklet will re-enable ints.
1387 * If we *don't* have something, we'll re-enable before leaving here. */
1388 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1389 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1390
1391 /* Discover which interrupts are active/pending */
1392 inta = iwl_read32(priv, CSR_INT);
1393 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1394
1395 /* Ignore interrupt if there's nothing in NIC to service.
1396 * This may be due to IRQ shared with another device,
1397 * or due to sporadic interrupts thrown from our NIC. */
1398 if (!inta && !inta_fh) {
1399 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1400 goto none;
1401 }
1402
1403 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1404 /* Hardware disappeared. It might have already raised
1405 * an interrupt */
1406 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1407 goto unplugged;
1408 }
1409
1410 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1411 inta, inta_mask, inta_fh);
1412
1413 inta &= ~CSR_INT_BIT_SCD;
1414
1415 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1416 if (likely(inta || inta_fh))
1417 tasklet_schedule(&priv->irq_tasklet);
1418
1419 unplugged:
6e8cc38d 1420 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK
1421 return IRQ_HANDLED;
1422
1423 none:
1424 /* re-enable interrupts here since we don't have anything to service. */
1425 /* only Re-enable if diabled by irq */
1426 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1427 iwl_enable_interrupts(priv);
6e8cc38d 1428 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK
1429 return IRQ_NONE;
1430}
ef850d7c 1431EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1432
65b52bde 1433void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO
1434{
1435 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG
1436 .lead_time = BT_LEAD_TIME_DEF,
1437 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO
1438 .kill_ack_mask = 0,
1439 .kill_cts_mask = 0,
1440 };
1441
06702a73
WYG
1442 if (!bt_coex_active)
1443 bt_cmd.flags = BT_COEX_DISABLE;
1444 else
1445 bt_cmd.flags = BT_COEX_ENABLE;
1446
1447 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1448 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1449
65b52bde
JB
1450 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1451 sizeof(struct iwl_bt_cmd), &bt_cmd))
1452 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO
1453}
1454EXPORT_SYMBOL(iwl_send_bt_config);
1455
ef8d5529 1456int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1457{
ef8d5529
WYG
1458 struct iwl_statistics_cmd statistics_cmd = {
1459 .configuration_flags =
1460 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1461 };
ef8d5529
WYG
1462
1463 if (flags & CMD_ASYNC)
1464 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1465 sizeof(struct iwl_statistics_cmd),
1466 &statistics_cmd, NULL);
1467 else
1468 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1469 sizeof(struct iwl_statistics_cmd),
1470 &statistics_cmd);
49ea8596
EG
1471}
1472EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1473
030f05ed
AK
1474void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1475 struct iwl_rx_mem_buffer *rxb)
1476{
1477#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1478 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK
1479 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1480 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1481 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1482#endif
1483}
1484EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1485
1486void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1487 struct iwl_rx_mem_buffer *rxb)
1488{
2f301227 1489 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1490 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1491 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH
1492 "notification for %s:\n", len,
1493 get_cmd_string(pkt->hdr.cmd));
1494 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK
1495}
1496EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK
1497
1498void iwl_rx_reply_error(struct iwl_priv *priv,
1499 struct iwl_rx_mem_buffer *rxb)
1500{
2f301227 1501 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK
1502
1503 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1504 "seq 0x%04X ser 0x%08X\n",
1505 le32_to_cpu(pkt->u.err_resp.error_type),
1506 get_cmd_string(pkt->u.err_resp.cmd_id),
1507 pkt->u.err_resp.cmd_id,
1508 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1509 le32_to_cpu(pkt->u.err_resp.error_info));
1510}
1511EXPORT_SYMBOL(iwl_rx_reply_error);
1512
a83b9141
WYG
1513void iwl_clear_isr_stats(struct iwl_priv *priv)
1514{
1515 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1516}
a83b9141 1517
488829f1
AK
1518int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1519 const struct ieee80211_tx_queue_params *params)
1520{
1521 struct iwl_priv *priv = hw->priv;
1522 unsigned long flags;
1523 int q;
1524
1525 IWL_DEBUG_MAC80211(priv, "enter\n");
1526
1527 if (!iwl_is_ready_rf(priv)) {
1528 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1529 return -EIO;
1530 }
1531
1532 if (queue >= AC_NUM) {
1533 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1534 return 0;
1535 }
1536
1537 q = AC_NUM - 1 - queue;
1538
1539 spin_lock_irqsave(&priv->lock, flags);
1540
1541 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1542 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1543 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1544 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1545 cpu_to_le16((params->txop * 32));
1546
1547 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK
1548
1549 spin_unlock_irqrestore(&priv->lock, flags);
1550
1551 IWL_DEBUG_MAC80211(priv, "leave\n");
1552 return 0;
1553}
1554EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1555
a85d7cca
JB
1556int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1557{
1558 struct iwl_priv *priv = hw->priv;
1559
1560 return priv->ibss_manager == IWL_IBSS_MANAGER;
1561}
1562EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1563
5bbe233b 1564static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1565 struct ieee80211_vif *vif)
5bbe233b 1566{
fad95bf5 1567 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1568 struct ieee80211_sta *sta;
ca3c1f59 1569 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1570
91dd6c27 1571 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1572
fad95bf5 1573 if (!ht_conf->is_ht)
5bbe233b
AK
1574 return;
1575
fad95bf5 1576 ht_conf->ht_protection =
9ed6bcce 1577 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1578 ht_conf->non_GF_STA_present =
9ed6bcce 1579 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1580
02bb1bea
JB
1581 ht_conf->single_chain_sufficient = false;
1582
ca3c1f59 1583 switch (vif->type) {
02bb1bea
JB
1584 case NL80211_IFTYPE_STATION:
1585 rcu_read_lock();
ca3c1f59 1586 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB
1587 if (sta) {
1588 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1589 int maxstreams;
1590
1591 maxstreams = (ht_cap->mcs.tx_params &
1592 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1593 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1594 maxstreams += 1;
1595
1596 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1597 (ht_cap->mcs.rx_mask[2] == 0))
1598 ht_conf->single_chain_sufficient = true;
1599 if (maxstreams <= 1)
1600 ht_conf->single_chain_sufficient = true;
1601 } else {
1602 /*
1603 * If at all, this can only happen through a race
1604 * when the AP disconnects us while we're still
1605 * setting up the connection, in that case mac80211
1606 * will soon tell us about that.
1607 */
1608 ht_conf->single_chain_sufficient = true;
1609 }
1610 rcu_read_unlock();
1611 break;
1612 case NL80211_IFTYPE_ADHOC:
1613 ht_conf->single_chain_sufficient = true;
1614 break;
1615 default:
1616 break;
1617 }
5bbe233b
AK
1618
1619 IWL_DEBUG_MAC80211(priv, "leave\n");
1620}
1621
c91c3efc
AK
1622static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1623{
c91c3efc
AK
1624 iwl_led_disassociate(priv);
1625 /*
1626 * inform the ucode that there is no longer an
1627 * association and that no more packets should be
1628 * sent
1629 */
1630 priv->staging_rxon.filter_flags &=
1631 ~RXON_FILTER_ASSOC_MSK;
1632 priv->staging_rxon.assoc_id = 0;
1633 iwlcore_commit_rxon(priv);
1634}
1635
0bc5774f
JB
1636static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1637{
1638 struct iwl_priv *priv = hw->priv;
1639 unsigned long flags;
1640 __le64 timestamp;
1641
1642 IWL_DEBUG_MAC80211(priv, "enter\n");
1643
1644 if (!iwl_is_ready_rf(priv)) {
1645 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1646 return -EIO;
1647 }
1648
1649 spin_lock_irqsave(&priv->lock, flags);
1650
1651 if (priv->ibss_beacon)
1652 dev_kfree_skb(priv->ibss_beacon);
1653
1654 priv->ibss_beacon = skb;
1655
1656 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1657 priv->timestamp = le64_to_cpu(timestamp);
1658
1659 IWL_DEBUG_MAC80211(priv, "leave\n");
1660 spin_unlock_irqrestore(&priv->lock, flags);
1661
1662 priv->cfg->ops->lib->post_associate(priv, priv->vif);
1663
1664 return 0;
1665}
1666
5bbe233b 1667void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB
1668 struct ieee80211_vif *vif,
1669 struct ieee80211_bss_conf *bss_conf,
1670 u32 changes)
5bbe233b
AK
1671{
1672 struct iwl_priv *priv = hw->priv;
3a650292 1673 int ret;
5bbe233b
AK
1674
1675 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1676
2d0ddec5
JB
1677 if (!iwl_is_alive(priv))
1678 return;
1679
1680 mutex_lock(&priv->mutex);
1681
4ced3f74
JB
1682 if (changes & BSS_CHANGED_QOS) {
1683 unsigned long flags;
1684
1685 spin_lock_irqsave(&priv->lock, flags);
1686 priv->qos_data.qos_active = bss_conf->qos;
1687 iwl_update_qos(priv);
1688 spin_unlock_irqrestore(&priv->lock, flags);
1689 }
1690
92445c95 1691 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB
1692 dev_kfree_skb(priv->ibss_beacon);
1693 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1694 }
1695
d7129e19 1696 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB
1697 /* TODO: in AP mode, do something to make this take effect */
1698 }
1699
1700 if (changes & BSS_CHANGED_BSSID) {
1701 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1702
1703 /*
1704 * If there is currently a HW scan going on in the
1705 * background then we need to cancel it else the RXON
1706 * below/in post_associate will fail.
1707 */
2d0ddec5 1708 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1709 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB
1710 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1711 mutex_unlock(&priv->mutex);
1712 return;
1713 }
2d0ddec5 1714
d7129e19 1715 /* mac80211 only sets assoc when in STATION mode */
92445c95 1716 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB
1717 memcpy(priv->staging_rxon.bssid_addr,
1718 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1719
d7129e19
JB
1720 /* currently needed in a few places */
1721 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1722 } else {
1723 priv->staging_rxon.filter_flags &=
1724 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1725 }
d7129e19 1726
2d0ddec5
JB
1727 }
1728
d7129e19
JB
1729 /*
1730 * This needs to be after setting the BSSID in case
1731 * mac80211 decides to do both changes at once because
1732 * it will invoke post_associate.
1733 */
92445c95 1734 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB
1735 changes & BSS_CHANGED_BEACON) {
1736 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1737
1738 if (beacon)
1739 iwl_mac_beacon_update(hw, beacon);
1740 }
1741
5bbe233b
AK
1742 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1743 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1744 bss_conf->use_short_preamble);
1745 if (bss_conf->use_short_preamble)
1746 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1747 else
1748 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1749 }
1750
1751 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1752 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1753 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1754 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1755 else
1756 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2
JB
1757 if (bss_conf->use_cts_prot)
1758 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
1759 else
1760 priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK
1761 }
1762
d7129e19
JB
1763 if (changes & BSS_CHANGED_BASIC_RATES) {
1764 /* XXX use this information
1765 *
1766 * To do that, remove code from iwl_set_rate() and put something
1767 * like this here:
1768 *
1769 if (A-band)
1770 priv->staging_rxon.ofdm_basic_rates =
1771 bss_conf->basic_rates;
1772 else
1773 priv->staging_rxon.ofdm_basic_rates =
1774 bss_conf->basic_rates >> 4;
1775 priv->staging_rxon.cck_basic_rates =
1776 bss_conf->basic_rates & 0xF;
1777 */
1778 }
1779
5bbe233b 1780 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1781 iwl_ht_conf(priv, vif);
45823531
AK
1782
1783 if (priv->cfg->ops->hcmd->set_rxon_chain)
1784 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK
1785 }
1786
1787 if (changes & BSS_CHANGED_ASSOC) {
1788 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1789 if (bss_conf->assoc) {
5bbe233b 1790 priv->timestamp = bss_conf->timestamp;
5bbe233b 1791
e932a609
JB
1792 iwl_led_associate(priv);
1793
d7129e19 1794 if (!iwl_is_rfkill(priv))
1dda6d28 1795 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK
1796 } else
1797 iwl_set_no_assoc(priv);
d7129e19
JB
1798 }
1799
1dda6d28 1800 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB
1801 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1802 changes);
1803 ret = iwl_send_rxon_assoc(priv);
1804 if (!ret) {
1805 /* Sync active_rxon with latest change. */
1806 memcpy((void *)&priv->active_rxon,
1807 &priv->staging_rxon,
1808 sizeof(struct iwl_rxon_cmd));
5bbe233b 1809 }
5bbe233b 1810 }
d7129e19 1811
c91c3efc
AK
1812 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1813 if (vif->bss_conf.enable_beacon) {
1814 memcpy(priv->staging_rxon.bssid_addr,
1815 bss_conf->bssid, ETH_ALEN);
1816 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1817 iwlcore_config_ap(priv, vif);
c91c3efc
AK
1818 } else
1819 iwl_set_no_assoc(priv);
f513dfff
DH
1820 }
1821
1fa61b2e
JB
1822 if (changes & BSS_CHANGED_IBSS) {
1823 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1824 bss_conf->ibss_joined);
1825 if (ret)
1826 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1827 bss_conf->ibss_joined ? "add" : "remove",
1828 bss_conf->bssid);
1829 }
1830
d7129e19
JB
1831 mutex_unlock(&priv->mutex);
1832
2d0ddec5 1833 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK
1834}
1835EXPORT_SYMBOL(iwl_bss_info_changed);
1836
b55e75ed 1837static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1838{
1dda6d28 1839 iwl_connection_init_rx_config(priv, vif);
727882d6
AK
1840
1841 if (priv->cfg->ops->hcmd->set_rxon_chain)
1842 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1843
b55e75ed 1844 return iwlcore_commit_rxon(priv);
727882d6 1845}
727882d6 1846
b55e75ed 1847int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK
1848{
1849 struct iwl_priv *priv = hw->priv;
47e28f41 1850 int err = 0;
cbb6ab94 1851
3779db10
JB
1852 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1853 vif->type, vif->addr);
cbb6ab94 1854
47e28f41
JB
1855 mutex_lock(&priv->mutex);
1856
b55e75ed
JB
1857 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1858 err = -EINVAL;
1859 goto out;
1860 }
1861
cbb6ab94
AK
1862 if (priv->vif) {
1863 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB
1864 err = -EOPNOTSUPP;
1865 goto out;
cbb6ab94
AK
1866 }
1867
1ed32e4f
JB
1868 priv->vif = vif;
1869 priv->iw_mode = vif->type;
cbb6ab94 1870
b55e75ed
JB
1871 err = iwl_set_mode(priv, vif);
1872 if (err)
1873 goto out_err;
7e246191 1874
59079949
JB
1875 if (priv->cfg->advanced_bt_coexist &&
1876 vif->type == NL80211_IFTYPE_ADHOC) {
1877 /*
1878 * pretend to have high BT traffic as long as we
1879 * are operating in IBSS mode, as this will cause
1880 * the rate scaling etc. to behave as intended.
1881 */
1882 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1883 }
1884
b55e75ed 1885 goto out;
cbb6ab94 1886
b55e75ed
JB
1887 out_err:
1888 priv->vif = NULL;
1889 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1890 out:
cbb6ab94
AK
1891 mutex_unlock(&priv->mutex);
1892
1893 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1894 return err;
cbb6ab94
AK
1895}
1896EXPORT_SYMBOL(iwl_mac_add_interface);
1897
d8052319 1898void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 1899 struct ieee80211_vif *vif)
d8052319
AK
1900{
1901 struct iwl_priv *priv = hw->priv;
02f5ba5b 1902 bool scan_completed = false;
d8052319
AK
1903
1904 IWL_DEBUG_MAC80211(priv, "enter\n");
1905
1906 mutex_lock(&priv->mutex);
1907
1908 if (iwl_is_ready_rf(priv)) {
1909 iwl_scan_cancel_timeout(priv, 100);
1910 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1911 iwlcore_commit_rxon(priv);
1912 }
1ed32e4f 1913 if (priv->vif == vif) {
d8052319 1914 priv->vif = NULL;
f84b29ec 1915 if (priv->scan_vif == vif) {
02f5ba5b 1916 scan_completed = true;
f84b29ec
JB
1917 priv->scan_vif = NULL;
1918 priv->scan_request = NULL;
1919 }
d8052319
AK
1920 memset(priv->bssid, 0, ETH_ALEN);
1921 }
59079949
JB
1922
1923 /*
1924 * When removing the IBSS interface, overwrite the
1925 * BT traffic load with the stored one from the last
1926 * notification, if any. If this is a device that
1927 * doesn't implement this, this has no effect since
1928 * both values are the same and zero.
1929 */
1930 if (vif->type == NL80211_IFTYPE_ADHOC)
1931 priv->bt_traffic_load = priv->notif_bt_traffic_load;
1932
d8052319
AK
1933 mutex_unlock(&priv->mutex);
1934
02f5ba5b
JB
1935 if (scan_completed)
1936 ieee80211_scan_completed(priv->hw, true);
1937
d8052319
AK
1938 IWL_DEBUG_MAC80211(priv, "leave\n");
1939
1940}
1941EXPORT_SYMBOL(iwl_mac_remove_interface);
1942
4808368d
AK
1943/**
1944 * iwl_mac_config - mac80211 config callback
4808368d
AK
1945 */
1946int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
1947{
1948 struct iwl_priv *priv = hw->priv;
1949 const struct iwl_channel_info *ch_info;
1950 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 1951 struct ieee80211_channel *channel = conf->channel;
fad95bf5 1952 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK
1953 unsigned long flags = 0;
1954 int ret = 0;
1955 u16 ch;
1956 int scan_active = 0;
1957
1958 mutex_lock(&priv->mutex);
1959
4808368d 1960 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
aa2dc6b5 1961 channel->hw_value, changed);
4808368d
AK
1962
1963 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
1964 test_bit(STATUS_SCANNING, &priv->status))) {
1965 scan_active = 1;
1966 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
1967 }
1968
ba37a3d0
JB
1969 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
1970 IEEE80211_CONF_CHANGE_CHANNEL)) {
1971 /* mac80211 uses static for non-HT which is what we want */
1972 priv->current_ht_config.smps = conf->smps_mode;
1973
1974 /*
1975 * Recalculate chain counts.
1976 *
1977 * If monitor mode is enabled then mac80211 will
1978 * set up the SM PS mode to OFF if an HT channel is
1979 * configured.
1980 */
1981 if (priv->cfg->ops->hcmd->set_rxon_chain)
1982 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1983 }
4808368d
AK
1984
1985 /* during scanning mac80211 will delay channel setting until
1986 * scan finish with changed = 0
1987 */
1988 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1989 if (scan_active)
1990 goto set_ch_out;
1991
aa2dc6b5
SZ
1992 ch = channel->hw_value;
1993 ch_info = iwl_get_channel_info(priv, channel->band, ch);
4808368d
AK
1994 if (!is_channel_valid(ch_info)) {
1995 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
1996 ret = -EINVAL;
1997 goto set_ch_out;
1998 }
1999
4808368d
AK
2000 spin_lock_irqsave(&priv->lock, flags);
2001
28bd723b
DH
2002 /* Configure HT40 channels */
2003 ht_conf->is_ht = conf_is_ht(conf);
2004 if (ht_conf->is_ht) {
2005 if (conf_is_ht40_minus(conf)) {
2006 ht_conf->extension_chan_offset =
2007 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2008 ht_conf->is_40mhz = true;
28bd723b
DH
2009 } else if (conf_is_ht40_plus(conf)) {
2010 ht_conf->extension_chan_offset =
2011 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2012 ht_conf->is_40mhz = true;
28bd723b
DH
2013 } else {
2014 ht_conf->extension_chan_offset =
2015 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2016 ht_conf->is_40mhz = false;
28bd723b
DH
2017 }
2018 } else
c812ee24 2019 ht_conf->is_40mhz = false;
28bd723b
DH
2020 /* Default to no protection. Protection mode will later be set
2021 * from BSS config in iwl_ht_conf */
2022 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d 2023
4808368d
AK
2024 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2025 priv->staging_rxon.flags = 0;
2026
aa2dc6b5 2027 iwl_set_rxon_channel(priv, channel);
5e2f75b8 2028 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2029
aa2dc6b5 2030 iwl_set_flags_for_band(priv, channel->band, priv->vif);
4808368d 2031 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2032
278c2f6f
DH
2033 if (priv->cfg->ops->lib->update_bcast_station)
2034 ret = priv->cfg->ops->lib->update_bcast_station(priv);
2035
4808368d
AK
2036 set_ch_out:
2037 /* The list of supported rates and rate mask can be different
2038 * for each band; since the band may have changed, reset
2039 * the rate mask to what mac80211 lists */
2040 iwl_set_rate(priv);
2041 }
2042
78f5fb7f
JB
2043 if (changed & (IEEE80211_CONF_CHANGE_PS |
2044 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2045 ret = iwl_power_update_mode(priv, false);
4808368d 2046 if (ret)
e312c24c 2047 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK
2048 }
2049
2050 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2051 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2052 priv->tx_power_user_lmt, conf->power_level);
2053
2054 iwl_set_tx_power(priv, conf->power_level, false);
2055 }
2056
0cf4c01e
MA
2057 if (!iwl_is_ready(priv)) {
2058 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2059 goto out;
2060 }
2061
4808368d
AK
2062 if (scan_active)
2063 goto out;
2064
2065 if (memcmp(&priv->active_rxon,
2066 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2067 iwlcore_commit_rxon(priv);
2068 else
2069 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2070
2071
2072out:
2073 IWL_DEBUG_MAC80211(priv, "leave\n");
2074 mutex_unlock(&priv->mutex);
2075 return ret;
2076}
2077EXPORT_SYMBOL(iwl_mac_config);
2078
bd564261
AK
2079void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2080{
2081 struct iwl_priv *priv = hw->priv;
2082 unsigned long flags;
2083
2084 mutex_lock(&priv->mutex);
2085 IWL_DEBUG_MAC80211(priv, "enter\n");
2086
2087 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2088 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK
2089 spin_unlock_irqrestore(&priv->lock, flags);
2090
bd564261 2091 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK
2092
2093 /* new association get rid of ibss beacon skb */
2094 if (priv->ibss_beacon)
2095 dev_kfree_skb(priv->ibss_beacon);
2096
2097 priv->ibss_beacon = NULL;
2098
bd564261 2099 priv->timestamp = 0;
bd564261
AK
2100
2101 spin_unlock_irqrestore(&priv->lock, flags);
2102
2103 if (!iwl_is_ready_rf(priv)) {
2104 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2105 mutex_unlock(&priv->mutex);
2106 return;
2107 }
2108
2109 /* we are restarting association process
2110 * clear RXON_FILTER_ASSOC_MSK bit
2111 */
b4665df4
JB
2112 iwl_scan_cancel_timeout(priv, 100);
2113 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2114 iwlcore_commit_rxon(priv);
bd564261
AK
2115
2116 iwl_set_rate(priv);
2117
2118 mutex_unlock(&priv->mutex);
2119
2120 IWL_DEBUG_MAC80211(priv, "leave\n");
2121}
2122EXPORT_SYMBOL(iwl_mac_reset_tsf);
2123
88804e2b
WYG
2124int iwl_alloc_txq_mem(struct iwl_priv *priv)
2125{
2126 if (!priv->txq)
2127 priv->txq = kzalloc(
2128 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2129 GFP_KERNEL);
2130 if (!priv->txq) {
91dd6c27 2131 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG
2132 return -ENOMEM;
2133 }
2134 return 0;
2135}
2136EXPORT_SYMBOL(iwl_alloc_txq_mem);
2137
2138void iwl_free_txq_mem(struct iwl_priv *priv)
2139{
2140 kfree(priv->txq);
2141 priv->txq = NULL;
2142}
2143EXPORT_SYMBOL(iwl_free_txq_mem);
2144
20594eb0
WYG
2145#ifdef CONFIG_IWLWIFI_DEBUGFS
2146
2147#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2148
2149void iwl_reset_traffic_log(struct iwl_priv *priv)
2150{
2151 priv->tx_traffic_idx = 0;
2152 priv->rx_traffic_idx = 0;
2153 if (priv->tx_traffic)
2154 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2155 if (priv->rx_traffic)
2156 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2157}
2158
2159int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2160{
2161 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2162
2163 if (iwl_debug_level & IWL_DL_TX) {
2164 if (!priv->tx_traffic) {
2165 priv->tx_traffic =
2166 kzalloc(traffic_size, GFP_KERNEL);
2167 if (!priv->tx_traffic)
2168 return -ENOMEM;
2169 }
2170 }
2171 if (iwl_debug_level & IWL_DL_RX) {
2172 if (!priv->rx_traffic) {
2173 priv->rx_traffic =
2174 kzalloc(traffic_size, GFP_KERNEL);
2175 if (!priv->rx_traffic)
2176 return -ENOMEM;
2177 }
2178 }
2179 iwl_reset_traffic_log(priv);
2180 return 0;
2181}
2182EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2183
2184void iwl_free_traffic_mem(struct iwl_priv *priv)
2185{
2186 kfree(priv->tx_traffic);
2187 priv->tx_traffic = NULL;
2188
2189 kfree(priv->rx_traffic);
2190 priv->rx_traffic = NULL;
2191}
2192EXPORT_SYMBOL(iwl_free_traffic_mem);
2193
2194void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2195 u16 length, struct ieee80211_hdr *header)
2196{
2197 __le16 fc;
2198 u16 len;
2199
2200 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2201 return;
2202
2203 if (!priv->tx_traffic)
2204 return;
2205
2206 fc = header->frame_control;
2207 if (ieee80211_is_data(fc)) {
2208 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2209 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2210 memcpy((priv->tx_traffic +
2211 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2212 header, len);
2213 priv->tx_traffic_idx =
2214 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2215 }
2216}
2217EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2218
2219void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2220 u16 length, struct ieee80211_hdr *header)
2221{
2222 __le16 fc;
2223 u16 len;
2224
2225 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2226 return;
2227
2228 if (!priv->rx_traffic)
2229 return;
2230
2231 fc = header->frame_control;
2232 if (ieee80211_is_data(fc)) {
2233 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2234 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2235 memcpy((priv->rx_traffic +
2236 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2237 header, len);
2238 priv->rx_traffic_idx =
2239 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2240 }
2241}
2242EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG
2243
2244const char *get_mgmt_string(int cmd)
2245{
2246 switch (cmd) {
2247 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2248 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2249 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2250 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2251 IWL_CMD(MANAGEMENT_PROBE_REQ);
2252 IWL_CMD(MANAGEMENT_PROBE_RESP);
2253 IWL_CMD(MANAGEMENT_BEACON);
2254 IWL_CMD(MANAGEMENT_ATIM);
2255 IWL_CMD(MANAGEMENT_DISASSOC);
2256 IWL_CMD(MANAGEMENT_AUTH);
2257 IWL_CMD(MANAGEMENT_DEAUTH);
2258 IWL_CMD(MANAGEMENT_ACTION);
2259 default:
2260 return "UNKNOWN";
2261
2262 }
2263}
2264
2265const char *get_ctrl_string(int cmd)
2266{
2267 switch (cmd) {
2268 IWL_CMD(CONTROL_BACK_REQ);
2269 IWL_CMD(CONTROL_BACK);
2270 IWL_CMD(CONTROL_PSPOLL);
2271 IWL_CMD(CONTROL_RTS);
2272 IWL_CMD(CONTROL_CTS);
2273 IWL_CMD(CONTROL_ACK);
2274 IWL_CMD(CONTROL_CFEND);
2275 IWL_CMD(CONTROL_CFENDACK);
2276 default:
2277 return "UNKNOWN";
2278
2279 }
2280}
2281
7163b8a4 2282void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG
2283{
2284 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2285 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2286 priv->led_tpt = 0;
22fdf3c9
WYG
2287}
2288
2289/*
2290 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2291 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2292 * Use debugFs to display the rx/rx_statistics
2293 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2294 * information will be recorded, but DATA pkt still will be recorded
2295 * for the reason of iwl_led.c need to control the led blinking based on
2296 * number of tx and rx data.
2297 *
2298 */
2299void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2300{
2301 struct traffic_stats *stats;
2302
2303 if (is_tx)
2304 stats = &priv->tx_stats;
2305 else
2306 stats = &priv->rx_stats;
2307
2308 if (ieee80211_is_mgmt(fc)) {
2309 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2310 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2311 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2312 break;
2313 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2314 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2315 break;
2316 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2317 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2318 break;
2319 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2320 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2321 break;
2322 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2323 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2324 break;
2325 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2326 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2327 break;
2328 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2329 stats->mgmt[MANAGEMENT_BEACON]++;
2330 break;
2331 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2332 stats->mgmt[MANAGEMENT_ATIM]++;
2333 break;
2334 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2335 stats->mgmt[MANAGEMENT_DISASSOC]++;
2336 break;
2337 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2338 stats->mgmt[MANAGEMENT_AUTH]++;
2339 break;
2340 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2341 stats->mgmt[MANAGEMENT_DEAUTH]++;
2342 break;
2343 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2344 stats->mgmt[MANAGEMENT_ACTION]++;
2345 break;
2346 }
2347 } else if (ieee80211_is_ctl(fc)) {
2348 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2349 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2350 stats->ctrl[CONTROL_BACK_REQ]++;
2351 break;
2352 case cpu_to_le16(IEEE80211_STYPE_BACK):
2353 stats->ctrl[CONTROL_BACK]++;
2354 break;
2355 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2356 stats->ctrl[CONTROL_PSPOLL]++;
2357 break;
2358 case cpu_to_le16(IEEE80211_STYPE_RTS):
2359 stats->ctrl[CONTROL_RTS]++;
2360 break;
2361 case cpu_to_le16(IEEE80211_STYPE_CTS):
2362 stats->ctrl[CONTROL_CTS]++;
2363 break;
2364 case cpu_to_le16(IEEE80211_STYPE_ACK):
2365 stats->ctrl[CONTROL_ACK]++;
2366 break;
2367 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2368 stats->ctrl[CONTROL_CFEND]++;
2369 break;
2370 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2371 stats->ctrl[CONTROL_CFENDACK]++;
2372 break;
2373 }
2374 } else {
2375 /* data */
2376 stats->data_cnt++;
2377 stats->data_bytes += len;
2378 }
d5f4cf71 2379 iwl_leds_background(priv);
22fdf3c9
WYG
2380}
2381EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG
2382#endif
2383
a0ea9493 2384static const char *get_csr_string(int cmd)
696bdee3
WYG
2385{
2386 switch (cmd) {
2387 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2388 IWL_CMD(CSR_INT_COALESCING);
2389 IWL_CMD(CSR_INT);
2390 IWL_CMD(CSR_INT_MASK);
2391 IWL_CMD(CSR_FH_INT_STATUS);
2392 IWL_CMD(CSR_GPIO_IN);
2393 IWL_CMD(CSR_RESET);
2394 IWL_CMD(CSR_GP_CNTRL);
2395 IWL_CMD(CSR_HW_REV);
2396 IWL_CMD(CSR_EEPROM_REG);
2397 IWL_CMD(CSR_EEPROM_GP);
2398 IWL_CMD(CSR_OTP_GP_REG);
2399 IWL_CMD(CSR_GIO_REG);
2400 IWL_CMD(CSR_GP_UCODE_REG);
2401 IWL_CMD(CSR_GP_DRIVER_REG);
2402 IWL_CMD(CSR_UCODE_DRV_GP1);
2403 IWL_CMD(CSR_UCODE_DRV_GP2);
2404 IWL_CMD(CSR_LED_REG);
2405 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2406 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2407 IWL_CMD(CSR_ANA_PLL_CFG);
2408 IWL_CMD(CSR_HW_REV_WA_REG);
2409 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2410 default:
2411 return "UNKNOWN";
2412
2413 }
2414}
2415
2416void iwl_dump_csr(struct iwl_priv *priv)
2417{
2418 int i;
2419 u32 csr_tbl[] = {
2420 CSR_HW_IF_CONFIG_REG,
2421 CSR_INT_COALESCING,
2422 CSR_INT,
2423 CSR_INT_MASK,
2424 CSR_FH_INT_STATUS,
2425 CSR_GPIO_IN,
2426 CSR_RESET,
2427 CSR_GP_CNTRL,
2428 CSR_HW_REV,
2429 CSR_EEPROM_REG,
2430 CSR_EEPROM_GP,
2431 CSR_OTP_GP_REG,
2432 CSR_GIO_REG,
2433 CSR_GP_UCODE_REG,
2434 CSR_GP_DRIVER_REG,
2435 CSR_UCODE_DRV_GP1,
2436 CSR_UCODE_DRV_GP2,
2437 CSR_LED_REG,
2438 CSR_DRAM_INT_TBL_REG,
2439 CSR_GIO_CHICKEN_BITS,
2440 CSR_ANA_PLL_CFG,
2441 CSR_HW_REV_WA_REG,
2442 CSR_DBG_HPET_MEM_REG
2443 };
2444 IWL_ERR(priv, "CSR values:\n");
2445 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2446 "CSR_INT_PERIODIC_REG)\n");
2447 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2448 IWL_ERR(priv, " %25s: 0X%08x\n",
2449 get_csr_string(csr_tbl[i]),
2450 iwl_read32(priv, csr_tbl[i]));
2451 }
2452}
2453EXPORT_SYMBOL(iwl_dump_csr);
2454
a0ea9493 2455static const char *get_fh_string(int cmd)
1b3eb823
WYG
2456{
2457 switch (cmd) {
2458 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2459 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2460 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2461 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2462 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2463 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2464 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2465 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2466 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2467 default:
2468 return "UNKNOWN";
2469
2470 }
2471}
2472
2473int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2474{
2475 int i;
2476#ifdef CONFIG_IWLWIFI_DEBUG
2477 int pos = 0;
2478 size_t bufsz = 0;
2479#endif
2480 u32 fh_tbl[] = {
2481 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2482 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2483 FH_RSCSR_CHNL0_WPTR,
2484 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2485 FH_MEM_RSSR_SHARED_CTRL_REG,
2486 FH_MEM_RSSR_RX_STATUS_REG,
2487 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2488 FH_TSSR_TX_STATUS_REG,
2489 FH_TSSR_TX_ERROR_REG
2490 };
2491#ifdef CONFIG_IWLWIFI_DEBUG
2492 if (display) {
2493 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2494 *buf = kmalloc(bufsz, GFP_KERNEL);
2495 if (!*buf)
2496 return -ENOMEM;
2497 pos += scnprintf(*buf + pos, bufsz - pos,
2498 "FH register values:\n");
2499 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2500 pos += scnprintf(*buf + pos, bufsz - pos,
2501 " %34s: 0X%08x\n",
2502 get_fh_string(fh_tbl[i]),
2503 iwl_read_direct32(priv, fh_tbl[i]));
2504 }
2505 return pos;
2506 }
2507#endif
2508 IWL_ERR(priv, "FH register values:\n");
2509 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2510 IWL_ERR(priv, " %34s: 0X%08x\n",
2511 get_fh_string(fh_tbl[i]),
2512 iwl_read_direct32(priv, fh_tbl[i]));
2513 }
2514 return 0;
2515}
2516EXPORT_SYMBOL(iwl_dump_fh);
2517
a93e7973 2518static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG
2519{
2520 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2521 return;
2522
2523 if (!iwl_is_associated(priv)) {
2524 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2525 return;
2526 }
2527 /*
2528 * There is no easy and better way to force reset the radio,
2529 * the only known method is switching channel which will force to
2530 * reset and tune the radio.
2531 * Use internal short scan (single channel) operation to should
2532 * achieve this objective.
2533 * Driver should reset the radio when number of consecutive missed
2534 * beacon, or any other uCode error condition detected.
2535 */
2536 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2537 iwl_internal_short_hw_scan(priv);
afbdd69a 2538}
a93e7973 2539
a93e7973 2540
c04f9f22 2541int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2542{
8a472da4
WYG
2543 struct iwl_force_reset *force_reset;
2544
a93e7973
WYG
2545 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2546 return -EINVAL;
2547
8a472da4
WYG
2548 if (mode >= IWL_MAX_FORCE_RESET) {
2549 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2550 return -EINVAL;
2551 }
2552 force_reset = &priv->force_reset[mode];
2553 force_reset->reset_request_count++;
c04f9f22
WYG
2554 if (!external) {
2555 if (force_reset->last_force_reset_jiffies &&
2556 time_after(force_reset->last_force_reset_jiffies +
2557 force_reset->reset_duration, jiffies)) {
2558 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2559 force_reset->reset_reject_count++;
2560 return -EAGAIN;
2561 }
a93e7973 2562 }
8a472da4
WYG
2563 force_reset->reset_success_count++;
2564 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2565 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG
2566 switch (mode) {
2567 case IWL_RF_RESET:
2568 iwl_force_rf_reset(priv);
2569 break;
2570 case IWL_FW_RESET:
c04f9f22
WYG
2571 /*
2572 * if the request is from external(ex: debugfs),
2573 * then always perform the request in regardless the module
2574 * parameter setting
2575 * if the request is from internal (uCode error or driver
2576 * detect failure), then fw_restart module parameter
2577 * need to be check before performing firmware reload
2578 */
2579 if (!external && !priv->cfg->mod_params->restart_fw) {
2580 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2581 "module parameter setting\n");
2582 break;
2583 }
a93e7973
WYG
2584 IWL_ERR(priv, "On demand firmware reload\n");
2585 /* Set the FW error flag -- cleared on iwl_down */
2586 set_bit(STATUS_FW_ERROR, &priv->status);
2587 wake_up_interruptible(&priv->wait_command_queue);
2588 /*
2589 * Keep the restart process from trying to send host
2590 * commands by clearing the INIT status bit
2591 */
2592 clear_bit(STATUS_READY, &priv->status);
2593 queue_work(priv->workqueue, &priv->restart);
2594 break;
a93e7973 2595 }
a93e7973
WYG
2596 return 0;
2597}
b74e31a9
WYG
2598EXPORT_SYMBOL(iwl_force_reset);
2599
2600/**
2601 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2602 *
2603 * During normal condition (no queue is stuck), the timer is continually set to
2604 * execute every monitor_recover_period milliseconds after the last timer
2605 * expired. When the queue read_ptr is at the same place, the timer is
2606 * shorten to 100mSecs. This is
2607 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2608 * 2) to detect the stuck queues quicker before the station and AP can
2609 * disassociate each other.
2610 *
2611 * This function monitors all the tx queues and recover from it if any
2612 * of the queues are stuck.
2613 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2614 * it will recover by resetting the firmware and return.
2615 * 2. Then, it checks for station association. If it associates it will check
2616 * other queues. If any queue is stuck, it will recover by resetting
2617 * the firmware.
2618 * Note: It the number of times the queue read_ptr to be at the same place to
2619 * be MAX_REPEAT+1 in order to consider to be stuck.
2620 */
2621/*
2622 * The maximum number of times the read pointer of the tx queue at the
2623 * same place without considering to be stuck.
2624 */
2625#define MAX_REPEAT (2)
2626static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2627{
2628 struct iwl_tx_queue *txq;
2629 struct iwl_queue *q;
2630
2631 txq = &priv->txq[cnt];
2632 q = &txq->q;
2633 /* queue is empty, skip */
2634 if (q->read_ptr != q->write_ptr) {
2635 if (q->read_ptr == q->last_read_ptr) {
2636 /* a queue has not been read from last time */
2637 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2638 IWL_ERR(priv,
2639 "queue %d stuck %d time. Fw reload.\n",
2640 q->id, q->repeat_same_read_ptr);
2641 q->repeat_same_read_ptr = 0;
c04f9f22 2642 iwl_force_reset(priv, IWL_FW_RESET, false);
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WYG
2643 } else {
2644 q->repeat_same_read_ptr++;
2645 IWL_DEBUG_RADIO(priv,
2646 "queue %d, not read %d time\n",
2647 q->id,
2648 q->repeat_same_read_ptr);
2649 mod_timer(&priv->monitor_recover, jiffies +
2650 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2651 }
2652 return 1;
2653 } else {
2654 q->last_read_ptr = q->read_ptr;
2655 q->repeat_same_read_ptr = 0;
2656 }
2657 }
2658 return 0;
2659}
2660
2661void iwl_bg_monitor_recover(unsigned long data)
2662{
2663 struct iwl_priv *priv = (struct iwl_priv *)data;
2664 int cnt;
2665
2666 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2667 return;
2668
2669 /* monitor and check for stuck cmd queue */
2670 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2671 return;
2672
2673 /* monitor and check for other stuck queues */
2674 if (iwl_is_associated(priv)) {
2675 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2676 /* skip as we already checked the command queue */
2677 if (cnt == IWL_CMD_QUEUE_NUM)
2678 continue;
2679 if (iwl_check_stuck_queue(priv, cnt))
2680 return;
2681 }
2682 }
2683 /*
2684 * Reschedule the timer to occur in
2685 * priv->cfg->monitor_recover_period
2686 */
2687 mod_timer(&priv->monitor_recover,
2688 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2689}
2690EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2691
a0ee74cf
WYG
2692
2693/*
2694 * extended beacon time format
2695 * time in usec will be changed into a 32-bit value in extended:internal format
2696 * the extended part is the beacon counts
2697 * the internal part is the time in usec within one beacon interval
2698 */
2699u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2700{
2701 u32 quot;
2702 u32 rem;
2703 u32 interval = beacon_interval * TIME_UNIT;
2704
2705 if (!interval || !usec)
2706 return 0;
2707
2708 quot = (usec / interval) &
2709 (iwl_beacon_time_mask_high(priv,
2710 priv->hw_params.beacon_time_tsf_bits) >>
2711 priv->hw_params.beacon_time_tsf_bits);
2712 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2713 priv->hw_params.beacon_time_tsf_bits);
2714
2715 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2716}
2717EXPORT_SYMBOL(iwl_usecs_to_beacons);
2718
2719/* base is usually what we get from ucode with each received frame,
2720 * the same as HW timer counter counting down
2721 */
2722__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2723 u32 addon, u32 beacon_interval)
2724{
2725 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2726 priv->hw_params.beacon_time_tsf_bits);
2727 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2728 priv->hw_params.beacon_time_tsf_bits);
2729 u32 interval = beacon_interval * TIME_UNIT;
2730 u32 res = (base & iwl_beacon_time_mask_high(priv,
2731 priv->hw_params.beacon_time_tsf_bits)) +
2732 (addon & iwl_beacon_time_mask_high(priv,
2733 priv->hw_params.beacon_time_tsf_bits));
2734
2735 if (base_low > addon_low)
2736 res += base_low - addon_low;
2737 else if (base_low < addon_low) {
2738 res += interval + base_low - addon_low;
2739 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2740 } else
2741 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2742
2743 return cpu_to_le32(res);
2744}
2745EXPORT_SYMBOL(iwl_add_beacon_time);
2746
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2747#ifdef CONFIG_PM
2748
2749int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2750{
2751 struct iwl_priv *priv = pci_get_drvdata(pdev);
2752
2753 /*
2754 * This function is called when system goes into suspend state
2755 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2756 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2757 * it will not call apm_ops.stop() to stop the DMA operation.
2758 * Calling apm_ops.stop here to make sure we stop the DMA.
2759 */
2760 priv->cfg->ops->lib->apm_ops.stop(priv);
2761
2762 pci_save_state(pdev);
2763 pci_disable_device(pdev);
2764 pci_set_power_state(pdev, PCI_D3hot);
2765
2766 return 0;
2767}
2768EXPORT_SYMBOL(iwl_pci_suspend);
2769
2770int iwl_pci_resume(struct pci_dev *pdev)
2771{
2772 struct iwl_priv *priv = pci_get_drvdata(pdev);
2773 int ret;
0ab84cff 2774 bool hw_rfkill = false;
6da3a13e 2775
cd398c31
AK
2776 /*
2777 * We disable the RETRY_TIMEOUT register (0x41) to keep
2778 * PCI Tx retries from interfering with C3 CPU state.
2779 */
2780 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2781
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2782 pci_set_power_state(pdev, PCI_D0);
2783 ret = pci_enable_device(pdev);
2784 if (ret)
2785 return ret;
2786 pci_restore_state(pdev);
2787 iwl_enable_interrupts(priv);
2788
0ab84cff
JB
2789 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2790 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2791 hw_rfkill = true;
2792
2793 if (hw_rfkill)
2794 set_bit(STATUS_RF_KILL_HW, &priv->status);
2795 else
2796 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2797
2798 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2799
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2800 return 0;
2801}
2802EXPORT_SYMBOL(iwl_pci_resume);
2803
2804#endif /* CONFIG_PM */
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