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iwlwifi: send PAN parameters
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
670245ed
JB		 67bool bt_coex_active = true;
68EXPORT_SYMBOL_GPL(bt_coex_active);
06702a73 69module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 70MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 71
c7de35cd
RR		 72#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
73 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
74 IWL_RATE_SISO_##s##M_PLCP, \
75 IWL_RATE_MIMO2_##s##M_PLCP,\
76 IWL_RATE_MIMO3_##s##M_PLCP,\
77 IWL_RATE_##r##M_IEEE, \
78 IWL_RATE_##ip##M_INDEX, \
79 IWL_RATE_##in##M_INDEX, \
80 IWL_RATE_##rp##M_INDEX, \
81 IWL_RATE_##rn##M_INDEX, \
82 IWL_RATE_##pp##M_INDEX, \
83 IWL_RATE_##np##M_INDEX }
84
a562a9dd
RC		 85u32 iwl_debug_level;
86EXPORT_SYMBOL(iwl_debug_level);
87
c7de35cd
RR		 88/*
89 * Parameter order:
90 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
91 *
92 * If there isn't a valid next or previous rate then INV is used which
93 * maps to IWL_RATE_INVALID
94 *
95 */
1826dcc0 96const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 97 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
98 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
99 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
100 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
101 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
102 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
103 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
104 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
105 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
106 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
107 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
108 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
109 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
110 /* FIXME:RS: ^^ should be INV (legacy) */
111};
1826dcc0 112EXPORT_SYMBOL(iwl_rates);
c7de35cd 113
e7d326ac
TW		 114int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
115{
116 int idx = 0;
117
118 /* HT rate format */
119 if (rate_n_flags & RATE_MCS_HT_MSK) {
120 idx = (rate_n_flags & 0xff);
121
60d32215
DH		 122 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
123 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
124 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 125 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
126
127 idx += IWL_FIRST_OFDM_RATE;
128 /* skip 9M not supported in ht*/
129 if (idx >= IWL_RATE_9M_INDEX)
130 idx += 1;
131 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
132 return idx;
133
134 /* legacy rate format, search for match in table */
135 } else {
136 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
137 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
138 return idx;
139 }
140
141 return -1;
142}
143EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
144
0e1654fa 145u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW		 146{
147 int i;
148 u8 ind = ant;
0e1654fa 149
bd6e2d57
JB		 150 if (priv->band == IEEE80211_BAND_2GHZ &&
151 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
152 return 0;
153
76eff18b
TW		 154 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
155 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 156 if (valid & BIT(ind))
76eff18b
TW		 157 return ind;
158 }
159 return ant;
160}
47ff65c4 161EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 162
163const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
164EXPORT_SYMBOL(iwl_bcast_addr);
165
166
1d0a082d
AK		 167/* This function both allocates and initializes hw and priv. */
168struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
169 struct ieee80211_ops *hw_ops)
170{
171 struct iwl_priv *priv;
172
173 /* mac80211 allocates memory for this device instance, including
174 * space for this driver's private structure */
175 struct ieee80211_hw *hw =
176 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
177 if (hw == NULL) {
c96c31e4 178 pr_err("%s: Can not allocate network device\n",
a3139c59 179 cfg->name);
1d0a082d
AK		 180 goto out;
181 }
182
183 priv = hw->priv;
184 priv->hw = hw;
185
186out:
187 return hw;
188}
189EXPORT_SYMBOL(iwl_alloc_all);
190
14d2aac5
AK		 191/*
192 * QoS support
193*/
8dfdb9d5 194static void iwl_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
14d2aac5
AK		 195{
196 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
197 return;
198
8dfdb9d5 199 ctx->qos_data.def_qos_parm.qos_flags = 0;
14d2aac5 200
8dfdb9d5
JB		 201 if (ctx->qos_data.qos_active)
202 ctx->qos_data.def_qos_parm.qos_flags |=
14d2aac5
AK		 203 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
204
7e6a5886 205 if (ctx->ht.enabled)
8dfdb9d5 206 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
14d2aac5 207
e61146e3 208 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
8dfdb9d5
JB		 209 ctx->qos_data.qos_active,
210 ctx->qos_data.def_qos_parm.qos_flags);
14d2aac5 211
8dfdb9d5 212 iwl_send_cmd_pdu_async(priv, ctx->qos_cmd,
e61146e3 213 sizeof(struct iwl_qosparam_cmd),
8dfdb9d5 214 &ctx->qos_data.def_qos_parm, NULL);
14d2aac5 215}
c7de35cd 216
d9fe60de
JB		 217#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
218#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 219static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 220 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 221 enum ieee80211_band band)
222{
39130df3
RR		 223 u16 max_bit_rate = 0;
224 u8 rx_chains_num = priv->hw_params.rx_chains_num;
225 u8 tx_chains_num = priv->hw_params.tx_chains_num;
226
c7de35cd 227 ht_info->cap = 0;
d9fe60de 228 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 229
d9fe60de 230 ht_info->ht_supported = true;
c7de35cd 231
b261793d
DH		 232 if (priv->cfg->ht_greenfield_support)
233 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 234 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 235 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 236 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 237 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
238 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
239 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 240 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 241 }
c7de35cd
RR		 242
243 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 244 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 245
246 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
172c1d11
WYG		 247 if (priv->cfg->ampdu_factor)
248 ht_info->ampdu_factor = priv->cfg->ampdu_factor;
c7de35cd 249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
172c1d11
WYG		 250 if (priv->cfg->ampdu_density)
251 ht_info->ampdu_density = priv->cfg->ampdu_density;
c7de35cd 252
d9fe60de 253 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 254 if (rx_chains_num >= 2)
d9fe60de 255 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 256 if (rx_chains_num >= 3)
d9fe60de 257 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 258
259 /* Highest supported Rx data rate */
260 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 261 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
262 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 263
264 /* Tx MCS capabilities */
d9fe60de 265 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 266 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 267 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
268 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
269 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 270 }
c7de35cd 271}
c7de35cd 272
c7de35cd
RR		 273/**
274 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
275 */
534166de 276int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 277{
278 struct iwl_channel_info *ch;
279 struct ieee80211_supported_band *sband;
280 struct ieee80211_channel *channels;
281 struct ieee80211_channel *geo_ch;
282 struct ieee80211_rate *rates;
283 int i = 0;
284
285 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
286 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 287 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 288 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
289 return 0;
290 }
291
292 channels = kzalloc(sizeof(struct ieee80211_channel) *
293 priv->channel_count, GFP_KERNEL);
294 if (!channels)
295 return -ENOMEM;
296
5027309b 297 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 298 GFP_KERNEL);
299 if (!rates) {
300 kfree(channels);
301 return -ENOMEM;
302 }
303
304 /* 5.2GHz channels start after the 2.4GHz channels */
305 sband = &priv->bands[IEEE80211_BAND_5GHZ];
306 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
307 /* just OFDM */
308 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 309 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 310
49779293 311 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 312 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 313 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 314
315 sband = &priv->bands[IEEE80211_BAND_2GHZ];
316 sband->channels = channels;
317 /* OFDM & CCK */
318 sband->bitrates = rates;
5027309b 319 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 320
49779293 321 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 322 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 323 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 324
325 priv->ieee_channels = channels;
326 priv->ieee_rates = rates;
327
c7de35cd
RR		 328 for (i = 0; i < priv->channel_count; i++) {
329 ch = &priv->channel_info[i];
330
331 /* FIXME: might be removed if scan is OK */
332 if (!is_channel_valid(ch))
333 continue;
334
335 if (is_channel_a_band(ch))
336 sband = &priv->bands[IEEE80211_BAND_5GHZ];
337 else
338 sband = &priv->bands[IEEE80211_BAND_2GHZ];
339
340 geo_ch = &sband->channels[sband->n_channels++];
341
342 geo_ch->center_freq =
343 ieee80211_channel_to_frequency(ch->channel);
344 geo_ch->max_power = ch->max_power_avg;
345 geo_ch->max_antenna_gain = 0xff;
346 geo_ch->hw_value = ch->channel;
347
348 if (is_channel_valid(ch)) {
349 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
350 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
351
352 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
353 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
354
355 if (ch->flags & EEPROM_CHANNEL_RADAR)
356 geo_ch->flags |= IEEE80211_CHAN_RADAR;
357
7aafef1c 358 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 359
dc1b0973
WYG		 360 if (ch->max_power_avg > priv->tx_power_device_lmt)
361 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 362 } else {
363 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
364 }
365
e1623446 366 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 367 ch->channel, geo_ch->center_freq,
368 is_channel_a_band(ch) ? "5.2" : "2.4",
369 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
370 "restricted" : "valid",
371 geo_ch->flags);
372 }
373
374 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
375 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 376 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
377 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 378 priv->pci_dev->device,
379 priv->pci_dev->subsystem_device);
c7de35cd
RR		 380 priv->cfg->sku &= ~IWL_SKU_A;
381 }
382
978785a3 383 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 384 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
385 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 386
387 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
388
389 return 0;
390}
534166de 391EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 392
393/*
394 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
395 */
534166de 396void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 397{
398 kfree(priv->ieee_channels);
399 kfree(priv->ieee_rates);
400 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
401}
534166de 402EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 403
37dc70fe 404/*
94597ab2 405 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK		 406 * function.
407 */
94597ab2
JB		 408void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
409 struct ieee80211_tx_info *info,
410 __le16 fc, __le32 *tx_flags)
37dc70fe
AK		 411{
412 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
413 *tx_flags |= TX_CMD_FLG_RTS_MSK;
414 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB		 415 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
416
417 if (!ieee80211_is_mgmt(fc))
418 return;
419
420 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
421 case cpu_to_le16(IEEE80211_STYPE_AUTH):
422 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
423 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
424 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
425 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
426 *tx_flags |= TX_CMD_FLG_CTS_MSK;
427 break;
428 }
37dc70fe
AK		 429 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
430 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
431 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 432 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK		 433 }
434}
94597ab2
JB		 435EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
436
37dc70fe 437
28a6b07a 438static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 439{
ba37a3d0 440 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 441 priv->current_ht_config.single_chain_sufficient;
c7de35cd 442}
963f5517 443
7e6a5886
JB		 444static bool iwl_is_channel_extension(struct iwl_priv *priv,
445 enum ieee80211_band band,
446 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 447{
448 const struct iwl_channel_info *ch_info;
449
450 ch_info = iwl_get_channel_info(priv, band, channel);
451 if (!is_channel_valid(ch_info))
7e6a5886 452 return false;
47c5196e 453
d9fe60de 454 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 455 return !(ch_info->ht40_extension_channel &
689da1b3 456 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 457 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 458 return !(ch_info->ht40_extension_channel &
689da1b3 459 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 460
7e6a5886 461 return false;
47c5196e
TW		 462}
463
7e6a5886
JB		 464bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
465 struct iwl_rxon_context *ctx,
466 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 467{
7e6a5886
JB		 468 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
469 return false;
47c5196e 470
7e6a5886
JB		 471 /*
472 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 473 * the bit will not set if it is pure 40MHz case
474 */
7e6a5886
JB		 475 if (ht_cap && !ht_cap->ht_supported)
476 return false;
477
d73e4923 478#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 479 if (priv->disable_ht40)
7e6a5886 480 return false;
1e4247d4 481#endif
7e6a5886 482
611d3eb7 483 return iwl_is_channel_extension(priv, priv->band,
246ed355 484 le16_to_cpu(ctx->staging.channel),
7e6a5886 485 ctx->ht.extension_chan_offset);
47c5196e 486}
7aafef1c 487EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 488
2c2f3b33
TW		 489static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
490{
491 u16 new_val = 0;
492 u16 beacon_factor = 0;
493
494 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
495 new_val = beacon_val / beacon_factor;
496
497 if (!new_val)
498 new_val = max_beacon_val;
499
500 return new_val;
501}
502
948f5a2f 503int iwl_send_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW		 504{
505 u64 tsf;
506 s32 interval_tm, rem;
2c2f3b33
TW		 507 struct ieee80211_conf *conf = NULL;
508 u16 beacon_int;
246ed355 509 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
2c2f3b33
TW		 510
511 conf = ieee80211_get_hw_conf(priv->hw);
512
948f5a2f
JB		 513 lockdep_assert_held(&priv->mutex);
514
246ed355 515 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 516
246ed355
JB		 517 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
518 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 519
1dda6d28 520 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 521
1dda6d28 522 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW		 523 /* TODO: we need to get atim_window from upper stack
524 * for now we set to 0 */
246ed355 525 ctx->timing.atim_window = 0;
1dda6d28 526 } else {
246ed355 527 ctx->timing.atim_window = 0;
2c2f3b33
TW		 528 }
529
530 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 531 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
246ed355 532 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
2c2f3b33
TW		 533
534 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 535 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 536 rem = do_div(tsf, interval_tm);
246ed355 537 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 538
2491fa42
JB		 539 ctx->timing.dtim_period = vif->bss_conf.dtim_period;
540
2c2f3b33
TW		 541 IWL_DEBUG_ASSOC(priv,
542 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 543 le16_to_cpu(ctx->timing.beacon_interval),
544 le32_to_cpu(ctx->timing.beacon_init_val),
545 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 546
8f2d3d2a 547 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 548 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 549}
948f5a2f 550EXPORT_SYMBOL(iwl_send_rxon_timing);
2c2f3b33 551
246ed355
JB		 552void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
553 int hw_decrypt)
8ccde88a 554{
246ed355 555 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 556
557 if (hw_decrypt)
558 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
559 else
560 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
561
562}
563EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
564
565/**
566 * iwl_check_rxon_cmd - validate RXON structure is valid
567 *
568 * NOTE: This is really only useful during development and can eventually
569 * be #ifdef'd out once the driver is stable and folks aren't actively
570 * making changes
571 */
246ed355 572int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a
SO		 573{
574 int error = 0;
575 int counter = 1;
246ed355 576 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 577
578 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
579 error |= le32_to_cpu(rxon->flags &
580 (RXON_FLG_TGJ_NARROW_BAND_MSK |
581 RXON_FLG_RADAR_DETECT_MSK));
582 if (error)
583 IWL_WARN(priv, "check 24G fields %d | %d\n",
584 counter++, error);
585 } else {
586 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
587 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
588 if (error)
589 IWL_WARN(priv, "check 52 fields %d | %d\n",
590 counter++, error);
591 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
592 if (error)
593 IWL_WARN(priv, "check 52 CCK %d | %d\n",
594 counter++, error);
595 }
596 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
597 if (error)
598 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
599
600 /* make sure basic rates 6Mbps and 1Mbps are supported */
601 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
602 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
603 if (error)
604 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
605
606 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
607 if (error)
608 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
609
610 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
611 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
612 if (error)
613 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
614 counter++, error);
615
616 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
617 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
618 if (error)
619 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
620 counter++, error);
621
622 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
623 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
624 if (error)
625 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
626 counter++, error);
627
628 if (error)
629 IWL_WARN(priv, "Tuning to channel %d\n",
630 le16_to_cpu(rxon->channel));
631
632 if (error) {
633 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
634 return -1;
635 }
636 return 0;
637}
638EXPORT_SYMBOL(iwl_check_rxon_cmd);
639
640/**
641 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
642 * @priv: staging_rxon is compared to active_rxon
643 *
644 * If the RXON structure is changing enough to require a new tune,
645 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
646 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
647 */
246ed355
JB		 648int iwl_full_rxon_required(struct iwl_priv *priv,
649 struct iwl_rxon_context *ctx)
8ccde88a 650{
246ed355
JB		 651 const struct iwl_rxon_cmd *staging = &ctx->staging;
652 const struct iwl_rxon_cmd *active = &ctx->active;
653
654#define CHK(cond) \
655 if ((cond)) { \
656 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
657 return 1; \
658 }
659
660#define CHK_NEQ(c1, c2) \
661 if ((c1) != (c2)) { \
662 IWL_DEBUG_INFO(priv, "need full RXON - " \
663 #c1 " != " #c2 " - %d != %d\n", \
664 (c1), (c2)); \
665 return 1; \
666 }
8ccde88a
SO		 667
668 /* These items are only settable from the full RXON command */
246ed355
JB		 669 CHK(!iwl_is_associated_ctx(ctx));
670 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
671 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
672 CHK(compare_ether_addr(staging->wlap_bssid_addr,
673 active->wlap_bssid_addr));
674 CHK_NEQ(staging->dev_type, active->dev_type);
675 CHK_NEQ(staging->channel, active->channel);
676 CHK_NEQ(staging->air_propagation, active->air_propagation);
677 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
678 active->ofdm_ht_single_stream_basic_rates);
679 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
680 active->ofdm_ht_dual_stream_basic_rates);
681 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
682 active->ofdm_ht_triple_stream_basic_rates);
683 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 684
685 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
686 * be updated with the RXON_ASSOC command -- however only some
687 * flag transitions are allowed using RXON_ASSOC */
688
689 /* Check if we are not switching bands */
246ed355
JB		 690 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
691 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 692
693 /* Check if we are switching association toggle */
246ed355
JB		 694 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
695 active->filter_flags & RXON_FILTER_ASSOC_MSK);
696
697#undef CHK
698#undef CHK_NEQ
8ccde88a
SO		 699
700 return 0;
701}
702EXPORT_SYMBOL(iwl_full_rxon_required);
703
76d04815
JB		 704u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
705 struct iwl_rxon_context *ctx)
8ccde88a 706{
4a02886b
JB		 707 /*
708 * Assign the lowest rate -- should really get this from
709 * the beacon skb from mac80211.
710 */
246ed355 711 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO		 712 return IWL_RATE_1M_PLCP;
713 else
714 return IWL_RATE_6M_PLCP;
715}
716EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
717
246ed355
JB		 718static void _iwl_set_rxon_ht(struct iwl_priv *priv,
719 struct iwl_ht_config *ht_conf,
720 struct iwl_rxon_context *ctx)
47c5196e 721{
246ed355 722 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 723
7e6a5886 724 if (!ctx->ht.enabled) {
a2b0f02e 725 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 726 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 727 RXON_FLG_HT40_PROT_MSK |
42eb7c64 728 RXON_FLG_HT_PROT_MSK);
47c5196e 729 return;
42eb7c64 730 }
47c5196e 731
7e6a5886 732 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 733 * will be needed for rxon->flags
734 */
7e6a5886 735 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 736
737 /* Set up channel bandwidth:
7aafef1c 738 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 739 /* clear the HT channel mode before set the mode */
740 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
741 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 742 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 743 /* pure ht40 */
7e6a5886 744 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 745 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 746 /* Note: control channel is opposite of extension channel */
7e6a5886 747 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 748 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
749 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
750 break;
751 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
752 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
753 break;
754 }
755 } else {
a2b0f02e 756 /* Note: control channel is opposite of extension channel */
7e6a5886 757 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 758 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
759 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
760 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
761 break;
762 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
763 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
764 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
765 break;
766 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
767 default:
768 /* channel location only valid if in Mixed mode */
769 IWL_ERR(priv, "invalid extension channel offset\n");
770 break;
771 }
772 }
773 } else {
774 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 775 }
776
45823531 777 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 778 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 779
02bb1bea 780 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 781 "extension channel offset 0x%x\n",
7e6a5886
JB		 782 le32_to_cpu(rxon->flags), ctx->ht.protection,
783 ctx->ht.extension_chan_offset);
47c5196e 784}
246ed355
JB		 785
786void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
787{
788 struct iwl_rxon_context *ctx;
789
790 for_each_context(priv, ctx)
791 _iwl_set_rxon_ht(priv, ht_conf, ctx);
792}
47c5196e
TW		 793EXPORT_SYMBOL(iwl_set_rxon_ht);
794
9e5e6c32
TW		 795#define IWL_NUM_RX_CHAINS_MULTIPLE 3
796#define IWL_NUM_RX_CHAINS_SINGLE 2
797#define IWL_NUM_IDLE_CHAINS_DUAL 2
798#define IWL_NUM_IDLE_CHAINS_SINGLE 1
799
2b396a12
JB		 800/*
801 * Determine how many receiver/antenna chains to use.
802 *
803 * More provides better reception via diversity. Fewer saves power
804 * at the expense of throughput, but only when not in powersave to
805 * start with.
806 *
c7de35cd
RR		 807 * MIMO (dual stream) requires at least 2, but works better with 3.
808 * This does not determine *which* chains to use, just how many.
809 */
28a6b07a 810static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 811{
da5dbb97
WYG		 812 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
813 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
814 /*
815 * only use chain 'A' in bt high traffic load or
816 * full concurrency mode
817 */
bee008b7
WYG		 818 return IWL_NUM_RX_CHAINS_SINGLE;
819 }
c7de35cd 820 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 821 if (is_single_rx_stream(priv))
9e5e6c32 822 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 823 else
9e5e6c32 824 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 825}
c7de35cd 826
2b396a12 827/*
3f3e0376
WYG		 828 * When we are in power saving mode, unless device support spatial
829 * multiplexing power save, use the active count for rx chain count.
2b396a12 830 */
28a6b07a
TW		 831static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
832{
ba37a3d0
JB		 833 /* # Rx chains when idling, depending on SMPS mode */
834 switch (priv->current_ht_config.smps) {
835 case IEEE80211_SMPS_STATIC:
836 case IEEE80211_SMPS_DYNAMIC:
837 return IWL_NUM_IDLE_CHAINS_SINGLE;
838 case IEEE80211_SMPS_OFF:
839 return active_cnt;
c15d20c1 840 default:
ba37a3d0
JB		 841 WARN(1, "invalid SMPS mode %d",
842 priv->current_ht_config.smps);
843 return active_cnt;
3f3e0376 844 }
c7de35cd
RR		 845}
846
04816448
GE		 847/* up to 4 chains */
848static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
849{
850 u8 res;
851 res = (chain_bitmap & BIT(0)) >> 0;
852 res += (chain_bitmap & BIT(1)) >> 1;
853 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 854 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 855 return res;
856}
857
c7de35cd
RR		 858/**
859 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
860 *
861 * Selects how many and which Rx receivers/antennas/chains to use.
862 * This should not be used for scan command ... it puts data in wrong place.
863 */
246ed355 864void iwl_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
c7de35cd 865{
28a6b07a
TW		 866 bool is_single = is_single_rx_stream(priv);
867 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 868 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
869 u32 active_chains;
28a6b07a 870 u16 rx_chain;
c7de35cd
RR		 871
872 /* Tell uCode which antennas are actually connected.
873 * Before first association, we assume all antennas are connected.
874 * Just after first association, iwl_chain_noise_calibration()
875 * checks which antennas actually *are* connected. */
bee008b7 876 if (priv->chain_noise_data.active_chains)
04816448
GE		 877 active_chains = priv->chain_noise_data.active_chains;
878 else
879 active_chains = priv->hw_params.valid_rx_ant;
880
da5dbb97
WYG		 881 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
882 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
883 /*
884 * only use chain 'A' in bt high traffic load or
885 * full concurrency mode
886 */
bee008b7
WYG		 887 active_chains = first_antenna(active_chains);
888 }
889
04816448 890 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 891
892 /* How many receivers should we use? */
28a6b07a
TW		 893 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
894 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
895
28a6b07a 896
04816448
GE		 897 /* correct rx chain count according hw settings
898 * and chain noise calibration
899 */
900 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
901 if (valid_rx_cnt < active_rx_cnt)
902 active_rx_cnt = valid_rx_cnt;
903
904 if (valid_rx_cnt < idle_rx_cnt)
905 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 906
907 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
908 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
909
246ed355 910 ctx->staging.rx_chain = cpu_to_le16(rx_chain);
28a6b07a 911
9e5e6c32 912 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
246ed355 913 ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 914 else
246ed355 915 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 916
e1623446 917 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
246ed355 918 ctx->staging.rx_chain,
28a6b07a
TW		 919 active_rx_cnt, idle_rx_cnt);
920
921 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
922 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 923}
924EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 925
246ed355 926/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 927u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 928 enum ieee80211_band band)
14023641
AK		 929{
930 const struct iwl_channel_info *ch_info;
931 int i;
932 u8 channel = 0;
246ed355
JB		 933 u8 min, max;
934 struct iwl_rxon_context *ctx;
14023641 935
14023641 936 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 937 min = 14;
938 max = priv->channel_count;
14023641 939 } else {
246ed355
JB		 940 min = 0;
941 max = 14;
942 }
943
944 for (i = min; i < max; i++) {
945 bool busy = false;
946
947 for_each_context(priv, ctx) {
948 busy = priv->channel_info[i].channel ==
949 le16_to_cpu(ctx->staging.channel);
950 if (busy)
951 break;
14023641 952 }
246ed355
JB		 953
954 if (busy)
955 continue;
956
957 channel = priv->channel_info[i].channel;
958 ch_info = iwl_get_channel_info(priv, band, channel);
959 if (is_channel_valid(ch_info))
960 break;
14023641
AK		 961 }
962
963 return channel;
964}
965EXPORT_SYMBOL(iwl_get_single_channel_number);
966
bf85ea4f 967/**
3edb5fd6
SZ		 968 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
969 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 970
bf85ea4f 971 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 972 * in the staging RXON flag structure based on the ch->band
bf85ea4f 973 */
246ed355
JB		 974int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
975 struct iwl_rxon_context *ctx)
bf85ea4f 976{
17e72782 977 enum ieee80211_band band = ch->band;
81e95430 978 u16 channel = ch->hw_value;
17e72782 979
246ed355 980 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK		 981 (priv->band == band))
982 return 0;
983
246ed355 984 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 985 if (band == IEEE80211_BAND_5GHZ)
246ed355 986 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 987 else
246ed355 988 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 989
990 priv->band = band;
991
e1623446 992 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 993
994 return 0;
995}
c7de35cd 996EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 997
79d07325 998void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 999 struct iwl_rxon_context *ctx,
79d07325
WYG		 1000 enum ieee80211_band band,
1001 struct ieee80211_vif *vif)
8ccde88a
SO		 1002{
1003 if (band == IEEE80211_BAND_5GHZ) {
246ed355 1004 ctx->staging.flags &=
8ccde88a
SO		 1005 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1006 | RXON_FLG_CCK_MSK);
246ed355 1007 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 1008 } else {
1009 /* Copied from iwl_post_associate() */
c213d745 1010 if (vif && vif->bss_conf.use_short_slot)
246ed355 1011 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1012 else
246ed355 1013 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1014
246ed355
JB		 1015 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
1016 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
1017 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 1018 }
1019}
79d07325 1020EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 1021
1022/*
1023 * initialize rxon structure with default values from eeprom
1024 */
1dda6d28
JB		 1025void iwl_connection_init_rx_config(struct iwl_priv *priv,
1026 struct ieee80211_vif *vif)
8ccde88a
SO		 1027{
1028 const struct iwl_channel_info *ch_info;
1dda6d28 1029 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
246ed355 1030 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1dda6d28 1031
246ed355 1032 if (vif) {
1dda6d28 1033 type = vif->type;
246ed355
JB		 1034 ctx = iwl_rxon_ctx_from_vif(vif);
1035 }
8ccde88a 1036
246ed355 1037 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 1038
1dda6d28 1039 switch (type) {
8ccde88a 1040 case NL80211_IFTYPE_AP:
246ed355 1041 ctx->staging.dev_type = RXON_DEV_TYPE_AP;
8ccde88a
SO		 1042 break;
1043
1044 case NL80211_IFTYPE_STATION:
246ed355
JB		 1045 ctx->staging.dev_type = RXON_DEV_TYPE_ESS;
1046 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 1047 break;
1048
1049 case NL80211_IFTYPE_ADHOC:
246ed355
JB		 1050 ctx->staging.dev_type = RXON_DEV_TYPE_IBSS;
1051 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1052 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 1053 RXON_FILTER_ACCEPT_GRP_MSK;
1054 break;
1055
8ccde88a 1056 default:
1dda6d28 1057 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO		 1058 break;
1059 }
1060
1061#if 0
1062 /* TODO: Figure out when short_preamble would be set and cache from
1063 * that */
1064 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 1065 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 1066 else
246ed355 1067 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 1068#endif
1069
1070 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 1071 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 1072
1073 if (!ch_info)
1074 ch_info = &priv->channel_info[0];
1075
246ed355 1076 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 1077 priv->band = ch_info->band;
1078
246ed355 1079 iwl_set_flags_for_band(priv, ctx, priv->band, vif);
8ccde88a 1080
246ed355 1081 ctx->staging.ofdm_basic_rates =
8ccde88a 1082 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 1083 ctx->staging.cck_basic_rates =
8ccde88a
SO		 1084 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1085
a2b0f02e 1086 /* clear both MIX and PURE40 mode flag */
246ed355 1087 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 1088 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408 1089 if (vif)
246ed355 1090 memcpy(ctx->staging.node_addr, vif->addr, ETH_ALEN);
7684c408 1091
246ed355
JB		 1092 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
1093 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
1094 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1095}
1096EXPORT_SYMBOL(iwl_connection_init_rx_config);
1097
79d07325 1098void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1099{
1100 const struct ieee80211_supported_band *hw = NULL;
1101 struct ieee80211_rate *rate;
246ed355 1102 struct iwl_rxon_context *ctx;
8ccde88a
SO		 1103 int i;
1104
1105 hw = iwl_get_hw_mode(priv, priv->band);
1106 if (!hw) {
1107 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1108 return;
1109 }
1110
1111 priv->active_rate = 0;
8ccde88a
SO		 1112
1113 for (i = 0; i < hw->n_bitrates; i++) {
1114 rate = &(hw->bitrates[i]);
5027309b 1115 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1116 priv->active_rate |= (1 << rate->hw_value);
1117 }
1118
4a02886b 1119 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1120
246ed355
JB		 1121 for_each_context(priv, ctx) {
1122 ctx->staging.cck_basic_rates =
1123 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 1124
246ed355
JB		 1125 ctx->staging.ofdm_basic_rates =
1126 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1127 }
8ccde88a 1128}
79d07325
WYG		 1129EXPORT_SYMBOL(iwl_set_rate);
1130
1131void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1132{
8bd413e6
JB		 1133 /*
1134 * MULTI-FIXME
1135 * See iwl_mac_channel_switch.
1136 */
1137 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1138
79d07325
WYG		 1139 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1140 return;
1141
1142 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 1143 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG		 1144 mutex_lock(&priv->mutex);
1145 priv->switch_rxon.switch_in_progress = false;
1146 mutex_unlock(&priv->mutex);
1147 }
1148}
1149EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 1150
1151void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1152{
2f301227 1153 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a 1154 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
8bd413e6
JB		 1155 /*
1156 * MULTI-FIXME
1157 * See iwl_mac_channel_switch.
1158 */
246ed355 1159 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
246ed355 1160 struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
4a56e965 1161
0924e519
WYG		 1162 if (priv->switch_rxon.switch_in_progress) {
1163 if (!le32_to_cpu(csa->status) &&
1164 (csa->channel == priv->switch_rxon.channel)) {
1165 rxon->channel = csa->channel;
246ed355 1166 ctx->staging.channel = csa->channel;
0924e519
WYG		 1167 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1168 le16_to_cpu(csa->channel));
79d07325
WYG		 1169 iwl_chswitch_done(priv, true);
1170 } else {
0924e519
WYG		 1171 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1172 le16_to_cpu(csa->channel));
79d07325
WYG		 1173 iwl_chswitch_done(priv, false);
1174 }
0924e519 1175 }
8ccde88a
SO		 1176}
1177EXPORT_SYMBOL(iwl_rx_csa);
1178
1179#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB		 1180void iwl_print_rx_config_cmd(struct iwl_priv *priv,
1181 struct iwl_rxon_context *ctx)
8ccde88a 1182{
246ed355 1183 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 1184
e1623446 1185 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1186 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1187 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1188 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1189 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1190 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1191 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1192 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1193 rxon->ofdm_basic_rates);
e1623446
TW		 1194 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1195 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1196 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1197 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1198}
a643565e 1199EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1200#endif
8ccde88a
SO		 1201/**
1202 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1203 */
1204void iwl_irq_handle_error(struct iwl_priv *priv)
1205{
1206 /* Set the FW error flag -- cleared on iwl_down */
1207 set_bit(STATUS_FW_ERROR, &priv->status);
1208
1209 /* Cancel currently queued command. */
1210 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1211
459bc732
SZ		 1212 IWL_ERR(priv, "Loaded firmware version: %s\n",
1213 priv->hw->wiphy->fw_version);
1214
3a3ff72c 1215 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1216 if (priv->cfg->ops->lib->dump_csr)
1217 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1218 if (priv->cfg->ops->lib->dump_fh)
1219 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1220 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1221#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1222 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB		 1223 iwl_print_rx_config_cmd(priv,
1224 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO		 1225#endif
1226
1227 wake_up_interruptible(&priv->wait_command_queue);
1228
1229 /* Keep the restart process from trying to send host
1230 * commands by clearing the INIT status bit */
1231 clear_bit(STATUS_READY, &priv->status);
1232
1233 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1234 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1235 "Restarting adapter due to uCode error.\n");
1236
8ccde88a
SO		 1237 if (priv->cfg->mod_params->restart_fw)
1238 queue_work(priv->workqueue, &priv->restart);
1239 }
1240}
1241EXPORT_SYMBOL(iwl_irq_handle_error);
1242
f8e200de 1243static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1244{
5220af0c 1245 int ret = 0;
d68b603c 1246
5220af0c 1247 /* stop device's busmaster DMA activity */
d68b603c
AK		 1248 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1249
5220af0c 1250 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1251 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1252 if (ret)
1253 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1254
d68b603c
AK		 1255 IWL_DEBUG_INFO(priv, "stop master\n");
1256
5220af0c 1257 return ret;
d68b603c 1258}
d68b603c
AK		 1259
1260void iwl_apm_stop(struct iwl_priv *priv)
1261{
fadb3582
BC		 1262 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1263
5220af0c 1264 /* Stop device's DMA activity */
d68b603c
AK		 1265 iwl_apm_stop_master(priv);
1266
5220af0c 1267 /* Reset the entire device */
d68b603c
AK		 1268 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1269
1270 udelay(10);
5220af0c
BC		 1271
1272 /*
1273 * Clear "initialization complete" bit to move adapter from
1274 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1275 */
d68b603c 1276 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1277}
1278EXPORT_SYMBOL(iwl_apm_stop);
1279
fadb3582
BC		 1280
1281/*
1282 * Start up NIC's basic functionality after it has been reset
1283 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1284 * NOTE: This does not load uCode nor start the embedded processor
1285 */
1286int iwl_apm_init(struct iwl_priv *priv)
1287{
1288 int ret = 0;
1289 u16 lctl;
1290
1291 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1292
1293 /*
1294 * Use "set_bit" below rather than "write", to preserve any hardware
1295 * bits already set by default after reset.
1296 */
1297
1298 /* Disable L0S exit timer (platform NMI Work/Around) */
1299 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1300 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1301
1302 /*
1303 * Disable L0s without affecting L1;
1304 * don't wait for ICH L0s (ICH bug W/A)
1305 */
1306 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1307 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1308
1309 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1310 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1311
1312 /*
1313 * Enable HAP INTA (interrupt from management bus) to
1314 * wake device's PCI Express link L1a -> L0s
1315 * NOTE: This is no-op for 3945 (non-existant bit)
1316 */
1317 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1318 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1319
1320 /*
a6c5c731
BC		 1321 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1322 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1323 * If so (likely), disable L0S, so device moves directly L0->L1;
1324 * costs negligible amount of power savings.
1325 * If not (unlikely), enable L0S, so there is at least some
1326 * power savings, even without L1.
fadb3582
BC		 1327 */
1328 if (priv->cfg->set_l0s) {
1329 lctl = iwl_pcie_link_ctl(priv);
1330 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1331 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1332 /* L1-ASPM enabled; disable(!) L0S */
1333 iwl_set_bit(priv, CSR_GIO_REG,
1334 CSR_GIO_REG_VAL_L0S_ENABLED);
1335 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1336 } else {
1337 /* L1-ASPM disabled; enable(!) L0S */
1338 iwl_clear_bit(priv, CSR_GIO_REG,
1339 CSR_GIO_REG_VAL_L0S_ENABLED);
1340 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1341 }
1342 }
1343
1344 /* Configure analog phase-lock-loop before activating to D0A */
1345 if (priv->cfg->pll_cfg_val)
1346 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1347
1348 /*
1349 * Set "initialization complete" bit to move adapter from
1350 * D0U* --> D0A* (powered-up active) state.
1351 */
1352 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1353
1354 /*
1355 * Wait for clock stabilization; once stabilized, access to
1356 * device-internal resources is supported, e.g. iwl_write_prph()
1357 * and accesses to uCode SRAM.
1358 */
1359 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1360 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1361 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1362 if (ret < 0) {
1363 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1364 goto out;
1365 }
1366
1367 /*
1368 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1369 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1370 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1371 * and don't need BSM to restore data after power-saving sleep.
1372 *
1373 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1374 * do not disable clocks. This preserves any hardware bits already
1375 * set by default in "CLK_CTRL_REG" after reset.
1376 */
1377 if (priv->cfg->use_bsm)
1378 iwl_write_prph(priv, APMG_CLK_EN_REG,
1379 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1380 else
1381 iwl_write_prph(priv, APMG_CLK_EN_REG,
1382 APMG_CLK_VAL_DMA_CLK_RQT);
1383 udelay(20);
1384
1385 /* Disable L1-Active */
1386 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1387 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1388
1389out:
1390 return ret;
1391}
1392EXPORT_SYMBOL(iwl_apm_init);
1393
1394
630fe9b6
TW		 1395int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1396{
1397 int ret = 0;
5eadd94b
WYG		 1398 s8 prev_tx_power = priv->tx_power_user_lmt;
1399
b744cb79
WYG		 1400 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1401 IWL_WARN(priv,
1402 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1403 tx_power,
b744cb79 1404 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1405 return -EINVAL;
1406 }
1407
dc1b0973 1408 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1409 IWL_WARN(priv,
1410 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1411 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1412 return -EINVAL;
1413 }
1414
1415 if (priv->tx_power_user_lmt != tx_power)
1416 force = true;
1417
019fb97d 1418 /* if nic is not up don't send command */
5eadd94b
WYG		 1419 if (iwl_is_ready_rf(priv)) {
1420 priv->tx_power_user_lmt = tx_power;
1421 if (force && priv->cfg->ops->lib->send_tx_power)
1422 ret = priv->cfg->ops->lib->send_tx_power(priv);
1423 else if (!priv->cfg->ops->lib->send_tx_power)
1424 ret = -EOPNOTSUPP;
1425 /*
1426 * if fail to set tx_power, restore the orig. tx power
1427 */
1428 if (ret)
1429 priv->tx_power_user_lmt = prev_tx_power;
1430 }
630fe9b6 1431
5eadd94b
WYG		 1432 /*
1433 * Even this is an async host command, the command
1434 * will always report success from uCode
1435 * So once driver can placing the command into the queue
1436 * successfully, driver can use priv->tx_power_user_lmt
1437 * to reflect the current tx power
1438 */
630fe9b6
TW		 1439 return ret;
1440}
1441EXPORT_SYMBOL(iwl_set_tx_power);
1442
ef850d7c 1443irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1444{
1445 struct iwl_priv *priv = data;
1446 u32 inta, inta_mask;
1447 u32 inta_fh;
6e8cc38d 1448 unsigned long flags;
f17d08a6
AK		 1449 if (!priv)
1450 return IRQ_NONE;
1451
6e8cc38d 1452 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1453
1454 /* Disable (but don't clear!) interrupts here to avoid
1455 * back-to-back ISRs and sporadic interrupts from our NIC.
1456 * If we have something to service, the tasklet will re-enable ints.
1457 * If we *don't* have something, we'll re-enable before leaving here. */
1458 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1459 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1460
1461 /* Discover which interrupts are active/pending */
1462 inta = iwl_read32(priv, CSR_INT);
1463 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1464
1465 /* Ignore interrupt if there's nothing in NIC to service.
1466 * This may be due to IRQ shared with another device,
1467 * or due to sporadic interrupts thrown from our NIC. */
1468 if (!inta && !inta_fh) {
1469 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1470 goto none;
1471 }
1472
1473 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1474 /* Hardware disappeared. It might have already raised
1475 * an interrupt */
1476 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1477 goto unplugged;
1478 }
1479
1480 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1481 inta, inta_mask, inta_fh);
1482
1483 inta &= ~CSR_INT_BIT_SCD;
1484
1485 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1486 if (likely(inta || inta_fh))
1487 tasklet_schedule(&priv->irq_tasklet);
1488
1489 unplugged:
6e8cc38d 1490 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1491 return IRQ_HANDLED;
1492
1493 none:
1494 /* re-enable interrupts here since we don't have anything to service. */
1495 /* only Re-enable if diabled by irq */
1496 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1497 iwl_enable_interrupts(priv);
6e8cc38d 1498 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1499 return IRQ_NONE;
1500}
ef850d7c 1501EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1502
65b52bde 1503void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1504{
1505 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1506 .lead_time = BT_LEAD_TIME_DEF,
1507 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1508 .kill_ack_mask = 0,
1509 .kill_cts_mask = 0,
1510 };
1511
06702a73
WYG		 1512 if (!bt_coex_active)
1513 bt_cmd.flags = BT_COEX_DISABLE;
1514 else
1515 bt_cmd.flags = BT_COEX_ENABLE;
1516
1517 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1518 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1519
65b52bde
JB		 1520 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1521 sizeof(struct iwl_bt_cmd), &bt_cmd))
1522 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1523}
1524EXPORT_SYMBOL(iwl_send_bt_config);
1525
ef8d5529 1526int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1527{
ef8d5529
WYG		 1528 struct iwl_statistics_cmd statistics_cmd = {
1529 .configuration_flags =
1530 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1531 };
ef8d5529
WYG		 1532
1533 if (flags & CMD_ASYNC)
1534 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1535 sizeof(struct iwl_statistics_cmd),
1536 &statistics_cmd, NULL);
1537 else
1538 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1539 sizeof(struct iwl_statistics_cmd),
1540 &statistics_cmd);
49ea8596
EG		 1541}
1542EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1543
030f05ed
AK		 1544void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1545 struct iwl_rx_mem_buffer *rxb)
1546{
1547#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1548 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1549 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1550 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1551 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1552#endif
1553}
1554EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1555
1556void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1557 struct iwl_rx_mem_buffer *rxb)
1558{
2f301227 1559 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1560 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1561 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1562 "notification for %s:\n", len,
1563 get_cmd_string(pkt->hdr.cmd));
1564 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1565}
1566EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1567
1568void iwl_rx_reply_error(struct iwl_priv *priv,
1569 struct iwl_rx_mem_buffer *rxb)
1570{
2f301227 1571 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1572
1573 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1574 "seq 0x%04X ser 0x%08X\n",
1575 le32_to_cpu(pkt->u.err_resp.error_type),
1576 get_cmd_string(pkt->u.err_resp.cmd_id),
1577 pkt->u.err_resp.cmd_id,
1578 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1579 le32_to_cpu(pkt->u.err_resp.error_info));
1580}
1581EXPORT_SYMBOL(iwl_rx_reply_error);
1582
a83b9141
WYG		 1583void iwl_clear_isr_stats(struct iwl_priv *priv)
1584{
1585 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1586}
a83b9141 1587
488829f1
AK		 1588int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1589 const struct ieee80211_tx_queue_params *params)
1590{
1591 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1592 struct iwl_rxon_context *ctx;
488829f1
AK		 1593 unsigned long flags;
1594 int q;
1595
1596 IWL_DEBUG_MAC80211(priv, "enter\n");
1597
1598 if (!iwl_is_ready_rf(priv)) {
1599 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1600 return -EIO;
1601 }
1602
1603 if (queue >= AC_NUM) {
1604 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1605 return 0;
1606 }
1607
1608 q = AC_NUM - 1 - queue;
1609
1610 spin_lock_irqsave(&priv->lock, flags);
1611
8dfdb9d5
JB		 1612 /*
1613 * MULTI-FIXME
1614 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1615 */
1616 for_each_context(priv, ctx) {
1617 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1618 cpu_to_le16(params->cw_min);
1619 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1620 cpu_to_le16(params->cw_max);
1621 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1622 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1623 cpu_to_le16((params->txop * 32));
1624
1625 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1626 }
488829f1
AK		 1627
1628 spin_unlock_irqrestore(&priv->lock, flags);
1629
1630 IWL_DEBUG_MAC80211(priv, "leave\n");
1631 return 0;
1632}
1633EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1634
a85d7cca
JB		 1635int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1636{
1637 struct iwl_priv *priv = hw->priv;
1638
1639 return priv->ibss_manager == IWL_IBSS_MANAGER;
1640}
1641EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1642
5bbe233b 1643static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1644 struct ieee80211_vif *vif)
5bbe233b 1645{
fad95bf5 1646 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1647 struct ieee80211_sta *sta;
ca3c1f59 1648 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
7e6a5886 1649 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
5bbe233b 1650
91dd6c27 1651 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1652
7e6a5886 1653 if (!ctx->ht.enabled)
5bbe233b
AK		 1654 return;
1655
7e6a5886 1656 ctx->ht.protection =
9ed6bcce 1657 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
7e6a5886 1658 ctx->ht.non_gf_sta_present =
9ed6bcce 1659 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1660
02bb1bea
JB		 1661 ht_conf->single_chain_sufficient = false;
1662
ca3c1f59 1663 switch (vif->type) {
02bb1bea
JB		 1664 case NL80211_IFTYPE_STATION:
1665 rcu_read_lock();
ca3c1f59 1666 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1667 if (sta) {
1668 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1669 int maxstreams;
1670
1671 maxstreams = (ht_cap->mcs.tx_params &
1672 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1673 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1674 maxstreams += 1;
1675
1676 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1677 (ht_cap->mcs.rx_mask[2] == 0))
1678 ht_conf->single_chain_sufficient = true;
1679 if (maxstreams <= 1)
1680 ht_conf->single_chain_sufficient = true;
1681 } else {
1682 /*
1683 * If at all, this can only happen through a race
1684 * when the AP disconnects us while we're still
1685 * setting up the connection, in that case mac80211
1686 * will soon tell us about that.
1687 */
1688 ht_conf->single_chain_sufficient = true;
1689 }
1690 rcu_read_unlock();
1691 break;
1692 case NL80211_IFTYPE_ADHOC:
1693 ht_conf->single_chain_sufficient = true;
1694 break;
1695 default:
1696 break;
1697 }
5bbe233b
AK		 1698
1699 IWL_DEBUG_MAC80211(priv, "leave\n");
1700}
1701
246ed355
JB		 1702static inline void iwl_set_no_assoc(struct iwl_priv *priv,
1703 struct ieee80211_vif *vif)
c91c3efc 1704{
246ed355
JB		 1705 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1706
c91c3efc
AK		 1707 iwl_led_disassociate(priv);
1708 /*
1709 * inform the ucode that there is no longer an
1710 * association and that no more packets should be
1711 * sent
1712 */
246ed355
JB		 1713 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1714 ctx->staging.assoc_id = 0;
1715 iwlcore_commit_rxon(priv, ctx);
c91c3efc
AK		 1716}
1717
0bc5774f
JB		 1718static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1719{
1720 struct iwl_priv *priv = hw->priv;
1721 unsigned long flags;
1722 __le64 timestamp;
1723
1724 IWL_DEBUG_MAC80211(priv, "enter\n");
1725
76d04815
JB		 1726 lockdep_assert_held(&priv->mutex);
1727
1728 if (!priv->beacon_ctx) {
1729 IWL_ERR(priv, "update beacon but no beacon context!\n");
1730 dev_kfree_skb(skb);
1731 return -EINVAL;
1732 }
1733
0bc5774f
JB		 1734 if (!iwl_is_ready_rf(priv)) {
1735 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1736 return -EIO;
1737 }
1738
1739 spin_lock_irqsave(&priv->lock, flags);
1740
1741 if (priv->ibss_beacon)
1742 dev_kfree_skb(priv->ibss_beacon);
1743
1744 priv->ibss_beacon = skb;
1745
1746 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1747 priv->timestamp = le64_to_cpu(timestamp);
1748
1749 IWL_DEBUG_MAC80211(priv, "leave\n");
1750 spin_unlock_irqrestore(&priv->lock, flags);
1751
76d04815 1752 priv->cfg->ops->lib->post_associate(priv, priv->beacon_ctx->vif);
0bc5774f
JB		 1753
1754 return 0;
1755}
1756
5bbe233b 1757void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1758 struct ieee80211_vif *vif,
1759 struct ieee80211_bss_conf *bss_conf,
1760 u32 changes)
5bbe233b
AK		 1761{
1762 struct iwl_priv *priv = hw->priv;
246ed355 1763 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3a650292 1764 int ret;
5bbe233b
AK		 1765
1766 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1767
2d0ddec5
JB		 1768 if (!iwl_is_alive(priv))
1769 return;
1770
1771 mutex_lock(&priv->mutex);
1772
4ced3f74
JB		 1773 if (changes & BSS_CHANGED_QOS) {
1774 unsigned long flags;
1775
1776 spin_lock_irqsave(&priv->lock, flags);
8dfdb9d5
JB		 1777 ctx->qos_data.qos_active = bss_conf->qos;
1778 iwl_update_qos(priv, ctx);
4ced3f74
JB		 1779 spin_unlock_irqrestore(&priv->lock, flags);
1780 }
1781
76d04815
JB		 1782 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1783 /*
1784 * the add_interface code must make sure we only ever
1785 * have a single interface that could be beaconing at
1786 * any time.
1787 */
1788 if (vif->bss_conf.enable_beacon)
1789 priv->beacon_ctx = ctx;
1790 else
1791 priv->beacon_ctx = NULL;
1792 }
1793
92445c95 1794 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1795 dev_kfree_skb(priv->ibss_beacon);
1796 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1797 }
1798
d7129e19 1799 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB		 1800 /* TODO: in AP mode, do something to make this take effect */
1801 }
1802
1803 if (changes & BSS_CHANGED_BSSID) {
1804 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1805
1806 /*
1807 * If there is currently a HW scan going on in the
1808 * background then we need to cancel it else the RXON
1809 * below/in post_associate will fail.
1810 */
2d0ddec5 1811 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1812 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1813 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1814 mutex_unlock(&priv->mutex);
1815 return;
1816 }
2d0ddec5 1817
d7129e19 1818 /* mac80211 only sets assoc when in STATION mode */
92445c95 1819 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
246ed355 1820 memcpy(ctx->staging.bssid_addr,
d7129e19 1821 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1822
d7129e19
JB		 1823 /* currently needed in a few places */
1824 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1825 } else {
246ed355 1826 ctx->staging.filter_flags &=
d7129e19 1827 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1828 }
d7129e19 1829
2d0ddec5
JB		 1830 }
1831
d7129e19
JB		 1832 /*
1833 * This needs to be after setting the BSSID in case
1834 * mac80211 decides to do both changes at once because
1835 * it will invoke post_associate.
1836 */
92445c95 1837 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1838 changes & BSS_CHANGED_BEACON) {
1839 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1840
1841 if (beacon)
1842 iwl_mac_beacon_update(hw, beacon);
1843 }
1844
5bbe233b
AK		 1845 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1846 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1847 bss_conf->use_short_preamble);
1848 if (bss_conf->use_short_preamble)
246ed355 1849 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b 1850 else
246ed355 1851 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b
AK		 1852 }
1853
1854 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1855 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1856 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
246ed355 1857 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5bbe233b 1858 else
246ed355 1859 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2 1860 if (bss_conf->use_cts_prot)
246ed355 1861 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
94597ab2 1862 else
246ed355 1863 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK		 1864 }
1865
d7129e19
JB		 1866 if (changes & BSS_CHANGED_BASIC_RATES) {
1867 /* XXX use this information
1868 *
1869 * To do that, remove code from iwl_set_rate() and put something
1870 * like this here:
1871 *
1872 if (A-band)
246ed355 1873 ctx->staging.ofdm_basic_rates =
d7129e19
JB		 1874 bss_conf->basic_rates;
1875 else
246ed355 1876 ctx->staging.ofdm_basic_rates =
d7129e19 1877 bss_conf->basic_rates >> 4;
246ed355 1878 ctx->staging.cck_basic_rates =
d7129e19
JB		 1879 bss_conf->basic_rates & 0xF;
1880 */
1881 }
1882
5bbe233b 1883 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1884 iwl_ht_conf(priv, vif);
45823531
AK		 1885
1886 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1887 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
5bbe233b
AK		 1888 }
1889
1890 if (changes & BSS_CHANGED_ASSOC) {
1891 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1892 if (bss_conf->assoc) {
5bbe233b 1893 priv->timestamp = bss_conf->timestamp;
5bbe233b 1894
e932a609
JB		 1895 iwl_led_associate(priv);
1896
d7129e19 1897 if (!iwl_is_rfkill(priv))
1dda6d28 1898 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc 1899 } else
246ed355 1900 iwl_set_no_assoc(priv, vif);
d7129e19
JB		 1901 }
1902
246ed355 1903 if (changes && iwl_is_associated_ctx(ctx) && bss_conf->aid) {
d7129e19
JB		 1904 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1905 changes);
246ed355 1906 ret = iwl_send_rxon_assoc(priv, ctx);
d7129e19
JB		 1907 if (!ret) {
1908 /* Sync active_rxon with latest change. */
246ed355
JB		 1909 memcpy((void *)&ctx->active,
1910 &ctx->staging,
d7129e19 1911 sizeof(struct iwl_rxon_cmd));
5bbe233b 1912 }
5bbe233b 1913 }
d7129e19 1914
c91c3efc
AK		 1915 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1916 if (vif->bss_conf.enable_beacon) {
246ed355 1917 memcpy(ctx->staging.bssid_addr,
c91c3efc
AK		 1918 bss_conf->bssid, ETH_ALEN);
1919 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1920 iwlcore_config_ap(priv, vif);
c91c3efc 1921 } else
246ed355 1922 iwl_set_no_assoc(priv, vif);
f513dfff
DH		 1923 }
1924
1fa61b2e
JB		 1925 if (changes & BSS_CHANGED_IBSS) {
1926 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1927 bss_conf->ibss_joined);
1928 if (ret)
1929 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1930 bss_conf->ibss_joined ? "add" : "remove",
1931 bss_conf->bssid);
1932 }
1933
52a02d15
JB		 1934 if (changes & BSS_CHANGED_IDLE &&
1935 priv->cfg->ops->hcmd->set_pan_params) {
1936 if (priv->cfg->ops->hcmd->set_pan_params(priv))
1937 IWL_ERR(priv, "failed to update PAN params\n");
1938 }
1939
d7129e19
JB		 1940 mutex_unlock(&priv->mutex);
1941
2d0ddec5 1942 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1943}
1944EXPORT_SYMBOL(iwl_bss_info_changed);
1945
b55e75ed 1946static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1947{
246ed355
JB		 1948 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1949
1dda6d28 1950 iwl_connection_init_rx_config(priv, vif);
727882d6
AK		 1951
1952 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1953 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1954
246ed355 1955 return iwlcore_commit_rxon(priv, ctx);
727882d6 1956}
727882d6 1957
b55e75ed 1958int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1959{
1960 struct iwl_priv *priv = hw->priv;
246ed355 1961 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
8bd413e6 1962 struct iwl_rxon_context *ctx;
47e28f41 1963 int err = 0;
cbb6ab94 1964
3779db10
JB		 1965 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1966 vif->type, vif->addr);
cbb6ab94 1967
47e28f41
JB		 1968 mutex_lock(&priv->mutex);
1969
8bd413e6
JB		 1970 /* For now always use this context. */
1971 ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1972
1973 vif_priv->ctx = ctx;
246ed355 1974
b55e75ed
JB		 1975 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1976 err = -EINVAL;
1977 goto out;
1978 }
1979
8bd413e6 1980 if (ctx->vif) {
cbb6ab94 1981 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 1982 err = -EOPNOTSUPP;
1983 goto out;
cbb6ab94
AK		 1984 }
1985
8bd413e6 1986 ctx->vif = vif;
1ed32e4f 1987 priv->iw_mode = vif->type;
cbb6ab94 1988
b55e75ed
JB		 1989 err = iwl_set_mode(priv, vif);
1990 if (err)
1991 goto out_err;
7e246191 1992
59079949
JB		 1993 if (priv->cfg->advanced_bt_coexist &&
1994 vif->type == NL80211_IFTYPE_ADHOC) {
1995 /*
1996 * pretend to have high BT traffic as long as we
1997 * are operating in IBSS mode, as this will cause
1998 * the rate scaling etc. to behave as intended.
1999 */
2000 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
2001 }
2002
b55e75ed 2003 goto out;
cbb6ab94 2004
b55e75ed 2005 out_err:
8bd413e6 2006 ctx->vif = NULL;
b55e75ed 2007 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2008 out:
cbb6ab94
AK		 2009 mutex_unlock(&priv->mutex);
2010
2011 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2012 return err;
cbb6ab94
AK		 2013}
2014EXPORT_SYMBOL(iwl_mac_add_interface);
2015
d8052319 2016void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2017 struct ieee80211_vif *vif)
d8052319
AK		 2018{
2019 struct iwl_priv *priv = hw->priv;
246ed355 2020 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
02f5ba5b 2021 bool scan_completed = false;
d8052319
AK		 2022
2023 IWL_DEBUG_MAC80211(priv, "enter\n");
2024
2025 mutex_lock(&priv->mutex);
2026
2027 if (iwl_is_ready_rf(priv)) {
2028 iwl_scan_cancel_timeout(priv, 100);
246ed355
JB		 2029 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2030 iwlcore_commit_rxon(priv, ctx);
d8052319 2031 }
8bd413e6
JB		 2032
2033 if (priv->scan_vif == vif) {
2034 scan_completed = true;
2035 priv->scan_vif = NULL;
2036 priv->scan_request = NULL;
d8052319 2037 }
59079949
JB		 2038
2039 /*
2040 * When removing the IBSS interface, overwrite the
2041 * BT traffic load with the stored one from the last
2042 * notification, if any. If this is a device that
2043 * doesn't implement this, this has no effect since
2044 * both values are the same and zero.
2045 */
2046 if (vif->type == NL80211_IFTYPE_ADHOC)
2047 priv->bt_traffic_load = priv->notif_bt_traffic_load;
2048
8bd413e6
JB		 2049 WARN_ON(ctx->vif != vif);
2050 ctx->vif = NULL;
2051 memset(priv->bssid, 0, ETH_ALEN);
d8052319
AK		 2052 mutex_unlock(&priv->mutex);
2053
02f5ba5b
JB		 2054 if (scan_completed)
2055 ieee80211_scan_completed(priv->hw, true);
2056
d8052319
AK		 2057 IWL_DEBUG_MAC80211(priv, "leave\n");
2058
2059}
2060EXPORT_SYMBOL(iwl_mac_remove_interface);
2061
4808368d
AK		 2062/**
2063 * iwl_mac_config - mac80211 config callback
4808368d
AK		 2064 */
2065int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2066{
2067 struct iwl_priv *priv = hw->priv;
2068 const struct iwl_channel_info *ch_info;
2069 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 2070 struct ieee80211_channel *channel = conf->channel;
fad95bf5 2071 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
246ed355 2072 struct iwl_rxon_context *ctx;
4808368d
AK		 2073 unsigned long flags = 0;
2074 int ret = 0;
2075 u16 ch;
2076 int scan_active = 0;
2077
2078 mutex_lock(&priv->mutex);
2079
4808368d 2080 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
aa2dc6b5 2081 channel->hw_value, changed);
4808368d
AK		 2082
2083 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2084 test_bit(STATUS_SCANNING, &priv->status))) {
2085 scan_active = 1;
2086 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2087 }
2088
ba37a3d0
JB		 2089 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2090 IEEE80211_CONF_CHANGE_CHANNEL)) {
2091 /* mac80211 uses static for non-HT which is what we want */
2092 priv->current_ht_config.smps = conf->smps_mode;
2093
2094 /*
2095 * Recalculate chain counts.
2096 *
2097 * If monitor mode is enabled then mac80211 will
2098 * set up the SM PS mode to OFF if an HT channel is
2099 * configured.
2100 */
2101 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355
JB		 2102 for_each_context(priv, ctx)
2103 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
ba37a3d0 2104 }
4808368d
AK		 2105
2106 /* during scanning mac80211 will delay channel setting until
2107 * scan finish with changed = 0
2108 */
2109 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2110 if (scan_active)
2111 goto set_ch_out;
2112
aa2dc6b5
SZ		 2113 ch = channel->hw_value;
2114 ch_info = iwl_get_channel_info(priv, channel->band, ch);
4808368d
AK		 2115 if (!is_channel_valid(ch_info)) {
2116 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2117 ret = -EINVAL;
2118 goto set_ch_out;
2119 }
2120
4808368d
AK		 2121 spin_lock_irqsave(&priv->lock, flags);
2122
246ed355 2123 for_each_context(priv, ctx) {
7e6a5886
JB		 2124 /* Configure HT40 channels */
2125 ctx->ht.enabled = conf_is_ht(conf);
2126 if (ctx->ht.enabled) {
2127 if (conf_is_ht40_minus(conf)) {
2128 ctx->ht.extension_chan_offset =
2129 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2130 ctx->ht.is_40mhz = true;
2131 } else if (conf_is_ht40_plus(conf)) {
2132 ctx->ht.extension_chan_offset =
2133 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2134 ctx->ht.is_40mhz = true;
2135 } else {
2136 ctx->ht.extension_chan_offset =
2137 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2138 ctx->ht.is_40mhz = false;
2139 }
2140 } else
2141 ctx->ht.is_40mhz = false;
2142
2143 /*
2144 * Default to no protection. Protection mode will
2145 * later be set from BSS config in iwl_ht_conf
2146 */
2147 ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2148
246ed355
JB		 2149 /* if we are switching from ht to 2.4 clear flags
2150 * from any ht related info since 2.4 does not
2151 * support ht */
2152 if ((le16_to_cpu(ctx->staging.channel) != ch))
2153 ctx->staging.flags = 0;
4808368d 2154
246ed355
JB		 2155 iwl_set_rxon_channel(priv, channel, ctx);
2156 iwl_set_rxon_ht(priv, ht_conf);
2157
2158 iwl_set_flags_for_band(priv, ctx, channel->band,
8bd413e6 2159 ctx->vif);
246ed355 2160 }
4808368d 2161
4808368d 2162 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2163
a194e324
JB		 2164 if (priv->cfg->ops->lib->update_bcast_stations)
2165 ret = priv->cfg->ops->lib->update_bcast_stations(priv);
278c2f6f 2166
4808368d
AK		 2167 set_ch_out:
2168 /* The list of supported rates and rate mask can be different
2169 * for each band; since the band may have changed, reset
2170 * the rate mask to what mac80211 lists */
2171 iwl_set_rate(priv);
2172 }
2173
78f5fb7f
JB		 2174 if (changed & (IEEE80211_CONF_CHANGE_PS |
2175 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2176 ret = iwl_power_update_mode(priv, false);
4808368d 2177 if (ret)
e312c24c 2178 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2179 }
2180
2181 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2182 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2183 priv->tx_power_user_lmt, conf->power_level);
2184
2185 iwl_set_tx_power(priv, conf->power_level, false);
2186 }
2187
0cf4c01e
MA		 2188 if (!iwl_is_ready(priv)) {
2189 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2190 goto out;
2191 }
2192
4808368d
AK		 2193 if (scan_active)
2194 goto out;
2195
246ed355
JB		 2196 for_each_context(priv, ctx) {
2197 if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
2198 iwlcore_commit_rxon(priv, ctx);
2199 else
2200 IWL_DEBUG_INFO(priv,
2201 "Not re-sending same RXON configuration.\n");
2202 }
4808368d
AK		 2203
2204out:
2205 IWL_DEBUG_MAC80211(priv, "leave\n");
2206 mutex_unlock(&priv->mutex);
2207 return ret;
2208}
2209EXPORT_SYMBOL(iwl_mac_config);
2210
bd564261
AK		 2211void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2212{
2213 struct iwl_priv *priv = hw->priv;
2214 unsigned long flags;
246ed355
JB		 2215 /* IBSS can only be the IWL_RXON_CTX_BSS context */
2216 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
bd564261
AK		 2217
2218 mutex_lock(&priv->mutex);
2219 IWL_DEBUG_MAC80211(priv, "enter\n");
2220
2221 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2222 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2223 spin_unlock_irqrestore(&priv->lock, flags);
2224
bd564261 2225 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2226
2227 /* new association get rid of ibss beacon skb */
2228 if (priv->ibss_beacon)
2229 dev_kfree_skb(priv->ibss_beacon);
2230
2231 priv->ibss_beacon = NULL;
2232
bd564261 2233 priv->timestamp = 0;
bd564261
AK		 2234
2235 spin_unlock_irqrestore(&priv->lock, flags);
2236
2237 if (!iwl_is_ready_rf(priv)) {
2238 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2239 mutex_unlock(&priv->mutex);
2240 return;
2241 }
2242
2243 /* we are restarting association process
2244 * clear RXON_FILTER_ASSOC_MSK bit
2245 */
b4665df4 2246 iwl_scan_cancel_timeout(priv, 100);
246ed355
JB		 2247 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2248 iwlcore_commit_rxon(priv, ctx);
bd564261
AK		 2249
2250 iwl_set_rate(priv);
2251
2252 mutex_unlock(&priv->mutex);
2253
2254 IWL_DEBUG_MAC80211(priv, "leave\n");
2255}
2256EXPORT_SYMBOL(iwl_mac_reset_tsf);
2257
88804e2b
WYG		 2258int iwl_alloc_txq_mem(struct iwl_priv *priv)
2259{
2260 if (!priv->txq)
2261 priv->txq = kzalloc(
2262 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2263 GFP_KERNEL);
2264 if (!priv->txq) {
91dd6c27 2265 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2266 return -ENOMEM;
2267 }
2268 return 0;
2269}
2270EXPORT_SYMBOL(iwl_alloc_txq_mem);
2271
2272void iwl_free_txq_mem(struct iwl_priv *priv)
2273{
2274 kfree(priv->txq);
2275 priv->txq = NULL;
2276}
2277EXPORT_SYMBOL(iwl_free_txq_mem);
2278
20594eb0
WYG		 2279#ifdef CONFIG_IWLWIFI_DEBUGFS
2280
2281#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2282
2283void iwl_reset_traffic_log(struct iwl_priv *priv)
2284{
2285 priv->tx_traffic_idx = 0;
2286 priv->rx_traffic_idx = 0;
2287 if (priv->tx_traffic)
2288 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2289 if (priv->rx_traffic)
2290 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2291}
2292
2293int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2294{
2295 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2296
2297 if (iwl_debug_level & IWL_DL_TX) {
2298 if (!priv->tx_traffic) {
2299 priv->tx_traffic =
2300 kzalloc(traffic_size, GFP_KERNEL);
2301 if (!priv->tx_traffic)
2302 return -ENOMEM;
2303 }
2304 }
2305 if (iwl_debug_level & IWL_DL_RX) {
2306 if (!priv->rx_traffic) {
2307 priv->rx_traffic =
2308 kzalloc(traffic_size, GFP_KERNEL);
2309 if (!priv->rx_traffic)
2310 return -ENOMEM;
2311 }
2312 }
2313 iwl_reset_traffic_log(priv);
2314 return 0;
2315}
2316EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2317
2318void iwl_free_traffic_mem(struct iwl_priv *priv)
2319{
2320 kfree(priv->tx_traffic);
2321 priv->tx_traffic = NULL;
2322
2323 kfree(priv->rx_traffic);
2324 priv->rx_traffic = NULL;
2325}
2326EXPORT_SYMBOL(iwl_free_traffic_mem);
2327
2328void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2329 u16 length, struct ieee80211_hdr *header)
2330{
2331 __le16 fc;
2332 u16 len;
2333
2334 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2335 return;
2336
2337 if (!priv->tx_traffic)
2338 return;
2339
2340 fc = header->frame_control;
2341 if (ieee80211_is_data(fc)) {
2342 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2343 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2344 memcpy((priv->tx_traffic +
2345 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2346 header, len);
2347 priv->tx_traffic_idx =
2348 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2349 }
2350}
2351EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2352
2353void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2354 u16 length, struct ieee80211_hdr *header)
2355{
2356 __le16 fc;
2357 u16 len;
2358
2359 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2360 return;
2361
2362 if (!priv->rx_traffic)
2363 return;
2364
2365 fc = header->frame_control;
2366 if (ieee80211_is_data(fc)) {
2367 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2368 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2369 memcpy((priv->rx_traffic +
2370 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2371 header, len);
2372 priv->rx_traffic_idx =
2373 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2374 }
2375}
2376EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2377
2378const char *get_mgmt_string(int cmd)
2379{
2380 switch (cmd) {
2381 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2382 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2383 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2384 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2385 IWL_CMD(MANAGEMENT_PROBE_REQ);
2386 IWL_CMD(MANAGEMENT_PROBE_RESP);
2387 IWL_CMD(MANAGEMENT_BEACON);
2388 IWL_CMD(MANAGEMENT_ATIM);
2389 IWL_CMD(MANAGEMENT_DISASSOC);
2390 IWL_CMD(MANAGEMENT_AUTH);
2391 IWL_CMD(MANAGEMENT_DEAUTH);
2392 IWL_CMD(MANAGEMENT_ACTION);
2393 default:
2394 return "UNKNOWN";
2395
2396 }
2397}
2398
2399const char *get_ctrl_string(int cmd)
2400{
2401 switch (cmd) {
2402 IWL_CMD(CONTROL_BACK_REQ);
2403 IWL_CMD(CONTROL_BACK);
2404 IWL_CMD(CONTROL_PSPOLL);
2405 IWL_CMD(CONTROL_RTS);
2406 IWL_CMD(CONTROL_CTS);
2407 IWL_CMD(CONTROL_ACK);
2408 IWL_CMD(CONTROL_CFEND);
2409 IWL_CMD(CONTROL_CFENDACK);
2410 default:
2411 return "UNKNOWN";
2412
2413 }
2414}
2415
7163b8a4 2416void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2417{
2418 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2419 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2420 priv->led_tpt = 0;
22fdf3c9
WYG		 2421}
2422
2423/*
2424 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2425 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2426 * Use debugFs to display the rx/rx_statistics
2427 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2428 * information will be recorded, but DATA pkt still will be recorded
2429 * for the reason of iwl_led.c need to control the led blinking based on
2430 * number of tx and rx data.
2431 *
2432 */
2433void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2434{
2435 struct traffic_stats *stats;
2436
2437 if (is_tx)
2438 stats = &priv->tx_stats;
2439 else
2440 stats = &priv->rx_stats;
2441
2442 if (ieee80211_is_mgmt(fc)) {
2443 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2444 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2445 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2446 break;
2447 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2448 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2449 break;
2450 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2451 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2452 break;
2453 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2454 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2455 break;
2456 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2457 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2458 break;
2459 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2460 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2461 break;
2462 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2463 stats->mgmt[MANAGEMENT_BEACON]++;
2464 break;
2465 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2466 stats->mgmt[MANAGEMENT_ATIM]++;
2467 break;
2468 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2469 stats->mgmt[MANAGEMENT_DISASSOC]++;
2470 break;
2471 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2472 stats->mgmt[MANAGEMENT_AUTH]++;
2473 break;
2474 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2475 stats->mgmt[MANAGEMENT_DEAUTH]++;
2476 break;
2477 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2478 stats->mgmt[MANAGEMENT_ACTION]++;
2479 break;
2480 }
2481 } else if (ieee80211_is_ctl(fc)) {
2482 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2483 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2484 stats->ctrl[CONTROL_BACK_REQ]++;
2485 break;
2486 case cpu_to_le16(IEEE80211_STYPE_BACK):
2487 stats->ctrl[CONTROL_BACK]++;
2488 break;
2489 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2490 stats->ctrl[CONTROL_PSPOLL]++;
2491 break;
2492 case cpu_to_le16(IEEE80211_STYPE_RTS):
2493 stats->ctrl[CONTROL_RTS]++;
2494 break;
2495 case cpu_to_le16(IEEE80211_STYPE_CTS):
2496 stats->ctrl[CONTROL_CTS]++;
2497 break;
2498 case cpu_to_le16(IEEE80211_STYPE_ACK):
2499 stats->ctrl[CONTROL_ACK]++;
2500 break;
2501 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2502 stats->ctrl[CONTROL_CFEND]++;
2503 break;
2504 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2505 stats->ctrl[CONTROL_CFENDACK]++;
2506 break;
2507 }
2508 } else {
2509 /* data */
2510 stats->data_cnt++;
2511 stats->data_bytes += len;
2512 }
d5f4cf71 2513 iwl_leds_background(priv);
22fdf3c9
WYG		 2514}
2515EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2516#endif
2517
a0ea9493 2518static const char *get_csr_string(int cmd)
696bdee3
WYG		 2519{
2520 switch (cmd) {
2521 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2522 IWL_CMD(CSR_INT_COALESCING);
2523 IWL_CMD(CSR_INT);
2524 IWL_CMD(CSR_INT_MASK);
2525 IWL_CMD(CSR_FH_INT_STATUS);
2526 IWL_CMD(CSR_GPIO_IN);
2527 IWL_CMD(CSR_RESET);
2528 IWL_CMD(CSR_GP_CNTRL);
2529 IWL_CMD(CSR_HW_REV);
2530 IWL_CMD(CSR_EEPROM_REG);
2531 IWL_CMD(CSR_EEPROM_GP);
2532 IWL_CMD(CSR_OTP_GP_REG);
2533 IWL_CMD(CSR_GIO_REG);
2534 IWL_CMD(CSR_GP_UCODE_REG);
2535 IWL_CMD(CSR_GP_DRIVER_REG);
2536 IWL_CMD(CSR_UCODE_DRV_GP1);
2537 IWL_CMD(CSR_UCODE_DRV_GP2);
2538 IWL_CMD(CSR_LED_REG);
2539 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2540 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2541 IWL_CMD(CSR_ANA_PLL_CFG);
2542 IWL_CMD(CSR_HW_REV_WA_REG);
2543 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2544 default:
2545 return "UNKNOWN";
2546
2547 }
2548}
2549
2550void iwl_dump_csr(struct iwl_priv *priv)
2551{
2552 int i;
2553 u32 csr_tbl[] = {
2554 CSR_HW_IF_CONFIG_REG,
2555 CSR_INT_COALESCING,
2556 CSR_INT,
2557 CSR_INT_MASK,
2558 CSR_FH_INT_STATUS,
2559 CSR_GPIO_IN,
2560 CSR_RESET,
2561 CSR_GP_CNTRL,
2562 CSR_HW_REV,
2563 CSR_EEPROM_REG,
2564 CSR_EEPROM_GP,
2565 CSR_OTP_GP_REG,
2566 CSR_GIO_REG,
2567 CSR_GP_UCODE_REG,
2568 CSR_GP_DRIVER_REG,
2569 CSR_UCODE_DRV_GP1,
2570 CSR_UCODE_DRV_GP2,
2571 CSR_LED_REG,
2572 CSR_DRAM_INT_TBL_REG,
2573 CSR_GIO_CHICKEN_BITS,
2574 CSR_ANA_PLL_CFG,
2575 CSR_HW_REV_WA_REG,
2576 CSR_DBG_HPET_MEM_REG
2577 };
2578 IWL_ERR(priv, "CSR values:\n");
2579 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2580 "CSR_INT_PERIODIC_REG)\n");
2581 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2582 IWL_ERR(priv, " %25s: 0X%08x\n",
2583 get_csr_string(csr_tbl[i]),
2584 iwl_read32(priv, csr_tbl[i]));
2585 }
2586}
2587EXPORT_SYMBOL(iwl_dump_csr);
2588
a0ea9493 2589static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2590{
2591 switch (cmd) {
2592 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2593 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2594 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2595 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2596 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2597 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2598 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2599 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2600 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2601 default:
2602 return "UNKNOWN";
2603
2604 }
2605}
2606
2607int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2608{
2609 int i;
2610#ifdef CONFIG_IWLWIFI_DEBUG
2611 int pos = 0;
2612 size_t bufsz = 0;
2613#endif
2614 u32 fh_tbl[] = {
2615 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2616 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2617 FH_RSCSR_CHNL0_WPTR,
2618 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2619 FH_MEM_RSSR_SHARED_CTRL_REG,
2620 FH_MEM_RSSR_RX_STATUS_REG,
2621 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2622 FH_TSSR_TX_STATUS_REG,
2623 FH_TSSR_TX_ERROR_REG
2624 };
2625#ifdef CONFIG_IWLWIFI_DEBUG
2626 if (display) {
2627 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2628 *buf = kmalloc(bufsz, GFP_KERNEL);
2629 if (!*buf)
2630 return -ENOMEM;
2631 pos += scnprintf(*buf + pos, bufsz - pos,
2632 "FH register values:\n");
2633 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2634 pos += scnprintf(*buf + pos, bufsz - pos,
2635 " %34s: 0X%08x\n",
2636 get_fh_string(fh_tbl[i]),
2637 iwl_read_direct32(priv, fh_tbl[i]));
2638 }
2639 return pos;
2640 }
2641#endif
2642 IWL_ERR(priv, "FH register values:\n");
2643 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2644 IWL_ERR(priv, " %34s: 0X%08x\n",
2645 get_fh_string(fh_tbl[i]),
2646 iwl_read_direct32(priv, fh_tbl[i]));
2647 }
2648 return 0;
2649}
2650EXPORT_SYMBOL(iwl_dump_fh);
2651
a93e7973 2652static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2653{
2654 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2655 return;
2656
246ed355 2657 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 2658 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2659 return;
2660 }
2661 /*
2662 * There is no easy and better way to force reset the radio,
2663 * the only known method is switching channel which will force to
2664 * reset and tune the radio.
2665 * Use internal short scan (single channel) operation to should
2666 * achieve this objective.
2667 * Driver should reset the radio when number of consecutive missed
2668 * beacon, or any other uCode error condition detected.
2669 */
2670 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2671 iwl_internal_short_hw_scan(priv);
afbdd69a 2672}
a93e7973 2673
a93e7973 2674
c04f9f22 2675int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2676{
8a472da4
WYG		 2677 struct iwl_force_reset *force_reset;
2678
a93e7973
WYG		 2679 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2680 return -EINVAL;
2681
8a472da4
WYG		 2682 if (mode >= IWL_MAX_FORCE_RESET) {
2683 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2684 return -EINVAL;
2685 }
2686 force_reset = &priv->force_reset[mode];
2687 force_reset->reset_request_count++;
c04f9f22
WYG		 2688 if (!external) {
2689 if (force_reset->last_force_reset_jiffies &&
2690 time_after(force_reset->last_force_reset_jiffies +
2691 force_reset->reset_duration, jiffies)) {
2692 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2693 force_reset->reset_reject_count++;
2694 return -EAGAIN;
2695 }
a93e7973 2696 }
8a472da4
WYG		 2697 force_reset->reset_success_count++;
2698 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2699 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2700 switch (mode) {
2701 case IWL_RF_RESET:
2702 iwl_force_rf_reset(priv);
2703 break;
2704 case IWL_FW_RESET:
c04f9f22
WYG		 2705 /*
2706 * if the request is from external(ex: debugfs),
2707 * then always perform the request in regardless the module
2708 * parameter setting
2709 * if the request is from internal (uCode error or driver
2710 * detect failure), then fw_restart module parameter
2711 * need to be check before performing firmware reload
2712 */
2713 if (!external && !priv->cfg->mod_params->restart_fw) {
2714 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2715 "module parameter setting\n");
2716 break;
2717 }
a93e7973
WYG		 2718 IWL_ERR(priv, "On demand firmware reload\n");
2719 /* Set the FW error flag -- cleared on iwl_down */
2720 set_bit(STATUS_FW_ERROR, &priv->status);
2721 wake_up_interruptible(&priv->wait_command_queue);
2722 /*
2723 * Keep the restart process from trying to send host
2724 * commands by clearing the INIT status bit
2725 */
2726 clear_bit(STATUS_READY, &priv->status);
2727 queue_work(priv->workqueue, &priv->restart);
2728 break;
a93e7973 2729 }
a93e7973
WYG		 2730 return 0;
2731}
b74e31a9
WYG		 2732EXPORT_SYMBOL(iwl_force_reset);
2733
2734/**
2735 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2736 *
2737 * During normal condition (no queue is stuck), the timer is continually set to
2738 * execute every monitor_recover_period milliseconds after the last timer
2739 * expired. When the queue read_ptr is at the same place, the timer is
2740 * shorten to 100mSecs. This is
2741 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2742 * 2) to detect the stuck queues quicker before the station and AP can
2743 * disassociate each other.
2744 *
2745 * This function monitors all the tx queues and recover from it if any
2746 * of the queues are stuck.
2747 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2748 * it will recover by resetting the firmware and return.
2749 * 2. Then, it checks for station association. If it associates it will check
2750 * other queues. If any queue is stuck, it will recover by resetting
2751 * the firmware.
2752 * Note: It the number of times the queue read_ptr to be at the same place to
2753 * be MAX_REPEAT+1 in order to consider to be stuck.
2754 */
2755/*
2756 * The maximum number of times the read pointer of the tx queue at the
2757 * same place without considering to be stuck.
2758 */
2759#define MAX_REPEAT (2)
2760static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2761{
2762 struct iwl_tx_queue *txq;
2763 struct iwl_queue *q;
2764
2765 txq = &priv->txq[cnt];
2766 q = &txq->q;
2767 /* queue is empty, skip */
2768 if (q->read_ptr != q->write_ptr) {
2769 if (q->read_ptr == q->last_read_ptr) {
2770 /* a queue has not been read from last time */
2771 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2772 IWL_ERR(priv,
2773 "queue %d stuck %d time. Fw reload.\n",
2774 q->id, q->repeat_same_read_ptr);
2775 q->repeat_same_read_ptr = 0;
c04f9f22 2776 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG		 2777 } else {
2778 q->repeat_same_read_ptr++;
2779 IWL_DEBUG_RADIO(priv,
2780 "queue %d, not read %d time\n",
2781 q->id,
2782 q->repeat_same_read_ptr);
74e5c41b
WYG		 2783 if (!priv->cfg->advanced_bt_coexist) {
2784 mod_timer(&priv->monitor_recover,
2785 jiffies + msecs_to_jiffies(
2786 IWL_ONE_HUNDRED_MSECS));
2787 return 1;
2788 }
b74e31a9 2789 }
74e5c41b 2790 return 0;
b74e31a9
WYG		 2791 } else {
2792 q->last_read_ptr = q->read_ptr;
2793 q->repeat_same_read_ptr = 0;
2794 }
2795 }
2796 return 0;
2797}
2798
2799void iwl_bg_monitor_recover(unsigned long data)
2800{
2801 struct iwl_priv *priv = (struct iwl_priv *)data;
2802 int cnt;
2803
2804 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2805 return;
2806
2807 /* monitor and check for stuck cmd queue */
13bb9483 2808 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG		 2809 return;
2810
2811 /* monitor and check for other stuck queues */
246ed355 2812 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG		 2813 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2814 /* skip as we already checked the command queue */
13bb9483 2815 if (cnt == priv->cmd_queue)
b74e31a9
WYG		 2816 continue;
2817 if (iwl_check_stuck_queue(priv, cnt))
2818 return;
2819 }
2820 }
7bdc473c
WYG		 2821 if (priv->cfg->monitor_recover_period) {
2822 /*
2823 * Reschedule the timer to occur in
2824 * priv->cfg->monitor_recover_period
2825 */
2826 mod_timer(&priv->monitor_recover, jiffies + msecs_to_jiffies(
2827 priv->cfg->monitor_recover_period));
2828 }
b74e31a9
WYG		 2829}
2830EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2831
a0ee74cf
WYG		 2832
2833/*
2834 * extended beacon time format
2835 * time in usec will be changed into a 32-bit value in extended:internal format
2836 * the extended part is the beacon counts
2837 * the internal part is the time in usec within one beacon interval
2838 */
2839u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2840{
2841 u32 quot;
2842 u32 rem;
2843 u32 interval = beacon_interval * TIME_UNIT;
2844
2845 if (!interval || !usec)
2846 return 0;
2847
2848 quot = (usec / interval) &
2849 (iwl_beacon_time_mask_high(priv,
2850 priv->hw_params.beacon_time_tsf_bits) >>
2851 priv->hw_params.beacon_time_tsf_bits);
2852 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2853 priv->hw_params.beacon_time_tsf_bits);
2854
2855 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2856}
2857EXPORT_SYMBOL(iwl_usecs_to_beacons);
2858
2859/* base is usually what we get from ucode with each received frame,
2860 * the same as HW timer counter counting down
2861 */
2862__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2863 u32 addon, u32 beacon_interval)
2864{
2865 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2866 priv->hw_params.beacon_time_tsf_bits);
2867 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2868 priv->hw_params.beacon_time_tsf_bits);
2869 u32 interval = beacon_interval * TIME_UNIT;
2870 u32 res = (base & iwl_beacon_time_mask_high(priv,
2871 priv->hw_params.beacon_time_tsf_bits)) +
2872 (addon & iwl_beacon_time_mask_high(priv,
2873 priv->hw_params.beacon_time_tsf_bits));
2874
2875 if (base_low > addon_low)
2876 res += base_low - addon_low;
2877 else if (base_low < addon_low) {
2878 res += interval + base_low - addon_low;
2879 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2880 } else
2881 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2882
2883 return cpu_to_le32(res);
2884}
2885EXPORT_SYMBOL(iwl_add_beacon_time);
2886
6da3a13e
WYG		 2887#ifdef CONFIG_PM
2888
2889int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2890{
2891 struct iwl_priv *priv = pci_get_drvdata(pdev);
2892
2893 /*
2894 * This function is called when system goes into suspend state
2895 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2896 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2897 * it will not call apm_ops.stop() to stop the DMA operation.
2898 * Calling apm_ops.stop here to make sure we stop the DMA.
2899 */
2900 priv->cfg->ops->lib->apm_ops.stop(priv);
2901
2902 pci_save_state(pdev);
2903 pci_disable_device(pdev);
2904 pci_set_power_state(pdev, PCI_D3hot);
2905
2906 return 0;
2907}
2908EXPORT_SYMBOL(iwl_pci_suspend);
2909
2910int iwl_pci_resume(struct pci_dev *pdev)
2911{
2912 struct iwl_priv *priv = pci_get_drvdata(pdev);
2913 int ret;
0ab84cff 2914 bool hw_rfkill = false;
6da3a13e 2915
cd398c31
AK		 2916 /*
2917 * We disable the RETRY_TIMEOUT register (0x41) to keep
2918 * PCI Tx retries from interfering with C3 CPU state.
2919 */
2920 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2921
6da3a13e
WYG		 2922 pci_set_power_state(pdev, PCI_D0);
2923 ret = pci_enable_device(pdev);
2924 if (ret)
2925 return ret;
2926 pci_restore_state(pdev);
2927 iwl_enable_interrupts(priv);
2928
0ab84cff
JB		 2929 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2930 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2931 hw_rfkill = true;
2932
2933 if (hw_rfkill)
2934 set_bit(STATUS_RF_KILL_HW, &priv->status);
2935 else
2936 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2937
2938 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2939
6da3a13e
WYG		 2940 return 0;
2941}
2942EXPORT_SYMBOL(iwl_pci_resume);
2943
2944#endif /* CONFIG_PM */
Linux kernel - Deliverables
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