iwlagn: add correct firmware name for 135 series
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW
2 *
3 * GPL LICENSE SUMMARY
4 *
901069c7 5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
df48c323
TW
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
9d143e9a 44#include "iwl-agn.h"
df48c323 45
a562a9dd 46u32 iwl_debug_level;
a562a9dd 47
57bd1bea 48const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
57bd1bea 49
d9fe60de
JB
50#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
51#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 52static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 53 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR
54 enum ieee80211_band band)
55{
39130df3
RR
56 u16 max_bit_rate = 0;
57 u8 rx_chains_num = priv->hw_params.rx_chains_num;
58 u8 tx_chains_num = priv->hw_params.tx_chains_num;
59
c7de35cd 60 ht_info->cap = 0;
d9fe60de 61 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 62
d9fe60de 63 ht_info->ht_supported = true;
c7de35cd 64
7cb1b088
WYG
65 if (priv->cfg->ht_params &&
66 priv->cfg->ht_params->ht_greenfield_support)
b261793d 67 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 68 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 69 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 70 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB
71 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
72 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
73 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 74 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 75 }
c7de35cd 76
9d143e9a 77 if (iwlagn_mod_params.amsdu_size_8K)
d9fe60de 78 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR
79
80 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
7cb1b088
WYG
81 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
82 ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
c7de35cd 83 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
7cb1b088
WYG
84 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
85 ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
c7de35cd 86
d9fe60de 87 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 88 if (rx_chains_num >= 2)
d9fe60de 89 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 90 if (rx_chains_num >= 3)
d9fe60de 91 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR
92
93 /* Highest supported Rx data rate */
94 max_bit_rate *= rx_chains_num;
d9fe60de
JB
95 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
96 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR
97
98 /* Tx MCS capabilities */
d9fe60de 99 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 100 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB
101 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
102 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
103 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 104 }
c7de35cd 105}
c7de35cd 106
c7de35cd
RR
107/**
108 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
109 */
534166de 110int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR
111{
112 struct iwl_channel_info *ch;
113 struct ieee80211_supported_band *sband;
114 struct ieee80211_channel *channels;
115 struct ieee80211_channel *geo_ch;
116 struct ieee80211_rate *rates;
117 int i = 0;
75d80cad 118 s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR
119
120 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
121 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 122 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR
123 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
124 return 0;
125 }
126
127 channels = kzalloc(sizeof(struct ieee80211_channel) *
128 priv->channel_count, GFP_KERNEL);
129 if (!channels)
130 return -ENOMEM;
131
5027309b 132 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR
133 GFP_KERNEL);
134 if (!rates) {
135 kfree(channels);
136 return -ENOMEM;
137 }
138
139 /* 5.2GHz channels start after the 2.4GHz channels */
140 sband = &priv->bands[IEEE80211_BAND_5GHZ];
141 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
142 /* just OFDM */
143 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 144 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 145
88950758 146 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
d9fe60de 147 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 148 IEEE80211_BAND_5GHZ);
c7de35cd
RR
149
150 sband = &priv->bands[IEEE80211_BAND_2GHZ];
151 sband->channels = channels;
152 /* OFDM & CCK */
153 sband->bitrates = rates;
5027309b 154 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 155
88950758 156 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
d9fe60de 157 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 158 IEEE80211_BAND_2GHZ);
c7de35cd
RR
159
160 priv->ieee_channels = channels;
161 priv->ieee_rates = rates;
162
c7de35cd
RR
163 for (i = 0; i < priv->channel_count; i++) {
164 ch = &priv->channel_info[i];
165
166 /* FIXME: might be removed if scan is OK */
167 if (!is_channel_valid(ch))
168 continue;
169
5a3a0352 170 sband = &priv->bands[ch->band];
c7de35cd
RR
171
172 geo_ch = &sband->channels[sband->n_channels++];
173
174 geo_ch->center_freq =
5a3a0352 175 ieee80211_channel_to_frequency(ch->channel, ch->band);
c7de35cd
RR
176 geo_ch->max_power = ch->max_power_avg;
177 geo_ch->max_antenna_gain = 0xff;
178 geo_ch->hw_value = ch->channel;
179
180 if (is_channel_valid(ch)) {
181 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
182 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
183
184 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
185 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
186
187 if (ch->flags & EEPROM_CHANNEL_RADAR)
188 geo_ch->flags |= IEEE80211_CHAN_RADAR;
189
7aafef1c 190 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 191
75d80cad
SG
192 if (ch->max_power_avg > max_tx_power)
193 max_tx_power = ch->max_power_avg;
c7de35cd
RR
194 } else {
195 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
196 }
197
e1623446 198 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR
199 ch->channel, geo_ch->center_freq,
200 is_channel_a_band(ch) ? "5.2" : "2.4",
201 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
202 "restricted" : "valid",
203 geo_ch->flags);
204 }
205
75d80cad
SG
206 priv->tx_power_device_lmt = max_tx_power;
207 priv->tx_power_user_lmt = max_tx_power;
208 priv->tx_power_next = max_tx_power;
209
c7de35cd 210 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
88950758 211 priv->cfg->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
19707bac
EG
212 char buf[32];
213 priv->bus.ops->get_hw_id(&priv->bus, buf, sizeof(buf));
978785a3 214 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
19707bac 215 "Please send your %s to maintainer.\n", buf);
88950758 216 priv->cfg->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
c7de35cd
RR
217 }
218
978785a3 219 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO
220 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
221 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR
222
223 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
224
225 return 0;
226}
227
228/*
229 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
230 */
534166de 231void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR
232{
233 kfree(priv->ieee_channels);
234 kfree(priv->ieee_rates);
235 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
236}
c7de35cd 237
7e6a5886
JB
238static bool iwl_is_channel_extension(struct iwl_priv *priv,
239 enum ieee80211_band band,
240 u16 channel, u8 extension_chan_offset)
47c5196e
TW
241{
242 const struct iwl_channel_info *ch_info;
243
244 ch_info = iwl_get_channel_info(priv, band, channel);
245 if (!is_channel_valid(ch_info))
7e6a5886 246 return false;
47c5196e 247
d9fe60de 248 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 249 return !(ch_info->ht40_extension_channel &
689da1b3 250 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 251 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 252 return !(ch_info->ht40_extension_channel &
689da1b3 253 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 254
7e6a5886 255 return false;
47c5196e
TW
256}
257
7e6a5886
JB
258bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
259 struct iwl_rxon_context *ctx,
260 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 261{
7e6a5886
JB
262 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
263 return false;
47c5196e 264
7e6a5886
JB
265 /*
266 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG
267 * the bit will not set if it is pure 40MHz case
268 */
7e6a5886
JB
269 if (ht_cap && !ht_cap->ht_supported)
270 return false;
271
d73e4923 272#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 273 if (priv->disable_ht40)
7e6a5886 274 return false;
1e4247d4 275#endif
7e6a5886 276
611d3eb7 277 return iwl_is_channel_extension(priv, priv->band,
246ed355 278 le16_to_cpu(ctx->staging.channel),
7e6a5886 279 ctx->ht.extension_chan_offset);
47c5196e 280}
47c5196e 281
2c2f3b33
TW
282static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
283{
ea196fdb
JB
284 u16 new_val;
285 u16 beacon_factor;
286
287 /*
288 * If mac80211 hasn't given us a beacon interval, program
289 * the default into the device (not checking this here
290 * would cause the adjustment below to return the maximum
291 * value, which may break PAN.)
292 */
293 if (!beacon_val)
294 return DEFAULT_BEACON_INTERVAL;
295
296 /*
297 * If the beacon interval we obtained from the peer
298 * is too large, we'll have to wake up more often
299 * (and in IBSS case, we'll beacon too much)
300 *
301 * For example, if max_beacon_val is 4096, and the
302 * requested beacon interval is 7000, we'll have to
303 * use 3500 to be able to wake up on the beacons.
304 *
305 * This could badly influence beacon detection stats.
306 */
2c2f3b33
TW
307
308 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
309 new_val = beacon_val / beacon_factor;
310
311 if (!new_val)
312 new_val = max_beacon_val;
313
314 return new_val;
315}
316
47313e34 317int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW
318{
319 u64 tsf;
320 s32 interval_tm, rem;
2c2f3b33
TW
321 struct ieee80211_conf *conf = NULL;
322 u16 beacon_int;
47313e34 323 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW
324
325 conf = ieee80211_get_hw_conf(priv->hw);
326
948f5a2f
JB
327 lockdep_assert_held(&priv->mutex);
328
246ed355 329 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 330
246ed355
JB
331 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
332 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 333
47313e34 334 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 335
47313e34
JB
336 /*
337 * TODO: For IBSS we need to get atim_window from mac80211,
338 * for now just always use 0
339 */
340 ctx->timing.atim_window = 0;
2c2f3b33 341
bde4530e 342 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB
343 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
344 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
345 priv->contexts[IWL_RXON_CTX_BSS].vif &&
346 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB
347 ctx->timing.beacon_interval =
348 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
349 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB
350 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
351 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
352 priv->contexts[IWL_RXON_CTX_PAN].vif &&
353 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
354 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
355 !ctx->vif->bss_conf.beacon_int)) {
356 ctx->timing.beacon_interval =
357 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
358 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB
359 } else {
360 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 361 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB
362 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
363 }
2c2f3b33
TW
364
365 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 366 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 367 rem = do_div(tsf, interval_tm);
246ed355 368 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 369
47313e34 370 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 371
2c2f3b33
TW
372 IWL_DEBUG_ASSOC(priv,
373 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB
374 le16_to_cpu(ctx->timing.beacon_interval),
375 le32_to_cpu(ctx->timing.beacon_init_val),
376 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 377
8f2d3d2a 378 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 379 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 380}
2c2f3b33 381
246ed355
JB
382void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
383 int hw_decrypt)
8ccde88a 384{
246ed355 385 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO
386
387 if (hw_decrypt)
388 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
389 else
390 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
391
392}
8ccde88a 393
dacefedb 394/* validate RXON structure is valid */
246ed355 395int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a 396{
246ed355 397 struct iwl_rxon_cmd *rxon = &ctx->staging;
c914ac26 398 u32 errors = 0;
8ccde88a
SO
399
400 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
dacefedb
JB
401 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
402 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
c914ac26 403 errors |= BIT(0);
dacefedb
JB
404 }
405 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
406 IWL_WARN(priv, "check 2.4G: wrong radar\n");
c914ac26 407 errors |= BIT(1);
dacefedb 408 }
8ccde88a 409 } else {
dacefedb
JB
410 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
411 IWL_WARN(priv, "check 5.2G: not short slot!\n");
c914ac26 412 errors |= BIT(2);
dacefedb
JB
413 }
414 if (rxon->flags & RXON_FLG_CCK_MSK) {
415 IWL_WARN(priv, "check 5.2G: CCK!\n");
c914ac26 416 errors |= BIT(3);
dacefedb
JB
417 }
418 }
419 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
420 IWL_WARN(priv, "mac/bssid mcast!\n");
c914ac26 421 errors |= BIT(4);
8ccde88a 422 }
8ccde88a
SO
423
424 /* make sure basic rates 6Mbps and 1Mbps are supported */
dacefedb
JB
425 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
426 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
427 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
c914ac26 428 errors |= BIT(5);
dacefedb 429 }
8ccde88a 430
dacefedb
JB
431 if (le16_to_cpu(rxon->assoc_id) > 2007) {
432 IWL_WARN(priv, "aid > 2007\n");
c914ac26 433 errors |= BIT(6);
dacefedb 434 }
8ccde88a 435
dacefedb
JB
436 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
437 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
438 IWL_WARN(priv, "CCK and short slot\n");
c914ac26 439 errors |= BIT(7);
dacefedb 440 }
8ccde88a 441
dacefedb
JB
442 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
443 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
444 IWL_WARN(priv, "CCK and auto detect");
c914ac26 445 errors |= BIT(8);
dacefedb 446 }
8ccde88a 447
dacefedb
JB
448 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
449 RXON_FLG_TGG_PROTECT_MSK)) ==
450 RXON_FLG_TGG_PROTECT_MSK) {
451 IWL_WARN(priv, "TGg but no auto-detect\n");
c914ac26 452 errors |= BIT(9);
dacefedb 453 }
8ccde88a 454
c914ac26
JB
455 if (rxon->channel == 0) {
456 IWL_WARN(priv, "zero channel is invalid\n");
457 errors |= BIT(10);
8ccde88a 458 }
c914ac26
JB
459
460 WARN(errors, "Invalid RXON (%#x), channel %d",
461 errors, le16_to_cpu(rxon->channel));
462
463 return errors ? -EINVAL : 0;
8ccde88a 464}
8ccde88a
SO
465
466/**
467 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
468 * @priv: staging_rxon is compared to active_rxon
469 *
470 * If the RXON structure is changing enough to require a new tune,
471 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
472 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
473 */
246ed355
JB
474int iwl_full_rxon_required(struct iwl_priv *priv,
475 struct iwl_rxon_context *ctx)
8ccde88a 476{
246ed355
JB
477 const struct iwl_rxon_cmd *staging = &ctx->staging;
478 const struct iwl_rxon_cmd *active = &ctx->active;
479
480#define CHK(cond) \
481 if ((cond)) { \
482 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
483 return 1; \
484 }
485
486#define CHK_NEQ(c1, c2) \
487 if ((c1) != (c2)) { \
488 IWL_DEBUG_INFO(priv, "need full RXON - " \
489 #c1 " != " #c2 " - %d != %d\n", \
490 (c1), (c2)); \
491 return 1; \
492 }
8ccde88a
SO
493
494 /* These items are only settable from the full RXON command */
246ed355
JB
495 CHK(!iwl_is_associated_ctx(ctx));
496 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
497 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
498 CHK(compare_ether_addr(staging->wlap_bssid_addr,
499 active->wlap_bssid_addr));
500 CHK_NEQ(staging->dev_type, active->dev_type);
501 CHK_NEQ(staging->channel, active->channel);
502 CHK_NEQ(staging->air_propagation, active->air_propagation);
503 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
504 active->ofdm_ht_single_stream_basic_rates);
505 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
506 active->ofdm_ht_dual_stream_basic_rates);
507 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
508 active->ofdm_ht_triple_stream_basic_rates);
509 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO
510
511 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
512 * be updated with the RXON_ASSOC command -- however only some
513 * flag transitions are allowed using RXON_ASSOC */
514
515 /* Check if we are not switching bands */
246ed355
JB
516 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
517 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO
518
519 /* Check if we are switching association toggle */
246ed355
JB
520 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
521 active->filter_flags & RXON_FILTER_ASSOC_MSK);
522
523#undef CHK
524#undef CHK_NEQ
8ccde88a
SO
525
526 return 0;
527}
8ccde88a 528
246ed355
JB
529static void _iwl_set_rxon_ht(struct iwl_priv *priv,
530 struct iwl_ht_config *ht_conf,
531 struct iwl_rxon_context *ctx)
47c5196e 532{
246ed355 533 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 534
7e6a5886 535 if (!ctx->ht.enabled) {
a2b0f02e 536 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 537 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 538 RXON_FLG_HT40_PROT_MSK |
42eb7c64 539 RXON_FLG_HT_PROT_MSK);
47c5196e 540 return;
42eb7c64 541 }
47c5196e 542
7e6a5886 543 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG
544 * will be needed for rxon->flags
545 */
7e6a5886 546 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG
547
548 /* Set up channel bandwidth:
7aafef1c 549 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG
550 /* clear the HT channel mode before set the mode */
551 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
552 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 553 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 554 /* pure ht40 */
7e6a5886 555 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 556 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 557 /* Note: control channel is opposite of extension channel */
7e6a5886 558 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG
559 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
560 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
561 break;
562 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
563 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
564 break;
565 }
566 } else {
a2b0f02e 567 /* Note: control channel is opposite of extension channel */
7e6a5886 568 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG
569 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
570 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
571 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
572 break;
573 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
574 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
575 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
576 break;
577 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
578 default:
579 /* channel location only valid if in Mixed mode */
580 IWL_ERR(priv, "invalid extension channel offset\n");
581 break;
582 }
583 }
584 } else {
585 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW
586 }
587
45823531 588 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 589 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 590
02bb1bea 591 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 592 "extension channel offset 0x%x\n",
7e6a5886
JB
593 le32_to_cpu(rxon->flags), ctx->ht.protection,
594 ctx->ht.extension_chan_offset);
47c5196e 595}
246ed355
JB
596
597void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
598{
599 struct iwl_rxon_context *ctx;
600
601 for_each_context(priv, ctx)
602 _iwl_set_rxon_ht(priv, ht_conf, ctx);
603}
47c5196e 604
246ed355 605/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 606u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 607 enum ieee80211_band band)
14023641
AK
608{
609 const struct iwl_channel_info *ch_info;
610 int i;
611 u8 channel = 0;
246ed355
JB
612 u8 min, max;
613 struct iwl_rxon_context *ctx;
14023641 614
14023641 615 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB
616 min = 14;
617 max = priv->channel_count;
14023641 618 } else {
246ed355
JB
619 min = 0;
620 max = 14;
621 }
622
623 for (i = min; i < max; i++) {
624 bool busy = false;
625
626 for_each_context(priv, ctx) {
627 busy = priv->channel_info[i].channel ==
628 le16_to_cpu(ctx->staging.channel);
629 if (busy)
630 break;
14023641 631 }
246ed355
JB
632
633 if (busy)
634 continue;
635
636 channel = priv->channel_info[i].channel;
637 ch_info = iwl_get_channel_info(priv, band, channel);
638 if (is_channel_valid(ch_info))
639 break;
14023641
AK
640 }
641
642 return channel;
643}
14023641 644
bf85ea4f 645/**
3edb5fd6
SZ
646 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
647 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 648
bf85ea4f 649 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 650 * in the staging RXON flag structure based on the ch->band
bf85ea4f 651 */
246ed355
JB
652int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
653 struct iwl_rxon_context *ctx)
bf85ea4f 654{
17e72782 655 enum ieee80211_band band = ch->band;
81e95430 656 u16 channel = ch->hw_value;
17e72782 657
246ed355 658 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK
659 (priv->band == band))
660 return 0;
661
246ed355 662 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 663 if (band == IEEE80211_BAND_5GHZ)
246ed355 664 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 665 else
246ed355 666 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK
667
668 priv->band = band;
669
e1623446 670 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK
671
672 return 0;
673}
bf85ea4f 674
79d07325 675void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 676 struct iwl_rxon_context *ctx,
79d07325
WYG
677 enum ieee80211_band band,
678 struct ieee80211_vif *vif)
8ccde88a
SO
679{
680 if (band == IEEE80211_BAND_5GHZ) {
246ed355 681 ctx->staging.flags &=
8ccde88a
SO
682 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
683 | RXON_FLG_CCK_MSK);
246ed355 684 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO
685 } else {
686 /* Copied from iwl_post_associate() */
c213d745 687 if (vif && vif->bss_conf.use_short_slot)
246ed355 688 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 689 else
246ed355 690 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 691
246ed355
JB
692 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
693 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
694 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO
695 }
696}
8ccde88a
SO
697
698/*
699 * initialize rxon structure with default values from eeprom
700 */
1dda6d28 701void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 702 struct iwl_rxon_context *ctx)
8ccde88a
SO
703{
704 const struct iwl_channel_info *ch_info;
705
246ed355 706 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 707
d0fe478c
JB
708 if (!ctx->vif) {
709 ctx->staging.dev_type = ctx->unused_devtype;
710 } else switch (ctx->vif->type) {
8ccde88a 711 case NL80211_IFTYPE_AP:
d0fe478c 712 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO
713 break;
714
715 case NL80211_IFTYPE_STATION:
d0fe478c 716 ctx->staging.dev_type = ctx->station_devtype;
246ed355 717 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO
718 break;
719
720 case NL80211_IFTYPE_ADHOC:
d0fe478c 721 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB
722 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
723 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO
724 RXON_FILTER_ACCEPT_GRP_MSK;
725 break;
726
8ccde88a 727 default:
d0fe478c
JB
728 IWL_ERR(priv, "Unsupported interface type %d\n",
729 ctx->vif->type);
8ccde88a
SO
730 break;
731 }
732
733#if 0
734 /* TODO: Figure out when short_preamble would be set and cache from
735 * that */
736 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 737 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 738 else
246ed355 739 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO
740#endif
741
742 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 743 le16_to_cpu(ctx->active.channel));
8ccde88a
SO
744
745 if (!ch_info)
746 ch_info = &priv->channel_info[0];
747
246ed355 748 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO
749 priv->band = ch_info->band;
750
d0fe478c 751 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 752
246ed355 753 ctx->staging.ofdm_basic_rates =
8ccde88a 754 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 755 ctx->staging.cck_basic_rates =
8ccde88a
SO
756 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
757
a2b0f02e 758 /* clear both MIX and PURE40 mode flag */
246ed355 759 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 760 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB
761 if (ctx->vif)
762 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 763
246ed355
JB
764 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
765 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
766 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a 767}
8ccde88a 768
79d07325 769void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO
770{
771 const struct ieee80211_supported_band *hw = NULL;
772 struct ieee80211_rate *rate;
246ed355 773 struct iwl_rxon_context *ctx;
8ccde88a
SO
774 int i;
775
776 hw = iwl_get_hw_mode(priv, priv->band);
777 if (!hw) {
778 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
779 return;
780 }
781
782 priv->active_rate = 0;
8ccde88a
SO
783
784 for (i = 0; i < hw->n_bitrates; i++) {
785 rate = &(hw->bitrates[i]);
5027309b 786 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO
787 priv->active_rate |= (1 << rate->hw_value);
788 }
789
4a02886b 790 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 791
246ed355
JB
792 for_each_context(priv, ctx) {
793 ctx->staging.cck_basic_rates =
794 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 795
246ed355
JB
796 ctx->staging.ofdm_basic_rates =
797 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
798 }
8ccde88a 799}
79d07325
WYG
800
801void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
802{
8bd413e6
JB
803 /*
804 * MULTI-FIXME
805 * See iwl_mac_channel_switch.
806 */
807 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
808
79d07325
WYG
809 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
810 return;
811
6f213ff1 812 if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
8bd413e6 813 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325 814}
8ccde88a 815
8ccde88a 816#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB
817void iwl_print_rx_config_cmd(struct iwl_priv *priv,
818 struct iwl_rxon_context *ctx)
8ccde88a 819{
246ed355 820 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 821
e1623446 822 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 823 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW
824 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
825 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
826 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 827 le32_to_cpu(rxon->filter_flags));
e1623446
TW
828 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
829 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 830 rxon->ofdm_basic_rates);
e1623446
TW
831 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
832 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
833 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
834 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 835}
6686d17e 836#endif
e649437f 837
e74fe233
JB
838static void iwlagn_abort_notification_waits(struct iwl_priv *priv)
839{
840 unsigned long flags;
841 struct iwl_notification_wait *wait_entry;
842
843 spin_lock_irqsave(&priv->_agn.notif_wait_lock, flags);
844 list_for_each_entry(wait_entry, &priv->_agn.notif_waits, list)
845 wait_entry->aborted = true;
846 spin_unlock_irqrestore(&priv->_agn.notif_wait_lock, flags);
847
848 wake_up_all(&priv->_agn.notif_waitq);
849}
850
e649437f 851void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
8ccde88a 852{
491bc292
WYG
853 unsigned int reload_msec;
854 unsigned long reload_jiffies;
855
8ccde88a
SO
856 /* Set the FW error flag -- cleared on iwl_down */
857 set_bit(STATUS_FW_ERROR, &priv->status);
858
859 /* Cancel currently queued command. */
860 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
861
e74fe233
JB
862 iwlagn_abort_notification_waits(priv);
863
e649437f
JB
864 /* Keep the restart process from trying to send host
865 * commands by clearing the ready bit */
866 clear_bit(STATUS_READY, &priv->status);
867
868 wake_up_interruptible(&priv->wait_command_queue);
869
870 if (!ondemand) {
871 /*
872 * If firmware keep reloading, then it indicate something
873 * serious wrong and firmware having problem to recover
874 * from it. Instead of keep trying which will fill the syslog
875 * and hang the system, let's just stop it
876 */
877 reload_jiffies = jiffies;
878 reload_msec = jiffies_to_msecs((long) reload_jiffies -
879 (long) priv->reload_jiffies);
880 priv->reload_jiffies = reload_jiffies;
881 if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
882 priv->reload_count++;
883 if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
884 IWL_ERR(priv, "BUG_ON, Stop restarting\n");
885 return;
886 }
887 } else
888 priv->reload_count = 0;
889 }
890
891 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
9d143e9a 892 if (iwlagn_mod_params.restart_fw) {
e649437f
JB
893 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
894 "Restarting adapter due to uCode error.\n");
895 queue_work(priv->workqueue, &priv->restart);
896 } else
897 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
898 "Detected FW error, but not restarting\n");
899 }
900}
901
902/**
903 * iwl_irq_handle_error - called for HW or SW error interrupt from card
904 */
905void iwl_irq_handle_error(struct iwl_priv *priv)
906{
50619ac9
WYG
907 /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
908 if (priv->cfg->internal_wimax_coex &&
909 (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
910 APMS_CLK_VAL_MRB_FUNC_MODE) ||
911 (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
912 APMG_PS_CTRL_VAL_RESET_REQ))) {
50619ac9 913 /*
e649437f
JB
914 * Keep the restart process from trying to send host
915 * commands by clearing the ready bit.
50619ac9
WYG
916 */
917 clear_bit(STATUS_READY, &priv->status);
e649437f
JB
918 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
919 wake_up_interruptible(&priv->wait_command_queue);
50619ac9
WYG
920 IWL_ERR(priv, "RF is used by WiMAX\n");
921 return;
922 }
923
459bc732
SZ
924 IWL_ERR(priv, "Loaded firmware version: %s\n",
925 priv->hw->wiphy->fw_version);
926
3ecccbcd
WYG
927 iwl_dump_nic_error_log(priv);
928 iwl_dump_csr(priv);
929 iwl_dump_fh(priv, NULL, false);
930 iwl_dump_nic_event_log(priv, false, NULL, false);
8ccde88a 931#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 932 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB
933 iwl_print_rx_config_cmd(priv,
934 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO
935#endif
936
e649437f 937 iwlagn_fw_error(priv, false);
8ccde88a 938}
8ccde88a 939
f8e200de 940static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 941{
5220af0c 942 int ret = 0;
d68b603c 943
5220af0c 944 /* stop device's busmaster DMA activity */
d68b603c
AK
945 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
946
5220af0c 947 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 948 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC
949 if (ret)
950 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 951
d68b603c
AK
952 IWL_DEBUG_INFO(priv, "stop master\n");
953
5220af0c 954 return ret;
d68b603c 955}
d68b603c
AK
956
957void iwl_apm_stop(struct iwl_priv *priv)
958{
fadb3582
BC
959 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
960
9d39e5ba
JB
961 clear_bit(STATUS_DEVICE_ENABLED, &priv->status);
962
5220af0c 963 /* Stop device's DMA activity */
d68b603c
AK
964 iwl_apm_stop_master(priv);
965
5220af0c 966 /* Reset the entire device */
d68b603c
AK
967 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
968
969 udelay(10);
5220af0c
BC
970
971 /*
972 * Clear "initialization complete" bit to move adapter from
973 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
974 */
d68b603c 975 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c 976}
d68b603c 977
fadb3582
BC
978
979/*
980 * Start up NIC's basic functionality after it has been reset
981 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
982 * NOTE: This does not load uCode nor start the embedded processor
983 */
984int iwl_apm_init(struct iwl_priv *priv)
985{
986 int ret = 0;
fadb3582
BC
987 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
988
989 /*
990 * Use "set_bit" below rather than "write", to preserve any hardware
991 * bits already set by default after reset.
992 */
993
994 /* Disable L0S exit timer (platform NMI Work/Around) */
995 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
996 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
997
998 /*
999 * Disable L0s without affecting L1;
1000 * don't wait for ICH L0s (ICH bug W/A)
1001 */
1002 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1003 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1004
1005 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1006 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1007
1008 /*
1009 * Enable HAP INTA (interrupt from management bus) to
1010 * wake device's PCI Express link L1a -> L0s
fadb3582
BC
1011 */
1012 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1013 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1014
d57fa99d 1015 priv->bus.ops->apm_config(&priv->bus);
fadb3582
BC
1016
1017 /* Configure analog phase-lock-loop before activating to D0A */
7cb1b088
WYG
1018 if (priv->cfg->base_params->pll_cfg_val)
1019 iwl_set_bit(priv, CSR_ANA_PLL_CFG,
1020 priv->cfg->base_params->pll_cfg_val);
fadb3582
BC
1021
1022 /*
1023 * Set "initialization complete" bit to move adapter from
1024 * D0U* --> D0A* (powered-up active) state.
1025 */
1026 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1027
1028 /*
1029 * Wait for clock stabilization; once stabilized, access to
1030 * device-internal resources is supported, e.g. iwl_write_prph()
1031 * and accesses to uCode SRAM.
1032 */
1033 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1034 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1035 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1036 if (ret < 0) {
1037 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1038 goto out;
1039 }
1040
1041 /*
917b6777 1042 * Enable DMA clock and wait for it to stabilize.
fadb3582
BC
1043 *
1044 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1045 * do not disable clocks. This preserves any hardware bits already
1046 * set by default in "CLK_CTRL_REG" after reset.
1047 */
917b6777 1048 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
fadb3582
BC
1049 udelay(20);
1050
1051 /* Disable L1-Active */
1052 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1053 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1054
9d39e5ba
JB
1055 set_bit(STATUS_DEVICE_ENABLED, &priv->status);
1056
fadb3582
BC
1057out:
1058 return ret;
1059}
fadb3582
BC
1060
1061
630fe9b6
TW
1062int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1063{
a25a66ac
SG
1064 int ret;
1065 s8 prev_tx_power;
f844a709
SG
1066 bool defer;
1067 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
a25a66ac
SG
1068
1069 lockdep_assert_held(&priv->mutex);
1070
1071 if (priv->tx_power_user_lmt == tx_power && !force)
1072 return 0;
1073
b744cb79
WYG
1074 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1075 IWL_WARN(priv,
1076 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1077 tx_power,
b744cb79 1078 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW
1079 return -EINVAL;
1080 }
1081
dc1b0973 1082 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG
1083 IWL_WARN(priv,
1084 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1085 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW
1086 return -EINVAL;
1087 }
1088
a25a66ac
SG
1089 if (!iwl_is_ready_rf(priv))
1090 return -EIO;
630fe9b6 1091
f844a709
SG
1092 /* scan complete and commit_rxon use tx_power_next value,
1093 * it always need to be updated for newest request */
a25a66ac 1094 priv->tx_power_next = tx_power;
f844a709
SG
1095
1096 /* do not set tx power when scanning or channel changing */
1097 defer = test_bit(STATUS_SCANNING, &priv->status) ||
1098 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
1099 if (defer && !force) {
1100 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
a25a66ac 1101 return 0;
5eadd94b 1102 }
630fe9b6 1103
a25a66ac
SG
1104 prev_tx_power = priv->tx_power_user_lmt;
1105 priv->tx_power_user_lmt = tx_power;
1106
5beaaf37 1107 ret = iwlagn_send_tx_power(priv);
a25a66ac
SG
1108
1109 /* if fail to set tx_power, restore the orig. tx power */
1110 if (ret) {
1111 priv->tx_power_user_lmt = prev_tx_power;
1112 priv->tx_power_next = prev_tx_power;
1113 }
630fe9b6
TW
1114 return ret;
1115}
630fe9b6 1116
65b52bde 1117void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO
1118{
1119 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG
1120 .lead_time = BT_LEAD_TIME_DEF,
1121 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO
1122 .kill_ack_mask = 0,
1123 .kill_cts_mask = 0,
1124 };
1125
b60eec9b 1126 if (!iwlagn_mod_params.bt_coex_active)
06702a73
WYG
1127 bt_cmd.flags = BT_COEX_DISABLE;
1128 else
1129 bt_cmd.flags = BT_COEX_ENABLE;
1130
f21dd005 1131 priv->bt_enable_flag = bt_cmd.flags;
06702a73
WYG
1132 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1133 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1134
65b52bde
JB
1135 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1136 sizeof(struct iwl_bt_cmd), &bt_cmd))
1137 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd 1138}
17f841cd 1139
ef8d5529 1140int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1141{
ef8d5529
WYG
1142 struct iwl_statistics_cmd statistics_cmd = {
1143 .configuration_flags =
1144 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1145 };
ef8d5529
WYG
1146
1147 if (flags & CMD_ASYNC)
1148 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1149 sizeof(struct iwl_statistics_cmd),
1150 &statistics_cmd, NULL);
1151 else
1152 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1153 sizeof(struct iwl_statistics_cmd),
1154 &statistics_cmd);
49ea8596 1155}
7e8c519e 1156
a83b9141
WYG
1157void iwl_clear_isr_stats(struct iwl_priv *priv)
1158{
1159 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1160}
a83b9141 1161
488829f1
AK
1162int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1163 const struct ieee80211_tx_queue_params *params)
1164{
1165 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1166 struct iwl_rxon_context *ctx;
488829f1
AK
1167 unsigned long flags;
1168 int q;
1169
1170 IWL_DEBUG_MAC80211(priv, "enter\n");
1171
1172 if (!iwl_is_ready_rf(priv)) {
1173 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1174 return -EIO;
1175 }
1176
1177 if (queue >= AC_NUM) {
1178 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1179 return 0;
1180 }
1181
1182 q = AC_NUM - 1 - queue;
1183
1184 spin_lock_irqsave(&priv->lock, flags);
1185
8dfdb9d5
JB
1186 /*
1187 * MULTI-FIXME
1188 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1189 */
1190 for_each_context(priv, ctx) {
1191 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1192 cpu_to_le16(params->cw_min);
1193 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1194 cpu_to_le16(params->cw_max);
1195 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1196 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1197 cpu_to_le16((params->txop * 32));
1198
1199 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1200 }
488829f1
AK
1201
1202 spin_unlock_irqrestore(&priv->lock, flags);
1203
1204 IWL_DEBUG_MAC80211(priv, "leave\n");
1205 return 0;
1206}
5bbe233b 1207
a85d7cca
JB
1208int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1209{
1210 struct iwl_priv *priv = hw->priv;
1211
1212 return priv->ibss_manager == IWL_IBSS_MANAGER;
1213}
a85d7cca 1214
d4daaea6 1215static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
727882d6 1216{
d0fe478c 1217 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK
1218
1219 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1220 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1221
805a3b81 1222 return iwlagn_commit_rxon(priv, ctx);
727882d6 1223}
727882d6 1224
d4daaea6
JB
1225static int iwl_setup_interface(struct iwl_priv *priv,
1226 struct iwl_rxon_context *ctx)
1227{
1228 struct ieee80211_vif *vif = ctx->vif;
1229 int err;
1230
1231 lockdep_assert_held(&priv->mutex);
1232
1233 /*
1234 * This variable will be correct only when there's just
1235 * a single context, but all code using it is for hardware
1236 * that supports only one context.
1237 */
1238 priv->iw_mode = vif->type;
1239
1240 ctx->is_active = true;
1241
1242 err = iwl_set_mode(priv, ctx);
1243 if (err) {
1244 if (!ctx->always_active)
1245 ctx->is_active = false;
1246 return err;
1247 }
1248
1249 if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
1250 vif->type == NL80211_IFTYPE_ADHOC) {
1251 /*
1252 * pretend to have high BT traffic as long as we
1253 * are operating in IBSS mode, as this will cause
1254 * the rate scaling etc. to behave as intended.
1255 */
1256 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1257 }
1258
1259 return 0;
1260}
1261
b55e75ed 1262int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK
1263{
1264 struct iwl_priv *priv = hw->priv;
246ed355 1265 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1266 struct iwl_rxon_context *tmp, *ctx = NULL;
d4daaea6 1267 int err;
f35c0c56 1268 enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
cbb6ab94 1269
3779db10 1270 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
f35c0c56 1271 viftype, vif->addr);
cbb6ab94 1272
47e28f41
JB
1273 mutex_lock(&priv->mutex);
1274
4bd530f3
SG
1275 if (!iwl_is_ready_rf(priv)) {
1276 IWL_WARN(priv, "Try to add interface when device not ready\n");
b55e75ed
JB
1277 err = -EINVAL;
1278 goto out;
1279 }
1280
d0fe478c
JB
1281 for_each_context(priv, tmp) {
1282 u32 possible_modes =
1283 tmp->interface_modes | tmp->exclusive_interface_modes;
1284
1285 if (tmp->vif) {
1286 /* check if this busy context is exclusive */
1287 if (tmp->exclusive_interface_modes &
1288 BIT(tmp->vif->type)) {
1289 err = -EINVAL;
1290 goto out;
1291 }
1292 continue;
1293 }
1294
f35c0c56 1295 if (!(possible_modes & BIT(viftype)))
d0fe478c
JB
1296 continue;
1297
1298 /* have maybe usable context w/o interface */
1299 ctx = tmp;
1300 break;
1301 }
1302
1303 if (!ctx) {
47e28f41
JB
1304 err = -EOPNOTSUPP;
1305 goto out;
cbb6ab94
AK
1306 }
1307
d0fe478c 1308 vif_priv->ctx = ctx;
8bd413e6 1309 ctx->vif = vif;
59079949 1310
d4daaea6
JB
1311 err = iwl_setup_interface(priv, ctx);
1312 if (!err)
1313 goto out;
cbb6ab94 1314
8bd413e6 1315 ctx->vif = NULL;
b55e75ed 1316 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1317 out:
cbb6ab94
AK
1318 mutex_unlock(&priv->mutex);
1319
1320 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1321 return err;
cbb6ab94 1322}
cbb6ab94 1323
d4daaea6
JB
1324static void iwl_teardown_interface(struct iwl_priv *priv,
1325 struct ieee80211_vif *vif,
1326 bool mode_change)
d8052319 1327{
246ed355 1328 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
d8052319 1329
d4daaea6 1330 lockdep_assert_held(&priv->mutex);
d0fe478c 1331
e7e16b90
SG
1332 if (priv->scan_vif == vif) {
1333 iwl_scan_cancel_timeout(priv, 200);
1334 iwl_force_scan_end(priv);
1335 }
8bd413e6 1336
d4daaea6
JB
1337 if (!mode_change) {
1338 iwl_set_mode(priv, ctx);
1339 if (!ctx->always_active)
1340 ctx->is_active = false;
1341 }
763cc3bf 1342
59079949
JB
1343 /*
1344 * When removing the IBSS interface, overwrite the
1345 * BT traffic load with the stored one from the last
1346 * notification, if any. If this is a device that
1347 * doesn't implement this, this has no effect since
1348 * both values are the same and zero.
1349 */
1350 if (vif->type == NL80211_IFTYPE_ADHOC)
66e863a5 1351 priv->bt_traffic_load = priv->last_bt_traffic_load;
d4daaea6
JB
1352}
1353
1354void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1355 struct ieee80211_vif *vif)
1356{
1357 struct iwl_priv *priv = hw->priv;
1358 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1359
1360 IWL_DEBUG_MAC80211(priv, "enter\n");
1361
1362 mutex_lock(&priv->mutex);
1363
1364 WARN_ON(ctx->vif != vif);
1365 ctx->vif = NULL;
1366
1367 iwl_teardown_interface(priv, vif, false);
59079949 1368
d8052319
AK
1369 mutex_unlock(&priv->mutex);
1370
1371 IWL_DEBUG_MAC80211(priv, "leave\n");
1372
1373}
d8052319 1374
88804e2b
WYG
1375int iwl_alloc_txq_mem(struct iwl_priv *priv)
1376{
1377 if (!priv->txq)
1378 priv->txq = kzalloc(
7cb1b088
WYG
1379 sizeof(struct iwl_tx_queue) *
1380 priv->cfg->base_params->num_of_queues,
88804e2b
WYG
1381 GFP_KERNEL);
1382 if (!priv->txq) {
91dd6c27 1383 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG
1384 return -ENOMEM;
1385 }
1386 return 0;
1387}
88804e2b
WYG
1388
1389void iwl_free_txq_mem(struct iwl_priv *priv)
1390{
1391 kfree(priv->txq);
1392 priv->txq = NULL;
1393}
88804e2b 1394
20594eb0
WYG
1395#ifdef CONFIG_IWLWIFI_DEBUGFS
1396
1397#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
1398
1399void iwl_reset_traffic_log(struct iwl_priv *priv)
1400{
1401 priv->tx_traffic_idx = 0;
1402 priv->rx_traffic_idx = 0;
1403 if (priv->tx_traffic)
1404 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1405 if (priv->rx_traffic)
1406 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1407}
1408
1409int iwl_alloc_traffic_mem(struct iwl_priv *priv)
1410{
1411 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1412
1413 if (iwl_debug_level & IWL_DL_TX) {
1414 if (!priv->tx_traffic) {
1415 priv->tx_traffic =
1416 kzalloc(traffic_size, GFP_KERNEL);
1417 if (!priv->tx_traffic)
1418 return -ENOMEM;
1419 }
1420 }
1421 if (iwl_debug_level & IWL_DL_RX) {
1422 if (!priv->rx_traffic) {
1423 priv->rx_traffic =
1424 kzalloc(traffic_size, GFP_KERNEL);
1425 if (!priv->rx_traffic)
1426 return -ENOMEM;
1427 }
1428 }
1429 iwl_reset_traffic_log(priv);
1430 return 0;
1431}
20594eb0
WYG
1432
1433void iwl_free_traffic_mem(struct iwl_priv *priv)
1434{
1435 kfree(priv->tx_traffic);
1436 priv->tx_traffic = NULL;
1437
1438 kfree(priv->rx_traffic);
1439 priv->rx_traffic = NULL;
1440}
20594eb0
WYG
1441
1442void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1443 u16 length, struct ieee80211_hdr *header)
1444{
1445 __le16 fc;
1446 u16 len;
1447
1448 if (likely(!(iwl_debug_level & IWL_DL_TX)))
1449 return;
1450
1451 if (!priv->tx_traffic)
1452 return;
1453
1454 fc = header->frame_control;
1455 if (ieee80211_is_data(fc)) {
1456 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1457 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1458 memcpy((priv->tx_traffic +
1459 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1460 header, len);
1461 priv->tx_traffic_idx =
1462 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1463 }
1464}
20594eb0
WYG
1465
1466void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1467 u16 length, struct ieee80211_hdr *header)
1468{
1469 __le16 fc;
1470 u16 len;
1471
1472 if (likely(!(iwl_debug_level & IWL_DL_RX)))
1473 return;
1474
1475 if (!priv->rx_traffic)
1476 return;
1477
1478 fc = header->frame_control;
1479 if (ieee80211_is_data(fc)) {
1480 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1481 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1482 memcpy((priv->rx_traffic +
1483 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1484 header, len);
1485 priv->rx_traffic_idx =
1486 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1487 }
1488}
22fdf3c9
WYG
1489
1490const char *get_mgmt_string(int cmd)
1491{
1492 switch (cmd) {
1493 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1494 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1495 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1496 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1497 IWL_CMD(MANAGEMENT_PROBE_REQ);
1498 IWL_CMD(MANAGEMENT_PROBE_RESP);
1499 IWL_CMD(MANAGEMENT_BEACON);
1500 IWL_CMD(MANAGEMENT_ATIM);
1501 IWL_CMD(MANAGEMENT_DISASSOC);
1502 IWL_CMD(MANAGEMENT_AUTH);
1503 IWL_CMD(MANAGEMENT_DEAUTH);
1504 IWL_CMD(MANAGEMENT_ACTION);
1505 default:
1506 return "UNKNOWN";
1507
1508 }
1509}
1510
1511const char *get_ctrl_string(int cmd)
1512{
1513 switch (cmd) {
1514 IWL_CMD(CONTROL_BACK_REQ);
1515 IWL_CMD(CONTROL_BACK);
1516 IWL_CMD(CONTROL_PSPOLL);
1517 IWL_CMD(CONTROL_RTS);
1518 IWL_CMD(CONTROL_CTS);
1519 IWL_CMD(CONTROL_ACK);
1520 IWL_CMD(CONTROL_CFEND);
1521 IWL_CMD(CONTROL_CFENDACK);
1522 default:
1523 return "UNKNOWN";
1524
1525 }
1526}
1527
7163b8a4 1528void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG
1529{
1530 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9
WYG
1531 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
1532}
1533
1534/*
1535 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1536 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1537 * Use debugFs to display the rx/rx_statistics
1538 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1539 * information will be recorded, but DATA pkt still will be recorded
1540 * for the reason of iwl_led.c need to control the led blinking based on
1541 * number of tx and rx data.
1542 *
1543 */
1544void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1545{
1546 struct traffic_stats *stats;
1547
1548 if (is_tx)
1549 stats = &priv->tx_stats;
1550 else
1551 stats = &priv->rx_stats;
1552
1553 if (ieee80211_is_mgmt(fc)) {
1554 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1555 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1556 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1557 break;
1558 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1559 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1560 break;
1561 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1562 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1563 break;
1564 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1565 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1566 break;
1567 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1568 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1569 break;
1570 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1571 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1572 break;
1573 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1574 stats->mgmt[MANAGEMENT_BEACON]++;
1575 break;
1576 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1577 stats->mgmt[MANAGEMENT_ATIM]++;
1578 break;
1579 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1580 stats->mgmt[MANAGEMENT_DISASSOC]++;
1581 break;
1582 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1583 stats->mgmt[MANAGEMENT_AUTH]++;
1584 break;
1585 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1586 stats->mgmt[MANAGEMENT_DEAUTH]++;
1587 break;
1588 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1589 stats->mgmt[MANAGEMENT_ACTION]++;
1590 break;
1591 }
1592 } else if (ieee80211_is_ctl(fc)) {
1593 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1594 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1595 stats->ctrl[CONTROL_BACK_REQ]++;
1596 break;
1597 case cpu_to_le16(IEEE80211_STYPE_BACK):
1598 stats->ctrl[CONTROL_BACK]++;
1599 break;
1600 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1601 stats->ctrl[CONTROL_PSPOLL]++;
1602 break;
1603 case cpu_to_le16(IEEE80211_STYPE_RTS):
1604 stats->ctrl[CONTROL_RTS]++;
1605 break;
1606 case cpu_to_le16(IEEE80211_STYPE_CTS):
1607 stats->ctrl[CONTROL_CTS]++;
1608 break;
1609 case cpu_to_le16(IEEE80211_STYPE_ACK):
1610 stats->ctrl[CONTROL_ACK]++;
1611 break;
1612 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1613 stats->ctrl[CONTROL_CFEND]++;
1614 break;
1615 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1616 stats->ctrl[CONTROL_CFENDACK]++;
1617 break;
1618 }
1619 } else {
1620 /* data */
1621 stats->data_cnt++;
1622 stats->data_bytes += len;
1623 }
1624}
20594eb0
WYG
1625#endif
1626
a93e7973 1627static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG
1628{
1629 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1630 return;
1631
246ed355 1632 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG
1633 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1634 return;
1635 }
1636 /*
1637 * There is no easy and better way to force reset the radio,
1638 * the only known method is switching channel which will force to
1639 * reset and tune the radio.
1640 * Use internal short scan (single channel) operation to should
1641 * achieve this objective.
1642 * Driver should reset the radio when number of consecutive missed
1643 * beacon, or any other uCode error condition detected.
1644 */
1645 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1646 iwl_internal_short_hw_scan(priv);
afbdd69a 1647}
a93e7973 1648
a93e7973 1649
c04f9f22 1650int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 1651{
8a472da4
WYG
1652 struct iwl_force_reset *force_reset;
1653
a93e7973
WYG
1654 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1655 return -EINVAL;
1656
8a472da4
WYG
1657 if (mode >= IWL_MAX_FORCE_RESET) {
1658 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1659 return -EINVAL;
1660 }
1661 force_reset = &priv->force_reset[mode];
1662 force_reset->reset_request_count++;
c04f9f22
WYG
1663 if (!external) {
1664 if (force_reset->last_force_reset_jiffies &&
1665 time_after(force_reset->last_force_reset_jiffies +
1666 force_reset->reset_duration, jiffies)) {
1667 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1668 force_reset->reset_reject_count++;
1669 return -EAGAIN;
1670 }
a93e7973 1671 }
8a472da4
WYG
1672 force_reset->reset_success_count++;
1673 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 1674 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG
1675 switch (mode) {
1676 case IWL_RF_RESET:
1677 iwl_force_rf_reset(priv);
1678 break;
1679 case IWL_FW_RESET:
c04f9f22
WYG
1680 /*
1681 * if the request is from external(ex: debugfs),
1682 * then always perform the request in regardless the module
1683 * parameter setting
1684 * if the request is from internal (uCode error or driver
1685 * detect failure), then fw_restart module parameter
1686 * need to be check before performing firmware reload
1687 */
9d143e9a 1688 if (!external && !iwlagn_mod_params.restart_fw) {
c04f9f22
WYG
1689 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1690 "module parameter setting\n");
1691 break;
1692 }
a93e7973 1693 IWL_ERR(priv, "On demand firmware reload\n");
e649437f 1694 iwlagn_fw_error(priv, true);
a93e7973 1695 break;
a93e7973 1696 }
a93e7973
WYG
1697 return 0;
1698}
b74e31a9 1699
d4daaea6
JB
1700int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1701 enum nl80211_iftype newtype, bool newp2p)
1702{
1703 struct iwl_priv *priv = hw->priv;
1704 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
ebf8dc80 1705 struct iwl_rxon_context *bss_ctx = &priv->contexts[IWL_RXON_CTX_BSS];
d4daaea6 1706 struct iwl_rxon_context *tmp;
5306c080 1707 enum nl80211_iftype newviftype = newtype;
d4daaea6
JB
1708 u32 interface_modes;
1709 int err;
1710
1711 newtype = ieee80211_iftype_p2p(newtype, newp2p);
1712
1713 mutex_lock(&priv->mutex);
1714
a2b76b3b
JB
1715 if (!ctx->vif || !iwl_is_ready_rf(priv)) {
1716 /*
1717 * Huh? But wait ... this can maybe happen when
1718 * we're in the middle of a firmware restart!
1719 */
1720 err = -EBUSY;
1721 goto out;
1722 }
1723
d4daaea6
JB
1724 interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
1725
1726 if (!(interface_modes & BIT(newtype))) {
1727 err = -EBUSY;
1728 goto out;
1729 }
1730
ebf8dc80
JB
1731 /*
1732 * Refuse a change that should be done by moving from the PAN
1733 * context to the BSS context instead, if the BSS context is
1734 * available and can support the new interface type.
1735 */
1736 if (ctx->ctxid == IWL_RXON_CTX_PAN && !bss_ctx->vif &&
1737 (bss_ctx->interface_modes & BIT(newtype) ||
1738 bss_ctx->exclusive_interface_modes & BIT(newtype))) {
1739 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
1740 err = -EBUSY;
1741 goto out;
1742 }
1743
d4daaea6
JB
1744 if (ctx->exclusive_interface_modes & BIT(newtype)) {
1745 for_each_context(priv, tmp) {
1746 if (ctx == tmp)
1747 continue;
1748
1749 if (!tmp->vif)
1750 continue;
1751
1752 /*
1753 * The current mode switch would be exclusive, but
1754 * another context is active ... refuse the switch.
1755 */
1756 err = -EBUSY;
1757 goto out;
1758 }
1759 }
1760
1761 /* success */
1762 iwl_teardown_interface(priv, vif, true);
5306c080 1763 vif->type = newviftype;
a2b76b3b 1764 vif->p2p = newp2p;
d4daaea6
JB
1765 err = iwl_setup_interface(priv, ctx);
1766 WARN_ON(err);
1767 /*
1768 * We've switched internally, but submitting to the
1769 * device may have failed for some reason. Mask this
1770 * error, because otherwise mac80211 will not switch
1771 * (and set the interface type back) and we'll be
1772 * out of sync with it.
1773 */
1774 err = 0;
1775
1776 out:
1777 mutex_unlock(&priv->mutex);
1778 return err;
1779}
d4daaea6 1780
b74e31a9 1781/*
22de94de
SG
1782 * On every watchdog tick we check (latest) time stamp. If it does not
1783 * change during timeout period and queue is not empty we reset firmware.
b74e31a9 1784 */
b74e31a9
WYG
1785static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
1786{
22de94de
SG
1787 struct iwl_tx_queue *txq = &priv->txq[cnt];
1788 struct iwl_queue *q = &txq->q;
1789 unsigned long timeout;
1790 int ret;
b74e31a9 1791
22de94de
SG
1792 if (q->read_ptr == q->write_ptr) {
1793 txq->time_stamp = jiffies;
7cb1b088 1794 return 0;
22de94de 1795 }
7cb1b088 1796
22de94de
SG
1797 timeout = txq->time_stamp +
1798 msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
1799
1800 if (time_after(jiffies, timeout)) {
1801 IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
1802 q->id, priv->cfg->base_params->wd_timeout);
1803 ret = iwl_force_reset(priv, IWL_FW_RESET, false);
1804 return (ret == -EAGAIN) ? 0 : 1;
b74e31a9 1805 }
22de94de 1806
b74e31a9
WYG
1807 return 0;
1808}
1809
22de94de
SG
1810/*
1811 * Making watchdog tick be a quarter of timeout assure we will
1812 * discover the queue hung between timeout and 1.25*timeout
1813 */
1814#define IWL_WD_TICK(timeout) ((timeout) / 4)
1815
1816/*
1817 * Watchdog timer callback, we check each tx queue for stuck, if if hung
1818 * we reset the firmware. If everything is fine just rearm the timer.
1819 */
1820void iwl_bg_watchdog(unsigned long data)
b74e31a9
WYG
1821{
1822 struct iwl_priv *priv = (struct iwl_priv *)data;
1823 int cnt;
22de94de 1824 unsigned long timeout;
b74e31a9
WYG
1825
1826 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1827 return;
1828
22de94de
SG
1829 timeout = priv->cfg->base_params->wd_timeout;
1830 if (timeout == 0)
1831 return;
1832
b74e31a9 1833 /* monitor and check for stuck cmd queue */
13bb9483 1834 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG
1835 return;
1836
1837 /* monitor and check for other stuck queues */
246ed355 1838 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG
1839 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
1840 /* skip as we already checked the command queue */
13bb9483 1841 if (cnt == priv->cmd_queue)
b74e31a9
WYG
1842 continue;
1843 if (iwl_check_stuck_queue(priv, cnt))
1844 return;
1845 }
1846 }
22de94de
SG
1847
1848 mod_timer(&priv->watchdog, jiffies +
1849 msecs_to_jiffies(IWL_WD_TICK(timeout)));
b74e31a9 1850}
22de94de
SG
1851
1852void iwl_setup_watchdog(struct iwl_priv *priv)
1853{
1854 unsigned int timeout = priv->cfg->base_params->wd_timeout;
afbdd69a 1855
22de94de
SG
1856 if (timeout)
1857 mod_timer(&priv->watchdog,
1858 jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
1859 else
1860 del_timer(&priv->watchdog);
1861}
a0ee74cf
WYG
1862
1863/*
1864 * extended beacon time format
1865 * time in usec will be changed into a 32-bit value in extended:internal format
1866 * the extended part is the beacon counts
1867 * the internal part is the time in usec within one beacon interval
1868 */
1869u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1870{
1871 u32 quot;
1872 u32 rem;
1873 u32 interval = beacon_interval * TIME_UNIT;
1874
1875 if (!interval || !usec)
1876 return 0;
1877
1878 quot = (usec / interval) &
1879 (iwl_beacon_time_mask_high(priv,
1880 priv->hw_params.beacon_time_tsf_bits) >>
1881 priv->hw_params.beacon_time_tsf_bits);
1882 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
1883 priv->hw_params.beacon_time_tsf_bits);
1884
1885 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
1886}
a0ee74cf
WYG
1887
1888/* base is usually what we get from ucode with each received frame,
1889 * the same as HW timer counter counting down
1890 */
1891__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1892 u32 addon, u32 beacon_interval)
1893{
1894 u32 base_low = base & iwl_beacon_time_mask_low(priv,
1895 priv->hw_params.beacon_time_tsf_bits);
1896 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
1897 priv->hw_params.beacon_time_tsf_bits);
1898 u32 interval = beacon_interval * TIME_UNIT;
1899 u32 res = (base & iwl_beacon_time_mask_high(priv,
1900 priv->hw_params.beacon_time_tsf_bits)) +
1901 (addon & iwl_beacon_time_mask_high(priv,
1902 priv->hw_params.beacon_time_tsf_bits));
1903
1904 if (base_low > addon_low)
1905 res += base_low - addon_low;
1906 else if (base_low < addon_low) {
1907 res += interval + base_low - addon_low;
1908 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1909 } else
1910 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1911
1912 return cpu_to_le32(res);
1913}
a0ee74cf 1914
6da3a13e
WYG
1915#ifdef CONFIG_PM
1916
48d1a211 1917int iwl_suspend(struct iwl_priv *priv)
6da3a13e 1918{
6da3a13e
WYG
1919 /*
1920 * This function is called when system goes into suspend state
1921 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
1922 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1923 * it will not call apm_ops.stop() to stop the DMA operation.
1924 * Calling apm_ops.stop here to make sure we stop the DMA.
1925 */
14e8e4af 1926 iwl_apm_stop(priv);
6da3a13e 1927
6da3a13e
WYG
1928 return 0;
1929}
6da3a13e 1930
48d1a211 1931int iwl_resume(struct iwl_priv *priv)
6da3a13e 1932{
0ab84cff 1933 bool hw_rfkill = false;
6da3a13e 1934
6da3a13e
WYG
1935 iwl_enable_interrupts(priv);
1936
0ab84cff
JB
1937 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1938 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1939 hw_rfkill = true;
1940
1941 if (hw_rfkill)
1942 set_bit(STATUS_RF_KILL_HW, &priv->status);
1943 else
1944 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1945
1946 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
1947
6da3a13e
WYG
1948 return 0;
1949}
6da3a13e
WYG
1950
1951#endif /* CONFIG_PM */
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