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iwl3945: prevent too frequent firmware resets
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
670245ed
JB		 67bool bt_coex_active = true;
68EXPORT_SYMBOL_GPL(bt_coex_active);
06702a73 69module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 70MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 71
a562a9dd
RC		 72u32 iwl_debug_level;
73EXPORT_SYMBOL(iwl_debug_level);
74
57bd1bea
TW		 75const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
76EXPORT_SYMBOL(iwl_bcast_addr);
77
78
1d0a082d 79/* This function both allocates and initializes hw and priv. */
dc21b545 80struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
1d0a082d
AK		 81{
82 struct iwl_priv *priv;
1d0a082d
AK		 83 /* mac80211 allocates memory for this device instance, including
84 * space for this driver's private structure */
dc21b545
JB		 85 struct ieee80211_hw *hw;
86
87 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv),
88 cfg->ops->ieee80211_ops);
1d0a082d 89 if (hw == NULL) {
c96c31e4 90 pr_err("%s: Can not allocate network device\n",
a3139c59 91 cfg->name);
1d0a082d
AK		 92 goto out;
93 }
94
95 priv = hw->priv;
96 priv->hw = hw;
97
98out:
99 return hw;
100}
101EXPORT_SYMBOL(iwl_alloc_all);
102
d9fe60de
JB		 103#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
104#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 105static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 106 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 107 enum ieee80211_band band)
108{
39130df3
RR		 109 u16 max_bit_rate = 0;
110 u8 rx_chains_num = priv->hw_params.rx_chains_num;
111 u8 tx_chains_num = priv->hw_params.tx_chains_num;
112
c7de35cd 113 ht_info->cap = 0;
d9fe60de 114 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 115
d9fe60de 116 ht_info->ht_supported = true;
c7de35cd 117
7cb1b088
WYG		 118 if (priv->cfg->ht_params &&
119 priv->cfg->ht_params->ht_greenfield_support)
b261793d 120 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 121 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 122 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 123 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 124 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
125 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
126 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 127 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 128 }
c7de35cd
RR		 129
130 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 131 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 132
133 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
7cb1b088
WYG		 134 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
135 ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
c7de35cd 136 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
7cb1b088
WYG		 137 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
138 ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
c7de35cd 139
d9fe60de 140 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 141 if (rx_chains_num >= 2)
d9fe60de 142 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 143 if (rx_chains_num >= 3)
d9fe60de 144 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 145
146 /* Highest supported Rx data rate */
147 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 148 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
149 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 150
151 /* Tx MCS capabilities */
d9fe60de 152 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 153 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 154 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
155 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
156 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 157 }
c7de35cd 158}
c7de35cd 159
c7de35cd
RR		 160/**
161 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
162 */
534166de 163int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 164{
165 struct iwl_channel_info *ch;
166 struct ieee80211_supported_band *sband;
167 struct ieee80211_channel *channels;
168 struct ieee80211_channel *geo_ch;
169 struct ieee80211_rate *rates;
170 int i = 0;
171
172 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
173 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 174 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 175 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
176 return 0;
177 }
178
179 channels = kzalloc(sizeof(struct ieee80211_channel) *
180 priv->channel_count, GFP_KERNEL);
181 if (!channels)
182 return -ENOMEM;
183
5027309b 184 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 185 GFP_KERNEL);
186 if (!rates) {
187 kfree(channels);
188 return -ENOMEM;
189 }
190
191 /* 5.2GHz channels start after the 2.4GHz channels */
192 sband = &priv->bands[IEEE80211_BAND_5GHZ];
193 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
194 /* just OFDM */
195 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 196 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 197
49779293 198 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 199 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 200 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 201
202 sband = &priv->bands[IEEE80211_BAND_2GHZ];
203 sband->channels = channels;
204 /* OFDM & CCK */
205 sband->bitrates = rates;
5027309b 206 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 207
49779293 208 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 209 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 210 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 211
212 priv->ieee_channels = channels;
213 priv->ieee_rates = rates;
214
c7de35cd
RR		 215 for (i = 0; i < priv->channel_count; i++) {
216 ch = &priv->channel_info[i];
217
218 /* FIXME: might be removed if scan is OK */
219 if (!is_channel_valid(ch))
220 continue;
221
222 if (is_channel_a_band(ch))
223 sband = &priv->bands[IEEE80211_BAND_5GHZ];
224 else
225 sband = &priv->bands[IEEE80211_BAND_2GHZ];
226
227 geo_ch = &sband->channels[sband->n_channels++];
228
229 geo_ch->center_freq =
230 ieee80211_channel_to_frequency(ch->channel);
231 geo_ch->max_power = ch->max_power_avg;
232 geo_ch->max_antenna_gain = 0xff;
233 geo_ch->hw_value = ch->channel;
234
235 if (is_channel_valid(ch)) {
236 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
237 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
238
239 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
240 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
241
242 if (ch->flags & EEPROM_CHANNEL_RADAR)
243 geo_ch->flags |= IEEE80211_CHAN_RADAR;
244
7aafef1c 245 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 246
dc1b0973
WYG		 247 if (ch->max_power_avg > priv->tx_power_device_lmt)
248 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 249 } else {
250 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
251 }
252
e1623446 253 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 254 ch->channel, geo_ch->center_freq,
255 is_channel_a_band(ch) ? "5.2" : "2.4",
256 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
257 "restricted" : "valid",
258 geo_ch->flags);
259 }
260
261 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
262 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 263 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
264 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 265 priv->pci_dev->device,
266 priv->pci_dev->subsystem_device);
c7de35cd
RR		 267 priv->cfg->sku &= ~IWL_SKU_A;
268 }
269
978785a3 270 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 271 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
272 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 273
274 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
275
276 return 0;
277}
534166de 278EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 279
280/*
281 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
282 */
534166de 283void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 284{
285 kfree(priv->ieee_channels);
286 kfree(priv->ieee_rates);
287 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
288}
534166de 289EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 290
7e6a5886
JB		 291static bool iwl_is_channel_extension(struct iwl_priv *priv,
292 enum ieee80211_band band,
293 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 294{
295 const struct iwl_channel_info *ch_info;
296
297 ch_info = iwl_get_channel_info(priv, band, channel);
298 if (!is_channel_valid(ch_info))
7e6a5886 299 return false;
47c5196e 300
d9fe60de 301 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 302 return !(ch_info->ht40_extension_channel &
689da1b3 303 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 304 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 305 return !(ch_info->ht40_extension_channel &
689da1b3 306 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 307
7e6a5886 308 return false;
47c5196e
TW		 309}
310
7e6a5886
JB		 311bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
312 struct iwl_rxon_context *ctx,
313 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 314{
7e6a5886
JB		 315 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
316 return false;
47c5196e 317
7e6a5886
JB		 318 /*
319 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 320 * the bit will not set if it is pure 40MHz case
321 */
7e6a5886
JB		 322 if (ht_cap && !ht_cap->ht_supported)
323 return false;
324
d73e4923 325#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 326 if (priv->disable_ht40)
7e6a5886 327 return false;
1e4247d4 328#endif
7e6a5886 329
611d3eb7 330 return iwl_is_channel_extension(priv, priv->band,
246ed355 331 le16_to_cpu(ctx->staging.channel),
7e6a5886 332 ctx->ht.extension_chan_offset);
47c5196e 333}
7aafef1c 334EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 335
2c2f3b33
TW		 336static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
337{
ea196fdb
JB		 338 u16 new_val;
339 u16 beacon_factor;
340
341 /*
342 * If mac80211 hasn't given us a beacon interval, program
343 * the default into the device (not checking this here
344 * would cause the adjustment below to return the maximum
345 * value, which may break PAN.)
346 */
347 if (!beacon_val)
348 return DEFAULT_BEACON_INTERVAL;
349
350 /*
351 * If the beacon interval we obtained from the peer
352 * is too large, we'll have to wake up more often
353 * (and in IBSS case, we'll beacon too much)
354 *
355 * For example, if max_beacon_val is 4096, and the
356 * requested beacon interval is 7000, we'll have to
357 * use 3500 to be able to wake up on the beacons.
358 *
359 * This could badly influence beacon detection stats.
360 */
2c2f3b33
TW		 361
362 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
363 new_val = beacon_val / beacon_factor;
364
365 if (!new_val)
366 new_val = max_beacon_val;
367
368 return new_val;
369}
370
47313e34 371int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW		 372{
373 u64 tsf;
374 s32 interval_tm, rem;
2c2f3b33
TW		 375 struct ieee80211_conf *conf = NULL;
376 u16 beacon_int;
47313e34 377 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW		 378
379 conf = ieee80211_get_hw_conf(priv->hw);
380
948f5a2f
JB		 381 lockdep_assert_held(&priv->mutex);
382
246ed355 383 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 384
246ed355
JB		 385 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
386 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 387
47313e34 388 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 389
47313e34
JB		 390 /*
391 * TODO: For IBSS we need to get atim_window from mac80211,
392 * for now just always use 0
393 */
394 ctx->timing.atim_window = 0;
2c2f3b33 395
bde4530e 396 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB		 397 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
398 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
399 priv->contexts[IWL_RXON_CTX_BSS].vif &&
400 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB		 401 ctx->timing.beacon_interval =
402 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
403 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB		 404 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
405 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
406 priv->contexts[IWL_RXON_CTX_PAN].vif &&
407 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
408 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
409 !ctx->vif->bss_conf.beacon_int)) {
410 ctx->timing.beacon_interval =
411 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
412 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB		 413 } else {
414 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 415 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB		 416 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
417 }
2c2f3b33
TW		 418
419 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 420 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 421 rem = do_div(tsf, interval_tm);
246ed355 422 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 423
47313e34 424 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 425
2c2f3b33
TW		 426 IWL_DEBUG_ASSOC(priv,
427 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 428 le16_to_cpu(ctx->timing.beacon_interval),
429 le32_to_cpu(ctx->timing.beacon_init_val),
430 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 431
8f2d3d2a 432 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 433 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 434}
948f5a2f 435EXPORT_SYMBOL(iwl_send_rxon_timing);
2c2f3b33 436
246ed355
JB		 437void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
438 int hw_decrypt)
8ccde88a 439{
246ed355 440 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 441
442 if (hw_decrypt)
443 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
444 else
445 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
446
447}
448EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
449
dacefedb 450/* validate RXON structure is valid */
246ed355 451int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a 452{
246ed355 453 struct iwl_rxon_cmd *rxon = &ctx->staging;
dacefedb 454 bool error = false;
8ccde88a
SO		 455
456 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
dacefedb
JB		 457 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
458 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
459 error = true;
460 }
461 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
462 IWL_WARN(priv, "check 2.4G: wrong radar\n");
463 error = true;
464 }
8ccde88a 465 } else {
dacefedb
JB		 466 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
467 IWL_WARN(priv, "check 5.2G: not short slot!\n");
468 error = true;
469 }
470 if (rxon->flags & RXON_FLG_CCK_MSK) {
471 IWL_WARN(priv, "check 5.2G: CCK!\n");
472 error = true;
473 }
474 }
475 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
476 IWL_WARN(priv, "mac/bssid mcast!\n");
477 error = true;
8ccde88a 478 }
8ccde88a
SO		 479
480 /* make sure basic rates 6Mbps and 1Mbps are supported */
dacefedb
JB		 481 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
482 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
483 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
484 error = true;
485 }
8ccde88a 486
dacefedb
JB		 487 if (le16_to_cpu(rxon->assoc_id) > 2007) {
488 IWL_WARN(priv, "aid > 2007\n");
489 error = true;
490 }
8ccde88a 491
dacefedb
JB		 492 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
493 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
494 IWL_WARN(priv, "CCK and short slot\n");
495 error = true;
496 }
8ccde88a 497
dacefedb
JB		 498 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
499 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
500 IWL_WARN(priv, "CCK and auto detect");
501 error = true;
502 }
8ccde88a 503
dacefedb
JB		 504 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
505 RXON_FLG_TGG_PROTECT_MSK)) ==
506 RXON_FLG_TGG_PROTECT_MSK) {
507 IWL_WARN(priv, "TGg but no auto-detect\n");
508 error = true;
509 }
8ccde88a
SO		 510
511 if (error)
512 IWL_WARN(priv, "Tuning to channel %d\n",
513 le16_to_cpu(rxon->channel));
514
515 if (error) {
dacefedb
JB		 516 IWL_ERR(priv, "Invalid RXON\n");
517 return -EINVAL;
8ccde88a
SO		 518 }
519 return 0;
520}
521EXPORT_SYMBOL(iwl_check_rxon_cmd);
522
523/**
524 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
525 * @priv: staging_rxon is compared to active_rxon
526 *
527 * If the RXON structure is changing enough to require a new tune,
528 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
529 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
530 */
246ed355
JB		 531int iwl_full_rxon_required(struct iwl_priv *priv,
532 struct iwl_rxon_context *ctx)
8ccde88a 533{
246ed355
JB		 534 const struct iwl_rxon_cmd *staging = &ctx->staging;
535 const struct iwl_rxon_cmd *active = &ctx->active;
536
537#define CHK(cond) \
538 if ((cond)) { \
539 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
540 return 1; \
541 }
542
543#define CHK_NEQ(c1, c2) \
544 if ((c1) != (c2)) { \
545 IWL_DEBUG_INFO(priv, "need full RXON - " \
546 #c1 " != " #c2 " - %d != %d\n", \
547 (c1), (c2)); \
548 return 1; \
549 }
8ccde88a
SO		 550
551 /* These items are only settable from the full RXON command */
246ed355
JB		 552 CHK(!iwl_is_associated_ctx(ctx));
553 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
554 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
555 CHK(compare_ether_addr(staging->wlap_bssid_addr,
556 active->wlap_bssid_addr));
557 CHK_NEQ(staging->dev_type, active->dev_type);
558 CHK_NEQ(staging->channel, active->channel);
559 CHK_NEQ(staging->air_propagation, active->air_propagation);
560 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
561 active->ofdm_ht_single_stream_basic_rates);
562 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
563 active->ofdm_ht_dual_stream_basic_rates);
564 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
565 active->ofdm_ht_triple_stream_basic_rates);
566 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 567
568 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
569 * be updated with the RXON_ASSOC command -- however only some
570 * flag transitions are allowed using RXON_ASSOC */
571
572 /* Check if we are not switching bands */
246ed355
JB		 573 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
574 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 575
576 /* Check if we are switching association toggle */
246ed355
JB		 577 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
578 active->filter_flags & RXON_FILTER_ASSOC_MSK);
579
580#undef CHK
581#undef CHK_NEQ
8ccde88a
SO		 582
583 return 0;
584}
585EXPORT_SYMBOL(iwl_full_rxon_required);
586
76d04815
JB		 587u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
588 struct iwl_rxon_context *ctx)
8ccde88a 589{
4a02886b
JB		 590 /*
591 * Assign the lowest rate -- should really get this from
592 * the beacon skb from mac80211.
593 */
246ed355 594 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO		 595 return IWL_RATE_1M_PLCP;
596 else
597 return IWL_RATE_6M_PLCP;
598}
599EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
600
246ed355
JB		 601static void _iwl_set_rxon_ht(struct iwl_priv *priv,
602 struct iwl_ht_config *ht_conf,
603 struct iwl_rxon_context *ctx)
47c5196e 604{
246ed355 605 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 606
7e6a5886 607 if (!ctx->ht.enabled) {
a2b0f02e 608 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 609 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 610 RXON_FLG_HT40_PROT_MSK |
42eb7c64 611 RXON_FLG_HT_PROT_MSK);
47c5196e 612 return;
42eb7c64 613 }
47c5196e 614
7e6a5886 615 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 616 * will be needed for rxon->flags
617 */
7e6a5886 618 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 619
620 /* Set up channel bandwidth:
7aafef1c 621 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 622 /* clear the HT channel mode before set the mode */
623 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
624 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 625 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 626 /* pure ht40 */
7e6a5886 627 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 628 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 629 /* Note: control channel is opposite of extension channel */
7e6a5886 630 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 631 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
632 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
633 break;
634 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
635 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
636 break;
637 }
638 } else {
a2b0f02e 639 /* Note: control channel is opposite of extension channel */
7e6a5886 640 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 641 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
642 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
643 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
644 break;
645 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
646 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
647 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
648 break;
649 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
650 default:
651 /* channel location only valid if in Mixed mode */
652 IWL_ERR(priv, "invalid extension channel offset\n");
653 break;
654 }
655 }
656 } else {
657 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 658 }
659
45823531 660 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 661 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 662
02bb1bea 663 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 664 "extension channel offset 0x%x\n",
7e6a5886
JB		 665 le32_to_cpu(rxon->flags), ctx->ht.protection,
666 ctx->ht.extension_chan_offset);
47c5196e 667}
246ed355
JB		 668
669void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
670{
671 struct iwl_rxon_context *ctx;
672
673 for_each_context(priv, ctx)
674 _iwl_set_rxon_ht(priv, ht_conf, ctx);
675}
47c5196e
TW		 676EXPORT_SYMBOL(iwl_set_rxon_ht);
677
246ed355 678/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 679u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 680 enum ieee80211_band band)
14023641
AK		 681{
682 const struct iwl_channel_info *ch_info;
683 int i;
684 u8 channel = 0;
246ed355
JB		 685 u8 min, max;
686 struct iwl_rxon_context *ctx;
14023641 687
14023641 688 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 689 min = 14;
690 max = priv->channel_count;
14023641 691 } else {
246ed355
JB		 692 min = 0;
693 max = 14;
694 }
695
696 for (i = min; i < max; i++) {
697 bool busy = false;
698
699 for_each_context(priv, ctx) {
700 busy = priv->channel_info[i].channel ==
701 le16_to_cpu(ctx->staging.channel);
702 if (busy)
703 break;
14023641 704 }
246ed355
JB		 705
706 if (busy)
707 continue;
708
709 channel = priv->channel_info[i].channel;
710 ch_info = iwl_get_channel_info(priv, band, channel);
711 if (is_channel_valid(ch_info))
712 break;
14023641
AK		 713 }
714
715 return channel;
716}
717EXPORT_SYMBOL(iwl_get_single_channel_number);
718
bf85ea4f 719/**
3edb5fd6
SZ		 720 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
721 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 722
bf85ea4f 723 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 724 * in the staging RXON flag structure based on the ch->band
bf85ea4f 725 */
246ed355
JB		 726int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
727 struct iwl_rxon_context *ctx)
bf85ea4f 728{
17e72782 729 enum ieee80211_band band = ch->band;
81e95430 730 u16 channel = ch->hw_value;
17e72782 731
246ed355 732 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK		 733 (priv->band == band))
734 return 0;
735
246ed355 736 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 737 if (band == IEEE80211_BAND_5GHZ)
246ed355 738 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 739 else
246ed355 740 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 741
742 priv->band = band;
743
e1623446 744 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 745
746 return 0;
747}
c7de35cd 748EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 749
79d07325 750void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 751 struct iwl_rxon_context *ctx,
79d07325
WYG		 752 enum ieee80211_band band,
753 struct ieee80211_vif *vif)
8ccde88a
SO		 754{
755 if (band == IEEE80211_BAND_5GHZ) {
246ed355 756 ctx->staging.flags &=
8ccde88a
SO		 757 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
758 | RXON_FLG_CCK_MSK);
246ed355 759 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 760 } else {
761 /* Copied from iwl_post_associate() */
c213d745 762 if (vif && vif->bss_conf.use_short_slot)
246ed355 763 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 764 else
246ed355 765 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 766
246ed355
JB		 767 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
768 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
769 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 770 }
771}
79d07325 772EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 773
774/*
775 * initialize rxon structure with default values from eeprom
776 */
1dda6d28 777void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 778 struct iwl_rxon_context *ctx)
8ccde88a
SO		 779{
780 const struct iwl_channel_info *ch_info;
781
246ed355 782 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 783
d0fe478c
JB		 784 if (!ctx->vif) {
785 ctx->staging.dev_type = ctx->unused_devtype;
786 } else switch (ctx->vif->type) {
8ccde88a 787 case NL80211_IFTYPE_AP:
d0fe478c 788 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO		 789 break;
790
791 case NL80211_IFTYPE_STATION:
d0fe478c 792 ctx->staging.dev_type = ctx->station_devtype;
246ed355 793 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 794 break;
795
796 case NL80211_IFTYPE_ADHOC:
d0fe478c 797 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB		 798 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
799 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 800 RXON_FILTER_ACCEPT_GRP_MSK;
801 break;
802
8ccde88a 803 default:
d0fe478c
JB		 804 IWL_ERR(priv, "Unsupported interface type %d\n",
805 ctx->vif->type);
8ccde88a
SO		 806 break;
807 }
808
809#if 0
810 /* TODO: Figure out when short_preamble would be set and cache from
811 * that */
812 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 813 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 814 else
246ed355 815 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 816#endif
817
818 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 819 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 820
821 if (!ch_info)
822 ch_info = &priv->channel_info[0];
823
246ed355 824 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 825 priv->band = ch_info->band;
826
d0fe478c 827 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 828
246ed355 829 ctx->staging.ofdm_basic_rates =
8ccde88a 830 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 831 ctx->staging.cck_basic_rates =
8ccde88a
SO		 832 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
833
a2b0f02e 834 /* clear both MIX and PURE40 mode flag */
246ed355 835 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 836 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB		 837 if (ctx->vif)
838 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 839
246ed355
JB		 840 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
841 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
842 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 843}
844EXPORT_SYMBOL(iwl_connection_init_rx_config);
845
79d07325 846void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 847{
848 const struct ieee80211_supported_band *hw = NULL;
849 struct ieee80211_rate *rate;
246ed355 850 struct iwl_rxon_context *ctx;
8ccde88a
SO		 851 int i;
852
853 hw = iwl_get_hw_mode(priv, priv->band);
854 if (!hw) {
855 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
856 return;
857 }
858
859 priv->active_rate = 0;
8ccde88a
SO		 860
861 for (i = 0; i < hw->n_bitrates; i++) {
862 rate = &(hw->bitrates[i]);
5027309b 863 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 864 priv->active_rate |= (1 << rate->hw_value);
865 }
866
4a02886b 867 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 868
246ed355
JB		 869 for_each_context(priv, ctx) {
870 ctx->staging.cck_basic_rates =
871 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 872
246ed355
JB		 873 ctx->staging.ofdm_basic_rates =
874 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
875 }
8ccde88a 876}
79d07325
WYG		 877EXPORT_SYMBOL(iwl_set_rate);
878
879void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
880{
8bd413e6
JB		 881 /*
882 * MULTI-FIXME
883 * See iwl_mac_channel_switch.
884 */
885 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
886
79d07325
WYG		 887 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
888 return;
889
890 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 891 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG		 892 mutex_lock(&priv->mutex);
893 priv->switch_rxon.switch_in_progress = false;
894 mutex_unlock(&priv->mutex);
895 }
896}
897EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 898
899void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
900{
2f301227 901 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a 902 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
8bd413e6
JB		 903 /*
904 * MULTI-FIXME
905 * See iwl_mac_channel_switch.
906 */
246ed355 907 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
246ed355 908 struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
4a56e965 909
0924e519
WYG		 910 if (priv->switch_rxon.switch_in_progress) {
911 if (!le32_to_cpu(csa->status) &&
912 (csa->channel == priv->switch_rxon.channel)) {
913 rxon->channel = csa->channel;
246ed355 914 ctx->staging.channel = csa->channel;
0924e519
WYG		 915 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
916 le16_to_cpu(csa->channel));
79d07325
WYG		 917 iwl_chswitch_done(priv, true);
918 } else {
0924e519
WYG		 919 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
920 le16_to_cpu(csa->channel));
79d07325
WYG		 921 iwl_chswitch_done(priv, false);
922 }
0924e519 923 }
8ccde88a
SO		 924}
925EXPORT_SYMBOL(iwl_rx_csa);
926
927#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB		 928void iwl_print_rx_config_cmd(struct iwl_priv *priv,
929 struct iwl_rxon_context *ctx)
8ccde88a 930{
246ed355 931 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 932
e1623446 933 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 934 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 935 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
936 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
937 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 938 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 939 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
940 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 941 rxon->ofdm_basic_rates);
e1623446
TW		 942 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
943 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
944 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
945 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 946}
a643565e 947EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 948#endif
8ccde88a
SO		 949/**
950 * iwl_irq_handle_error - called for HW or SW error interrupt from card
951 */
952void iwl_irq_handle_error(struct iwl_priv *priv)
953{
954 /* Set the FW error flag -- cleared on iwl_down */
955 set_bit(STATUS_FW_ERROR, &priv->status);
956
957 /* Cancel currently queued command. */
958 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
959
459bc732
SZ		 960 IWL_ERR(priv, "Loaded firmware version: %s\n",
961 priv->hw->wiphy->fw_version);
962
3a3ff72c 963 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 964 if (priv->cfg->ops->lib->dump_csr)
965 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 966 if (priv->cfg->ops->lib->dump_fh)
967 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 968 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 969#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 970 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB		 971 iwl_print_rx_config_cmd(priv,
972 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO		 973#endif
974
975 wake_up_interruptible(&priv->wait_command_queue);
976
977 /* Keep the restart process from trying to send host
978 * commands by clearing the INIT status bit */
979 clear_bit(STATUS_READY, &priv->status);
980
981 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 982 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 983 "Restarting adapter due to uCode error.\n");
984
8ccde88a
SO		 985 if (priv->cfg->mod_params->restart_fw)
986 queue_work(priv->workqueue, &priv->restart);
987 }
988}
989EXPORT_SYMBOL(iwl_irq_handle_error);
990
f8e200de 991static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 992{
5220af0c 993 int ret = 0;
d68b603c 994
5220af0c 995 /* stop device's busmaster DMA activity */
d68b603c
AK		 996 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
997
5220af0c 998 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 999 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1000 if (ret)
1001 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1002
d68b603c
AK		 1003 IWL_DEBUG_INFO(priv, "stop master\n");
1004
5220af0c 1005 return ret;
d68b603c 1006}
d68b603c
AK		 1007
1008void iwl_apm_stop(struct iwl_priv *priv)
1009{
fadb3582
BC		 1010 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1011
5220af0c 1012 /* Stop device's DMA activity */
d68b603c
AK		 1013 iwl_apm_stop_master(priv);
1014
5220af0c 1015 /* Reset the entire device */
d68b603c
AK		 1016 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1017
1018 udelay(10);
5220af0c
BC		 1019
1020 /*
1021 * Clear "initialization complete" bit to move adapter from
1022 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1023 */
d68b603c 1024 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1025}
1026EXPORT_SYMBOL(iwl_apm_stop);
1027
fadb3582
BC		 1028
1029/*
1030 * Start up NIC's basic functionality after it has been reset
1031 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1032 * NOTE: This does not load uCode nor start the embedded processor
1033 */
1034int iwl_apm_init(struct iwl_priv *priv)
1035{
1036 int ret = 0;
1037 u16 lctl;
1038
1039 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1040
1041 /*
1042 * Use "set_bit" below rather than "write", to preserve any hardware
1043 * bits already set by default after reset.
1044 */
1045
1046 /* Disable L0S exit timer (platform NMI Work/Around) */
1047 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1048 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1049
1050 /*
1051 * Disable L0s without affecting L1;
1052 * don't wait for ICH L0s (ICH bug W/A)
1053 */
1054 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1055 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1056
1057 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1058 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1059
1060 /*
1061 * Enable HAP INTA (interrupt from management bus) to
1062 * wake device's PCI Express link L1a -> L0s
1063 * NOTE: This is no-op for 3945 (non-existant bit)
1064 */
1065 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1066 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1067
1068 /*
a6c5c731
BC		 1069 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1070 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1071 * If so (likely), disable L0S, so device moves directly L0->L1;
1072 * costs negligible amount of power savings.
1073 * If not (unlikely), enable L0S, so there is at least some
1074 * power savings, even without L1.
fadb3582 1075 */
7cb1b088 1076 if (priv->cfg->base_params->set_l0s) {
fadb3582
BC		 1077 lctl = iwl_pcie_link_ctl(priv);
1078 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1079 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1080 /* L1-ASPM enabled; disable(!) L0S */
1081 iwl_set_bit(priv, CSR_GIO_REG,
1082 CSR_GIO_REG_VAL_L0S_ENABLED);
1083 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1084 } else {
1085 /* L1-ASPM disabled; enable(!) L0S */
1086 iwl_clear_bit(priv, CSR_GIO_REG,
1087 CSR_GIO_REG_VAL_L0S_ENABLED);
1088 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1089 }
1090 }
1091
1092 /* Configure analog phase-lock-loop before activating to D0A */
7cb1b088
WYG		 1093 if (priv->cfg->base_params->pll_cfg_val)
1094 iwl_set_bit(priv, CSR_ANA_PLL_CFG,
1095 priv->cfg->base_params->pll_cfg_val);
fadb3582
BC		 1096
1097 /*
1098 * Set "initialization complete" bit to move adapter from
1099 * D0U* --> D0A* (powered-up active) state.
1100 */
1101 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1102
1103 /*
1104 * Wait for clock stabilization; once stabilized, access to
1105 * device-internal resources is supported, e.g. iwl_write_prph()
1106 * and accesses to uCode SRAM.
1107 */
1108 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1109 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1110 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1111 if (ret < 0) {
1112 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1113 goto out;
1114 }
1115
1116 /*
1117 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1118 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1119 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1120 * and don't need BSM to restore data after power-saving sleep.
1121 *
1122 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1123 * do not disable clocks. This preserves any hardware bits already
1124 * set by default in "CLK_CTRL_REG" after reset.
1125 */
7cb1b088 1126 if (priv->cfg->base_params->use_bsm)
fadb3582
BC		 1127 iwl_write_prph(priv, APMG_CLK_EN_REG,
1128 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1129 else
1130 iwl_write_prph(priv, APMG_CLK_EN_REG,
1131 APMG_CLK_VAL_DMA_CLK_RQT);
1132 udelay(20);
1133
1134 /* Disable L1-Active */
1135 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1136 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1137
1138out:
1139 return ret;
1140}
1141EXPORT_SYMBOL(iwl_apm_init);
1142
1143
630fe9b6
TW		 1144int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1145{
a25a66ac
SG		 1146 int ret;
1147 s8 prev_tx_power;
1148
1149 lockdep_assert_held(&priv->mutex);
1150
1151 if (priv->tx_power_user_lmt == tx_power && !force)
1152 return 0;
1153
1154 if (!priv->cfg->ops->lib->send_tx_power)
1155 return -EOPNOTSUPP;
5eadd94b 1156
b744cb79
WYG		 1157 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1158 IWL_WARN(priv,
1159 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1160 tx_power,
b744cb79 1161 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1162 return -EINVAL;
1163 }
1164
dc1b0973 1165 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1166 IWL_WARN(priv,
1167 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1168 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1169 return -EINVAL;
1170 }
1171
a25a66ac
SG		 1172 if (!iwl_is_ready_rf(priv))
1173 return -EIO;
630fe9b6 1174
a25a66ac
SG		 1175 /* scan complete use tx_power_next, need to be updated */
1176 priv->tx_power_next = tx_power;
1177 if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
1178 IWL_DEBUG_INFO(priv, "Deferring tx power set while scanning\n");
1179 return 0;
5eadd94b 1180 }
630fe9b6 1181
a25a66ac
SG		 1182 prev_tx_power = priv->tx_power_user_lmt;
1183 priv->tx_power_user_lmt = tx_power;
1184
1185 ret = priv->cfg->ops->lib->send_tx_power(priv);
1186
1187 /* if fail to set tx_power, restore the orig. tx power */
1188 if (ret) {
1189 priv->tx_power_user_lmt = prev_tx_power;
1190 priv->tx_power_next = prev_tx_power;
1191 }
630fe9b6
TW		 1192 return ret;
1193}
1194EXPORT_SYMBOL(iwl_set_tx_power);
1195
65b52bde 1196void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1197{
1198 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1199 .lead_time = BT_LEAD_TIME_DEF,
1200 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1201 .kill_ack_mask = 0,
1202 .kill_cts_mask = 0,
1203 };
1204
06702a73
WYG		 1205 if (!bt_coex_active)
1206 bt_cmd.flags = BT_COEX_DISABLE;
1207 else
1208 bt_cmd.flags = BT_COEX_ENABLE;
1209
1210 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1211 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1212
65b52bde
JB		 1213 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1214 sizeof(struct iwl_bt_cmd), &bt_cmd))
1215 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1216}
1217EXPORT_SYMBOL(iwl_send_bt_config);
1218
ef8d5529 1219int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1220{
ef8d5529
WYG		 1221 struct iwl_statistics_cmd statistics_cmd = {
1222 .configuration_flags =
1223 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1224 };
ef8d5529
WYG		 1225
1226 if (flags & CMD_ASYNC)
1227 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1228 sizeof(struct iwl_statistics_cmd),
1229 &statistics_cmd, NULL);
1230 else
1231 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1232 sizeof(struct iwl_statistics_cmd),
1233 &statistics_cmd);
49ea8596
EG		 1234}
1235EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1236
030f05ed
AK		 1237void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1238 struct iwl_rx_mem_buffer *rxb)
1239{
1240#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1241 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1242 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1243 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1244 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1245#endif
1246}
1247EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1248
1249void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1250 struct iwl_rx_mem_buffer *rxb)
1251{
2f301227 1252 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1253 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1254 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1255 "notification for %s:\n", len,
1256 get_cmd_string(pkt->hdr.cmd));
1257 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1258}
1259EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1260
1261void iwl_rx_reply_error(struct iwl_priv *priv,
1262 struct iwl_rx_mem_buffer *rxb)
1263{
2f301227 1264 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1265
1266 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1267 "seq 0x%04X ser 0x%08X\n",
1268 le32_to_cpu(pkt->u.err_resp.error_type),
1269 get_cmd_string(pkt->u.err_resp.cmd_id),
1270 pkt->u.err_resp.cmd_id,
1271 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1272 le32_to_cpu(pkt->u.err_resp.error_info));
1273}
1274EXPORT_SYMBOL(iwl_rx_reply_error);
1275
a83b9141
WYG		 1276void iwl_clear_isr_stats(struct iwl_priv *priv)
1277{
1278 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1279}
a83b9141 1280
488829f1
AK		 1281int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1282 const struct ieee80211_tx_queue_params *params)
1283{
1284 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1285 struct iwl_rxon_context *ctx;
488829f1
AK		 1286 unsigned long flags;
1287 int q;
1288
1289 IWL_DEBUG_MAC80211(priv, "enter\n");
1290
1291 if (!iwl_is_ready_rf(priv)) {
1292 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1293 return -EIO;
1294 }
1295
1296 if (queue >= AC_NUM) {
1297 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1298 return 0;
1299 }
1300
1301 q = AC_NUM - 1 - queue;
1302
1303 spin_lock_irqsave(&priv->lock, flags);
1304
8dfdb9d5
JB		 1305 /*
1306 * MULTI-FIXME
1307 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1308 */
1309 for_each_context(priv, ctx) {
1310 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1311 cpu_to_le16(params->cw_min);
1312 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1313 cpu_to_le16(params->cw_max);
1314 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1315 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1316 cpu_to_le16((params->txop * 32));
1317
1318 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1319 }
488829f1
AK		 1320
1321 spin_unlock_irqrestore(&priv->lock, flags);
1322
1323 IWL_DEBUG_MAC80211(priv, "leave\n");
1324 return 0;
1325}
1326EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1327
a85d7cca
JB		 1328int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1329{
1330 struct iwl_priv *priv = hw->priv;
1331
1332 return priv->ibss_manager == IWL_IBSS_MANAGER;
1333}
1334EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1335
d4daaea6 1336static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
727882d6 1337{
d0fe478c 1338 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK		 1339
1340 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1341 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1342
246ed355 1343 return iwlcore_commit_rxon(priv, ctx);
727882d6 1344}
727882d6 1345
d4daaea6
JB		 1346static int iwl_setup_interface(struct iwl_priv *priv,
1347 struct iwl_rxon_context *ctx)
1348{
1349 struct ieee80211_vif *vif = ctx->vif;
1350 int err;
1351
1352 lockdep_assert_held(&priv->mutex);
1353
1354 /*
1355 * This variable will be correct only when there's just
1356 * a single context, but all code using it is for hardware
1357 * that supports only one context.
1358 */
1359 priv->iw_mode = vif->type;
1360
1361 ctx->is_active = true;
1362
1363 err = iwl_set_mode(priv, ctx);
1364 if (err) {
1365 if (!ctx->always_active)
1366 ctx->is_active = false;
1367 return err;
1368 }
1369
1370 if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
1371 vif->type == NL80211_IFTYPE_ADHOC) {
1372 /*
1373 * pretend to have high BT traffic as long as we
1374 * are operating in IBSS mode, as this will cause
1375 * the rate scaling etc. to behave as intended.
1376 */
1377 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1378 }
1379
1380 return 0;
1381}
1382
b55e75ed 1383int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1384{
1385 struct iwl_priv *priv = hw->priv;
246ed355 1386 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1387 struct iwl_rxon_context *tmp, *ctx = NULL;
d4daaea6 1388 int err;
cbb6ab94 1389
3779db10
JB		 1390 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1391 vif->type, vif->addr);
cbb6ab94 1392
47e28f41
JB		 1393 mutex_lock(&priv->mutex);
1394
4bd530f3
SG		 1395 if (!iwl_is_ready_rf(priv)) {
1396 IWL_WARN(priv, "Try to add interface when device not ready\n");
b55e75ed
JB		 1397 err = -EINVAL;
1398 goto out;
1399 }
1400
d0fe478c
JB		 1401 for_each_context(priv, tmp) {
1402 u32 possible_modes =
1403 tmp->interface_modes | tmp->exclusive_interface_modes;
1404
1405 if (tmp->vif) {
1406 /* check if this busy context is exclusive */
1407 if (tmp->exclusive_interface_modes &
1408 BIT(tmp->vif->type)) {
1409 err = -EINVAL;
1410 goto out;
1411 }
1412 continue;
1413 }
1414
1415 if (!(possible_modes & BIT(vif->type)))
1416 continue;
1417
1418 /* have maybe usable context w/o interface */
1419 ctx = tmp;
1420 break;
1421 }
1422
1423 if (!ctx) {
47e28f41
JB		 1424 err = -EOPNOTSUPP;
1425 goto out;
cbb6ab94
AK		 1426 }
1427
d0fe478c 1428 vif_priv->ctx = ctx;
8bd413e6 1429 ctx->vif = vif;
59079949 1430
d4daaea6
JB		 1431 err = iwl_setup_interface(priv, ctx);
1432 if (!err)
1433 goto out;
cbb6ab94 1434
8bd413e6 1435 ctx->vif = NULL;
b55e75ed 1436 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1437 out:
cbb6ab94
AK		 1438 mutex_unlock(&priv->mutex);
1439
1440 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1441 return err;
cbb6ab94
AK		 1442}
1443EXPORT_SYMBOL(iwl_mac_add_interface);
1444
d4daaea6
JB		 1445static void iwl_teardown_interface(struct iwl_priv *priv,
1446 struct ieee80211_vif *vif,
1447 bool mode_change)
d8052319 1448{
246ed355 1449 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
d8052319 1450
d4daaea6 1451 lockdep_assert_held(&priv->mutex);
d0fe478c 1452
e7e16b90
SG		 1453 if (priv->scan_vif == vif) {
1454 iwl_scan_cancel_timeout(priv, 200);
1455 iwl_force_scan_end(priv);
1456 }
8bd413e6 1457
d4daaea6
JB		 1458 if (!mode_change) {
1459 iwl_set_mode(priv, ctx);
1460 if (!ctx->always_active)
1461 ctx->is_active = false;
1462 }
763cc3bf 1463
59079949
JB		 1464 /*
1465 * When removing the IBSS interface, overwrite the
1466 * BT traffic load with the stored one from the last
1467 * notification, if any. If this is a device that
1468 * doesn't implement this, this has no effect since
1469 * both values are the same and zero.
1470 */
1471 if (vif->type == NL80211_IFTYPE_ADHOC)
66e863a5 1472 priv->bt_traffic_load = priv->last_bt_traffic_load;
d4daaea6
JB		 1473}
1474
1475void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1476 struct ieee80211_vif *vif)
1477{
1478 struct iwl_priv *priv = hw->priv;
1479 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1480
1481 IWL_DEBUG_MAC80211(priv, "enter\n");
1482
1483 mutex_lock(&priv->mutex);
1484
1485 WARN_ON(ctx->vif != vif);
1486 ctx->vif = NULL;
1487
1488 iwl_teardown_interface(priv, vif, false);
59079949 1489
8bd413e6 1490 memset(priv->bssid, 0, ETH_ALEN);
d8052319
AK		 1491 mutex_unlock(&priv->mutex);
1492
1493 IWL_DEBUG_MAC80211(priv, "leave\n");
1494
1495}
1496EXPORT_SYMBOL(iwl_mac_remove_interface);
1497
88804e2b
WYG		 1498int iwl_alloc_txq_mem(struct iwl_priv *priv)
1499{
1500 if (!priv->txq)
1501 priv->txq = kzalloc(
7cb1b088
WYG		 1502 sizeof(struct iwl_tx_queue) *
1503 priv->cfg->base_params->num_of_queues,
88804e2b
WYG		 1504 GFP_KERNEL);
1505 if (!priv->txq) {
91dd6c27 1506 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 1507 return -ENOMEM;
1508 }
1509 return 0;
1510}
1511EXPORT_SYMBOL(iwl_alloc_txq_mem);
1512
1513void iwl_free_txq_mem(struct iwl_priv *priv)
1514{
1515 kfree(priv->txq);
1516 priv->txq = NULL;
1517}
1518EXPORT_SYMBOL(iwl_free_txq_mem);
1519
20594eb0
WYG		 1520#ifdef CONFIG_IWLWIFI_DEBUGFS
1521
1522#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
1523
1524void iwl_reset_traffic_log(struct iwl_priv *priv)
1525{
1526 priv->tx_traffic_idx = 0;
1527 priv->rx_traffic_idx = 0;
1528 if (priv->tx_traffic)
1529 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1530 if (priv->rx_traffic)
1531 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1532}
1533
1534int iwl_alloc_traffic_mem(struct iwl_priv *priv)
1535{
1536 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1537
1538 if (iwl_debug_level & IWL_DL_TX) {
1539 if (!priv->tx_traffic) {
1540 priv->tx_traffic =
1541 kzalloc(traffic_size, GFP_KERNEL);
1542 if (!priv->tx_traffic)
1543 return -ENOMEM;
1544 }
1545 }
1546 if (iwl_debug_level & IWL_DL_RX) {
1547 if (!priv->rx_traffic) {
1548 priv->rx_traffic =
1549 kzalloc(traffic_size, GFP_KERNEL);
1550 if (!priv->rx_traffic)
1551 return -ENOMEM;
1552 }
1553 }
1554 iwl_reset_traffic_log(priv);
1555 return 0;
1556}
1557EXPORT_SYMBOL(iwl_alloc_traffic_mem);
1558
1559void iwl_free_traffic_mem(struct iwl_priv *priv)
1560{
1561 kfree(priv->tx_traffic);
1562 priv->tx_traffic = NULL;
1563
1564 kfree(priv->rx_traffic);
1565 priv->rx_traffic = NULL;
1566}
1567EXPORT_SYMBOL(iwl_free_traffic_mem);
1568
1569void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1570 u16 length, struct ieee80211_hdr *header)
1571{
1572 __le16 fc;
1573 u16 len;
1574
1575 if (likely(!(iwl_debug_level & IWL_DL_TX)))
1576 return;
1577
1578 if (!priv->tx_traffic)
1579 return;
1580
1581 fc = header->frame_control;
1582 if (ieee80211_is_data(fc)) {
1583 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1584 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1585 memcpy((priv->tx_traffic +
1586 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1587 header, len);
1588 priv->tx_traffic_idx =
1589 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1590 }
1591}
1592EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
1593
1594void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1595 u16 length, struct ieee80211_hdr *header)
1596{
1597 __le16 fc;
1598 u16 len;
1599
1600 if (likely(!(iwl_debug_level & IWL_DL_RX)))
1601 return;
1602
1603 if (!priv->rx_traffic)
1604 return;
1605
1606 fc = header->frame_control;
1607 if (ieee80211_is_data(fc)) {
1608 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1609 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1610 memcpy((priv->rx_traffic +
1611 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1612 header, len);
1613 priv->rx_traffic_idx =
1614 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1615 }
1616}
1617EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 1618
1619const char *get_mgmt_string(int cmd)
1620{
1621 switch (cmd) {
1622 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1623 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1624 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1625 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1626 IWL_CMD(MANAGEMENT_PROBE_REQ);
1627 IWL_CMD(MANAGEMENT_PROBE_RESP);
1628 IWL_CMD(MANAGEMENT_BEACON);
1629 IWL_CMD(MANAGEMENT_ATIM);
1630 IWL_CMD(MANAGEMENT_DISASSOC);
1631 IWL_CMD(MANAGEMENT_AUTH);
1632 IWL_CMD(MANAGEMENT_DEAUTH);
1633 IWL_CMD(MANAGEMENT_ACTION);
1634 default:
1635 return "UNKNOWN";
1636
1637 }
1638}
1639
1640const char *get_ctrl_string(int cmd)
1641{
1642 switch (cmd) {
1643 IWL_CMD(CONTROL_BACK_REQ);
1644 IWL_CMD(CONTROL_BACK);
1645 IWL_CMD(CONTROL_PSPOLL);
1646 IWL_CMD(CONTROL_RTS);
1647 IWL_CMD(CONTROL_CTS);
1648 IWL_CMD(CONTROL_ACK);
1649 IWL_CMD(CONTROL_CFEND);
1650 IWL_CMD(CONTROL_CFENDACK);
1651 default:
1652 return "UNKNOWN";
1653
1654 }
1655}
1656
7163b8a4 1657void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 1658{
1659 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 1660 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 1661 priv->led_tpt = 0;
22fdf3c9
WYG		 1662}
1663
1664/*
1665 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1666 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1667 * Use debugFs to display the rx/rx_statistics
1668 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1669 * information will be recorded, but DATA pkt still will be recorded
1670 * for the reason of iwl_led.c need to control the led blinking based on
1671 * number of tx and rx data.
1672 *
1673 */
1674void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1675{
1676 struct traffic_stats *stats;
1677
1678 if (is_tx)
1679 stats = &priv->tx_stats;
1680 else
1681 stats = &priv->rx_stats;
1682
1683 if (ieee80211_is_mgmt(fc)) {
1684 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1685 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1686 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1687 break;
1688 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1689 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1690 break;
1691 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1692 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1693 break;
1694 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1695 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1696 break;
1697 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1698 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1699 break;
1700 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1701 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1702 break;
1703 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1704 stats->mgmt[MANAGEMENT_BEACON]++;
1705 break;
1706 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1707 stats->mgmt[MANAGEMENT_ATIM]++;
1708 break;
1709 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1710 stats->mgmt[MANAGEMENT_DISASSOC]++;
1711 break;
1712 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1713 stats->mgmt[MANAGEMENT_AUTH]++;
1714 break;
1715 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1716 stats->mgmt[MANAGEMENT_DEAUTH]++;
1717 break;
1718 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1719 stats->mgmt[MANAGEMENT_ACTION]++;
1720 break;
1721 }
1722 } else if (ieee80211_is_ctl(fc)) {
1723 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1724 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1725 stats->ctrl[CONTROL_BACK_REQ]++;
1726 break;
1727 case cpu_to_le16(IEEE80211_STYPE_BACK):
1728 stats->ctrl[CONTROL_BACK]++;
1729 break;
1730 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1731 stats->ctrl[CONTROL_PSPOLL]++;
1732 break;
1733 case cpu_to_le16(IEEE80211_STYPE_RTS):
1734 stats->ctrl[CONTROL_RTS]++;
1735 break;
1736 case cpu_to_le16(IEEE80211_STYPE_CTS):
1737 stats->ctrl[CONTROL_CTS]++;
1738 break;
1739 case cpu_to_le16(IEEE80211_STYPE_ACK):
1740 stats->ctrl[CONTROL_ACK]++;
1741 break;
1742 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1743 stats->ctrl[CONTROL_CFEND]++;
1744 break;
1745 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1746 stats->ctrl[CONTROL_CFENDACK]++;
1747 break;
1748 }
1749 } else {
1750 /* data */
1751 stats->data_cnt++;
1752 stats->data_bytes += len;
1753 }
d5f4cf71 1754 iwl_leds_background(priv);
22fdf3c9
WYG		 1755}
1756EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 1757#endif
1758
a93e7973 1759static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 1760{
1761 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1762 return;
1763
246ed355 1764 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 1765 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1766 return;
1767 }
1768 /*
1769 * There is no easy and better way to force reset the radio,
1770 * the only known method is switching channel which will force to
1771 * reset and tune the radio.
1772 * Use internal short scan (single channel) operation to should
1773 * achieve this objective.
1774 * Driver should reset the radio when number of consecutive missed
1775 * beacon, or any other uCode error condition detected.
1776 */
1777 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1778 iwl_internal_short_hw_scan(priv);
afbdd69a 1779}
a93e7973 1780
a93e7973 1781
c04f9f22 1782int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 1783{
8a472da4
WYG		 1784 struct iwl_force_reset *force_reset;
1785
a93e7973
WYG		 1786 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1787 return -EINVAL;
1788
8a472da4
WYG		 1789 if (mode >= IWL_MAX_FORCE_RESET) {
1790 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1791 return -EINVAL;
1792 }
1793 force_reset = &priv->force_reset[mode];
1794 force_reset->reset_request_count++;
c04f9f22
WYG		 1795 if (!external) {
1796 if (force_reset->last_force_reset_jiffies &&
1797 time_after(force_reset->last_force_reset_jiffies +
1798 force_reset->reset_duration, jiffies)) {
1799 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1800 force_reset->reset_reject_count++;
1801 return -EAGAIN;
1802 }
a93e7973 1803 }
8a472da4
WYG		 1804 force_reset->reset_success_count++;
1805 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 1806 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 1807 switch (mode) {
1808 case IWL_RF_RESET:
1809 iwl_force_rf_reset(priv);
1810 break;
1811 case IWL_FW_RESET:
c04f9f22
WYG		 1812 /*
1813 * if the request is from external(ex: debugfs),
1814 * then always perform the request in regardless the module
1815 * parameter setting
1816 * if the request is from internal (uCode error or driver
1817 * detect failure), then fw_restart module parameter
1818 * need to be check before performing firmware reload
1819 */
1820 if (!external && !priv->cfg->mod_params->restart_fw) {
1821 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1822 "module parameter setting\n");
1823 break;
1824 }
a93e7973
WYG		 1825 IWL_ERR(priv, "On demand firmware reload\n");
1826 /* Set the FW error flag -- cleared on iwl_down */
1827 set_bit(STATUS_FW_ERROR, &priv->status);
1828 wake_up_interruptible(&priv->wait_command_queue);
1829 /*
1830 * Keep the restart process from trying to send host
1831 * commands by clearing the INIT status bit
1832 */
1833 clear_bit(STATUS_READY, &priv->status);
1834 queue_work(priv->workqueue, &priv->restart);
1835 break;
a93e7973 1836 }
a93e7973
WYG		 1837 return 0;
1838}
b74e31a9 1839
d4daaea6
JB		 1840int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1841 enum nl80211_iftype newtype, bool newp2p)
1842{
1843 struct iwl_priv *priv = hw->priv;
1844 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1845 struct iwl_rxon_context *tmp;
1846 u32 interface_modes;
1847 int err;
1848
1849 newtype = ieee80211_iftype_p2p(newtype, newp2p);
1850
1851 mutex_lock(&priv->mutex);
1852
1853 interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
1854
1855 if (!(interface_modes & BIT(newtype))) {
1856 err = -EBUSY;
1857 goto out;
1858 }
1859
1860 if (ctx->exclusive_interface_modes & BIT(newtype)) {
1861 for_each_context(priv, tmp) {
1862 if (ctx == tmp)
1863 continue;
1864
1865 if (!tmp->vif)
1866 continue;
1867
1868 /*
1869 * The current mode switch would be exclusive, but
1870 * another context is active ... refuse the switch.
1871 */
1872 err = -EBUSY;
1873 goto out;
1874 }
1875 }
1876
1877 /* success */
1878 iwl_teardown_interface(priv, vif, true);
1879 vif->type = newtype;
1880 err = iwl_setup_interface(priv, ctx);
1881 WARN_ON(err);
1882 /*
1883 * We've switched internally, but submitting to the
1884 * device may have failed for some reason. Mask this
1885 * error, because otherwise mac80211 will not switch
1886 * (and set the interface type back) and we'll be
1887 * out of sync with it.
1888 */
1889 err = 0;
1890
1891 out:
1892 mutex_unlock(&priv->mutex);
1893 return err;
1894}
1895EXPORT_SYMBOL(iwl_mac_change_interface);
1896
b74e31a9
WYG		 1897/**
1898 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
1899 *
1900 * During normal condition (no queue is stuck), the timer is continually set to
1901 * execute every monitor_recover_period milliseconds after the last timer
1902 * expired. When the queue read_ptr is at the same place, the timer is
1903 * shorten to 100mSecs. This is
1904 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
1905 * 2) to detect the stuck queues quicker before the station and AP can
1906 * disassociate each other.
1907 *
1908 * This function monitors all the tx queues and recover from it if any
1909 * of the queues are stuck.
1910 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
1911 * it will recover by resetting the firmware and return.
1912 * 2. Then, it checks for station association. If it associates it will check
1913 * other queues. If any queue is stuck, it will recover by resetting
1914 * the firmware.
1915 * Note: It the number of times the queue read_ptr to be at the same place to
1916 * be MAX_REPEAT+1 in order to consider to be stuck.
1917 */
1918/*
1919 * The maximum number of times the read pointer of the tx queue at the
1920 * same place without considering to be stuck.
1921 */
1922#define MAX_REPEAT (2)
1923static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
1924{
1925 struct iwl_tx_queue *txq;
1926 struct iwl_queue *q;
1927
1928 txq = &priv->txq[cnt];
1929 q = &txq->q;
1930 /* queue is empty, skip */
7cb1b088
WYG		 1931 if (q->read_ptr == q->write_ptr)
1932 return 0;
1933
1934 if (q->read_ptr == q->last_read_ptr) {
1935 /* a queue has not been read from last time */
1936 if (q->repeat_same_read_ptr > MAX_REPEAT) {
1937 IWL_ERR(priv,
1938 "queue %d stuck %d time. Fw reload.\n",
1939 q->id, q->repeat_same_read_ptr);
b74e31a9 1940 q->repeat_same_read_ptr = 0;
7cb1b088
WYG		 1941 iwl_force_reset(priv, IWL_FW_RESET, false);
1942 } else {
1943 q->repeat_same_read_ptr++;
1944 IWL_DEBUG_RADIO(priv,
1945 "queue %d, not read %d time\n",
1946 q->id,
1947 q->repeat_same_read_ptr);
de05ead8
WYG		 1948 mod_timer(&priv->monitor_recover,
1949 jiffies + msecs_to_jiffies(
1950 IWL_ONE_HUNDRED_MSECS));
1951 return 1;
b74e31a9 1952 }
7cb1b088
WYG		 1953 } else {
1954 q->last_read_ptr = q->read_ptr;
1955 q->repeat_same_read_ptr = 0;
b74e31a9
WYG		 1956 }
1957 return 0;
1958}
1959
1960void iwl_bg_monitor_recover(unsigned long data)
1961{
1962 struct iwl_priv *priv = (struct iwl_priv *)data;
1963 int cnt;
1964
1965 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1966 return;
1967
1968 /* monitor and check for stuck cmd queue */
13bb9483 1969 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG		 1970 return;
1971
1972 /* monitor and check for other stuck queues */
246ed355 1973 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG		 1974 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
1975 /* skip as we already checked the command queue */
13bb9483 1976 if (cnt == priv->cmd_queue)
b74e31a9
WYG		 1977 continue;
1978 if (iwl_check_stuck_queue(priv, cnt))
1979 return;
1980 }
1981 }
7cb1b088 1982 if (priv->cfg->base_params->monitor_recover_period) {
7bdc473c
WYG		 1983 /*
1984 * Reschedule the timer to occur in
7cb1b088 1985 * priv->cfg->base_params->monitor_recover_period
7bdc473c
WYG		 1986 */
1987 mod_timer(&priv->monitor_recover, jiffies + msecs_to_jiffies(
7cb1b088 1988 priv->cfg->base_params->monitor_recover_period));
7bdc473c 1989 }
b74e31a9
WYG		 1990}
1991EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 1992
a0ee74cf
WYG		 1993
1994/*
1995 * extended beacon time format
1996 * time in usec will be changed into a 32-bit value in extended:internal format
1997 * the extended part is the beacon counts
1998 * the internal part is the time in usec within one beacon interval
1999 */
2000u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2001{
2002 u32 quot;
2003 u32 rem;
2004 u32 interval = beacon_interval * TIME_UNIT;
2005
2006 if (!interval || !usec)
2007 return 0;
2008
2009 quot = (usec / interval) &
2010 (iwl_beacon_time_mask_high(priv,
2011 priv->hw_params.beacon_time_tsf_bits) >>
2012 priv->hw_params.beacon_time_tsf_bits);
2013 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2014 priv->hw_params.beacon_time_tsf_bits);
2015
2016 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2017}
2018EXPORT_SYMBOL(iwl_usecs_to_beacons);
2019
2020/* base is usually what we get from ucode with each received frame,
2021 * the same as HW timer counter counting down
2022 */
2023__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2024 u32 addon, u32 beacon_interval)
2025{
2026 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2027 priv->hw_params.beacon_time_tsf_bits);
2028 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2029 priv->hw_params.beacon_time_tsf_bits);
2030 u32 interval = beacon_interval * TIME_UNIT;
2031 u32 res = (base & iwl_beacon_time_mask_high(priv,
2032 priv->hw_params.beacon_time_tsf_bits)) +
2033 (addon & iwl_beacon_time_mask_high(priv,
2034 priv->hw_params.beacon_time_tsf_bits));
2035
2036 if (base_low > addon_low)
2037 res += base_low - addon_low;
2038 else if (base_low < addon_low) {
2039 res += interval + base_low - addon_low;
2040 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2041 } else
2042 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2043
2044 return cpu_to_le32(res);
2045}
2046EXPORT_SYMBOL(iwl_add_beacon_time);
2047
6da3a13e
WYG		 2048#ifdef CONFIG_PM
2049
f60dc013 2050int iwl_pci_suspend(struct device *device)
6da3a13e 2051{
f60dc013 2052 struct pci_dev *pdev = to_pci_dev(device);
6da3a13e
WYG		 2053 struct iwl_priv *priv = pci_get_drvdata(pdev);
2054
2055 /*
2056 * This function is called when system goes into suspend state
2057 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2058 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2059 * it will not call apm_ops.stop() to stop the DMA operation.
2060 * Calling apm_ops.stop here to make sure we stop the DMA.
2061 */
14e8e4af 2062 iwl_apm_stop(priv);
6da3a13e 2063
6da3a13e
WYG		 2064 return 0;
2065}
2066EXPORT_SYMBOL(iwl_pci_suspend);
2067
f60dc013 2068int iwl_pci_resume(struct device *device)
6da3a13e 2069{
f60dc013 2070 struct pci_dev *pdev = to_pci_dev(device);
6da3a13e 2071 struct iwl_priv *priv = pci_get_drvdata(pdev);
0ab84cff 2072 bool hw_rfkill = false;
6da3a13e 2073
cd398c31
AK		 2074 /*
2075 * We disable the RETRY_TIMEOUT register (0x41) to keep
2076 * PCI Tx retries from interfering with C3 CPU state.
2077 */
2078 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2079
6da3a13e
WYG		 2080 iwl_enable_interrupts(priv);
2081
0ab84cff
JB		 2082 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2083 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2084 hw_rfkill = true;
2085
2086 if (hw_rfkill)
2087 set_bit(STATUS_RF_KILL_HW, &priv->status);
2088 else
2089 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2090
2091 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2092
6da3a13e
WYG		 2093 return 0;
2094}
2095EXPORT_SYMBOL(iwl_pci_resume);
2096
f60dc013
JL		 2097const struct dev_pm_ops iwl_pm_ops = {
2098 .suspend = iwl_pci_suspend,
2099 .resume = iwl_pci_resume,
2100 .freeze = iwl_pci_suspend,
2101 .thaw = iwl_pci_resume,
2102 .poweroff = iwl_pci_suspend,
2103 .restore = iwl_pci_resume,
2104};
2105EXPORT_SYMBOL(iwl_pm_ops);
2106
6da3a13e 2107#endif /* CONFIG_PM */
Linux kernel - Deliverables
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