projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
iwlagn: remove spectrum measurement header
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
901069c7 5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
9d143e9a 44#include "iwl-agn.h"
df48c323 45
1d0a082d 46
06702a73
WYG		 47/*
48 * set bt_coex_active to true, uCode will do kill/defer
49 * every time the priority line is asserted (BT is sending signals on the
50 * priority line in the PCIx).
51 * set bt_coex_active to false, uCode will ignore the BT activity and
52 * perform the normal operation
53 *
54 * User might experience transmit issue on some platform due to WiFi/BT
55 * co-exist problem. The possible behaviors are:
56 * Able to scan and finding all the available AP
57 * Not able to associate with any AP
58 * On those platforms, WiFi communication can be restored by set
59 * "bt_coex_active" module parameter to "false"
60 *
61 * default: bt_coex_active = true (BT_COEX_ENABLE)
62 */
670245ed 63bool bt_coex_active = true;
06702a73 64module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 65MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 66
a562a9dd 67u32 iwl_debug_level;
a562a9dd 68
57bd1bea 69const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
57bd1bea 70
d9fe60de
JB		 71#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
72#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 73static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 74 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 75 enum ieee80211_band band)
76{
39130df3
RR		 77 u16 max_bit_rate = 0;
78 u8 rx_chains_num = priv->hw_params.rx_chains_num;
79 u8 tx_chains_num = priv->hw_params.tx_chains_num;
80
c7de35cd 81 ht_info->cap = 0;
d9fe60de 82 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 83
d9fe60de 84 ht_info->ht_supported = true;
c7de35cd 85
7cb1b088
WYG		 86 if (priv->cfg->ht_params &&
87 priv->cfg->ht_params->ht_greenfield_support)
b261793d 88 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 89 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 90 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 91 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 92 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
93 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
94 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 95 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 96 }
c7de35cd 97
9d143e9a 98 if (iwlagn_mod_params.amsdu_size_8K)
d9fe60de 99 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 100
101 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
7cb1b088
WYG		 102 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
103 ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
c7de35cd 104 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
7cb1b088
WYG		 105 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
106 ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
c7de35cd 107
d9fe60de 108 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 109 if (rx_chains_num >= 2)
d9fe60de 110 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 111 if (rx_chains_num >= 3)
d9fe60de 112 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 113
114 /* Highest supported Rx data rate */
115 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 116 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
117 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 118
119 /* Tx MCS capabilities */
d9fe60de 120 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 121 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 122 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
123 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
124 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 125 }
c7de35cd 126}
c7de35cd 127
c7de35cd
RR		 128/**
129 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
130 */
534166de 131int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 132{
133 struct iwl_channel_info *ch;
134 struct ieee80211_supported_band *sband;
135 struct ieee80211_channel *channels;
136 struct ieee80211_channel *geo_ch;
137 struct ieee80211_rate *rates;
138 int i = 0;
75d80cad 139 s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR		 140
141 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
142 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 143 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 144 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
145 return 0;
146 }
147
148 channels = kzalloc(sizeof(struct ieee80211_channel) *
149 priv->channel_count, GFP_KERNEL);
150 if (!channels)
151 return -ENOMEM;
152
5027309b 153 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 154 GFP_KERNEL);
155 if (!rates) {
156 kfree(channels);
157 return -ENOMEM;
158 }
159
160 /* 5.2GHz channels start after the 2.4GHz channels */
161 sband = &priv->bands[IEEE80211_BAND_5GHZ];
162 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
163 /* just OFDM */
164 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 165 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 166
49779293 167 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 168 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 169 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 170
171 sband = &priv->bands[IEEE80211_BAND_2GHZ];
172 sband->channels = channels;
173 /* OFDM & CCK */
174 sband->bitrates = rates;
5027309b 175 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 176
49779293 177 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 178 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 179 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 180
181 priv->ieee_channels = channels;
182 priv->ieee_rates = rates;
183
c7de35cd
RR		 184 for (i = 0; i < priv->channel_count; i++) {
185 ch = &priv->channel_info[i];
186
187 /* FIXME: might be removed if scan is OK */
188 if (!is_channel_valid(ch))
189 continue;
190
5a3a0352 191 sband = &priv->bands[ch->band];
c7de35cd
RR		 192
193 geo_ch = &sband->channels[sband->n_channels++];
194
195 geo_ch->center_freq =
5a3a0352 196 ieee80211_channel_to_frequency(ch->channel, ch->band);
c7de35cd
RR		 197 geo_ch->max_power = ch->max_power_avg;
198 geo_ch->max_antenna_gain = 0xff;
199 geo_ch->hw_value = ch->channel;
200
201 if (is_channel_valid(ch)) {
202 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
203 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
204
205 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
206 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
207
208 if (ch->flags & EEPROM_CHANNEL_RADAR)
209 geo_ch->flags |= IEEE80211_CHAN_RADAR;
210
7aafef1c 211 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 212
75d80cad
SG		 213 if (ch->max_power_avg > max_tx_power)
214 max_tx_power = ch->max_power_avg;
c7de35cd
RR		 215 } else {
216 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
217 }
218
e1623446 219 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 220 ch->channel, geo_ch->center_freq,
221 is_channel_a_band(ch) ? "5.2" : "2.4",
222 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
223 "restricted" : "valid",
224 geo_ch->flags);
225 }
226
75d80cad
SG		 227 priv->tx_power_device_lmt = max_tx_power;
228 priv->tx_power_user_lmt = max_tx_power;
229 priv->tx_power_next = max_tx_power;
230
c7de35cd
RR		 231 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
232 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 233 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
234 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 235 priv->pci_dev->device,
236 priv->pci_dev->subsystem_device);
c7de35cd
RR		 237 priv->cfg->sku &= ~IWL_SKU_A;
238 }
239
978785a3 240 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 241 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
242 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 243
244 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
245
246 return 0;
247}
248
249/*
250 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
251 */
534166de 252void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 253{
254 kfree(priv->ieee_channels);
255 kfree(priv->ieee_rates);
256 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
257}
c7de35cd 258
7e6a5886
JB		 259static bool iwl_is_channel_extension(struct iwl_priv *priv,
260 enum ieee80211_band band,
261 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 262{
263 const struct iwl_channel_info *ch_info;
264
265 ch_info = iwl_get_channel_info(priv, band, channel);
266 if (!is_channel_valid(ch_info))
7e6a5886 267 return false;
47c5196e 268
d9fe60de 269 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 270 return !(ch_info->ht40_extension_channel &
689da1b3 271 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 272 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 273 return !(ch_info->ht40_extension_channel &
689da1b3 274 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 275
7e6a5886 276 return false;
47c5196e
TW		 277}
278
7e6a5886
JB		 279bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
280 struct iwl_rxon_context *ctx,
281 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 282{
7e6a5886
JB		 283 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
284 return false;
47c5196e 285
7e6a5886
JB		 286 /*
287 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 288 * the bit will not set if it is pure 40MHz case
289 */
7e6a5886
JB		 290 if (ht_cap && !ht_cap->ht_supported)
291 return false;
292
d73e4923 293#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 294 if (priv->disable_ht40)
7e6a5886 295 return false;
1e4247d4 296#endif
7e6a5886 297
611d3eb7 298 return iwl_is_channel_extension(priv, priv->band,
246ed355 299 le16_to_cpu(ctx->staging.channel),
7e6a5886 300 ctx->ht.extension_chan_offset);
47c5196e 301}
47c5196e 302
2c2f3b33
TW		 303static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
304{
ea196fdb
JB		 305 u16 new_val;
306 u16 beacon_factor;
307
308 /*
309 * If mac80211 hasn't given us a beacon interval, program
310 * the default into the device (not checking this here
311 * would cause the adjustment below to return the maximum
312 * value, which may break PAN.)
313 */
314 if (!beacon_val)
315 return DEFAULT_BEACON_INTERVAL;
316
317 /*
318 * If the beacon interval we obtained from the peer
319 * is too large, we'll have to wake up more often
320 * (and in IBSS case, we'll beacon too much)
321 *
322 * For example, if max_beacon_val is 4096, and the
323 * requested beacon interval is 7000, we'll have to
324 * use 3500 to be able to wake up on the beacons.
325 *
326 * This could badly influence beacon detection stats.
327 */
2c2f3b33
TW		 328
329 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
330 new_val = beacon_val / beacon_factor;
331
332 if (!new_val)
333 new_val = max_beacon_val;
334
335 return new_val;
336}
337
47313e34 338int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW		 339{
340 u64 tsf;
341 s32 interval_tm, rem;
2c2f3b33
TW		 342 struct ieee80211_conf *conf = NULL;
343 u16 beacon_int;
47313e34 344 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW		 345
346 conf = ieee80211_get_hw_conf(priv->hw);
347
948f5a2f
JB		 348 lockdep_assert_held(&priv->mutex);
349
246ed355 350 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 351
246ed355
JB		 352 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
353 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 354
47313e34 355 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 356
47313e34
JB		 357 /*
358 * TODO: For IBSS we need to get atim_window from mac80211,
359 * for now just always use 0
360 */
361 ctx->timing.atim_window = 0;
2c2f3b33 362
bde4530e 363 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB		 364 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
365 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
366 priv->contexts[IWL_RXON_CTX_BSS].vif &&
367 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB		 368 ctx->timing.beacon_interval =
369 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
370 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB		 371 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
372 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
373 priv->contexts[IWL_RXON_CTX_PAN].vif &&
374 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
375 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
376 !ctx->vif->bss_conf.beacon_int)) {
377 ctx->timing.beacon_interval =
378 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
379 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB		 380 } else {
381 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 382 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB		 383 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
384 }
2c2f3b33
TW		 385
386 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 387 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 388 rem = do_div(tsf, interval_tm);
246ed355 389 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 390
47313e34 391 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 392
2c2f3b33
TW		 393 IWL_DEBUG_ASSOC(priv,
394 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 395 le16_to_cpu(ctx->timing.beacon_interval),
396 le32_to_cpu(ctx->timing.beacon_init_val),
397 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 398
8f2d3d2a 399 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 400 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 401}
2c2f3b33 402
246ed355
JB		 403void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
404 int hw_decrypt)
8ccde88a 405{
246ed355 406 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 407
408 if (hw_decrypt)
409 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
410 else
411 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
412
413}
8ccde88a 414
dacefedb 415/* validate RXON structure is valid */
246ed355 416int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a 417{
246ed355 418 struct iwl_rxon_cmd *rxon = &ctx->staging;
dacefedb 419 bool error = false;
8ccde88a
SO		 420
421 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
dacefedb
JB		 422 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
423 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
424 error = true;
425 }
426 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
427 IWL_WARN(priv, "check 2.4G: wrong radar\n");
428 error = true;
429 }
8ccde88a 430 } else {
dacefedb
JB		 431 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
432 IWL_WARN(priv, "check 5.2G: not short slot!\n");
433 error = true;
434 }
435 if (rxon->flags & RXON_FLG_CCK_MSK) {
436 IWL_WARN(priv, "check 5.2G: CCK!\n");
437 error = true;
438 }
439 }
440 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
441 IWL_WARN(priv, "mac/bssid mcast!\n");
442 error = true;
8ccde88a 443 }
8ccde88a
SO		 444
445 /* make sure basic rates 6Mbps and 1Mbps are supported */
dacefedb
JB		 446 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
447 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
448 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
449 error = true;
450 }
8ccde88a 451
dacefedb
JB		 452 if (le16_to_cpu(rxon->assoc_id) > 2007) {
453 IWL_WARN(priv, "aid > 2007\n");
454 error = true;
455 }
8ccde88a 456
dacefedb
JB		 457 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
458 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
459 IWL_WARN(priv, "CCK and short slot\n");
460 error = true;
461 }
8ccde88a 462
dacefedb
JB		 463 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
464 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
465 IWL_WARN(priv, "CCK and auto detect");
466 error = true;
467 }
8ccde88a 468
dacefedb
JB		 469 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
470 RXON_FLG_TGG_PROTECT_MSK)) ==
471 RXON_FLG_TGG_PROTECT_MSK) {
472 IWL_WARN(priv, "TGg but no auto-detect\n");
473 error = true;
474 }
8ccde88a
SO		 475
476 if (error)
477 IWL_WARN(priv, "Tuning to channel %d\n",
478 le16_to_cpu(rxon->channel));
479
480 if (error) {
dacefedb
JB		 481 IWL_ERR(priv, "Invalid RXON\n");
482 return -EINVAL;
8ccde88a
SO		 483 }
484 return 0;
485}
8ccde88a
SO		 486
487/**
488 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
489 * @priv: staging_rxon is compared to active_rxon
490 *
491 * If the RXON structure is changing enough to require a new tune,
492 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
493 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
494 */
246ed355
JB		 495int iwl_full_rxon_required(struct iwl_priv *priv,
496 struct iwl_rxon_context *ctx)
8ccde88a 497{
246ed355
JB		 498 const struct iwl_rxon_cmd *staging = &ctx->staging;
499 const struct iwl_rxon_cmd *active = &ctx->active;
500
501#define CHK(cond) \
502 if ((cond)) { \
503 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
504 return 1; \
505 }
506
507#define CHK_NEQ(c1, c2) \
508 if ((c1) != (c2)) { \
509 IWL_DEBUG_INFO(priv, "need full RXON - " \
510 #c1 " != " #c2 " - %d != %d\n", \
511 (c1), (c2)); \
512 return 1; \
513 }
8ccde88a
SO		 514
515 /* These items are only settable from the full RXON command */
246ed355
JB		 516 CHK(!iwl_is_associated_ctx(ctx));
517 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
518 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
519 CHK(compare_ether_addr(staging->wlap_bssid_addr,
520 active->wlap_bssid_addr));
521 CHK_NEQ(staging->dev_type, active->dev_type);
522 CHK_NEQ(staging->channel, active->channel);
523 CHK_NEQ(staging->air_propagation, active->air_propagation);
524 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
525 active->ofdm_ht_single_stream_basic_rates);
526 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
527 active->ofdm_ht_dual_stream_basic_rates);
528 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
529 active->ofdm_ht_triple_stream_basic_rates);
530 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 531
532 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
533 * be updated with the RXON_ASSOC command -- however only some
534 * flag transitions are allowed using RXON_ASSOC */
535
536 /* Check if we are not switching bands */
246ed355
JB		 537 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
538 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 539
540 /* Check if we are switching association toggle */
246ed355
JB		 541 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
542 active->filter_flags & RXON_FILTER_ASSOC_MSK);
543
544#undef CHK
545#undef CHK_NEQ
8ccde88a
SO		 546
547 return 0;
548}
8ccde88a 549
76d04815
JB		 550u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
551 struct iwl_rxon_context *ctx)
8ccde88a 552{
4a02886b
JB		 553 /*
554 * Assign the lowest rate -- should really get this from
555 * the beacon skb from mac80211.
556 */
246ed355 557 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO		 558 return IWL_RATE_1M_PLCP;
559 else
560 return IWL_RATE_6M_PLCP;
561}
8ccde88a 562
246ed355
JB		 563static void _iwl_set_rxon_ht(struct iwl_priv *priv,
564 struct iwl_ht_config *ht_conf,
565 struct iwl_rxon_context *ctx)
47c5196e 566{
246ed355 567 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 568
7e6a5886 569 if (!ctx->ht.enabled) {
a2b0f02e 570 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 571 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 572 RXON_FLG_HT40_PROT_MSK |
42eb7c64 573 RXON_FLG_HT_PROT_MSK);
47c5196e 574 return;
42eb7c64 575 }
47c5196e 576
7e6a5886 577 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 578 * will be needed for rxon->flags
579 */
7e6a5886 580 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 581
582 /* Set up channel bandwidth:
7aafef1c 583 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 584 /* clear the HT channel mode before set the mode */
585 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
586 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 587 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 588 /* pure ht40 */
7e6a5886 589 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 590 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 591 /* Note: control channel is opposite of extension channel */
7e6a5886 592 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 593 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
594 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
595 break;
596 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
597 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
598 break;
599 }
600 } else {
a2b0f02e 601 /* Note: control channel is opposite of extension channel */
7e6a5886 602 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 603 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
604 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
605 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
606 break;
607 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
608 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
609 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
610 break;
611 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
612 default:
613 /* channel location only valid if in Mixed mode */
614 IWL_ERR(priv, "invalid extension channel offset\n");
615 break;
616 }
617 }
618 } else {
619 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 620 }
621
45823531 622 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 623 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 624
02bb1bea 625 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 626 "extension channel offset 0x%x\n",
7e6a5886
JB		 627 le32_to_cpu(rxon->flags), ctx->ht.protection,
628 ctx->ht.extension_chan_offset);
47c5196e 629}
246ed355
JB		 630
631void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
632{
633 struct iwl_rxon_context *ctx;
634
635 for_each_context(priv, ctx)
636 _iwl_set_rxon_ht(priv, ht_conf, ctx);
637}
47c5196e 638
246ed355 639/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 640u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 641 enum ieee80211_band band)
14023641
AK		 642{
643 const struct iwl_channel_info *ch_info;
644 int i;
645 u8 channel = 0;
246ed355
JB		 646 u8 min, max;
647 struct iwl_rxon_context *ctx;
14023641 648
14023641 649 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 650 min = 14;
651 max = priv->channel_count;
14023641 652 } else {
246ed355
JB		 653 min = 0;
654 max = 14;
655 }
656
657 for (i = min; i < max; i++) {
658 bool busy = false;
659
660 for_each_context(priv, ctx) {
661 busy = priv->channel_info[i].channel ==
662 le16_to_cpu(ctx->staging.channel);
663 if (busy)
664 break;
14023641 665 }
246ed355
JB		 666
667 if (busy)
668 continue;
669
670 channel = priv->channel_info[i].channel;
671 ch_info = iwl_get_channel_info(priv, band, channel);
672 if (is_channel_valid(ch_info))
673 break;
14023641
AK		 674 }
675
676 return channel;
677}
14023641 678
bf85ea4f 679/**
3edb5fd6
SZ		 680 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
681 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 682
bf85ea4f 683 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 684 * in the staging RXON flag structure based on the ch->band
bf85ea4f 685 */
246ed355
JB		 686int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
687 struct iwl_rxon_context *ctx)
bf85ea4f 688{
17e72782 689 enum ieee80211_band band = ch->band;
81e95430 690 u16 channel = ch->hw_value;
17e72782 691
246ed355 692 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK		 693 (priv->band == band))
694 return 0;
695
246ed355 696 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 697 if (band == IEEE80211_BAND_5GHZ)
246ed355 698 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 699 else
246ed355 700 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 701
702 priv->band = band;
703
e1623446 704 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 705
706 return 0;
707}
bf85ea4f 708
79d07325 709void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 710 struct iwl_rxon_context *ctx,
79d07325
WYG		 711 enum ieee80211_band band,
712 struct ieee80211_vif *vif)
8ccde88a
SO		 713{
714 if (band == IEEE80211_BAND_5GHZ) {
246ed355 715 ctx->staging.flags &=
8ccde88a
SO		 716 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
717 | RXON_FLG_CCK_MSK);
246ed355 718 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 719 } else {
720 /* Copied from iwl_post_associate() */
c213d745 721 if (vif && vif->bss_conf.use_short_slot)
246ed355 722 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 723 else
246ed355 724 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 725
246ed355
JB		 726 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
727 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
728 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 729 }
730}
8ccde88a
SO		 731
732/*
733 * initialize rxon structure with default values from eeprom
734 */
1dda6d28 735void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 736 struct iwl_rxon_context *ctx)
8ccde88a
SO		 737{
738 const struct iwl_channel_info *ch_info;
739
246ed355 740 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 741
d0fe478c
JB		 742 if (!ctx->vif) {
743 ctx->staging.dev_type = ctx->unused_devtype;
744 } else switch (ctx->vif->type) {
8ccde88a 745 case NL80211_IFTYPE_AP:
d0fe478c 746 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO		 747 break;
748
749 case NL80211_IFTYPE_STATION:
d0fe478c 750 ctx->staging.dev_type = ctx->station_devtype;
246ed355 751 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 752 break;
753
754 case NL80211_IFTYPE_ADHOC:
d0fe478c 755 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB		 756 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
757 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 758 RXON_FILTER_ACCEPT_GRP_MSK;
759 break;
760
8ccde88a 761 default:
d0fe478c
JB		 762 IWL_ERR(priv, "Unsupported interface type %d\n",
763 ctx->vif->type);
8ccde88a
SO		 764 break;
765 }
766
767#if 0
768 /* TODO: Figure out when short_preamble would be set and cache from
769 * that */
770 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 771 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 772 else
246ed355 773 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 774#endif
775
776 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 777 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 778
779 if (!ch_info)
780 ch_info = &priv->channel_info[0];
781
246ed355 782 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 783 priv->band = ch_info->band;
784
d0fe478c 785 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 786
246ed355 787 ctx->staging.ofdm_basic_rates =
8ccde88a 788 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 789 ctx->staging.cck_basic_rates =
8ccde88a
SO		 790 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
791
a2b0f02e 792 /* clear both MIX and PURE40 mode flag */
246ed355 793 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 794 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB		 795 if (ctx->vif)
796 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 797
246ed355
JB		 798 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
799 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
800 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a 801}
8ccde88a 802
79d07325 803void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 804{
805 const struct ieee80211_supported_band *hw = NULL;
806 struct ieee80211_rate *rate;
246ed355 807 struct iwl_rxon_context *ctx;
8ccde88a
SO		 808 int i;
809
810 hw = iwl_get_hw_mode(priv, priv->band);
811 if (!hw) {
812 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
813 return;
814 }
815
816 priv->active_rate = 0;
8ccde88a
SO		 817
818 for (i = 0; i < hw->n_bitrates; i++) {
819 rate = &(hw->bitrates[i]);
5027309b 820 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 821 priv->active_rate |= (1 << rate->hw_value);
822 }
823
4a02886b 824 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 825
246ed355
JB		 826 for_each_context(priv, ctx) {
827 ctx->staging.cck_basic_rates =
828 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 829
246ed355
JB		 830 ctx->staging.ofdm_basic_rates =
831 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
832 }
8ccde88a 833}
79d07325
WYG		 834
835void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
836{
8bd413e6
JB		 837 /*
838 * MULTI-FIXME
839 * See iwl_mac_channel_switch.
840 */
841 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
842
79d07325
WYG		 843 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
844 return;
845
846 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 847 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG		 848 mutex_lock(&priv->mutex);
849 priv->switch_rxon.switch_in_progress = false;
850 mutex_unlock(&priv->mutex);
851 }
852}
8ccde88a 853
8ccde88a 854#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB		 855void iwl_print_rx_config_cmd(struct iwl_priv *priv,
856 struct iwl_rxon_context *ctx)
8ccde88a 857{
246ed355 858 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 859
e1623446 860 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 861 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 862 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
863 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
864 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 865 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 866 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
867 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 868 rxon->ofdm_basic_rates);
e1623446
TW		 869 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
870 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
871 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
872 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 873}
6686d17e 874#endif
e649437f 875
e74fe233
JB		 876static void iwlagn_abort_notification_waits(struct iwl_priv *priv)
877{
878 unsigned long flags;
879 struct iwl_notification_wait *wait_entry;
880
881 spin_lock_irqsave(&priv->_agn.notif_wait_lock, flags);
882 list_for_each_entry(wait_entry, &priv->_agn.notif_waits, list)
883 wait_entry->aborted = true;
884 spin_unlock_irqrestore(&priv->_agn.notif_wait_lock, flags);
885
886 wake_up_all(&priv->_agn.notif_waitq);
887}
888
e649437f 889void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
8ccde88a 890{
491bc292
WYG		 891 unsigned int reload_msec;
892 unsigned long reload_jiffies;
893
8ccde88a
SO		 894 /* Set the FW error flag -- cleared on iwl_down */
895 set_bit(STATUS_FW_ERROR, &priv->status);
896
897 /* Cancel currently queued command. */
898 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
899
e74fe233
JB		 900 iwlagn_abort_notification_waits(priv);
901
e649437f
JB		 902 /* Keep the restart process from trying to send host
903 * commands by clearing the ready bit */
904 clear_bit(STATUS_READY, &priv->status);
905
906 wake_up_interruptible(&priv->wait_command_queue);
907
908 if (!ondemand) {
909 /*
910 * If firmware keep reloading, then it indicate something
911 * serious wrong and firmware having problem to recover
912 * from it. Instead of keep trying which will fill the syslog
913 * and hang the system, let's just stop it
914 */
915 reload_jiffies = jiffies;
916 reload_msec = jiffies_to_msecs((long) reload_jiffies -
917 (long) priv->reload_jiffies);
918 priv->reload_jiffies = reload_jiffies;
919 if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
920 priv->reload_count++;
921 if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
922 IWL_ERR(priv, "BUG_ON, Stop restarting\n");
923 return;
924 }
925 } else
926 priv->reload_count = 0;
927 }
928
929 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
9d143e9a 930 if (iwlagn_mod_params.restart_fw) {
e649437f
JB		 931 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
932 "Restarting adapter due to uCode error.\n");
933 queue_work(priv->workqueue, &priv->restart);
934 } else
935 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
936 "Detected FW error, but not restarting\n");
937 }
938}
939
940/**
941 * iwl_irq_handle_error - called for HW or SW error interrupt from card
942 */
943void iwl_irq_handle_error(struct iwl_priv *priv)
944{
50619ac9
WYG		 945 /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
946 if (priv->cfg->internal_wimax_coex &&
947 (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
948 APMS_CLK_VAL_MRB_FUNC_MODE) ||
949 (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
950 APMG_PS_CTRL_VAL_RESET_REQ))) {
50619ac9 951 /*
e649437f
JB		 952 * Keep the restart process from trying to send host
953 * commands by clearing the ready bit.
50619ac9
WYG		 954 */
955 clear_bit(STATUS_READY, &priv->status);
e649437f
JB		 956 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
957 wake_up_interruptible(&priv->wait_command_queue);
50619ac9
WYG		 958 IWL_ERR(priv, "RF is used by WiMAX\n");
959 return;
960 }
961
459bc732
SZ		 962 IWL_ERR(priv, "Loaded firmware version: %s\n",
963 priv->hw->wiphy->fw_version);
964
3ecccbcd
WYG		 965 iwl_dump_nic_error_log(priv);
966 iwl_dump_csr(priv);
967 iwl_dump_fh(priv, NULL, false);
968 iwl_dump_nic_event_log(priv, false, NULL, false);
8ccde88a 969#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 970 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB		 971 iwl_print_rx_config_cmd(priv,
972 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO		 973#endif
974
e649437f 975 iwlagn_fw_error(priv, false);
8ccde88a 976}
8ccde88a 977
f8e200de 978static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 979{
5220af0c 980 int ret = 0;
d68b603c 981
5220af0c 982 /* stop device's busmaster DMA activity */
d68b603c
AK		 983 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
984
5220af0c 985 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 986 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 987 if (ret)
988 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 989
d68b603c
AK		 990 IWL_DEBUG_INFO(priv, "stop master\n");
991
5220af0c 992 return ret;
d68b603c 993}
d68b603c
AK		 994
995void iwl_apm_stop(struct iwl_priv *priv)
996{
fadb3582
BC		 997 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
998
9d39e5ba
JB		 999 clear_bit(STATUS_DEVICE_ENABLED, &priv->status);
1000
5220af0c 1001 /* Stop device's DMA activity */
d68b603c
AK		 1002 iwl_apm_stop_master(priv);
1003
5220af0c 1004 /* Reset the entire device */
d68b603c
AK		 1005 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1006
1007 udelay(10);
5220af0c
BC		 1008
1009 /*
1010 * Clear "initialization complete" bit to move adapter from
1011 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1012 */
d68b603c 1013 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c 1014}
d68b603c 1015
fadb3582
BC		 1016
1017/*
1018 * Start up NIC's basic functionality after it has been reset
1019 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1020 * NOTE: This does not load uCode nor start the embedded processor
1021 */
1022int iwl_apm_init(struct iwl_priv *priv)
1023{
1024 int ret = 0;
1025 u16 lctl;
1026
1027 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1028
1029 /*
1030 * Use "set_bit" below rather than "write", to preserve any hardware
1031 * bits already set by default after reset.
1032 */
1033
1034 /* Disable L0S exit timer (platform NMI Work/Around) */
1035 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1036 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1037
1038 /*
1039 * Disable L0s without affecting L1;
1040 * don't wait for ICH L0s (ICH bug W/A)
1041 */
1042 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1043 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1044
1045 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1046 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1047
1048 /*
1049 * Enable HAP INTA (interrupt from management bus) to
1050 * wake device's PCI Express link L1a -> L0s
fadb3582
BC		 1051 */
1052 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1053 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1054
1055 /*
a6c5c731
BC		 1056 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1057 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1058 * If so (likely), disable L0S, so device moves directly L0->L1;
1059 * costs negligible amount of power savings.
1060 * If not (unlikely), enable L0S, so there is at least some
1061 * power savings, even without L1.
fadb3582 1062 */
15ade3ca
WYG		 1063 lctl = iwl_pcie_link_ctl(priv);
1064 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1065 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1066 /* L1-ASPM enabled; disable(!) L0S */
1067 iwl_set_bit(priv, CSR_GIO_REG,
1068 CSR_GIO_REG_VAL_L0S_ENABLED);
1069 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1070 } else {
1071 /* L1-ASPM disabled; enable(!) L0S */
1072 iwl_clear_bit(priv, CSR_GIO_REG,
1073 CSR_GIO_REG_VAL_L0S_ENABLED);
1074 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
fadb3582
BC		 1075 }
1076
1077 /* Configure analog phase-lock-loop before activating to D0A */
7cb1b088
WYG		 1078 if (priv->cfg->base_params->pll_cfg_val)
1079 iwl_set_bit(priv, CSR_ANA_PLL_CFG,
1080 priv->cfg->base_params->pll_cfg_val);
fadb3582
BC		 1081
1082 /*
1083 * Set "initialization complete" bit to move adapter from
1084 * D0U* --> D0A* (powered-up active) state.
1085 */
1086 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1087
1088 /*
1089 * Wait for clock stabilization; once stabilized, access to
1090 * device-internal resources is supported, e.g. iwl_write_prph()
1091 * and accesses to uCode SRAM.
1092 */
1093 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1094 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1095 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1096 if (ret < 0) {
1097 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1098 goto out;
1099 }
1100
1101 /*
917b6777 1102 * Enable DMA clock and wait for it to stabilize.
fadb3582
BC		 1103 *
1104 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1105 * do not disable clocks. This preserves any hardware bits already
1106 * set by default in "CLK_CTRL_REG" after reset.
1107 */
917b6777 1108 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
fadb3582
BC		 1109 udelay(20);
1110
1111 /* Disable L1-Active */
1112 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1113 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1114
9d39e5ba
JB		 1115 set_bit(STATUS_DEVICE_ENABLED, &priv->status);
1116
fadb3582
BC		 1117out:
1118 return ret;
1119}
fadb3582
BC		 1120
1121
630fe9b6
TW		 1122int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1123{
a25a66ac
SG		 1124 int ret;
1125 s8 prev_tx_power;
f844a709
SG		 1126 bool defer;
1127 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
a25a66ac
SG		 1128
1129 lockdep_assert_held(&priv->mutex);
1130
1131 if (priv->tx_power_user_lmt == tx_power && !force)
1132 return 0;
1133
1134 if (!priv->cfg->ops->lib->send_tx_power)
1135 return -EOPNOTSUPP;
5eadd94b 1136
b744cb79
WYG		 1137 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1138 IWL_WARN(priv,
1139 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1140 tx_power,
b744cb79 1141 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1142 return -EINVAL;
1143 }
1144
dc1b0973 1145 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1146 IWL_WARN(priv,
1147 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1148 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1149 return -EINVAL;
1150 }
1151
a25a66ac
SG		 1152 if (!iwl_is_ready_rf(priv))
1153 return -EIO;
630fe9b6 1154
f844a709
SG		 1155 /* scan complete and commit_rxon use tx_power_next value,
1156 * it always need to be updated for newest request */
a25a66ac 1157 priv->tx_power_next = tx_power;
f844a709
SG		 1158
1159 /* do not set tx power when scanning or channel changing */
1160 defer = test_bit(STATUS_SCANNING, &priv->status) ||
1161 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
1162 if (defer && !force) {
1163 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
a25a66ac 1164 return 0;
5eadd94b 1165 }
630fe9b6 1166
a25a66ac
SG		 1167 prev_tx_power = priv->tx_power_user_lmt;
1168 priv->tx_power_user_lmt = tx_power;
1169
1170 ret = priv->cfg->ops->lib->send_tx_power(priv);
1171
1172 /* if fail to set tx_power, restore the orig. tx power */
1173 if (ret) {
1174 priv->tx_power_user_lmt = prev_tx_power;
1175 priv->tx_power_next = prev_tx_power;
1176 }
630fe9b6
TW		 1177 return ret;
1178}
630fe9b6 1179
65b52bde 1180void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1181{
1182 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1183 .lead_time = BT_LEAD_TIME_DEF,
1184 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1185 .kill_ack_mask = 0,
1186 .kill_cts_mask = 0,
1187 };
1188
06702a73
WYG		 1189 if (!bt_coex_active)
1190 bt_cmd.flags = BT_COEX_DISABLE;
1191 else
1192 bt_cmd.flags = BT_COEX_ENABLE;
1193
f21dd005 1194 priv->bt_enable_flag = bt_cmd.flags;
06702a73
WYG		 1195 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1196 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1197
65b52bde
JB		 1198 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1199 sizeof(struct iwl_bt_cmd), &bt_cmd))
1200 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd 1201}
17f841cd 1202
ef8d5529 1203int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1204{
ef8d5529
WYG		 1205 struct iwl_statistics_cmd statistics_cmd = {
1206 .configuration_flags =
1207 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1208 };
ef8d5529
WYG		 1209
1210 if (flags & CMD_ASYNC)
1211 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1212 sizeof(struct iwl_statistics_cmd),
1213 &statistics_cmd, NULL);
1214 else
1215 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1216 sizeof(struct iwl_statistics_cmd),
1217 &statistics_cmd);
49ea8596 1218}
7e8c519e 1219
a83b9141
WYG		 1220void iwl_clear_isr_stats(struct iwl_priv *priv)
1221{
1222 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1223}
a83b9141 1224
488829f1
AK		 1225int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1226 const struct ieee80211_tx_queue_params *params)
1227{
1228 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1229 struct iwl_rxon_context *ctx;
488829f1
AK		 1230 unsigned long flags;
1231 int q;
1232
1233 IWL_DEBUG_MAC80211(priv, "enter\n");
1234
1235 if (!iwl_is_ready_rf(priv)) {
1236 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1237 return -EIO;
1238 }
1239
1240 if (queue >= AC_NUM) {
1241 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1242 return 0;
1243 }
1244
1245 q = AC_NUM - 1 - queue;
1246
1247 spin_lock_irqsave(&priv->lock, flags);
1248
8dfdb9d5
JB		 1249 /*
1250 * MULTI-FIXME
1251 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1252 */
1253 for_each_context(priv, ctx) {
1254 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1255 cpu_to_le16(params->cw_min);
1256 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1257 cpu_to_le16(params->cw_max);
1258 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1259 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1260 cpu_to_le16((params->txop * 32));
1261
1262 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1263 }
488829f1
AK		 1264
1265 spin_unlock_irqrestore(&priv->lock, flags);
1266
1267 IWL_DEBUG_MAC80211(priv, "leave\n");
1268 return 0;
1269}
5bbe233b 1270
a85d7cca
JB		 1271int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1272{
1273 struct iwl_priv *priv = hw->priv;
1274
1275 return priv->ibss_manager == IWL_IBSS_MANAGER;
1276}
a85d7cca 1277
d4daaea6 1278static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
727882d6 1279{
d0fe478c 1280 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK		 1281
1282 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1283 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1284
246ed355 1285 return iwlcore_commit_rxon(priv, ctx);
727882d6 1286}
727882d6 1287
d4daaea6
JB		 1288static int iwl_setup_interface(struct iwl_priv *priv,
1289 struct iwl_rxon_context *ctx)
1290{
1291 struct ieee80211_vif *vif = ctx->vif;
1292 int err;
1293
1294 lockdep_assert_held(&priv->mutex);
1295
1296 /*
1297 * This variable will be correct only when there's just
1298 * a single context, but all code using it is for hardware
1299 * that supports only one context.
1300 */
1301 priv->iw_mode = vif->type;
1302
1303 ctx->is_active = true;
1304
1305 err = iwl_set_mode(priv, ctx);
1306 if (err) {
1307 if (!ctx->always_active)
1308 ctx->is_active = false;
1309 return err;
1310 }
1311
1312 if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
1313 vif->type == NL80211_IFTYPE_ADHOC) {
1314 /*
1315 * pretend to have high BT traffic as long as we
1316 * are operating in IBSS mode, as this will cause
1317 * the rate scaling etc. to behave as intended.
1318 */
1319 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1320 }
1321
1322 return 0;
1323}
1324
b55e75ed 1325int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1326{
1327 struct iwl_priv *priv = hw->priv;
246ed355 1328 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1329 struct iwl_rxon_context *tmp, *ctx = NULL;
d4daaea6 1330 int err;
f35c0c56 1331 enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
cbb6ab94 1332
3779db10 1333 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
f35c0c56 1334 viftype, vif->addr);
cbb6ab94 1335
47e28f41
JB		 1336 mutex_lock(&priv->mutex);
1337
4bd530f3
SG		 1338 if (!iwl_is_ready_rf(priv)) {
1339 IWL_WARN(priv, "Try to add interface when device not ready\n");
b55e75ed
JB		 1340 err = -EINVAL;
1341 goto out;
1342 }
1343
d0fe478c
JB		 1344 for_each_context(priv, tmp) {
1345 u32 possible_modes =
1346 tmp->interface_modes | tmp->exclusive_interface_modes;
1347
1348 if (tmp->vif) {
1349 /* check if this busy context is exclusive */
1350 if (tmp->exclusive_interface_modes &
1351 BIT(tmp->vif->type)) {
1352 err = -EINVAL;
1353 goto out;
1354 }
1355 continue;
1356 }
1357
f35c0c56 1358 if (!(possible_modes & BIT(viftype)))
d0fe478c
JB		 1359 continue;
1360
1361 /* have maybe usable context w/o interface */
1362 ctx = tmp;
1363 break;
1364 }
1365
1366 if (!ctx) {
47e28f41
JB		 1367 err = -EOPNOTSUPP;
1368 goto out;
cbb6ab94
AK		 1369 }
1370
d0fe478c 1371 vif_priv->ctx = ctx;
8bd413e6 1372 ctx->vif = vif;
59079949 1373
d4daaea6
JB		 1374 err = iwl_setup_interface(priv, ctx);
1375 if (!err)
1376 goto out;
cbb6ab94 1377
8bd413e6 1378 ctx->vif = NULL;
b55e75ed 1379 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1380 out:
cbb6ab94
AK		 1381 mutex_unlock(&priv->mutex);
1382
1383 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1384 return err;
cbb6ab94 1385}
cbb6ab94 1386
d4daaea6
JB		 1387static void iwl_teardown_interface(struct iwl_priv *priv,
1388 struct ieee80211_vif *vif,
1389 bool mode_change)
d8052319 1390{
246ed355 1391 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
d8052319 1392
d4daaea6 1393 lockdep_assert_held(&priv->mutex);
d0fe478c 1394
e7e16b90
SG		 1395 if (priv->scan_vif == vif) {
1396 iwl_scan_cancel_timeout(priv, 200);
1397 iwl_force_scan_end(priv);
1398 }
8bd413e6 1399
d4daaea6
JB		 1400 if (!mode_change) {
1401 iwl_set_mode(priv, ctx);
1402 if (!ctx->always_active)
1403 ctx->is_active = false;
1404 }
763cc3bf 1405
59079949
JB		 1406 /*
1407 * When removing the IBSS interface, overwrite the
1408 * BT traffic load with the stored one from the last
1409 * notification, if any. If this is a device that
1410 * doesn't implement this, this has no effect since
1411 * both values are the same and zero.
1412 */
1413 if (vif->type == NL80211_IFTYPE_ADHOC)
66e863a5 1414 priv->bt_traffic_load = priv->last_bt_traffic_load;
d4daaea6
JB		 1415}
1416
1417void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1418 struct ieee80211_vif *vif)
1419{
1420 struct iwl_priv *priv = hw->priv;
1421 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1422
1423 IWL_DEBUG_MAC80211(priv, "enter\n");
1424
1425 mutex_lock(&priv->mutex);
1426
1427 WARN_ON(ctx->vif != vif);
1428 ctx->vif = NULL;
1429
1430 iwl_teardown_interface(priv, vif, false);
59079949 1431
d8052319
AK		 1432 mutex_unlock(&priv->mutex);
1433
1434 IWL_DEBUG_MAC80211(priv, "leave\n");
1435
1436}
d8052319 1437
88804e2b
WYG		 1438int iwl_alloc_txq_mem(struct iwl_priv *priv)
1439{
1440 if (!priv->txq)
1441 priv->txq = kzalloc(
7cb1b088
WYG		 1442 sizeof(struct iwl_tx_queue) *
1443 priv->cfg->base_params->num_of_queues,
88804e2b
WYG		 1444 GFP_KERNEL);
1445 if (!priv->txq) {
91dd6c27 1446 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 1447 return -ENOMEM;
1448 }
1449 return 0;
1450}
88804e2b
WYG		 1451
1452void iwl_free_txq_mem(struct iwl_priv *priv)
1453{
1454 kfree(priv->txq);
1455 priv->txq = NULL;
1456}
88804e2b 1457
20594eb0
WYG		 1458#ifdef CONFIG_IWLWIFI_DEBUGFS
1459
1460#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
1461
1462void iwl_reset_traffic_log(struct iwl_priv *priv)
1463{
1464 priv->tx_traffic_idx = 0;
1465 priv->rx_traffic_idx = 0;
1466 if (priv->tx_traffic)
1467 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1468 if (priv->rx_traffic)
1469 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1470}
1471
1472int iwl_alloc_traffic_mem(struct iwl_priv *priv)
1473{
1474 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1475
1476 if (iwl_debug_level & IWL_DL_TX) {
1477 if (!priv->tx_traffic) {
1478 priv->tx_traffic =
1479 kzalloc(traffic_size, GFP_KERNEL);
1480 if (!priv->tx_traffic)
1481 return -ENOMEM;
1482 }
1483 }
1484 if (iwl_debug_level & IWL_DL_RX) {
1485 if (!priv->rx_traffic) {
1486 priv->rx_traffic =
1487 kzalloc(traffic_size, GFP_KERNEL);
1488 if (!priv->rx_traffic)
1489 return -ENOMEM;
1490 }
1491 }
1492 iwl_reset_traffic_log(priv);
1493 return 0;
1494}
20594eb0
WYG		 1495
1496void iwl_free_traffic_mem(struct iwl_priv *priv)
1497{
1498 kfree(priv->tx_traffic);
1499 priv->tx_traffic = NULL;
1500
1501 kfree(priv->rx_traffic);
1502 priv->rx_traffic = NULL;
1503}
20594eb0
WYG		 1504
1505void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1506 u16 length, struct ieee80211_hdr *header)
1507{
1508 __le16 fc;
1509 u16 len;
1510
1511 if (likely(!(iwl_debug_level & IWL_DL_TX)))
1512 return;
1513
1514 if (!priv->tx_traffic)
1515 return;
1516
1517 fc = header->frame_control;
1518 if (ieee80211_is_data(fc)) {
1519 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1520 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1521 memcpy((priv->tx_traffic +
1522 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1523 header, len);
1524 priv->tx_traffic_idx =
1525 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1526 }
1527}
20594eb0
WYG		 1528
1529void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1530 u16 length, struct ieee80211_hdr *header)
1531{
1532 __le16 fc;
1533 u16 len;
1534
1535 if (likely(!(iwl_debug_level & IWL_DL_RX)))
1536 return;
1537
1538 if (!priv->rx_traffic)
1539 return;
1540
1541 fc = header->frame_control;
1542 if (ieee80211_is_data(fc)) {
1543 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1544 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1545 memcpy((priv->rx_traffic +
1546 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1547 header, len);
1548 priv->rx_traffic_idx =
1549 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1550 }
1551}
22fdf3c9
WYG		 1552
1553const char *get_mgmt_string(int cmd)
1554{
1555 switch (cmd) {
1556 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1557 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1558 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1559 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1560 IWL_CMD(MANAGEMENT_PROBE_REQ);
1561 IWL_CMD(MANAGEMENT_PROBE_RESP);
1562 IWL_CMD(MANAGEMENT_BEACON);
1563 IWL_CMD(MANAGEMENT_ATIM);
1564 IWL_CMD(MANAGEMENT_DISASSOC);
1565 IWL_CMD(MANAGEMENT_AUTH);
1566 IWL_CMD(MANAGEMENT_DEAUTH);
1567 IWL_CMD(MANAGEMENT_ACTION);
1568 default:
1569 return "UNKNOWN";
1570
1571 }
1572}
1573
1574const char *get_ctrl_string(int cmd)
1575{
1576 switch (cmd) {
1577 IWL_CMD(CONTROL_BACK_REQ);
1578 IWL_CMD(CONTROL_BACK);
1579 IWL_CMD(CONTROL_PSPOLL);
1580 IWL_CMD(CONTROL_RTS);
1581 IWL_CMD(CONTROL_CTS);
1582 IWL_CMD(CONTROL_ACK);
1583 IWL_CMD(CONTROL_CFEND);
1584 IWL_CMD(CONTROL_CFENDACK);
1585 default:
1586 return "UNKNOWN";
1587
1588 }
1589}
1590
7163b8a4 1591void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 1592{
1593 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9
WYG		 1594 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
1595}
1596
1597/*
1598 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1599 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1600 * Use debugFs to display the rx/rx_statistics
1601 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1602 * information will be recorded, but DATA pkt still will be recorded
1603 * for the reason of iwl_led.c need to control the led blinking based on
1604 * number of tx and rx data.
1605 *
1606 */
1607void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1608{
1609 struct traffic_stats *stats;
1610
1611 if (is_tx)
1612 stats = &priv->tx_stats;
1613 else
1614 stats = &priv->rx_stats;
1615
1616 if (ieee80211_is_mgmt(fc)) {
1617 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1618 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1619 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1620 break;
1621 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1622 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1623 break;
1624 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1625 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1626 break;
1627 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1628 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1629 break;
1630 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1631 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1632 break;
1633 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1634 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1635 break;
1636 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1637 stats->mgmt[MANAGEMENT_BEACON]++;
1638 break;
1639 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1640 stats->mgmt[MANAGEMENT_ATIM]++;
1641 break;
1642 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1643 stats->mgmt[MANAGEMENT_DISASSOC]++;
1644 break;
1645 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1646 stats->mgmt[MANAGEMENT_AUTH]++;
1647 break;
1648 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1649 stats->mgmt[MANAGEMENT_DEAUTH]++;
1650 break;
1651 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1652 stats->mgmt[MANAGEMENT_ACTION]++;
1653 break;
1654 }
1655 } else if (ieee80211_is_ctl(fc)) {
1656 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1657 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1658 stats->ctrl[CONTROL_BACK_REQ]++;
1659 break;
1660 case cpu_to_le16(IEEE80211_STYPE_BACK):
1661 stats->ctrl[CONTROL_BACK]++;
1662 break;
1663 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1664 stats->ctrl[CONTROL_PSPOLL]++;
1665 break;
1666 case cpu_to_le16(IEEE80211_STYPE_RTS):
1667 stats->ctrl[CONTROL_RTS]++;
1668 break;
1669 case cpu_to_le16(IEEE80211_STYPE_CTS):
1670 stats->ctrl[CONTROL_CTS]++;
1671 break;
1672 case cpu_to_le16(IEEE80211_STYPE_ACK):
1673 stats->ctrl[CONTROL_ACK]++;
1674 break;
1675 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1676 stats->ctrl[CONTROL_CFEND]++;
1677 break;
1678 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1679 stats->ctrl[CONTROL_CFENDACK]++;
1680 break;
1681 }
1682 } else {
1683 /* data */
1684 stats->data_cnt++;
1685 stats->data_bytes += len;
1686 }
1687}
20594eb0
WYG		 1688#endif
1689
a93e7973 1690static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 1691{
1692 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1693 return;
1694
246ed355 1695 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 1696 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1697 return;
1698 }
1699 /*
1700 * There is no easy and better way to force reset the radio,
1701 * the only known method is switching channel which will force to
1702 * reset and tune the radio.
1703 * Use internal short scan (single channel) operation to should
1704 * achieve this objective.
1705 * Driver should reset the radio when number of consecutive missed
1706 * beacon, or any other uCode error condition detected.
1707 */
1708 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1709 iwl_internal_short_hw_scan(priv);
afbdd69a 1710}
a93e7973 1711
a93e7973 1712
c04f9f22 1713int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 1714{
8a472da4
WYG		 1715 struct iwl_force_reset *force_reset;
1716
a93e7973
WYG		 1717 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1718 return -EINVAL;
1719
8a472da4
WYG		 1720 if (mode >= IWL_MAX_FORCE_RESET) {
1721 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1722 return -EINVAL;
1723 }
1724 force_reset = &priv->force_reset[mode];
1725 force_reset->reset_request_count++;
c04f9f22
WYG		 1726 if (!external) {
1727 if (force_reset->last_force_reset_jiffies &&
1728 time_after(force_reset->last_force_reset_jiffies +
1729 force_reset->reset_duration, jiffies)) {
1730 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1731 force_reset->reset_reject_count++;
1732 return -EAGAIN;
1733 }
a93e7973 1734 }
8a472da4
WYG		 1735 force_reset->reset_success_count++;
1736 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 1737 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 1738 switch (mode) {
1739 case IWL_RF_RESET:
1740 iwl_force_rf_reset(priv);
1741 break;
1742 case IWL_FW_RESET:
c04f9f22
WYG		 1743 /*
1744 * if the request is from external(ex: debugfs),
1745 * then always perform the request in regardless the module
1746 * parameter setting
1747 * if the request is from internal (uCode error or driver
1748 * detect failure), then fw_restart module parameter
1749 * need to be check before performing firmware reload
1750 */
9d143e9a 1751 if (!external && !iwlagn_mod_params.restart_fw) {
c04f9f22
WYG		 1752 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1753 "module parameter setting\n");
1754 break;
1755 }
a93e7973 1756 IWL_ERR(priv, "On demand firmware reload\n");
e649437f 1757 iwlagn_fw_error(priv, true);
a93e7973 1758 break;
a93e7973 1759 }
a93e7973
WYG		 1760 return 0;
1761}
b74e31a9 1762
d4daaea6
JB		 1763int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1764 enum nl80211_iftype newtype, bool newp2p)
1765{
1766 struct iwl_priv *priv = hw->priv;
1767 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1768 struct iwl_rxon_context *tmp;
1769 u32 interface_modes;
1770 int err;
1771
1772 newtype = ieee80211_iftype_p2p(newtype, newp2p);
1773
1774 mutex_lock(&priv->mutex);
1775
a2b76b3b
JB		 1776 if (!ctx->vif || !iwl_is_ready_rf(priv)) {
1777 /*
1778 * Huh? But wait ... this can maybe happen when
1779 * we're in the middle of a firmware restart!
1780 */
1781 err = -EBUSY;
1782 goto out;
1783 }
1784
d4daaea6
JB		 1785 interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
1786
1787 if (!(interface_modes & BIT(newtype))) {
1788 err = -EBUSY;
1789 goto out;
1790 }
1791
1792 if (ctx->exclusive_interface_modes & BIT(newtype)) {
1793 for_each_context(priv, tmp) {
1794 if (ctx == tmp)
1795 continue;
1796
1797 if (!tmp->vif)
1798 continue;
1799
1800 /*
1801 * The current mode switch would be exclusive, but
1802 * another context is active ... refuse the switch.
1803 */
1804 err = -EBUSY;
1805 goto out;
1806 }
1807 }
1808
1809 /* success */
1810 iwl_teardown_interface(priv, vif, true);
1811 vif->type = newtype;
a2b76b3b 1812 vif->p2p = newp2p;
d4daaea6
JB		 1813 err = iwl_setup_interface(priv, ctx);
1814 WARN_ON(err);
1815 /*
1816 * We've switched internally, but submitting to the
1817 * device may have failed for some reason. Mask this
1818 * error, because otherwise mac80211 will not switch
1819 * (and set the interface type back) and we'll be
1820 * out of sync with it.
1821 */
1822 err = 0;
1823
1824 out:
1825 mutex_unlock(&priv->mutex);
1826 return err;
1827}
d4daaea6 1828
b74e31a9 1829/*
22de94de
SG		 1830 * On every watchdog tick we check (latest) time stamp. If it does not
1831 * change during timeout period and queue is not empty we reset firmware.
b74e31a9 1832 */
b74e31a9
WYG		 1833static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
1834{
22de94de
SG		 1835 struct iwl_tx_queue *txq = &priv->txq[cnt];
1836 struct iwl_queue *q = &txq->q;
1837 unsigned long timeout;
1838 int ret;
b74e31a9 1839
22de94de
SG		 1840 if (q->read_ptr == q->write_ptr) {
1841 txq->time_stamp = jiffies;
7cb1b088 1842 return 0;
22de94de 1843 }
7cb1b088 1844
22de94de
SG		 1845 timeout = txq->time_stamp +
1846 msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
1847
1848 if (time_after(jiffies, timeout)) {
1849 IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
1850 q->id, priv->cfg->base_params->wd_timeout);
1851 ret = iwl_force_reset(priv, IWL_FW_RESET, false);
1852 return (ret == -EAGAIN) ? 0 : 1;
b74e31a9 1853 }
22de94de 1854
b74e31a9
WYG		 1855 return 0;
1856}
1857
22de94de
SG		 1858/*
1859 * Making watchdog tick be a quarter of timeout assure we will
1860 * discover the queue hung between timeout and 1.25*timeout
1861 */
1862#define IWL_WD_TICK(timeout) ((timeout) / 4)
1863
1864/*
1865 * Watchdog timer callback, we check each tx queue for stuck, if if hung
1866 * we reset the firmware. If everything is fine just rearm the timer.
1867 */
1868void iwl_bg_watchdog(unsigned long data)
b74e31a9
WYG		 1869{
1870 struct iwl_priv *priv = (struct iwl_priv *)data;
1871 int cnt;
22de94de 1872 unsigned long timeout;
b74e31a9
WYG		 1873
1874 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1875 return;
1876
22de94de
SG		 1877 timeout = priv->cfg->base_params->wd_timeout;
1878 if (timeout == 0)
1879 return;
1880
b74e31a9 1881 /* monitor and check for stuck cmd queue */
13bb9483 1882 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG		 1883 return;
1884
1885 /* monitor and check for other stuck queues */
246ed355 1886 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG		 1887 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
1888 /* skip as we already checked the command queue */
13bb9483 1889 if (cnt == priv->cmd_queue)
b74e31a9
WYG		 1890 continue;
1891 if (iwl_check_stuck_queue(priv, cnt))
1892 return;
1893 }
1894 }
22de94de
SG		 1895
1896 mod_timer(&priv->watchdog, jiffies +
1897 msecs_to_jiffies(IWL_WD_TICK(timeout)));
b74e31a9 1898}
22de94de
SG		 1899
1900void iwl_setup_watchdog(struct iwl_priv *priv)
1901{
1902 unsigned int timeout = priv->cfg->base_params->wd_timeout;
afbdd69a 1903
22de94de
SG		 1904 if (timeout)
1905 mod_timer(&priv->watchdog,
1906 jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
1907 else
1908 del_timer(&priv->watchdog);
1909}
a0ee74cf
WYG		 1910
1911/*
1912 * extended beacon time format
1913 * time in usec will be changed into a 32-bit value in extended:internal format
1914 * the extended part is the beacon counts
1915 * the internal part is the time in usec within one beacon interval
1916 */
1917u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1918{
1919 u32 quot;
1920 u32 rem;
1921 u32 interval = beacon_interval * TIME_UNIT;
1922
1923 if (!interval || !usec)
1924 return 0;
1925
1926 quot = (usec / interval) &
1927 (iwl_beacon_time_mask_high(priv,
1928 priv->hw_params.beacon_time_tsf_bits) >>
1929 priv->hw_params.beacon_time_tsf_bits);
1930 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
1931 priv->hw_params.beacon_time_tsf_bits);
1932
1933 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
1934}
a0ee74cf
WYG		 1935
1936/* base is usually what we get from ucode with each received frame,
1937 * the same as HW timer counter counting down
1938 */
1939__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1940 u32 addon, u32 beacon_interval)
1941{
1942 u32 base_low = base & iwl_beacon_time_mask_low(priv,
1943 priv->hw_params.beacon_time_tsf_bits);
1944 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
1945 priv->hw_params.beacon_time_tsf_bits);
1946 u32 interval = beacon_interval * TIME_UNIT;
1947 u32 res = (base & iwl_beacon_time_mask_high(priv,
1948 priv->hw_params.beacon_time_tsf_bits)) +
1949 (addon & iwl_beacon_time_mask_high(priv,
1950 priv->hw_params.beacon_time_tsf_bits));
1951
1952 if (base_low > addon_low)
1953 res += base_low - addon_low;
1954 else if (base_low < addon_low) {
1955 res += interval + base_low - addon_low;
1956 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1957 } else
1958 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1959
1960 return cpu_to_le32(res);
1961}
a0ee74cf 1962
6da3a13e
WYG		 1963#ifdef CONFIG_PM
1964
f60dc013 1965int iwl_pci_suspend(struct device *device)
6da3a13e 1966{
f60dc013 1967 struct pci_dev *pdev = to_pci_dev(device);
6da3a13e
WYG		 1968 struct iwl_priv *priv = pci_get_drvdata(pdev);
1969
1970 /*
1971 * This function is called when system goes into suspend state
1972 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
1973 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1974 * it will not call apm_ops.stop() to stop the DMA operation.
1975 * Calling apm_ops.stop here to make sure we stop the DMA.
1976 */
14e8e4af 1977 iwl_apm_stop(priv);
6da3a13e 1978
6da3a13e
WYG		 1979 return 0;
1980}
6da3a13e 1981
f60dc013 1982int iwl_pci_resume(struct device *device)
6da3a13e 1983{
f60dc013 1984 struct pci_dev *pdev = to_pci_dev(device);
6da3a13e 1985 struct iwl_priv *priv = pci_get_drvdata(pdev);
0ab84cff 1986 bool hw_rfkill = false;
6da3a13e 1987
cd398c31
AK		 1988 /*
1989 * We disable the RETRY_TIMEOUT register (0x41) to keep
1990 * PCI Tx retries from interfering with C3 CPU state.
1991 */
1992 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
1993
6da3a13e
WYG		 1994 iwl_enable_interrupts(priv);
1995
0ab84cff
JB		 1996 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1997 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1998 hw_rfkill = true;
1999
2000 if (hw_rfkill)
2001 set_bit(STATUS_RF_KILL_HW, &priv->status);
2002 else
2003 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2004
2005 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2006
6da3a13e
WYG		 2007 return 0;
2008}
6da3a13e 2009
f60dc013
JL		 2010const struct dev_pm_ops iwl_pm_ops = {
2011 .suspend = iwl_pci_suspend,
2012 .resume = iwl_pci_resume,
2013 .freeze = iwl_pci_suspend,
2014 .thaw = iwl_pci_resume,
2015 .poweroff = iwl_pci_suspend,
2016 .restore = iwl_pci_resume,
2017};
f60dc013 2018
6da3a13e 2019#endif /* CONFIG_PM */
Linux kernel - Deliverables
This page took 0.722888 seconds and 5 git commands to generate.