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iwlwifi: allow configure protection mode
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
670245ed
JB		 67bool bt_coex_active = true;
68EXPORT_SYMBOL_GPL(bt_coex_active);
06702a73 69module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 70MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 71
c7de35cd
RR		 72#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
73 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
74 IWL_RATE_SISO_##s##M_PLCP, \
75 IWL_RATE_MIMO2_##s##M_PLCP,\
76 IWL_RATE_MIMO3_##s##M_PLCP,\
77 IWL_RATE_##r##M_IEEE, \
78 IWL_RATE_##ip##M_INDEX, \
79 IWL_RATE_##in##M_INDEX, \
80 IWL_RATE_##rp##M_INDEX, \
81 IWL_RATE_##rn##M_INDEX, \
82 IWL_RATE_##pp##M_INDEX, \
83 IWL_RATE_##np##M_INDEX }
84
a562a9dd
RC		 85u32 iwl_debug_level;
86EXPORT_SYMBOL(iwl_debug_level);
87
c7de35cd
RR		 88/*
89 * Parameter order:
90 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
91 *
92 * If there isn't a valid next or previous rate then INV is used which
93 * maps to IWL_RATE_INVALID
94 *
95 */
1826dcc0 96const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 97 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
98 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
99 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
100 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
101 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
102 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
103 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
104 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
105 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
106 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
107 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
108 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
109 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
110 /* FIXME:RS: ^^ should be INV (legacy) */
111};
1826dcc0 112EXPORT_SYMBOL(iwl_rates);
c7de35cd 113
e7d326ac
TW		 114int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
115{
116 int idx = 0;
117
118 /* HT rate format */
119 if (rate_n_flags & RATE_MCS_HT_MSK) {
120 idx = (rate_n_flags & 0xff);
121
60d32215
DH		 122 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
123 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
124 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 125 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
126
127 idx += IWL_FIRST_OFDM_RATE;
128 /* skip 9M not supported in ht*/
129 if (idx >= IWL_RATE_9M_INDEX)
130 idx += 1;
131 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
132 return idx;
133
134 /* legacy rate format, search for match in table */
135 } else {
136 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
137 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
138 return idx;
139 }
140
141 return -1;
142}
143EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
144
0e1654fa 145u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW		 146{
147 int i;
148 u8 ind = ant;
0e1654fa 149
bd6e2d57
JB		 150 if (priv->band == IEEE80211_BAND_2GHZ &&
151 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
152 return 0;
153
76eff18b
TW		 154 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
155 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 156 if (valid & BIT(ind))
76eff18b
TW		 157 return ind;
158 }
159 return ant;
160}
47ff65c4 161EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 162
163const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
164EXPORT_SYMBOL(iwl_bcast_addr);
165
166
1d0a082d
AK		 167/* This function both allocates and initializes hw and priv. */
168struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
169 struct ieee80211_ops *hw_ops)
170{
171 struct iwl_priv *priv;
172
173 /* mac80211 allocates memory for this device instance, including
174 * space for this driver's private structure */
175 struct ieee80211_hw *hw =
176 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
177 if (hw == NULL) {
c96c31e4 178 pr_err("%s: Can not allocate network device\n",
a3139c59 179 cfg->name);
1d0a082d
AK		 180 goto out;
181 }
182
183 priv = hw->priv;
184 priv->hw = hw;
185
186out:
187 return hw;
188}
189EXPORT_SYMBOL(iwl_alloc_all);
190
14d2aac5
AK		 191/*
192 * QoS support
193*/
8dfdb9d5 194static void iwl_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
14d2aac5
AK		 195{
196 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
197 return;
198
8dfdb9d5 199 ctx->qos_data.def_qos_parm.qos_flags = 0;
14d2aac5 200
8dfdb9d5
JB		 201 if (ctx->qos_data.qos_active)
202 ctx->qos_data.def_qos_parm.qos_flags |=
14d2aac5
AK		 203 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
204
7e6a5886 205 if (ctx->ht.enabled)
8dfdb9d5 206 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
14d2aac5 207
e61146e3 208 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
8dfdb9d5
JB		 209 ctx->qos_data.qos_active,
210 ctx->qos_data.def_qos_parm.qos_flags);
14d2aac5 211
8dfdb9d5 212 iwl_send_cmd_pdu_async(priv, ctx->qos_cmd,
e61146e3 213 sizeof(struct iwl_qosparam_cmd),
8dfdb9d5 214 &ctx->qos_data.def_qos_parm, NULL);
14d2aac5 215}
c7de35cd 216
d9fe60de
JB		 217#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
218#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 219static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 220 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 221 enum ieee80211_band band)
222{
39130df3
RR		 223 u16 max_bit_rate = 0;
224 u8 rx_chains_num = priv->hw_params.rx_chains_num;
225 u8 tx_chains_num = priv->hw_params.tx_chains_num;
226
c7de35cd 227 ht_info->cap = 0;
d9fe60de 228 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 229
d9fe60de 230 ht_info->ht_supported = true;
c7de35cd 231
b261793d
DH		 232 if (priv->cfg->ht_greenfield_support)
233 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 234 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 235 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 236 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 237 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
238 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
239 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 240 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 241 }
c7de35cd
RR		 242
243 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 244 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 245
246 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
172c1d11
WYG		 247 if (priv->cfg->ampdu_factor)
248 ht_info->ampdu_factor = priv->cfg->ampdu_factor;
c7de35cd 249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
172c1d11
WYG		 250 if (priv->cfg->ampdu_density)
251 ht_info->ampdu_density = priv->cfg->ampdu_density;
c7de35cd 252
d9fe60de 253 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 254 if (rx_chains_num >= 2)
d9fe60de 255 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 256 if (rx_chains_num >= 3)
d9fe60de 257 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 258
259 /* Highest supported Rx data rate */
260 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 261 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
262 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 263
264 /* Tx MCS capabilities */
d9fe60de 265 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 266 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 267 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
268 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
269 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 270 }
c7de35cd 271}
c7de35cd 272
c7de35cd
RR		 273/**
274 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
275 */
534166de 276int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 277{
278 struct iwl_channel_info *ch;
279 struct ieee80211_supported_band *sband;
280 struct ieee80211_channel *channels;
281 struct ieee80211_channel *geo_ch;
282 struct ieee80211_rate *rates;
283 int i = 0;
284
285 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
286 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 287 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 288 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
289 return 0;
290 }
291
292 channels = kzalloc(sizeof(struct ieee80211_channel) *
293 priv->channel_count, GFP_KERNEL);
294 if (!channels)
295 return -ENOMEM;
296
5027309b 297 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 298 GFP_KERNEL);
299 if (!rates) {
300 kfree(channels);
301 return -ENOMEM;
302 }
303
304 /* 5.2GHz channels start after the 2.4GHz channels */
305 sband = &priv->bands[IEEE80211_BAND_5GHZ];
306 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
307 /* just OFDM */
308 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 309 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 310
49779293 311 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 312 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 313 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 314
315 sband = &priv->bands[IEEE80211_BAND_2GHZ];
316 sband->channels = channels;
317 /* OFDM & CCK */
318 sband->bitrates = rates;
5027309b 319 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 320
49779293 321 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 322 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 323 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 324
325 priv->ieee_channels = channels;
326 priv->ieee_rates = rates;
327
c7de35cd
RR		 328 for (i = 0; i < priv->channel_count; i++) {
329 ch = &priv->channel_info[i];
330
331 /* FIXME: might be removed if scan is OK */
332 if (!is_channel_valid(ch))
333 continue;
334
335 if (is_channel_a_band(ch))
336 sband = &priv->bands[IEEE80211_BAND_5GHZ];
337 else
338 sband = &priv->bands[IEEE80211_BAND_2GHZ];
339
340 geo_ch = &sband->channels[sband->n_channels++];
341
342 geo_ch->center_freq =
343 ieee80211_channel_to_frequency(ch->channel);
344 geo_ch->max_power = ch->max_power_avg;
345 geo_ch->max_antenna_gain = 0xff;
346 geo_ch->hw_value = ch->channel;
347
348 if (is_channel_valid(ch)) {
349 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
350 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
351
352 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
353 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
354
355 if (ch->flags & EEPROM_CHANNEL_RADAR)
356 geo_ch->flags |= IEEE80211_CHAN_RADAR;
357
7aafef1c 358 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 359
dc1b0973
WYG		 360 if (ch->max_power_avg > priv->tx_power_device_lmt)
361 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 362 } else {
363 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
364 }
365
e1623446 366 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 367 ch->channel, geo_ch->center_freq,
368 is_channel_a_band(ch) ? "5.2" : "2.4",
369 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
370 "restricted" : "valid",
371 geo_ch->flags);
372 }
373
374 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
375 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 376 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
377 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 378 priv->pci_dev->device,
379 priv->pci_dev->subsystem_device);
c7de35cd
RR		 380 priv->cfg->sku &= ~IWL_SKU_A;
381 }
382
978785a3 383 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 384 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
385 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 386
387 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
388
389 return 0;
390}
534166de 391EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 392
393/*
394 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
395 */
534166de 396void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 397{
398 kfree(priv->ieee_channels);
399 kfree(priv->ieee_rates);
400 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
401}
534166de 402EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 403
37dc70fe 404/*
94597ab2 405 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK		 406 * function.
407 */
94597ab2
JB		 408void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
409 struct ieee80211_tx_info *info,
410 __le16 fc, __le32 *tx_flags)
37dc70fe
AK		 411{
412 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
413 *tx_flags |= TX_CMD_FLG_RTS_MSK;
414 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB		 415 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
416
417 if (!ieee80211_is_mgmt(fc))
418 return;
419
420 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
421 case cpu_to_le16(IEEE80211_STYPE_AUTH):
422 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
423 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
424 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
425 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
426 *tx_flags |= TX_CMD_FLG_CTS_MSK;
427 break;
428 }
37dc70fe
AK		 429 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
430 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
431 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 432 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK		 433 }
434}
94597ab2
JB		 435EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
436
37dc70fe 437
28a6b07a 438static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 439{
ba37a3d0 440 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 441 priv->current_ht_config.single_chain_sufficient;
c7de35cd 442}
963f5517 443
7e6a5886
JB		 444static bool iwl_is_channel_extension(struct iwl_priv *priv,
445 enum ieee80211_band band,
446 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 447{
448 const struct iwl_channel_info *ch_info;
449
450 ch_info = iwl_get_channel_info(priv, band, channel);
451 if (!is_channel_valid(ch_info))
7e6a5886 452 return false;
47c5196e 453
d9fe60de 454 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 455 return !(ch_info->ht40_extension_channel &
689da1b3 456 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 457 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 458 return !(ch_info->ht40_extension_channel &
689da1b3 459 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 460
7e6a5886 461 return false;
47c5196e
TW		 462}
463
7e6a5886
JB		 464bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
465 struct iwl_rxon_context *ctx,
466 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 467{
7e6a5886
JB		 468 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
469 return false;
47c5196e 470
7e6a5886
JB		 471 /*
472 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 473 * the bit will not set if it is pure 40MHz case
474 */
7e6a5886
JB		 475 if (ht_cap && !ht_cap->ht_supported)
476 return false;
477
d73e4923 478#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 479 if (priv->disable_ht40)
7e6a5886 480 return false;
1e4247d4 481#endif
7e6a5886 482
611d3eb7 483 return iwl_is_channel_extension(priv, priv->band,
246ed355 484 le16_to_cpu(ctx->staging.channel),
7e6a5886 485 ctx->ht.extension_chan_offset);
47c5196e 486}
7aafef1c 487EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 488
2c2f3b33
TW		 489static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
490{
491 u16 new_val = 0;
492 u16 beacon_factor = 0;
493
494 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
495 new_val = beacon_val / beacon_factor;
496
497 if (!new_val)
498 new_val = max_beacon_val;
499
500 return new_val;
501}
502
47313e34 503int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW		 504{
505 u64 tsf;
506 s32 interval_tm, rem;
2c2f3b33
TW		 507 struct ieee80211_conf *conf = NULL;
508 u16 beacon_int;
47313e34 509 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW		 510
511 conf = ieee80211_get_hw_conf(priv->hw);
512
948f5a2f
JB		 513 lockdep_assert_held(&priv->mutex);
514
246ed355 515 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 516
246ed355
JB		 517 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
518 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 519
47313e34 520 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 521
47313e34
JB		 522 /*
523 * TODO: For IBSS we need to get atim_window from mac80211,
524 * for now just always use 0
525 */
526 ctx->timing.atim_window = 0;
2c2f3b33 527
bde4530e
JB		 528 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
529 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION)) {
530 ctx->timing.beacon_interval =
531 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
532 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
533 } else {
534 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 535 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB		 536 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
537 }
2c2f3b33
TW		 538
539 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 540 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 541 rem = do_div(tsf, interval_tm);
246ed355 542 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 543
47313e34 544 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 545
2c2f3b33
TW		 546 IWL_DEBUG_ASSOC(priv,
547 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 548 le16_to_cpu(ctx->timing.beacon_interval),
549 le32_to_cpu(ctx->timing.beacon_init_val),
550 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 551
8f2d3d2a 552 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 553 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 554}
948f5a2f 555EXPORT_SYMBOL(iwl_send_rxon_timing);
2c2f3b33 556
246ed355
JB		 557void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
558 int hw_decrypt)
8ccde88a 559{
246ed355 560 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 561
562 if (hw_decrypt)
563 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
564 else
565 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
566
567}
568EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
569
570/**
571 * iwl_check_rxon_cmd - validate RXON structure is valid
572 *
573 * NOTE: This is really only useful during development and can eventually
574 * be #ifdef'd out once the driver is stable and folks aren't actively
575 * making changes
576 */
246ed355 577int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a
SO		 578{
579 int error = 0;
580 int counter = 1;
246ed355 581 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 582
583 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
584 error |= le32_to_cpu(rxon->flags &
585 (RXON_FLG_TGJ_NARROW_BAND_MSK |
586 RXON_FLG_RADAR_DETECT_MSK));
587 if (error)
588 IWL_WARN(priv, "check 24G fields %d | %d\n",
589 counter++, error);
590 } else {
591 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
592 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
593 if (error)
594 IWL_WARN(priv, "check 52 fields %d | %d\n",
595 counter++, error);
596 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
597 if (error)
598 IWL_WARN(priv, "check 52 CCK %d | %d\n",
599 counter++, error);
600 }
601 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
602 if (error)
603 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
604
605 /* make sure basic rates 6Mbps and 1Mbps are supported */
606 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
607 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
608 if (error)
609 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
610
611 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
612 if (error)
613 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
614
615 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
616 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
617 if (error)
618 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
619 counter++, error);
620
621 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
622 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
623 if (error)
624 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
625 counter++, error);
626
627 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
628 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
629 if (error)
630 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
631 counter++, error);
632
633 if (error)
634 IWL_WARN(priv, "Tuning to channel %d\n",
635 le16_to_cpu(rxon->channel));
636
637 if (error) {
638 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
639 return -1;
640 }
641 return 0;
642}
643EXPORT_SYMBOL(iwl_check_rxon_cmd);
644
645/**
646 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
647 * @priv: staging_rxon is compared to active_rxon
648 *
649 * If the RXON structure is changing enough to require a new tune,
650 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
651 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
652 */
246ed355
JB		 653int iwl_full_rxon_required(struct iwl_priv *priv,
654 struct iwl_rxon_context *ctx)
8ccde88a 655{
246ed355
JB		 656 const struct iwl_rxon_cmd *staging = &ctx->staging;
657 const struct iwl_rxon_cmd *active = &ctx->active;
658
659#define CHK(cond) \
660 if ((cond)) { \
661 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
662 return 1; \
663 }
664
665#define CHK_NEQ(c1, c2) \
666 if ((c1) != (c2)) { \
667 IWL_DEBUG_INFO(priv, "need full RXON - " \
668 #c1 " != " #c2 " - %d != %d\n", \
669 (c1), (c2)); \
670 return 1; \
671 }
8ccde88a
SO		 672
673 /* These items are only settable from the full RXON command */
246ed355
JB		 674 CHK(!iwl_is_associated_ctx(ctx));
675 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
676 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
677 CHK(compare_ether_addr(staging->wlap_bssid_addr,
678 active->wlap_bssid_addr));
679 CHK_NEQ(staging->dev_type, active->dev_type);
680 CHK_NEQ(staging->channel, active->channel);
681 CHK_NEQ(staging->air_propagation, active->air_propagation);
682 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
683 active->ofdm_ht_single_stream_basic_rates);
684 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
685 active->ofdm_ht_dual_stream_basic_rates);
686 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
687 active->ofdm_ht_triple_stream_basic_rates);
688 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 689
690 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
691 * be updated with the RXON_ASSOC command -- however only some
692 * flag transitions are allowed using RXON_ASSOC */
693
694 /* Check if we are not switching bands */
246ed355
JB		 695 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
696 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 697
698 /* Check if we are switching association toggle */
246ed355
JB		 699 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
700 active->filter_flags & RXON_FILTER_ASSOC_MSK);
701
702#undef CHK
703#undef CHK_NEQ
8ccde88a
SO		 704
705 return 0;
706}
707EXPORT_SYMBOL(iwl_full_rxon_required);
708
76d04815
JB		 709u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
710 struct iwl_rxon_context *ctx)
8ccde88a 711{
4a02886b
JB		 712 /*
713 * Assign the lowest rate -- should really get this from
714 * the beacon skb from mac80211.
715 */
246ed355 716 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO		 717 return IWL_RATE_1M_PLCP;
718 else
719 return IWL_RATE_6M_PLCP;
720}
721EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
722
246ed355
JB		 723static void _iwl_set_rxon_ht(struct iwl_priv *priv,
724 struct iwl_ht_config *ht_conf,
725 struct iwl_rxon_context *ctx)
47c5196e 726{
246ed355 727 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 728
7e6a5886 729 if (!ctx->ht.enabled) {
a2b0f02e 730 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 731 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 732 RXON_FLG_HT40_PROT_MSK |
42eb7c64 733 RXON_FLG_HT_PROT_MSK);
47c5196e 734 return;
42eb7c64 735 }
47c5196e 736
7e6a5886 737 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 738 * will be needed for rxon->flags
739 */
7e6a5886 740 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 741
742 /* Set up channel bandwidth:
7aafef1c 743 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 744 /* clear the HT channel mode before set the mode */
745 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
746 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 747 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 748 /* pure ht40 */
7e6a5886 749 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 750 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 751 /* Note: control channel is opposite of extension channel */
7e6a5886 752 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 753 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
754 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
755 break;
756 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
757 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
758 break;
759 }
760 } else {
a2b0f02e 761 /* Note: control channel is opposite of extension channel */
7e6a5886 762 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 763 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
764 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
765 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
766 break;
767 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
768 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
769 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
770 break;
771 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
772 default:
773 /* channel location only valid if in Mixed mode */
774 IWL_ERR(priv, "invalid extension channel offset\n");
775 break;
776 }
777 }
778 } else {
779 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 780 }
781
45823531 782 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 783 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 784
02bb1bea 785 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 786 "extension channel offset 0x%x\n",
7e6a5886
JB		 787 le32_to_cpu(rxon->flags), ctx->ht.protection,
788 ctx->ht.extension_chan_offset);
47c5196e 789}
246ed355
JB		 790
791void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
792{
793 struct iwl_rxon_context *ctx;
794
795 for_each_context(priv, ctx)
796 _iwl_set_rxon_ht(priv, ht_conf, ctx);
797}
47c5196e
TW		 798EXPORT_SYMBOL(iwl_set_rxon_ht);
799
9e5e6c32
TW		 800#define IWL_NUM_RX_CHAINS_MULTIPLE 3
801#define IWL_NUM_RX_CHAINS_SINGLE 2
802#define IWL_NUM_IDLE_CHAINS_DUAL 2
803#define IWL_NUM_IDLE_CHAINS_SINGLE 1
804
2b396a12
JB		 805/*
806 * Determine how many receiver/antenna chains to use.
807 *
808 * More provides better reception via diversity. Fewer saves power
809 * at the expense of throughput, but only when not in powersave to
810 * start with.
811 *
c7de35cd
RR		 812 * MIMO (dual stream) requires at least 2, but works better with 3.
813 * This does not determine *which* chains to use, just how many.
814 */
28a6b07a 815static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 816{
da5dbb97
WYG		 817 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
818 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
819 /*
820 * only use chain 'A' in bt high traffic load or
821 * full concurrency mode
822 */
bee008b7
WYG		 823 return IWL_NUM_RX_CHAINS_SINGLE;
824 }
c7de35cd 825 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 826 if (is_single_rx_stream(priv))
9e5e6c32 827 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 828 else
9e5e6c32 829 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 830}
c7de35cd 831
2b396a12 832/*
3f3e0376
WYG		 833 * When we are in power saving mode, unless device support spatial
834 * multiplexing power save, use the active count for rx chain count.
2b396a12 835 */
28a6b07a
TW		 836static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
837{
ba37a3d0
JB		 838 /* # Rx chains when idling, depending on SMPS mode */
839 switch (priv->current_ht_config.smps) {
840 case IEEE80211_SMPS_STATIC:
841 case IEEE80211_SMPS_DYNAMIC:
842 return IWL_NUM_IDLE_CHAINS_SINGLE;
843 case IEEE80211_SMPS_OFF:
844 return active_cnt;
c15d20c1 845 default:
ba37a3d0
JB		 846 WARN(1, "invalid SMPS mode %d",
847 priv->current_ht_config.smps);
848 return active_cnt;
3f3e0376 849 }
c7de35cd
RR		 850}
851
04816448
GE		 852/* up to 4 chains */
853static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
854{
855 u8 res;
856 res = (chain_bitmap & BIT(0)) >> 0;
857 res += (chain_bitmap & BIT(1)) >> 1;
858 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 859 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 860 return res;
861}
862
c7de35cd
RR		 863/**
864 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
865 *
866 * Selects how many and which Rx receivers/antennas/chains to use.
867 * This should not be used for scan command ... it puts data in wrong place.
868 */
246ed355 869void iwl_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
c7de35cd 870{
28a6b07a
TW		 871 bool is_single = is_single_rx_stream(priv);
872 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 873 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
874 u32 active_chains;
28a6b07a 875 u16 rx_chain;
c7de35cd
RR		 876
877 /* Tell uCode which antennas are actually connected.
878 * Before first association, we assume all antennas are connected.
879 * Just after first association, iwl_chain_noise_calibration()
880 * checks which antennas actually *are* connected. */
bee008b7 881 if (priv->chain_noise_data.active_chains)
04816448
GE		 882 active_chains = priv->chain_noise_data.active_chains;
883 else
884 active_chains = priv->hw_params.valid_rx_ant;
885
da5dbb97
WYG		 886 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
887 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
888 /*
889 * only use chain 'A' in bt high traffic load or
890 * full concurrency mode
891 */
bee008b7
WYG		 892 active_chains = first_antenna(active_chains);
893 }
894
04816448 895 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 896
897 /* How many receivers should we use? */
28a6b07a
TW		 898 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
899 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
900
28a6b07a 901
04816448
GE		 902 /* correct rx chain count according hw settings
903 * and chain noise calibration
904 */
905 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
906 if (valid_rx_cnt < active_rx_cnt)
907 active_rx_cnt = valid_rx_cnt;
908
909 if (valid_rx_cnt < idle_rx_cnt)
910 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 911
912 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
913 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
914
246ed355 915 ctx->staging.rx_chain = cpu_to_le16(rx_chain);
28a6b07a 916
9e5e6c32 917 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
246ed355 918 ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 919 else
246ed355 920 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 921
e1623446 922 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
246ed355 923 ctx->staging.rx_chain,
28a6b07a
TW		 924 active_rx_cnt, idle_rx_cnt);
925
926 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
927 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 928}
929EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 930
246ed355 931/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 932u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 933 enum ieee80211_band band)
14023641
AK		 934{
935 const struct iwl_channel_info *ch_info;
936 int i;
937 u8 channel = 0;
246ed355
JB		 938 u8 min, max;
939 struct iwl_rxon_context *ctx;
14023641 940
14023641 941 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 942 min = 14;
943 max = priv->channel_count;
14023641 944 } else {
246ed355
JB		 945 min = 0;
946 max = 14;
947 }
948
949 for (i = min; i < max; i++) {
950 bool busy = false;
951
952 for_each_context(priv, ctx) {
953 busy = priv->channel_info[i].channel ==
954 le16_to_cpu(ctx->staging.channel);
955 if (busy)
956 break;
14023641 957 }
246ed355
JB		 958
959 if (busy)
960 continue;
961
962 channel = priv->channel_info[i].channel;
963 ch_info = iwl_get_channel_info(priv, band, channel);
964 if (is_channel_valid(ch_info))
965 break;
14023641
AK		 966 }
967
968 return channel;
969}
970EXPORT_SYMBOL(iwl_get_single_channel_number);
971
bf85ea4f 972/**
3edb5fd6
SZ		 973 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
974 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 975
bf85ea4f 976 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 977 * in the staging RXON flag structure based on the ch->band
bf85ea4f 978 */
246ed355
JB		 979int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
980 struct iwl_rxon_context *ctx)
bf85ea4f 981{
17e72782 982 enum ieee80211_band band = ch->band;
81e95430 983 u16 channel = ch->hw_value;
17e72782 984
246ed355 985 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK		 986 (priv->band == band))
987 return 0;
988
246ed355 989 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 990 if (band == IEEE80211_BAND_5GHZ)
246ed355 991 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 992 else
246ed355 993 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 994
995 priv->band = band;
996
e1623446 997 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 998
999 return 0;
1000}
c7de35cd 1001EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1002
79d07325 1003void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 1004 struct iwl_rxon_context *ctx,
79d07325
WYG		 1005 enum ieee80211_band band,
1006 struct ieee80211_vif *vif)
8ccde88a
SO		 1007{
1008 if (band == IEEE80211_BAND_5GHZ) {
246ed355 1009 ctx->staging.flags &=
8ccde88a
SO		 1010 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1011 | RXON_FLG_CCK_MSK);
246ed355 1012 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 1013 } else {
1014 /* Copied from iwl_post_associate() */
c213d745 1015 if (vif && vif->bss_conf.use_short_slot)
246ed355 1016 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1017 else
246ed355 1018 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1019
246ed355
JB		 1020 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
1021 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
1022 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 1023 }
1024}
79d07325 1025EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 1026
1027/*
1028 * initialize rxon structure with default values from eeprom
1029 */
1dda6d28 1030void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 1031 struct iwl_rxon_context *ctx)
8ccde88a
SO		 1032{
1033 const struct iwl_channel_info *ch_info;
1034
246ed355 1035 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 1036
d0fe478c
JB		 1037 if (!ctx->vif) {
1038 ctx->staging.dev_type = ctx->unused_devtype;
1039 } else switch (ctx->vif->type) {
8ccde88a 1040 case NL80211_IFTYPE_AP:
d0fe478c 1041 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO		 1042 break;
1043
1044 case NL80211_IFTYPE_STATION:
d0fe478c 1045 ctx->staging.dev_type = ctx->station_devtype;
246ed355 1046 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 1047 break;
1048
1049 case NL80211_IFTYPE_ADHOC:
d0fe478c 1050 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB		 1051 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1052 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 1053 RXON_FILTER_ACCEPT_GRP_MSK;
1054 break;
1055
8ccde88a 1056 default:
d0fe478c
JB		 1057 IWL_ERR(priv, "Unsupported interface type %d\n",
1058 ctx->vif->type);
8ccde88a
SO		 1059 break;
1060 }
1061
1062#if 0
1063 /* TODO: Figure out when short_preamble would be set and cache from
1064 * that */
1065 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 1066 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 1067 else
246ed355 1068 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 1069#endif
1070
1071 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 1072 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 1073
1074 if (!ch_info)
1075 ch_info = &priv->channel_info[0];
1076
246ed355 1077 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 1078 priv->band = ch_info->band;
1079
d0fe478c 1080 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 1081
246ed355 1082 ctx->staging.ofdm_basic_rates =
8ccde88a 1083 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 1084 ctx->staging.cck_basic_rates =
8ccde88a
SO		 1085 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1086
a2b0f02e 1087 /* clear both MIX and PURE40 mode flag */
246ed355 1088 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 1089 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB		 1090 if (ctx->vif)
1091 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 1092
246ed355
JB		 1093 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
1094 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
1095 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1096}
1097EXPORT_SYMBOL(iwl_connection_init_rx_config);
1098
79d07325 1099void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1100{
1101 const struct ieee80211_supported_band *hw = NULL;
1102 struct ieee80211_rate *rate;
246ed355 1103 struct iwl_rxon_context *ctx;
8ccde88a
SO		 1104 int i;
1105
1106 hw = iwl_get_hw_mode(priv, priv->band);
1107 if (!hw) {
1108 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1109 return;
1110 }
1111
1112 priv->active_rate = 0;
8ccde88a
SO		 1113
1114 for (i = 0; i < hw->n_bitrates; i++) {
1115 rate = &(hw->bitrates[i]);
5027309b 1116 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1117 priv->active_rate |= (1 << rate->hw_value);
1118 }
1119
4a02886b 1120 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1121
246ed355
JB		 1122 for_each_context(priv, ctx) {
1123 ctx->staging.cck_basic_rates =
1124 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 1125
246ed355
JB		 1126 ctx->staging.ofdm_basic_rates =
1127 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1128 }
8ccde88a 1129}
79d07325
WYG		 1130EXPORT_SYMBOL(iwl_set_rate);
1131
1132void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1133{
8bd413e6
JB		 1134 /*
1135 * MULTI-FIXME
1136 * See iwl_mac_channel_switch.
1137 */
1138 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1139
79d07325
WYG		 1140 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1141 return;
1142
1143 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 1144 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG		 1145 mutex_lock(&priv->mutex);
1146 priv->switch_rxon.switch_in_progress = false;
1147 mutex_unlock(&priv->mutex);
1148 }
1149}
1150EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 1151
1152void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1153{
2f301227 1154 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a 1155 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
8bd413e6
JB		 1156 /*
1157 * MULTI-FIXME
1158 * See iwl_mac_channel_switch.
1159 */
246ed355 1160 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
246ed355 1161 struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
4a56e965 1162
0924e519
WYG		 1163 if (priv->switch_rxon.switch_in_progress) {
1164 if (!le32_to_cpu(csa->status) &&
1165 (csa->channel == priv->switch_rxon.channel)) {
1166 rxon->channel = csa->channel;
246ed355 1167 ctx->staging.channel = csa->channel;
0924e519
WYG		 1168 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1169 le16_to_cpu(csa->channel));
79d07325
WYG		 1170 iwl_chswitch_done(priv, true);
1171 } else {
0924e519
WYG		 1172 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1173 le16_to_cpu(csa->channel));
79d07325
WYG		 1174 iwl_chswitch_done(priv, false);
1175 }
0924e519 1176 }
8ccde88a
SO		 1177}
1178EXPORT_SYMBOL(iwl_rx_csa);
1179
1180#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB		 1181void iwl_print_rx_config_cmd(struct iwl_priv *priv,
1182 struct iwl_rxon_context *ctx)
8ccde88a 1183{
246ed355 1184 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 1185
e1623446 1186 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1187 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1188 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1189 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1190 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1191 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1192 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1193 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1194 rxon->ofdm_basic_rates);
e1623446
TW		 1195 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1196 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1197 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1198 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1199}
a643565e 1200EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1201#endif
8ccde88a
SO		 1202/**
1203 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1204 */
1205void iwl_irq_handle_error(struct iwl_priv *priv)
1206{
1207 /* Set the FW error flag -- cleared on iwl_down */
1208 set_bit(STATUS_FW_ERROR, &priv->status);
1209
1210 /* Cancel currently queued command. */
1211 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1212
459bc732
SZ		 1213 IWL_ERR(priv, "Loaded firmware version: %s\n",
1214 priv->hw->wiphy->fw_version);
1215
3a3ff72c 1216 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1217 if (priv->cfg->ops->lib->dump_csr)
1218 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1219 if (priv->cfg->ops->lib->dump_fh)
1220 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1221 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1222#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1223 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB		 1224 iwl_print_rx_config_cmd(priv,
1225 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO		 1226#endif
1227
1228 wake_up_interruptible(&priv->wait_command_queue);
1229
1230 /* Keep the restart process from trying to send host
1231 * commands by clearing the INIT status bit */
1232 clear_bit(STATUS_READY, &priv->status);
1233
1234 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1235 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1236 "Restarting adapter due to uCode error.\n");
1237
8ccde88a
SO		 1238 if (priv->cfg->mod_params->restart_fw)
1239 queue_work(priv->workqueue, &priv->restart);
1240 }
1241}
1242EXPORT_SYMBOL(iwl_irq_handle_error);
1243
f8e200de 1244static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1245{
5220af0c 1246 int ret = 0;
d68b603c 1247
5220af0c 1248 /* stop device's busmaster DMA activity */
d68b603c
AK		 1249 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1250
5220af0c 1251 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1252 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1253 if (ret)
1254 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1255
d68b603c
AK		 1256 IWL_DEBUG_INFO(priv, "stop master\n");
1257
5220af0c 1258 return ret;
d68b603c 1259}
d68b603c
AK		 1260
1261void iwl_apm_stop(struct iwl_priv *priv)
1262{
fadb3582
BC		 1263 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1264
5220af0c 1265 /* Stop device's DMA activity */
d68b603c
AK		 1266 iwl_apm_stop_master(priv);
1267
5220af0c 1268 /* Reset the entire device */
d68b603c
AK		 1269 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1270
1271 udelay(10);
5220af0c
BC		 1272
1273 /*
1274 * Clear "initialization complete" bit to move adapter from
1275 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1276 */
d68b603c 1277 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1278}
1279EXPORT_SYMBOL(iwl_apm_stop);
1280
fadb3582
BC		 1281
1282/*
1283 * Start up NIC's basic functionality after it has been reset
1284 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1285 * NOTE: This does not load uCode nor start the embedded processor
1286 */
1287int iwl_apm_init(struct iwl_priv *priv)
1288{
1289 int ret = 0;
1290 u16 lctl;
1291
1292 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1293
1294 /*
1295 * Use "set_bit" below rather than "write", to preserve any hardware
1296 * bits already set by default after reset.
1297 */
1298
1299 /* Disable L0S exit timer (platform NMI Work/Around) */
1300 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1301 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1302
1303 /*
1304 * Disable L0s without affecting L1;
1305 * don't wait for ICH L0s (ICH bug W/A)
1306 */
1307 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1308 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1309
1310 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1311 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1312
1313 /*
1314 * Enable HAP INTA (interrupt from management bus) to
1315 * wake device's PCI Express link L1a -> L0s
1316 * NOTE: This is no-op for 3945 (non-existant bit)
1317 */
1318 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1319 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1320
1321 /*
a6c5c731
BC		 1322 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1323 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1324 * If so (likely), disable L0S, so device moves directly L0->L1;
1325 * costs negligible amount of power savings.
1326 * If not (unlikely), enable L0S, so there is at least some
1327 * power savings, even without L1.
fadb3582
BC		 1328 */
1329 if (priv->cfg->set_l0s) {
1330 lctl = iwl_pcie_link_ctl(priv);
1331 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1332 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1333 /* L1-ASPM enabled; disable(!) L0S */
1334 iwl_set_bit(priv, CSR_GIO_REG,
1335 CSR_GIO_REG_VAL_L0S_ENABLED);
1336 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1337 } else {
1338 /* L1-ASPM disabled; enable(!) L0S */
1339 iwl_clear_bit(priv, CSR_GIO_REG,
1340 CSR_GIO_REG_VAL_L0S_ENABLED);
1341 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1342 }
1343 }
1344
1345 /* Configure analog phase-lock-loop before activating to D0A */
1346 if (priv->cfg->pll_cfg_val)
1347 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1348
1349 /*
1350 * Set "initialization complete" bit to move adapter from
1351 * D0U* --> D0A* (powered-up active) state.
1352 */
1353 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1354
1355 /*
1356 * Wait for clock stabilization; once stabilized, access to
1357 * device-internal resources is supported, e.g. iwl_write_prph()
1358 * and accesses to uCode SRAM.
1359 */
1360 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1361 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1362 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1363 if (ret < 0) {
1364 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1365 goto out;
1366 }
1367
1368 /*
1369 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1370 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1371 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1372 * and don't need BSM to restore data after power-saving sleep.
1373 *
1374 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1375 * do not disable clocks. This preserves any hardware bits already
1376 * set by default in "CLK_CTRL_REG" after reset.
1377 */
1378 if (priv->cfg->use_bsm)
1379 iwl_write_prph(priv, APMG_CLK_EN_REG,
1380 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1381 else
1382 iwl_write_prph(priv, APMG_CLK_EN_REG,
1383 APMG_CLK_VAL_DMA_CLK_RQT);
1384 udelay(20);
1385
1386 /* Disable L1-Active */
1387 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1388 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1389
1390out:
1391 return ret;
1392}
1393EXPORT_SYMBOL(iwl_apm_init);
1394
1395
630fe9b6
TW		 1396int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1397{
1398 int ret = 0;
5eadd94b
WYG		 1399 s8 prev_tx_power = priv->tx_power_user_lmt;
1400
b744cb79
WYG		 1401 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1402 IWL_WARN(priv,
1403 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1404 tx_power,
b744cb79 1405 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1406 return -EINVAL;
1407 }
1408
dc1b0973 1409 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1410 IWL_WARN(priv,
1411 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1412 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1413 return -EINVAL;
1414 }
1415
1416 if (priv->tx_power_user_lmt != tx_power)
1417 force = true;
1418
019fb97d 1419 /* if nic is not up don't send command */
5eadd94b
WYG		 1420 if (iwl_is_ready_rf(priv)) {
1421 priv->tx_power_user_lmt = tx_power;
1422 if (force && priv->cfg->ops->lib->send_tx_power)
1423 ret = priv->cfg->ops->lib->send_tx_power(priv);
1424 else if (!priv->cfg->ops->lib->send_tx_power)
1425 ret = -EOPNOTSUPP;
1426 /*
1427 * if fail to set tx_power, restore the orig. tx power
1428 */
1429 if (ret)
1430 priv->tx_power_user_lmt = prev_tx_power;
1431 }
630fe9b6 1432
5eadd94b
WYG		 1433 /*
1434 * Even this is an async host command, the command
1435 * will always report success from uCode
1436 * So once driver can placing the command into the queue
1437 * successfully, driver can use priv->tx_power_user_lmt
1438 * to reflect the current tx power
1439 */
630fe9b6
TW		 1440 return ret;
1441}
1442EXPORT_SYMBOL(iwl_set_tx_power);
1443
ef850d7c 1444irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1445{
1446 struct iwl_priv *priv = data;
1447 u32 inta, inta_mask;
1448 u32 inta_fh;
6e8cc38d 1449 unsigned long flags;
f17d08a6
AK		 1450 if (!priv)
1451 return IRQ_NONE;
1452
6e8cc38d 1453 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1454
1455 /* Disable (but don't clear!) interrupts here to avoid
1456 * back-to-back ISRs and sporadic interrupts from our NIC.
1457 * If we have something to service, the tasklet will re-enable ints.
1458 * If we *don't* have something, we'll re-enable before leaving here. */
1459 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1460 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1461
1462 /* Discover which interrupts are active/pending */
1463 inta = iwl_read32(priv, CSR_INT);
1464 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1465
1466 /* Ignore interrupt if there's nothing in NIC to service.
1467 * This may be due to IRQ shared with another device,
1468 * or due to sporadic interrupts thrown from our NIC. */
1469 if (!inta && !inta_fh) {
1470 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1471 goto none;
1472 }
1473
1474 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1475 /* Hardware disappeared. It might have already raised
1476 * an interrupt */
1477 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1478 goto unplugged;
1479 }
1480
1481 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1482 inta, inta_mask, inta_fh);
1483
1484 inta &= ~CSR_INT_BIT_SCD;
1485
1486 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1487 if (likely(inta || inta_fh))
1488 tasklet_schedule(&priv->irq_tasklet);
1489
1490 unplugged:
6e8cc38d 1491 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1492 return IRQ_HANDLED;
1493
1494 none:
1495 /* re-enable interrupts here since we don't have anything to service. */
1496 /* only Re-enable if diabled by irq */
1497 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1498 iwl_enable_interrupts(priv);
6e8cc38d 1499 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1500 return IRQ_NONE;
1501}
ef850d7c 1502EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1503
65b52bde 1504void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1505{
1506 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1507 .lead_time = BT_LEAD_TIME_DEF,
1508 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1509 .kill_ack_mask = 0,
1510 .kill_cts_mask = 0,
1511 };
1512
06702a73
WYG		 1513 if (!bt_coex_active)
1514 bt_cmd.flags = BT_COEX_DISABLE;
1515 else
1516 bt_cmd.flags = BT_COEX_ENABLE;
1517
1518 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1519 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1520
65b52bde
JB		 1521 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1522 sizeof(struct iwl_bt_cmd), &bt_cmd))
1523 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1524}
1525EXPORT_SYMBOL(iwl_send_bt_config);
1526
ef8d5529 1527int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1528{
ef8d5529
WYG		 1529 struct iwl_statistics_cmd statistics_cmd = {
1530 .configuration_flags =
1531 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1532 };
ef8d5529
WYG		 1533
1534 if (flags & CMD_ASYNC)
1535 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1536 sizeof(struct iwl_statistics_cmd),
1537 &statistics_cmd, NULL);
1538 else
1539 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1540 sizeof(struct iwl_statistics_cmd),
1541 &statistics_cmd);
49ea8596
EG		 1542}
1543EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1544
030f05ed
AK		 1545void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1546 struct iwl_rx_mem_buffer *rxb)
1547{
1548#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1549 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1550 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1551 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1552 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1553#endif
1554}
1555EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1556
1557void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1558 struct iwl_rx_mem_buffer *rxb)
1559{
2f301227 1560 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1561 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1562 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1563 "notification for %s:\n", len,
1564 get_cmd_string(pkt->hdr.cmd));
1565 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1566}
1567EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1568
1569void iwl_rx_reply_error(struct iwl_priv *priv,
1570 struct iwl_rx_mem_buffer *rxb)
1571{
2f301227 1572 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1573
1574 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1575 "seq 0x%04X ser 0x%08X\n",
1576 le32_to_cpu(pkt->u.err_resp.error_type),
1577 get_cmd_string(pkt->u.err_resp.cmd_id),
1578 pkt->u.err_resp.cmd_id,
1579 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1580 le32_to_cpu(pkt->u.err_resp.error_info));
1581}
1582EXPORT_SYMBOL(iwl_rx_reply_error);
1583
a83b9141
WYG		 1584void iwl_clear_isr_stats(struct iwl_priv *priv)
1585{
1586 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1587}
a83b9141 1588
488829f1
AK		 1589int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1590 const struct ieee80211_tx_queue_params *params)
1591{
1592 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1593 struct iwl_rxon_context *ctx;
488829f1
AK		 1594 unsigned long flags;
1595 int q;
1596
1597 IWL_DEBUG_MAC80211(priv, "enter\n");
1598
1599 if (!iwl_is_ready_rf(priv)) {
1600 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1601 return -EIO;
1602 }
1603
1604 if (queue >= AC_NUM) {
1605 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1606 return 0;
1607 }
1608
1609 q = AC_NUM - 1 - queue;
1610
1611 spin_lock_irqsave(&priv->lock, flags);
1612
8dfdb9d5
JB		 1613 /*
1614 * MULTI-FIXME
1615 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1616 */
1617 for_each_context(priv, ctx) {
1618 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1619 cpu_to_le16(params->cw_min);
1620 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1621 cpu_to_le16(params->cw_max);
1622 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1623 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1624 cpu_to_le16((params->txop * 32));
1625
1626 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1627 }
488829f1
AK		 1628
1629 spin_unlock_irqrestore(&priv->lock, flags);
1630
1631 IWL_DEBUG_MAC80211(priv, "leave\n");
1632 return 0;
1633}
1634EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1635
a85d7cca
JB		 1636int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1637{
1638 struct iwl_priv *priv = hw->priv;
1639
1640 return priv->ibss_manager == IWL_IBSS_MANAGER;
1641}
1642EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1643
5bbe233b 1644static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1645 struct ieee80211_vif *vif)
5bbe233b 1646{
fad95bf5 1647 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1648 struct ieee80211_sta *sta;
ca3c1f59 1649 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
7e6a5886 1650 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
5bbe233b 1651
91dd6c27 1652 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1653
7e6a5886 1654 if (!ctx->ht.enabled)
5bbe233b
AK		 1655 return;
1656
7e6a5886 1657 ctx->ht.protection =
9ed6bcce 1658 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
7e6a5886 1659 ctx->ht.non_gf_sta_present =
9ed6bcce 1660 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1661
02bb1bea
JB		 1662 ht_conf->single_chain_sufficient = false;
1663
ca3c1f59 1664 switch (vif->type) {
02bb1bea
JB		 1665 case NL80211_IFTYPE_STATION:
1666 rcu_read_lock();
ca3c1f59 1667 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1668 if (sta) {
1669 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1670 int maxstreams;
1671
1672 maxstreams = (ht_cap->mcs.tx_params &
1673 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1674 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1675 maxstreams += 1;
1676
1677 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1678 (ht_cap->mcs.rx_mask[2] == 0))
1679 ht_conf->single_chain_sufficient = true;
1680 if (maxstreams <= 1)
1681 ht_conf->single_chain_sufficient = true;
1682 } else {
1683 /*
1684 * If at all, this can only happen through a race
1685 * when the AP disconnects us while we're still
1686 * setting up the connection, in that case mac80211
1687 * will soon tell us about that.
1688 */
1689 ht_conf->single_chain_sufficient = true;
1690 }
1691 rcu_read_unlock();
1692 break;
1693 case NL80211_IFTYPE_ADHOC:
1694 ht_conf->single_chain_sufficient = true;
1695 break;
1696 default:
1697 break;
1698 }
5bbe233b
AK		 1699
1700 IWL_DEBUG_MAC80211(priv, "leave\n");
1701}
1702
246ed355
JB		 1703static inline void iwl_set_no_assoc(struct iwl_priv *priv,
1704 struct ieee80211_vif *vif)
c91c3efc 1705{
246ed355
JB		 1706 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1707
c91c3efc
AK		 1708 iwl_led_disassociate(priv);
1709 /*
1710 * inform the ucode that there is no longer an
1711 * association and that no more packets should be
1712 * sent
1713 */
246ed355
JB		 1714 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1715 ctx->staging.assoc_id = 0;
1716 iwlcore_commit_rxon(priv, ctx);
c91c3efc
AK		 1717}
1718
0bc5774f
JB		 1719static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1720{
1721 struct iwl_priv *priv = hw->priv;
1722 unsigned long flags;
1723 __le64 timestamp;
1724
1725 IWL_DEBUG_MAC80211(priv, "enter\n");
1726
76d04815
JB		 1727 lockdep_assert_held(&priv->mutex);
1728
1729 if (!priv->beacon_ctx) {
1730 IWL_ERR(priv, "update beacon but no beacon context!\n");
1731 dev_kfree_skb(skb);
1732 return -EINVAL;
1733 }
1734
0bc5774f
JB		 1735 if (!iwl_is_ready_rf(priv)) {
1736 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1737 return -EIO;
1738 }
1739
1740 spin_lock_irqsave(&priv->lock, flags);
1741
1742 if (priv->ibss_beacon)
1743 dev_kfree_skb(priv->ibss_beacon);
1744
1745 priv->ibss_beacon = skb;
1746
1747 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1748 priv->timestamp = le64_to_cpu(timestamp);
1749
1750 IWL_DEBUG_MAC80211(priv, "leave\n");
1751 spin_unlock_irqrestore(&priv->lock, flags);
1752
76d04815 1753 priv->cfg->ops->lib->post_associate(priv, priv->beacon_ctx->vif);
0bc5774f
JB		 1754
1755 return 0;
1756}
1757
5bbe233b 1758void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1759 struct ieee80211_vif *vif,
1760 struct ieee80211_bss_conf *bss_conf,
1761 u32 changes)
5bbe233b
AK		 1762{
1763 struct iwl_priv *priv = hw->priv;
246ed355 1764 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3a650292 1765 int ret;
5bbe233b
AK		 1766
1767 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1768
2d0ddec5
JB		 1769 if (!iwl_is_alive(priv))
1770 return;
1771
1772 mutex_lock(&priv->mutex);
1773
4ced3f74
JB		 1774 if (changes & BSS_CHANGED_QOS) {
1775 unsigned long flags;
1776
1777 spin_lock_irqsave(&priv->lock, flags);
8dfdb9d5
JB		 1778 ctx->qos_data.qos_active = bss_conf->qos;
1779 iwl_update_qos(priv, ctx);
4ced3f74
JB		 1780 spin_unlock_irqrestore(&priv->lock, flags);
1781 }
1782
76d04815
JB		 1783 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1784 /*
1785 * the add_interface code must make sure we only ever
1786 * have a single interface that could be beaconing at
1787 * any time.
1788 */
1789 if (vif->bss_conf.enable_beacon)
1790 priv->beacon_ctx = ctx;
1791 else
1792 priv->beacon_ctx = NULL;
1793 }
1794
92445c95 1795 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1796 dev_kfree_skb(priv->ibss_beacon);
1797 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1798 }
1799
2a3aeb44
JB		 1800 if (changes & BSS_CHANGED_BEACON_INT && vif->type == NL80211_IFTYPE_AP)
1801 iwl_send_rxon_timing(priv, ctx);
d7129e19
JB		 1802
1803 if (changes & BSS_CHANGED_BSSID) {
1804 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1805
1806 /*
1807 * If there is currently a HW scan going on in the
1808 * background then we need to cancel it else the RXON
1809 * below/in post_associate will fail.
1810 */
2d0ddec5 1811 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1812 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1813 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1814 mutex_unlock(&priv->mutex);
1815 return;
1816 }
2d0ddec5 1817
d7129e19 1818 /* mac80211 only sets assoc when in STATION mode */
92445c95 1819 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
246ed355 1820 memcpy(ctx->staging.bssid_addr,
d7129e19 1821 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1822
d7129e19
JB		 1823 /* currently needed in a few places */
1824 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1825 } else {
246ed355 1826 ctx->staging.filter_flags &=
d7129e19 1827 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1828 }
d7129e19 1829
2d0ddec5
JB		 1830 }
1831
d7129e19
JB		 1832 /*
1833 * This needs to be after setting the BSSID in case
1834 * mac80211 decides to do both changes at once because
1835 * it will invoke post_associate.
1836 */
92445c95 1837 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1838 changes & BSS_CHANGED_BEACON) {
1839 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1840
1841 if (beacon)
1842 iwl_mac_beacon_update(hw, beacon);
1843 }
1844
5bbe233b
AK		 1845 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1846 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1847 bss_conf->use_short_preamble);
1848 if (bss_conf->use_short_preamble)
246ed355 1849 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b 1850 else
246ed355 1851 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b
AK		 1852 }
1853
1854 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1855 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1856 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
246ed355 1857 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5bbe233b 1858 else
246ed355 1859 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2 1860 if (bss_conf->use_cts_prot)
246ed355 1861 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
94597ab2 1862 else
246ed355 1863 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK		 1864 }
1865
d7129e19
JB		 1866 if (changes & BSS_CHANGED_BASIC_RATES) {
1867 /* XXX use this information
1868 *
1869 * To do that, remove code from iwl_set_rate() and put something
1870 * like this here:
1871 *
1872 if (A-band)
246ed355 1873 ctx->staging.ofdm_basic_rates =
d7129e19
JB		 1874 bss_conf->basic_rates;
1875 else
246ed355 1876 ctx->staging.ofdm_basic_rates =
d7129e19 1877 bss_conf->basic_rates >> 4;
246ed355 1878 ctx->staging.cck_basic_rates =
d7129e19
JB		 1879 bss_conf->basic_rates & 0xF;
1880 */
1881 }
1882
5bbe233b 1883 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1884 iwl_ht_conf(priv, vif);
45823531
AK		 1885
1886 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1887 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
5bbe233b
AK		 1888 }
1889
1890 if (changes & BSS_CHANGED_ASSOC) {
1891 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1892 if (bss_conf->assoc) {
5bbe233b 1893 priv->timestamp = bss_conf->timestamp;
5bbe233b 1894
e932a609
JB		 1895 iwl_led_associate(priv);
1896
d7129e19 1897 if (!iwl_is_rfkill(priv))
1dda6d28 1898 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc 1899 } else
246ed355 1900 iwl_set_no_assoc(priv, vif);
d7129e19
JB		 1901 }
1902
246ed355 1903 if (changes && iwl_is_associated_ctx(ctx) && bss_conf->aid) {
d7129e19
JB		 1904 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1905 changes);
246ed355 1906 ret = iwl_send_rxon_assoc(priv, ctx);
d7129e19
JB		 1907 if (!ret) {
1908 /* Sync active_rxon with latest change. */
246ed355
JB		 1909 memcpy((void *)&ctx->active,
1910 &ctx->staging,
d7129e19 1911 sizeof(struct iwl_rxon_cmd));
5bbe233b 1912 }
5bbe233b 1913 }
d7129e19 1914
c91c3efc
AK		 1915 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1916 if (vif->bss_conf.enable_beacon) {
246ed355 1917 memcpy(ctx->staging.bssid_addr,
c91c3efc
AK		 1918 bss_conf->bssid, ETH_ALEN);
1919 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1920 iwlcore_config_ap(priv, vif);
c91c3efc 1921 } else
246ed355 1922 iwl_set_no_assoc(priv, vif);
f513dfff
DH		 1923 }
1924
1fa61b2e
JB		 1925 if (changes & BSS_CHANGED_IBSS) {
1926 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1927 bss_conf->ibss_joined);
1928 if (ret)
1929 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1930 bss_conf->ibss_joined ? "add" : "remove",
1931 bss_conf->bssid);
1932 }
1933
52a02d15
JB		 1934 if (changes & BSS_CHANGED_IDLE &&
1935 priv->cfg->ops->hcmd->set_pan_params) {
1936 if (priv->cfg->ops->hcmd->set_pan_params(priv))
1937 IWL_ERR(priv, "failed to update PAN params\n");
1938 }
1939
d7129e19
JB		 1940 mutex_unlock(&priv->mutex);
1941
2d0ddec5 1942 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1943}
1944EXPORT_SYMBOL(iwl_bss_info_changed);
1945
b55e75ed 1946static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1947{
246ed355
JB		 1948 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1949
d0fe478c 1950 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK		 1951
1952 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1953 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1954
246ed355 1955 return iwlcore_commit_rxon(priv, ctx);
727882d6 1956}
727882d6 1957
b55e75ed 1958int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1959{
1960 struct iwl_priv *priv = hw->priv;
246ed355 1961 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1962 struct iwl_rxon_context *tmp, *ctx = NULL;
47e28f41 1963 int err = 0;
cbb6ab94 1964
3779db10
JB		 1965 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1966 vif->type, vif->addr);
cbb6ab94 1967
47e28f41
JB		 1968 mutex_lock(&priv->mutex);
1969
b55e75ed
JB		 1970 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1971 err = -EINVAL;
1972 goto out;
1973 }
1974
d0fe478c
JB		 1975 for_each_context(priv, tmp) {
1976 u32 possible_modes =
1977 tmp->interface_modes | tmp->exclusive_interface_modes;
1978
1979 if (tmp->vif) {
1980 /* check if this busy context is exclusive */
1981 if (tmp->exclusive_interface_modes &
1982 BIT(tmp->vif->type)) {
1983 err = -EINVAL;
1984 goto out;
1985 }
1986 continue;
1987 }
1988
1989 if (!(possible_modes & BIT(vif->type)))
1990 continue;
1991
1992 /* have maybe usable context w/o interface */
1993 ctx = tmp;
1994 break;
1995 }
1996
1997 if (!ctx) {
47e28f41
JB		 1998 err = -EOPNOTSUPP;
1999 goto out;
cbb6ab94
AK		 2000 }
2001
d0fe478c 2002 vif_priv->ctx = ctx;
8bd413e6 2003 ctx->vif = vif;
d0fe478c
JB		 2004 /*
2005 * This variable will be correct only when there's just
2006 * a single context, but all code using it is for hardware
2007 * that supports only one context.
2008 */
1ed32e4f 2009 priv->iw_mode = vif->type;
cbb6ab94 2010
b55e75ed
JB		 2011 err = iwl_set_mode(priv, vif);
2012 if (err)
2013 goto out_err;
7e246191 2014
59079949
JB		 2015 if (priv->cfg->advanced_bt_coexist &&
2016 vif->type == NL80211_IFTYPE_ADHOC) {
2017 /*
2018 * pretend to have high BT traffic as long as we
2019 * are operating in IBSS mode, as this will cause
2020 * the rate scaling etc. to behave as intended.
2021 */
2022 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
2023 }
2024
b55e75ed 2025 goto out;
cbb6ab94 2026
b55e75ed 2027 out_err:
8bd413e6 2028 ctx->vif = NULL;
b55e75ed 2029 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2030 out:
cbb6ab94
AK		 2031 mutex_unlock(&priv->mutex);
2032
2033 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2034 return err;
cbb6ab94
AK		 2035}
2036EXPORT_SYMBOL(iwl_mac_add_interface);
2037
d8052319 2038void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2039 struct ieee80211_vif *vif)
d8052319
AK		 2040{
2041 struct iwl_priv *priv = hw->priv;
246ed355 2042 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
02f5ba5b 2043 bool scan_completed = false;
d8052319
AK		 2044
2045 IWL_DEBUG_MAC80211(priv, "enter\n");
2046
2047 mutex_lock(&priv->mutex);
2048
d0fe478c
JB		 2049 WARN_ON(ctx->vif != vif);
2050 ctx->vif = NULL;
2051
2052 iwl_scan_cancel_timeout(priv, 100);
2053 iwl_set_mode(priv, vif);
8bd413e6
JB		 2054
2055 if (priv->scan_vif == vif) {
2056 scan_completed = true;
2057 priv->scan_vif = NULL;
2058 priv->scan_request = NULL;
d8052319 2059 }
59079949
JB		 2060
2061 /*
2062 * When removing the IBSS interface, overwrite the
2063 * BT traffic load with the stored one from the last
2064 * notification, if any. If this is a device that
2065 * doesn't implement this, this has no effect since
2066 * both values are the same and zero.
2067 */
2068 if (vif->type == NL80211_IFTYPE_ADHOC)
2069 priv->bt_traffic_load = priv->notif_bt_traffic_load;
2070
8bd413e6 2071 memset(priv->bssid, 0, ETH_ALEN);
d8052319
AK		 2072 mutex_unlock(&priv->mutex);
2073
02f5ba5b
JB		 2074 if (scan_completed)
2075 ieee80211_scan_completed(priv->hw, true);
2076
d8052319
AK		 2077 IWL_DEBUG_MAC80211(priv, "leave\n");
2078
2079}
2080EXPORT_SYMBOL(iwl_mac_remove_interface);
2081
4808368d
AK		 2082/**
2083 * iwl_mac_config - mac80211 config callback
4808368d
AK		 2084 */
2085int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2086{
2087 struct iwl_priv *priv = hw->priv;
2088 const struct iwl_channel_info *ch_info;
2089 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 2090 struct ieee80211_channel *channel = conf->channel;
fad95bf5 2091 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
246ed355 2092 struct iwl_rxon_context *ctx;
4808368d
AK		 2093 unsigned long flags = 0;
2094 int ret = 0;
2095 u16 ch;
2096 int scan_active = 0;
2097
2098 mutex_lock(&priv->mutex);
2099
4808368d 2100 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
aa2dc6b5 2101 channel->hw_value, changed);
4808368d
AK		 2102
2103 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2104 test_bit(STATUS_SCANNING, &priv->status))) {
2105 scan_active = 1;
2106 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2107 }
2108
ba37a3d0
JB		 2109 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2110 IEEE80211_CONF_CHANGE_CHANNEL)) {
2111 /* mac80211 uses static for non-HT which is what we want */
2112 priv->current_ht_config.smps = conf->smps_mode;
2113
2114 /*
2115 * Recalculate chain counts.
2116 *
2117 * If monitor mode is enabled then mac80211 will
2118 * set up the SM PS mode to OFF if an HT channel is
2119 * configured.
2120 */
2121 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355
JB		 2122 for_each_context(priv, ctx)
2123 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
ba37a3d0 2124 }
4808368d
AK		 2125
2126 /* during scanning mac80211 will delay channel setting until
2127 * scan finish with changed = 0
2128 */
2129 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2130 if (scan_active)
2131 goto set_ch_out;
2132
aa2dc6b5
SZ		 2133 ch = channel->hw_value;
2134 ch_info = iwl_get_channel_info(priv, channel->band, ch);
4808368d
AK		 2135 if (!is_channel_valid(ch_info)) {
2136 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2137 ret = -EINVAL;
2138 goto set_ch_out;
2139 }
2140
4808368d
AK		 2141 spin_lock_irqsave(&priv->lock, flags);
2142
246ed355 2143 for_each_context(priv, ctx) {
7e6a5886
JB		 2144 /* Configure HT40 channels */
2145 ctx->ht.enabled = conf_is_ht(conf);
2146 if (ctx->ht.enabled) {
2147 if (conf_is_ht40_minus(conf)) {
2148 ctx->ht.extension_chan_offset =
2149 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2150 ctx->ht.is_40mhz = true;
2151 } else if (conf_is_ht40_plus(conf)) {
2152 ctx->ht.extension_chan_offset =
2153 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2154 ctx->ht.is_40mhz = true;
2155 } else {
2156 ctx->ht.extension_chan_offset =
2157 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2158 ctx->ht.is_40mhz = false;
2159 }
2160 } else
2161 ctx->ht.is_40mhz = false;
2162
2163 /*
2164 * Default to no protection. Protection mode will
2165 * later be set from BSS config in iwl_ht_conf
2166 */
2167 ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2168
246ed355
JB		 2169 /* if we are switching from ht to 2.4 clear flags
2170 * from any ht related info since 2.4 does not
2171 * support ht */
2172 if ((le16_to_cpu(ctx->staging.channel) != ch))
2173 ctx->staging.flags = 0;
4808368d 2174
246ed355
JB		 2175 iwl_set_rxon_channel(priv, channel, ctx);
2176 iwl_set_rxon_ht(priv, ht_conf);
2177
2178 iwl_set_flags_for_band(priv, ctx, channel->band,
8bd413e6 2179 ctx->vif);
246ed355 2180 }
4808368d 2181
4808368d 2182 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2183
a194e324
JB		 2184 if (priv->cfg->ops->lib->update_bcast_stations)
2185 ret = priv->cfg->ops->lib->update_bcast_stations(priv);
278c2f6f 2186
4808368d
AK		 2187 set_ch_out:
2188 /* The list of supported rates and rate mask can be different
2189 * for each band; since the band may have changed, reset
2190 * the rate mask to what mac80211 lists */
2191 iwl_set_rate(priv);
2192 }
2193
78f5fb7f
JB		 2194 if (changed & (IEEE80211_CONF_CHANGE_PS |
2195 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2196 ret = iwl_power_update_mode(priv, false);
4808368d 2197 if (ret)
e312c24c 2198 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2199 }
2200
2201 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2202 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2203 priv->tx_power_user_lmt, conf->power_level);
2204
2205 iwl_set_tx_power(priv, conf->power_level, false);
2206 }
2207
0cf4c01e
MA		 2208 if (!iwl_is_ready(priv)) {
2209 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2210 goto out;
2211 }
2212
4808368d
AK		 2213 if (scan_active)
2214 goto out;
2215
246ed355
JB		 2216 for_each_context(priv, ctx) {
2217 if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
2218 iwlcore_commit_rxon(priv, ctx);
2219 else
2220 IWL_DEBUG_INFO(priv,
2221 "Not re-sending same RXON configuration.\n");
2222 }
4808368d
AK		 2223
2224out:
2225 IWL_DEBUG_MAC80211(priv, "leave\n");
2226 mutex_unlock(&priv->mutex);
2227 return ret;
2228}
2229EXPORT_SYMBOL(iwl_mac_config);
2230
bd564261
AK		 2231void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2232{
2233 struct iwl_priv *priv = hw->priv;
2234 unsigned long flags;
246ed355
JB		 2235 /* IBSS can only be the IWL_RXON_CTX_BSS context */
2236 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
bd564261
AK		 2237
2238 mutex_lock(&priv->mutex);
2239 IWL_DEBUG_MAC80211(priv, "enter\n");
2240
2241 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2242 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2243 spin_unlock_irqrestore(&priv->lock, flags);
2244
bd564261 2245 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2246
2247 /* new association get rid of ibss beacon skb */
2248 if (priv->ibss_beacon)
2249 dev_kfree_skb(priv->ibss_beacon);
2250
2251 priv->ibss_beacon = NULL;
2252
bd564261 2253 priv->timestamp = 0;
bd564261
AK		 2254
2255 spin_unlock_irqrestore(&priv->lock, flags);
2256
2257 if (!iwl_is_ready_rf(priv)) {
2258 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2259 mutex_unlock(&priv->mutex);
2260 return;
2261 }
2262
2263 /* we are restarting association process
2264 * clear RXON_FILTER_ASSOC_MSK bit
2265 */
b4665df4 2266 iwl_scan_cancel_timeout(priv, 100);
246ed355
JB		 2267 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2268 iwlcore_commit_rxon(priv, ctx);
bd564261
AK		 2269
2270 iwl_set_rate(priv);
2271
2272 mutex_unlock(&priv->mutex);
2273
2274 IWL_DEBUG_MAC80211(priv, "leave\n");
2275}
2276EXPORT_SYMBOL(iwl_mac_reset_tsf);
2277
88804e2b
WYG		 2278int iwl_alloc_txq_mem(struct iwl_priv *priv)
2279{
2280 if (!priv->txq)
2281 priv->txq = kzalloc(
2282 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2283 GFP_KERNEL);
2284 if (!priv->txq) {
91dd6c27 2285 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2286 return -ENOMEM;
2287 }
2288 return 0;
2289}
2290EXPORT_SYMBOL(iwl_alloc_txq_mem);
2291
2292void iwl_free_txq_mem(struct iwl_priv *priv)
2293{
2294 kfree(priv->txq);
2295 priv->txq = NULL;
2296}
2297EXPORT_SYMBOL(iwl_free_txq_mem);
2298
20594eb0
WYG		 2299#ifdef CONFIG_IWLWIFI_DEBUGFS
2300
2301#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2302
2303void iwl_reset_traffic_log(struct iwl_priv *priv)
2304{
2305 priv->tx_traffic_idx = 0;
2306 priv->rx_traffic_idx = 0;
2307 if (priv->tx_traffic)
2308 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2309 if (priv->rx_traffic)
2310 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2311}
2312
2313int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2314{
2315 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2316
2317 if (iwl_debug_level & IWL_DL_TX) {
2318 if (!priv->tx_traffic) {
2319 priv->tx_traffic =
2320 kzalloc(traffic_size, GFP_KERNEL);
2321 if (!priv->tx_traffic)
2322 return -ENOMEM;
2323 }
2324 }
2325 if (iwl_debug_level & IWL_DL_RX) {
2326 if (!priv->rx_traffic) {
2327 priv->rx_traffic =
2328 kzalloc(traffic_size, GFP_KERNEL);
2329 if (!priv->rx_traffic)
2330 return -ENOMEM;
2331 }
2332 }
2333 iwl_reset_traffic_log(priv);
2334 return 0;
2335}
2336EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2337
2338void iwl_free_traffic_mem(struct iwl_priv *priv)
2339{
2340 kfree(priv->tx_traffic);
2341 priv->tx_traffic = NULL;
2342
2343 kfree(priv->rx_traffic);
2344 priv->rx_traffic = NULL;
2345}
2346EXPORT_SYMBOL(iwl_free_traffic_mem);
2347
2348void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2349 u16 length, struct ieee80211_hdr *header)
2350{
2351 __le16 fc;
2352 u16 len;
2353
2354 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2355 return;
2356
2357 if (!priv->tx_traffic)
2358 return;
2359
2360 fc = header->frame_control;
2361 if (ieee80211_is_data(fc)) {
2362 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2363 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2364 memcpy((priv->tx_traffic +
2365 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2366 header, len);
2367 priv->tx_traffic_idx =
2368 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2369 }
2370}
2371EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2372
2373void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2374 u16 length, struct ieee80211_hdr *header)
2375{
2376 __le16 fc;
2377 u16 len;
2378
2379 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2380 return;
2381
2382 if (!priv->rx_traffic)
2383 return;
2384
2385 fc = header->frame_control;
2386 if (ieee80211_is_data(fc)) {
2387 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2388 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2389 memcpy((priv->rx_traffic +
2390 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2391 header, len);
2392 priv->rx_traffic_idx =
2393 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2394 }
2395}
2396EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2397
2398const char *get_mgmt_string(int cmd)
2399{
2400 switch (cmd) {
2401 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2402 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2403 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2404 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2405 IWL_CMD(MANAGEMENT_PROBE_REQ);
2406 IWL_CMD(MANAGEMENT_PROBE_RESP);
2407 IWL_CMD(MANAGEMENT_BEACON);
2408 IWL_CMD(MANAGEMENT_ATIM);
2409 IWL_CMD(MANAGEMENT_DISASSOC);
2410 IWL_CMD(MANAGEMENT_AUTH);
2411 IWL_CMD(MANAGEMENT_DEAUTH);
2412 IWL_CMD(MANAGEMENT_ACTION);
2413 default:
2414 return "UNKNOWN";
2415
2416 }
2417}
2418
2419const char *get_ctrl_string(int cmd)
2420{
2421 switch (cmd) {
2422 IWL_CMD(CONTROL_BACK_REQ);
2423 IWL_CMD(CONTROL_BACK);
2424 IWL_CMD(CONTROL_PSPOLL);
2425 IWL_CMD(CONTROL_RTS);
2426 IWL_CMD(CONTROL_CTS);
2427 IWL_CMD(CONTROL_ACK);
2428 IWL_CMD(CONTROL_CFEND);
2429 IWL_CMD(CONTROL_CFENDACK);
2430 default:
2431 return "UNKNOWN";
2432
2433 }
2434}
2435
7163b8a4 2436void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2437{
2438 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2439 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2440 priv->led_tpt = 0;
22fdf3c9
WYG		 2441}
2442
2443/*
2444 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2445 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2446 * Use debugFs to display the rx/rx_statistics
2447 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2448 * information will be recorded, but DATA pkt still will be recorded
2449 * for the reason of iwl_led.c need to control the led blinking based on
2450 * number of tx and rx data.
2451 *
2452 */
2453void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2454{
2455 struct traffic_stats *stats;
2456
2457 if (is_tx)
2458 stats = &priv->tx_stats;
2459 else
2460 stats = &priv->rx_stats;
2461
2462 if (ieee80211_is_mgmt(fc)) {
2463 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2464 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2465 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2466 break;
2467 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2468 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2469 break;
2470 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2471 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2472 break;
2473 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2474 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2475 break;
2476 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2477 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2478 break;
2479 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2480 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2481 break;
2482 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2483 stats->mgmt[MANAGEMENT_BEACON]++;
2484 break;
2485 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2486 stats->mgmt[MANAGEMENT_ATIM]++;
2487 break;
2488 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2489 stats->mgmt[MANAGEMENT_DISASSOC]++;
2490 break;
2491 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2492 stats->mgmt[MANAGEMENT_AUTH]++;
2493 break;
2494 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2495 stats->mgmt[MANAGEMENT_DEAUTH]++;
2496 break;
2497 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2498 stats->mgmt[MANAGEMENT_ACTION]++;
2499 break;
2500 }
2501 } else if (ieee80211_is_ctl(fc)) {
2502 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2503 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2504 stats->ctrl[CONTROL_BACK_REQ]++;
2505 break;
2506 case cpu_to_le16(IEEE80211_STYPE_BACK):
2507 stats->ctrl[CONTROL_BACK]++;
2508 break;
2509 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2510 stats->ctrl[CONTROL_PSPOLL]++;
2511 break;
2512 case cpu_to_le16(IEEE80211_STYPE_RTS):
2513 stats->ctrl[CONTROL_RTS]++;
2514 break;
2515 case cpu_to_le16(IEEE80211_STYPE_CTS):
2516 stats->ctrl[CONTROL_CTS]++;
2517 break;
2518 case cpu_to_le16(IEEE80211_STYPE_ACK):
2519 stats->ctrl[CONTROL_ACK]++;
2520 break;
2521 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2522 stats->ctrl[CONTROL_CFEND]++;
2523 break;
2524 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2525 stats->ctrl[CONTROL_CFENDACK]++;
2526 break;
2527 }
2528 } else {
2529 /* data */
2530 stats->data_cnt++;
2531 stats->data_bytes += len;
2532 }
d5f4cf71 2533 iwl_leds_background(priv);
22fdf3c9
WYG		 2534}
2535EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2536#endif
2537
a0ea9493 2538static const char *get_csr_string(int cmd)
696bdee3
WYG		 2539{
2540 switch (cmd) {
2541 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2542 IWL_CMD(CSR_INT_COALESCING);
2543 IWL_CMD(CSR_INT);
2544 IWL_CMD(CSR_INT_MASK);
2545 IWL_CMD(CSR_FH_INT_STATUS);
2546 IWL_CMD(CSR_GPIO_IN);
2547 IWL_CMD(CSR_RESET);
2548 IWL_CMD(CSR_GP_CNTRL);
2549 IWL_CMD(CSR_HW_REV);
2550 IWL_CMD(CSR_EEPROM_REG);
2551 IWL_CMD(CSR_EEPROM_GP);
2552 IWL_CMD(CSR_OTP_GP_REG);
2553 IWL_CMD(CSR_GIO_REG);
2554 IWL_CMD(CSR_GP_UCODE_REG);
2555 IWL_CMD(CSR_GP_DRIVER_REG);
2556 IWL_CMD(CSR_UCODE_DRV_GP1);
2557 IWL_CMD(CSR_UCODE_DRV_GP2);
2558 IWL_CMD(CSR_LED_REG);
2559 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2560 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2561 IWL_CMD(CSR_ANA_PLL_CFG);
2562 IWL_CMD(CSR_HW_REV_WA_REG);
2563 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2564 default:
2565 return "UNKNOWN";
2566
2567 }
2568}
2569
2570void iwl_dump_csr(struct iwl_priv *priv)
2571{
2572 int i;
2573 u32 csr_tbl[] = {
2574 CSR_HW_IF_CONFIG_REG,
2575 CSR_INT_COALESCING,
2576 CSR_INT,
2577 CSR_INT_MASK,
2578 CSR_FH_INT_STATUS,
2579 CSR_GPIO_IN,
2580 CSR_RESET,
2581 CSR_GP_CNTRL,
2582 CSR_HW_REV,
2583 CSR_EEPROM_REG,
2584 CSR_EEPROM_GP,
2585 CSR_OTP_GP_REG,
2586 CSR_GIO_REG,
2587 CSR_GP_UCODE_REG,
2588 CSR_GP_DRIVER_REG,
2589 CSR_UCODE_DRV_GP1,
2590 CSR_UCODE_DRV_GP2,
2591 CSR_LED_REG,
2592 CSR_DRAM_INT_TBL_REG,
2593 CSR_GIO_CHICKEN_BITS,
2594 CSR_ANA_PLL_CFG,
2595 CSR_HW_REV_WA_REG,
2596 CSR_DBG_HPET_MEM_REG
2597 };
2598 IWL_ERR(priv, "CSR values:\n");
2599 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2600 "CSR_INT_PERIODIC_REG)\n");
2601 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2602 IWL_ERR(priv, " %25s: 0X%08x\n",
2603 get_csr_string(csr_tbl[i]),
2604 iwl_read32(priv, csr_tbl[i]));
2605 }
2606}
2607EXPORT_SYMBOL(iwl_dump_csr);
2608
a0ea9493 2609static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2610{
2611 switch (cmd) {
2612 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2613 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2614 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2615 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2616 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2617 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2618 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2619 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2620 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2621 default:
2622 return "UNKNOWN";
2623
2624 }
2625}
2626
2627int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2628{
2629 int i;
2630#ifdef CONFIG_IWLWIFI_DEBUG
2631 int pos = 0;
2632 size_t bufsz = 0;
2633#endif
2634 u32 fh_tbl[] = {
2635 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2636 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2637 FH_RSCSR_CHNL0_WPTR,
2638 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2639 FH_MEM_RSSR_SHARED_CTRL_REG,
2640 FH_MEM_RSSR_RX_STATUS_REG,
2641 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2642 FH_TSSR_TX_STATUS_REG,
2643 FH_TSSR_TX_ERROR_REG
2644 };
2645#ifdef CONFIG_IWLWIFI_DEBUG
2646 if (display) {
2647 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2648 *buf = kmalloc(bufsz, GFP_KERNEL);
2649 if (!*buf)
2650 return -ENOMEM;
2651 pos += scnprintf(*buf + pos, bufsz - pos,
2652 "FH register values:\n");
2653 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2654 pos += scnprintf(*buf + pos, bufsz - pos,
2655 " %34s: 0X%08x\n",
2656 get_fh_string(fh_tbl[i]),
2657 iwl_read_direct32(priv, fh_tbl[i]));
2658 }
2659 return pos;
2660 }
2661#endif
2662 IWL_ERR(priv, "FH register values:\n");
2663 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2664 IWL_ERR(priv, " %34s: 0X%08x\n",
2665 get_fh_string(fh_tbl[i]),
2666 iwl_read_direct32(priv, fh_tbl[i]));
2667 }
2668 return 0;
2669}
2670EXPORT_SYMBOL(iwl_dump_fh);
2671
a93e7973 2672static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2673{
2674 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2675 return;
2676
246ed355 2677 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 2678 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2679 return;
2680 }
2681 /*
2682 * There is no easy and better way to force reset the radio,
2683 * the only known method is switching channel which will force to
2684 * reset and tune the radio.
2685 * Use internal short scan (single channel) operation to should
2686 * achieve this objective.
2687 * Driver should reset the radio when number of consecutive missed
2688 * beacon, or any other uCode error condition detected.
2689 */
2690 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2691 iwl_internal_short_hw_scan(priv);
afbdd69a 2692}
a93e7973 2693
a93e7973 2694
c04f9f22 2695int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2696{
8a472da4
WYG		 2697 struct iwl_force_reset *force_reset;
2698
a93e7973
WYG		 2699 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2700 return -EINVAL;
2701
8a472da4
WYG		 2702 if (mode >= IWL_MAX_FORCE_RESET) {
2703 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2704 return -EINVAL;
2705 }
2706 force_reset = &priv->force_reset[mode];
2707 force_reset->reset_request_count++;
c04f9f22
WYG		 2708 if (!external) {
2709 if (force_reset->last_force_reset_jiffies &&
2710 time_after(force_reset->last_force_reset_jiffies +
2711 force_reset->reset_duration, jiffies)) {
2712 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2713 force_reset->reset_reject_count++;
2714 return -EAGAIN;
2715 }
a93e7973 2716 }
8a472da4
WYG		 2717 force_reset->reset_success_count++;
2718 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2719 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2720 switch (mode) {
2721 case IWL_RF_RESET:
2722 iwl_force_rf_reset(priv);
2723 break;
2724 case IWL_FW_RESET:
c04f9f22
WYG		 2725 /*
2726 * if the request is from external(ex: debugfs),
2727 * then always perform the request in regardless the module
2728 * parameter setting
2729 * if the request is from internal (uCode error or driver
2730 * detect failure), then fw_restart module parameter
2731 * need to be check before performing firmware reload
2732 */
2733 if (!external && !priv->cfg->mod_params->restart_fw) {
2734 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2735 "module parameter setting\n");
2736 break;
2737 }
a93e7973
WYG		 2738 IWL_ERR(priv, "On demand firmware reload\n");
2739 /* Set the FW error flag -- cleared on iwl_down */
2740 set_bit(STATUS_FW_ERROR, &priv->status);
2741 wake_up_interruptible(&priv->wait_command_queue);
2742 /*
2743 * Keep the restart process from trying to send host
2744 * commands by clearing the INIT status bit
2745 */
2746 clear_bit(STATUS_READY, &priv->status);
2747 queue_work(priv->workqueue, &priv->restart);
2748 break;
a93e7973 2749 }
a93e7973
WYG		 2750 return 0;
2751}
b74e31a9
WYG		 2752EXPORT_SYMBOL(iwl_force_reset);
2753
2754/**
2755 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2756 *
2757 * During normal condition (no queue is stuck), the timer is continually set to
2758 * execute every monitor_recover_period milliseconds after the last timer
2759 * expired. When the queue read_ptr is at the same place, the timer is
2760 * shorten to 100mSecs. This is
2761 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2762 * 2) to detect the stuck queues quicker before the station and AP can
2763 * disassociate each other.
2764 *
2765 * This function monitors all the tx queues and recover from it if any
2766 * of the queues are stuck.
2767 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2768 * it will recover by resetting the firmware and return.
2769 * 2. Then, it checks for station association. If it associates it will check
2770 * other queues. If any queue is stuck, it will recover by resetting
2771 * the firmware.
2772 * Note: It the number of times the queue read_ptr to be at the same place to
2773 * be MAX_REPEAT+1 in order to consider to be stuck.
2774 */
2775/*
2776 * The maximum number of times the read pointer of the tx queue at the
2777 * same place without considering to be stuck.
2778 */
2779#define MAX_REPEAT (2)
2780static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2781{
2782 struct iwl_tx_queue *txq;
2783 struct iwl_queue *q;
2784
2785 txq = &priv->txq[cnt];
2786 q = &txq->q;
2787 /* queue is empty, skip */
2788 if (q->read_ptr != q->write_ptr) {
2789 if (q->read_ptr == q->last_read_ptr) {
2790 /* a queue has not been read from last time */
2791 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2792 IWL_ERR(priv,
2793 "queue %d stuck %d time. Fw reload.\n",
2794 q->id, q->repeat_same_read_ptr);
2795 q->repeat_same_read_ptr = 0;
c04f9f22 2796 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG		 2797 } else {
2798 q->repeat_same_read_ptr++;
2799 IWL_DEBUG_RADIO(priv,
2800 "queue %d, not read %d time\n",
2801 q->id,
2802 q->repeat_same_read_ptr);
74e5c41b
WYG		 2803 if (!priv->cfg->advanced_bt_coexist) {
2804 mod_timer(&priv->monitor_recover,
2805 jiffies + msecs_to_jiffies(
2806 IWL_ONE_HUNDRED_MSECS));
2807 return 1;
2808 }
b74e31a9 2809 }
74e5c41b 2810 return 0;
b74e31a9
WYG		 2811 } else {
2812 q->last_read_ptr = q->read_ptr;
2813 q->repeat_same_read_ptr = 0;
2814 }
2815 }
2816 return 0;
2817}
2818
2819void iwl_bg_monitor_recover(unsigned long data)
2820{
2821 struct iwl_priv *priv = (struct iwl_priv *)data;
2822 int cnt;
2823
2824 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2825 return;
2826
2827 /* monitor and check for stuck cmd queue */
13bb9483 2828 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG		 2829 return;
2830
2831 /* monitor and check for other stuck queues */
246ed355 2832 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG		 2833 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2834 /* skip as we already checked the command queue */
13bb9483 2835 if (cnt == priv->cmd_queue)
b74e31a9
WYG		 2836 continue;
2837 if (iwl_check_stuck_queue(priv, cnt))
2838 return;
2839 }
2840 }
7bdc473c
WYG		 2841 if (priv->cfg->monitor_recover_period) {
2842 /*
2843 * Reschedule the timer to occur in
2844 * priv->cfg->monitor_recover_period
2845 */
2846 mod_timer(&priv->monitor_recover, jiffies + msecs_to_jiffies(
2847 priv->cfg->monitor_recover_period));
2848 }
b74e31a9
WYG		 2849}
2850EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2851
a0ee74cf
WYG		 2852
2853/*
2854 * extended beacon time format
2855 * time in usec will be changed into a 32-bit value in extended:internal format
2856 * the extended part is the beacon counts
2857 * the internal part is the time in usec within one beacon interval
2858 */
2859u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2860{
2861 u32 quot;
2862 u32 rem;
2863 u32 interval = beacon_interval * TIME_UNIT;
2864
2865 if (!interval || !usec)
2866 return 0;
2867
2868 quot = (usec / interval) &
2869 (iwl_beacon_time_mask_high(priv,
2870 priv->hw_params.beacon_time_tsf_bits) >>
2871 priv->hw_params.beacon_time_tsf_bits);
2872 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2873 priv->hw_params.beacon_time_tsf_bits);
2874
2875 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2876}
2877EXPORT_SYMBOL(iwl_usecs_to_beacons);
2878
2879/* base is usually what we get from ucode with each received frame,
2880 * the same as HW timer counter counting down
2881 */
2882__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2883 u32 addon, u32 beacon_interval)
2884{
2885 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2886 priv->hw_params.beacon_time_tsf_bits);
2887 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2888 priv->hw_params.beacon_time_tsf_bits);
2889 u32 interval = beacon_interval * TIME_UNIT;
2890 u32 res = (base & iwl_beacon_time_mask_high(priv,
2891 priv->hw_params.beacon_time_tsf_bits)) +
2892 (addon & iwl_beacon_time_mask_high(priv,
2893 priv->hw_params.beacon_time_tsf_bits));
2894
2895 if (base_low > addon_low)
2896 res += base_low - addon_low;
2897 else if (base_low < addon_low) {
2898 res += interval + base_low - addon_low;
2899 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2900 } else
2901 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2902
2903 return cpu_to_le32(res);
2904}
2905EXPORT_SYMBOL(iwl_add_beacon_time);
2906
6da3a13e
WYG		 2907#ifdef CONFIG_PM
2908
2909int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2910{
2911 struct iwl_priv *priv = pci_get_drvdata(pdev);
2912
2913 /*
2914 * This function is called when system goes into suspend state
2915 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2916 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2917 * it will not call apm_ops.stop() to stop the DMA operation.
2918 * Calling apm_ops.stop here to make sure we stop the DMA.
2919 */
2920 priv->cfg->ops->lib->apm_ops.stop(priv);
2921
2922 pci_save_state(pdev);
2923 pci_disable_device(pdev);
2924 pci_set_power_state(pdev, PCI_D3hot);
2925
2926 return 0;
2927}
2928EXPORT_SYMBOL(iwl_pci_suspend);
2929
2930int iwl_pci_resume(struct pci_dev *pdev)
2931{
2932 struct iwl_priv *priv = pci_get_drvdata(pdev);
2933 int ret;
0ab84cff 2934 bool hw_rfkill = false;
6da3a13e 2935
cd398c31
AK		 2936 /*
2937 * We disable the RETRY_TIMEOUT register (0x41) to keep
2938 * PCI Tx retries from interfering with C3 CPU state.
2939 */
2940 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2941
6da3a13e
WYG		 2942 pci_set_power_state(pdev, PCI_D0);
2943 ret = pci_enable_device(pdev);
2944 if (ret)
2945 return ret;
2946 pci_restore_state(pdev);
2947 iwl_enable_interrupts(priv);
2948
0ab84cff
JB		 2949 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2950 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2951 hw_rfkill = true;
2952
2953 if (hw_rfkill)
2954 set_bit(STATUS_RF_KILL_HW, &priv->status);
2955 else
2956 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2957
2958 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2959
6da3a13e
WYG		 2960 return 0;
2961}
2962EXPORT_SYMBOL(iwl_pci_resume);
2963
2964#endif /* CONFIG_PM */
Linux kernel - Deliverables
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