iwlagn: move PCI power related functions to the PCI layer
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW
2 *
3 * GPL LICENSE SUMMARY
4 *
901069c7 5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
df48c323
TW
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
9d143e9a 44#include "iwl-agn.h"
df48c323 45
a562a9dd 46u32 iwl_debug_level;
a562a9dd 47
57bd1bea 48const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
57bd1bea 49
d9fe60de
JB
50#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
51#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 52static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 53 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR
54 enum ieee80211_band band)
55{
39130df3
RR
56 u16 max_bit_rate = 0;
57 u8 rx_chains_num = priv->hw_params.rx_chains_num;
58 u8 tx_chains_num = priv->hw_params.tx_chains_num;
59
c7de35cd 60 ht_info->cap = 0;
d9fe60de 61 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 62
d9fe60de 63 ht_info->ht_supported = true;
c7de35cd 64
7cb1b088
WYG
65 if (priv->cfg->ht_params &&
66 priv->cfg->ht_params->ht_greenfield_support)
b261793d 67 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 68 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 69 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 70 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB
71 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
72 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
73 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 74 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 75 }
c7de35cd 76
9d143e9a 77 if (iwlagn_mod_params.amsdu_size_8K)
d9fe60de 78 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR
79
80 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
7cb1b088
WYG
81 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
82 ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
c7de35cd 83 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
7cb1b088
WYG
84 if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
85 ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
c7de35cd 86
d9fe60de 87 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 88 if (rx_chains_num >= 2)
d9fe60de 89 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 90 if (rx_chains_num >= 3)
d9fe60de 91 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR
92
93 /* Highest supported Rx data rate */
94 max_bit_rate *= rx_chains_num;
d9fe60de
JB
95 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
96 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR
97
98 /* Tx MCS capabilities */
d9fe60de 99 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 100 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB
101 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
102 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
103 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 104 }
c7de35cd 105}
c7de35cd 106
c7de35cd
RR
107/**
108 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
109 */
534166de 110int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR
111{
112 struct iwl_channel_info *ch;
113 struct ieee80211_supported_band *sband;
114 struct ieee80211_channel *channels;
115 struct ieee80211_channel *geo_ch;
116 struct ieee80211_rate *rates;
117 int i = 0;
75d80cad 118 s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR
119
120 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
121 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 122 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR
123 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
124 return 0;
125 }
126
127 channels = kzalloc(sizeof(struct ieee80211_channel) *
128 priv->channel_count, GFP_KERNEL);
129 if (!channels)
130 return -ENOMEM;
131
5027309b 132 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR
133 GFP_KERNEL);
134 if (!rates) {
135 kfree(channels);
136 return -ENOMEM;
137 }
138
139 /* 5.2GHz channels start after the 2.4GHz channels */
140 sband = &priv->bands[IEEE80211_BAND_5GHZ];
141 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
142 /* just OFDM */
143 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 144 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 145
88950758 146 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
d9fe60de 147 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 148 IEEE80211_BAND_5GHZ);
c7de35cd
RR
149
150 sband = &priv->bands[IEEE80211_BAND_2GHZ];
151 sband->channels = channels;
152 /* OFDM & CCK */
153 sband->bitrates = rates;
5027309b 154 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 155
88950758 156 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
d9fe60de 157 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 158 IEEE80211_BAND_2GHZ);
c7de35cd
RR
159
160 priv->ieee_channels = channels;
161 priv->ieee_rates = rates;
162
c7de35cd
RR
163 for (i = 0; i < priv->channel_count; i++) {
164 ch = &priv->channel_info[i];
165
166 /* FIXME: might be removed if scan is OK */
167 if (!is_channel_valid(ch))
168 continue;
169
5a3a0352 170 sband = &priv->bands[ch->band];
c7de35cd
RR
171
172 geo_ch = &sband->channels[sband->n_channels++];
173
174 geo_ch->center_freq =
5a3a0352 175 ieee80211_channel_to_frequency(ch->channel, ch->band);
c7de35cd
RR
176 geo_ch->max_power = ch->max_power_avg;
177 geo_ch->max_antenna_gain = 0xff;
178 geo_ch->hw_value = ch->channel;
179
180 if (is_channel_valid(ch)) {
181 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
182 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
183
184 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
185 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
186
187 if (ch->flags & EEPROM_CHANNEL_RADAR)
188 geo_ch->flags |= IEEE80211_CHAN_RADAR;
189
7aafef1c 190 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 191
75d80cad
SG
192 if (ch->max_power_avg > max_tx_power)
193 max_tx_power = ch->max_power_avg;
c7de35cd
RR
194 } else {
195 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
196 }
197
e1623446 198 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR
199 ch->channel, geo_ch->center_freq,
200 is_channel_a_band(ch) ? "5.2" : "2.4",
201 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
202 "restricted" : "valid",
203 geo_ch->flags);
204 }
205
75d80cad
SG
206 priv->tx_power_device_lmt = max_tx_power;
207 priv->tx_power_user_lmt = max_tx_power;
208 priv->tx_power_next = max_tx_power;
209
c7de35cd 210 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
88950758 211 priv->cfg->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
978785a3
TW
212 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
213 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO
214 priv->pci_dev->device,
215 priv->pci_dev->subsystem_device);
88950758 216 priv->cfg->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
c7de35cd
RR
217 }
218
978785a3 219 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO
220 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
221 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR
222
223 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
224
225 return 0;
226}
227
228/*
229 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
230 */
534166de 231void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR
232{
233 kfree(priv->ieee_channels);
234 kfree(priv->ieee_rates);
235 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
236}
c7de35cd 237
7e6a5886
JB
238static bool iwl_is_channel_extension(struct iwl_priv *priv,
239 enum ieee80211_band band,
240 u16 channel, u8 extension_chan_offset)
47c5196e
TW
241{
242 const struct iwl_channel_info *ch_info;
243
244 ch_info = iwl_get_channel_info(priv, band, channel);
245 if (!is_channel_valid(ch_info))
7e6a5886 246 return false;
47c5196e 247
d9fe60de 248 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 249 return !(ch_info->ht40_extension_channel &
689da1b3 250 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 251 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 252 return !(ch_info->ht40_extension_channel &
689da1b3 253 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 254
7e6a5886 255 return false;
47c5196e
TW
256}
257
7e6a5886
JB
258bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
259 struct iwl_rxon_context *ctx,
260 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 261{
7e6a5886
JB
262 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
263 return false;
47c5196e 264
7e6a5886
JB
265 /*
266 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG
267 * the bit will not set if it is pure 40MHz case
268 */
7e6a5886
JB
269 if (ht_cap && !ht_cap->ht_supported)
270 return false;
271
d73e4923 272#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 273 if (priv->disable_ht40)
7e6a5886 274 return false;
1e4247d4 275#endif
7e6a5886 276
611d3eb7 277 return iwl_is_channel_extension(priv, priv->band,
246ed355 278 le16_to_cpu(ctx->staging.channel),
7e6a5886 279 ctx->ht.extension_chan_offset);
47c5196e 280}
47c5196e 281
2c2f3b33
TW
282static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
283{
ea196fdb
JB
284 u16 new_val;
285 u16 beacon_factor;
286
287 /*
288 * If mac80211 hasn't given us a beacon interval, program
289 * the default into the device (not checking this here
290 * would cause the adjustment below to return the maximum
291 * value, which may break PAN.)
292 */
293 if (!beacon_val)
294 return DEFAULT_BEACON_INTERVAL;
295
296 /*
297 * If the beacon interval we obtained from the peer
298 * is too large, we'll have to wake up more often
299 * (and in IBSS case, we'll beacon too much)
300 *
301 * For example, if max_beacon_val is 4096, and the
302 * requested beacon interval is 7000, we'll have to
303 * use 3500 to be able to wake up on the beacons.
304 *
305 * This could badly influence beacon detection stats.
306 */
2c2f3b33
TW
307
308 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
309 new_val = beacon_val / beacon_factor;
310
311 if (!new_val)
312 new_val = max_beacon_val;
313
314 return new_val;
315}
316
47313e34 317int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW
318{
319 u64 tsf;
320 s32 interval_tm, rem;
2c2f3b33
TW
321 struct ieee80211_conf *conf = NULL;
322 u16 beacon_int;
47313e34 323 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33
TW
324
325 conf = ieee80211_get_hw_conf(priv->hw);
326
948f5a2f
JB
327 lockdep_assert_held(&priv->mutex);
328
246ed355 329 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 330
246ed355
JB
331 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
332 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 333
47313e34 334 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 335
47313e34
JB
336 /*
337 * TODO: For IBSS we need to get atim_window from mac80211,
338 * for now just always use 0
339 */
340 ctx->timing.atim_window = 0;
2c2f3b33 341
bde4530e 342 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB
343 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
344 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
345 priv->contexts[IWL_RXON_CTX_BSS].vif &&
346 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB
347 ctx->timing.beacon_interval =
348 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
349 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB
350 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
351 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
352 priv->contexts[IWL_RXON_CTX_PAN].vif &&
353 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
354 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
355 !ctx->vif->bss_conf.beacon_int)) {
356 ctx->timing.beacon_interval =
357 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
358 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB
359 } else {
360 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 361 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
bde4530e
JB
362 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
363 }
2c2f3b33
TW
364
365 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 366 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 367 rem = do_div(tsf, interval_tm);
246ed355 368 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 369
47313e34 370 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 371
2c2f3b33
TW
372 IWL_DEBUG_ASSOC(priv,
373 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB
374 le16_to_cpu(ctx->timing.beacon_interval),
375 le32_to_cpu(ctx->timing.beacon_init_val),
376 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 377
8f2d3d2a 378 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 379 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 380}
2c2f3b33 381
246ed355
JB
382void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
383 int hw_decrypt)
8ccde88a 384{
246ed355 385 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO
386
387 if (hw_decrypt)
388 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
389 else
390 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
391
392}
8ccde88a 393
dacefedb 394/* validate RXON structure is valid */
246ed355 395int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a 396{
246ed355 397 struct iwl_rxon_cmd *rxon = &ctx->staging;
c914ac26 398 u32 errors = 0;
8ccde88a
SO
399
400 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
dacefedb
JB
401 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
402 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
c914ac26 403 errors |= BIT(0);
dacefedb
JB
404 }
405 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
406 IWL_WARN(priv, "check 2.4G: wrong radar\n");
c914ac26 407 errors |= BIT(1);
dacefedb 408 }
8ccde88a 409 } else {
dacefedb
JB
410 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
411 IWL_WARN(priv, "check 5.2G: not short slot!\n");
c914ac26 412 errors |= BIT(2);
dacefedb
JB
413 }
414 if (rxon->flags & RXON_FLG_CCK_MSK) {
415 IWL_WARN(priv, "check 5.2G: CCK!\n");
c914ac26 416 errors |= BIT(3);
dacefedb
JB
417 }
418 }
419 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
420 IWL_WARN(priv, "mac/bssid mcast!\n");
c914ac26 421 errors |= BIT(4);
8ccde88a 422 }
8ccde88a
SO
423
424 /* make sure basic rates 6Mbps and 1Mbps are supported */
dacefedb
JB
425 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
426 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
427 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
c914ac26 428 errors |= BIT(5);
dacefedb 429 }
8ccde88a 430
dacefedb
JB
431 if (le16_to_cpu(rxon->assoc_id) > 2007) {
432 IWL_WARN(priv, "aid > 2007\n");
c914ac26 433 errors |= BIT(6);
dacefedb 434 }
8ccde88a 435
dacefedb
JB
436 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
437 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
438 IWL_WARN(priv, "CCK and short slot\n");
c914ac26 439 errors |= BIT(7);
dacefedb 440 }
8ccde88a 441
dacefedb
JB
442 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
443 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
444 IWL_WARN(priv, "CCK and auto detect");
c914ac26 445 errors |= BIT(8);
dacefedb 446 }
8ccde88a 447
dacefedb
JB
448 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
449 RXON_FLG_TGG_PROTECT_MSK)) ==
450 RXON_FLG_TGG_PROTECT_MSK) {
451 IWL_WARN(priv, "TGg but no auto-detect\n");
c914ac26 452 errors |= BIT(9);
dacefedb 453 }
8ccde88a 454
c914ac26
JB
455 if (rxon->channel == 0) {
456 IWL_WARN(priv, "zero channel is invalid\n");
457 errors |= BIT(10);
8ccde88a 458 }
c914ac26
JB
459
460 WARN(errors, "Invalid RXON (%#x), channel %d",
461 errors, le16_to_cpu(rxon->channel));
462
463 return errors ? -EINVAL : 0;
8ccde88a 464}
8ccde88a
SO
465
466/**
467 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
468 * @priv: staging_rxon is compared to active_rxon
469 *
470 * If the RXON structure is changing enough to require a new tune,
471 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
472 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
473 */
246ed355
JB
474int iwl_full_rxon_required(struct iwl_priv *priv,
475 struct iwl_rxon_context *ctx)
8ccde88a 476{
246ed355
JB
477 const struct iwl_rxon_cmd *staging = &ctx->staging;
478 const struct iwl_rxon_cmd *active = &ctx->active;
479
480#define CHK(cond) \
481 if ((cond)) { \
482 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
483 return 1; \
484 }
485
486#define CHK_NEQ(c1, c2) \
487 if ((c1) != (c2)) { \
488 IWL_DEBUG_INFO(priv, "need full RXON - " \
489 #c1 " != " #c2 " - %d != %d\n", \
490 (c1), (c2)); \
491 return 1; \
492 }
8ccde88a
SO
493
494 /* These items are only settable from the full RXON command */
246ed355
JB
495 CHK(!iwl_is_associated_ctx(ctx));
496 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
497 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
498 CHK(compare_ether_addr(staging->wlap_bssid_addr,
499 active->wlap_bssid_addr));
500 CHK_NEQ(staging->dev_type, active->dev_type);
501 CHK_NEQ(staging->channel, active->channel);
502 CHK_NEQ(staging->air_propagation, active->air_propagation);
503 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
504 active->ofdm_ht_single_stream_basic_rates);
505 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
506 active->ofdm_ht_dual_stream_basic_rates);
507 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
508 active->ofdm_ht_triple_stream_basic_rates);
509 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO
510
511 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
512 * be updated with the RXON_ASSOC command -- however only some
513 * flag transitions are allowed using RXON_ASSOC */
514
515 /* Check if we are not switching bands */
246ed355
JB
516 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
517 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO
518
519 /* Check if we are switching association toggle */
246ed355
JB
520 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
521 active->filter_flags & RXON_FILTER_ASSOC_MSK);
522
523#undef CHK
524#undef CHK_NEQ
8ccde88a
SO
525
526 return 0;
527}
8ccde88a 528
76d04815
JB
529u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
530 struct iwl_rxon_context *ctx)
8ccde88a 531{
4a02886b
JB
532 /*
533 * Assign the lowest rate -- should really get this from
534 * the beacon skb from mac80211.
535 */
246ed355 536 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO
537 return IWL_RATE_1M_PLCP;
538 else
539 return IWL_RATE_6M_PLCP;
540}
8ccde88a 541
246ed355
JB
542static void _iwl_set_rxon_ht(struct iwl_priv *priv,
543 struct iwl_ht_config *ht_conf,
544 struct iwl_rxon_context *ctx)
47c5196e 545{
246ed355 546 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 547
7e6a5886 548 if (!ctx->ht.enabled) {
a2b0f02e 549 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 550 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 551 RXON_FLG_HT40_PROT_MSK |
42eb7c64 552 RXON_FLG_HT_PROT_MSK);
47c5196e 553 return;
42eb7c64 554 }
47c5196e 555
7e6a5886 556 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG
557 * will be needed for rxon->flags
558 */
7e6a5886 559 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG
560
561 /* Set up channel bandwidth:
7aafef1c 562 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG
563 /* clear the HT channel mode before set the mode */
564 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
565 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 566 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 567 /* pure ht40 */
7e6a5886 568 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 569 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 570 /* Note: control channel is opposite of extension channel */
7e6a5886 571 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG
572 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
573 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
574 break;
575 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
576 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
577 break;
578 }
579 } else {
a2b0f02e 580 /* Note: control channel is opposite of extension channel */
7e6a5886 581 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG
582 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
583 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
584 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
585 break;
586 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
587 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
588 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
589 break;
590 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
591 default:
592 /* channel location only valid if in Mixed mode */
593 IWL_ERR(priv, "invalid extension channel offset\n");
594 break;
595 }
596 }
597 } else {
598 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW
599 }
600
45823531 601 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 602 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 603
02bb1bea 604 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 605 "extension channel offset 0x%x\n",
7e6a5886
JB
606 le32_to_cpu(rxon->flags), ctx->ht.protection,
607 ctx->ht.extension_chan_offset);
47c5196e 608}
246ed355
JB
609
610void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
611{
612 struct iwl_rxon_context *ctx;
613
614 for_each_context(priv, ctx)
615 _iwl_set_rxon_ht(priv, ht_conf, ctx);
616}
47c5196e 617
246ed355 618/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 619u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 620 enum ieee80211_band band)
14023641
AK
621{
622 const struct iwl_channel_info *ch_info;
623 int i;
624 u8 channel = 0;
246ed355
JB
625 u8 min, max;
626 struct iwl_rxon_context *ctx;
14023641 627
14023641 628 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB
629 min = 14;
630 max = priv->channel_count;
14023641 631 } else {
246ed355
JB
632 min = 0;
633 max = 14;
634 }
635
636 for (i = min; i < max; i++) {
637 bool busy = false;
638
639 for_each_context(priv, ctx) {
640 busy = priv->channel_info[i].channel ==
641 le16_to_cpu(ctx->staging.channel);
642 if (busy)
643 break;
14023641 644 }
246ed355
JB
645
646 if (busy)
647 continue;
648
649 channel = priv->channel_info[i].channel;
650 ch_info = iwl_get_channel_info(priv, band, channel);
651 if (is_channel_valid(ch_info))
652 break;
14023641
AK
653 }
654
655 return channel;
656}
14023641 657
bf85ea4f 658/**
3edb5fd6
SZ
659 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
660 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 661
bf85ea4f 662 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 663 * in the staging RXON flag structure based on the ch->band
bf85ea4f 664 */
246ed355
JB
665int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
666 struct iwl_rxon_context *ctx)
bf85ea4f 667{
17e72782 668 enum ieee80211_band band = ch->band;
81e95430 669 u16 channel = ch->hw_value;
17e72782 670
246ed355 671 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK
672 (priv->band == band))
673 return 0;
674
246ed355 675 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 676 if (band == IEEE80211_BAND_5GHZ)
246ed355 677 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 678 else
246ed355 679 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK
680
681 priv->band = band;
682
e1623446 683 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK
684
685 return 0;
686}
bf85ea4f 687
79d07325 688void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 689 struct iwl_rxon_context *ctx,
79d07325
WYG
690 enum ieee80211_band band,
691 struct ieee80211_vif *vif)
8ccde88a
SO
692{
693 if (band == IEEE80211_BAND_5GHZ) {
246ed355 694 ctx->staging.flags &=
8ccde88a
SO
695 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
696 | RXON_FLG_CCK_MSK);
246ed355 697 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO
698 } else {
699 /* Copied from iwl_post_associate() */
c213d745 700 if (vif && vif->bss_conf.use_short_slot)
246ed355 701 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 702 else
246ed355 703 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 704
246ed355
JB
705 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
706 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
707 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO
708 }
709}
8ccde88a
SO
710
711/*
712 * initialize rxon structure with default values from eeprom
713 */
1dda6d28 714void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 715 struct iwl_rxon_context *ctx)
8ccde88a
SO
716{
717 const struct iwl_channel_info *ch_info;
718
246ed355 719 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 720
d0fe478c
JB
721 if (!ctx->vif) {
722 ctx->staging.dev_type = ctx->unused_devtype;
723 } else switch (ctx->vif->type) {
8ccde88a 724 case NL80211_IFTYPE_AP:
d0fe478c 725 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO
726 break;
727
728 case NL80211_IFTYPE_STATION:
d0fe478c 729 ctx->staging.dev_type = ctx->station_devtype;
246ed355 730 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO
731 break;
732
733 case NL80211_IFTYPE_ADHOC:
d0fe478c 734 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB
735 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
736 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO
737 RXON_FILTER_ACCEPT_GRP_MSK;
738 break;
739
8ccde88a 740 default:
d0fe478c
JB
741 IWL_ERR(priv, "Unsupported interface type %d\n",
742 ctx->vif->type);
8ccde88a
SO
743 break;
744 }
745
746#if 0
747 /* TODO: Figure out when short_preamble would be set and cache from
748 * that */
749 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 750 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 751 else
246ed355 752 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO
753#endif
754
755 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 756 le16_to_cpu(ctx->active.channel));
8ccde88a
SO
757
758 if (!ch_info)
759 ch_info = &priv->channel_info[0];
760
246ed355 761 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO
762 priv->band = ch_info->band;
763
d0fe478c 764 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 765
246ed355 766 ctx->staging.ofdm_basic_rates =
8ccde88a 767 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 768 ctx->staging.cck_basic_rates =
8ccde88a
SO
769 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
770
a2b0f02e 771 /* clear both MIX and PURE40 mode flag */
246ed355 772 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 773 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB
774 if (ctx->vif)
775 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 776
246ed355
JB
777 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
778 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
779 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a 780}
8ccde88a 781
79d07325 782void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO
783{
784 const struct ieee80211_supported_band *hw = NULL;
785 struct ieee80211_rate *rate;
246ed355 786 struct iwl_rxon_context *ctx;
8ccde88a
SO
787 int i;
788
789 hw = iwl_get_hw_mode(priv, priv->band);
790 if (!hw) {
791 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
792 return;
793 }
794
795 priv->active_rate = 0;
8ccde88a
SO
796
797 for (i = 0; i < hw->n_bitrates; i++) {
798 rate = &(hw->bitrates[i]);
5027309b 799 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO
800 priv->active_rate |= (1 << rate->hw_value);
801 }
802
4a02886b 803 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 804
246ed355
JB
805 for_each_context(priv, ctx) {
806 ctx->staging.cck_basic_rates =
807 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 808
246ed355
JB
809 ctx->staging.ofdm_basic_rates =
810 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
811 }
8ccde88a 812}
79d07325
WYG
813
814void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
815{
8bd413e6
JB
816 /*
817 * MULTI-FIXME
818 * See iwl_mac_channel_switch.
819 */
820 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
821
79d07325
WYG
822 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
823 return;
824
6f213ff1 825 if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
8bd413e6 826 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325 827}
8ccde88a 828
8ccde88a 829#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB
830void iwl_print_rx_config_cmd(struct iwl_priv *priv,
831 struct iwl_rxon_context *ctx)
8ccde88a 832{
246ed355 833 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 834
e1623446 835 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 836 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW
837 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
838 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
839 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 840 le32_to_cpu(rxon->filter_flags));
e1623446
TW
841 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
842 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 843 rxon->ofdm_basic_rates);
e1623446
TW
844 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
845 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
846 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
847 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 848}
6686d17e 849#endif
e649437f 850
e74fe233
JB
851static void iwlagn_abort_notification_waits(struct iwl_priv *priv)
852{
853 unsigned long flags;
854 struct iwl_notification_wait *wait_entry;
855
856 spin_lock_irqsave(&priv->_agn.notif_wait_lock, flags);
857 list_for_each_entry(wait_entry, &priv->_agn.notif_waits, list)
858 wait_entry->aborted = true;
859 spin_unlock_irqrestore(&priv->_agn.notif_wait_lock, flags);
860
861 wake_up_all(&priv->_agn.notif_waitq);
862}
863
e649437f 864void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
8ccde88a 865{
491bc292
WYG
866 unsigned int reload_msec;
867 unsigned long reload_jiffies;
868
8ccde88a
SO
869 /* Set the FW error flag -- cleared on iwl_down */
870 set_bit(STATUS_FW_ERROR, &priv->status);
871
872 /* Cancel currently queued command. */
873 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
874
e74fe233
JB
875 iwlagn_abort_notification_waits(priv);
876
e649437f
JB
877 /* Keep the restart process from trying to send host
878 * commands by clearing the ready bit */
879 clear_bit(STATUS_READY, &priv->status);
880
881 wake_up_interruptible(&priv->wait_command_queue);
882
883 if (!ondemand) {
884 /*
885 * If firmware keep reloading, then it indicate something
886 * serious wrong and firmware having problem to recover
887 * from it. Instead of keep trying which will fill the syslog
888 * and hang the system, let's just stop it
889 */
890 reload_jiffies = jiffies;
891 reload_msec = jiffies_to_msecs((long) reload_jiffies -
892 (long) priv->reload_jiffies);
893 priv->reload_jiffies = reload_jiffies;
894 if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
895 priv->reload_count++;
896 if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
897 IWL_ERR(priv, "BUG_ON, Stop restarting\n");
898 return;
899 }
900 } else
901 priv->reload_count = 0;
902 }
903
904 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
9d143e9a 905 if (iwlagn_mod_params.restart_fw) {
e649437f
JB
906 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
907 "Restarting adapter due to uCode error.\n");
908 queue_work(priv->workqueue, &priv->restart);
909 } else
910 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
911 "Detected FW error, but not restarting\n");
912 }
913}
914
915/**
916 * iwl_irq_handle_error - called for HW or SW error interrupt from card
917 */
918void iwl_irq_handle_error(struct iwl_priv *priv)
919{
50619ac9
WYG
920 /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
921 if (priv->cfg->internal_wimax_coex &&
922 (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
923 APMS_CLK_VAL_MRB_FUNC_MODE) ||
924 (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
925 APMG_PS_CTRL_VAL_RESET_REQ))) {
50619ac9 926 /*
e649437f
JB
927 * Keep the restart process from trying to send host
928 * commands by clearing the ready bit.
50619ac9
WYG
929 */
930 clear_bit(STATUS_READY, &priv->status);
e649437f
JB
931 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
932 wake_up_interruptible(&priv->wait_command_queue);
50619ac9
WYG
933 IWL_ERR(priv, "RF is used by WiMAX\n");
934 return;
935 }
936
459bc732
SZ
937 IWL_ERR(priv, "Loaded firmware version: %s\n",
938 priv->hw->wiphy->fw_version);
939
3ecccbcd
WYG
940 iwl_dump_nic_error_log(priv);
941 iwl_dump_csr(priv);
942 iwl_dump_fh(priv, NULL, false);
943 iwl_dump_nic_event_log(priv, false, NULL, false);
8ccde88a 944#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 945 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB
946 iwl_print_rx_config_cmd(priv,
947 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO
948#endif
949
e649437f 950 iwlagn_fw_error(priv, false);
8ccde88a 951}
8ccde88a 952
f8e200de 953static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 954{
5220af0c 955 int ret = 0;
d68b603c 956
5220af0c 957 /* stop device's busmaster DMA activity */
d68b603c
AK
958 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
959
5220af0c 960 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 961 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC
962 if (ret)
963 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 964
d68b603c
AK
965 IWL_DEBUG_INFO(priv, "stop master\n");
966
5220af0c 967 return ret;
d68b603c 968}
d68b603c
AK
969
970void iwl_apm_stop(struct iwl_priv *priv)
971{
fadb3582
BC
972 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
973
9d39e5ba
JB
974 clear_bit(STATUS_DEVICE_ENABLED, &priv->status);
975
5220af0c 976 /* Stop device's DMA activity */
d68b603c
AK
977 iwl_apm_stop_master(priv);
978
5220af0c 979 /* Reset the entire device */
d68b603c
AK
980 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
981
982 udelay(10);
5220af0c
BC
983
984 /*
985 * Clear "initialization complete" bit to move adapter from
986 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
987 */
d68b603c 988 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c 989}
d68b603c 990
fadb3582
BC
991
992/*
993 * Start up NIC's basic functionality after it has been reset
994 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
995 * NOTE: This does not load uCode nor start the embedded processor
996 */
997int iwl_apm_init(struct iwl_priv *priv)
998{
999 int ret = 0;
fadb3582
BC
1000 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1001
1002 /*
1003 * Use "set_bit" below rather than "write", to preserve any hardware
1004 * bits already set by default after reset.
1005 */
1006
1007 /* Disable L0S exit timer (platform NMI Work/Around) */
1008 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1009 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1010
1011 /*
1012 * Disable L0s without affecting L1;
1013 * don't wait for ICH L0s (ICH bug W/A)
1014 */
1015 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1016 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1017
1018 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1019 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1020
1021 /*
1022 * Enable HAP INTA (interrupt from management bus) to
1023 * wake device's PCI Express link L1a -> L0s
fadb3582
BC
1024 */
1025 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1026 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1027
d57fa99d 1028 priv->bus.ops->apm_config(&priv->bus);
fadb3582
BC
1029
1030 /* Configure analog phase-lock-loop before activating to D0A */
7cb1b088
WYG
1031 if (priv->cfg->base_params->pll_cfg_val)
1032 iwl_set_bit(priv, CSR_ANA_PLL_CFG,
1033 priv->cfg->base_params->pll_cfg_val);
fadb3582
BC
1034
1035 /*
1036 * Set "initialization complete" bit to move adapter from
1037 * D0U* --> D0A* (powered-up active) state.
1038 */
1039 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1040
1041 /*
1042 * Wait for clock stabilization; once stabilized, access to
1043 * device-internal resources is supported, e.g. iwl_write_prph()
1044 * and accesses to uCode SRAM.
1045 */
1046 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1047 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1048 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1049 if (ret < 0) {
1050 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1051 goto out;
1052 }
1053
1054 /*
917b6777 1055 * Enable DMA clock and wait for it to stabilize.
fadb3582
BC
1056 *
1057 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1058 * do not disable clocks. This preserves any hardware bits already
1059 * set by default in "CLK_CTRL_REG" after reset.
1060 */
917b6777 1061 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
fadb3582
BC
1062 udelay(20);
1063
1064 /* Disable L1-Active */
1065 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1066 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1067
9d39e5ba
JB
1068 set_bit(STATUS_DEVICE_ENABLED, &priv->status);
1069
fadb3582
BC
1070out:
1071 return ret;
1072}
fadb3582
BC
1073
1074
630fe9b6
TW
1075int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1076{
a25a66ac
SG
1077 int ret;
1078 s8 prev_tx_power;
f844a709
SG
1079 bool defer;
1080 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
a25a66ac
SG
1081
1082 lockdep_assert_held(&priv->mutex);
1083
1084 if (priv->tx_power_user_lmt == tx_power && !force)
1085 return 0;
1086
b744cb79
WYG
1087 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1088 IWL_WARN(priv,
1089 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1090 tx_power,
b744cb79 1091 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW
1092 return -EINVAL;
1093 }
1094
dc1b0973 1095 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG
1096 IWL_WARN(priv,
1097 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1098 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW
1099 return -EINVAL;
1100 }
1101
a25a66ac
SG
1102 if (!iwl_is_ready_rf(priv))
1103 return -EIO;
630fe9b6 1104
f844a709
SG
1105 /* scan complete and commit_rxon use tx_power_next value,
1106 * it always need to be updated for newest request */
a25a66ac 1107 priv->tx_power_next = tx_power;
f844a709
SG
1108
1109 /* do not set tx power when scanning or channel changing */
1110 defer = test_bit(STATUS_SCANNING, &priv->status) ||
1111 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
1112 if (defer && !force) {
1113 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
a25a66ac 1114 return 0;
5eadd94b 1115 }
630fe9b6 1116
a25a66ac
SG
1117 prev_tx_power = priv->tx_power_user_lmt;
1118 priv->tx_power_user_lmt = tx_power;
1119
5beaaf37 1120 ret = iwlagn_send_tx_power(priv);
a25a66ac
SG
1121
1122 /* if fail to set tx_power, restore the orig. tx power */
1123 if (ret) {
1124 priv->tx_power_user_lmt = prev_tx_power;
1125 priv->tx_power_next = prev_tx_power;
1126 }
630fe9b6
TW
1127 return ret;
1128}
630fe9b6 1129
65b52bde 1130void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO
1131{
1132 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG
1133 .lead_time = BT_LEAD_TIME_DEF,
1134 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO
1135 .kill_ack_mask = 0,
1136 .kill_cts_mask = 0,
1137 };
1138
b60eec9b 1139 if (!iwlagn_mod_params.bt_coex_active)
06702a73
WYG
1140 bt_cmd.flags = BT_COEX_DISABLE;
1141 else
1142 bt_cmd.flags = BT_COEX_ENABLE;
1143
f21dd005 1144 priv->bt_enable_flag = bt_cmd.flags;
06702a73
WYG
1145 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1146 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1147
65b52bde
JB
1148 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1149 sizeof(struct iwl_bt_cmd), &bt_cmd))
1150 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd 1151}
17f841cd 1152
ef8d5529 1153int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1154{
ef8d5529
WYG
1155 struct iwl_statistics_cmd statistics_cmd = {
1156 .configuration_flags =
1157 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1158 };
ef8d5529
WYG
1159
1160 if (flags & CMD_ASYNC)
1161 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1162 sizeof(struct iwl_statistics_cmd),
1163 &statistics_cmd, NULL);
1164 else
1165 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1166 sizeof(struct iwl_statistics_cmd),
1167 &statistics_cmd);
49ea8596 1168}
7e8c519e 1169
a83b9141
WYG
1170void iwl_clear_isr_stats(struct iwl_priv *priv)
1171{
1172 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1173}
a83b9141 1174
488829f1
AK
1175int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1176 const struct ieee80211_tx_queue_params *params)
1177{
1178 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1179 struct iwl_rxon_context *ctx;
488829f1
AK
1180 unsigned long flags;
1181 int q;
1182
1183 IWL_DEBUG_MAC80211(priv, "enter\n");
1184
1185 if (!iwl_is_ready_rf(priv)) {
1186 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1187 return -EIO;
1188 }
1189
1190 if (queue >= AC_NUM) {
1191 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1192 return 0;
1193 }
1194
1195 q = AC_NUM - 1 - queue;
1196
1197 spin_lock_irqsave(&priv->lock, flags);
1198
8dfdb9d5
JB
1199 /*
1200 * MULTI-FIXME
1201 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1202 */
1203 for_each_context(priv, ctx) {
1204 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1205 cpu_to_le16(params->cw_min);
1206 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1207 cpu_to_le16(params->cw_max);
1208 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1209 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1210 cpu_to_le16((params->txop * 32));
1211
1212 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1213 }
488829f1
AK
1214
1215 spin_unlock_irqrestore(&priv->lock, flags);
1216
1217 IWL_DEBUG_MAC80211(priv, "leave\n");
1218 return 0;
1219}
5bbe233b 1220
a85d7cca
JB
1221int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1222{
1223 struct iwl_priv *priv = hw->priv;
1224
1225 return priv->ibss_manager == IWL_IBSS_MANAGER;
1226}
a85d7cca 1227
d4daaea6 1228static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
727882d6 1229{
d0fe478c 1230 iwl_connection_init_rx_config(priv, ctx);
727882d6
AK
1231
1232 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1233 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1234
805a3b81 1235 return iwlagn_commit_rxon(priv, ctx);
727882d6 1236}
727882d6 1237
d4daaea6
JB
1238static int iwl_setup_interface(struct iwl_priv *priv,
1239 struct iwl_rxon_context *ctx)
1240{
1241 struct ieee80211_vif *vif = ctx->vif;
1242 int err;
1243
1244 lockdep_assert_held(&priv->mutex);
1245
1246 /*
1247 * This variable will be correct only when there's just
1248 * a single context, but all code using it is for hardware
1249 * that supports only one context.
1250 */
1251 priv->iw_mode = vif->type;
1252
1253 ctx->is_active = true;
1254
1255 err = iwl_set_mode(priv, ctx);
1256 if (err) {
1257 if (!ctx->always_active)
1258 ctx->is_active = false;
1259 return err;
1260 }
1261
1262 if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
1263 vif->type == NL80211_IFTYPE_ADHOC) {
1264 /*
1265 * pretend to have high BT traffic as long as we
1266 * are operating in IBSS mode, as this will cause
1267 * the rate scaling etc. to behave as intended.
1268 */
1269 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1270 }
1271
1272 return 0;
1273}
1274
b55e75ed 1275int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK
1276{
1277 struct iwl_priv *priv = hw->priv;
246ed355 1278 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
d0fe478c 1279 struct iwl_rxon_context *tmp, *ctx = NULL;
d4daaea6 1280 int err;
f35c0c56 1281 enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
cbb6ab94 1282
3779db10 1283 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
f35c0c56 1284 viftype, vif->addr);
cbb6ab94 1285
47e28f41
JB
1286 mutex_lock(&priv->mutex);
1287
4bd530f3
SG
1288 if (!iwl_is_ready_rf(priv)) {
1289 IWL_WARN(priv, "Try to add interface when device not ready\n");
b55e75ed
JB
1290 err = -EINVAL;
1291 goto out;
1292 }
1293
d0fe478c
JB
1294 for_each_context(priv, tmp) {
1295 u32 possible_modes =
1296 tmp->interface_modes | tmp->exclusive_interface_modes;
1297
1298 if (tmp->vif) {
1299 /* check if this busy context is exclusive */
1300 if (tmp->exclusive_interface_modes &
1301 BIT(tmp->vif->type)) {
1302 err = -EINVAL;
1303 goto out;
1304 }
1305 continue;
1306 }
1307
f35c0c56 1308 if (!(possible_modes & BIT(viftype)))
d0fe478c
JB
1309 continue;
1310
1311 /* have maybe usable context w/o interface */
1312 ctx = tmp;
1313 break;
1314 }
1315
1316 if (!ctx) {
47e28f41
JB
1317 err = -EOPNOTSUPP;
1318 goto out;
cbb6ab94
AK
1319 }
1320
d0fe478c 1321 vif_priv->ctx = ctx;
8bd413e6 1322 ctx->vif = vif;
59079949 1323
d4daaea6
JB
1324 err = iwl_setup_interface(priv, ctx);
1325 if (!err)
1326 goto out;
cbb6ab94 1327
8bd413e6 1328 ctx->vif = NULL;
b55e75ed 1329 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1330 out:
cbb6ab94
AK
1331 mutex_unlock(&priv->mutex);
1332
1333 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1334 return err;
cbb6ab94 1335}
cbb6ab94 1336
d4daaea6
JB
1337static void iwl_teardown_interface(struct iwl_priv *priv,
1338 struct ieee80211_vif *vif,
1339 bool mode_change)
d8052319 1340{
246ed355 1341 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
d8052319 1342
d4daaea6 1343 lockdep_assert_held(&priv->mutex);
d0fe478c 1344
e7e16b90
SG
1345 if (priv->scan_vif == vif) {
1346 iwl_scan_cancel_timeout(priv, 200);
1347 iwl_force_scan_end(priv);
1348 }
8bd413e6 1349
d4daaea6
JB
1350 if (!mode_change) {
1351 iwl_set_mode(priv, ctx);
1352 if (!ctx->always_active)
1353 ctx->is_active = false;
1354 }
763cc3bf 1355
59079949
JB
1356 /*
1357 * When removing the IBSS interface, overwrite the
1358 * BT traffic load with the stored one from the last
1359 * notification, if any. If this is a device that
1360 * doesn't implement this, this has no effect since
1361 * both values are the same and zero.
1362 */
1363 if (vif->type == NL80211_IFTYPE_ADHOC)
66e863a5 1364 priv->bt_traffic_load = priv->last_bt_traffic_load;
d4daaea6
JB
1365}
1366
1367void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1368 struct ieee80211_vif *vif)
1369{
1370 struct iwl_priv *priv = hw->priv;
1371 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1372
1373 IWL_DEBUG_MAC80211(priv, "enter\n");
1374
1375 mutex_lock(&priv->mutex);
1376
1377 WARN_ON(ctx->vif != vif);
1378 ctx->vif = NULL;
1379
1380 iwl_teardown_interface(priv, vif, false);
59079949 1381
d8052319
AK
1382 mutex_unlock(&priv->mutex);
1383
1384 IWL_DEBUG_MAC80211(priv, "leave\n");
1385
1386}
d8052319 1387
88804e2b
WYG
1388int iwl_alloc_txq_mem(struct iwl_priv *priv)
1389{
1390 if (!priv->txq)
1391 priv->txq = kzalloc(
7cb1b088
WYG
1392 sizeof(struct iwl_tx_queue) *
1393 priv->cfg->base_params->num_of_queues,
88804e2b
WYG
1394 GFP_KERNEL);
1395 if (!priv->txq) {
91dd6c27 1396 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG
1397 return -ENOMEM;
1398 }
1399 return 0;
1400}
88804e2b
WYG
1401
1402void iwl_free_txq_mem(struct iwl_priv *priv)
1403{
1404 kfree(priv->txq);
1405 priv->txq = NULL;
1406}
88804e2b 1407
20594eb0
WYG
1408#ifdef CONFIG_IWLWIFI_DEBUGFS
1409
1410#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
1411
1412void iwl_reset_traffic_log(struct iwl_priv *priv)
1413{
1414 priv->tx_traffic_idx = 0;
1415 priv->rx_traffic_idx = 0;
1416 if (priv->tx_traffic)
1417 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1418 if (priv->rx_traffic)
1419 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
1420}
1421
1422int iwl_alloc_traffic_mem(struct iwl_priv *priv)
1423{
1424 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1425
1426 if (iwl_debug_level & IWL_DL_TX) {
1427 if (!priv->tx_traffic) {
1428 priv->tx_traffic =
1429 kzalloc(traffic_size, GFP_KERNEL);
1430 if (!priv->tx_traffic)
1431 return -ENOMEM;
1432 }
1433 }
1434 if (iwl_debug_level & IWL_DL_RX) {
1435 if (!priv->rx_traffic) {
1436 priv->rx_traffic =
1437 kzalloc(traffic_size, GFP_KERNEL);
1438 if (!priv->rx_traffic)
1439 return -ENOMEM;
1440 }
1441 }
1442 iwl_reset_traffic_log(priv);
1443 return 0;
1444}
20594eb0
WYG
1445
1446void iwl_free_traffic_mem(struct iwl_priv *priv)
1447{
1448 kfree(priv->tx_traffic);
1449 priv->tx_traffic = NULL;
1450
1451 kfree(priv->rx_traffic);
1452 priv->rx_traffic = NULL;
1453}
20594eb0
WYG
1454
1455void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1456 u16 length, struct ieee80211_hdr *header)
1457{
1458 __le16 fc;
1459 u16 len;
1460
1461 if (likely(!(iwl_debug_level & IWL_DL_TX)))
1462 return;
1463
1464 if (!priv->tx_traffic)
1465 return;
1466
1467 fc = header->frame_control;
1468 if (ieee80211_is_data(fc)) {
1469 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1470 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1471 memcpy((priv->tx_traffic +
1472 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1473 header, len);
1474 priv->tx_traffic_idx =
1475 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1476 }
1477}
20594eb0
WYG
1478
1479void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1480 u16 length, struct ieee80211_hdr *header)
1481{
1482 __le16 fc;
1483 u16 len;
1484
1485 if (likely(!(iwl_debug_level & IWL_DL_RX)))
1486 return;
1487
1488 if (!priv->rx_traffic)
1489 return;
1490
1491 fc = header->frame_control;
1492 if (ieee80211_is_data(fc)) {
1493 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1494 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1495 memcpy((priv->rx_traffic +
1496 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1497 header, len);
1498 priv->rx_traffic_idx =
1499 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1500 }
1501}
22fdf3c9
WYG
1502
1503const char *get_mgmt_string(int cmd)
1504{
1505 switch (cmd) {
1506 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1507 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1508 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1509 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1510 IWL_CMD(MANAGEMENT_PROBE_REQ);
1511 IWL_CMD(MANAGEMENT_PROBE_RESP);
1512 IWL_CMD(MANAGEMENT_BEACON);
1513 IWL_CMD(MANAGEMENT_ATIM);
1514 IWL_CMD(MANAGEMENT_DISASSOC);
1515 IWL_CMD(MANAGEMENT_AUTH);
1516 IWL_CMD(MANAGEMENT_DEAUTH);
1517 IWL_CMD(MANAGEMENT_ACTION);
1518 default:
1519 return "UNKNOWN";
1520
1521 }
1522}
1523
1524const char *get_ctrl_string(int cmd)
1525{
1526 switch (cmd) {
1527 IWL_CMD(CONTROL_BACK_REQ);
1528 IWL_CMD(CONTROL_BACK);
1529 IWL_CMD(CONTROL_PSPOLL);
1530 IWL_CMD(CONTROL_RTS);
1531 IWL_CMD(CONTROL_CTS);
1532 IWL_CMD(CONTROL_ACK);
1533 IWL_CMD(CONTROL_CFEND);
1534 IWL_CMD(CONTROL_CFENDACK);
1535 default:
1536 return "UNKNOWN";
1537
1538 }
1539}
1540
7163b8a4 1541void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG
1542{
1543 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9
WYG
1544 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
1545}
1546
1547/*
1548 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1549 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1550 * Use debugFs to display the rx/rx_statistics
1551 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1552 * information will be recorded, but DATA pkt still will be recorded
1553 * for the reason of iwl_led.c need to control the led blinking based on
1554 * number of tx and rx data.
1555 *
1556 */
1557void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1558{
1559 struct traffic_stats *stats;
1560
1561 if (is_tx)
1562 stats = &priv->tx_stats;
1563 else
1564 stats = &priv->rx_stats;
1565
1566 if (ieee80211_is_mgmt(fc)) {
1567 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1568 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1569 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1570 break;
1571 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1572 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1573 break;
1574 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1575 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1576 break;
1577 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1578 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1579 break;
1580 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1581 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1582 break;
1583 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1584 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1585 break;
1586 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1587 stats->mgmt[MANAGEMENT_BEACON]++;
1588 break;
1589 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1590 stats->mgmt[MANAGEMENT_ATIM]++;
1591 break;
1592 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1593 stats->mgmt[MANAGEMENT_DISASSOC]++;
1594 break;
1595 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1596 stats->mgmt[MANAGEMENT_AUTH]++;
1597 break;
1598 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1599 stats->mgmt[MANAGEMENT_DEAUTH]++;
1600 break;
1601 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1602 stats->mgmt[MANAGEMENT_ACTION]++;
1603 break;
1604 }
1605 } else if (ieee80211_is_ctl(fc)) {
1606 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1607 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1608 stats->ctrl[CONTROL_BACK_REQ]++;
1609 break;
1610 case cpu_to_le16(IEEE80211_STYPE_BACK):
1611 stats->ctrl[CONTROL_BACK]++;
1612 break;
1613 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1614 stats->ctrl[CONTROL_PSPOLL]++;
1615 break;
1616 case cpu_to_le16(IEEE80211_STYPE_RTS):
1617 stats->ctrl[CONTROL_RTS]++;
1618 break;
1619 case cpu_to_le16(IEEE80211_STYPE_CTS):
1620 stats->ctrl[CONTROL_CTS]++;
1621 break;
1622 case cpu_to_le16(IEEE80211_STYPE_ACK):
1623 stats->ctrl[CONTROL_ACK]++;
1624 break;
1625 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1626 stats->ctrl[CONTROL_CFEND]++;
1627 break;
1628 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1629 stats->ctrl[CONTROL_CFENDACK]++;
1630 break;
1631 }
1632 } else {
1633 /* data */
1634 stats->data_cnt++;
1635 stats->data_bytes += len;
1636 }
1637}
20594eb0
WYG
1638#endif
1639
a93e7973 1640static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG
1641{
1642 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1643 return;
1644
246ed355 1645 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG
1646 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1647 return;
1648 }
1649 /*
1650 * There is no easy and better way to force reset the radio,
1651 * the only known method is switching channel which will force to
1652 * reset and tune the radio.
1653 * Use internal short scan (single channel) operation to should
1654 * achieve this objective.
1655 * Driver should reset the radio when number of consecutive missed
1656 * beacon, or any other uCode error condition detected.
1657 */
1658 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1659 iwl_internal_short_hw_scan(priv);
afbdd69a 1660}
a93e7973 1661
a93e7973 1662
c04f9f22 1663int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 1664{
8a472da4
WYG
1665 struct iwl_force_reset *force_reset;
1666
a93e7973
WYG
1667 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1668 return -EINVAL;
1669
8a472da4
WYG
1670 if (mode >= IWL_MAX_FORCE_RESET) {
1671 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1672 return -EINVAL;
1673 }
1674 force_reset = &priv->force_reset[mode];
1675 force_reset->reset_request_count++;
c04f9f22
WYG
1676 if (!external) {
1677 if (force_reset->last_force_reset_jiffies &&
1678 time_after(force_reset->last_force_reset_jiffies +
1679 force_reset->reset_duration, jiffies)) {
1680 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1681 force_reset->reset_reject_count++;
1682 return -EAGAIN;
1683 }
a93e7973 1684 }
8a472da4
WYG
1685 force_reset->reset_success_count++;
1686 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 1687 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG
1688 switch (mode) {
1689 case IWL_RF_RESET:
1690 iwl_force_rf_reset(priv);
1691 break;
1692 case IWL_FW_RESET:
c04f9f22
WYG
1693 /*
1694 * if the request is from external(ex: debugfs),
1695 * then always perform the request in regardless the module
1696 * parameter setting
1697 * if the request is from internal (uCode error or driver
1698 * detect failure), then fw_restart module parameter
1699 * need to be check before performing firmware reload
1700 */
9d143e9a 1701 if (!external && !iwlagn_mod_params.restart_fw) {
c04f9f22
WYG
1702 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1703 "module parameter setting\n");
1704 break;
1705 }
a93e7973 1706 IWL_ERR(priv, "On demand firmware reload\n");
e649437f 1707 iwlagn_fw_error(priv, true);
a93e7973 1708 break;
a93e7973 1709 }
a93e7973
WYG
1710 return 0;
1711}
b74e31a9 1712
d4daaea6
JB
1713int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1714 enum nl80211_iftype newtype, bool newp2p)
1715{
1716 struct iwl_priv *priv = hw->priv;
1717 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
ebf8dc80 1718 struct iwl_rxon_context *bss_ctx = &priv->contexts[IWL_RXON_CTX_BSS];
d4daaea6
JB
1719 struct iwl_rxon_context *tmp;
1720 u32 interface_modes;
1721 int err;
1722
1723 newtype = ieee80211_iftype_p2p(newtype, newp2p);
1724
1725 mutex_lock(&priv->mutex);
1726
a2b76b3b
JB
1727 if (!ctx->vif || !iwl_is_ready_rf(priv)) {
1728 /*
1729 * Huh? But wait ... this can maybe happen when
1730 * we're in the middle of a firmware restart!
1731 */
1732 err = -EBUSY;
1733 goto out;
1734 }
1735
d4daaea6
JB
1736 interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
1737
1738 if (!(interface_modes & BIT(newtype))) {
1739 err = -EBUSY;
1740 goto out;
1741 }
1742
ebf8dc80
JB
1743 /*
1744 * Refuse a change that should be done by moving from the PAN
1745 * context to the BSS context instead, if the BSS context is
1746 * available and can support the new interface type.
1747 */
1748 if (ctx->ctxid == IWL_RXON_CTX_PAN && !bss_ctx->vif &&
1749 (bss_ctx->interface_modes & BIT(newtype) ||
1750 bss_ctx->exclusive_interface_modes & BIT(newtype))) {
1751 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
1752 err = -EBUSY;
1753 goto out;
1754 }
1755
d4daaea6
JB
1756 if (ctx->exclusive_interface_modes & BIT(newtype)) {
1757 for_each_context(priv, tmp) {
1758 if (ctx == tmp)
1759 continue;
1760
1761 if (!tmp->vif)
1762 continue;
1763
1764 /*
1765 * The current mode switch would be exclusive, but
1766 * another context is active ... refuse the switch.
1767 */
1768 err = -EBUSY;
1769 goto out;
1770 }
1771 }
1772
1773 /* success */
1774 iwl_teardown_interface(priv, vif, true);
1775 vif->type = newtype;
a2b76b3b 1776 vif->p2p = newp2p;
d4daaea6
JB
1777 err = iwl_setup_interface(priv, ctx);
1778 WARN_ON(err);
1779 /*
1780 * We've switched internally, but submitting to the
1781 * device may have failed for some reason. Mask this
1782 * error, because otherwise mac80211 will not switch
1783 * (and set the interface type back) and we'll be
1784 * out of sync with it.
1785 */
1786 err = 0;
1787
1788 out:
1789 mutex_unlock(&priv->mutex);
1790 return err;
1791}
d4daaea6 1792
b74e31a9 1793/*
22de94de
SG
1794 * On every watchdog tick we check (latest) time stamp. If it does not
1795 * change during timeout period and queue is not empty we reset firmware.
b74e31a9 1796 */
b74e31a9
WYG
1797static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
1798{
22de94de
SG
1799 struct iwl_tx_queue *txq = &priv->txq[cnt];
1800 struct iwl_queue *q = &txq->q;
1801 unsigned long timeout;
1802 int ret;
b74e31a9 1803
22de94de
SG
1804 if (q->read_ptr == q->write_ptr) {
1805 txq->time_stamp = jiffies;
7cb1b088 1806 return 0;
22de94de 1807 }
7cb1b088 1808
22de94de
SG
1809 timeout = txq->time_stamp +
1810 msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
1811
1812 if (time_after(jiffies, timeout)) {
1813 IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
1814 q->id, priv->cfg->base_params->wd_timeout);
1815 ret = iwl_force_reset(priv, IWL_FW_RESET, false);
1816 return (ret == -EAGAIN) ? 0 : 1;
b74e31a9 1817 }
22de94de 1818
b74e31a9
WYG
1819 return 0;
1820}
1821
22de94de
SG
1822/*
1823 * Making watchdog tick be a quarter of timeout assure we will
1824 * discover the queue hung between timeout and 1.25*timeout
1825 */
1826#define IWL_WD_TICK(timeout) ((timeout) / 4)
1827
1828/*
1829 * Watchdog timer callback, we check each tx queue for stuck, if if hung
1830 * we reset the firmware. If everything is fine just rearm the timer.
1831 */
1832void iwl_bg_watchdog(unsigned long data)
b74e31a9
WYG
1833{
1834 struct iwl_priv *priv = (struct iwl_priv *)data;
1835 int cnt;
22de94de 1836 unsigned long timeout;
b74e31a9
WYG
1837
1838 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1839 return;
1840
22de94de
SG
1841 timeout = priv->cfg->base_params->wd_timeout;
1842 if (timeout == 0)
1843 return;
1844
b74e31a9 1845 /* monitor and check for stuck cmd queue */
13bb9483 1846 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG
1847 return;
1848
1849 /* monitor and check for other stuck queues */
246ed355 1850 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG
1851 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
1852 /* skip as we already checked the command queue */
13bb9483 1853 if (cnt == priv->cmd_queue)
b74e31a9
WYG
1854 continue;
1855 if (iwl_check_stuck_queue(priv, cnt))
1856 return;
1857 }
1858 }
22de94de
SG
1859
1860 mod_timer(&priv->watchdog, jiffies +
1861 msecs_to_jiffies(IWL_WD_TICK(timeout)));
b74e31a9 1862}
22de94de
SG
1863
1864void iwl_setup_watchdog(struct iwl_priv *priv)
1865{
1866 unsigned int timeout = priv->cfg->base_params->wd_timeout;
afbdd69a 1867
22de94de
SG
1868 if (timeout)
1869 mod_timer(&priv->watchdog,
1870 jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
1871 else
1872 del_timer(&priv->watchdog);
1873}
a0ee74cf
WYG
1874
1875/*
1876 * extended beacon time format
1877 * time in usec will be changed into a 32-bit value in extended:internal format
1878 * the extended part is the beacon counts
1879 * the internal part is the time in usec within one beacon interval
1880 */
1881u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1882{
1883 u32 quot;
1884 u32 rem;
1885 u32 interval = beacon_interval * TIME_UNIT;
1886
1887 if (!interval || !usec)
1888 return 0;
1889
1890 quot = (usec / interval) &
1891 (iwl_beacon_time_mask_high(priv,
1892 priv->hw_params.beacon_time_tsf_bits) >>
1893 priv->hw_params.beacon_time_tsf_bits);
1894 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
1895 priv->hw_params.beacon_time_tsf_bits);
1896
1897 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
1898}
a0ee74cf
WYG
1899
1900/* base is usually what we get from ucode with each received frame,
1901 * the same as HW timer counter counting down
1902 */
1903__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1904 u32 addon, u32 beacon_interval)
1905{
1906 u32 base_low = base & iwl_beacon_time_mask_low(priv,
1907 priv->hw_params.beacon_time_tsf_bits);
1908 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
1909 priv->hw_params.beacon_time_tsf_bits);
1910 u32 interval = beacon_interval * TIME_UNIT;
1911 u32 res = (base & iwl_beacon_time_mask_high(priv,
1912 priv->hw_params.beacon_time_tsf_bits)) +
1913 (addon & iwl_beacon_time_mask_high(priv,
1914 priv->hw_params.beacon_time_tsf_bits));
1915
1916 if (base_low > addon_low)
1917 res += base_low - addon_low;
1918 else if (base_low < addon_low) {
1919 res += interval + base_low - addon_low;
1920 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1921 } else
1922 res += (1 << priv->hw_params.beacon_time_tsf_bits);
1923
1924 return cpu_to_le32(res);
1925}
a0ee74cf 1926
6da3a13e
WYG
1927#ifdef CONFIG_PM
1928
48d1a211 1929int iwl_suspend(struct iwl_priv *priv)
6da3a13e 1930{
6da3a13e
WYG
1931 /*
1932 * This function is called when system goes into suspend state
1933 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
1934 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1935 * it will not call apm_ops.stop() to stop the DMA operation.
1936 * Calling apm_ops.stop here to make sure we stop the DMA.
1937 */
14e8e4af 1938 iwl_apm_stop(priv);
6da3a13e 1939
6da3a13e
WYG
1940 return 0;
1941}
6da3a13e 1942
48d1a211 1943int iwl_resume(struct iwl_priv *priv)
6da3a13e 1944{
0ab84cff 1945 bool hw_rfkill = false;
6da3a13e 1946
6da3a13e
WYG
1947 iwl_enable_interrupts(priv);
1948
0ab84cff
JB
1949 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1950 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1951 hw_rfkill = true;
1952
1953 if (hw_rfkill)
1954 set_bit(STATUS_RF_KILL_HW, &priv->status);
1955 else
1956 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1957
1958 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
1959
6da3a13e
WYG
1960 return 0;
1961}
6da3a13e
WYG
1962
1963#endif /* CONFIG_PM */
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