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iwlwifi: remove superfluous channel check
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
1d0a082d 33#include <net/mac80211.h>
df48c323 34
6bc913bd 35#include "iwl-eeprom.h"
3e0d4cb1 36#include "iwl-dev.h" /* FIXME: remove */
19335774 37#include "iwl-debug.h"
df48c323 38#include "iwl-core.h"
b661c819 39#include "iwl-io.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
ef850d7c 42#include "iwl-helpers.h"
df48c323 43
1d0a082d 44
df48c323
TW		 45MODULE_DESCRIPTION("iwl core");
46MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 47MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 48MODULE_LICENSE("GPL");
df48c323 49
06702a73
WYG		 50/*
51 * set bt_coex_active to true, uCode will do kill/defer
52 * every time the priority line is asserted (BT is sending signals on the
53 * priority line in the PCIx).
54 * set bt_coex_active to false, uCode will ignore the BT activity and
55 * perform the normal operation
56 *
57 * User might experience transmit issue on some platform due to WiFi/BT
58 * co-exist problem. The possible behaviors are:
59 * Able to scan and finding all the available AP
60 * Not able to associate with any AP
61 * On those platforms, WiFi communication can be restored by set
62 * "bt_coex_active" module parameter to "false"
63 *
64 * default: bt_coex_active = true (BT_COEX_ENABLE)
65 */
66static bool bt_coex_active = true;
67module_param(bt_coex_active, bool, S_IRUGO);
68MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist\n");
69
1933ac4d
WYG		 70static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
71 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
72 0, COEX_UNASSOC_IDLE_FLAGS},
73 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
74 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
75 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
76 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
77 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
78 0, COEX_CALIBRATION_FLAGS},
79 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
80 0, COEX_PERIODIC_CALIBRATION_FLAGS},
81 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
82 0, COEX_CONNECTION_ESTAB_FLAGS},
83 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
84 0, COEX_ASSOCIATED_IDLE_FLAGS},
85 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
86 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
87 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
88 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
89 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
90 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
91 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
92 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
93 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
94 0, COEX_STAND_ALONE_DEBUG_FLAGS},
95 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
96 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
97 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
98 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
99};
100
c7de35cd
RR		 101#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
102 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
103 IWL_RATE_SISO_##s##M_PLCP, \
104 IWL_RATE_MIMO2_##s##M_PLCP,\
105 IWL_RATE_MIMO3_##s##M_PLCP,\
106 IWL_RATE_##r##M_IEEE, \
107 IWL_RATE_##ip##M_INDEX, \
108 IWL_RATE_##in##M_INDEX, \
109 IWL_RATE_##rp##M_INDEX, \
110 IWL_RATE_##rn##M_INDEX, \
111 IWL_RATE_##pp##M_INDEX, \
112 IWL_RATE_##np##M_INDEX }
113
a562a9dd
RC		 114u32 iwl_debug_level;
115EXPORT_SYMBOL(iwl_debug_level);
116
c7de35cd
RR		 117/*
118 * Parameter order:
119 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
120 *
121 * If there isn't a valid next or previous rate then INV is used which
122 * maps to IWL_RATE_INVALID
123 *
124 */
1826dcc0 125const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 126 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
127 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
128 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
129 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
130 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
131 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
132 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
133 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
134 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
135 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
136 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
137 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
138 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
139 /* FIXME:RS: ^^ should be INV (legacy) */
140};
1826dcc0 141EXPORT_SYMBOL(iwl_rates);
c7de35cd 142
e7d326ac
TW		 143/**
144 * translate ucode response to mac80211 tx status control values
145 */
146void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 147 struct ieee80211_tx_info *info)
e7d326ac 148{
e6a9854b 149 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 150
e6a9854b 151 info->antenna_sel_tx =
e7d326ac
TW		 152 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
153 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 154 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 155 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 156 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
7aafef1c 157 if (rate_n_flags & RATE_MCS_HT40_MSK)
e6a9854b 158 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 159 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 160 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 161 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 162 r->flags |= IEEE80211_TX_RC_SHORT_GI;
31513be8 163 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
e7d326ac
TW		 164}
165EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
166
167int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
168{
169 int idx = 0;
170
171 /* HT rate format */
172 if (rate_n_flags & RATE_MCS_HT_MSK) {
173 idx = (rate_n_flags & 0xff);
174
60d32215
DH		 175 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
176 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
177 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 178 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
179
180 idx += IWL_FIRST_OFDM_RATE;
181 /* skip 9M not supported in ht*/
182 if (idx >= IWL_RATE_9M_INDEX)
183 idx += 1;
184 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
185 return idx;
186
187 /* legacy rate format, search for match in table */
188 } else {
189 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
190 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
191 return idx;
192 }
193
194 return -1;
195}
196EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
197
31513be8
DH		 198int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
199{
200 int idx = 0;
201 int band_offset = 0;
202
203 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
204 if (rate_n_flags & RATE_MCS_HT_MSK) {
205 idx = (rate_n_flags & 0xff);
206 return idx;
207 /* Legacy rate format, search for match in table */
208 } else {
209 if (band == IEEE80211_BAND_5GHZ)
210 band_offset = IWL_FIRST_OFDM_RATE;
211 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
212 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
213 return idx - band_offset;
214 }
215
216 return -1;
217}
218
76eff18b
TW		 219u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
220{
221 int i;
222 u8 ind = ant;
223 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
224 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
225 if (priv->hw_params.valid_tx_ant & BIT(ind))
226 return ind;
227 }
228 return ant;
229}
47ff65c4 230EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 231
232const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
233EXPORT_SYMBOL(iwl_bcast_addr);
234
235
1d0a082d
AK		 236/* This function both allocates and initializes hw and priv. */
237struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
238 struct ieee80211_ops *hw_ops)
239{
240 struct iwl_priv *priv;
241
242 /* mac80211 allocates memory for this device instance, including
243 * space for this driver's private structure */
244 struct ieee80211_hw *hw =
245 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
246 if (hw == NULL) {
a3139c59
SO		 247 printk(KERN_ERR "%s: Can not allocate network device\n",
248 cfg->name);
1d0a082d
AK		 249 goto out;
250 }
251
252 priv = hw->priv;
253 priv->hw = hw;
254
255out:
256 return hw;
257}
258EXPORT_SYMBOL(iwl_alloc_all);
259
b661c819
TW		 260void iwl_hw_detect(struct iwl_priv *priv)
261{
262 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
263 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
264 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
265}
266EXPORT_SYMBOL(iwl_hw_detect);
267
1053d35f
RR		 268int iwl_hw_nic_init(struct iwl_priv *priv)
269{
270 unsigned long flags;
271 struct iwl_rx_queue *rxq = &priv->rxq;
272 int ret;
273
274 /* nic_init */
1053d35f 275 spin_lock_irqsave(&priv->lock, flags);
1b73af82 276 priv->cfg->ops->lib->apm_ops.init(priv);
74ba67ed 277
2be76703
WYG		 278 /* Set interrupt coalescing calibration timer to default (512 usecs) */
279 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
74ba67ed 280
1053d35f
RR		 281 spin_unlock_irqrestore(&priv->lock, flags);
282
283 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
284
285 priv->cfg->ops->lib->apm_ops.config(priv);
286
287 /* Allocate the RX queue, or reset if it is already allocated */
288 if (!rxq->bd) {
289 ret = iwl_rx_queue_alloc(priv);
290 if (ret) {
15b1687c 291 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 292 return -ENOMEM;
293 }
294 } else
295 iwl_rx_queue_reset(priv, rxq);
296
297 iwl_rx_replenish(priv);
298
299 iwl_rx_init(priv, rxq);
300
301 spin_lock_irqsave(&priv->lock, flags);
302
303 rxq->need_update = 1;
304 iwl_rx_queue_update_write_ptr(priv, rxq);
305
306 spin_unlock_irqrestore(&priv->lock, flags);
307
308 /* Allocate and init all Tx and Command queues */
309 ret = iwl_txq_ctx_reset(priv);
310 if (ret)
311 return ret;
312
313 set_bit(STATUS_INIT, &priv->status);
314
315 return 0;
316}
317EXPORT_SYMBOL(iwl_hw_nic_init);
318
14d2aac5
AK		 319/*
320 * QoS support
321*/
322void iwl_activate_qos(struct iwl_priv *priv, u8 force)
323{
324 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
325 return;
326
327 priv->qos_data.def_qos_parm.qos_flags = 0;
328
329 if (priv->qos_data.qos_cap.q_AP.queue_request &&
330 !priv->qos_data.qos_cap.q_AP.txop_request)
331 priv->qos_data.def_qos_parm.qos_flags |=
332 QOS_PARAM_FLG_TXOP_TYPE_MSK;
333 if (priv->qos_data.qos_active)
334 priv->qos_data.def_qos_parm.qos_flags |=
335 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
336
337 if (priv->current_ht_config.is_ht)
338 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
339
340 if (force || iwl_is_associated(priv)) {
341 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
342 priv->qos_data.qos_active,
343 priv->qos_data.def_qos_parm.qos_flags);
344
345 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
346 sizeof(struct iwl_qosparam_cmd),
347 &priv->qos_data.def_qos_parm, NULL);
348 }
349}
350EXPORT_SYMBOL(iwl_activate_qos);
351
f2c95b04
WYG		 352/*
353 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
354 * (802.11b) (802.11a/g)
355 * AC_BK 15 1023 7 0 0
356 * AC_BE 15 1023 3 0 0
357 * AC_VI 7 15 2 6.016ms 3.008ms
358 * AC_VO 3 7 2 3.264ms 1.504ms
359 */
c7de35cd 360void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 361{
362 u16 cw_min = 15;
363 u16 cw_max = 1023;
364 u8 aifs = 2;
30dab79e 365 bool is_legacy = false;
bf85ea4f
AK		 366 unsigned long flags;
367 int i;
368
369 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 370 /* QoS always active in AP and ADHOC mode
371 * In STA mode wait for association
372 */
373 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
374 priv->iw_mode == NL80211_IFTYPE_AP)
375 priv->qos_data.qos_active = 1;
376 else
377 priv->qos_data.qos_active = 0;
bf85ea4f 378
30dab79e
WT		 379 /* check for legacy mode */
380 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
381 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
382 (priv->iw_mode == NL80211_IFTYPE_STATION &&
383 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 384 cw_min = 31;
385 is_legacy = 1;
386 }
387
388 if (priv->qos_data.qos_active)
389 aifs = 3;
390
f2c95b04 391 /* AC_BE */
bf85ea4f
AK		 392 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
393 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
394 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
395 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
396 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
397
398 if (priv->qos_data.qos_active) {
f2c95b04 399 /* AC_BK */
bf85ea4f
AK		 400 i = 1;
401 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
402 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
403 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
404 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
405 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
406
f2c95b04 407 /* AC_VI */
bf85ea4f
AK		 408 i = 2;
409 priv->qos_data.def_qos_parm.ac[i].cw_min =
410 cpu_to_le16((cw_min + 1) / 2 - 1);
411 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 412 cpu_to_le16(cw_min);
bf85ea4f
AK		 413 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
414 if (is_legacy)
415 priv->qos_data.def_qos_parm.ac[i].edca_txop =
416 cpu_to_le16(6016);
417 else
418 priv->qos_data.def_qos_parm.ac[i].edca_txop =
419 cpu_to_le16(3008);
420 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
421
f2c95b04 422 /* AC_VO */
bf85ea4f
AK		 423 i = 3;
424 priv->qos_data.def_qos_parm.ac[i].cw_min =
425 cpu_to_le16((cw_min + 1) / 4 - 1);
426 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 427 cpu_to_le16((cw_min + 1) / 2 - 1);
bf85ea4f
AK		 428 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
429 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
430 if (is_legacy)
431 priv->qos_data.def_qos_parm.ac[i].edca_txop =
432 cpu_to_le16(3264);
433 else
434 priv->qos_data.def_qos_parm.ac[i].edca_txop =
435 cpu_to_le16(1504);
436 } else {
437 for (i = 1; i < 4; i++) {
438 priv->qos_data.def_qos_parm.ac[i].cw_min =
439 cpu_to_le16(cw_min);
440 priv->qos_data.def_qos_parm.ac[i].cw_max =
441 cpu_to_le16(cw_max);
442 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
443 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
444 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
445 }
446 }
e1623446 447 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 448
449 spin_unlock_irqrestore(&priv->lock, flags);
450}
c7de35cd
RR		 451EXPORT_SYMBOL(iwl_reset_qos);
452
d9fe60de
JB		 453#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
454#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 455static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 456 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 457 enum ieee80211_band band)
458{
39130df3
RR		 459 u16 max_bit_rate = 0;
460 u8 rx_chains_num = priv->hw_params.rx_chains_num;
461 u8 tx_chains_num = priv->hw_params.tx_chains_num;
462
c7de35cd 463 ht_info->cap = 0;
d9fe60de 464 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 465
d9fe60de 466 ht_info->ht_supported = true;
c7de35cd 467
b261793d
DH		 468 if (priv->cfg->ht_greenfield_support)
469 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 470 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 471 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 472 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 473 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
474 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
475 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 476 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 477 }
c7de35cd
RR		 478
479 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 480 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 481
482 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
483 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
484
d9fe60de 485 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 486 if (rx_chains_num >= 2)
d9fe60de 487 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 488 if (rx_chains_num >= 3)
d9fe60de 489 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 490
491 /* Highest supported Rx data rate */
492 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 493 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
494 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 495
496 /* Tx MCS capabilities */
d9fe60de 497 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 498 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 499 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
500 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
501 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 502 }
c7de35cd 503}
c7de35cd 504
c7de35cd
RR		 505/**
506 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
507 */
534166de 508int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 509{
510 struct iwl_channel_info *ch;
511 struct ieee80211_supported_band *sband;
512 struct ieee80211_channel *channels;
513 struct ieee80211_channel *geo_ch;
514 struct ieee80211_rate *rates;
515 int i = 0;
516
517 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
518 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 519 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 520 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
521 return 0;
522 }
523
524 channels = kzalloc(sizeof(struct ieee80211_channel) *
525 priv->channel_count, GFP_KERNEL);
526 if (!channels)
527 return -ENOMEM;
528
5027309b 529 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 530 GFP_KERNEL);
531 if (!rates) {
532 kfree(channels);
533 return -ENOMEM;
534 }
535
536 /* 5.2GHz channels start after the 2.4GHz channels */
537 sband = &priv->bands[IEEE80211_BAND_5GHZ];
538 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
539 /* just OFDM */
540 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 541 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 542
49779293 543 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 544 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 545 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 546
547 sband = &priv->bands[IEEE80211_BAND_2GHZ];
548 sband->channels = channels;
549 /* OFDM & CCK */
550 sband->bitrates = rates;
5027309b 551 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 552
49779293 553 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 554 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 555 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 556
557 priv->ieee_channels = channels;
558 priv->ieee_rates = rates;
559
c7de35cd
RR		 560 for (i = 0; i < priv->channel_count; i++) {
561 ch = &priv->channel_info[i];
562
563 /* FIXME: might be removed if scan is OK */
564 if (!is_channel_valid(ch))
565 continue;
566
567 if (is_channel_a_band(ch))
568 sband = &priv->bands[IEEE80211_BAND_5GHZ];
569 else
570 sband = &priv->bands[IEEE80211_BAND_2GHZ];
571
572 geo_ch = &sband->channels[sband->n_channels++];
573
574 geo_ch->center_freq =
575 ieee80211_channel_to_frequency(ch->channel);
576 geo_ch->max_power = ch->max_power_avg;
577 geo_ch->max_antenna_gain = 0xff;
578 geo_ch->hw_value = ch->channel;
579
580 if (is_channel_valid(ch)) {
581 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
582 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
583
584 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
585 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
586
587 if (ch->flags & EEPROM_CHANNEL_RADAR)
588 geo_ch->flags |= IEEE80211_CHAN_RADAR;
589
7aafef1c 590 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 591
dc1b0973
WYG		 592 if (ch->max_power_avg > priv->tx_power_device_lmt)
593 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 594 } else {
595 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
596 }
597
e1623446 598 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 599 ch->channel, geo_ch->center_freq,
600 is_channel_a_band(ch) ? "5.2" : "2.4",
601 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
602 "restricted" : "valid",
603 geo_ch->flags);
604 }
605
606 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
607 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 608 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
609 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 610 priv->pci_dev->device,
611 priv->pci_dev->subsystem_device);
c7de35cd
RR		 612 priv->cfg->sku &= ~IWL_SKU_A;
613 }
614
978785a3 615 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 616 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
617 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 618
619 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
620
621 return 0;
622}
534166de 623EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 624
625/*
626 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
627 */
534166de 628void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 629{
630 kfree(priv->ieee_channels);
631 kfree(priv->ieee_rates);
632 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
633}
534166de 634EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 635
37dc70fe
AK		 636/*
637 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
638 * function.
639 */
640void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
641 __le32 *tx_flags)
642{
643 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
644 *tx_flags |= TX_CMD_FLG_RTS_MSK;
645 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
646 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
647 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
648 *tx_flags |= TX_CMD_FLG_CTS_MSK;
649 }
650}
651EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
652
28a6b07a 653static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 654{
ba37a3d0 655 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 656 priv->current_ht_config.single_chain_sufficient;
c7de35cd 657}
963f5517 658
47c5196e
TW		 659static u8 iwl_is_channel_extension(struct iwl_priv *priv,
660 enum ieee80211_band band,
661 u16 channel, u8 extension_chan_offset)
662{
663 const struct iwl_channel_info *ch_info;
664
665 ch_info = iwl_get_channel_info(priv, band, channel);
666 if (!is_channel_valid(ch_info))
667 return 0;
668
d9fe60de 669 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 670 return !(ch_info->ht40_extension_channel &
689da1b3 671 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 672 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 673 return !(ch_info->ht40_extension_channel &
689da1b3 674 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 675
676 return 0;
677}
678
7aafef1c 679u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 680 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 681{
fad95bf5 682 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 683
fad95bf5 684 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 685 return 0;
686
a2b0f02e
WYG		 687 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
688 * the bit will not set if it is pure 40MHz case
689 */
47c5196e 690 if (sta_ht_inf) {
a2b0f02e 691 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 692 return 0;
693 }
1e4247d4
WYG		 694#ifdef CONFIG_IWLWIFI_DEBUG
695 if (priv->disable_ht40)
696 return 0;
697#endif
611d3eb7
WYG		 698 return iwl_is_channel_extension(priv, priv->band,
699 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 700 ht_conf->extension_chan_offset);
47c5196e 701}
7aafef1c 702EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 703
2c2f3b33
TW		 704static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
705{
706 u16 new_val = 0;
707 u16 beacon_factor = 0;
708
709 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
710 new_val = beacon_val / beacon_factor;
711
712 if (!new_val)
713 new_val = max_beacon_val;
714
715 return new_val;
716}
717
718void iwl_setup_rxon_timing(struct iwl_priv *priv)
719{
720 u64 tsf;
721 s32 interval_tm, rem;
722 unsigned long flags;
723 struct ieee80211_conf *conf = NULL;
724 u16 beacon_int;
725
726 conf = ieee80211_get_hw_conf(priv->hw);
727
728 spin_lock_irqsave(&priv->lock, flags);
729 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
730 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
731
732 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
733 beacon_int = priv->beacon_int;
734 priv->rxon_timing.atim_window = 0;
735 } else {
736 beacon_int = priv->vif->bss_conf.beacon_int;
737
738 /* TODO: we need to get atim_window from upper stack
739 * for now we set to 0 */
740 priv->rxon_timing.atim_window = 0;
741 }
742
743 beacon_int = iwl_adjust_beacon_interval(beacon_int,
744 priv->hw_params.max_beacon_itrvl * 1024);
745 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
746
747 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
748 interval_tm = beacon_int * 1024;
749 rem = do_div(tsf, interval_tm);
750 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
751
752 spin_unlock_irqrestore(&priv->lock, flags);
753 IWL_DEBUG_ASSOC(priv,
754 "beacon interval %d beacon timer %d beacon tim %d\n",
755 le16_to_cpu(priv->rxon_timing.beacon_interval),
756 le32_to_cpu(priv->rxon_timing.beacon_init_val),
757 le16_to_cpu(priv->rxon_timing.atim_window));
758}
759EXPORT_SYMBOL(iwl_setup_rxon_timing);
760
8ccde88a
SO		 761void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
762{
763 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
764
765 if (hw_decrypt)
766 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
767 else
768 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
769
770}
771EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
772
773/**
774 * iwl_check_rxon_cmd - validate RXON structure is valid
775 *
776 * NOTE: This is really only useful during development and can eventually
777 * be #ifdef'd out once the driver is stable and folks aren't actively
778 * making changes
779 */
780int iwl_check_rxon_cmd(struct iwl_priv *priv)
781{
782 int error = 0;
783 int counter = 1;
784 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
785
786 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
787 error |= le32_to_cpu(rxon->flags &
788 (RXON_FLG_TGJ_NARROW_BAND_MSK |
789 RXON_FLG_RADAR_DETECT_MSK));
790 if (error)
791 IWL_WARN(priv, "check 24G fields %d | %d\n",
792 counter++, error);
793 } else {
794 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
795 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
796 if (error)
797 IWL_WARN(priv, "check 52 fields %d | %d\n",
798 counter++, error);
799 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
800 if (error)
801 IWL_WARN(priv, "check 52 CCK %d | %d\n",
802 counter++, error);
803 }
804 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
805 if (error)
806 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
807
808 /* make sure basic rates 6Mbps and 1Mbps are supported */
809 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
810 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
811 if (error)
812 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
813
814 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
815 if (error)
816 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
817
818 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
819 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
820 if (error)
821 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
822 counter++, error);
823
824 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
825 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
826 if (error)
827 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
828 counter++, error);
829
830 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
831 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
832 if (error)
833 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
834 counter++, error);
835
836 if (error)
837 IWL_WARN(priv, "Tuning to channel %d\n",
838 le16_to_cpu(rxon->channel));
839
840 if (error) {
841 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
842 return -1;
843 }
844 return 0;
845}
846EXPORT_SYMBOL(iwl_check_rxon_cmd);
847
848/**
849 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
850 * @priv: staging_rxon is compared to active_rxon
851 *
852 * If the RXON structure is changing enough to require a new tune,
853 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
854 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
855 */
856int iwl_full_rxon_required(struct iwl_priv *priv)
857{
858
859 /* These items are only settable from the full RXON command */
860 if (!(iwl_is_associated(priv)) ||
861 compare_ether_addr(priv->staging_rxon.bssid_addr,
862 priv->active_rxon.bssid_addr) ||
863 compare_ether_addr(priv->staging_rxon.node_addr,
864 priv->active_rxon.node_addr) ||
865 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
866 priv->active_rxon.wlap_bssid_addr) ||
867 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
868 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
869 (priv->staging_rxon.air_propagation !=
870 priv->active_rxon.air_propagation) ||
871 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
872 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
873 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
874 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 875 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
876 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 877 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
878 return 1;
879
880 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
881 * be updated with the RXON_ASSOC command -- however only some
882 * flag transitions are allowed using RXON_ASSOC */
883
884 /* Check if we are not switching bands */
885 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
886 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
887 return 1;
888
889 /* Check if we are switching association toggle */
890 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
891 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
892 return 1;
893
894 return 0;
895}
896EXPORT_SYMBOL(iwl_full_rxon_required);
897
898u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
899{
900 int i;
901 int rate_mask;
902
903 /* Set rate mask*/
904 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
905 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
906 else
907 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
908
909 /* Find lowest valid rate */
910 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
911 i = iwl_rates[i].next_ieee) {
912 if (rate_mask & (1 << i))
913 return iwl_rates[i].plcp;
914 }
915
916 /* No valid rate was found. Assign the lowest one */
917 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
918 return IWL_RATE_1M_PLCP;
919 else
920 return IWL_RATE_6M_PLCP;
921}
922EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
923
fad95bf5 924void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 925{
c1adf9fb 926 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 927
fad95bf5 928 if (!ht_conf->is_ht) {
a2b0f02e 929 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 930 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 931 RXON_FLG_HT40_PROT_MSK |
42eb7c64 932 RXON_FLG_HT_PROT_MSK);
47c5196e 933 return;
42eb7c64 934 }
47c5196e 935
a2b0f02e
WYG		 936 /* FIXME: if the definition of ht_protection changed, the "translation"
937 * will be needed for rxon->flags
938 */
fad95bf5 939 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 940
941 /* Set up channel bandwidth:
7aafef1c 942 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 943 /* clear the HT channel mode before set the mode */
944 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
945 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 946 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
947 /* pure ht40 */
fad95bf5 948 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 949 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 950 /* Note: control channel is opposite of extension channel */
fad95bf5 951 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 952 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
953 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
954 break;
955 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
956 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
957 break;
958 }
959 } else {
a2b0f02e 960 /* Note: control channel is opposite of extension channel */
fad95bf5 961 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 962 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
963 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
964 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
965 break;
966 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
967 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
968 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
969 break;
970 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
971 default:
972 /* channel location only valid if in Mixed mode */
973 IWL_ERR(priv, "invalid extension channel offset\n");
974 break;
975 }
976 }
977 } else {
978 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 979 }
980
45823531
AK		 981 if (priv->cfg->ops->hcmd->set_rxon_chain)
982 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 983
02bb1bea 984 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 985 "extension channel offset 0x%x\n",
fad95bf5
JB		 986 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
987 ht_conf->extension_chan_offset);
47c5196e
TW		 988 return;
989}
990EXPORT_SYMBOL(iwl_set_rxon_ht);
991
9e5e6c32
TW		 992#define IWL_NUM_RX_CHAINS_MULTIPLE 3
993#define IWL_NUM_RX_CHAINS_SINGLE 2
994#define IWL_NUM_IDLE_CHAINS_DUAL 2
995#define IWL_NUM_IDLE_CHAINS_SINGLE 1
996
2b396a12
JB		 997/*
998 * Determine how many receiver/antenna chains to use.
999 *
1000 * More provides better reception via diversity. Fewer saves power
1001 * at the expense of throughput, but only when not in powersave to
1002 * start with.
1003 *
c7de35cd
RR		 1004 * MIMO (dual stream) requires at least 2, but works better with 3.
1005 * This does not determine *which* chains to use, just how many.
1006 */
28a6b07a 1007static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 1008{
c7de35cd 1009 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 1010 if (is_single_rx_stream(priv))
9e5e6c32 1011 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 1012 else
9e5e6c32 1013 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 1014}
c7de35cd 1015
2b396a12 1016/*
3f3e0376
WYG		 1017 * When we are in power saving mode, unless device support spatial
1018 * multiplexing power save, use the active count for rx chain count.
2b396a12 1019 */
28a6b07a
TW		 1020static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1021{
ba37a3d0
JB		 1022 /* # Rx chains when idling, depending on SMPS mode */
1023 switch (priv->current_ht_config.smps) {
1024 case IEEE80211_SMPS_STATIC:
1025 case IEEE80211_SMPS_DYNAMIC:
1026 return IWL_NUM_IDLE_CHAINS_SINGLE;
1027 case IEEE80211_SMPS_OFF:
1028 return active_cnt;
c15d20c1 1029 default:
ba37a3d0
JB		 1030 WARN(1, "invalid SMPS mode %d",
1031 priv->current_ht_config.smps);
1032 return active_cnt;
3f3e0376 1033 }
c7de35cd
RR		 1034}
1035
04816448
GE		 1036/* up to 4 chains */
1037static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1038{
1039 u8 res;
1040 res = (chain_bitmap & BIT(0)) >> 0;
1041 res += (chain_bitmap & BIT(1)) >> 1;
1042 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 1043 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 1044 return res;
1045}
1046
4c4df78f
CR		 1047/**
1048 * iwl_is_monitor_mode - Determine if interface in monitor mode
1049 *
1050 * priv->iw_mode is set in add_interface, but add_interface is
1051 * never called for monitor mode. The only way mac80211 informs us about
1052 * monitor mode is through configuring filters (call to configure_filter).
1053 */
279b05d4 1054bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 1055{
1056 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1057}
279b05d4 1058EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 1059
c7de35cd
RR		 1060/**
1061 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1062 *
1063 * Selects how many and which Rx receivers/antennas/chains to use.
1064 * This should not be used for scan command ... it puts data in wrong place.
1065 */
1066void iwl_set_rxon_chain(struct iwl_priv *priv)
1067{
28a6b07a
TW		 1068 bool is_single = is_single_rx_stream(priv);
1069 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 1070 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1071 u32 active_chains;
28a6b07a 1072 u16 rx_chain;
c7de35cd
RR		 1073
1074 /* Tell uCode which antennas are actually connected.
1075 * Before first association, we assume all antennas are connected.
1076 * Just after first association, iwl_chain_noise_calibration()
1077 * checks which antennas actually *are* connected. */
04816448
GE		 1078 if (priv->chain_noise_data.active_chains)
1079 active_chains = priv->chain_noise_data.active_chains;
1080 else
1081 active_chains = priv->hw_params.valid_rx_ant;
1082
1083 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 1084
1085 /* How many receivers should we use? */
28a6b07a
TW		 1086 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1087 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1088
28a6b07a 1089
04816448
GE		 1090 /* correct rx chain count according hw settings
1091 * and chain noise calibration
1092 */
1093 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1094 if (valid_rx_cnt < active_rx_cnt)
1095 active_rx_cnt = valid_rx_cnt;
1096
1097 if (valid_rx_cnt < idle_rx_cnt)
1098 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 1099
1100 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1101 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1102
7b841727
RF		 1103 /* copied from 'iwl_bg_request_scan()' */
1104 /* Force use of chains B and C (0x6) for Rx for 4965
1105 * Avoid A (0x1) because of its off-channel reception on A-band.
1106 * MIMO is not used here, but value is required */
1107 if (iwl_is_monitor_mode(priv) &&
1108 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1109 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
fff7a434
WYG		 1110 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1111 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1112 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1113 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 1114 }
1115
28a6b07a
TW		 1116 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1117
9e5e6c32 1118 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 1119 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1120 else
1121 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1122
e1623446 1123 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 1124 priv->staging_rxon.rx_chain,
1125 active_rx_cnt, idle_rx_cnt);
1126
1127 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1128 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 1129}
1130EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 1131
1132/**
17e72782 1133 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 1134 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1135 * @channel: Any channel valid for the requested phymode
1136
1137 * In addition to setting the staging RXON, priv->phymode is also set.
1138 *
1139 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1140 * in the staging RXON flag structure based on the phymode
1141 */
17e72782 1142int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 1143{
17e72782
TW		 1144 enum ieee80211_band band = ch->band;
1145 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1146
8622e705 1147 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1148 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1149 channel, band);
1150 return -EINVAL;
1151 }
1152
1153 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1154 (priv->band == band))
1155 return 0;
1156
1157 priv->staging_rxon.channel = cpu_to_le16(channel);
1158 if (band == IEEE80211_BAND_5GHZ)
1159 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1160 else
1161 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1162
1163 priv->band = band;
1164
e1623446 1165 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1166
1167 return 0;
1168}
c7de35cd 1169EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1170
8ccde88a
SO		 1171void iwl_set_flags_for_band(struct iwl_priv *priv,
1172 enum ieee80211_band band)
1173{
1174 if (band == IEEE80211_BAND_5GHZ) {
1175 priv->staging_rxon.flags &=
1176 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1177 | RXON_FLG_CCK_MSK);
1178 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1179 } else {
1180 /* Copied from iwl_post_associate() */
1181 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1182 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1183 else
1184 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1185
1186 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1187 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1188
1189 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1190 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1191 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1192 }
1193}
8ccde88a
SO		 1194
1195/*
1196 * initialize rxon structure with default values from eeprom
1197 */
1198void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1199{
1200 const struct iwl_channel_info *ch_info;
1201
1202 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1203
1204 switch (mode) {
1205 case NL80211_IFTYPE_AP:
1206 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1207 break;
1208
1209 case NL80211_IFTYPE_STATION:
1210 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1211 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1212 break;
1213
1214 case NL80211_IFTYPE_ADHOC:
1215 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1216 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1217 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1218 RXON_FILTER_ACCEPT_GRP_MSK;
1219 break;
1220
8ccde88a
SO		 1221 default:
1222 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1223 break;
1224 }
1225
1226#if 0
1227 /* TODO: Figure out when short_preamble would be set and cache from
1228 * that */
1229 if (!hw_to_local(priv->hw)->short_preamble)
1230 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1231 else
1232 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1233#endif
1234
1235 ch_info = iwl_get_channel_info(priv, priv->band,
1236 le16_to_cpu(priv->active_rxon.channel));
1237
1238 if (!ch_info)
1239 ch_info = &priv->channel_info[0];
1240
8ccde88a
SO		 1241 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1242 priv->band = ch_info->band;
1243
1244 iwl_set_flags_for_band(priv, priv->band);
1245
1246 priv->staging_rxon.ofdm_basic_rates =
1247 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1248 priv->staging_rxon.cck_basic_rates =
1249 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1250
a2b0f02e
WYG		 1251 /* clear both MIX and PURE40 mode flag */
1252 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1253 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1254 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1255 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1256 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1257 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1258 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1259}
1260EXPORT_SYMBOL(iwl_connection_init_rx_config);
1261
782571f4 1262static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1263{
1264 const struct ieee80211_supported_band *hw = NULL;
1265 struct ieee80211_rate *rate;
1266 int i;
1267
1268 hw = iwl_get_hw_mode(priv, priv->band);
1269 if (!hw) {
1270 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1271 return;
1272 }
1273
1274 priv->active_rate = 0;
1275 priv->active_rate_basic = 0;
1276
1277 for (i = 0; i < hw->n_bitrates; i++) {
1278 rate = &(hw->bitrates[i]);
5027309b 1279 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1280 priv->active_rate |= (1 << rate->hw_value);
1281 }
1282
e1623446 1283 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1284 priv->active_rate, priv->active_rate_basic);
1285
1286 /*
1287 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1288 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1289 * OFDM
1290 */
1291 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1292 priv->staging_rxon.cck_basic_rates =
1293 ((priv->active_rate_basic &
1294 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1295 else
1296 priv->staging_rxon.cck_basic_rates =
1297 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1298
1299 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1300 priv->staging_rxon.ofdm_basic_rates =
1301 ((priv->active_rate_basic &
1302 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1303 IWL_FIRST_OFDM_RATE) & 0xFF;
1304 else
1305 priv->staging_rxon.ofdm_basic_rates =
1306 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1307}
8ccde88a
SO		 1308
1309void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1310{
2f301227 1311 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1312 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1313 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1314
0924e519
WYG		 1315 if (priv->switch_rxon.switch_in_progress) {
1316 if (!le32_to_cpu(csa->status) &&
1317 (csa->channel == priv->switch_rxon.channel)) {
1318 rxon->channel = csa->channel;
1319 priv->staging_rxon.channel = csa->channel;
1320 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1321 le16_to_cpu(csa->channel));
1322 } else
1323 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1324 le16_to_cpu(csa->channel));
1325
1326 priv->switch_rxon.switch_in_progress = false;
1327 }
8ccde88a
SO		 1328}
1329EXPORT_SYMBOL(iwl_rx_csa);
1330
1331#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1332void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1333{
1334 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1335
e1623446 1336 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1337 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1338 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1339 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1340 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1341 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1342 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1343 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1344 rxon->ofdm_basic_rates);
e1623446
TW		 1345 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1346 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1347 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1348 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1349}
a643565e 1350EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1351#endif
8ccde88a
SO		 1352/**
1353 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1354 */
1355void iwl_irq_handle_error(struct iwl_priv *priv)
1356{
1357 /* Set the FW error flag -- cleared on iwl_down */
1358 set_bit(STATUS_FW_ERROR, &priv->status);
1359
1360 /* Cancel currently queued command. */
1361 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1362
3a3ff72c 1363 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1364 if (priv->cfg->ops->lib->dump_csr)
1365 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1366 if (priv->cfg->ops->lib->dump_fh)
1367 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1368 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1369#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1370 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1371 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1372#endif
1373
1374 wake_up_interruptible(&priv->wait_command_queue);
1375
1376 /* Keep the restart process from trying to send host
1377 * commands by clearing the INIT status bit */
1378 clear_bit(STATUS_READY, &priv->status);
1379
1380 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1381 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1382 "Restarting adapter due to uCode error.\n");
1383
8ccde88a
SO		 1384 if (priv->cfg->mod_params->restart_fw)
1385 queue_work(priv->workqueue, &priv->restart);
1386 }
1387}
1388EXPORT_SYMBOL(iwl_irq_handle_error);
1389
d68b603c
AK		 1390int iwl_apm_stop_master(struct iwl_priv *priv)
1391{
5220af0c 1392 int ret = 0;
d68b603c 1393
5220af0c 1394 /* stop device's busmaster DMA activity */
d68b603c
AK		 1395 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1396
5220af0c 1397 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1398 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1399 if (ret)
1400 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1401
d68b603c
AK		 1402 IWL_DEBUG_INFO(priv, "stop master\n");
1403
5220af0c 1404 return ret;
d68b603c
AK		 1405}
1406EXPORT_SYMBOL(iwl_apm_stop_master);
1407
1408void iwl_apm_stop(struct iwl_priv *priv)
1409{
fadb3582
BC		 1410 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1411
5220af0c 1412 /* Stop device's DMA activity */
d68b603c
AK		 1413 iwl_apm_stop_master(priv);
1414
5220af0c 1415 /* Reset the entire device */
d68b603c
AK		 1416 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1417
1418 udelay(10);
5220af0c
BC		 1419
1420 /*
1421 * Clear "initialization complete" bit to move adapter from
1422 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1423 */
d68b603c 1424 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1425}
1426EXPORT_SYMBOL(iwl_apm_stop);
1427
fadb3582
BC		 1428
1429/*
1430 * Start up NIC's basic functionality after it has been reset
1431 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1432 * NOTE: This does not load uCode nor start the embedded processor
1433 */
1434int iwl_apm_init(struct iwl_priv *priv)
1435{
1436 int ret = 0;
1437 u16 lctl;
1438
1439 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1440
1441 /*
1442 * Use "set_bit" below rather than "write", to preserve any hardware
1443 * bits already set by default after reset.
1444 */
1445
1446 /* Disable L0S exit timer (platform NMI Work/Around) */
1447 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1448 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1449
1450 /*
1451 * Disable L0s without affecting L1;
1452 * don't wait for ICH L0s (ICH bug W/A)
1453 */
1454 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1455 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1456
1457 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1458 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1459
1460 /*
1461 * Enable HAP INTA (interrupt from management bus) to
1462 * wake device's PCI Express link L1a -> L0s
1463 * NOTE: This is no-op for 3945 (non-existant bit)
1464 */
1465 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1466 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1467
1468 /*
a6c5c731
BC		 1469 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1470 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1471 * If so (likely), disable L0S, so device moves directly L0->L1;
1472 * costs negligible amount of power savings.
1473 * If not (unlikely), enable L0S, so there is at least some
1474 * power savings, even without L1.
fadb3582
BC		 1475 */
1476 if (priv->cfg->set_l0s) {
1477 lctl = iwl_pcie_link_ctl(priv);
1478 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1479 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1480 /* L1-ASPM enabled; disable(!) L0S */
1481 iwl_set_bit(priv, CSR_GIO_REG,
1482 CSR_GIO_REG_VAL_L0S_ENABLED);
1483 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1484 } else {
1485 /* L1-ASPM disabled; enable(!) L0S */
1486 iwl_clear_bit(priv, CSR_GIO_REG,
1487 CSR_GIO_REG_VAL_L0S_ENABLED);
1488 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1489 }
1490 }
1491
1492 /* Configure analog phase-lock-loop before activating to D0A */
1493 if (priv->cfg->pll_cfg_val)
1494 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1495
1496 /*
1497 * Set "initialization complete" bit to move adapter from
1498 * D0U* --> D0A* (powered-up active) state.
1499 */
1500 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1501
1502 /*
1503 * Wait for clock stabilization; once stabilized, access to
1504 * device-internal resources is supported, e.g. iwl_write_prph()
1505 * and accesses to uCode SRAM.
1506 */
1507 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1508 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1509 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1510 if (ret < 0) {
1511 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1512 goto out;
1513 }
1514
1515 /*
1516 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1517 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1518 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1519 * and don't need BSM to restore data after power-saving sleep.
1520 *
1521 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1522 * do not disable clocks. This preserves any hardware bits already
1523 * set by default in "CLK_CTRL_REG" after reset.
1524 */
1525 if (priv->cfg->use_bsm)
1526 iwl_write_prph(priv, APMG_CLK_EN_REG,
1527 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1528 else
1529 iwl_write_prph(priv, APMG_CLK_EN_REG,
1530 APMG_CLK_VAL_DMA_CLK_RQT);
1531 udelay(20);
1532
1533 /* Disable L1-Active */
1534 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1535 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1536
1537out:
1538 return ret;
1539}
1540EXPORT_SYMBOL(iwl_apm_init);
1541
1542
1543
8ccde88a
SO		 1544void iwl_configure_filter(struct ieee80211_hw *hw,
1545 unsigned int changed_flags,
1546 unsigned int *total_flags,
3ac64bee 1547 u64 multicast)
8ccde88a
SO		 1548{
1549 struct iwl_priv *priv = hw->priv;
1550 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1551
e1623446 1552 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1553 changed_flags, *total_flags);
1554
1555 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1556 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1557 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1558 else
1559 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1560 }
1561 if (changed_flags & FIF_ALLMULTI) {
1562 if (*total_flags & FIF_ALLMULTI)
1563 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1564 else
1565 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1566 }
1567 if (changed_flags & FIF_CONTROL) {
1568 if (*total_flags & FIF_CONTROL)
1569 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1570 else
1571 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1572 }
1573 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1574 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1575 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1576 else
1577 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1578 }
1579
1580 /* We avoid iwl_commit_rxon here to commit the new filter flags
1581 * since mac80211 will call ieee80211_hw_config immediately.
1582 * (mc_list is not supported at this time). Otherwise, we need to
1583 * queue a background iwl_commit_rxon work.
1584 */
1585
1586 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1587 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1588}
1589EXPORT_SYMBOL(iwl_configure_filter);
1590
da154e30
RR		 1591int iwl_set_hw_params(struct iwl_priv *priv)
1592{
da154e30
RR		 1593 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1594 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1595 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1596 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1597 else
2f301227 1598 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1599
2c2f3b33
TW		 1600 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1601
49779293
RR		 1602 if (priv->cfg->mod_params->disable_11n)
1603 priv->cfg->sku &= ~IWL_SKU_N;
1604
da154e30
RR		 1605 /* Device-specific setup */
1606 return priv->cfg->ops->lib->set_hw_params(priv);
1607}
1608EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1609
630fe9b6
TW		 1610int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1611{
1612 int ret = 0;
5eadd94b
WYG		 1613 s8 prev_tx_power = priv->tx_power_user_lmt;
1614
630fe9b6 1615 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1616 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1617 tx_power,
1618 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1619 return -EINVAL;
1620 }
1621
dc1b0973 1622 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1623 IWL_WARN(priv,
1624 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1625 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1626 return -EINVAL;
1627 }
1628
1629 if (priv->tx_power_user_lmt != tx_power)
1630 force = true;
1631
019fb97d 1632 /* if nic is not up don't send command */
5eadd94b
WYG		 1633 if (iwl_is_ready_rf(priv)) {
1634 priv->tx_power_user_lmt = tx_power;
1635 if (force && priv->cfg->ops->lib->send_tx_power)
1636 ret = priv->cfg->ops->lib->send_tx_power(priv);
1637 else if (!priv->cfg->ops->lib->send_tx_power)
1638 ret = -EOPNOTSUPP;
1639 /*
1640 * if fail to set tx_power, restore the orig. tx power
1641 */
1642 if (ret)
1643 priv->tx_power_user_lmt = prev_tx_power;
1644 }
630fe9b6 1645
5eadd94b
WYG		 1646 /*
1647 * Even this is an async host command, the command
1648 * will always report success from uCode
1649 * So once driver can placing the command into the queue
1650 * successfully, driver can use priv->tx_power_user_lmt
1651 * to reflect the current tx power
1652 */
630fe9b6
TW		 1653 return ret;
1654}
1655EXPORT_SYMBOL(iwl_set_tx_power);
1656
ef850d7c 1657irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1658{
1659 struct iwl_priv *priv = data;
1660 u32 inta, inta_mask;
1661 u32 inta_fh;
1662 if (!priv)
1663 return IRQ_NONE;
1664
1665 spin_lock(&priv->lock);
1666
1667 /* Disable (but don't clear!) interrupts here to avoid
1668 * back-to-back ISRs and sporadic interrupts from our NIC.
1669 * If we have something to service, the tasklet will re-enable ints.
1670 * If we *don't* have something, we'll re-enable before leaving here. */
1671 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1672 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1673
1674 /* Discover which interrupts are active/pending */
1675 inta = iwl_read32(priv, CSR_INT);
1676 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1677
1678 /* Ignore interrupt if there's nothing in NIC to service.
1679 * This may be due to IRQ shared with another device,
1680 * or due to sporadic interrupts thrown from our NIC. */
1681 if (!inta && !inta_fh) {
1682 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1683 goto none;
1684 }
1685
1686 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1687 /* Hardware disappeared. It might have already raised
1688 * an interrupt */
1689 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1690 goto unplugged;
1691 }
1692
1693 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1694 inta, inta_mask, inta_fh);
1695
1696 inta &= ~CSR_INT_BIT_SCD;
1697
1698 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1699 if (likely(inta || inta_fh))
1700 tasklet_schedule(&priv->irq_tasklet);
1701
1702 unplugged:
1703 spin_unlock(&priv->lock);
1704 return IRQ_HANDLED;
1705
1706 none:
1707 /* re-enable interrupts here since we don't have anything to service. */
1708 /* only Re-enable if diabled by irq */
1709 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1710 iwl_enable_interrupts(priv);
1711 spin_unlock(&priv->lock);
1712 return IRQ_NONE;
1713}
ef850d7c 1714EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1715
17f841cd
SO		 1716int iwl_send_bt_config(struct iwl_priv *priv)
1717{
1718 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1719 .lead_time = BT_LEAD_TIME_DEF,
1720 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1721 .kill_ack_mask = 0,
1722 .kill_cts_mask = 0,
1723 };
1724
06702a73
WYG		 1725 if (!bt_coex_active)
1726 bt_cmd.flags = BT_COEX_DISABLE;
1727 else
1728 bt_cmd.flags = BT_COEX_ENABLE;
1729
1730 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1731 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1732
17f841cd
SO		 1733 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1734 sizeof(struct iwl_bt_cmd), &bt_cmd);
1735}
1736EXPORT_SYMBOL(iwl_send_bt_config);
1737
ef8d5529 1738int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1739{
ef8d5529
WYG		 1740 struct iwl_statistics_cmd statistics_cmd = {
1741 .configuration_flags =
1742 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1743 };
ef8d5529
WYG		 1744
1745 if (flags & CMD_ASYNC)
1746 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1747 sizeof(struct iwl_statistics_cmd),
1748 &statistics_cmd, NULL);
1749 else
1750 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1751 sizeof(struct iwl_statistics_cmd),
1752 &statistics_cmd);
49ea8596
EG		 1753}
1754EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1755
b0692f2f
EG		 1756/**
1757 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1758 * using sample data 100 bytes apart. If these sample points are good,
1759 * it's a pretty good bet that everything between them is good, too.
1760 */
1761static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1762{
1763 u32 val;
1764 int ret = 0;
1765 u32 errcnt = 0;
1766 u32 i;
1767
e1623446 1768 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1769
b0692f2f
EG		 1770 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1771 /* read data comes through single port, auto-incr addr */
1772 /* NOTE: Use the debugless read so we don't flood kernel log
1773 * if IWL_DL_IO is set */
1774 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1775 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1776 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1777 if (val != le32_to_cpu(*image)) {
1778 ret = -EIO;
1779 errcnt++;
1780 if (errcnt >= 3)
1781 break;
1782 }
1783 }
1784
b0692f2f
EG		 1785 return ret;
1786}
1787
1788/**
1789 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1790 * looking at all data.
1791 */
1792static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1793 u32 len)
1794{
1795 u32 val;
1796 u32 save_len = len;
1797 int ret = 0;
1798 u32 errcnt;
1799
e1623446 1800 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1801
250bdd21
SO		 1802 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1803 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1804
1805 errcnt = 0;
1806 for (; len > 0; len -= sizeof(u32), image++) {
1807 /* read data comes through single port, auto-incr addr */
1808 /* NOTE: Use the debugless read so we don't flood kernel log
1809 * if IWL_DL_IO is set */
1810 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1811 if (val != le32_to_cpu(*image)) {
15b1687c 1812 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1813 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1814 save_len - len, val, le32_to_cpu(*image));
1815 ret = -EIO;
1816 errcnt++;
1817 if (errcnt >= 20)
1818 break;
1819 }
1820 }
1821
b0692f2f 1822 if (!errcnt)
e1623446
TW		 1823 IWL_DEBUG_INFO(priv,
1824 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1825
1826 return ret;
1827}
1828
1829/**
1830 * iwl_verify_ucode - determine which instruction image is in SRAM,
1831 * and verify its contents
1832 */
1833int iwl_verify_ucode(struct iwl_priv *priv)
1834{
1835 __le32 *image;
1836 u32 len;
1837 int ret;
1838
1839 /* Try bootstrap */
1840 image = (__le32 *)priv->ucode_boot.v_addr;
1841 len = priv->ucode_boot.len;
1842 ret = iwlcore_verify_inst_sparse(priv, image, len);
1843 if (!ret) {
e1623446 1844 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1845 return 0;
1846 }
1847
1848 /* Try initialize */
1849 image = (__le32 *)priv->ucode_init.v_addr;
1850 len = priv->ucode_init.len;
1851 ret = iwlcore_verify_inst_sparse(priv, image, len);
1852 if (!ret) {
e1623446 1853 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1854 return 0;
1855 }
1856
1857 /* Try runtime/protocol */
1858 image = (__le32 *)priv->ucode_code.v_addr;
1859 len = priv->ucode_code.len;
1860 ret = iwlcore_verify_inst_sparse(priv, image, len);
1861 if (!ret) {
e1623446 1862 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1863 return 0;
1864 }
1865
15b1687c 1866 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1867
1868 /* Since nothing seems to match, show first several data entries in
1869 * instruction SRAM, so maybe visual inspection will give a clue.
1870 * Selection of bootstrap image (vs. other images) is arbitrary. */
1871 image = (__le32 *)priv->ucode_boot.v_addr;
1872 len = priv->ucode_boot.len;
1873 ret = iwl_verify_inst_full(priv, image, len);
1874
1875 return ret;
1876}
1877EXPORT_SYMBOL(iwl_verify_ucode);
1878
56e12615 1879
47f4a587
EG		 1880void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1881{
1882 struct iwl_ct_kill_config cmd;
672639de 1883 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1884 unsigned long flags;
1885 int ret = 0;
1886
1887 spin_lock_irqsave(&priv->lock, flags);
1888 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1889 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1890 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1891 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1892
480e8407 1893 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1894 adv_cmd.critical_temperature_enter =
1895 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1896 adv_cmd.critical_temperature_exit =
1897 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1898
1899 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1900 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1901 if (ret)
1902 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1903 else
1904 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1905 "succeeded, "
1906 "critical temperature enter is %d,"
1907 "exit is %d\n",
1908 priv->hw_params.ct_kill_threshold,
1909 priv->hw_params.ct_kill_exit_threshold);
480e8407 1910 } else {
672639de
WYG		 1911 cmd.critical_temperature_R =
1912 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1913
672639de
WYG		 1914 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1915 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1916 if (ret)
1917 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1918 else
1919 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1920 "succeeded, "
1921 "critical temperature is %d\n",
1922 priv->hw_params.ct_kill_threshold);
672639de 1923 }
47f4a587
EG		 1924}
1925EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1926
0ad91a35 1927
14a08a7f
EG		 1928/*
1929 * CARD_STATE_CMD
1930 *
1931 * Use: Sets the device's internal card state to enable, disable, or halt
1932 *
1933 * When in the 'enable' state the card operates as normal.
1934 * When in the 'disable' state, the card enters into a low power mode.
1935 * When in the 'halt' state, the card is shut down and must be fully
1936 * restarted to come back on.
1937 */
c496294e 1938int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1939{
1940 struct iwl_host_cmd cmd = {
1941 .id = REPLY_CARD_STATE_CMD,
1942 .len = sizeof(u32),
1943 .data = &flags,
c2acea8e 1944 .flags = meta_flag,
14a08a7f
EG		 1945 };
1946
1947 return iwl_send_cmd(priv, &cmd);
1948}
1949
030f05ed
AK		 1950void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1951 struct iwl_rx_mem_buffer *rxb)
1952{
1953#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1954 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1955 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1956 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1957 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1958#endif
1959}
1960EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1961
1962void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1963 struct iwl_rx_mem_buffer *rxb)
1964{
2f301227 1965 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1966 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1967 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1968 "notification for %s:\n", len,
1969 get_cmd_string(pkt->hdr.cmd));
1970 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1971}
1972EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1973
1974void iwl_rx_reply_error(struct iwl_priv *priv,
1975 struct iwl_rx_mem_buffer *rxb)
1976{
2f301227 1977 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1978
1979 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1980 "seq 0x%04X ser 0x%08X\n",
1981 le32_to_cpu(pkt->u.err_resp.error_type),
1982 get_cmd_string(pkt->u.err_resp.cmd_id),
1983 pkt->u.err_resp.cmd_id,
1984 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1985 le32_to_cpu(pkt->u.err_resp.error_info));
1986}
1987EXPORT_SYMBOL(iwl_rx_reply_error);
1988
a83b9141
WYG		 1989void iwl_clear_isr_stats(struct iwl_priv *priv)
1990{
1991 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1992}
a83b9141 1993
488829f1
AK		 1994int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1995 const struct ieee80211_tx_queue_params *params)
1996{
1997 struct iwl_priv *priv = hw->priv;
1998 unsigned long flags;
1999 int q;
2000
2001 IWL_DEBUG_MAC80211(priv, "enter\n");
2002
2003 if (!iwl_is_ready_rf(priv)) {
2004 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2005 return -EIO;
2006 }
2007
2008 if (queue >= AC_NUM) {
2009 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2010 return 0;
2011 }
2012
2013 q = AC_NUM - 1 - queue;
2014
2015 spin_lock_irqsave(&priv->lock, flags);
2016
2017 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2018 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2019 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2020 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2021 cpu_to_le16((params->txop * 32));
2022
2023 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2024 priv->qos_data.qos_active = 1;
2025
2026 if (priv->iw_mode == NL80211_IFTYPE_AP)
2027 iwl_activate_qos(priv, 1);
2028 else if (priv->assoc_id && iwl_is_associated(priv))
2029 iwl_activate_qos(priv, 0);
2030
2031 spin_unlock_irqrestore(&priv->lock, flags);
2032
2033 IWL_DEBUG_MAC80211(priv, "leave\n");
2034 return 0;
2035}
2036EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2037
2038static void iwl_ht_conf(struct iwl_priv *priv,
02bb1bea 2039 struct ieee80211_bss_conf *bss_conf)
5bbe233b 2040{
fad95bf5 2041 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b
AK		 2042 struct ieee80211_sta *sta;
2043
2044 IWL_DEBUG_MAC80211(priv, "enter: \n");
2045
fad95bf5 2046 if (!ht_conf->is_ht)
5bbe233b
AK		 2047 return;
2048
fad95bf5 2049 ht_conf->ht_protection =
9ed6bcce 2050 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 2051 ht_conf->non_GF_STA_present =
9ed6bcce 2052 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 2053
02bb1bea
JB		 2054 ht_conf->single_chain_sufficient = false;
2055
2056 switch (priv->iw_mode) {
2057 case NL80211_IFTYPE_STATION:
2058 rcu_read_lock();
5ed176e1 2059 sta = ieee80211_find_sta(priv->vif, priv->bssid);
02bb1bea
JB		 2060 if (sta) {
2061 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2062 int maxstreams;
2063
2064 maxstreams = (ht_cap->mcs.tx_params &
2065 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2066 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2067 maxstreams += 1;
2068
2069 if ((ht_cap->mcs.rx_mask[1] == 0) &&
2070 (ht_cap->mcs.rx_mask[2] == 0))
2071 ht_conf->single_chain_sufficient = true;
2072 if (maxstreams <= 1)
2073 ht_conf->single_chain_sufficient = true;
2074 } else {
2075 /*
2076 * If at all, this can only happen through a race
2077 * when the AP disconnects us while we're still
2078 * setting up the connection, in that case mac80211
2079 * will soon tell us about that.
2080 */
2081 ht_conf->single_chain_sufficient = true;
2082 }
2083 rcu_read_unlock();
2084 break;
2085 case NL80211_IFTYPE_ADHOC:
2086 ht_conf->single_chain_sufficient = true;
2087 break;
2088 default:
2089 break;
2090 }
5bbe233b
AK		 2091
2092 IWL_DEBUG_MAC80211(priv, "leave\n");
2093}
2094
c91c3efc
AK		 2095static inline void iwl_set_no_assoc(struct iwl_priv *priv)
2096{
2097 priv->assoc_id = 0;
2098 iwl_led_disassociate(priv);
2099 /*
2100 * inform the ucode that there is no longer an
2101 * association and that no more packets should be
2102 * sent
2103 */
2104 priv->staging_rxon.filter_flags &=
2105 ~RXON_FILTER_ASSOC_MSK;
2106 priv->staging_rxon.assoc_id = 0;
2107 iwlcore_commit_rxon(priv);
2108}
2109
5bbe233b
AK		 2110#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2111void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2112 struct ieee80211_vif *vif,
2113 struct ieee80211_bss_conf *bss_conf,
2114 u32 changes)
5bbe233b
AK		 2115{
2116 struct iwl_priv *priv = hw->priv;
3a650292 2117 int ret;
5bbe233b
AK		 2118
2119 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2120
2d0ddec5
JB		 2121 if (!iwl_is_alive(priv))
2122 return;
2123
2124 mutex_lock(&priv->mutex);
2125
2126 if (changes & BSS_CHANGED_BEACON &&
2127 priv->iw_mode == NL80211_IFTYPE_AP) {
2128 dev_kfree_skb(priv->ibss_beacon);
2129 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2130 }
2131
d7129e19
JB		 2132 if (changes & BSS_CHANGED_BEACON_INT) {
2133 priv->beacon_int = bss_conf->beacon_int;
2134 /* TODO: in AP mode, do something to make this take effect */
2135 }
2136
2137 if (changes & BSS_CHANGED_BSSID) {
2138 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2139
2140 /*
2141 * If there is currently a HW scan going on in the
2142 * background then we need to cancel it else the RXON
2143 * below/in post_associate will fail.
2144 */
2d0ddec5 2145 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 2146 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 2147 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2148 mutex_unlock(&priv->mutex);
2149 return;
2150 }
2d0ddec5 2151
d7129e19
JB		 2152 /* mac80211 only sets assoc when in STATION mode */
2153 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2154 bss_conf->assoc) {
2155 memcpy(priv->staging_rxon.bssid_addr,
2156 bss_conf->bssid, ETH_ALEN);
2d0ddec5 2157
d7129e19
JB		 2158 /* currently needed in a few places */
2159 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2160 } else {
2161 priv->staging_rxon.filter_flags &=
2162 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 2163 }
d7129e19 2164
2d0ddec5
JB		 2165 }
2166
d7129e19
JB		 2167 /*
2168 * This needs to be after setting the BSSID in case
2169 * mac80211 decides to do both changes at once because
2170 * it will invoke post_associate.
2171 */
2d0ddec5
JB		 2172 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2173 changes & BSS_CHANGED_BEACON) {
2174 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2175
2176 if (beacon)
2177 iwl_mac_beacon_update(hw, beacon);
2178 }
2179
5bbe233b
AK		 2180 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2181 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2182 bss_conf->use_short_preamble);
2183 if (bss_conf->use_short_preamble)
2184 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2185 else
2186 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2187 }
2188
2189 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2190 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2191 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2192 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2193 else
2194 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2195 }
2196
d7129e19
JB		 2197 if (changes & BSS_CHANGED_BASIC_RATES) {
2198 /* XXX use this information
2199 *
2200 * To do that, remove code from iwl_set_rate() and put something
2201 * like this here:
2202 *
2203 if (A-band)
2204 priv->staging_rxon.ofdm_basic_rates =
2205 bss_conf->basic_rates;
2206 else
2207 priv->staging_rxon.ofdm_basic_rates =
2208 bss_conf->basic_rates >> 4;
2209 priv->staging_rxon.cck_basic_rates =
2210 bss_conf->basic_rates & 0xF;
2211 */
2212 }
2213
5bbe233b
AK		 2214 if (changes & BSS_CHANGED_HT) {
2215 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2216
2217 if (priv->cfg->ops->hcmd->set_rxon_chain)
2218 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2219 }
2220
2221 if (changes & BSS_CHANGED_ASSOC) {
2222 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 2223 if (bss_conf->assoc) {
2224 priv->assoc_id = bss_conf->aid;
2225 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 2226 priv->timestamp = bss_conf->timestamp;
2227 priv->assoc_capability = bss_conf->assoc_capability;
2228
e932a609
JB		 2229 iwl_led_associate(priv);
2230
d7129e19
JB		 2231 /*
2232 * We have just associated, don't start scan too early
2233 * leave time for EAPOL exchange to complete.
2234 *
2235 * XXX: do this in mac80211
5bbe233b
AK		 2236 */
2237 priv->next_scan_jiffies = jiffies +
2238 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
d7129e19
JB		 2239 if (!iwl_is_rfkill(priv))
2240 priv->cfg->ops->lib->post_associate(priv);
c91c3efc
AK		 2241 } else
2242 iwl_set_no_assoc(priv);
d7129e19
JB		 2243 }
2244
2245 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2246 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2247 changes);
2248 ret = iwl_send_rxon_assoc(priv);
2249 if (!ret) {
2250 /* Sync active_rxon with latest change. */
2251 memcpy((void *)&priv->active_rxon,
2252 &priv->staging_rxon,
2253 sizeof(struct iwl_rxon_cmd));
5bbe233b 2254 }
5bbe233b 2255 }
d7129e19 2256
c91c3efc
AK		 2257 if (changes & BSS_CHANGED_BEACON_ENABLED) {
2258 if (vif->bss_conf.enable_beacon) {
2259 memcpy(priv->staging_rxon.bssid_addr,
2260 bss_conf->bssid, ETH_ALEN);
2261 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2262 iwlcore_config_ap(priv);
2263 } else
2264 iwl_set_no_assoc(priv);
f513dfff
DH		 2265 }
2266
d7129e19
JB		 2267 mutex_unlock(&priv->mutex);
2268
2d0ddec5 2269 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2270}
2271EXPORT_SYMBOL(iwl_bss_info_changed);
2272
9944b938
AK		 2273int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2274{
2275 struct iwl_priv *priv = hw->priv;
2276 unsigned long flags;
2277 __le64 timestamp;
2278
2279 IWL_DEBUG_MAC80211(priv, "enter\n");
2280
2281 if (!iwl_is_ready_rf(priv)) {
2282 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2283 return -EIO;
2284 }
2285
2286 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2287 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2288 return -EIO;
2289 }
2290
2291 spin_lock_irqsave(&priv->lock, flags);
2292
2293 if (priv->ibss_beacon)
2294 dev_kfree_skb(priv->ibss_beacon);
2295
2296 priv->ibss_beacon = skb;
2297
2298 priv->assoc_id = 0;
2299 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2300 priv->timestamp = le64_to_cpu(timestamp);
2301
2302 IWL_DEBUG_MAC80211(priv, "leave\n");
2303 spin_unlock_irqrestore(&priv->lock, flags);
2304
2305 iwl_reset_qos(priv);
2306
2307 priv->cfg->ops->lib->post_associate(priv);
2308
2309
2310 return 0;
2311}
2312EXPORT_SYMBOL(iwl_mac_beacon_update);
2313
727882d6
AK		 2314int iwl_set_mode(struct iwl_priv *priv, int mode)
2315{
2316 if (mode == NL80211_IFTYPE_ADHOC) {
2317 const struct iwl_channel_info *ch_info;
2318
2319 ch_info = iwl_get_channel_info(priv,
2320 priv->band,
2321 le16_to_cpu(priv->staging_rxon.channel));
2322
2323 if (!ch_info || !is_channel_ibss(ch_info)) {
2324 IWL_ERR(priv, "channel %d not IBSS channel\n",
2325 le16_to_cpu(priv->staging_rxon.channel));
2326 return -EINVAL;
2327 }
2328 }
2329
2330 iwl_connection_init_rx_config(priv, mode);
2331
2332 if (priv->cfg->ops->hcmd->set_rxon_chain)
2333 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2334
2335 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2336
c587de0b 2337 iwl_clear_stations_table(priv);
727882d6
AK		 2338
2339 /* dont commit rxon if rf-kill is on*/
2340 if (!iwl_is_ready_rf(priv))
2341 return -EAGAIN;
2342
727882d6
AK		 2343 iwlcore_commit_rxon(priv);
2344
2345 return 0;
2346}
2347EXPORT_SYMBOL(iwl_set_mode);
2348
cbb6ab94 2349int iwl_mac_add_interface(struct ieee80211_hw *hw,
1ed32e4f 2350 struct ieee80211_vif *vif)
cbb6ab94
AK		 2351{
2352 struct iwl_priv *priv = hw->priv;
47e28f41 2353 int err = 0;
cbb6ab94 2354
1ed32e4f 2355 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
cbb6ab94 2356
47e28f41
JB		 2357 mutex_lock(&priv->mutex);
2358
cbb6ab94
AK		 2359 if (priv->vif) {
2360 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 2361 err = -EOPNOTSUPP;
2362 goto out;
cbb6ab94
AK		 2363 }
2364
1ed32e4f
JB		 2365 priv->vif = vif;
2366 priv->iw_mode = vif->type;
cbb6ab94 2367
1ed32e4f
JB		 2368 if (vif->addr) {
2369 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2370 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
cbb6ab94
AK		 2371 }
2372
1ed32e4f 2373 if (iwl_set_mode(priv, vif->type) == -EAGAIN)
cbb6ab94
AK		 2374 /* we are not ready, will run again when ready */
2375 set_bit(STATUS_MODE_PENDING, &priv->status);
2376
47e28f41 2377 out:
cbb6ab94
AK		 2378 mutex_unlock(&priv->mutex);
2379
2380 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2381 return err;
cbb6ab94
AK		 2382}
2383EXPORT_SYMBOL(iwl_mac_add_interface);
2384
d8052319 2385void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 2386 struct ieee80211_vif *vif)
d8052319
AK		 2387{
2388 struct iwl_priv *priv = hw->priv;
2389
2390 IWL_DEBUG_MAC80211(priv, "enter\n");
2391
2392 mutex_lock(&priv->mutex);
2393
2394 if (iwl_is_ready_rf(priv)) {
2395 iwl_scan_cancel_timeout(priv, 100);
2396 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2397 iwlcore_commit_rxon(priv);
2398 }
1ed32e4f 2399 if (priv->vif == vif) {
d8052319
AK		 2400 priv->vif = NULL;
2401 memset(priv->bssid, 0, ETH_ALEN);
2402 }
2403 mutex_unlock(&priv->mutex);
2404
2405 IWL_DEBUG_MAC80211(priv, "leave\n");
2406
2407}
2408EXPORT_SYMBOL(iwl_mac_remove_interface);
2409
4808368d
AK		 2410/**
2411 * iwl_mac_config - mac80211 config callback
2412 *
2413 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2414 * be set inappropriately and the driver currently sets the hardware up to
2415 * use it whenever needed.
2416 */
2417int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2418{
2419 struct iwl_priv *priv = hw->priv;
2420 const struct iwl_channel_info *ch_info;
2421 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2422 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2423 unsigned long flags = 0;
2424 int ret = 0;
2425 u16 ch;
2426 int scan_active = 0;
2427
2428 mutex_lock(&priv->mutex);
2429
4808368d
AK		 2430 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2431 conf->channel->hw_value, changed);
2432
2433 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2434 test_bit(STATUS_SCANNING, &priv->status))) {
2435 scan_active = 1;
2436 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2437 }
2438
ba37a3d0
JB		 2439 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2440 IEEE80211_CONF_CHANGE_CHANNEL)) {
2441 /* mac80211 uses static for non-HT which is what we want */
2442 priv->current_ht_config.smps = conf->smps_mode;
2443
2444 /*
2445 * Recalculate chain counts.
2446 *
2447 * If monitor mode is enabled then mac80211 will
2448 * set up the SM PS mode to OFF if an HT channel is
2449 * configured.
2450 */
2451 if (priv->cfg->ops->hcmd->set_rxon_chain)
2452 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2453 }
4808368d
AK		 2454
2455 /* during scanning mac80211 will delay channel setting until
2456 * scan finish with changed = 0
2457 */
2458 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2459 if (scan_active)
2460 goto set_ch_out;
2461
2462 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2463 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2464 if (!is_channel_valid(ch_info)) {
2465 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2466 ret = -EINVAL;
2467 goto set_ch_out;
2468 }
2469
2470 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2471 !is_channel_ibss(ch_info)) {
2472 IWL_ERR(priv, "channel %d in band %d not "
2473 "IBSS channel\n",
2474 conf->channel->hw_value, conf->channel->band);
2475 ret = -EINVAL;
2476 goto set_ch_out;
2477 }
2478
4808368d
AK		 2479 spin_lock_irqsave(&priv->lock, flags);
2480
28bd723b
DH		 2481 /* Configure HT40 channels */
2482 ht_conf->is_ht = conf_is_ht(conf);
2483 if (ht_conf->is_ht) {
2484 if (conf_is_ht40_minus(conf)) {
2485 ht_conf->extension_chan_offset =
2486 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2487 ht_conf->is_40mhz = true;
28bd723b
DH		 2488 } else if (conf_is_ht40_plus(conf)) {
2489 ht_conf->extension_chan_offset =
2490 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2491 ht_conf->is_40mhz = true;
28bd723b
DH		 2492 } else {
2493 ht_conf->extension_chan_offset =
2494 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2495 ht_conf->is_40mhz = false;
28bd723b
DH		 2496 }
2497 } else
c812ee24 2498 ht_conf->is_40mhz = false;
28bd723b
DH		 2499 /* Default to no protection. Protection mode will later be set
2500 * from BSS config in iwl_ht_conf */
2501 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2502
2503 /* if we are switching from ht to 2.4 clear flags
2504 * from any ht related info since 2.4 does not
2505 * support ht */
2506 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2507 priv->staging_rxon.flags = 0;
2508
2509 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2510 iwl_set_rxon_ht(priv, ht_conf);
4808368d
AK		 2511
2512 iwl_set_flags_for_band(priv, conf->channel->band);
2513 spin_unlock_irqrestore(&priv->lock, flags);
0924e519
WYG		 2514 if (iwl_is_associated(priv) &&
2515 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2516 priv->cfg->ops->lib->set_channel_switch) {
2517 iwl_set_rate(priv);
2518 /*
2519 * at this point, staging_rxon has the
2520 * configuration for channel switch
2521 */
2522 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2523 ch);
2524 if (!ret) {
2525 iwl_print_rx_config_cmd(priv);
2526 goto out;
2527 }
2528 priv->switch_rxon.switch_in_progress = false;
2529 }
4808368d
AK		 2530 set_ch_out:
2531 /* The list of supported rates and rate mask can be different
2532 * for each band; since the band may have changed, reset
2533 * the rate mask to what mac80211 lists */
2534 iwl_set_rate(priv);
2535 }
2536
78f5fb7f
JB		 2537 if (changed & (IEEE80211_CONF_CHANGE_PS |
2538 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2539 ret = iwl_power_update_mode(priv, false);
4808368d 2540 if (ret)
e312c24c 2541 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2542 }
2543
2544 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2545 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2546 priv->tx_power_user_lmt, conf->power_level);
2547
2548 iwl_set_tx_power(priv, conf->power_level, false);
2549 }
2550
0cf4c01e
MA		 2551 if (!iwl_is_ready(priv)) {
2552 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2553 goto out;
2554 }
2555
4808368d
AK		 2556 if (scan_active)
2557 goto out;
2558
2559 if (memcmp(&priv->active_rxon,
2560 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2561 iwlcore_commit_rxon(priv);
2562 else
2563 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2564
2565
2566out:
2567 IWL_DEBUG_MAC80211(priv, "leave\n");
2568 mutex_unlock(&priv->mutex);
2569 return ret;
2570}
2571EXPORT_SYMBOL(iwl_mac_config);
2572
bd564261
AK		 2573void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2574{
2575 struct iwl_priv *priv = hw->priv;
2576 unsigned long flags;
2577
2578 mutex_lock(&priv->mutex);
2579 IWL_DEBUG_MAC80211(priv, "enter\n");
2580
2581 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2582 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2583 spin_unlock_irqrestore(&priv->lock, flags);
2584
2585 iwl_reset_qos(priv);
2586
2587 spin_lock_irqsave(&priv->lock, flags);
2588 priv->assoc_id = 0;
2589 priv->assoc_capability = 0;
2590 priv->assoc_station_added = 0;
2591
2592 /* new association get rid of ibss beacon skb */
2593 if (priv->ibss_beacon)
2594 dev_kfree_skb(priv->ibss_beacon);
2595
2596 priv->ibss_beacon = NULL;
2597
57c4d7b4 2598 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2599 priv->timestamp = 0;
2600 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2601 priv->beacon_int = 0;
2602
2603 spin_unlock_irqrestore(&priv->lock, flags);
2604
2605 if (!iwl_is_ready_rf(priv)) {
2606 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2607 mutex_unlock(&priv->mutex);
2608 return;
2609 }
2610
2611 /* we are restarting association process
2612 * clear RXON_FILTER_ASSOC_MSK bit
2613 */
2614 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2615 iwl_scan_cancel_timeout(priv, 100);
2616 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2617 iwlcore_commit_rxon(priv);
2618 }
2619
bd564261 2620 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
bd564261
AK		 2621 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2622 mutex_unlock(&priv->mutex);
2623 return;
2624 }
2625
2626 iwl_set_rate(priv);
2627
2628 mutex_unlock(&priv->mutex);
2629
2630 IWL_DEBUG_MAC80211(priv, "leave\n");
2631}
2632EXPORT_SYMBOL(iwl_mac_reset_tsf);
2633
88804e2b
WYG		 2634int iwl_alloc_txq_mem(struct iwl_priv *priv)
2635{
2636 if (!priv->txq)
2637 priv->txq = kzalloc(
2638 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2639 GFP_KERNEL);
2640 if (!priv->txq) {
2641 IWL_ERR(priv, "Not enough memory for txq \n");
2642 return -ENOMEM;
2643 }
2644 return 0;
2645}
2646EXPORT_SYMBOL(iwl_alloc_txq_mem);
2647
2648void iwl_free_txq_mem(struct iwl_priv *priv)
2649{
2650 kfree(priv->txq);
2651 priv->txq = NULL;
2652}
2653EXPORT_SYMBOL(iwl_free_txq_mem);
2654
1933ac4d
WYG		 2655int iwl_send_wimax_coex(struct iwl_priv *priv)
2656{
2657 struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2658
2659 if (priv->cfg->support_wimax_coexist) {
2660 /* UnMask wake up src at associated sleep */
2661 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2662
2663 /* UnMask wake up src at unassociated sleep */
2664 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2665 memcpy(coex_cmd.sta_prio, cu_priorities,
2666 sizeof(struct iwl_wimax_coex_event_entry) *
2667 COEX_NUM_OF_EVENTS);
2668
2669 /* enabling the coexistence feature */
2670 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2671
2672 /* enabling the priorities tables */
2673 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2674 } else {
2675 /* coexistence is disabled */
2676 memset(&coex_cmd, 0, sizeof(coex_cmd));
2677 }
2678 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2679 sizeof(coex_cmd), &coex_cmd);
2680}
2681EXPORT_SYMBOL(iwl_send_wimax_coex);
2682
20594eb0
WYG		 2683#ifdef CONFIG_IWLWIFI_DEBUGFS
2684
2685#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2686
2687void iwl_reset_traffic_log(struct iwl_priv *priv)
2688{
2689 priv->tx_traffic_idx = 0;
2690 priv->rx_traffic_idx = 0;
2691 if (priv->tx_traffic)
2692 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2693 if (priv->rx_traffic)
2694 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2695}
2696
2697int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2698{
2699 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2700
2701 if (iwl_debug_level & IWL_DL_TX) {
2702 if (!priv->tx_traffic) {
2703 priv->tx_traffic =
2704 kzalloc(traffic_size, GFP_KERNEL);
2705 if (!priv->tx_traffic)
2706 return -ENOMEM;
2707 }
2708 }
2709 if (iwl_debug_level & IWL_DL_RX) {
2710 if (!priv->rx_traffic) {
2711 priv->rx_traffic =
2712 kzalloc(traffic_size, GFP_KERNEL);
2713 if (!priv->rx_traffic)
2714 return -ENOMEM;
2715 }
2716 }
2717 iwl_reset_traffic_log(priv);
2718 return 0;
2719}
2720EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2721
2722void iwl_free_traffic_mem(struct iwl_priv *priv)
2723{
2724 kfree(priv->tx_traffic);
2725 priv->tx_traffic = NULL;
2726
2727 kfree(priv->rx_traffic);
2728 priv->rx_traffic = NULL;
2729}
2730EXPORT_SYMBOL(iwl_free_traffic_mem);
2731
2732void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2733 u16 length, struct ieee80211_hdr *header)
2734{
2735 __le16 fc;
2736 u16 len;
2737
2738 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2739 return;
2740
2741 if (!priv->tx_traffic)
2742 return;
2743
2744 fc = header->frame_control;
2745 if (ieee80211_is_data(fc)) {
2746 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2747 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2748 memcpy((priv->tx_traffic +
2749 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2750 header, len);
2751 priv->tx_traffic_idx =
2752 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2753 }
2754}
2755EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2756
2757void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2758 u16 length, struct ieee80211_hdr *header)
2759{
2760 __le16 fc;
2761 u16 len;
2762
2763 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2764 return;
2765
2766 if (!priv->rx_traffic)
2767 return;
2768
2769 fc = header->frame_control;
2770 if (ieee80211_is_data(fc)) {
2771 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2772 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2773 memcpy((priv->rx_traffic +
2774 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2775 header, len);
2776 priv->rx_traffic_idx =
2777 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2778 }
2779}
2780EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2781
2782const char *get_mgmt_string(int cmd)
2783{
2784 switch (cmd) {
2785 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2786 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2787 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2788 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2789 IWL_CMD(MANAGEMENT_PROBE_REQ);
2790 IWL_CMD(MANAGEMENT_PROBE_RESP);
2791 IWL_CMD(MANAGEMENT_BEACON);
2792 IWL_CMD(MANAGEMENT_ATIM);
2793 IWL_CMD(MANAGEMENT_DISASSOC);
2794 IWL_CMD(MANAGEMENT_AUTH);
2795 IWL_CMD(MANAGEMENT_DEAUTH);
2796 IWL_CMD(MANAGEMENT_ACTION);
2797 default:
2798 return "UNKNOWN";
2799
2800 }
2801}
2802
2803const char *get_ctrl_string(int cmd)
2804{
2805 switch (cmd) {
2806 IWL_CMD(CONTROL_BACK_REQ);
2807 IWL_CMD(CONTROL_BACK);
2808 IWL_CMD(CONTROL_PSPOLL);
2809 IWL_CMD(CONTROL_RTS);
2810 IWL_CMD(CONTROL_CTS);
2811 IWL_CMD(CONTROL_ACK);
2812 IWL_CMD(CONTROL_CFEND);
2813 IWL_CMD(CONTROL_CFENDACK);
2814 default:
2815 return "UNKNOWN";
2816
2817 }
2818}
2819
7163b8a4 2820void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2821{
2822 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2823 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2824 priv->led_tpt = 0;
22fdf3c9
WYG		 2825}
2826
2827/*
2828 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2829 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2830 * Use debugFs to display the rx/rx_statistics
2831 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2832 * information will be recorded, but DATA pkt still will be recorded
2833 * for the reason of iwl_led.c need to control the led blinking based on
2834 * number of tx and rx data.
2835 *
2836 */
2837void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2838{
2839 struct traffic_stats *stats;
2840
2841 if (is_tx)
2842 stats = &priv->tx_stats;
2843 else
2844 stats = &priv->rx_stats;
2845
2846 if (ieee80211_is_mgmt(fc)) {
2847 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2848 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2849 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2850 break;
2851 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2852 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2853 break;
2854 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2855 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2856 break;
2857 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2858 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2859 break;
2860 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2861 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2862 break;
2863 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2864 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2865 break;
2866 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2867 stats->mgmt[MANAGEMENT_BEACON]++;
2868 break;
2869 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2870 stats->mgmt[MANAGEMENT_ATIM]++;
2871 break;
2872 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2873 stats->mgmt[MANAGEMENT_DISASSOC]++;
2874 break;
2875 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2876 stats->mgmt[MANAGEMENT_AUTH]++;
2877 break;
2878 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2879 stats->mgmt[MANAGEMENT_DEAUTH]++;
2880 break;
2881 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2882 stats->mgmt[MANAGEMENT_ACTION]++;
2883 break;
2884 }
2885 } else if (ieee80211_is_ctl(fc)) {
2886 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2887 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2888 stats->ctrl[CONTROL_BACK_REQ]++;
2889 break;
2890 case cpu_to_le16(IEEE80211_STYPE_BACK):
2891 stats->ctrl[CONTROL_BACK]++;
2892 break;
2893 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2894 stats->ctrl[CONTROL_PSPOLL]++;
2895 break;
2896 case cpu_to_le16(IEEE80211_STYPE_RTS):
2897 stats->ctrl[CONTROL_RTS]++;
2898 break;
2899 case cpu_to_le16(IEEE80211_STYPE_CTS):
2900 stats->ctrl[CONTROL_CTS]++;
2901 break;
2902 case cpu_to_le16(IEEE80211_STYPE_ACK):
2903 stats->ctrl[CONTROL_ACK]++;
2904 break;
2905 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2906 stats->ctrl[CONTROL_CFEND]++;
2907 break;
2908 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2909 stats->ctrl[CONTROL_CFENDACK]++;
2910 break;
2911 }
2912 } else {
2913 /* data */
2914 stats->data_cnt++;
2915 stats->data_bytes += len;
2916 }
d5f4cf71 2917 iwl_leds_background(priv);
22fdf3c9
WYG		 2918}
2919EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2920#endif
2921
696bdee3
WYG		 2922const static char *get_csr_string(int cmd)
2923{
2924 switch (cmd) {
2925 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2926 IWL_CMD(CSR_INT_COALESCING);
2927 IWL_CMD(CSR_INT);
2928 IWL_CMD(CSR_INT_MASK);
2929 IWL_CMD(CSR_FH_INT_STATUS);
2930 IWL_CMD(CSR_GPIO_IN);
2931 IWL_CMD(CSR_RESET);
2932 IWL_CMD(CSR_GP_CNTRL);
2933 IWL_CMD(CSR_HW_REV);
2934 IWL_CMD(CSR_EEPROM_REG);
2935 IWL_CMD(CSR_EEPROM_GP);
2936 IWL_CMD(CSR_OTP_GP_REG);
2937 IWL_CMD(CSR_GIO_REG);
2938 IWL_CMD(CSR_GP_UCODE_REG);
2939 IWL_CMD(CSR_GP_DRIVER_REG);
2940 IWL_CMD(CSR_UCODE_DRV_GP1);
2941 IWL_CMD(CSR_UCODE_DRV_GP2);
2942 IWL_CMD(CSR_LED_REG);
2943 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2944 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2945 IWL_CMD(CSR_ANA_PLL_CFG);
2946 IWL_CMD(CSR_HW_REV_WA_REG);
2947 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2948 default:
2949 return "UNKNOWN";
2950
2951 }
2952}
2953
2954void iwl_dump_csr(struct iwl_priv *priv)
2955{
2956 int i;
2957 u32 csr_tbl[] = {
2958 CSR_HW_IF_CONFIG_REG,
2959 CSR_INT_COALESCING,
2960 CSR_INT,
2961 CSR_INT_MASK,
2962 CSR_FH_INT_STATUS,
2963 CSR_GPIO_IN,
2964 CSR_RESET,
2965 CSR_GP_CNTRL,
2966 CSR_HW_REV,
2967 CSR_EEPROM_REG,
2968 CSR_EEPROM_GP,
2969 CSR_OTP_GP_REG,
2970 CSR_GIO_REG,
2971 CSR_GP_UCODE_REG,
2972 CSR_GP_DRIVER_REG,
2973 CSR_UCODE_DRV_GP1,
2974 CSR_UCODE_DRV_GP2,
2975 CSR_LED_REG,
2976 CSR_DRAM_INT_TBL_REG,
2977 CSR_GIO_CHICKEN_BITS,
2978 CSR_ANA_PLL_CFG,
2979 CSR_HW_REV_WA_REG,
2980 CSR_DBG_HPET_MEM_REG
2981 };
2982 IWL_ERR(priv, "CSR values:\n");
2983 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2984 "CSR_INT_PERIODIC_REG)\n");
2985 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2986 IWL_ERR(priv, " %25s: 0X%08x\n",
2987 get_csr_string(csr_tbl[i]),
2988 iwl_read32(priv, csr_tbl[i]));
2989 }
2990}
2991EXPORT_SYMBOL(iwl_dump_csr);
2992
1b3eb823
WYG		 2993const static char *get_fh_string(int cmd)
2994{
2995 switch (cmd) {
2996 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2997 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2998 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2999 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
3000 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
3001 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
3002 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
3003 IWL_CMD(FH_TSSR_TX_STATUS_REG);
3004 IWL_CMD(FH_TSSR_TX_ERROR_REG);
3005 default:
3006 return "UNKNOWN";
3007
3008 }
3009}
3010
3011int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
3012{
3013 int i;
3014#ifdef CONFIG_IWLWIFI_DEBUG
3015 int pos = 0;
3016 size_t bufsz = 0;
3017#endif
3018 u32 fh_tbl[] = {
3019 FH_RSCSR_CHNL0_STTS_WPTR_REG,
3020 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
3021 FH_RSCSR_CHNL0_WPTR,
3022 FH_MEM_RCSR_CHNL0_CONFIG_REG,
3023 FH_MEM_RSSR_SHARED_CTRL_REG,
3024 FH_MEM_RSSR_RX_STATUS_REG,
3025 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
3026 FH_TSSR_TX_STATUS_REG,
3027 FH_TSSR_TX_ERROR_REG
3028 };
3029#ifdef CONFIG_IWLWIFI_DEBUG
3030 if (display) {
3031 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
3032 *buf = kmalloc(bufsz, GFP_KERNEL);
3033 if (!*buf)
3034 return -ENOMEM;
3035 pos += scnprintf(*buf + pos, bufsz - pos,
3036 "FH register values:\n");
3037 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
3038 pos += scnprintf(*buf + pos, bufsz - pos,
3039 " %34s: 0X%08x\n",
3040 get_fh_string(fh_tbl[i]),
3041 iwl_read_direct32(priv, fh_tbl[i]));
3042 }
3043 return pos;
3044 }
3045#endif
3046 IWL_ERR(priv, "FH register values:\n");
3047 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
3048 IWL_ERR(priv, " %34s: 0X%08x\n",
3049 get_fh_string(fh_tbl[i]),
3050 iwl_read_direct32(priv, fh_tbl[i]));
3051 }
3052 return 0;
3053}
3054EXPORT_SYMBOL(iwl_dump_fh);
3055
a93e7973 3056static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 3057{
3058 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3059 return;
3060
3061 if (!iwl_is_associated(priv)) {
3062 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
3063 return;
3064 }
3065 /*
3066 * There is no easy and better way to force reset the radio,
3067 * the only known method is switching channel which will force to
3068 * reset and tune the radio.
3069 * Use internal short scan (single channel) operation to should
3070 * achieve this objective.
3071 * Driver should reset the radio when number of consecutive missed
3072 * beacon, or any other uCode error condition detected.
3073 */
3074 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
3075 iwl_internal_short_hw_scan(priv);
3076 return;
3077}
a93e7973 3078
a93e7973
WYG		 3079
3080int iwl_force_reset(struct iwl_priv *priv, int mode)
3081{
8a472da4
WYG		 3082 struct iwl_force_reset *force_reset;
3083
a93e7973
WYG		 3084 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3085 return -EINVAL;
3086
8a472da4
WYG		 3087 if (mode >= IWL_MAX_FORCE_RESET) {
3088 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
3089 return -EINVAL;
3090 }
3091 force_reset = &priv->force_reset[mode];
3092 force_reset->reset_request_count++;
3093 if (force_reset->last_force_reset_jiffies &&
3094 time_after(force_reset->last_force_reset_jiffies +
3095 force_reset->reset_duration, jiffies)) {
a93e7973 3096 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 3097 force_reset->reset_reject_count++;
a93e7973
WYG		 3098 return -EAGAIN;
3099 }
8a472da4
WYG		 3100 force_reset->reset_success_count++;
3101 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 3102 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 3103 switch (mode) {
3104 case IWL_RF_RESET:
3105 iwl_force_rf_reset(priv);
3106 break;
3107 case IWL_FW_RESET:
3108 IWL_ERR(priv, "On demand firmware reload\n");
3109 /* Set the FW error flag -- cleared on iwl_down */
3110 set_bit(STATUS_FW_ERROR, &priv->status);
3111 wake_up_interruptible(&priv->wait_command_queue);
3112 /*
3113 * Keep the restart process from trying to send host
3114 * commands by clearing the INIT status bit
3115 */
3116 clear_bit(STATUS_READY, &priv->status);
3117 queue_work(priv->workqueue, &priv->restart);
3118 break;
a93e7973 3119 }
a93e7973
WYG		 3120 return 0;
3121}
afbdd69a 3122
6da3a13e
WYG		 3123#ifdef CONFIG_PM
3124
3125int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3126{
3127 struct iwl_priv *priv = pci_get_drvdata(pdev);
3128
3129 /*
3130 * This function is called when system goes into suspend state
3131 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3132 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3133 * it will not call apm_ops.stop() to stop the DMA operation.
3134 * Calling apm_ops.stop here to make sure we stop the DMA.
3135 */
3136 priv->cfg->ops->lib->apm_ops.stop(priv);
3137
3138 pci_save_state(pdev);
3139 pci_disable_device(pdev);
3140 pci_set_power_state(pdev, PCI_D3hot);
3141
3142 return 0;
3143}
3144EXPORT_SYMBOL(iwl_pci_suspend);
3145
3146int iwl_pci_resume(struct pci_dev *pdev)
3147{
3148 struct iwl_priv *priv = pci_get_drvdata(pdev);
3149 int ret;
3150
3151 pci_set_power_state(pdev, PCI_D0);
3152 ret = pci_enable_device(pdev);
3153 if (ret)
3154 return ret;
3155 pci_restore_state(pdev);
3156 iwl_enable_interrupts(priv);
3157
3158 return 0;
3159}
3160EXPORT_SYMBOL(iwl_pci_resume);
3161
3162#endif /* CONFIG_PM */
Linux kernel - Deliverables
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