Commit | Line | Data |
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df48c323 | 1 | /****************************************************************************** |
df48c323 TW |
2 | * |
3 | * GPL LICENSE SUMMARY | |
4 | * | |
1f447808 | 5 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. |
df48c323 TW |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of version 2 of the GNU General Public License as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
19 | * USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution | |
22 | * in the file called LICENSE.GPL. | |
23 | * | |
24 | * Contact Information: | |
759ef89f | 25 | * Intel Linux Wireless <ilw@linux.intel.com> |
df48c323 TW |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | *****************************************************************************/ | |
28 | ||
29 | #include <linux/kernel.h> | |
30 | #include <linux/module.h> | |
8ccde88a | 31 | #include <linux/etherdevice.h> |
d43c36dc | 32 | #include <linux/sched.h> |
5a0e3ad6 | 33 | #include <linux/slab.h> |
1d0a082d | 34 | #include <net/mac80211.h> |
df48c323 | 35 | |
6bc913bd | 36 | #include "iwl-eeprom.h" |
3e0d4cb1 | 37 | #include "iwl-dev.h" /* FIXME: remove */ |
19335774 | 38 | #include "iwl-debug.h" |
df48c323 | 39 | #include "iwl-core.h" |
b661c819 | 40 | #include "iwl-io.h" |
5da4b55f | 41 | #include "iwl-power.h" |
83dde8c9 | 42 | #include "iwl-sta.h" |
ef850d7c | 43 | #include "iwl-helpers.h" |
df48c323 | 44 | |
1d0a082d | 45 | |
df48c323 TW |
46 | MODULE_DESCRIPTION("iwl core"); |
47 | MODULE_VERSION(IWLWIFI_VERSION); | |
a7b75207 | 48 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
712b6cf5 | 49 | MODULE_LICENSE("GPL"); |
df48c323 | 50 | |
06702a73 WYG |
51 | /* |
52 | * set bt_coex_active to true, uCode will do kill/defer | |
53 | * every time the priority line is asserted (BT is sending signals on the | |
54 | * priority line in the PCIx). | |
55 | * set bt_coex_active to false, uCode will ignore the BT activity and | |
56 | * perform the normal operation | |
57 | * | |
58 | * User might experience transmit issue on some platform due to WiFi/BT | |
59 | * co-exist problem. The possible behaviors are: | |
60 | * Able to scan and finding all the available AP | |
61 | * Not able to associate with any AP | |
62 | * On those platforms, WiFi communication can be restored by set | |
63 | * "bt_coex_active" module parameter to "false" | |
64 | * | |
65 | * default: bt_coex_active = true (BT_COEX_ENABLE) | |
66 | */ | |
670245ed JB |
67 | bool bt_coex_active = true; |
68 | EXPORT_SYMBOL_GPL(bt_coex_active); | |
06702a73 | 69 | module_param(bt_coex_active, bool, S_IRUGO); |
6c69d121 | 70 | MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist"); |
06702a73 | 71 | |
a562a9dd RC |
72 | u32 iwl_debug_level; |
73 | EXPORT_SYMBOL(iwl_debug_level); | |
74 | ||
57bd1bea TW |
75 | const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
76 | EXPORT_SYMBOL(iwl_bcast_addr); | |
77 | ||
78 | ||
1d0a082d | 79 | /* This function both allocates and initializes hw and priv. */ |
dc21b545 | 80 | struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg) |
1d0a082d AK |
81 | { |
82 | struct iwl_priv *priv; | |
1d0a082d AK |
83 | /* mac80211 allocates memory for this device instance, including |
84 | * space for this driver's private structure */ | |
dc21b545 JB |
85 | struct ieee80211_hw *hw; |
86 | ||
87 | hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), | |
88 | cfg->ops->ieee80211_ops); | |
1d0a082d | 89 | if (hw == NULL) { |
c96c31e4 | 90 | pr_err("%s: Can not allocate network device\n", |
a3139c59 | 91 | cfg->name); |
1d0a082d AK |
92 | goto out; |
93 | } | |
94 | ||
95 | priv = hw->priv; | |
96 | priv->hw = hw; | |
97 | ||
98 | out: | |
99 | return hw; | |
100 | } | |
101 | EXPORT_SYMBOL(iwl_alloc_all); | |
102 | ||
14d2aac5 AK |
103 | /* |
104 | * QoS support | |
105 | */ | |
8dfdb9d5 | 106 | static void iwl_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx) |
14d2aac5 AK |
107 | { |
108 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
109 | return; | |
110 | ||
763cc3bf JB |
111 | if (!ctx->is_active) |
112 | return; | |
113 | ||
8dfdb9d5 | 114 | ctx->qos_data.def_qos_parm.qos_flags = 0; |
14d2aac5 | 115 | |
8dfdb9d5 JB |
116 | if (ctx->qos_data.qos_active) |
117 | ctx->qos_data.def_qos_parm.qos_flags |= | |
14d2aac5 AK |
118 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; |
119 | ||
7e6a5886 | 120 | if (ctx->ht.enabled) |
8dfdb9d5 | 121 | ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
14d2aac5 | 122 | |
e61146e3 | 123 | IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
8dfdb9d5 JB |
124 | ctx->qos_data.qos_active, |
125 | ctx->qos_data.def_qos_parm.qos_flags); | |
14d2aac5 | 126 | |
8dfdb9d5 | 127 | iwl_send_cmd_pdu_async(priv, ctx->qos_cmd, |
e61146e3 | 128 | sizeof(struct iwl_qosparam_cmd), |
8dfdb9d5 | 129 | &ctx->qos_data.def_qos_parm, NULL); |
14d2aac5 | 130 | } |
c7de35cd | 131 | |
d9fe60de JB |
132 | #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */ |
133 | #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */ | |
c7de35cd | 134 | static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv, |
d9fe60de | 135 | struct ieee80211_sta_ht_cap *ht_info, |
c7de35cd RR |
136 | enum ieee80211_band band) |
137 | { | |
39130df3 RR |
138 | u16 max_bit_rate = 0; |
139 | u8 rx_chains_num = priv->hw_params.rx_chains_num; | |
140 | u8 tx_chains_num = priv->hw_params.tx_chains_num; | |
141 | ||
c7de35cd | 142 | ht_info->cap = 0; |
d9fe60de | 143 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
c7de35cd | 144 | |
d9fe60de | 145 | ht_info->ht_supported = true; |
c7de35cd | 146 | |
7cb1b088 WYG |
147 | if (priv->cfg->ht_params && |
148 | priv->cfg->ht_params->ht_greenfield_support) | |
b261793d | 149 | ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD; |
d9fe60de | 150 | ht_info->cap |= IEEE80211_HT_CAP_SGI_20; |
39130df3 | 151 | max_bit_rate = MAX_BIT_RATE_20_MHZ; |
7aafef1c | 152 | if (priv->hw_params.ht40_channel & BIT(band)) { |
d9fe60de JB |
153 | ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
154 | ht_info->cap |= IEEE80211_HT_CAP_SGI_40; | |
155 | ht_info->mcs.rx_mask[4] = 0x01; | |
39130df3 | 156 | max_bit_rate = MAX_BIT_RATE_40_MHZ; |
c7de35cd | 157 | } |
c7de35cd RR |
158 | |
159 | if (priv->cfg->mod_params->amsdu_size_8K) | |
d9fe60de | 160 | ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
c7de35cd RR |
161 | |
162 | ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF; | |
7cb1b088 WYG |
163 | if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor) |
164 | ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor; | |
c7de35cd | 165 | ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF; |
7cb1b088 WYG |
166 | if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density) |
167 | ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density; | |
c7de35cd | 168 | |
d9fe60de | 169 | ht_info->mcs.rx_mask[0] = 0xFF; |
39130df3 | 170 | if (rx_chains_num >= 2) |
d9fe60de | 171 | ht_info->mcs.rx_mask[1] = 0xFF; |
39130df3 | 172 | if (rx_chains_num >= 3) |
d9fe60de | 173 | ht_info->mcs.rx_mask[2] = 0xFF; |
39130df3 RR |
174 | |
175 | /* Highest supported Rx data rate */ | |
176 | max_bit_rate *= rx_chains_num; | |
d9fe60de JB |
177 | WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK); |
178 | ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate); | |
39130df3 RR |
179 | |
180 | /* Tx MCS capabilities */ | |
d9fe60de | 181 | ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; |
39130df3 | 182 | if (tx_chains_num != rx_chains_num) { |
d9fe60de JB |
183 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
184 | ht_info->mcs.tx_params |= ((tx_chains_num - 1) << | |
185 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); | |
39130df3 | 186 | } |
c7de35cd | 187 | } |
c7de35cd | 188 | |
c7de35cd RR |
189 | /** |
190 | * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom | |
191 | */ | |
534166de | 192 | int iwlcore_init_geos(struct iwl_priv *priv) |
c7de35cd RR |
193 | { |
194 | struct iwl_channel_info *ch; | |
195 | struct ieee80211_supported_band *sband; | |
196 | struct ieee80211_channel *channels; | |
197 | struct ieee80211_channel *geo_ch; | |
198 | struct ieee80211_rate *rates; | |
199 | int i = 0; | |
200 | ||
201 | if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates || | |
202 | priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) { | |
e1623446 | 203 | IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n"); |
c7de35cd RR |
204 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); |
205 | return 0; | |
206 | } | |
207 | ||
208 | channels = kzalloc(sizeof(struct ieee80211_channel) * | |
209 | priv->channel_count, GFP_KERNEL); | |
210 | if (!channels) | |
211 | return -ENOMEM; | |
212 | ||
5027309b | 213 | rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY), |
c7de35cd RR |
214 | GFP_KERNEL); |
215 | if (!rates) { | |
216 | kfree(channels); | |
217 | return -ENOMEM; | |
218 | } | |
219 | ||
220 | /* 5.2GHz channels start after the 2.4GHz channels */ | |
221 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; | |
222 | sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)]; | |
223 | /* just OFDM */ | |
224 | sband->bitrates = &rates[IWL_FIRST_OFDM_RATE]; | |
5027309b | 225 | sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE; |
c7de35cd | 226 | |
49779293 | 227 | if (priv->cfg->sku & IWL_SKU_N) |
d9fe60de | 228 | iwlcore_init_ht_hw_capab(priv, &sband->ht_cap, |
49779293 | 229 | IEEE80211_BAND_5GHZ); |
c7de35cd RR |
230 | |
231 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; | |
232 | sband->channels = channels; | |
233 | /* OFDM & CCK */ | |
234 | sband->bitrates = rates; | |
5027309b | 235 | sband->n_bitrates = IWL_RATE_COUNT_LEGACY; |
c7de35cd | 236 | |
49779293 | 237 | if (priv->cfg->sku & IWL_SKU_N) |
d9fe60de | 238 | iwlcore_init_ht_hw_capab(priv, &sband->ht_cap, |
49779293 | 239 | IEEE80211_BAND_2GHZ); |
c7de35cd RR |
240 | |
241 | priv->ieee_channels = channels; | |
242 | priv->ieee_rates = rates; | |
243 | ||
c7de35cd RR |
244 | for (i = 0; i < priv->channel_count; i++) { |
245 | ch = &priv->channel_info[i]; | |
246 | ||
247 | /* FIXME: might be removed if scan is OK */ | |
248 | if (!is_channel_valid(ch)) | |
249 | continue; | |
250 | ||
251 | if (is_channel_a_band(ch)) | |
252 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; | |
253 | else | |
254 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; | |
255 | ||
256 | geo_ch = &sband->channels[sband->n_channels++]; | |
257 | ||
258 | geo_ch->center_freq = | |
259 | ieee80211_channel_to_frequency(ch->channel); | |
260 | geo_ch->max_power = ch->max_power_avg; | |
261 | geo_ch->max_antenna_gain = 0xff; | |
262 | geo_ch->hw_value = ch->channel; | |
263 | ||
264 | if (is_channel_valid(ch)) { | |
265 | if (!(ch->flags & EEPROM_CHANNEL_IBSS)) | |
266 | geo_ch->flags |= IEEE80211_CHAN_NO_IBSS; | |
267 | ||
268 | if (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) | |
269 | geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN; | |
270 | ||
271 | if (ch->flags & EEPROM_CHANNEL_RADAR) | |
272 | geo_ch->flags |= IEEE80211_CHAN_RADAR; | |
273 | ||
7aafef1c | 274 | geo_ch->flags |= ch->ht40_extension_channel; |
4d38c2e8 | 275 | |
dc1b0973 WYG |
276 | if (ch->max_power_avg > priv->tx_power_device_lmt) |
277 | priv->tx_power_device_lmt = ch->max_power_avg; | |
c7de35cd RR |
278 | } else { |
279 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; | |
280 | } | |
281 | ||
e1623446 | 282 | IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", |
c7de35cd RR |
283 | ch->channel, geo_ch->center_freq, |
284 | is_channel_a_band(ch) ? "5.2" : "2.4", | |
285 | geo_ch->flags & IEEE80211_CHAN_DISABLED ? | |
286 | "restricted" : "valid", | |
287 | geo_ch->flags); | |
288 | } | |
289 | ||
290 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && | |
291 | priv->cfg->sku & IWL_SKU_A) { | |
978785a3 TW |
292 | IWL_INFO(priv, "Incorrectly detected BG card as ABG. " |
293 | "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n", | |
a3139c59 SO |
294 | priv->pci_dev->device, |
295 | priv->pci_dev->subsystem_device); | |
c7de35cd RR |
296 | priv->cfg->sku &= ~IWL_SKU_A; |
297 | } | |
298 | ||
978785a3 | 299 | IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n", |
a3139c59 SO |
300 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, |
301 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); | |
c7de35cd RR |
302 | |
303 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
304 | ||
305 | return 0; | |
306 | } | |
534166de | 307 | EXPORT_SYMBOL(iwlcore_init_geos); |
c7de35cd RR |
308 | |
309 | /* | |
310 | * iwlcore_free_geos - undo allocations in iwlcore_init_geos | |
311 | */ | |
534166de | 312 | void iwlcore_free_geos(struct iwl_priv *priv) |
c7de35cd RR |
313 | { |
314 | kfree(priv->ieee_channels); | |
315 | kfree(priv->ieee_rates); | |
316 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
317 | } | |
534166de | 318 | EXPORT_SYMBOL(iwlcore_free_geos); |
c7de35cd | 319 | |
37dc70fe | 320 | /* |
94597ab2 | 321 | * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this |
37dc70fe AK |
322 | * function. |
323 | */ | |
94597ab2 JB |
324 | void iwlcore_tx_cmd_protection(struct iwl_priv *priv, |
325 | struct ieee80211_tx_info *info, | |
326 | __le16 fc, __le32 *tx_flags) | |
37dc70fe AK |
327 | { |
328 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { | |
329 | *tx_flags |= TX_CMD_FLG_RTS_MSK; | |
330 | *tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
94597ab2 JB |
331 | *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; |
332 | ||
333 | if (!ieee80211_is_mgmt(fc)) | |
334 | return; | |
335 | ||
336 | switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) { | |
337 | case cpu_to_le16(IEEE80211_STYPE_AUTH): | |
338 | case cpu_to_le16(IEEE80211_STYPE_DEAUTH): | |
339 | case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ): | |
340 | case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ): | |
341 | *tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
342 | *tx_flags |= TX_CMD_FLG_CTS_MSK; | |
343 | break; | |
344 | } | |
37dc70fe AK |
345 | } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
346 | *tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
347 | *tx_flags |= TX_CMD_FLG_CTS_MSK; | |
94597ab2 | 348 | *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; |
37dc70fe AK |
349 | } |
350 | } | |
94597ab2 JB |
351 | EXPORT_SYMBOL(iwlcore_tx_cmd_protection); |
352 | ||
37dc70fe | 353 | |
7e6a5886 JB |
354 | static bool iwl_is_channel_extension(struct iwl_priv *priv, |
355 | enum ieee80211_band band, | |
356 | u16 channel, u8 extension_chan_offset) | |
47c5196e TW |
357 | { |
358 | const struct iwl_channel_info *ch_info; | |
359 | ||
360 | ch_info = iwl_get_channel_info(priv, band, channel); | |
361 | if (!is_channel_valid(ch_info)) | |
7e6a5886 | 362 | return false; |
47c5196e | 363 | |
d9fe60de | 364 | if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) |
7aafef1c | 365 | return !(ch_info->ht40_extension_channel & |
689da1b3 | 366 | IEEE80211_CHAN_NO_HT40PLUS); |
d9fe60de | 367 | else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) |
7aafef1c | 368 | return !(ch_info->ht40_extension_channel & |
689da1b3 | 369 | IEEE80211_CHAN_NO_HT40MINUS); |
47c5196e | 370 | |
7e6a5886 | 371 | return false; |
47c5196e TW |
372 | } |
373 | ||
7e6a5886 JB |
374 | bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv, |
375 | struct iwl_rxon_context *ctx, | |
376 | struct ieee80211_sta_ht_cap *ht_cap) | |
47c5196e | 377 | { |
7e6a5886 JB |
378 | if (!ctx->ht.enabled || !ctx->ht.is_40mhz) |
379 | return false; | |
47c5196e | 380 | |
7e6a5886 JB |
381 | /* |
382 | * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40 | |
a2b0f02e WYG |
383 | * the bit will not set if it is pure 40MHz case |
384 | */ | |
7e6a5886 JB |
385 | if (ht_cap && !ht_cap->ht_supported) |
386 | return false; | |
387 | ||
d73e4923 | 388 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1e4247d4 | 389 | if (priv->disable_ht40) |
7e6a5886 | 390 | return false; |
1e4247d4 | 391 | #endif |
7e6a5886 | 392 | |
611d3eb7 | 393 | return iwl_is_channel_extension(priv, priv->band, |
246ed355 | 394 | le16_to_cpu(ctx->staging.channel), |
7e6a5886 | 395 | ctx->ht.extension_chan_offset); |
47c5196e | 396 | } |
7aafef1c | 397 | EXPORT_SYMBOL(iwl_is_ht40_tx_allowed); |
47c5196e | 398 | |
2c2f3b33 TW |
399 | static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val) |
400 | { | |
ea196fdb JB |
401 | u16 new_val; |
402 | u16 beacon_factor; | |
403 | ||
404 | /* | |
405 | * If mac80211 hasn't given us a beacon interval, program | |
406 | * the default into the device (not checking this here | |
407 | * would cause the adjustment below to return the maximum | |
408 | * value, which may break PAN.) | |
409 | */ | |
410 | if (!beacon_val) | |
411 | return DEFAULT_BEACON_INTERVAL; | |
412 | ||
413 | /* | |
414 | * If the beacon interval we obtained from the peer | |
415 | * is too large, we'll have to wake up more often | |
416 | * (and in IBSS case, we'll beacon too much) | |
417 | * | |
418 | * For example, if max_beacon_val is 4096, and the | |
419 | * requested beacon interval is 7000, we'll have to | |
420 | * use 3500 to be able to wake up on the beacons. | |
421 | * | |
422 | * This could badly influence beacon detection stats. | |
423 | */ | |
2c2f3b33 TW |
424 | |
425 | beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val; | |
426 | new_val = beacon_val / beacon_factor; | |
427 | ||
428 | if (!new_val) | |
429 | new_val = max_beacon_val; | |
430 | ||
431 | return new_val; | |
432 | } | |
433 | ||
47313e34 | 434 | int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx) |
2c2f3b33 TW |
435 | { |
436 | u64 tsf; | |
437 | s32 interval_tm, rem; | |
2c2f3b33 TW |
438 | struct ieee80211_conf *conf = NULL; |
439 | u16 beacon_int; | |
47313e34 | 440 | struct ieee80211_vif *vif = ctx->vif; |
2c2f3b33 TW |
441 | |
442 | conf = ieee80211_get_hw_conf(priv->hw); | |
443 | ||
948f5a2f JB |
444 | lockdep_assert_held(&priv->mutex); |
445 | ||
246ed355 | 446 | memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd)); |
948f5a2f | 447 | |
246ed355 JB |
448 | ctx->timing.timestamp = cpu_to_le64(priv->timestamp); |
449 | ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval); | |
2c2f3b33 | 450 | |
47313e34 | 451 | beacon_int = vif ? vif->bss_conf.beacon_int : 0; |
2c2f3b33 | 452 | |
47313e34 JB |
453 | /* |
454 | * TODO: For IBSS we need to get atim_window from mac80211, | |
455 | * for now just always use 0 | |
456 | */ | |
457 | ctx->timing.atim_window = 0; | |
2c2f3b33 | 458 | |
bde4530e | 459 | if (ctx->ctxid == IWL_RXON_CTX_PAN && |
f1f270b2 JB |
460 | (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) && |
461 | iwl_is_associated(priv, IWL_RXON_CTX_BSS) && | |
462 | priv->contexts[IWL_RXON_CTX_BSS].vif && | |
463 | priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) { | |
bde4530e JB |
464 | ctx->timing.beacon_interval = |
465 | priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval; | |
466 | beacon_int = le16_to_cpu(ctx->timing.beacon_interval); | |
f1f270b2 JB |
467 | } else if (ctx->ctxid == IWL_RXON_CTX_BSS && |
468 | iwl_is_associated(priv, IWL_RXON_CTX_PAN) && | |
469 | priv->contexts[IWL_RXON_CTX_PAN].vif && | |
470 | priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int && | |
471 | (!iwl_is_associated_ctx(ctx) || !ctx->vif || | |
472 | !ctx->vif->bss_conf.beacon_int)) { | |
473 | ctx->timing.beacon_interval = | |
474 | priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval; | |
475 | beacon_int = le16_to_cpu(ctx->timing.beacon_interval); | |
bde4530e JB |
476 | } else { |
477 | beacon_int = iwl_adjust_beacon_interval(beacon_int, | |
f8525e55 | 478 | priv->hw_params.max_beacon_itrvl * TIME_UNIT); |
bde4530e JB |
479 | ctx->timing.beacon_interval = cpu_to_le16(beacon_int); |
480 | } | |
2c2f3b33 TW |
481 | |
482 | tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */ | |
f8525e55 | 483 | interval_tm = beacon_int * TIME_UNIT; |
2c2f3b33 | 484 | rem = do_div(tsf, interval_tm); |
246ed355 | 485 | ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem); |
2c2f3b33 | 486 | |
47313e34 | 487 | ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1; |
2491fa42 | 488 | |
2c2f3b33 TW |
489 | IWL_DEBUG_ASSOC(priv, |
490 | "beacon interval %d beacon timer %d beacon tim %d\n", | |
246ed355 JB |
491 | le16_to_cpu(ctx->timing.beacon_interval), |
492 | le32_to_cpu(ctx->timing.beacon_init_val), | |
493 | le16_to_cpu(ctx->timing.atim_window)); | |
948f5a2f | 494 | |
8f2d3d2a | 495 | return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd, |
246ed355 | 496 | sizeof(ctx->timing), &ctx->timing); |
2c2f3b33 | 497 | } |
948f5a2f | 498 | EXPORT_SYMBOL(iwl_send_rxon_timing); |
2c2f3b33 | 499 | |
246ed355 JB |
500 | void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx, |
501 | int hw_decrypt) | |
8ccde88a | 502 | { |
246ed355 | 503 | struct iwl_rxon_cmd *rxon = &ctx->staging; |
8ccde88a SO |
504 | |
505 | if (hw_decrypt) | |
506 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
507 | else | |
508 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
509 | ||
510 | } | |
511 | EXPORT_SYMBOL(iwl_set_rxon_hwcrypto); | |
512 | ||
dacefedb | 513 | /* validate RXON structure is valid */ |
246ed355 | 514 | int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx) |
8ccde88a | 515 | { |
246ed355 | 516 | struct iwl_rxon_cmd *rxon = &ctx->staging; |
dacefedb | 517 | bool error = false; |
8ccde88a SO |
518 | |
519 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
dacefedb JB |
520 | if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) { |
521 | IWL_WARN(priv, "check 2.4G: wrong narrow\n"); | |
522 | error = true; | |
523 | } | |
524 | if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) { | |
525 | IWL_WARN(priv, "check 2.4G: wrong radar\n"); | |
526 | error = true; | |
527 | } | |
8ccde88a | 528 | } else { |
dacefedb JB |
529 | if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) { |
530 | IWL_WARN(priv, "check 5.2G: not short slot!\n"); | |
531 | error = true; | |
532 | } | |
533 | if (rxon->flags & RXON_FLG_CCK_MSK) { | |
534 | IWL_WARN(priv, "check 5.2G: CCK!\n"); | |
535 | error = true; | |
536 | } | |
537 | } | |
538 | if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) { | |
539 | IWL_WARN(priv, "mac/bssid mcast!\n"); | |
540 | error = true; | |
8ccde88a | 541 | } |
8ccde88a SO |
542 | |
543 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
dacefedb JB |
544 | if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 && |
545 | (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) { | |
546 | IWL_WARN(priv, "neither 1 nor 6 are basic\n"); | |
547 | error = true; | |
548 | } | |
8ccde88a | 549 | |
dacefedb JB |
550 | if (le16_to_cpu(rxon->assoc_id) > 2007) { |
551 | IWL_WARN(priv, "aid > 2007\n"); | |
552 | error = true; | |
553 | } | |
8ccde88a | 554 | |
dacefedb JB |
555 | if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) |
556 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) { | |
557 | IWL_WARN(priv, "CCK and short slot\n"); | |
558 | error = true; | |
559 | } | |
8ccde88a | 560 | |
dacefedb JB |
561 | if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) |
562 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) { | |
563 | IWL_WARN(priv, "CCK and auto detect"); | |
564 | error = true; | |
565 | } | |
8ccde88a | 566 | |
dacefedb JB |
567 | if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | |
568 | RXON_FLG_TGG_PROTECT_MSK)) == | |
569 | RXON_FLG_TGG_PROTECT_MSK) { | |
570 | IWL_WARN(priv, "TGg but no auto-detect\n"); | |
571 | error = true; | |
572 | } | |
8ccde88a SO |
573 | |
574 | if (error) | |
575 | IWL_WARN(priv, "Tuning to channel %d\n", | |
576 | le16_to_cpu(rxon->channel)); | |
577 | ||
578 | if (error) { | |
dacefedb JB |
579 | IWL_ERR(priv, "Invalid RXON\n"); |
580 | return -EINVAL; | |
8ccde88a SO |
581 | } |
582 | return 0; | |
583 | } | |
584 | EXPORT_SYMBOL(iwl_check_rxon_cmd); | |
585 | ||
586 | /** | |
587 | * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed | |
588 | * @priv: staging_rxon is compared to active_rxon | |
589 | * | |
590 | * If the RXON structure is changing enough to require a new tune, | |
591 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
592 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
593 | */ | |
246ed355 JB |
594 | int iwl_full_rxon_required(struct iwl_priv *priv, |
595 | struct iwl_rxon_context *ctx) | |
8ccde88a | 596 | { |
246ed355 JB |
597 | const struct iwl_rxon_cmd *staging = &ctx->staging; |
598 | const struct iwl_rxon_cmd *active = &ctx->active; | |
599 | ||
600 | #define CHK(cond) \ | |
601 | if ((cond)) { \ | |
602 | IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \ | |
603 | return 1; \ | |
604 | } | |
605 | ||
606 | #define CHK_NEQ(c1, c2) \ | |
607 | if ((c1) != (c2)) { \ | |
608 | IWL_DEBUG_INFO(priv, "need full RXON - " \ | |
609 | #c1 " != " #c2 " - %d != %d\n", \ | |
610 | (c1), (c2)); \ | |
611 | return 1; \ | |
612 | } | |
8ccde88a SO |
613 | |
614 | /* These items are only settable from the full RXON command */ | |
246ed355 JB |
615 | CHK(!iwl_is_associated_ctx(ctx)); |
616 | CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr)); | |
617 | CHK(compare_ether_addr(staging->node_addr, active->node_addr)); | |
618 | CHK(compare_ether_addr(staging->wlap_bssid_addr, | |
619 | active->wlap_bssid_addr)); | |
620 | CHK_NEQ(staging->dev_type, active->dev_type); | |
621 | CHK_NEQ(staging->channel, active->channel); | |
622 | CHK_NEQ(staging->air_propagation, active->air_propagation); | |
623 | CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates, | |
624 | active->ofdm_ht_single_stream_basic_rates); | |
625 | CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates, | |
626 | active->ofdm_ht_dual_stream_basic_rates); | |
627 | CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates, | |
628 | active->ofdm_ht_triple_stream_basic_rates); | |
629 | CHK_NEQ(staging->assoc_id, active->assoc_id); | |
8ccde88a SO |
630 | |
631 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
632 | * be updated with the RXON_ASSOC command -- however only some | |
633 | * flag transitions are allowed using RXON_ASSOC */ | |
634 | ||
635 | /* Check if we are not switching bands */ | |
246ed355 JB |
636 | CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK, |
637 | active->flags & RXON_FLG_BAND_24G_MSK); | |
8ccde88a SO |
638 | |
639 | /* Check if we are switching association toggle */ | |
246ed355 JB |
640 | CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK, |
641 | active->filter_flags & RXON_FILTER_ASSOC_MSK); | |
642 | ||
643 | #undef CHK | |
644 | #undef CHK_NEQ | |
8ccde88a SO |
645 | |
646 | return 0; | |
647 | } | |
648 | EXPORT_SYMBOL(iwl_full_rxon_required); | |
649 | ||
76d04815 JB |
650 | u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv, |
651 | struct iwl_rxon_context *ctx) | |
8ccde88a | 652 | { |
4a02886b JB |
653 | /* |
654 | * Assign the lowest rate -- should really get this from | |
655 | * the beacon skb from mac80211. | |
656 | */ | |
246ed355 | 657 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) |
8ccde88a SO |
658 | return IWL_RATE_1M_PLCP; |
659 | else | |
660 | return IWL_RATE_6M_PLCP; | |
661 | } | |
662 | EXPORT_SYMBOL(iwl_rate_get_lowest_plcp); | |
663 | ||
246ed355 JB |
664 | static void _iwl_set_rxon_ht(struct iwl_priv *priv, |
665 | struct iwl_ht_config *ht_conf, | |
666 | struct iwl_rxon_context *ctx) | |
47c5196e | 667 | { |
246ed355 | 668 | struct iwl_rxon_cmd *rxon = &ctx->staging; |
47c5196e | 669 | |
7e6a5886 | 670 | if (!ctx->ht.enabled) { |
a2b0f02e | 671 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK | |
42eb7c64 | 672 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | |
7aafef1c | 673 | RXON_FLG_HT40_PROT_MSK | |
42eb7c64 | 674 | RXON_FLG_HT_PROT_MSK); |
47c5196e | 675 | return; |
42eb7c64 | 676 | } |
47c5196e | 677 | |
7e6a5886 | 678 | /* FIXME: if the definition of ht.protection changed, the "translation" |
a2b0f02e WYG |
679 | * will be needed for rxon->flags |
680 | */ | |
7e6a5886 | 681 | rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS); |
a2b0f02e WYG |
682 | |
683 | /* Set up channel bandwidth: | |
7aafef1c | 684 | * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */ |
a2b0f02e WYG |
685 | /* clear the HT channel mode before set the mode */ |
686 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK | | |
687 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); | |
7e6a5886 | 688 | if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) { |
7aafef1c | 689 | /* pure ht40 */ |
7e6a5886 | 690 | if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { |
a2b0f02e | 691 | rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; |
508b08e7 | 692 | /* Note: control channel is opposite of extension channel */ |
7e6a5886 | 693 | switch (ctx->ht.extension_chan_offset) { |
508b08e7 WYG |
694 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: |
695 | rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; | |
696 | break; | |
697 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: | |
698 | rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; | |
699 | break; | |
700 | } | |
701 | } else { | |
a2b0f02e | 702 | /* Note: control channel is opposite of extension channel */ |
7e6a5886 | 703 | switch (ctx->ht.extension_chan_offset) { |
a2b0f02e WYG |
704 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: |
705 | rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); | |
706 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; | |
707 | break; | |
708 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: | |
709 | rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; | |
710 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; | |
711 | break; | |
712 | case IEEE80211_HT_PARAM_CHA_SEC_NONE: | |
713 | default: | |
714 | /* channel location only valid if in Mixed mode */ | |
715 | IWL_ERR(priv, "invalid extension channel offset\n"); | |
716 | break; | |
717 | } | |
718 | } | |
719 | } else { | |
720 | rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY; | |
47c5196e TW |
721 | } |
722 | ||
45823531 | 723 | if (priv->cfg->ops->hcmd->set_rxon_chain) |
246ed355 | 724 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); |
47c5196e | 725 | |
02bb1bea | 726 | IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X " |
ae5eb026 | 727 | "extension channel offset 0x%x\n", |
7e6a5886 JB |
728 | le32_to_cpu(rxon->flags), ctx->ht.protection, |
729 | ctx->ht.extension_chan_offset); | |
47c5196e | 730 | } |
246ed355 JB |
731 | |
732 | void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf) | |
733 | { | |
734 | struct iwl_rxon_context *ctx; | |
735 | ||
736 | for_each_context(priv, ctx) | |
737 | _iwl_set_rxon_ht(priv, ht_conf, ctx); | |
738 | } | |
47c5196e TW |
739 | EXPORT_SYMBOL(iwl_set_rxon_ht); |
740 | ||
246ed355 | 741 | /* Return valid, unused, channel for a passive scan to reset the RF */ |
14023641 | 742 | u8 iwl_get_single_channel_number(struct iwl_priv *priv, |
246ed355 | 743 | enum ieee80211_band band) |
14023641 AK |
744 | { |
745 | const struct iwl_channel_info *ch_info; | |
746 | int i; | |
747 | u8 channel = 0; | |
246ed355 JB |
748 | u8 min, max; |
749 | struct iwl_rxon_context *ctx; | |
14023641 | 750 | |
14023641 | 751 | if (band == IEEE80211_BAND_5GHZ) { |
246ed355 JB |
752 | min = 14; |
753 | max = priv->channel_count; | |
14023641 | 754 | } else { |
246ed355 JB |
755 | min = 0; |
756 | max = 14; | |
757 | } | |
758 | ||
759 | for (i = min; i < max; i++) { | |
760 | bool busy = false; | |
761 | ||
762 | for_each_context(priv, ctx) { | |
763 | busy = priv->channel_info[i].channel == | |
764 | le16_to_cpu(ctx->staging.channel); | |
765 | if (busy) | |
766 | break; | |
14023641 | 767 | } |
246ed355 JB |
768 | |
769 | if (busy) | |
770 | continue; | |
771 | ||
772 | channel = priv->channel_info[i].channel; | |
773 | ch_info = iwl_get_channel_info(priv, band, channel); | |
774 | if (is_channel_valid(ch_info)) | |
775 | break; | |
14023641 AK |
776 | } |
777 | ||
778 | return channel; | |
779 | } | |
780 | EXPORT_SYMBOL(iwl_get_single_channel_number); | |
781 | ||
bf85ea4f | 782 | /** |
3edb5fd6 SZ |
783 | * iwl_set_rxon_channel - Set the band and channel values in staging RXON |
784 | * @ch: requested channel as a pointer to struct ieee80211_channel | |
bf85ea4f | 785 | |
bf85ea4f | 786 | * NOTE: Does not commit to the hardware; it sets appropriate bit fields |
3edb5fd6 | 787 | * in the staging RXON flag structure based on the ch->band |
bf85ea4f | 788 | */ |
246ed355 JB |
789 | int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch, |
790 | struct iwl_rxon_context *ctx) | |
bf85ea4f | 791 | { |
17e72782 | 792 | enum ieee80211_band band = ch->band; |
81e95430 | 793 | u16 channel = ch->hw_value; |
17e72782 | 794 | |
246ed355 | 795 | if ((le16_to_cpu(ctx->staging.channel) == channel) && |
bf85ea4f AK |
796 | (priv->band == band)) |
797 | return 0; | |
798 | ||
246ed355 | 799 | ctx->staging.channel = cpu_to_le16(channel); |
bf85ea4f | 800 | if (band == IEEE80211_BAND_5GHZ) |
246ed355 | 801 | ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK; |
bf85ea4f | 802 | else |
246ed355 | 803 | ctx->staging.flags |= RXON_FLG_BAND_24G_MSK; |
bf85ea4f AK |
804 | |
805 | priv->band = band; | |
806 | ||
e1623446 | 807 | IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band); |
bf85ea4f AK |
808 | |
809 | return 0; | |
810 | } | |
c7de35cd | 811 | EXPORT_SYMBOL(iwl_set_rxon_channel); |
bf85ea4f | 812 | |
79d07325 | 813 | void iwl_set_flags_for_band(struct iwl_priv *priv, |
246ed355 | 814 | struct iwl_rxon_context *ctx, |
79d07325 WYG |
815 | enum ieee80211_band band, |
816 | struct ieee80211_vif *vif) | |
8ccde88a SO |
817 | { |
818 | if (band == IEEE80211_BAND_5GHZ) { | |
246ed355 | 819 | ctx->staging.flags &= |
8ccde88a SO |
820 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
821 | | RXON_FLG_CCK_MSK); | |
246ed355 | 822 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; |
8ccde88a SO |
823 | } else { |
824 | /* Copied from iwl_post_associate() */ | |
c213d745 | 825 | if (vif && vif->bss_conf.use_short_slot) |
246ed355 | 826 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; |
8ccde88a | 827 | else |
246ed355 | 828 | ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
8ccde88a | 829 | |
246ed355 JB |
830 | ctx->staging.flags |= RXON_FLG_BAND_24G_MSK; |
831 | ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
832 | ctx->staging.flags &= ~RXON_FLG_CCK_MSK; | |
8ccde88a SO |
833 | } |
834 | } | |
79d07325 | 835 | EXPORT_SYMBOL(iwl_set_flags_for_band); |
8ccde88a SO |
836 | |
837 | /* | |
838 | * initialize rxon structure with default values from eeprom | |
839 | */ | |
1dda6d28 | 840 | void iwl_connection_init_rx_config(struct iwl_priv *priv, |
d0fe478c | 841 | struct iwl_rxon_context *ctx) |
8ccde88a SO |
842 | { |
843 | const struct iwl_channel_info *ch_info; | |
844 | ||
246ed355 | 845 | memset(&ctx->staging, 0, sizeof(ctx->staging)); |
8ccde88a | 846 | |
d0fe478c JB |
847 | if (!ctx->vif) { |
848 | ctx->staging.dev_type = ctx->unused_devtype; | |
849 | } else switch (ctx->vif->type) { | |
8ccde88a | 850 | case NL80211_IFTYPE_AP: |
d0fe478c | 851 | ctx->staging.dev_type = ctx->ap_devtype; |
8ccde88a SO |
852 | break; |
853 | ||
854 | case NL80211_IFTYPE_STATION: | |
d0fe478c | 855 | ctx->staging.dev_type = ctx->station_devtype; |
246ed355 | 856 | ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; |
8ccde88a SO |
857 | break; |
858 | ||
859 | case NL80211_IFTYPE_ADHOC: | |
d0fe478c | 860 | ctx->staging.dev_type = ctx->ibss_devtype; |
246ed355 JB |
861 | ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK; |
862 | ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
8ccde88a SO |
863 | RXON_FILTER_ACCEPT_GRP_MSK; |
864 | break; | |
865 | ||
8ccde88a | 866 | default: |
d0fe478c JB |
867 | IWL_ERR(priv, "Unsupported interface type %d\n", |
868 | ctx->vif->type); | |
8ccde88a SO |
869 | break; |
870 | } | |
871 | ||
872 | #if 0 | |
873 | /* TODO: Figure out when short_preamble would be set and cache from | |
874 | * that */ | |
875 | if (!hw_to_local(priv->hw)->short_preamble) | |
246ed355 | 876 | ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
8ccde88a | 877 | else |
246ed355 | 878 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
8ccde88a SO |
879 | #endif |
880 | ||
881 | ch_info = iwl_get_channel_info(priv, priv->band, | |
246ed355 | 882 | le16_to_cpu(ctx->active.channel)); |
8ccde88a SO |
883 | |
884 | if (!ch_info) | |
885 | ch_info = &priv->channel_info[0]; | |
886 | ||
246ed355 | 887 | ctx->staging.channel = cpu_to_le16(ch_info->channel); |
8ccde88a SO |
888 | priv->band = ch_info->band; |
889 | ||
d0fe478c | 890 | iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif); |
8ccde88a | 891 | |
246ed355 | 892 | ctx->staging.ofdm_basic_rates = |
8ccde88a | 893 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; |
246ed355 | 894 | ctx->staging.cck_basic_rates = |
8ccde88a SO |
895 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; |
896 | ||
a2b0f02e | 897 | /* clear both MIX and PURE40 mode flag */ |
246ed355 | 898 | ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED | |
a2b0f02e | 899 | RXON_FLG_CHANNEL_MODE_PURE_40); |
d0fe478c JB |
900 | if (ctx->vif) |
901 | memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN); | |
7684c408 | 902 | |
246ed355 JB |
903 | ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff; |
904 | ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff; | |
905 | ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff; | |
8ccde88a SO |
906 | } |
907 | EXPORT_SYMBOL(iwl_connection_init_rx_config); | |
908 | ||
79d07325 | 909 | void iwl_set_rate(struct iwl_priv *priv) |
8ccde88a SO |
910 | { |
911 | const struct ieee80211_supported_band *hw = NULL; | |
912 | struct ieee80211_rate *rate; | |
246ed355 | 913 | struct iwl_rxon_context *ctx; |
8ccde88a SO |
914 | int i; |
915 | ||
916 | hw = iwl_get_hw_mode(priv, priv->band); | |
917 | if (!hw) { | |
918 | IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n"); | |
919 | return; | |
920 | } | |
921 | ||
922 | priv->active_rate = 0; | |
8ccde88a SO |
923 | |
924 | for (i = 0; i < hw->n_bitrates; i++) { | |
925 | rate = &(hw->bitrates[i]); | |
5027309b | 926 | if (rate->hw_value < IWL_RATE_COUNT_LEGACY) |
8ccde88a SO |
927 | priv->active_rate |= (1 << rate->hw_value); |
928 | } | |
929 | ||
4a02886b | 930 | IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate); |
8ccde88a | 931 | |
246ed355 JB |
932 | for_each_context(priv, ctx) { |
933 | ctx->staging.cck_basic_rates = | |
934 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
4a02886b | 935 | |
246ed355 JB |
936 | ctx->staging.ofdm_basic_rates = |
937 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
938 | } | |
8ccde88a | 939 | } |
79d07325 WYG |
940 | EXPORT_SYMBOL(iwl_set_rate); |
941 | ||
942 | void iwl_chswitch_done(struct iwl_priv *priv, bool is_success) | |
943 | { | |
8bd413e6 JB |
944 | /* |
945 | * MULTI-FIXME | |
946 | * See iwl_mac_channel_switch. | |
947 | */ | |
948 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
949 | ||
79d07325 WYG |
950 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
951 | return; | |
952 | ||
953 | if (priv->switch_rxon.switch_in_progress) { | |
8bd413e6 | 954 | ieee80211_chswitch_done(ctx->vif, is_success); |
79d07325 WYG |
955 | mutex_lock(&priv->mutex); |
956 | priv->switch_rxon.switch_in_progress = false; | |
957 | mutex_unlock(&priv->mutex); | |
958 | } | |
959 | } | |
960 | EXPORT_SYMBOL(iwl_chswitch_done); | |
8ccde88a SO |
961 | |
962 | void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |
963 | { | |
2f301227 | 964 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
8ccde88a | 965 | struct iwl_csa_notification *csa = &(pkt->u.csa_notif); |
8bd413e6 JB |
966 | /* |
967 | * MULTI-FIXME | |
968 | * See iwl_mac_channel_switch. | |
969 | */ | |
246ed355 | 970 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; |
246ed355 | 971 | struct iwl_rxon_cmd *rxon = (void *)&ctx->active; |
4a56e965 | 972 | |
0924e519 WYG |
973 | if (priv->switch_rxon.switch_in_progress) { |
974 | if (!le32_to_cpu(csa->status) && | |
975 | (csa->channel == priv->switch_rxon.channel)) { | |
976 | rxon->channel = csa->channel; | |
246ed355 | 977 | ctx->staging.channel = csa->channel; |
0924e519 WYG |
978 | IWL_DEBUG_11H(priv, "CSA notif: channel %d\n", |
979 | le16_to_cpu(csa->channel)); | |
79d07325 WYG |
980 | iwl_chswitch_done(priv, true); |
981 | } else { | |
0924e519 WYG |
982 | IWL_ERR(priv, "CSA notif (fail) : channel %d\n", |
983 | le16_to_cpu(csa->channel)); | |
79d07325 WYG |
984 | iwl_chswitch_done(priv, false); |
985 | } | |
0924e519 | 986 | } |
8ccde88a SO |
987 | } |
988 | EXPORT_SYMBOL(iwl_rx_csa); | |
989 | ||
990 | #ifdef CONFIG_IWLWIFI_DEBUG | |
246ed355 JB |
991 | void iwl_print_rx_config_cmd(struct iwl_priv *priv, |
992 | struct iwl_rxon_context *ctx) | |
8ccde88a | 993 | { |
246ed355 | 994 | struct iwl_rxon_cmd *rxon = &ctx->staging; |
8ccde88a | 995 | |
e1623446 | 996 | IWL_DEBUG_RADIO(priv, "RX CONFIG:\n"); |
3d816c77 | 997 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
e1623446 TW |
998 | IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
999 | IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
1000 | IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n", | |
8ccde88a | 1001 | le32_to_cpu(rxon->filter_flags)); |
e1623446 TW |
1002 | IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type); |
1003 | IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n", | |
8ccde88a | 1004 | rxon->ofdm_basic_rates); |
e1623446 TW |
1005 | IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); |
1006 | IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr); | |
1007 | IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr); | |
1008 | IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); | |
8ccde88a | 1009 | } |
a643565e | 1010 | EXPORT_SYMBOL(iwl_print_rx_config_cmd); |
6686d17e | 1011 | #endif |
8ccde88a SO |
1012 | /** |
1013 | * iwl_irq_handle_error - called for HW or SW error interrupt from card | |
1014 | */ | |
1015 | void iwl_irq_handle_error(struct iwl_priv *priv) | |
1016 | { | |
1017 | /* Set the FW error flag -- cleared on iwl_down */ | |
1018 | set_bit(STATUS_FW_ERROR, &priv->status); | |
1019 | ||
1020 | /* Cancel currently queued command. */ | |
1021 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
1022 | ||
459bc732 SZ |
1023 | IWL_ERR(priv, "Loaded firmware version: %s\n", |
1024 | priv->hw->wiphy->fw_version); | |
1025 | ||
3a3ff72c | 1026 | priv->cfg->ops->lib->dump_nic_error_log(priv); |
696bdee3 WYG |
1027 | if (priv->cfg->ops->lib->dump_csr) |
1028 | priv->cfg->ops->lib->dump_csr(priv); | |
1b3eb823 WYG |
1029 | if (priv->cfg->ops->lib->dump_fh) |
1030 | priv->cfg->ops->lib->dump_fh(priv, NULL, false); | |
b03d7d0f | 1031 | priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false); |
8ccde88a | 1032 | #ifdef CONFIG_IWLWIFI_DEBUG |
c341ddb2 | 1033 | if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) |
246ed355 JB |
1034 | iwl_print_rx_config_cmd(priv, |
1035 | &priv->contexts[IWL_RXON_CTX_BSS]); | |
8ccde88a SO |
1036 | #endif |
1037 | ||
1038 | wake_up_interruptible(&priv->wait_command_queue); | |
1039 | ||
1040 | /* Keep the restart process from trying to send host | |
1041 | * commands by clearing the INIT status bit */ | |
1042 | clear_bit(STATUS_READY, &priv->status); | |
1043 | ||
1044 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
e1623446 | 1045 | IWL_DEBUG(priv, IWL_DL_FW_ERRORS, |
8ccde88a SO |
1046 | "Restarting adapter due to uCode error.\n"); |
1047 | ||
8ccde88a SO |
1048 | if (priv->cfg->mod_params->restart_fw) |
1049 | queue_work(priv->workqueue, &priv->restart); | |
1050 | } | |
1051 | } | |
1052 | EXPORT_SYMBOL(iwl_irq_handle_error); | |
1053 | ||
f8e200de | 1054 | static int iwl_apm_stop_master(struct iwl_priv *priv) |
d68b603c | 1055 | { |
5220af0c | 1056 | int ret = 0; |
d68b603c | 1057 | |
5220af0c | 1058 | /* stop device's busmaster DMA activity */ |
d68b603c AK |
1059 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); |
1060 | ||
5220af0c | 1061 | ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED, |
d68b603c | 1062 | CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); |
5220af0c BC |
1063 | if (ret) |
1064 | IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n"); | |
d68b603c | 1065 | |
d68b603c AK |
1066 | IWL_DEBUG_INFO(priv, "stop master\n"); |
1067 | ||
5220af0c | 1068 | return ret; |
d68b603c | 1069 | } |
d68b603c AK |
1070 | |
1071 | void iwl_apm_stop(struct iwl_priv *priv) | |
1072 | { | |
fadb3582 BC |
1073 | IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n"); |
1074 | ||
5220af0c | 1075 | /* Stop device's DMA activity */ |
d68b603c AK |
1076 | iwl_apm_stop_master(priv); |
1077 | ||
5220af0c | 1078 | /* Reset the entire device */ |
d68b603c AK |
1079 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
1080 | ||
1081 | udelay(10); | |
5220af0c BC |
1082 | |
1083 | /* | |
1084 | * Clear "initialization complete" bit to move adapter from | |
1085 | * D0A* (powered-up Active) --> D0U* (Uninitialized) state. | |
1086 | */ | |
d68b603c | 1087 | iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
d68b603c AK |
1088 | } |
1089 | EXPORT_SYMBOL(iwl_apm_stop); | |
1090 | ||
fadb3582 BC |
1091 | |
1092 | /* | |
1093 | * Start up NIC's basic functionality after it has been reset | |
1094 | * (e.g. after platform boot, or shutdown via iwl_apm_stop()) | |
1095 | * NOTE: This does not load uCode nor start the embedded processor | |
1096 | */ | |
1097 | int iwl_apm_init(struct iwl_priv *priv) | |
1098 | { | |
1099 | int ret = 0; | |
1100 | u16 lctl; | |
1101 | ||
1102 | IWL_DEBUG_INFO(priv, "Init card's basic functions\n"); | |
1103 | ||
1104 | /* | |
1105 | * Use "set_bit" below rather than "write", to preserve any hardware | |
1106 | * bits already set by default after reset. | |
1107 | */ | |
1108 | ||
1109 | /* Disable L0S exit timer (platform NMI Work/Around) */ | |
1110 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | |
1111 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); | |
1112 | ||
1113 | /* | |
1114 | * Disable L0s without affecting L1; | |
1115 | * don't wait for ICH L0s (ICH bug W/A) | |
1116 | */ | |
1117 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | |
1118 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); | |
1119 | ||
1120 | /* Set FH wait threshold to maximum (HW error during stress W/A) */ | |
1121 | iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); | |
1122 | ||
1123 | /* | |
1124 | * Enable HAP INTA (interrupt from management bus) to | |
1125 | * wake device's PCI Express link L1a -> L0s | |
1126 | * NOTE: This is no-op for 3945 (non-existant bit) | |
1127 | */ | |
1128 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, | |
1129 | CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); | |
1130 | ||
1131 | /* | |
a6c5c731 BC |
1132 | * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition. |
1133 | * Check if BIOS (or OS) enabled L1-ASPM on this device. | |
1134 | * If so (likely), disable L0S, so device moves directly L0->L1; | |
1135 | * costs negligible amount of power savings. | |
1136 | * If not (unlikely), enable L0S, so there is at least some | |
1137 | * power savings, even without L1. | |
fadb3582 | 1138 | */ |
7cb1b088 | 1139 | if (priv->cfg->base_params->set_l0s) { |
fadb3582 BC |
1140 | lctl = iwl_pcie_link_ctl(priv); |
1141 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | |
1142 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | |
1143 | /* L1-ASPM enabled; disable(!) L0S */ | |
1144 | iwl_set_bit(priv, CSR_GIO_REG, | |
1145 | CSR_GIO_REG_VAL_L0S_ENABLED); | |
1146 | IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n"); | |
1147 | } else { | |
1148 | /* L1-ASPM disabled; enable(!) L0S */ | |
1149 | iwl_clear_bit(priv, CSR_GIO_REG, | |
1150 | CSR_GIO_REG_VAL_L0S_ENABLED); | |
1151 | IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n"); | |
1152 | } | |
1153 | } | |
1154 | ||
1155 | /* Configure analog phase-lock-loop before activating to D0A */ | |
7cb1b088 WYG |
1156 | if (priv->cfg->base_params->pll_cfg_val) |
1157 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, | |
1158 | priv->cfg->base_params->pll_cfg_val); | |
fadb3582 BC |
1159 | |
1160 | /* | |
1161 | * Set "initialization complete" bit to move adapter from | |
1162 | * D0U* --> D0A* (powered-up active) state. | |
1163 | */ | |
1164 | iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | |
1165 | ||
1166 | /* | |
1167 | * Wait for clock stabilization; once stabilized, access to | |
1168 | * device-internal resources is supported, e.g. iwl_write_prph() | |
1169 | * and accesses to uCode SRAM. | |
1170 | */ | |
1171 | ret = iwl_poll_bit(priv, CSR_GP_CNTRL, | |
1172 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, | |
1173 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | |
1174 | if (ret < 0) { | |
1175 | IWL_DEBUG_INFO(priv, "Failed to init the card\n"); | |
1176 | goto out; | |
1177 | } | |
1178 | ||
1179 | /* | |
1180 | * Enable DMA and BSM (if used) clocks, wait for them to stabilize. | |
1181 | * BSM (Boostrap State Machine) is only in 3945 and 4965; | |
1182 | * later devices (i.e. 5000 and later) have non-volatile SRAM, | |
1183 | * and don't need BSM to restore data after power-saving sleep. | |
1184 | * | |
1185 | * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits | |
1186 | * do not disable clocks. This preserves any hardware bits already | |
1187 | * set by default in "CLK_CTRL_REG" after reset. | |
1188 | */ | |
7cb1b088 | 1189 | if (priv->cfg->base_params->use_bsm) |
fadb3582 BC |
1190 | iwl_write_prph(priv, APMG_CLK_EN_REG, |
1191 | APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); | |
1192 | else | |
1193 | iwl_write_prph(priv, APMG_CLK_EN_REG, | |
1194 | APMG_CLK_VAL_DMA_CLK_RQT); | |
1195 | udelay(20); | |
1196 | ||
1197 | /* Disable L1-Active */ | |
1198 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, | |
1199 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | |
1200 | ||
1201 | out: | |
1202 | return ret; | |
1203 | } | |
1204 | EXPORT_SYMBOL(iwl_apm_init); | |
1205 | ||
1206 | ||
630fe9b6 TW |
1207 | int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force) |
1208 | { | |
a25a66ac SG |
1209 | int ret; |
1210 | s8 prev_tx_power; | |
1211 | ||
1212 | lockdep_assert_held(&priv->mutex); | |
1213 | ||
1214 | if (priv->tx_power_user_lmt == tx_power && !force) | |
1215 | return 0; | |
1216 | ||
1217 | if (!priv->cfg->ops->lib->send_tx_power) | |
1218 | return -EOPNOTSUPP; | |
5eadd94b | 1219 | |
b744cb79 WYG |
1220 | if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) { |
1221 | IWL_WARN(priv, | |
1222 | "Requested user TXPOWER %d below lower limit %d.\n", | |
daf518de | 1223 | tx_power, |
b744cb79 | 1224 | IWLAGN_TX_POWER_TARGET_POWER_MIN); |
630fe9b6 TW |
1225 | return -EINVAL; |
1226 | } | |
1227 | ||
dc1b0973 | 1228 | if (tx_power > priv->tx_power_device_lmt) { |
08f2d58d WYG |
1229 | IWL_WARN(priv, |
1230 | "Requested user TXPOWER %d above upper limit %d.\n", | |
dc1b0973 | 1231 | tx_power, priv->tx_power_device_lmt); |
630fe9b6 TW |
1232 | return -EINVAL; |
1233 | } | |
1234 | ||
a25a66ac SG |
1235 | if (!iwl_is_ready_rf(priv)) |
1236 | return -EIO; | |
630fe9b6 | 1237 | |
a25a66ac SG |
1238 | /* scan complete use tx_power_next, need to be updated */ |
1239 | priv->tx_power_next = tx_power; | |
1240 | if (test_bit(STATUS_SCANNING, &priv->status) && !force) { | |
1241 | IWL_DEBUG_INFO(priv, "Deferring tx power set while scanning\n"); | |
1242 | return 0; | |
5eadd94b | 1243 | } |
630fe9b6 | 1244 | |
a25a66ac SG |
1245 | prev_tx_power = priv->tx_power_user_lmt; |
1246 | priv->tx_power_user_lmt = tx_power; | |
1247 | ||
1248 | ret = priv->cfg->ops->lib->send_tx_power(priv); | |
1249 | ||
1250 | /* if fail to set tx_power, restore the orig. tx power */ | |
1251 | if (ret) { | |
1252 | priv->tx_power_user_lmt = prev_tx_power; | |
1253 | priv->tx_power_next = prev_tx_power; | |
1254 | } | |
630fe9b6 TW |
1255 | return ret; |
1256 | } | |
1257 | EXPORT_SYMBOL(iwl_set_tx_power); | |
1258 | ||
ef850d7c | 1259 | irqreturn_t iwl_isr_legacy(int irq, void *data) |
f17d08a6 AK |
1260 | { |
1261 | struct iwl_priv *priv = data; | |
1262 | u32 inta, inta_mask; | |
1263 | u32 inta_fh; | |
6e8cc38d | 1264 | unsigned long flags; |
f17d08a6 AK |
1265 | if (!priv) |
1266 | return IRQ_NONE; | |
1267 | ||
6e8cc38d | 1268 | spin_lock_irqsave(&priv->lock, flags); |
f17d08a6 AK |
1269 | |
1270 | /* Disable (but don't clear!) interrupts here to avoid | |
1271 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
1272 | * If we have something to service, the tasklet will re-enable ints. | |
1273 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
1274 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ | |
1275 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
1276 | ||
1277 | /* Discover which interrupts are active/pending */ | |
1278 | inta = iwl_read32(priv, CSR_INT); | |
1279 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
1280 | ||
1281 | /* Ignore interrupt if there's nothing in NIC to service. | |
1282 | * This may be due to IRQ shared with another device, | |
1283 | * or due to sporadic interrupts thrown from our NIC. */ | |
1284 | if (!inta && !inta_fh) { | |
1285 | IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
1286 | goto none; | |
1287 | } | |
1288 | ||
1289 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
1290 | /* Hardware disappeared. It might have already raised | |
1291 | * an interrupt */ | |
1292 | IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta); | |
1293 | goto unplugged; | |
1294 | } | |
1295 | ||
1296 | IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
1297 | inta, inta_mask, inta_fh); | |
1298 | ||
1299 | inta &= ~CSR_INT_BIT_SCD; | |
1300 | ||
1301 | /* iwl_irq_tasklet() will service interrupts and re-enable them */ | |
1302 | if (likely(inta || inta_fh)) | |
1303 | tasklet_schedule(&priv->irq_tasklet); | |
1304 | ||
1305 | unplugged: | |
6e8cc38d | 1306 | spin_unlock_irqrestore(&priv->lock, flags); |
f17d08a6 AK |
1307 | return IRQ_HANDLED; |
1308 | ||
1309 | none: | |
1310 | /* re-enable interrupts here since we don't have anything to service. */ | |
1311 | /* only Re-enable if diabled by irq */ | |
1312 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
1313 | iwl_enable_interrupts(priv); | |
6e8cc38d | 1314 | spin_unlock_irqrestore(&priv->lock, flags); |
f17d08a6 AK |
1315 | return IRQ_NONE; |
1316 | } | |
ef850d7c | 1317 | EXPORT_SYMBOL(iwl_isr_legacy); |
f17d08a6 | 1318 | |
65b52bde | 1319 | void iwl_send_bt_config(struct iwl_priv *priv) |
17f841cd SO |
1320 | { |
1321 | struct iwl_bt_cmd bt_cmd = { | |
456d0f76 WYG |
1322 | .lead_time = BT_LEAD_TIME_DEF, |
1323 | .max_kill = BT_MAX_KILL_DEF, | |
17f841cd SO |
1324 | .kill_ack_mask = 0, |
1325 | .kill_cts_mask = 0, | |
1326 | }; | |
1327 | ||
06702a73 WYG |
1328 | if (!bt_coex_active) |
1329 | bt_cmd.flags = BT_COEX_DISABLE; | |
1330 | else | |
1331 | bt_cmd.flags = BT_COEX_ENABLE; | |
1332 | ||
1333 | IWL_DEBUG_INFO(priv, "BT coex %s\n", | |
1334 | (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active"); | |
1335 | ||
65b52bde JB |
1336 | if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
1337 | sizeof(struct iwl_bt_cmd), &bt_cmd)) | |
1338 | IWL_ERR(priv, "failed to send BT Coex Config\n"); | |
17f841cd SO |
1339 | } |
1340 | EXPORT_SYMBOL(iwl_send_bt_config); | |
1341 | ||
ef8d5529 | 1342 | int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear) |
49ea8596 | 1343 | { |
ef8d5529 WYG |
1344 | struct iwl_statistics_cmd statistics_cmd = { |
1345 | .configuration_flags = | |
1346 | clear ? IWL_STATS_CONF_CLEAR_STATS : 0, | |
49ea8596 | 1347 | }; |
ef8d5529 WYG |
1348 | |
1349 | if (flags & CMD_ASYNC) | |
1350 | return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD, | |
1351 | sizeof(struct iwl_statistics_cmd), | |
1352 | &statistics_cmd, NULL); | |
1353 | else | |
1354 | return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD, | |
1355 | sizeof(struct iwl_statistics_cmd), | |
1356 | &statistics_cmd); | |
49ea8596 EG |
1357 | } |
1358 | EXPORT_SYMBOL(iwl_send_statistics_request); | |
7e8c519e | 1359 | |
030f05ed AK |
1360 | void iwl_rx_pm_sleep_notif(struct iwl_priv *priv, |
1361 | struct iwl_rx_mem_buffer *rxb) | |
1362 | { | |
1363 | #ifdef CONFIG_IWLWIFI_DEBUG | |
2f301227 | 1364 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
030f05ed AK |
1365 | struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif); |
1366 | IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n", | |
1367 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
1368 | #endif | |
1369 | } | |
1370 | EXPORT_SYMBOL(iwl_rx_pm_sleep_notif); | |
1371 | ||
1372 | void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv, | |
1373 | struct iwl_rx_mem_buffer *rxb) | |
1374 | { | |
2f301227 | 1375 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
396887a2 | 1376 | u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; |
030f05ed | 1377 | IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled " |
396887a2 DH |
1378 | "notification for %s:\n", len, |
1379 | get_cmd_string(pkt->hdr.cmd)); | |
1380 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len); | |
030f05ed AK |
1381 | } |
1382 | EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif); | |
261b9c33 AK |
1383 | |
1384 | void iwl_rx_reply_error(struct iwl_priv *priv, | |
1385 | struct iwl_rx_mem_buffer *rxb) | |
1386 | { | |
2f301227 | 1387 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
261b9c33 AK |
1388 | |
1389 | IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) " | |
1390 | "seq 0x%04X ser 0x%08X\n", | |
1391 | le32_to_cpu(pkt->u.err_resp.error_type), | |
1392 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
1393 | pkt->u.err_resp.cmd_id, | |
1394 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
1395 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
1396 | } | |
1397 | EXPORT_SYMBOL(iwl_rx_reply_error); | |
1398 | ||
a83b9141 WYG |
1399 | void iwl_clear_isr_stats(struct iwl_priv *priv) |
1400 | { | |
1401 | memset(&priv->isr_stats, 0, sizeof(priv->isr_stats)); | |
1402 | } | |
a83b9141 | 1403 | |
488829f1 AK |
1404 | int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
1405 | const struct ieee80211_tx_queue_params *params) | |
1406 | { | |
1407 | struct iwl_priv *priv = hw->priv; | |
8dfdb9d5 | 1408 | struct iwl_rxon_context *ctx; |
488829f1 AK |
1409 | unsigned long flags; |
1410 | int q; | |
1411 | ||
1412 | IWL_DEBUG_MAC80211(priv, "enter\n"); | |
1413 | ||
1414 | if (!iwl_is_ready_rf(priv)) { | |
1415 | IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n"); | |
1416 | return -EIO; | |
1417 | } | |
1418 | ||
1419 | if (queue >= AC_NUM) { | |
1420 | IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue); | |
1421 | return 0; | |
1422 | } | |
1423 | ||
1424 | q = AC_NUM - 1 - queue; | |
1425 | ||
1426 | spin_lock_irqsave(&priv->lock, flags); | |
1427 | ||
8dfdb9d5 JB |
1428 | /* |
1429 | * MULTI-FIXME | |
1430 | * This may need to be done per interface in nl80211/cfg80211/mac80211. | |
1431 | */ | |
1432 | for_each_context(priv, ctx) { | |
1433 | ctx->qos_data.def_qos_parm.ac[q].cw_min = | |
1434 | cpu_to_le16(params->cw_min); | |
1435 | ctx->qos_data.def_qos_parm.ac[q].cw_max = | |
1436 | cpu_to_le16(params->cw_max); | |
1437 | ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
1438 | ctx->qos_data.def_qos_parm.ac[q].edca_txop = | |
1439 | cpu_to_le16((params->txop * 32)); | |
1440 | ||
1441 | ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
1442 | } | |
488829f1 AK |
1443 | |
1444 | spin_unlock_irqrestore(&priv->lock, flags); | |
1445 | ||
1446 | IWL_DEBUG_MAC80211(priv, "leave\n"); | |
1447 | return 0; | |
1448 | } | |
1449 | EXPORT_SYMBOL(iwl_mac_conf_tx); | |
5bbe233b | 1450 | |
a85d7cca JB |
1451 | int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw) |
1452 | { | |
1453 | struct iwl_priv *priv = hw->priv; | |
1454 | ||
1455 | return priv->ibss_manager == IWL_IBSS_MANAGER; | |
1456 | } | |
1457 | EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon); | |
1458 | ||
5bbe233b | 1459 | static void iwl_ht_conf(struct iwl_priv *priv, |
ca3c1f59 | 1460 | struct ieee80211_vif *vif) |
5bbe233b | 1461 | { |
fad95bf5 | 1462 | struct iwl_ht_config *ht_conf = &priv->current_ht_config; |
5bbe233b | 1463 | struct ieee80211_sta *sta; |
ca3c1f59 | 1464 | struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; |
7e6a5886 | 1465 | struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif); |
5bbe233b | 1466 | |
91dd6c27 | 1467 | IWL_DEBUG_MAC80211(priv, "enter:\n"); |
5bbe233b | 1468 | |
7e6a5886 | 1469 | if (!ctx->ht.enabled) |
5bbe233b AK |
1470 | return; |
1471 | ||
7e6a5886 | 1472 | ctx->ht.protection = |
9ed6bcce | 1473 | bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; |
7e6a5886 | 1474 | ctx->ht.non_gf_sta_present = |
9ed6bcce | 1475 | !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); |
5bbe233b | 1476 | |
02bb1bea JB |
1477 | ht_conf->single_chain_sufficient = false; |
1478 | ||
ca3c1f59 | 1479 | switch (vif->type) { |
02bb1bea JB |
1480 | case NL80211_IFTYPE_STATION: |
1481 | rcu_read_lock(); | |
ca3c1f59 | 1482 | sta = ieee80211_find_sta(vif, bss_conf->bssid); |
02bb1bea JB |
1483 | if (sta) { |
1484 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; | |
1485 | int maxstreams; | |
1486 | ||
1487 | maxstreams = (ht_cap->mcs.tx_params & | |
1488 | IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK) | |
1489 | >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; | |
1490 | maxstreams += 1; | |
1491 | ||
1492 | if ((ht_cap->mcs.rx_mask[1] == 0) && | |
1493 | (ht_cap->mcs.rx_mask[2] == 0)) | |
1494 | ht_conf->single_chain_sufficient = true; | |
1495 | if (maxstreams <= 1) | |
1496 | ht_conf->single_chain_sufficient = true; | |
1497 | } else { | |
1498 | /* | |
1499 | * If at all, this can only happen through a race | |
1500 | * when the AP disconnects us while we're still | |
1501 | * setting up the connection, in that case mac80211 | |
1502 | * will soon tell us about that. | |
1503 | */ | |
1504 | ht_conf->single_chain_sufficient = true; | |
1505 | } | |
1506 | rcu_read_unlock(); | |
1507 | break; | |
1508 | case NL80211_IFTYPE_ADHOC: | |
1509 | ht_conf->single_chain_sufficient = true; | |
1510 | break; | |
1511 | default: | |
1512 | break; | |
1513 | } | |
5bbe233b AK |
1514 | |
1515 | IWL_DEBUG_MAC80211(priv, "leave\n"); | |
1516 | } | |
1517 | ||
246ed355 JB |
1518 | static inline void iwl_set_no_assoc(struct iwl_priv *priv, |
1519 | struct ieee80211_vif *vif) | |
c91c3efc | 1520 | { |
246ed355 JB |
1521 | struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif); |
1522 | ||
c91c3efc AK |
1523 | iwl_led_disassociate(priv); |
1524 | /* | |
1525 | * inform the ucode that there is no longer an | |
1526 | * association and that no more packets should be | |
1527 | * sent | |
1528 | */ | |
246ed355 JB |
1529 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
1530 | ctx->staging.assoc_id = 0; | |
1531 | iwlcore_commit_rxon(priv, ctx); | |
c91c3efc AK |
1532 | } |
1533 | ||
575ccfd0 JB |
1534 | static void iwlcore_beacon_update(struct ieee80211_hw *hw, |
1535 | struct ieee80211_vif *vif) | |
0bc5774f JB |
1536 | { |
1537 | struct iwl_priv *priv = hw->priv; | |
1538 | unsigned long flags; | |
1539 | __le64 timestamp; | |
575ccfd0 | 1540 | struct sk_buff *skb = ieee80211_beacon_get(hw, vif); |
0bc5774f | 1541 | |
575ccfd0 JB |
1542 | if (!skb) |
1543 | return; | |
1544 | ||
1545 | IWL_DEBUG_ASSOC(priv, "enter\n"); | |
0bc5774f | 1546 | |
76d04815 JB |
1547 | lockdep_assert_held(&priv->mutex); |
1548 | ||
1549 | if (!priv->beacon_ctx) { | |
1550 | IWL_ERR(priv, "update beacon but no beacon context!\n"); | |
1551 | dev_kfree_skb(skb); | |
575ccfd0 | 1552 | return; |
0bc5774f JB |
1553 | } |
1554 | ||
1555 | spin_lock_irqsave(&priv->lock, flags); | |
1556 | ||
12e934dc JB |
1557 | if (priv->beacon_skb) |
1558 | dev_kfree_skb(priv->beacon_skb); | |
0bc5774f | 1559 | |
12e934dc | 1560 | priv->beacon_skb = skb; |
0bc5774f JB |
1561 | |
1562 | timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; | |
1563 | priv->timestamp = le64_to_cpu(timestamp); | |
1564 | ||
575ccfd0 JB |
1565 | IWL_DEBUG_ASSOC(priv, "leave\n"); |
1566 | ||
0bc5774f JB |
1567 | spin_unlock_irqrestore(&priv->lock, flags); |
1568 | ||
575ccfd0 JB |
1569 | if (!iwl_is_ready_rf(priv)) { |
1570 | IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n"); | |
1571 | return; | |
1572 | } | |
0bc5774f | 1573 | |
575ccfd0 | 1574 | priv->cfg->ops->lib->post_associate(priv, priv->beacon_ctx->vif); |
0bc5774f JB |
1575 | } |
1576 | ||
5bbe233b | 1577 | void iwl_bss_info_changed(struct ieee80211_hw *hw, |
2d0ddec5 JB |
1578 | struct ieee80211_vif *vif, |
1579 | struct ieee80211_bss_conf *bss_conf, | |
1580 | u32 changes) | |
5bbe233b AK |
1581 | { |
1582 | struct iwl_priv *priv = hw->priv; | |
246ed355 | 1583 | struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif); |
3a650292 | 1584 | int ret; |
5bbe233b AK |
1585 | |
1586 | IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes); | |
1587 | ||
2d0ddec5 JB |
1588 | if (!iwl_is_alive(priv)) |
1589 | return; | |
1590 | ||
1591 | mutex_lock(&priv->mutex); | |
1592 | ||
3eb9616a SG |
1593 | if (changes & (BSS_CHANGED_BSSID | BSS_CHANGED_ASSOC | |
1594 | BSS_CHANGED_BEACON_ENABLED)) { | |
1595 | /* | |
1596 | * If there is currently a HW scan going on in the | |
1597 | * background then we need to cancel it else the RXON | |
1598 | * below in post_associate or set_no_assoc can fail. | |
1599 | */ | |
1600 | if (iwl_scan_cancel_timeout(priv, 200)) { | |
1601 | IWL_WARN(priv, "Can not cancel scan\n"); | |
1602 | goto out; | |
1603 | } | |
1604 | } | |
1605 | ||
4ced3f74 JB |
1606 | if (changes & BSS_CHANGED_QOS) { |
1607 | unsigned long flags; | |
1608 | ||
1609 | spin_lock_irqsave(&priv->lock, flags); | |
8dfdb9d5 JB |
1610 | ctx->qos_data.qos_active = bss_conf->qos; |
1611 | iwl_update_qos(priv, ctx); | |
4ced3f74 JB |
1612 | spin_unlock_irqrestore(&priv->lock, flags); |
1613 | } | |
1614 | ||
76d04815 JB |
1615 | if (changes & BSS_CHANGED_BEACON_ENABLED) { |
1616 | /* | |
1617 | * the add_interface code must make sure we only ever | |
1618 | * have a single interface that could be beaconing at | |
1619 | * any time. | |
1620 | */ | |
1621 | if (vif->bss_conf.enable_beacon) | |
1622 | priv->beacon_ctx = ctx; | |
1623 | else | |
1624 | priv->beacon_ctx = NULL; | |
1625 | } | |
1626 | ||
92445c95 | 1627 | if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) { |
12e934dc JB |
1628 | dev_kfree_skb(priv->beacon_skb); |
1629 | priv->beacon_skb = ieee80211_beacon_get(hw, vif); | |
2d0ddec5 JB |
1630 | } |
1631 | ||
2a3aeb44 JB |
1632 | if (changes & BSS_CHANGED_BEACON_INT && vif->type == NL80211_IFTYPE_AP) |
1633 | iwl_send_rxon_timing(priv, ctx); | |
d7129e19 JB |
1634 | |
1635 | if (changes & BSS_CHANGED_BSSID) { | |
1636 | IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid); | |
1637 | ||
d7129e19 | 1638 | /* mac80211 only sets assoc when in STATION mode */ |
92445c95 | 1639 | if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) { |
246ed355 | 1640 | memcpy(ctx->staging.bssid_addr, |
d7129e19 | 1641 | bss_conf->bssid, ETH_ALEN); |
2d0ddec5 | 1642 | |
d7129e19 JB |
1643 | /* currently needed in a few places */ |
1644 | memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN); | |
1645 | } else { | |
246ed355 | 1646 | ctx->staging.filter_flags &= |
d7129e19 | 1647 | ~RXON_FILTER_ASSOC_MSK; |
2d0ddec5 | 1648 | } |
d7129e19 | 1649 | |
2d0ddec5 JB |
1650 | } |
1651 | ||
d7129e19 JB |
1652 | /* |
1653 | * This needs to be after setting the BSSID in case | |
1654 | * mac80211 decides to do both changes at once because | |
1655 | * it will invoke post_associate. | |
1656 | */ | |
575ccfd0 JB |
1657 | if (vif->type == NL80211_IFTYPE_ADHOC && changes & BSS_CHANGED_BEACON) |
1658 | iwlcore_beacon_update(hw, vif); | |
2d0ddec5 | 1659 | |
5bbe233b AK |
1660 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
1661 | IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n", | |
1662 | bss_conf->use_short_preamble); | |
1663 | if (bss_conf->use_short_preamble) | |
246ed355 | 1664 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
5bbe233b | 1665 | else |
246ed355 | 1666 | ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
5bbe233b AK |
1667 | } |
1668 | ||
1669 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { | |
1670 | IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot); | |
1671 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) | |
246ed355 | 1672 | ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK; |
5bbe233b | 1673 | else |
246ed355 | 1674 | ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK; |
94597ab2 | 1675 | if (bss_conf->use_cts_prot) |
246ed355 | 1676 | ctx->staging.flags |= RXON_FLG_SELF_CTS_EN; |
94597ab2 | 1677 | else |
246ed355 | 1678 | ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN; |
5bbe233b AK |
1679 | } |
1680 | ||
d7129e19 JB |
1681 | if (changes & BSS_CHANGED_BASIC_RATES) { |
1682 | /* XXX use this information | |
1683 | * | |
1684 | * To do that, remove code from iwl_set_rate() and put something | |
1685 | * like this here: | |
1686 | * | |
1687 | if (A-band) | |
246ed355 | 1688 | ctx->staging.ofdm_basic_rates = |
d7129e19 JB |
1689 | bss_conf->basic_rates; |
1690 | else | |
246ed355 | 1691 | ctx->staging.ofdm_basic_rates = |
d7129e19 | 1692 | bss_conf->basic_rates >> 4; |
246ed355 | 1693 | ctx->staging.cck_basic_rates = |
d7129e19 JB |
1694 | bss_conf->basic_rates & 0xF; |
1695 | */ | |
1696 | } | |
1697 | ||
5bbe233b | 1698 | if (changes & BSS_CHANGED_HT) { |
ca3c1f59 | 1699 | iwl_ht_conf(priv, vif); |
45823531 AK |
1700 | |
1701 | if (priv->cfg->ops->hcmd->set_rxon_chain) | |
246ed355 | 1702 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); |
5bbe233b AK |
1703 | } |
1704 | ||
1705 | if (changes & BSS_CHANGED_ASSOC) { | |
1706 | IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc); | |
5bbe233b | 1707 | if (bss_conf->assoc) { |
5bbe233b | 1708 | priv->timestamp = bss_conf->timestamp; |
5bbe233b | 1709 | |
e932a609 JB |
1710 | iwl_led_associate(priv); |
1711 | ||
d7129e19 | 1712 | if (!iwl_is_rfkill(priv)) |
1dda6d28 | 1713 | priv->cfg->ops->lib->post_associate(priv, vif); |
c91c3efc | 1714 | } else |
246ed355 | 1715 | iwl_set_no_assoc(priv, vif); |
d7129e19 JB |
1716 | } |
1717 | ||
246ed355 | 1718 | if (changes && iwl_is_associated_ctx(ctx) && bss_conf->aid) { |
d7129e19 JB |
1719 | IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n", |
1720 | changes); | |
246ed355 | 1721 | ret = iwl_send_rxon_assoc(priv, ctx); |
d7129e19 JB |
1722 | if (!ret) { |
1723 | /* Sync active_rxon with latest change. */ | |
246ed355 JB |
1724 | memcpy((void *)&ctx->active, |
1725 | &ctx->staging, | |
d7129e19 | 1726 | sizeof(struct iwl_rxon_cmd)); |
5bbe233b | 1727 | } |
5bbe233b | 1728 | } |
d7129e19 | 1729 | |
c91c3efc AK |
1730 | if (changes & BSS_CHANGED_BEACON_ENABLED) { |
1731 | if (vif->bss_conf.enable_beacon) { | |
246ed355 | 1732 | memcpy(ctx->staging.bssid_addr, |
c91c3efc AK |
1733 | bss_conf->bssid, ETH_ALEN); |
1734 | memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN); | |
657e11a4 | 1735 | iwl_led_associate(priv); |
1dda6d28 | 1736 | iwlcore_config_ap(priv, vif); |
c91c3efc | 1737 | } else |
246ed355 | 1738 | iwl_set_no_assoc(priv, vif); |
f513dfff DH |
1739 | } |
1740 | ||
1fa61b2e JB |
1741 | if (changes & BSS_CHANGED_IBSS) { |
1742 | ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif, | |
1743 | bss_conf->ibss_joined); | |
1744 | if (ret) | |
1745 | IWL_ERR(priv, "failed to %s IBSS station %pM\n", | |
1746 | bss_conf->ibss_joined ? "add" : "remove", | |
1747 | bss_conf->bssid); | |
1748 | } | |
1749 | ||
52a02d15 JB |
1750 | if (changes & BSS_CHANGED_IDLE && |
1751 | priv->cfg->ops->hcmd->set_pan_params) { | |
1752 | if (priv->cfg->ops->hcmd->set_pan_params(priv)) | |
1753 | IWL_ERR(priv, "failed to update PAN params\n"); | |
1754 | } | |
1755 | ||
3eb9616a | 1756 | out: |
d7129e19 JB |
1757 | mutex_unlock(&priv->mutex); |
1758 | ||
2d0ddec5 | 1759 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
5bbe233b AK |
1760 | } |
1761 | EXPORT_SYMBOL(iwl_bss_info_changed); | |
1762 | ||
b55e75ed | 1763 | static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif) |
727882d6 | 1764 | { |
246ed355 JB |
1765 | struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif); |
1766 | ||
d0fe478c | 1767 | iwl_connection_init_rx_config(priv, ctx); |
727882d6 AK |
1768 | |
1769 | if (priv->cfg->ops->hcmd->set_rxon_chain) | |
246ed355 | 1770 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); |
727882d6 | 1771 | |
246ed355 | 1772 | return iwlcore_commit_rxon(priv, ctx); |
727882d6 | 1773 | } |
727882d6 | 1774 | |
b55e75ed | 1775 | int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
cbb6ab94 AK |
1776 | { |
1777 | struct iwl_priv *priv = hw->priv; | |
246ed355 | 1778 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; |
d0fe478c | 1779 | struct iwl_rxon_context *tmp, *ctx = NULL; |
47e28f41 | 1780 | int err = 0; |
cbb6ab94 | 1781 | |
3779db10 JB |
1782 | IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n", |
1783 | vif->type, vif->addr); | |
cbb6ab94 | 1784 | |
47e28f41 JB |
1785 | mutex_lock(&priv->mutex); |
1786 | ||
4bd530f3 SG |
1787 | if (!iwl_is_ready_rf(priv)) { |
1788 | IWL_WARN(priv, "Try to add interface when device not ready\n"); | |
b55e75ed JB |
1789 | err = -EINVAL; |
1790 | goto out; | |
1791 | } | |
1792 | ||
d0fe478c JB |
1793 | for_each_context(priv, tmp) { |
1794 | u32 possible_modes = | |
1795 | tmp->interface_modes | tmp->exclusive_interface_modes; | |
1796 | ||
1797 | if (tmp->vif) { | |
1798 | /* check if this busy context is exclusive */ | |
1799 | if (tmp->exclusive_interface_modes & | |
1800 | BIT(tmp->vif->type)) { | |
1801 | err = -EINVAL; | |
1802 | goto out; | |
1803 | } | |
1804 | continue; | |
1805 | } | |
1806 | ||
1807 | if (!(possible_modes & BIT(vif->type))) | |
1808 | continue; | |
1809 | ||
1810 | /* have maybe usable context w/o interface */ | |
1811 | ctx = tmp; | |
1812 | break; | |
1813 | } | |
1814 | ||
1815 | if (!ctx) { | |
47e28f41 JB |
1816 | err = -EOPNOTSUPP; |
1817 | goto out; | |
cbb6ab94 AK |
1818 | } |
1819 | ||
d0fe478c | 1820 | vif_priv->ctx = ctx; |
8bd413e6 | 1821 | ctx->vif = vif; |
d0fe478c JB |
1822 | /* |
1823 | * This variable will be correct only when there's just | |
1824 | * a single context, but all code using it is for hardware | |
1825 | * that supports only one context. | |
1826 | */ | |
1ed32e4f | 1827 | priv->iw_mode = vif->type; |
cbb6ab94 | 1828 | |
763cc3bf JB |
1829 | ctx->is_active = true; |
1830 | ||
b55e75ed | 1831 | err = iwl_set_mode(priv, vif); |
763cc3bf JB |
1832 | if (err) { |
1833 | if (!ctx->always_active) | |
1834 | ctx->is_active = false; | |
b55e75ed | 1835 | goto out_err; |
763cc3bf | 1836 | } |
7e246191 | 1837 | |
7cb1b088 WYG |
1838 | if (priv->cfg->bt_params && |
1839 | priv->cfg->bt_params->advanced_bt_coexist && | |
59079949 JB |
1840 | vif->type == NL80211_IFTYPE_ADHOC) { |
1841 | /* | |
1842 | * pretend to have high BT traffic as long as we | |
1843 | * are operating in IBSS mode, as this will cause | |
1844 | * the rate scaling etc. to behave as intended. | |
1845 | */ | |
1846 | priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH; | |
1847 | } | |
1848 | ||
b55e75ed | 1849 | goto out; |
cbb6ab94 | 1850 | |
b55e75ed | 1851 | out_err: |
8bd413e6 | 1852 | ctx->vif = NULL; |
b55e75ed | 1853 | priv->iw_mode = NL80211_IFTYPE_STATION; |
47e28f41 | 1854 | out: |
cbb6ab94 AK |
1855 | mutex_unlock(&priv->mutex); |
1856 | ||
1857 | IWL_DEBUG_MAC80211(priv, "leave\n"); | |
47e28f41 | 1858 | return err; |
cbb6ab94 AK |
1859 | } |
1860 | EXPORT_SYMBOL(iwl_mac_add_interface); | |
1861 | ||
d8052319 | 1862 | void iwl_mac_remove_interface(struct ieee80211_hw *hw, |
b55e75ed | 1863 | struct ieee80211_vif *vif) |
d8052319 AK |
1864 | { |
1865 | struct iwl_priv *priv = hw->priv; | |
246ed355 | 1866 | struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif); |
d8052319 AK |
1867 | |
1868 | IWL_DEBUG_MAC80211(priv, "enter\n"); | |
1869 | ||
1870 | mutex_lock(&priv->mutex); | |
1871 | ||
d0fe478c JB |
1872 | WARN_ON(ctx->vif != vif); |
1873 | ctx->vif = NULL; | |
1874 | ||
e7e16b90 SG |
1875 | if (priv->scan_vif == vif) { |
1876 | iwl_scan_cancel_timeout(priv, 200); | |
1877 | iwl_force_scan_end(priv); | |
1878 | } | |
d0fe478c | 1879 | iwl_set_mode(priv, vif); |
8bd413e6 | 1880 | |
763cc3bf JB |
1881 | if (!ctx->always_active) |
1882 | ctx->is_active = false; | |
1883 | ||
59079949 JB |
1884 | /* |
1885 | * When removing the IBSS interface, overwrite the | |
1886 | * BT traffic load with the stored one from the last | |
1887 | * notification, if any. If this is a device that | |
1888 | * doesn't implement this, this has no effect since | |
1889 | * both values are the same and zero. | |
1890 | */ | |
1891 | if (vif->type == NL80211_IFTYPE_ADHOC) | |
1892 | priv->bt_traffic_load = priv->notif_bt_traffic_load; | |
1893 | ||
8bd413e6 | 1894 | memset(priv->bssid, 0, ETH_ALEN); |
d8052319 AK |
1895 | mutex_unlock(&priv->mutex); |
1896 | ||
1897 | IWL_DEBUG_MAC80211(priv, "leave\n"); | |
1898 | ||
1899 | } | |
1900 | EXPORT_SYMBOL(iwl_mac_remove_interface); | |
1901 | ||
4808368d AK |
1902 | /** |
1903 | * iwl_mac_config - mac80211 config callback | |
4808368d AK |
1904 | */ |
1905 | int iwl_mac_config(struct ieee80211_hw *hw, u32 changed) | |
1906 | { | |
1907 | struct iwl_priv *priv = hw->priv; | |
1908 | const struct iwl_channel_info *ch_info; | |
1909 | struct ieee80211_conf *conf = &hw->conf; | |
aa2dc6b5 | 1910 | struct ieee80211_channel *channel = conf->channel; |
fad95bf5 | 1911 | struct iwl_ht_config *ht_conf = &priv->current_ht_config; |
246ed355 | 1912 | struct iwl_rxon_context *ctx; |
4808368d AK |
1913 | unsigned long flags = 0; |
1914 | int ret = 0; | |
1915 | u16 ch; | |
1916 | int scan_active = 0; | |
1917 | ||
1918 | mutex_lock(&priv->mutex); | |
1919 | ||
4808368d | 1920 | IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n", |
aa2dc6b5 | 1921 | channel->hw_value, changed); |
4808368d AK |
1922 | |
1923 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && | |
1924 | test_bit(STATUS_SCANNING, &priv->status))) { | |
1925 | scan_active = 1; | |
1926 | IWL_DEBUG_MAC80211(priv, "leave - scanning\n"); | |
1927 | } | |
1928 | ||
ba37a3d0 JB |
1929 | if (changed & (IEEE80211_CONF_CHANGE_SMPS | |
1930 | IEEE80211_CONF_CHANGE_CHANNEL)) { | |
1931 | /* mac80211 uses static for non-HT which is what we want */ | |
1932 | priv->current_ht_config.smps = conf->smps_mode; | |
1933 | ||
1934 | /* | |
1935 | * Recalculate chain counts. | |
1936 | * | |
1937 | * If monitor mode is enabled then mac80211 will | |
1938 | * set up the SM PS mode to OFF if an HT channel is | |
1939 | * configured. | |
1940 | */ | |
1941 | if (priv->cfg->ops->hcmd->set_rxon_chain) | |
246ed355 JB |
1942 | for_each_context(priv, ctx) |
1943 | priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); | |
ba37a3d0 | 1944 | } |
4808368d AK |
1945 | |
1946 | /* during scanning mac80211 will delay channel setting until | |
1947 | * scan finish with changed = 0 | |
1948 | */ | |
1949 | if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) { | |
1950 | if (scan_active) | |
1951 | goto set_ch_out; | |
1952 | ||
aa2dc6b5 SZ |
1953 | ch = channel->hw_value; |
1954 | ch_info = iwl_get_channel_info(priv, channel->band, ch); | |
4808368d AK |
1955 | if (!is_channel_valid(ch_info)) { |
1956 | IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n"); | |
1957 | ret = -EINVAL; | |
1958 | goto set_ch_out; | |
1959 | } | |
1960 | ||
4808368d AK |
1961 | spin_lock_irqsave(&priv->lock, flags); |
1962 | ||
246ed355 | 1963 | for_each_context(priv, ctx) { |
7e6a5886 JB |
1964 | /* Configure HT40 channels */ |
1965 | ctx->ht.enabled = conf_is_ht(conf); | |
1966 | if (ctx->ht.enabled) { | |
1967 | if (conf_is_ht40_minus(conf)) { | |
1968 | ctx->ht.extension_chan_offset = | |
1969 | IEEE80211_HT_PARAM_CHA_SEC_BELOW; | |
1970 | ctx->ht.is_40mhz = true; | |
1971 | } else if (conf_is_ht40_plus(conf)) { | |
1972 | ctx->ht.extension_chan_offset = | |
1973 | IEEE80211_HT_PARAM_CHA_SEC_ABOVE; | |
1974 | ctx->ht.is_40mhz = true; | |
1975 | } else { | |
1976 | ctx->ht.extension_chan_offset = | |
1977 | IEEE80211_HT_PARAM_CHA_SEC_NONE; | |
1978 | ctx->ht.is_40mhz = false; | |
1979 | } | |
1980 | } else | |
1981 | ctx->ht.is_40mhz = false; | |
1982 | ||
1983 | /* | |
1984 | * Default to no protection. Protection mode will | |
1985 | * later be set from BSS config in iwl_ht_conf | |
1986 | */ | |
1987 | ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE; | |
1988 | ||
246ed355 JB |
1989 | /* if we are switching from ht to 2.4 clear flags |
1990 | * from any ht related info since 2.4 does not | |
1991 | * support ht */ | |
1992 | if ((le16_to_cpu(ctx->staging.channel) != ch)) | |
1993 | ctx->staging.flags = 0; | |
4808368d | 1994 | |
246ed355 JB |
1995 | iwl_set_rxon_channel(priv, channel, ctx); |
1996 | iwl_set_rxon_ht(priv, ht_conf); | |
1997 | ||
1998 | iwl_set_flags_for_band(priv, ctx, channel->band, | |
8bd413e6 | 1999 | ctx->vif); |
246ed355 | 2000 | } |
4808368d | 2001 | |
4808368d | 2002 | spin_unlock_irqrestore(&priv->lock, flags); |
79d07325 | 2003 | |
a194e324 JB |
2004 | if (priv->cfg->ops->lib->update_bcast_stations) |
2005 | ret = priv->cfg->ops->lib->update_bcast_stations(priv); | |
278c2f6f | 2006 | |
4808368d AK |
2007 | set_ch_out: |
2008 | /* The list of supported rates and rate mask can be different | |
2009 | * for each band; since the band may have changed, reset | |
2010 | * the rate mask to what mac80211 lists */ | |
2011 | iwl_set_rate(priv); | |
2012 | } | |
2013 | ||
78f5fb7f JB |
2014 | if (changed & (IEEE80211_CONF_CHANGE_PS | |
2015 | IEEE80211_CONF_CHANGE_IDLE)) { | |
e312c24c | 2016 | ret = iwl_power_update_mode(priv, false); |
4808368d | 2017 | if (ret) |
e312c24c | 2018 | IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n"); |
4808368d AK |
2019 | } |
2020 | ||
2021 | if (changed & IEEE80211_CONF_CHANGE_POWER) { | |
2022 | IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n", | |
2023 | priv->tx_power_user_lmt, conf->power_level); | |
2024 | ||
a25a66ac SG |
2025 | ret = iwl_set_tx_power(priv, conf->power_level, false); |
2026 | if (ret) | |
2027 | IWL_ERR(priv, "Error sending TX power (%d)\n", ret); | |
4808368d AK |
2028 | } |
2029 | ||
0cf4c01e MA |
2030 | if (!iwl_is_ready(priv)) { |
2031 | IWL_DEBUG_MAC80211(priv, "leave - not ready\n"); | |
2032 | goto out; | |
2033 | } | |
2034 | ||
4808368d AK |
2035 | if (scan_active) |
2036 | goto out; | |
2037 | ||
246ed355 JB |
2038 | for_each_context(priv, ctx) { |
2039 | if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging))) | |
2040 | iwlcore_commit_rxon(priv, ctx); | |
2041 | else | |
2042 | IWL_DEBUG_INFO(priv, | |
2043 | "Not re-sending same RXON configuration.\n"); | |
2044 | } | |
4808368d AK |
2045 | |
2046 | out: | |
2047 | IWL_DEBUG_MAC80211(priv, "leave\n"); | |
2048 | mutex_unlock(&priv->mutex); | |
2049 | return ret; | |
2050 | } | |
2051 | EXPORT_SYMBOL(iwl_mac_config); | |
2052 | ||
bd564261 AK |
2053 | void iwl_mac_reset_tsf(struct ieee80211_hw *hw) |
2054 | { | |
2055 | struct iwl_priv *priv = hw->priv; | |
2056 | unsigned long flags; | |
246ed355 JB |
2057 | /* IBSS can only be the IWL_RXON_CTX_BSS context */ |
2058 | struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; | |
bd564261 AK |
2059 | |
2060 | mutex_lock(&priv->mutex); | |
2061 | IWL_DEBUG_MAC80211(priv, "enter\n"); | |
2062 | ||
2063 | spin_lock_irqsave(&priv->lock, flags); | |
fad95bf5 | 2064 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config)); |
bd564261 AK |
2065 | spin_unlock_irqrestore(&priv->lock, flags); |
2066 | ||
bd564261 | 2067 | spin_lock_irqsave(&priv->lock, flags); |
bd564261 AK |
2068 | |
2069 | /* new association get rid of ibss beacon skb */ | |
12e934dc JB |
2070 | if (priv->beacon_skb) |
2071 | dev_kfree_skb(priv->beacon_skb); | |
bd564261 | 2072 | |
12e934dc | 2073 | priv->beacon_skb = NULL; |
bd564261 | 2074 | |
bd564261 | 2075 | priv->timestamp = 0; |
bd564261 AK |
2076 | |
2077 | spin_unlock_irqrestore(&priv->lock, flags); | |
2078 | ||
f5354c17 | 2079 | iwl_scan_cancel_timeout(priv, 100); |
bd564261 AK |
2080 | if (!iwl_is_ready_rf(priv)) { |
2081 | IWL_DEBUG_MAC80211(priv, "leave - not ready\n"); | |
2082 | mutex_unlock(&priv->mutex); | |
2083 | return; | |
2084 | } | |
2085 | ||
2086 | /* we are restarting association process | |
2087 | * clear RXON_FILTER_ASSOC_MSK bit | |
2088 | */ | |
246ed355 JB |
2089 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
2090 | iwlcore_commit_rxon(priv, ctx); | |
bd564261 AK |
2091 | |
2092 | iwl_set_rate(priv); | |
2093 | ||
2094 | mutex_unlock(&priv->mutex); | |
2095 | ||
2096 | IWL_DEBUG_MAC80211(priv, "leave\n"); | |
2097 | } | |
2098 | EXPORT_SYMBOL(iwl_mac_reset_tsf); | |
2099 | ||
88804e2b WYG |
2100 | int iwl_alloc_txq_mem(struct iwl_priv *priv) |
2101 | { | |
2102 | if (!priv->txq) | |
2103 | priv->txq = kzalloc( | |
7cb1b088 WYG |
2104 | sizeof(struct iwl_tx_queue) * |
2105 | priv->cfg->base_params->num_of_queues, | |
88804e2b WYG |
2106 | GFP_KERNEL); |
2107 | if (!priv->txq) { | |
91dd6c27 | 2108 | IWL_ERR(priv, "Not enough memory for txq\n"); |
88804e2b WYG |
2109 | return -ENOMEM; |
2110 | } | |
2111 | return 0; | |
2112 | } | |
2113 | EXPORT_SYMBOL(iwl_alloc_txq_mem); | |
2114 | ||
2115 | void iwl_free_txq_mem(struct iwl_priv *priv) | |
2116 | { | |
2117 | kfree(priv->txq); | |
2118 | priv->txq = NULL; | |
2119 | } | |
2120 | EXPORT_SYMBOL(iwl_free_txq_mem); | |
2121 | ||
20594eb0 WYG |
2122 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
2123 | ||
2124 | #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES) | |
2125 | ||
2126 | void iwl_reset_traffic_log(struct iwl_priv *priv) | |
2127 | { | |
2128 | priv->tx_traffic_idx = 0; | |
2129 | priv->rx_traffic_idx = 0; | |
2130 | if (priv->tx_traffic) | |
2131 | memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE); | |
2132 | if (priv->rx_traffic) | |
2133 | memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE); | |
2134 | } | |
2135 | ||
2136 | int iwl_alloc_traffic_mem(struct iwl_priv *priv) | |
2137 | { | |
2138 | u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE; | |
2139 | ||
2140 | if (iwl_debug_level & IWL_DL_TX) { | |
2141 | if (!priv->tx_traffic) { | |
2142 | priv->tx_traffic = | |
2143 | kzalloc(traffic_size, GFP_KERNEL); | |
2144 | if (!priv->tx_traffic) | |
2145 | return -ENOMEM; | |
2146 | } | |
2147 | } | |
2148 | if (iwl_debug_level & IWL_DL_RX) { | |
2149 | if (!priv->rx_traffic) { | |
2150 | priv->rx_traffic = | |
2151 | kzalloc(traffic_size, GFP_KERNEL); | |
2152 | if (!priv->rx_traffic) | |
2153 | return -ENOMEM; | |
2154 | } | |
2155 | } | |
2156 | iwl_reset_traffic_log(priv); | |
2157 | return 0; | |
2158 | } | |
2159 | EXPORT_SYMBOL(iwl_alloc_traffic_mem); | |
2160 | ||
2161 | void iwl_free_traffic_mem(struct iwl_priv *priv) | |
2162 | { | |
2163 | kfree(priv->tx_traffic); | |
2164 | priv->tx_traffic = NULL; | |
2165 | ||
2166 | kfree(priv->rx_traffic); | |
2167 | priv->rx_traffic = NULL; | |
2168 | } | |
2169 | EXPORT_SYMBOL(iwl_free_traffic_mem); | |
2170 | ||
2171 | void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv, | |
2172 | u16 length, struct ieee80211_hdr *header) | |
2173 | { | |
2174 | __le16 fc; | |
2175 | u16 len; | |
2176 | ||
2177 | if (likely(!(iwl_debug_level & IWL_DL_TX))) | |
2178 | return; | |
2179 | ||
2180 | if (!priv->tx_traffic) | |
2181 | return; | |
2182 | ||
2183 | fc = header->frame_control; | |
2184 | if (ieee80211_is_data(fc)) { | |
2185 | len = (length > IWL_TRAFFIC_ENTRY_SIZE) | |
2186 | ? IWL_TRAFFIC_ENTRY_SIZE : length; | |
2187 | memcpy((priv->tx_traffic + | |
2188 | (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)), | |
2189 | header, len); | |
2190 | priv->tx_traffic_idx = | |
2191 | (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES; | |
2192 | } | |
2193 | } | |
2194 | EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame); | |
2195 | ||
2196 | void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv, | |
2197 | u16 length, struct ieee80211_hdr *header) | |
2198 | { | |
2199 | __le16 fc; | |
2200 | u16 len; | |
2201 | ||
2202 | if (likely(!(iwl_debug_level & IWL_DL_RX))) | |
2203 | return; | |
2204 | ||
2205 | if (!priv->rx_traffic) | |
2206 | return; | |
2207 | ||
2208 | fc = header->frame_control; | |
2209 | if (ieee80211_is_data(fc)) { | |
2210 | len = (length > IWL_TRAFFIC_ENTRY_SIZE) | |
2211 | ? IWL_TRAFFIC_ENTRY_SIZE : length; | |
2212 | memcpy((priv->rx_traffic + | |
2213 | (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)), | |
2214 | header, len); | |
2215 | priv->rx_traffic_idx = | |
2216 | (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES; | |
2217 | } | |
2218 | } | |
2219 | EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame); | |
22fdf3c9 WYG |
2220 | |
2221 | const char *get_mgmt_string(int cmd) | |
2222 | { | |
2223 | switch (cmd) { | |
2224 | IWL_CMD(MANAGEMENT_ASSOC_REQ); | |
2225 | IWL_CMD(MANAGEMENT_ASSOC_RESP); | |
2226 | IWL_CMD(MANAGEMENT_REASSOC_REQ); | |
2227 | IWL_CMD(MANAGEMENT_REASSOC_RESP); | |
2228 | IWL_CMD(MANAGEMENT_PROBE_REQ); | |
2229 | IWL_CMD(MANAGEMENT_PROBE_RESP); | |
2230 | IWL_CMD(MANAGEMENT_BEACON); | |
2231 | IWL_CMD(MANAGEMENT_ATIM); | |
2232 | IWL_CMD(MANAGEMENT_DISASSOC); | |
2233 | IWL_CMD(MANAGEMENT_AUTH); | |
2234 | IWL_CMD(MANAGEMENT_DEAUTH); | |
2235 | IWL_CMD(MANAGEMENT_ACTION); | |
2236 | default: | |
2237 | return "UNKNOWN"; | |
2238 | ||
2239 | } | |
2240 | } | |
2241 | ||
2242 | const char *get_ctrl_string(int cmd) | |
2243 | { | |
2244 | switch (cmd) { | |
2245 | IWL_CMD(CONTROL_BACK_REQ); | |
2246 | IWL_CMD(CONTROL_BACK); | |
2247 | IWL_CMD(CONTROL_PSPOLL); | |
2248 | IWL_CMD(CONTROL_RTS); | |
2249 | IWL_CMD(CONTROL_CTS); | |
2250 | IWL_CMD(CONTROL_ACK); | |
2251 | IWL_CMD(CONTROL_CFEND); | |
2252 | IWL_CMD(CONTROL_CFENDACK); | |
2253 | default: | |
2254 | return "UNKNOWN"; | |
2255 | ||
2256 | } | |
2257 | } | |
2258 | ||
7163b8a4 | 2259 | void iwl_clear_traffic_stats(struct iwl_priv *priv) |
22fdf3c9 WYG |
2260 | { |
2261 | memset(&priv->tx_stats, 0, sizeof(struct traffic_stats)); | |
22fdf3c9 | 2262 | memset(&priv->rx_stats, 0, sizeof(struct traffic_stats)); |
7163b8a4 | 2263 | priv->led_tpt = 0; |
22fdf3c9 WYG |
2264 | } |
2265 | ||
2266 | /* | |
2267 | * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will | |
2268 | * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass. | |
2269 | * Use debugFs to display the rx/rx_statistics | |
2270 | * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL | |
2271 | * information will be recorded, but DATA pkt still will be recorded | |
2272 | * for the reason of iwl_led.c need to control the led blinking based on | |
2273 | * number of tx and rx data. | |
2274 | * | |
2275 | */ | |
2276 | void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len) | |
2277 | { | |
2278 | struct traffic_stats *stats; | |
2279 | ||
2280 | if (is_tx) | |
2281 | stats = &priv->tx_stats; | |
2282 | else | |
2283 | stats = &priv->rx_stats; | |
2284 | ||
2285 | if (ieee80211_is_mgmt(fc)) { | |
2286 | switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) { | |
2287 | case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ): | |
2288 | stats->mgmt[MANAGEMENT_ASSOC_REQ]++; | |
2289 | break; | |
2290 | case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP): | |
2291 | stats->mgmt[MANAGEMENT_ASSOC_RESP]++; | |
2292 | break; | |
2293 | case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ): | |
2294 | stats->mgmt[MANAGEMENT_REASSOC_REQ]++; | |
2295 | break; | |
2296 | case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP): | |
2297 | stats->mgmt[MANAGEMENT_REASSOC_RESP]++; | |
2298 | break; | |
2299 | case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ): | |
2300 | stats->mgmt[MANAGEMENT_PROBE_REQ]++; | |
2301 | break; | |
2302 | case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP): | |
2303 | stats->mgmt[MANAGEMENT_PROBE_RESP]++; | |
2304 | break; | |
2305 | case cpu_to_le16(IEEE80211_STYPE_BEACON): | |
2306 | stats->mgmt[MANAGEMENT_BEACON]++; | |
2307 | break; | |
2308 | case cpu_to_le16(IEEE80211_STYPE_ATIM): | |
2309 | stats->mgmt[MANAGEMENT_ATIM]++; | |
2310 | break; | |
2311 | case cpu_to_le16(IEEE80211_STYPE_DISASSOC): | |
2312 | stats->mgmt[MANAGEMENT_DISASSOC]++; | |
2313 | break; | |
2314 | case cpu_to_le16(IEEE80211_STYPE_AUTH): | |
2315 | stats->mgmt[MANAGEMENT_AUTH]++; | |
2316 | break; | |
2317 | case cpu_to_le16(IEEE80211_STYPE_DEAUTH): | |
2318 | stats->mgmt[MANAGEMENT_DEAUTH]++; | |
2319 | break; | |
2320 | case cpu_to_le16(IEEE80211_STYPE_ACTION): | |
2321 | stats->mgmt[MANAGEMENT_ACTION]++; | |
2322 | break; | |
2323 | } | |
2324 | } else if (ieee80211_is_ctl(fc)) { | |
2325 | switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) { | |
2326 | case cpu_to_le16(IEEE80211_STYPE_BACK_REQ): | |
2327 | stats->ctrl[CONTROL_BACK_REQ]++; | |
2328 | break; | |
2329 | case cpu_to_le16(IEEE80211_STYPE_BACK): | |
2330 | stats->ctrl[CONTROL_BACK]++; | |
2331 | break; | |
2332 | case cpu_to_le16(IEEE80211_STYPE_PSPOLL): | |
2333 | stats->ctrl[CONTROL_PSPOLL]++; | |
2334 | break; | |
2335 | case cpu_to_le16(IEEE80211_STYPE_RTS): | |
2336 | stats->ctrl[CONTROL_RTS]++; | |
2337 | break; | |
2338 | case cpu_to_le16(IEEE80211_STYPE_CTS): | |
2339 | stats->ctrl[CONTROL_CTS]++; | |
2340 | break; | |
2341 | case cpu_to_le16(IEEE80211_STYPE_ACK): | |
2342 | stats->ctrl[CONTROL_ACK]++; | |
2343 | break; | |
2344 | case cpu_to_le16(IEEE80211_STYPE_CFEND): | |
2345 | stats->ctrl[CONTROL_CFEND]++; | |
2346 | break; | |
2347 | case cpu_to_le16(IEEE80211_STYPE_CFENDACK): | |
2348 | stats->ctrl[CONTROL_CFENDACK]++; | |
2349 | break; | |
2350 | } | |
2351 | } else { | |
2352 | /* data */ | |
2353 | stats->data_cnt++; | |
2354 | stats->data_bytes += len; | |
2355 | } | |
d5f4cf71 | 2356 | iwl_leds_background(priv); |
22fdf3c9 WYG |
2357 | } |
2358 | EXPORT_SYMBOL(iwl_update_stats); | |
20594eb0 WYG |
2359 | #endif |
2360 | ||
a93e7973 | 2361 | static void iwl_force_rf_reset(struct iwl_priv *priv) |
afbdd69a WYG |
2362 | { |
2363 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2364 | return; | |
2365 | ||
246ed355 | 2366 | if (!iwl_is_any_associated(priv)) { |
afbdd69a WYG |
2367 | IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n"); |
2368 | return; | |
2369 | } | |
2370 | /* | |
2371 | * There is no easy and better way to force reset the radio, | |
2372 | * the only known method is switching channel which will force to | |
2373 | * reset and tune the radio. | |
2374 | * Use internal short scan (single channel) operation to should | |
2375 | * achieve this objective. | |
2376 | * Driver should reset the radio when number of consecutive missed | |
2377 | * beacon, or any other uCode error condition detected. | |
2378 | */ | |
2379 | IWL_DEBUG_INFO(priv, "perform radio reset.\n"); | |
2380 | iwl_internal_short_hw_scan(priv); | |
afbdd69a | 2381 | } |
a93e7973 | 2382 | |
a93e7973 | 2383 | |
c04f9f22 | 2384 | int iwl_force_reset(struct iwl_priv *priv, int mode, bool external) |
a93e7973 | 2385 | { |
8a472da4 WYG |
2386 | struct iwl_force_reset *force_reset; |
2387 | ||
a93e7973 WYG |
2388 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
2389 | return -EINVAL; | |
2390 | ||
8a472da4 WYG |
2391 | if (mode >= IWL_MAX_FORCE_RESET) { |
2392 | IWL_DEBUG_INFO(priv, "invalid reset request.\n"); | |
2393 | return -EINVAL; | |
2394 | } | |
2395 | force_reset = &priv->force_reset[mode]; | |
2396 | force_reset->reset_request_count++; | |
c04f9f22 WYG |
2397 | if (!external) { |
2398 | if (force_reset->last_force_reset_jiffies && | |
2399 | time_after(force_reset->last_force_reset_jiffies + | |
2400 | force_reset->reset_duration, jiffies)) { | |
2401 | IWL_DEBUG_INFO(priv, "force reset rejected\n"); | |
2402 | force_reset->reset_reject_count++; | |
2403 | return -EAGAIN; | |
2404 | } | |
a93e7973 | 2405 | } |
8a472da4 WYG |
2406 | force_reset->reset_success_count++; |
2407 | force_reset->last_force_reset_jiffies = jiffies; | |
a93e7973 | 2408 | IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode); |
a93e7973 WYG |
2409 | switch (mode) { |
2410 | case IWL_RF_RESET: | |
2411 | iwl_force_rf_reset(priv); | |
2412 | break; | |
2413 | case IWL_FW_RESET: | |
c04f9f22 WYG |
2414 | /* |
2415 | * if the request is from external(ex: debugfs), | |
2416 | * then always perform the request in regardless the module | |
2417 | * parameter setting | |
2418 | * if the request is from internal (uCode error or driver | |
2419 | * detect failure), then fw_restart module parameter | |
2420 | * need to be check before performing firmware reload | |
2421 | */ | |
2422 | if (!external && !priv->cfg->mod_params->restart_fw) { | |
2423 | IWL_DEBUG_INFO(priv, "Cancel firmware reload based on " | |
2424 | "module parameter setting\n"); | |
2425 | break; | |
2426 | } | |
a93e7973 WYG |
2427 | IWL_ERR(priv, "On demand firmware reload\n"); |
2428 | /* Set the FW error flag -- cleared on iwl_down */ | |
2429 | set_bit(STATUS_FW_ERROR, &priv->status); | |
2430 | wake_up_interruptible(&priv->wait_command_queue); | |
2431 | /* | |
2432 | * Keep the restart process from trying to send host | |
2433 | * commands by clearing the INIT status bit | |
2434 | */ | |
2435 | clear_bit(STATUS_READY, &priv->status); | |
2436 | queue_work(priv->workqueue, &priv->restart); | |
2437 | break; | |
a93e7973 | 2438 | } |
a93e7973 WYG |
2439 | return 0; |
2440 | } | |
b74e31a9 WYG |
2441 | |
2442 | /** | |
2443 | * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover | |
2444 | * | |
2445 | * During normal condition (no queue is stuck), the timer is continually set to | |
2446 | * execute every monitor_recover_period milliseconds after the last timer | |
2447 | * expired. When the queue read_ptr is at the same place, the timer is | |
2448 | * shorten to 100mSecs. This is | |
2449 | * 1) to reduce the chance that the read_ptr may wrap around (not stuck) | |
2450 | * 2) to detect the stuck queues quicker before the station and AP can | |
2451 | * disassociate each other. | |
2452 | * | |
2453 | * This function monitors all the tx queues and recover from it if any | |
2454 | * of the queues are stuck. | |
2455 | * 1. It first check the cmd queue for stuck conditions. If it is stuck, | |
2456 | * it will recover by resetting the firmware and return. | |
2457 | * 2. Then, it checks for station association. If it associates it will check | |
2458 | * other queues. If any queue is stuck, it will recover by resetting | |
2459 | * the firmware. | |
2460 | * Note: It the number of times the queue read_ptr to be at the same place to | |
2461 | * be MAX_REPEAT+1 in order to consider to be stuck. | |
2462 | */ | |
2463 | /* | |
2464 | * The maximum number of times the read pointer of the tx queue at the | |
2465 | * same place without considering to be stuck. | |
2466 | */ | |
2467 | #define MAX_REPEAT (2) | |
2468 | static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt) | |
2469 | { | |
2470 | struct iwl_tx_queue *txq; | |
2471 | struct iwl_queue *q; | |
2472 | ||
2473 | txq = &priv->txq[cnt]; | |
2474 | q = &txq->q; | |
2475 | /* queue is empty, skip */ | |
7cb1b088 WYG |
2476 | if (q->read_ptr == q->write_ptr) |
2477 | return 0; | |
2478 | ||
2479 | if (q->read_ptr == q->last_read_ptr) { | |
2480 | /* a queue has not been read from last time */ | |
2481 | if (q->repeat_same_read_ptr > MAX_REPEAT) { | |
2482 | IWL_ERR(priv, | |
2483 | "queue %d stuck %d time. Fw reload.\n", | |
2484 | q->id, q->repeat_same_read_ptr); | |
b74e31a9 | 2485 | q->repeat_same_read_ptr = 0; |
7cb1b088 WYG |
2486 | iwl_force_reset(priv, IWL_FW_RESET, false); |
2487 | } else { | |
2488 | q->repeat_same_read_ptr++; | |
2489 | IWL_DEBUG_RADIO(priv, | |
2490 | "queue %d, not read %d time\n", | |
2491 | q->id, | |
2492 | q->repeat_same_read_ptr); | |
de05ead8 WYG |
2493 | mod_timer(&priv->monitor_recover, |
2494 | jiffies + msecs_to_jiffies( | |
2495 | IWL_ONE_HUNDRED_MSECS)); | |
2496 | return 1; | |
b74e31a9 | 2497 | } |
7cb1b088 WYG |
2498 | } else { |
2499 | q->last_read_ptr = q->read_ptr; | |
2500 | q->repeat_same_read_ptr = 0; | |
b74e31a9 WYG |
2501 | } |
2502 | return 0; | |
2503 | } | |
2504 | ||
2505 | void iwl_bg_monitor_recover(unsigned long data) | |
2506 | { | |
2507 | struct iwl_priv *priv = (struct iwl_priv *)data; | |
2508 | int cnt; | |
2509 | ||
2510 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
2511 | return; | |
2512 | ||
2513 | /* monitor and check for stuck cmd queue */ | |
13bb9483 | 2514 | if (iwl_check_stuck_queue(priv, priv->cmd_queue)) |
b74e31a9 WYG |
2515 | return; |
2516 | ||
2517 | /* monitor and check for other stuck queues */ | |
246ed355 | 2518 | if (iwl_is_any_associated(priv)) { |
b74e31a9 WYG |
2519 | for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) { |
2520 | /* skip as we already checked the command queue */ | |
13bb9483 | 2521 | if (cnt == priv->cmd_queue) |
b74e31a9 WYG |
2522 | continue; |
2523 | if (iwl_check_stuck_queue(priv, cnt)) | |
2524 | return; | |
2525 | } | |
2526 | } | |
7cb1b088 | 2527 | if (priv->cfg->base_params->monitor_recover_period) { |
7bdc473c WYG |
2528 | /* |
2529 | * Reschedule the timer to occur in | |
7cb1b088 | 2530 | * priv->cfg->base_params->monitor_recover_period |
7bdc473c WYG |
2531 | */ |
2532 | mod_timer(&priv->monitor_recover, jiffies + msecs_to_jiffies( | |
7cb1b088 | 2533 | priv->cfg->base_params->monitor_recover_period)); |
7bdc473c | 2534 | } |
b74e31a9 WYG |
2535 | } |
2536 | EXPORT_SYMBOL(iwl_bg_monitor_recover); | |
afbdd69a | 2537 | |
a0ee74cf WYG |
2538 | |
2539 | /* | |
2540 | * extended beacon time format | |
2541 | * time in usec will be changed into a 32-bit value in extended:internal format | |
2542 | * the extended part is the beacon counts | |
2543 | * the internal part is the time in usec within one beacon interval | |
2544 | */ | |
2545 | u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval) | |
2546 | { | |
2547 | u32 quot; | |
2548 | u32 rem; | |
2549 | u32 interval = beacon_interval * TIME_UNIT; | |
2550 | ||
2551 | if (!interval || !usec) | |
2552 | return 0; | |
2553 | ||
2554 | quot = (usec / interval) & | |
2555 | (iwl_beacon_time_mask_high(priv, | |
2556 | priv->hw_params.beacon_time_tsf_bits) >> | |
2557 | priv->hw_params.beacon_time_tsf_bits); | |
2558 | rem = (usec % interval) & iwl_beacon_time_mask_low(priv, | |
2559 | priv->hw_params.beacon_time_tsf_bits); | |
2560 | ||
2561 | return (quot << priv->hw_params.beacon_time_tsf_bits) + rem; | |
2562 | } | |
2563 | EXPORT_SYMBOL(iwl_usecs_to_beacons); | |
2564 | ||
2565 | /* base is usually what we get from ucode with each received frame, | |
2566 | * the same as HW timer counter counting down | |
2567 | */ | |
2568 | __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base, | |
2569 | u32 addon, u32 beacon_interval) | |
2570 | { | |
2571 | u32 base_low = base & iwl_beacon_time_mask_low(priv, | |
2572 | priv->hw_params.beacon_time_tsf_bits); | |
2573 | u32 addon_low = addon & iwl_beacon_time_mask_low(priv, | |
2574 | priv->hw_params.beacon_time_tsf_bits); | |
2575 | u32 interval = beacon_interval * TIME_UNIT; | |
2576 | u32 res = (base & iwl_beacon_time_mask_high(priv, | |
2577 | priv->hw_params.beacon_time_tsf_bits)) + | |
2578 | (addon & iwl_beacon_time_mask_high(priv, | |
2579 | priv->hw_params.beacon_time_tsf_bits)); | |
2580 | ||
2581 | if (base_low > addon_low) | |
2582 | res += base_low - addon_low; | |
2583 | else if (base_low < addon_low) { | |
2584 | res += interval + base_low - addon_low; | |
2585 | res += (1 << priv->hw_params.beacon_time_tsf_bits); | |
2586 | } else | |
2587 | res += (1 << priv->hw_params.beacon_time_tsf_bits); | |
2588 | ||
2589 | return cpu_to_le32(res); | |
2590 | } | |
2591 | EXPORT_SYMBOL(iwl_add_beacon_time); | |
2592 | ||
6da3a13e WYG |
2593 | #ifdef CONFIG_PM |
2594 | ||
f60dc013 | 2595 | int iwl_pci_suspend(struct device *device) |
6da3a13e | 2596 | { |
f60dc013 | 2597 | struct pci_dev *pdev = to_pci_dev(device); |
6da3a13e WYG |
2598 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
2599 | ||
2600 | /* | |
2601 | * This function is called when system goes into suspend state | |
2602 | * mac80211 will call iwl_mac_stop() from the mac80211 suspend function | |
2603 | * first but since iwl_mac_stop() has no knowledge of who the caller is, | |
2604 | * it will not call apm_ops.stop() to stop the DMA operation. | |
2605 | * Calling apm_ops.stop here to make sure we stop the DMA. | |
2606 | */ | |
14e8e4af | 2607 | iwl_apm_stop(priv); |
6da3a13e | 2608 | |
6da3a13e WYG |
2609 | return 0; |
2610 | } | |
2611 | EXPORT_SYMBOL(iwl_pci_suspend); | |
2612 | ||
f60dc013 | 2613 | int iwl_pci_resume(struct device *device) |
6da3a13e | 2614 | { |
f60dc013 | 2615 | struct pci_dev *pdev = to_pci_dev(device); |
6da3a13e | 2616 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
0ab84cff | 2617 | bool hw_rfkill = false; |
6da3a13e | 2618 | |
cd398c31 AK |
2619 | /* |
2620 | * We disable the RETRY_TIMEOUT register (0x41) to keep | |
2621 | * PCI Tx retries from interfering with C3 CPU state. | |
2622 | */ | |
2623 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); | |
2624 | ||
6da3a13e WYG |
2625 | iwl_enable_interrupts(priv); |
2626 | ||
0ab84cff JB |
2627 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
2628 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) | |
2629 | hw_rfkill = true; | |
2630 | ||
2631 | if (hw_rfkill) | |
2632 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
2633 | else | |
2634 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
2635 | ||
2636 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill); | |
2637 | ||
6da3a13e WYG |
2638 | return 0; |
2639 | } | |
2640 | EXPORT_SYMBOL(iwl_pci_resume); | |
2641 | ||
f60dc013 JL |
2642 | const struct dev_pm_ops iwl_pm_ops = { |
2643 | .suspend = iwl_pci_suspend, | |
2644 | .resume = iwl_pci_resume, | |
2645 | .freeze = iwl_pci_suspend, | |
2646 | .thaw = iwl_pci_resume, | |
2647 | .poweroff = iwl_pci_suspend, | |
2648 | .restore = iwl_pci_resume, | |
2649 | }; | |
2650 | EXPORT_SYMBOL(iwl_pm_ops); | |
2651 | ||
6da3a13e | 2652 | #endif /* CONFIG_PM */ |