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iwlwifi: Adjust blink rate to compensate Clock difference
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
01f8162a 5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
1d0a082d 32#include <net/mac80211.h>
df48c323 33
6bc913bd 34#include "iwl-eeprom.h"
3e0d4cb1 35#include "iwl-dev.h" /* FIXME: remove */
19335774 36#include "iwl-debug.h"
df48c323 37#include "iwl-core.h"
b661c819 38#include "iwl-io.h"
5da4b55f 39#include "iwl-power.h"
83dde8c9 40#include "iwl-sta.h"
ef850d7c 41#include "iwl-helpers.h"
df48c323 42
1d0a082d 43
df48c323
TW		 44MODULE_DESCRIPTION("iwl core");
45MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 46MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 47MODULE_LICENSE("GPL");
df48c323 48
c7de35cd
RR		 49#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
50 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
51 IWL_RATE_SISO_##s##M_PLCP, \
52 IWL_RATE_MIMO2_##s##M_PLCP,\
53 IWL_RATE_MIMO3_##s##M_PLCP,\
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX }
61
a562a9dd
RC		 62u32 iwl_debug_level;
63EXPORT_SYMBOL(iwl_debug_level);
64
ef850d7c
MA		 65static irqreturn_t iwl_isr(int irq, void *data);
66
c7de35cd
RR		 67/*
68 * Parameter order:
69 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
70 *
71 * If there isn't a valid next or previous rate then INV is used which
72 * maps to IWL_RATE_INVALID
73 *
74 */
1826dcc0 75const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 76 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
77 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
78 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
79 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
80 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
81 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
82 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
83 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
84 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
85 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
86 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
87 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
88 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
89 /* FIXME:RS: ^^ should be INV (legacy) */
90};
1826dcc0 91EXPORT_SYMBOL(iwl_rates);
c7de35cd 92
e7d326ac
TW		 93/**
94 * translate ucode response to mac80211 tx status control values
95 */
96void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
e6a9854b 97 struct ieee80211_tx_info *info)
e7d326ac 98{
e6a9854b 99 struct ieee80211_tx_rate *r = &info->control.rates[0];
e7d326ac 100
e6a9854b 101 info->antenna_sel_tx =
e7d326ac
TW		 102 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
103 if (rate_n_flags & RATE_MCS_HT_MSK)
e6a9854b 104 r->flags |= IEEE80211_TX_RC_MCS;
e7d326ac 105 if (rate_n_flags & RATE_MCS_GF_MSK)
e6a9854b 106 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
7aafef1c 107 if (rate_n_flags & RATE_MCS_HT40_MSK)
e6a9854b 108 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
e7d326ac 109 if (rate_n_flags & RATE_MCS_DUP_MSK)
e6a9854b 110 r->flags |= IEEE80211_TX_RC_DUP_DATA;
e7d326ac 111 if (rate_n_flags & RATE_MCS_SGI_MSK)
e6a9854b 112 r->flags |= IEEE80211_TX_RC_SHORT_GI;
31513be8 113 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
e7d326ac
TW		 114}
115EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
116
117int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
118{
119 int idx = 0;
120
121 /* HT rate format */
122 if (rate_n_flags & RATE_MCS_HT_MSK) {
123 idx = (rate_n_flags & 0xff);
124
60d32215
DH		 125 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
126 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
127 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 128 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
129
130 idx += IWL_FIRST_OFDM_RATE;
131 /* skip 9M not supported in ht*/
132 if (idx >= IWL_RATE_9M_INDEX)
133 idx += 1;
134 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
135 return idx;
136
137 /* legacy rate format, search for match in table */
138 } else {
139 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
140 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
141 return idx;
142 }
143
144 return -1;
145}
146EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
147
31513be8
DH		 148int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
149{
150 int idx = 0;
151 int band_offset = 0;
152
153 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
154 if (rate_n_flags & RATE_MCS_HT_MSK) {
155 idx = (rate_n_flags & 0xff);
156 return idx;
157 /* Legacy rate format, search for match in table */
158 } else {
159 if (band == IEEE80211_BAND_5GHZ)
160 band_offset = IWL_FIRST_OFDM_RATE;
161 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
162 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
163 return idx - band_offset;
164 }
165
166 return -1;
167}
168
76eff18b
TW		 169u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
170{
171 int i;
172 u8 ind = ant;
173 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
174 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
175 if (priv->hw_params.valid_tx_ant & BIT(ind))
176 return ind;
177 }
178 return ant;
179}
57bd1bea
TW		 180
181const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
182EXPORT_SYMBOL(iwl_bcast_addr);
183
184
1d0a082d
AK		 185/* This function both allocates and initializes hw and priv. */
186struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
187 struct ieee80211_ops *hw_ops)
188{
189 struct iwl_priv *priv;
190
191 /* mac80211 allocates memory for this device instance, including
192 * space for this driver's private structure */
193 struct ieee80211_hw *hw =
194 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
195 if (hw == NULL) {
a3139c59
SO		 196 printk(KERN_ERR "%s: Can not allocate network device\n",
197 cfg->name);
1d0a082d
AK		 198 goto out;
199 }
200
201 priv = hw->priv;
202 priv->hw = hw;
203
204out:
205 return hw;
206}
207EXPORT_SYMBOL(iwl_alloc_all);
208
b661c819
TW		 209void iwl_hw_detect(struct iwl_priv *priv)
210{
211 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
212 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
213 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
214}
215EXPORT_SYMBOL(iwl_hw_detect);
216
1053d35f
RR		 217int iwl_hw_nic_init(struct iwl_priv *priv)
218{
219 unsigned long flags;
220 struct iwl_rx_queue *rxq = &priv->rxq;
221 int ret;
222
223 /* nic_init */
1053d35f 224 spin_lock_irqsave(&priv->lock, flags);
1b73af82 225 priv->cfg->ops->lib->apm_ops.init(priv);
1053d35f
RR		 226 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
227 spin_unlock_irqrestore(&priv->lock, flags);
228
229 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
230
231 priv->cfg->ops->lib->apm_ops.config(priv);
232
233 /* Allocate the RX queue, or reset if it is already allocated */
234 if (!rxq->bd) {
235 ret = iwl_rx_queue_alloc(priv);
236 if (ret) {
15b1687c 237 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1053d35f
RR		 238 return -ENOMEM;
239 }
240 } else
241 iwl_rx_queue_reset(priv, rxq);
242
243 iwl_rx_replenish(priv);
244
245 iwl_rx_init(priv, rxq);
246
247 spin_lock_irqsave(&priv->lock, flags);
248
249 rxq->need_update = 1;
250 iwl_rx_queue_update_write_ptr(priv, rxq);
251
252 spin_unlock_irqrestore(&priv->lock, flags);
253
254 /* Allocate and init all Tx and Command queues */
255 ret = iwl_txq_ctx_reset(priv);
256 if (ret)
257 return ret;
258
259 set_bit(STATUS_INIT, &priv->status);
260
261 return 0;
262}
263EXPORT_SYMBOL(iwl_hw_nic_init);
264
14d2aac5
AK		 265/*
266 * QoS support
267*/
268void iwl_activate_qos(struct iwl_priv *priv, u8 force)
269{
270 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
271 return;
272
273 priv->qos_data.def_qos_parm.qos_flags = 0;
274
275 if (priv->qos_data.qos_cap.q_AP.queue_request &&
276 !priv->qos_data.qos_cap.q_AP.txop_request)
277 priv->qos_data.def_qos_parm.qos_flags |=
278 QOS_PARAM_FLG_TXOP_TYPE_MSK;
279 if (priv->qos_data.qos_active)
280 priv->qos_data.def_qos_parm.qos_flags |=
281 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
282
283 if (priv->current_ht_config.is_ht)
284 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
285
286 if (force || iwl_is_associated(priv)) {
287 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
288 priv->qos_data.qos_active,
289 priv->qos_data.def_qos_parm.qos_flags);
290
291 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
292 sizeof(struct iwl_qosparam_cmd),
293 &priv->qos_data.def_qos_parm, NULL);
294 }
295}
296EXPORT_SYMBOL(iwl_activate_qos);
297
f2c95b04
WYG		 298/*
299 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
300 * (802.11b) (802.11a/g)
301 * AC_BK 15 1023 7 0 0
302 * AC_BE 15 1023 3 0 0
303 * AC_VI 7 15 2 6.016ms 3.008ms
304 * AC_VO 3 7 2 3.264ms 1.504ms
305 */
c7de35cd 306void iwl_reset_qos(struct iwl_priv *priv)
bf85ea4f
AK		 307{
308 u16 cw_min = 15;
309 u16 cw_max = 1023;
310 u8 aifs = 2;
30dab79e 311 bool is_legacy = false;
bf85ea4f
AK		 312 unsigned long flags;
313 int i;
314
315 spin_lock_irqsave(&priv->lock, flags);
30dab79e
WT		 316 /* QoS always active in AP and ADHOC mode
317 * In STA mode wait for association
318 */
319 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
320 priv->iw_mode == NL80211_IFTYPE_AP)
321 priv->qos_data.qos_active = 1;
322 else
323 priv->qos_data.qos_active = 0;
bf85ea4f 324
30dab79e
WT		 325 /* check for legacy mode */
326 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
327 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
328 (priv->iw_mode == NL80211_IFTYPE_STATION &&
329 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
bf85ea4f
AK		 330 cw_min = 31;
331 is_legacy = 1;
332 }
333
334 if (priv->qos_data.qos_active)
335 aifs = 3;
336
f2c95b04 337 /* AC_BE */
bf85ea4f
AK		 338 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
339 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
340 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
341 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
342 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
343
344 if (priv->qos_data.qos_active) {
f2c95b04 345 /* AC_BK */
bf85ea4f
AK		 346 i = 1;
347 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
348 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
349 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
350 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
351 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
352
f2c95b04 353 /* AC_VI */
bf85ea4f
AK		 354 i = 2;
355 priv->qos_data.def_qos_parm.ac[i].cw_min =
356 cpu_to_le16((cw_min + 1) / 2 - 1);
357 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 358 cpu_to_le16(cw_min);
bf85ea4f
AK		 359 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
360 if (is_legacy)
361 priv->qos_data.def_qos_parm.ac[i].edca_txop =
362 cpu_to_le16(6016);
363 else
364 priv->qos_data.def_qos_parm.ac[i].edca_txop =
365 cpu_to_le16(3008);
366 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
367
f2c95b04 368 /* AC_VO */
bf85ea4f
AK		 369 i = 3;
370 priv->qos_data.def_qos_parm.ac[i].cw_min =
371 cpu_to_le16((cw_min + 1) / 4 - 1);
372 priv->qos_data.def_qos_parm.ac[i].cw_max =
f2c95b04 373 cpu_to_le16((cw_min + 1) / 2 - 1);
bf85ea4f
AK		 374 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
375 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
376 if (is_legacy)
377 priv->qos_data.def_qos_parm.ac[i].edca_txop =
378 cpu_to_le16(3264);
379 else
380 priv->qos_data.def_qos_parm.ac[i].edca_txop =
381 cpu_to_le16(1504);
382 } else {
383 for (i = 1; i < 4; i++) {
384 priv->qos_data.def_qos_parm.ac[i].cw_min =
385 cpu_to_le16(cw_min);
386 priv->qos_data.def_qos_parm.ac[i].cw_max =
387 cpu_to_le16(cw_max);
388 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
389 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
390 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
391 }
392 }
e1623446 393 IWL_DEBUG_QOS(priv, "set QoS to default \n");
bf85ea4f
AK		 394
395 spin_unlock_irqrestore(&priv->lock, flags);
396}
c7de35cd
RR		 397EXPORT_SYMBOL(iwl_reset_qos);
398
d9fe60de
JB		 399#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
400#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 401static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 402 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 403 enum ieee80211_band band)
404{
39130df3
RR		 405 u16 max_bit_rate = 0;
406 u8 rx_chains_num = priv->hw_params.rx_chains_num;
407 u8 tx_chains_num = priv->hw_params.tx_chains_num;
408
c7de35cd 409 ht_info->cap = 0;
d9fe60de 410 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 411
d9fe60de 412 ht_info->ht_supported = true;
c7de35cd 413
b261793d
DH		 414 if (priv->cfg->ht_greenfield_support)
415 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de
JB		 416 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
417 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
00c5ae2f 418 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
39130df3
RR		 419
420 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 421 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 422 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
423 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
424 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 425 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 426 }
c7de35cd
RR		 427
428 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 429 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 430
431 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
432 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
433
d9fe60de 434 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 435 if (rx_chains_num >= 2)
d9fe60de 436 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 437 if (rx_chains_num >= 3)
d9fe60de 438 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 439
440 /* Highest supported Rx data rate */
441 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 442 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
443 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 444
445 /* Tx MCS capabilities */
d9fe60de 446 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 447 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 448 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
449 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
450 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 451 }
c7de35cd 452}
c7de35cd
RR		 453
454static void iwlcore_init_hw_rates(struct iwl_priv *priv,
455 struct ieee80211_rate *rates)
456{
457 int i;
458
5027309b 459 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1826dcc0 460 rates[i].bitrate = iwl_rates[i].ieee * 5;
c7de35cd
RR		 461 rates[i].hw_value = i; /* Rate scaling will work on indexes */
462 rates[i].hw_value_short = i;
463 rates[i].flags = 0;
5027309b 464 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
c7de35cd
RR		 465 /*
466 * If CCK != 1M then set short preamble rate flag.
467 */
468 rates[i].flags |=
1826dcc0 469 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
c7de35cd
RR		 470 0 : IEEE80211_RATE_SHORT_PREAMBLE;
471 }
472 }
473}
474
8ccde88a 475
c7de35cd
RR		 476/**
477 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
478 */
534166de 479int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 480{
481 struct iwl_channel_info *ch;
482 struct ieee80211_supported_band *sband;
483 struct ieee80211_channel *channels;
484 struct ieee80211_channel *geo_ch;
485 struct ieee80211_rate *rates;
486 int i = 0;
487
488 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
489 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 490 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 491 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
492 return 0;
493 }
494
495 channels = kzalloc(sizeof(struct ieee80211_channel) *
496 priv->channel_count, GFP_KERNEL);
497 if (!channels)
498 return -ENOMEM;
499
5027309b 500 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 501 GFP_KERNEL);
502 if (!rates) {
503 kfree(channels);
504 return -ENOMEM;
505 }
506
507 /* 5.2GHz channels start after the 2.4GHz channels */
508 sband = &priv->bands[IEEE80211_BAND_5GHZ];
509 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
510 /* just OFDM */
511 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 512 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 513
49779293 514 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 515 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 516 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 517
518 sband = &priv->bands[IEEE80211_BAND_2GHZ];
519 sband->channels = channels;
520 /* OFDM & CCK */
521 sband->bitrates = rates;
5027309b 522 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 523
49779293 524 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 525 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 526 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 527
528 priv->ieee_channels = channels;
529 priv->ieee_rates = rates;
530
c7de35cd
RR		 531 for (i = 0; i < priv->channel_count; i++) {
532 ch = &priv->channel_info[i];
533
534 /* FIXME: might be removed if scan is OK */
535 if (!is_channel_valid(ch))
536 continue;
537
538 if (is_channel_a_band(ch))
539 sband = &priv->bands[IEEE80211_BAND_5GHZ];
540 else
541 sband = &priv->bands[IEEE80211_BAND_2GHZ];
542
543 geo_ch = &sband->channels[sband->n_channels++];
544
545 geo_ch->center_freq =
546 ieee80211_channel_to_frequency(ch->channel);
547 geo_ch->max_power = ch->max_power_avg;
548 geo_ch->max_antenna_gain = 0xff;
549 geo_ch->hw_value = ch->channel;
550
551 if (is_channel_valid(ch)) {
552 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
553 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
554
555 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
556 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
557
558 if (ch->flags & EEPROM_CHANNEL_RADAR)
559 geo_ch->flags |= IEEE80211_CHAN_RADAR;
560
7aafef1c 561 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 562
dc1b0973
WYG		 563 if (ch->max_power_avg > priv->tx_power_device_lmt)
564 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 565 } else {
566 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
567 }
568
e1623446 569 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 570 ch->channel, geo_ch->center_freq,
571 is_channel_a_band(ch) ? "5.2" : "2.4",
572 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
573 "restricted" : "valid",
574 geo_ch->flags);
575 }
576
577 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
578 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 579 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
580 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 581 priv->pci_dev->device,
582 priv->pci_dev->subsystem_device);
c7de35cd
RR		 583 priv->cfg->sku &= ~IWL_SKU_A;
584 }
585
978785a3 586 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 587 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
588 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 589
590 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
591
592 return 0;
593}
534166de 594EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 595
596/*
597 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
598 */
534166de 599void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 600{
601 kfree(priv->ieee_channels);
602 kfree(priv->ieee_rates);
603 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
604}
534166de 605EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 606
28a6b07a 607static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd
RR		 608{
609 return !priv->current_ht_config.is_ht ||
d9fe60de
JB		 610 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
611 (priv->current_ht_config.mcs.rx_mask[2] == 0));
c7de35cd 612}
963f5517 613
47c5196e
TW		 614static u8 iwl_is_channel_extension(struct iwl_priv *priv,
615 enum ieee80211_band band,
616 u16 channel, u8 extension_chan_offset)
617{
618 const struct iwl_channel_info *ch_info;
619
620 ch_info = iwl_get_channel_info(priv, band, channel);
621 if (!is_channel_valid(ch_info))
622 return 0;
623
d9fe60de 624 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 625 return !(ch_info->ht40_extension_channel &
689da1b3 626 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 627 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 628 return !(ch_info->ht40_extension_channel &
689da1b3 629 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 630
631 return 0;
632}
633
7aafef1c 634u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 635 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e
TW		 636{
637 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
638
c812ee24 639 if (!iwl_ht_conf->is_ht || !iwl_ht_conf->is_40mhz)
47c5196e
TW		 640 return 0;
641
a2b0f02e
WYG		 642 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
643 * the bit will not set if it is pure 40MHz case
644 */
47c5196e 645 if (sta_ht_inf) {
a2b0f02e 646 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 647 return 0;
648 }
1e4247d4
WYG		 649#ifdef CONFIG_IWLWIFI_DEBUG
650 if (priv->disable_ht40)
651 return 0;
652#endif
611d3eb7
WYG		 653 return iwl_is_channel_extension(priv, priv->band,
654 le16_to_cpu(priv->staging_rxon.channel),
655 iwl_ht_conf->extension_chan_offset);
47c5196e 656}
7aafef1c 657EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 658
2c2f3b33
TW		 659static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
660{
661 u16 new_val = 0;
662 u16 beacon_factor = 0;
663
664 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
665 new_val = beacon_val / beacon_factor;
666
667 if (!new_val)
668 new_val = max_beacon_val;
669
670 return new_val;
671}
672
673void iwl_setup_rxon_timing(struct iwl_priv *priv)
674{
675 u64 tsf;
676 s32 interval_tm, rem;
677 unsigned long flags;
678 struct ieee80211_conf *conf = NULL;
679 u16 beacon_int;
680
681 conf = ieee80211_get_hw_conf(priv->hw);
682
683 spin_lock_irqsave(&priv->lock, flags);
684 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
685 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
686
687 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
688 beacon_int = priv->beacon_int;
689 priv->rxon_timing.atim_window = 0;
690 } else {
691 beacon_int = priv->vif->bss_conf.beacon_int;
692
693 /* TODO: we need to get atim_window from upper stack
694 * for now we set to 0 */
695 priv->rxon_timing.atim_window = 0;
696 }
697
698 beacon_int = iwl_adjust_beacon_interval(beacon_int,
699 priv->hw_params.max_beacon_itrvl * 1024);
700 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
701
702 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
703 interval_tm = beacon_int * 1024;
704 rem = do_div(tsf, interval_tm);
705 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
706
707 spin_unlock_irqrestore(&priv->lock, flags);
708 IWL_DEBUG_ASSOC(priv,
709 "beacon interval %d beacon timer %d beacon tim %d\n",
710 le16_to_cpu(priv->rxon_timing.beacon_interval),
711 le32_to_cpu(priv->rxon_timing.beacon_init_val),
712 le16_to_cpu(priv->rxon_timing.atim_window));
713}
714EXPORT_SYMBOL(iwl_setup_rxon_timing);
715
8ccde88a
SO		 716void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
717{
718 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
719
720 if (hw_decrypt)
721 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
722 else
723 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
724
725}
726EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
727
728/**
729 * iwl_check_rxon_cmd - validate RXON structure is valid
730 *
731 * NOTE: This is really only useful during development and can eventually
732 * be #ifdef'd out once the driver is stable and folks aren't actively
733 * making changes
734 */
735int iwl_check_rxon_cmd(struct iwl_priv *priv)
736{
737 int error = 0;
738 int counter = 1;
739 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
740
741 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
742 error |= le32_to_cpu(rxon->flags &
743 (RXON_FLG_TGJ_NARROW_BAND_MSK |
744 RXON_FLG_RADAR_DETECT_MSK));
745 if (error)
746 IWL_WARN(priv, "check 24G fields %d | %d\n",
747 counter++, error);
748 } else {
749 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
750 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
751 if (error)
752 IWL_WARN(priv, "check 52 fields %d | %d\n",
753 counter++, error);
754 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
755 if (error)
756 IWL_WARN(priv, "check 52 CCK %d | %d\n",
757 counter++, error);
758 }
759 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
760 if (error)
761 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
762
763 /* make sure basic rates 6Mbps and 1Mbps are supported */
764 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
765 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
766 if (error)
767 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
768
769 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
770 if (error)
771 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
772
773 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
774 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
775 if (error)
776 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
777 counter++, error);
778
779 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
780 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
781 if (error)
782 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
783 counter++, error);
784
785 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
786 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
787 if (error)
788 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
789 counter++, error);
790
791 if (error)
792 IWL_WARN(priv, "Tuning to channel %d\n",
793 le16_to_cpu(rxon->channel));
794
795 if (error) {
796 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
797 return -1;
798 }
799 return 0;
800}
801EXPORT_SYMBOL(iwl_check_rxon_cmd);
802
803/**
804 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
805 * @priv: staging_rxon is compared to active_rxon
806 *
807 * If the RXON structure is changing enough to require a new tune,
808 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
809 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
810 */
811int iwl_full_rxon_required(struct iwl_priv *priv)
812{
813
814 /* These items are only settable from the full RXON command */
815 if (!(iwl_is_associated(priv)) ||
816 compare_ether_addr(priv->staging_rxon.bssid_addr,
817 priv->active_rxon.bssid_addr) ||
818 compare_ether_addr(priv->staging_rxon.node_addr,
819 priv->active_rxon.node_addr) ||
820 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
821 priv->active_rxon.wlap_bssid_addr) ||
822 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
823 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
824 (priv->staging_rxon.air_propagation !=
825 priv->active_rxon.air_propagation) ||
826 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
827 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
828 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
829 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 830 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
831 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 832 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
833 return 1;
834
835 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
836 * be updated with the RXON_ASSOC command -- however only some
837 * flag transitions are allowed using RXON_ASSOC */
838
839 /* Check if we are not switching bands */
840 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
841 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
842 return 1;
843
844 /* Check if we are switching association toggle */
845 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
846 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
847 return 1;
848
849 return 0;
850}
851EXPORT_SYMBOL(iwl_full_rxon_required);
852
853u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
854{
855 int i;
856 int rate_mask;
857
858 /* Set rate mask*/
859 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
860 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
861 else
862 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
863
864 /* Find lowest valid rate */
865 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
866 i = iwl_rates[i].next_ieee) {
867 if (rate_mask & (1 << i))
868 return iwl_rates[i].plcp;
869 }
870
871 /* No valid rate was found. Assign the lowest one */
872 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
873 return IWL_RATE_1M_PLCP;
874 else
875 return IWL_RATE_6M_PLCP;
876}
877EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
878
47c5196e
TW		 879void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
880{
c1adf9fb 881 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 882
42eb7c64 883 if (!ht_info->is_ht) {
a2b0f02e 884 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 885 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 886 RXON_FLG_HT40_PROT_MSK |
42eb7c64 887 RXON_FLG_HT_PROT_MSK);
47c5196e 888 return;
42eb7c64 889 }
47c5196e 890
a2b0f02e
WYG		 891 /* FIXME: if the definition of ht_protection changed, the "translation"
892 * will be needed for rxon->flags
893 */
894 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
895
896 /* Set up channel bandwidth:
7aafef1c 897 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 898 /* clear the HT channel mode before set the mode */
899 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
900 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 901 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
902 /* pure ht40 */
508b08e7 903 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 904 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7
WYG		 905 /* Note: control channel is opposite of extension channel */
906 switch (ht_info->extension_chan_offset) {
907 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
908 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
909 break;
910 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
911 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
912 break;
913 }
914 } else {
a2b0f02e
WYG		 915 /* Note: control channel is opposite of extension channel */
916 switch (ht_info->extension_chan_offset) {
917 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
918 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
919 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
920 break;
921 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
922 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
923 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
924 break;
925 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
926 default:
927 /* channel location only valid if in Mixed mode */
928 IWL_ERR(priv, "invalid extension channel offset\n");
929 break;
930 }
931 }
932 } else {
933 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 934 }
935
45823531
AK		 936 if (priv->cfg->ops->hcmd->set_rxon_chain)
937 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 938
e1623446 939 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
47c5196e 940 "rxon flags 0x%X operation mode :0x%X "
ae5eb026 941 "extension channel offset 0x%x\n",
d9fe60de
JB		 942 ht_info->mcs.rx_mask[0],
943 ht_info->mcs.rx_mask[1],
944 ht_info->mcs.rx_mask[2],
47c5196e 945 le32_to_cpu(rxon->flags), ht_info->ht_protection,
ae5eb026 946 ht_info->extension_chan_offset);
47c5196e
TW		 947 return;
948}
949EXPORT_SYMBOL(iwl_set_rxon_ht);
950
9e5e6c32
TW		 951#define IWL_NUM_RX_CHAINS_MULTIPLE 3
952#define IWL_NUM_RX_CHAINS_SINGLE 2
953#define IWL_NUM_IDLE_CHAINS_DUAL 2
954#define IWL_NUM_IDLE_CHAINS_SINGLE 1
955
956/* Determine how many receiver/antenna chains to use.
c7de35cd
RR		 957 * More provides better reception via diversity. Fewer saves power.
958 * MIMO (dual stream) requires at least 2, but works better with 3.
959 * This does not determine *which* chains to use, just how many.
960 */
28a6b07a 961static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 962{
28a6b07a
TW		 963 bool is_single = is_single_rx_stream(priv);
964 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd
RR		 965
966 /* # of Rx chains to use when expecting MIMO. */
12837be1
RR		 967 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
968 WLAN_HT_CAP_SM_PS_STATIC)))
9e5e6c32 969 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 970 else
9e5e6c32 971 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 972}
c7de35cd 973
28a6b07a
TW		 974static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
975{
976 int idle_cnt;
977 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
c7de35cd 978 /* # Rx chains when idling and maybe trying to save power */
12837be1 979 switch (priv->current_ht_config.sm_ps) {
00c5ae2f
TW		 980 case WLAN_HT_CAP_SM_PS_STATIC:
981 case WLAN_HT_CAP_SM_PS_DYNAMIC:
9e5e6c32
TW		 982 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
983 IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 984 break;
00c5ae2f 985 case WLAN_HT_CAP_SM_PS_DISABLED:
9e5e6c32 986 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
c7de35cd 987 break;
00c5ae2f 988 case WLAN_HT_CAP_SM_PS_INVALID:
c7de35cd 989 default:
15b1687c 990 IWL_ERR(priv, "invalid mimo ps mode %d\n",
12837be1 991 priv->current_ht_config.sm_ps);
28a6b07a
TW		 992 WARN_ON(1);
993 idle_cnt = -1;
c7de35cd
RR		 994 break;
995 }
28a6b07a 996 return idle_cnt;
c7de35cd
RR		 997}
998
04816448
GE		 999/* up to 4 chains */
1000static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1001{
1002 u8 res;
1003 res = (chain_bitmap & BIT(0)) >> 0;
1004 res += (chain_bitmap & BIT(1)) >> 1;
1005 res += (chain_bitmap & BIT(2)) >> 2;
1006 res += (chain_bitmap & BIT(4)) >> 4;
1007 return res;
1008}
1009
4c4df78f
CR		 1010/**
1011 * iwl_is_monitor_mode - Determine if interface in monitor mode
1012 *
1013 * priv->iw_mode is set in add_interface, but add_interface is
1014 * never called for monitor mode. The only way mac80211 informs us about
1015 * monitor mode is through configuring filters (call to configure_filter).
1016 */
279b05d4 1017bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 1018{
1019 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1020}
279b05d4 1021EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 1022
c7de35cd
RR		 1023/**
1024 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1025 *
1026 * Selects how many and which Rx receivers/antennas/chains to use.
1027 * This should not be used for scan command ... it puts data in wrong place.
1028 */
1029void iwl_set_rxon_chain(struct iwl_priv *priv)
1030{
28a6b07a
TW		 1031 bool is_single = is_single_rx_stream(priv);
1032 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 1033 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1034 u32 active_chains;
28a6b07a 1035 u16 rx_chain;
c7de35cd
RR		 1036
1037 /* Tell uCode which antennas are actually connected.
1038 * Before first association, we assume all antennas are connected.
1039 * Just after first association, iwl_chain_noise_calibration()
1040 * checks which antennas actually *are* connected. */
04816448
GE		 1041 if (priv->chain_noise_data.active_chains)
1042 active_chains = priv->chain_noise_data.active_chains;
1043 else
1044 active_chains = priv->hw_params.valid_rx_ant;
1045
1046 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 1047
1048 /* How many receivers should we use? */
28a6b07a
TW		 1049 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1050 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1051
28a6b07a 1052
04816448
GE		 1053 /* correct rx chain count according hw settings
1054 * and chain noise calibration
1055 */
1056 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1057 if (valid_rx_cnt < active_rx_cnt)
1058 active_rx_cnt = valid_rx_cnt;
1059
1060 if (valid_rx_cnt < idle_rx_cnt)
1061 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 1062
1063 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1064 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1065
7b841727
RF		 1066 /* copied from 'iwl_bg_request_scan()' */
1067 /* Force use of chains B and C (0x6) for Rx for 4965
1068 * Avoid A (0x1) because of its off-channel reception on A-band.
1069 * MIMO is not used here, but value is required */
1070 if (iwl_is_monitor_mode(priv) &&
1071 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1072 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
fff7a434
WYG		 1073 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1074 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1075 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1076 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 1077 }
1078
28a6b07a
TW		 1079 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1080
9e5e6c32 1081 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 1082 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1083 else
1084 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1085
e1623446 1086 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 1087 priv->staging_rxon.rx_chain,
1088 active_rx_cnt, idle_rx_cnt);
1089
1090 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1091 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 1092}
1093EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 1094
1095/**
17e72782 1096 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 1097 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1098 * @channel: Any channel valid for the requested phymode
1099
1100 * In addition to setting the staging RXON, priv->phymode is also set.
1101 *
1102 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1103 * in the staging RXON flag structure based on the phymode
1104 */
17e72782 1105int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 1106{
17e72782
TW		 1107 enum ieee80211_band band = ch->band;
1108 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1109
8622e705 1110 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 1111 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 1112 channel, band);
1113 return -EINVAL;
1114 }
1115
1116 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1117 (priv->band == band))
1118 return 0;
1119
1120 priv->staging_rxon.channel = cpu_to_le16(channel);
1121 if (band == IEEE80211_BAND_5GHZ)
1122 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1123 else
1124 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1125
1126 priv->band = band;
1127
e1623446 1128 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 1129
1130 return 0;
1131}
c7de35cd 1132EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1133
8ccde88a
SO		 1134void iwl_set_flags_for_band(struct iwl_priv *priv,
1135 enum ieee80211_band band)
1136{
1137 if (band == IEEE80211_BAND_5GHZ) {
1138 priv->staging_rxon.flags &=
1139 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1140 | RXON_FLG_CCK_MSK);
1141 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1142 } else {
1143 /* Copied from iwl_post_associate() */
1144 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1145 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1146 else
1147 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1148
1149 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1150 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1151
1152 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1153 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1154 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1155 }
1156}
8ccde88a
SO		 1157
1158/*
1159 * initialize rxon structure with default values from eeprom
1160 */
1161void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1162{
1163 const struct iwl_channel_info *ch_info;
1164
1165 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1166
1167 switch (mode) {
1168 case NL80211_IFTYPE_AP:
1169 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1170 break;
1171
1172 case NL80211_IFTYPE_STATION:
1173 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1174 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1175 break;
1176
1177 case NL80211_IFTYPE_ADHOC:
1178 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1179 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1180 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1181 RXON_FILTER_ACCEPT_GRP_MSK;
1182 break;
1183
8ccde88a
SO		 1184 default:
1185 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1186 break;
1187 }
1188
1189#if 0
1190 /* TODO: Figure out when short_preamble would be set and cache from
1191 * that */
1192 if (!hw_to_local(priv->hw)->short_preamble)
1193 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1194 else
1195 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1196#endif
1197
1198 ch_info = iwl_get_channel_info(priv, priv->band,
1199 le16_to_cpu(priv->active_rxon.channel));
1200
1201 if (!ch_info)
1202 ch_info = &priv->channel_info[0];
1203
1204 /*
1205 * in some case A channels are all non IBSS
1206 * in this case force B/G channel
1207 */
1208 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1209 !(is_channel_ibss(ch_info)))
1210 ch_info = &priv->channel_info[0];
1211
1212 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1213 priv->band = ch_info->band;
1214
1215 iwl_set_flags_for_band(priv, priv->band);
1216
1217 priv->staging_rxon.ofdm_basic_rates =
1218 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1219 priv->staging_rxon.cck_basic_rates =
1220 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1221
a2b0f02e
WYG		 1222 /* clear both MIX and PURE40 mode flag */
1223 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1224 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1225 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1226 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1227 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1228 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1229 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1230}
1231EXPORT_SYMBOL(iwl_connection_init_rx_config);
1232
782571f4 1233static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1234{
1235 const struct ieee80211_supported_band *hw = NULL;
1236 struct ieee80211_rate *rate;
1237 int i;
1238
1239 hw = iwl_get_hw_mode(priv, priv->band);
1240 if (!hw) {
1241 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1242 return;
1243 }
1244
1245 priv->active_rate = 0;
1246 priv->active_rate_basic = 0;
1247
1248 for (i = 0; i < hw->n_bitrates; i++) {
1249 rate = &(hw->bitrates[i]);
5027309b 1250 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1251 priv->active_rate |= (1 << rate->hw_value);
1252 }
1253
e1623446 1254 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
8ccde88a
SO		 1255 priv->active_rate, priv->active_rate_basic);
1256
1257 /*
1258 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1259 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1260 * OFDM
1261 */
1262 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1263 priv->staging_rxon.cck_basic_rates =
1264 ((priv->active_rate_basic &
1265 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1266 else
1267 priv->staging_rxon.cck_basic_rates =
1268 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1269
1270 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1271 priv->staging_rxon.ofdm_basic_rates =
1272 ((priv->active_rate_basic &
1273 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1274 IWL_FIRST_OFDM_RATE) & 0xFF;
1275 else
1276 priv->staging_rxon.ofdm_basic_rates =
1277 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1278}
8ccde88a
SO		 1279
1280void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1281{
1282 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1283 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1284 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
e1623446 1285 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
8ccde88a
SO		 1286 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1287 rxon->channel = csa->channel;
1288 priv->staging_rxon.channel = csa->channel;
1289}
1290EXPORT_SYMBOL(iwl_rx_csa);
1291
1292#ifdef CONFIG_IWLWIFI_DEBUG
1293static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1294{
1295 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1296
e1623446 1297 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1298 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1299 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1300 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1301 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1302 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1303 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1304 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1305 rxon->ofdm_basic_rates);
e1623446
TW		 1306 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1307 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1308 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1309 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1310}
6686d17e 1311#endif
8ccde88a
SO		 1312/**
1313 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1314 */
1315void iwl_irq_handle_error(struct iwl_priv *priv)
1316{
1317 /* Set the FW error flag -- cleared on iwl_down */
1318 set_bit(STATUS_FW_ERROR, &priv->status);
1319
1320 /* Cancel currently queued command. */
1321 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1322
1323#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1324 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
b7a79404
RC		 1325 priv->cfg->ops->lib->dump_nic_error_log(priv);
1326 priv->cfg->ops->lib->dump_nic_event_log(priv);
8ccde88a
SO		 1327 iwl_print_rx_config_cmd(priv);
1328 }
1329#endif
1330
1331 wake_up_interruptible(&priv->wait_command_queue);
1332
1333 /* Keep the restart process from trying to send host
1334 * commands by clearing the INIT status bit */
1335 clear_bit(STATUS_READY, &priv->status);
1336
1337 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1338 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1339 "Restarting adapter due to uCode error.\n");
1340
8ccde88a
SO		 1341 if (priv->cfg->mod_params->restart_fw)
1342 queue_work(priv->workqueue, &priv->restart);
1343 }
1344}
1345EXPORT_SYMBOL(iwl_irq_handle_error);
1346
1347void iwl_configure_filter(struct ieee80211_hw *hw,
1348 unsigned int changed_flags,
1349 unsigned int *total_flags,
3ac64bee 1350 u64 multicast)
8ccde88a
SO		 1351{
1352 struct iwl_priv *priv = hw->priv;
1353 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1354
e1623446 1355 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1356 changed_flags, *total_flags);
1357
1358 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1359 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1360 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1361 else
1362 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1363 }
1364 if (changed_flags & FIF_ALLMULTI) {
1365 if (*total_flags & FIF_ALLMULTI)
1366 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1367 else
1368 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1369 }
1370 if (changed_flags & FIF_CONTROL) {
1371 if (*total_flags & FIF_CONTROL)
1372 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1373 else
1374 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1375 }
1376 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1377 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1378 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1379 else
1380 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1381 }
1382
1383 /* We avoid iwl_commit_rxon here to commit the new filter flags
1384 * since mac80211 will call ieee80211_hw_config immediately.
1385 * (mc_list is not supported at this time). Otherwise, we need to
1386 * queue a background iwl_commit_rxon work.
1387 */
1388
1389 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1390 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1391}
1392EXPORT_SYMBOL(iwl_configure_filter);
1393
6ba87956 1394int iwl_setup_mac(struct iwl_priv *priv)
bf85ea4f 1395{
6ba87956 1396 int ret;
bf85ea4f 1397 struct ieee80211_hw *hw = priv->hw;
e227ceac 1398 hw->rate_control_algorithm = "iwl-agn-rs";
bf85ea4f 1399
566bfe5a 1400 /* Tell mac80211 our characteristics */
605a0bd6 1401 hw->flags = IEEE80211_HW_SIGNAL_DBM |
8b30b1fe 1402 IEEE80211_HW_NOISE_DBM |
4be8c387 1403 IEEE80211_HW_AMPDU_AGGREGATION |
559a4741
JB		 1404 IEEE80211_HW_SPECTRUM_MGMT;
1405
1406 if (!priv->cfg->broken_powersave)
1407 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
1408 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
1409
f59ac048 1410 hw->wiphy->interface_modes =
f59ac048
LR		 1411 BIT(NL80211_IFTYPE_STATION) |
1412 BIT(NL80211_IFTYPE_ADHOC);
ea4a82dc 1413
2a44f911 1414 hw->wiphy->custom_regulatory = true;
1ecf9fc1 1415
37184244
LR		 1416 /* Firmware does not support this */
1417 hw->wiphy->disable_beacon_hints = true;
1418
b23da49e
JB		 1419 /*
1420 * For now, disable PS by default because it affects
1421 * RX performance significantly.
1422 */
1423 hw->wiphy->ps_default = false;
1424
1ecf9fc1
JB		 1425 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1426 /* we create the 802.11 header and a zero-length SSID element */
1427 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
ea4a82dc 1428
bf85ea4f
AK		 1429 /* Default value; 4 EDCA QOS priorities */
1430 hw->queues = 4;
6ba87956 1431
b5d7be5e 1432 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
6ba87956
TW		 1433
1434 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1435 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1436 &priv->bands[IEEE80211_BAND_2GHZ];
1437 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1438 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1439 &priv->bands[IEEE80211_BAND_5GHZ];
1440
1441 ret = ieee80211_register_hw(priv->hw);
1442 if (ret) {
15b1687c 1443 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
6ba87956
TW		 1444 return ret;
1445 }
1446 priv->mac80211_registered = 1;
1447
1448 return 0;
bf85ea4f 1449}
6ba87956 1450EXPORT_SYMBOL(iwl_setup_mac);
bf85ea4f 1451
da154e30
RR		 1452int iwl_set_hw_params(struct iwl_priv *priv)
1453{
da154e30
RR		 1454 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1455 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1456 if (priv->cfg->mod_params->amsdu_size_8K)
1457 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1458 else
1459 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1460 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1461
2c2f3b33
TW		 1462 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1463
49779293
RR		 1464 if (priv->cfg->mod_params->disable_11n)
1465 priv->cfg->sku &= ~IWL_SKU_N;
1466
da154e30
RR		 1467 /* Device-specific setup */
1468 return priv->cfg->ops->lib->set_hw_params(priv);
1469}
1470EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956
TW		 1471
1472int iwl_init_drv(struct iwl_priv *priv)
c7de35cd
RR		 1473{
1474 int ret;
c7de35cd 1475
c7de35cd
RR		 1476 priv->ibss_beacon = NULL;
1477
1478 spin_lock_init(&priv->lock);
c7de35cd
RR		 1479 spin_lock_init(&priv->sta_lock);
1480 spin_lock_init(&priv->hcmd_lock);
c7de35cd 1481
c7de35cd
RR		 1482 INIT_LIST_HEAD(&priv->free_frames);
1483
1484 mutex_init(&priv->mutex);
1485
1486 /* Clear the driver's (not device's) station table */
c587de0b 1487 iwl_clear_stations_table(priv);
c7de35cd
RR		 1488
1489 priv->data_retry_limit = -1;
1490 priv->ieee_channels = NULL;
1491 priv->ieee_rates = NULL;
1492 priv->band = IEEE80211_BAND_2GHZ;
1493
05c914fe 1494 priv->iw_mode = NL80211_IFTYPE_STATION;
c7de35cd 1495
12837be1 1496 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
c7de35cd
RR		 1497
1498 /* Choose which receivers/antennas to use */
45823531
AK		 1499 if (priv->cfg->ops->hcmd->set_rxon_chain)
1500 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1501
f53696de 1502 iwl_init_scan_params(priv);
c7de35cd
RR		 1503
1504 iwl_reset_qos(priv);
1505
1506 priv->qos_data.qos_active = 0;
1507 priv->qos_data.qos_cap.val = 0;
1508
c7de35cd 1509 priv->rates_mask = IWL_RATES_MASK;
02eec9c5
WYG		 1510 /* Set the tx_power_user_lmt to the lowest power level
1511 * this value will get overwritten by channel max power avg
1512 * from eeprom */
1513 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR		 1514
1515 ret = iwl_init_channel_map(priv);
1516 if (ret) {
15b1687c 1517 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
c7de35cd
RR		 1518 goto err;
1519 }
1520
1521 ret = iwlcore_init_geos(priv);
1522 if (ret) {
15b1687c 1523 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
c7de35cd
RR		 1524 goto err_free_channel_map;
1525 }
534166de 1526 iwlcore_init_hw_rates(priv, priv->ieee_rates);
c7de35cd 1527
c7de35cd
RR		 1528 return 0;
1529
c7de35cd
RR		 1530err_free_channel_map:
1531 iwl_free_channel_map(priv);
1532err:
1533 return ret;
1534}
6ba87956 1535EXPORT_SYMBOL(iwl_init_drv);
c7de35cd 1536
630fe9b6
TW		 1537int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1538{
1539 int ret = 0;
5eadd94b
WYG		 1540 s8 prev_tx_power = priv->tx_power_user_lmt;
1541
630fe9b6 1542 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
daf518de
WF		 1543 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1544 tx_power,
1545 IWL_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1546 return -EINVAL;
1547 }
1548
dc1b0973 1549 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1550 IWL_WARN(priv,
1551 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1552 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1553 return -EINVAL;
1554 }
1555
1556 if (priv->tx_power_user_lmt != tx_power)
1557 force = true;
1558
019fb97d 1559 /* if nic is not up don't send command */
5eadd94b
WYG		 1560 if (iwl_is_ready_rf(priv)) {
1561 priv->tx_power_user_lmt = tx_power;
1562 if (force && priv->cfg->ops->lib->send_tx_power)
1563 ret = priv->cfg->ops->lib->send_tx_power(priv);
1564 else if (!priv->cfg->ops->lib->send_tx_power)
1565 ret = -EOPNOTSUPP;
1566 /*
1567 * if fail to set tx_power, restore the orig. tx power
1568 */
1569 if (ret)
1570 priv->tx_power_user_lmt = prev_tx_power;
1571 }
630fe9b6 1572
5eadd94b
WYG		 1573 /*
1574 * Even this is an async host command, the command
1575 * will always report success from uCode
1576 * So once driver can placing the command into the queue
1577 * successfully, driver can use priv->tx_power_user_lmt
1578 * to reflect the current tx power
1579 */
630fe9b6
TW		 1580 return ret;
1581}
1582EXPORT_SYMBOL(iwl_set_tx_power);
1583
6ba87956 1584void iwl_uninit_drv(struct iwl_priv *priv)
bf85ea4f 1585{
6e21f2c1 1586 iwl_calib_free_results(priv);
6ba87956
TW		 1587 iwlcore_free_geos(priv);
1588 iwl_free_channel_map(priv);
261415f7 1589 kfree(priv->scan);
bf85ea4f 1590}
6ba87956 1591EXPORT_SYMBOL(iwl_uninit_drv);
bf85ea4f 1592
ef850d7c
MA		 1593#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1594
1595/* Free dram table */
1596void iwl_free_isr_ict(struct iwl_priv *priv)
1597{
1598 if (priv->ict_tbl_vir) {
1599 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1600 PAGE_SIZE, priv->ict_tbl_vir,
1601 priv->ict_tbl_dma);
1602 priv->ict_tbl_vir = NULL;
1603 }
1604}
1605EXPORT_SYMBOL(iwl_free_isr_ict);
1606
1607
1608/* allocate dram shared table it is a PAGE_SIZE aligned
1609 * also reset all data related to ICT table interrupt.
1610 */
1611int iwl_alloc_isr_ict(struct iwl_priv *priv)
1612{
1613
1614 if (priv->cfg->use_isr_legacy)
1615 return 0;
1616 /* allocate shrared data table */
1617 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1618 ICT_COUNT) + PAGE_SIZE,
1619 &priv->ict_tbl_dma);
1620 if (!priv->ict_tbl_vir)
1621 return -ENOMEM;
1622
1623 /* align table to PAGE_SIZE boundry */
1624 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1625
1626 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1627 (unsigned long long)priv->ict_tbl_dma,
1628 (unsigned long long)priv->aligned_ict_tbl_dma,
1629 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1630
1631 priv->ict_tbl = priv->ict_tbl_vir +
1632 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1633
1634 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1635 priv->ict_tbl, priv->ict_tbl_vir,
1636 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1637
1638 /* reset table and index to all 0 */
1639 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1640 priv->ict_index = 0;
1641
40cefda9
MA		 1642 /* add periodic RX interrupt */
1643 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
ef850d7c
MA		 1644 return 0;
1645}
1646EXPORT_SYMBOL(iwl_alloc_isr_ict);
1647
1648/* Device is going up inform it about using ICT interrupt table,
1649 * also we need to tell the driver to start using ICT interrupt.
1650 */
1651int iwl_reset_ict(struct iwl_priv *priv)
1652{
1653 u32 val;
1654 unsigned long flags;
1655
1656 if (!priv->ict_tbl_vir)
1657 return 0;
1658
1659 spin_lock_irqsave(&priv->lock, flags);
1660 iwl_disable_interrupts(priv);
1661
1303dcfd 1662 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
ef850d7c
MA		 1663
1664 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1665
1666 val |= CSR_DRAM_INT_TBL_ENABLE;
1667 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1668
1669 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1670 "aligned dma address %Lx\n",
1671 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1672
1673 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1674 priv->use_ict = true;
1675 priv->ict_index = 0;
40cefda9 1676 iwl_write32(priv, CSR_INT, priv->inta_mask);
ef850d7c
MA		 1677 iwl_enable_interrupts(priv);
1678 spin_unlock_irqrestore(&priv->lock, flags);
1679
1680 return 0;
1681}
1682EXPORT_SYMBOL(iwl_reset_ict);
1683
1684/* Device is going down disable ict interrupt usage */
1685void iwl_disable_ict(struct iwl_priv *priv)
1686{
1687 unsigned long flags;
1688
1689 spin_lock_irqsave(&priv->lock, flags);
1690 priv->use_ict = false;
1691 spin_unlock_irqrestore(&priv->lock, flags);
1692}
1693EXPORT_SYMBOL(iwl_disable_ict);
1694
1695/* interrupt handler using ict table, with this interrupt driver will
1696 * stop using INTA register to get device's interrupt, reading this register
1697 * is expensive, device will write interrupts in ICT dram table, increment
1698 * index then will fire interrupt to driver, driver will OR all ICT table
1699 * entries from current index up to table entry with 0 value. the result is
1700 * the interrupt we need to service, driver will set the entries back to 0 and
1701 * set index.
1702 */
1703irqreturn_t iwl_isr_ict(int irq, void *data)
1704{
1705 struct iwl_priv *priv = data;
1706 u32 inta, inta_mask;
1707 u32 val = 0;
1708
1709 if (!priv)
1710 return IRQ_NONE;
1711
1712 /* dram interrupt table not set yet,
1713 * use legacy interrupt.
1714 */
1715 if (!priv->use_ict)
1716 return iwl_isr(irq, data);
1717
1718 spin_lock(&priv->lock);
1719
1720 /* Disable (but don't clear!) interrupts here to avoid
1721 * back-to-back ISRs and sporadic interrupts from our NIC.
1722 * If we have something to service, the tasklet will re-enable ints.
1723 * If we *don't* have something, we'll re-enable before leaving here.
1724 */
1725 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1726 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1727
1728
1729 /* Ignore interrupt if there's nothing in NIC to service.
1730 * This may be due to IRQ shared with another device,
1731 * or due to sporadic interrupts thrown from our NIC. */
1732 if (!priv->ict_tbl[priv->ict_index]) {
1733 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1734 goto none;
1735 }
1736
1737 /* read all entries that not 0 start with ict_index */
1738 while (priv->ict_tbl[priv->ict_index]) {
1739
1303dcfd 1740 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
ef850d7c 1741 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1303dcfd
JB		 1742 priv->ict_index,
1743 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
ef850d7c
MA		 1744 priv->ict_tbl[priv->ict_index] = 0;
1745 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1303dcfd 1746 ICT_COUNT);
ef850d7c
MA		 1747
1748 }
1749
1750 /* We should not get this value, just ignore it. */
1751 if (val == 0xffffffff)
1752 val = 0;
1753
1754 inta = (0xff & val) | ((0xff00 & val) << 16);
1755 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1756 inta, inta_mask, val);
1757
40cefda9 1758 inta &= priv->inta_mask;
ef850d7c
MA		 1759 priv->inta |= inta;
1760
1761 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1762 if (likely(inta))
1763 tasklet_schedule(&priv->irq_tasklet);
1764 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1765 /* Allow interrupt if was disabled by this handler and
1766 * no tasklet was schedules, We should not enable interrupt,
1767 * tasklet will enable it.
1768 */
1769 iwl_enable_interrupts(priv);
1770 }
1771
1772 spin_unlock(&priv->lock);
1773 return IRQ_HANDLED;
1774
1775 none:
1776 /* re-enable interrupts here since we don't have anything to service.
1777 * only Re-enable if disabled by irq.
1778 */
1779 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1780 iwl_enable_interrupts(priv);
1781
1782 spin_unlock(&priv->lock);
1783 return IRQ_NONE;
1784}
1785EXPORT_SYMBOL(iwl_isr_ict);
1786
1787
1788static irqreturn_t iwl_isr(int irq, void *data)
1789{
1790 struct iwl_priv *priv = data;
1791 u32 inta, inta_mask;
d651ae32 1792#ifdef CONFIG_IWLWIFI_DEBUG
ef850d7c 1793 u32 inta_fh;
d651ae32 1794#endif
ef850d7c
MA		 1795 if (!priv)
1796 return IRQ_NONE;
1797
1798 spin_lock(&priv->lock);
1799
1800 /* Disable (but don't clear!) interrupts here to avoid
1801 * back-to-back ISRs and sporadic interrupts from our NIC.
1802 * If we have something to service, the tasklet will re-enable ints.
1803 * If we *don't* have something, we'll re-enable before leaving here. */
1804 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1805 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1806
1807 /* Discover which interrupts are active/pending */
1808 inta = iwl_read32(priv, CSR_INT);
1809
1810 /* Ignore interrupt if there's nothing in NIC to service.
1811 * This may be due to IRQ shared with another device,
1812 * or due to sporadic interrupts thrown from our NIC. */
1813 if (!inta) {
1814 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1815 goto none;
1816 }
1817
1818 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1819 /* Hardware disappeared. It might have already raised
1820 * an interrupt */
1821 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1822 goto unplugged;
1823 }
1824
1825#ifdef CONFIG_IWLWIFI_DEBUG
3d816c77 1826 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
ef850d7c
MA		 1827 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1828 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1829 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1830 }
1831#endif
1832
1833 priv->inta |= inta;
1834 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1835 if (likely(inta))
1836 tasklet_schedule(&priv->irq_tasklet);
1837 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1838 iwl_enable_interrupts(priv);
1839
1840 unplugged:
1841 spin_unlock(&priv->lock);
1842 return IRQ_HANDLED;
1843
1844 none:
1845 /* re-enable interrupts here since we don't have anything to service. */
1846 /* only Re-enable if diabled by irq and no schedules tasklet. */
1847 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1848 iwl_enable_interrupts(priv);
1849
1850 spin_unlock(&priv->lock);
1851 return IRQ_NONE;
1852}
1853
1854irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1855{
1856 struct iwl_priv *priv = data;
1857 u32 inta, inta_mask;
1858 u32 inta_fh;
1859 if (!priv)
1860 return IRQ_NONE;
1861
1862 spin_lock(&priv->lock);
1863
1864 /* Disable (but don't clear!) interrupts here to avoid
1865 * back-to-back ISRs and sporadic interrupts from our NIC.
1866 * If we have something to service, the tasklet will re-enable ints.
1867 * If we *don't* have something, we'll re-enable before leaving here. */
1868 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1869 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1870
1871 /* Discover which interrupts are active/pending */
1872 inta = iwl_read32(priv, CSR_INT);
1873 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1874
1875 /* Ignore interrupt if there's nothing in NIC to service.
1876 * This may be due to IRQ shared with another device,
1877 * or due to sporadic interrupts thrown from our NIC. */
1878 if (!inta && !inta_fh) {
1879 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1880 goto none;
1881 }
1882
1883 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1884 /* Hardware disappeared. It might have already raised
1885 * an interrupt */
1886 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1887 goto unplugged;
1888 }
1889
1890 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1891 inta, inta_mask, inta_fh);
1892
1893 inta &= ~CSR_INT_BIT_SCD;
1894
1895 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1896 if (likely(inta || inta_fh))
1897 tasklet_schedule(&priv->irq_tasklet);
1898
1899 unplugged:
1900 spin_unlock(&priv->lock);
1901 return IRQ_HANDLED;
1902
1903 none:
1904 /* re-enable interrupts here since we don't have anything to service. */
1905 /* only Re-enable if diabled by irq */
1906 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1907 iwl_enable_interrupts(priv);
1908 spin_unlock(&priv->lock);
1909 return IRQ_NONE;
1910}
ef850d7c 1911EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1912
17f841cd
SO		 1913int iwl_send_bt_config(struct iwl_priv *priv)
1914{
1915 struct iwl_bt_cmd bt_cmd = {
1916 .flags = 3,
1917 .lead_time = 0xAA,
1918 .max_kill = 1,
1919 .kill_ack_mask = 0,
1920 .kill_cts_mask = 0,
1921 };
1922
1923 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1924 sizeof(struct iwl_bt_cmd), &bt_cmd);
1925}
1926EXPORT_SYMBOL(iwl_send_bt_config);
1927
49ea8596
EG		 1928int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1929{
1930 u32 stat_flags = 0;
1931 struct iwl_host_cmd cmd = {
1932 .id = REPLY_STATISTICS_CMD,
c2acea8e 1933 .flags = flags,
49ea8596
EG		 1934 .len = sizeof(stat_flags),
1935 .data = (u8 *) &stat_flags,
1936 };
1937 return iwl_send_cmd(priv, &cmd);
1938}
1939EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1940
b0692f2f
EG		 1941/**
1942 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1943 * using sample data 100 bytes apart. If these sample points are good,
1944 * it's a pretty good bet that everything between them is good, too.
1945 */
1946static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1947{
1948 u32 val;
1949 int ret = 0;
1950 u32 errcnt = 0;
1951 u32 i;
1952
e1623446 1953 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1954
b0692f2f
EG		 1955 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1956 /* read data comes through single port, auto-incr addr */
1957 /* NOTE: Use the debugless read so we don't flood kernel log
1958 * if IWL_DL_IO is set */
1959 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1960 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1961 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1962 if (val != le32_to_cpu(*image)) {
1963 ret = -EIO;
1964 errcnt++;
1965 if (errcnt >= 3)
1966 break;
1967 }
1968 }
1969
b0692f2f
EG		 1970 return ret;
1971}
1972
1973/**
1974 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1975 * looking at all data.
1976 */
1977static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1978 u32 len)
1979{
1980 u32 val;
1981 u32 save_len = len;
1982 int ret = 0;
1983 u32 errcnt;
1984
e1623446 1985 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1986
250bdd21
SO		 1987 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1988 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1989
1990 errcnt = 0;
1991 for (; len > 0; len -= sizeof(u32), image++) {
1992 /* read data comes through single port, auto-incr addr */
1993 /* NOTE: Use the debugless read so we don't flood kernel log
1994 * if IWL_DL_IO is set */
1995 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1996 if (val != le32_to_cpu(*image)) {
15b1687c 1997 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1998 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1999 save_len - len, val, le32_to_cpu(*image));
2000 ret = -EIO;
2001 errcnt++;
2002 if (errcnt >= 20)
2003 break;
2004 }
2005 }
2006
b0692f2f 2007 if (!errcnt)
e1623446
TW		 2008 IWL_DEBUG_INFO(priv,
2009 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 2010
2011 return ret;
2012}
2013
2014/**
2015 * iwl_verify_ucode - determine which instruction image is in SRAM,
2016 * and verify its contents
2017 */
2018int iwl_verify_ucode(struct iwl_priv *priv)
2019{
2020 __le32 *image;
2021 u32 len;
2022 int ret;
2023
2024 /* Try bootstrap */
2025 image = (__le32 *)priv->ucode_boot.v_addr;
2026 len = priv->ucode_boot.len;
2027 ret = iwlcore_verify_inst_sparse(priv, image, len);
2028 if (!ret) {
e1623446 2029 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 2030 return 0;
2031 }
2032
2033 /* Try initialize */
2034 image = (__le32 *)priv->ucode_init.v_addr;
2035 len = priv->ucode_init.len;
2036 ret = iwlcore_verify_inst_sparse(priv, image, len);
2037 if (!ret) {
e1623446 2038 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 2039 return 0;
2040 }
2041
2042 /* Try runtime/protocol */
2043 image = (__le32 *)priv->ucode_code.v_addr;
2044 len = priv->ucode_code.len;
2045 ret = iwlcore_verify_inst_sparse(priv, image, len);
2046 if (!ret) {
e1623446 2047 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 2048 return 0;
2049 }
2050
15b1687c 2051 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 2052
2053 /* Since nothing seems to match, show first several data entries in
2054 * instruction SRAM, so maybe visual inspection will give a clue.
2055 * Selection of bootstrap image (vs. other images) is arbitrary. */
2056 image = (__le32 *)priv->ucode_boot.v_addr;
2057 len = priv->ucode_boot.len;
2058 ret = iwl_verify_inst_full(priv, image, len);
2059
2060 return ret;
2061}
2062EXPORT_SYMBOL(iwl_verify_ucode);
2063
56e12615 2064
47f4a587
EG		 2065void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2066{
2067 struct iwl_ct_kill_config cmd;
672639de 2068 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 2069 unsigned long flags;
2070 int ret = 0;
2071
2072 spin_lock_irqsave(&priv->lock, flags);
2073 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2074 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2075 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 2076 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 2077
672639de
WYG		 2078 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
2079 case CSR_HW_REV_TYPE_1000:
2080 case CSR_HW_REV_TYPE_6x00:
2081 case CSR_HW_REV_TYPE_6x50:
2082 adv_cmd.critical_temperature_enter =
2083 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2084 adv_cmd.critical_temperature_exit =
2085 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2086
2087 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2088 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 2089 if (ret)
2090 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2091 else
2092 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2093 "succeeded, "
2094 "critical temperature enter is %d,"
2095 "exit is %d\n",
2096 priv->hw_params.ct_kill_threshold,
2097 priv->hw_params.ct_kill_exit_threshold);
672639de
WYG		 2098 break;
2099 default:
2100 cmd.critical_temperature_R =
2101 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 2102
672639de
WYG		 2103 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2104 sizeof(cmd), &cmd);
d91b1ba3
WYG		 2105 if (ret)
2106 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2107 else
2108 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2109 "succeeded, "
2110 "critical temperature is %d\n",
2111 priv->hw_params.ct_kill_threshold);
672639de
WYG		 2112 break;
2113 }
47f4a587
EG		 2114}
2115EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 2116
0ad91a35 2117
14a08a7f
EG		 2118/*
2119 * CARD_STATE_CMD
2120 *
2121 * Use: Sets the device's internal card state to enable, disable, or halt
2122 *
2123 * When in the 'enable' state the card operates as normal.
2124 * When in the 'disable' state, the card enters into a low power mode.
2125 * When in the 'halt' state, the card is shut down and must be fully
2126 * restarted to come back on.
2127 */
c496294e 2128int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 2129{
2130 struct iwl_host_cmd cmd = {
2131 .id = REPLY_CARD_STATE_CMD,
2132 .len = sizeof(u32),
2133 .data = &flags,
c2acea8e 2134 .flags = meta_flag,
14a08a7f
EG		 2135 };
2136
2137 return iwl_send_cmd(priv, &cmd);
2138}
2139
030f05ed
AK		 2140void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2141 struct iwl_rx_mem_buffer *rxb)
2142{
2143#ifdef CONFIG_IWLWIFI_DEBUG
2144 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2145 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2146 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2147 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2148#endif
2149}
2150EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2151
2152void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2153 struct iwl_rx_mem_buffer *rxb)
2154{
2155 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
396887a2 2156 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 2157 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 2158 "notification for %s:\n", len,
2159 get_cmd_string(pkt->hdr.cmd));
2160 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 2161}
2162EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 2163
2164void iwl_rx_reply_error(struct iwl_priv *priv,
2165 struct iwl_rx_mem_buffer *rxb)
2166{
2167 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2168
2169 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2170 "seq 0x%04X ser 0x%08X\n",
2171 le32_to_cpu(pkt->u.err_resp.error_type),
2172 get_cmd_string(pkt->u.err_resp.cmd_id),
2173 pkt->u.err_resp.cmd_id,
2174 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2175 le32_to_cpu(pkt->u.err_resp.error_info));
2176}
2177EXPORT_SYMBOL(iwl_rx_reply_error);
2178
a83b9141
WYG		 2179void iwl_clear_isr_stats(struct iwl_priv *priv)
2180{
2181 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2182}
a83b9141 2183
488829f1
AK		 2184int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2185 const struct ieee80211_tx_queue_params *params)
2186{
2187 struct iwl_priv *priv = hw->priv;
2188 unsigned long flags;
2189 int q;
2190
2191 IWL_DEBUG_MAC80211(priv, "enter\n");
2192
2193 if (!iwl_is_ready_rf(priv)) {
2194 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2195 return -EIO;
2196 }
2197
2198 if (queue >= AC_NUM) {
2199 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2200 return 0;
2201 }
2202
2203 q = AC_NUM - 1 - queue;
2204
2205 spin_lock_irqsave(&priv->lock, flags);
2206
2207 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2208 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2209 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2210 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2211 cpu_to_le16((params->txop * 32));
2212
2213 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2214 priv->qos_data.qos_active = 1;
2215
2216 if (priv->iw_mode == NL80211_IFTYPE_AP)
2217 iwl_activate_qos(priv, 1);
2218 else if (priv->assoc_id && iwl_is_associated(priv))
2219 iwl_activate_qos(priv, 0);
2220
2221 spin_unlock_irqrestore(&priv->lock, flags);
2222
2223 IWL_DEBUG_MAC80211(priv, "leave\n");
2224 return 0;
2225}
2226EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 2227
2228static void iwl_ht_conf(struct iwl_priv *priv,
2229 struct ieee80211_bss_conf *bss_conf)
2230{
2231 struct ieee80211_sta_ht_cap *ht_conf;
2232 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2233 struct ieee80211_sta *sta;
2234
2235 IWL_DEBUG_MAC80211(priv, "enter: \n");
2236
2237 if (!iwl_conf->is_ht)
2238 return;
2239
2240
2241 /*
2242 * It is totally wrong to base global information on something
2243 * that is valid only when associated, alas, this driver works
2244 * that way and I don't know how to fix it.
2245 */
2246
2247 rcu_read_lock();
2248 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2249 if (!sta) {
2250 rcu_read_unlock();
2251 return;
2252 }
2253 ht_conf = &sta->ht_cap;
2254
5bbe233b
AK		 2255 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2256
2257 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2258
5bbe233b 2259 iwl_conf->ht_protection =
9ed6bcce 2260 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5bbe233b 2261 iwl_conf->non_GF_STA_present =
9ed6bcce 2262 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b
AK		 2263
2264 rcu_read_unlock();
2265
2266 IWL_DEBUG_MAC80211(priv, "leave\n");
2267}
2268
2269#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2270void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 2271 struct ieee80211_vif *vif,
2272 struct ieee80211_bss_conf *bss_conf,
2273 u32 changes)
5bbe233b
AK		 2274{
2275 struct iwl_priv *priv = hw->priv;
3a650292 2276 int ret;
5bbe233b
AK		 2277
2278 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2279
2d0ddec5
JB		 2280 if (!iwl_is_alive(priv))
2281 return;
2282
2283 mutex_lock(&priv->mutex);
2284
2285 if (changes & BSS_CHANGED_BEACON &&
2286 priv->iw_mode == NL80211_IFTYPE_AP) {
2287 dev_kfree_skb(priv->ibss_beacon);
2288 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2289 }
2290
d7129e19
JB		 2291 if (changes & BSS_CHANGED_BEACON_INT) {
2292 priv->beacon_int = bss_conf->beacon_int;
2293 /* TODO: in AP mode, do something to make this take effect */
2294 }
2295
2296 if (changes & BSS_CHANGED_BSSID) {
2297 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2298
2299 /*
2300 * If there is currently a HW scan going on in the
2301 * background then we need to cancel it else the RXON
2302 * below/in post_associate will fail.
2303 */
2d0ddec5 2304 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 2305 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 2306 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2307 mutex_unlock(&priv->mutex);
2308 return;
2309 }
2d0ddec5 2310
d7129e19
JB		 2311 /* mac80211 only sets assoc when in STATION mode */
2312 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2313 bss_conf->assoc) {
2314 memcpy(priv->staging_rxon.bssid_addr,
2315 bss_conf->bssid, ETH_ALEN);
2d0ddec5 2316
d7129e19
JB		 2317 /* currently needed in a few places */
2318 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2319 } else {
2320 priv->staging_rxon.filter_flags &=
2321 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 2322 }
d7129e19 2323
2d0ddec5
JB		 2324 }
2325
d7129e19
JB		 2326 /*
2327 * This needs to be after setting the BSSID in case
2328 * mac80211 decides to do both changes at once because
2329 * it will invoke post_associate.
2330 */
2d0ddec5
JB		 2331 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2332 changes & BSS_CHANGED_BEACON) {
2333 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2334
2335 if (beacon)
2336 iwl_mac_beacon_update(hw, beacon);
2337 }
2338
5bbe233b
AK		 2339 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2340 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2341 bss_conf->use_short_preamble);
2342 if (bss_conf->use_short_preamble)
2343 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2344 else
2345 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2346 }
2347
2348 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2349 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2350 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2351 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2352 else
2353 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2354 }
2355
d7129e19
JB		 2356 if (changes & BSS_CHANGED_BASIC_RATES) {
2357 /* XXX use this information
2358 *
2359 * To do that, remove code from iwl_set_rate() and put something
2360 * like this here:
2361 *
2362 if (A-band)
2363 priv->staging_rxon.ofdm_basic_rates =
2364 bss_conf->basic_rates;
2365 else
2366 priv->staging_rxon.ofdm_basic_rates =
2367 bss_conf->basic_rates >> 4;
2368 priv->staging_rxon.cck_basic_rates =
2369 bss_conf->basic_rates & 0xF;
2370 */
2371 }
2372
5bbe233b
AK		 2373 if (changes & BSS_CHANGED_HT) {
2374 iwl_ht_conf(priv, bss_conf);
45823531
AK		 2375
2376 if (priv->cfg->ops->hcmd->set_rxon_chain)
2377 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 2378 }
2379
2380 if (changes & BSS_CHANGED_ASSOC) {
2381 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 2382 if (bss_conf->assoc) {
2383 priv->assoc_id = bss_conf->aid;
2384 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 2385 priv->timestamp = bss_conf->timestamp;
2386 priv->assoc_capability = bss_conf->assoc_capability;
2387
d7129e19
JB		 2388 /*
2389 * We have just associated, don't start scan too early
2390 * leave time for EAPOL exchange to complete.
2391 *
2392 * XXX: do this in mac80211
5bbe233b
AK		 2393 */
2394 priv->next_scan_jiffies = jiffies +
2395 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
d7129e19
JB		 2396 if (!iwl_is_rfkill(priv))
2397 priv->cfg->ops->lib->post_associate(priv);
2398 } else
5bbe233b 2399 priv->assoc_id = 0;
d7129e19
JB		 2400
2401 }
2402
2403 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2404 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2405 changes);
2406 ret = iwl_send_rxon_assoc(priv);
2407 if (!ret) {
2408 /* Sync active_rxon with latest change. */
2409 memcpy((void *)&priv->active_rxon,
2410 &priv->staging_rxon,
2411 sizeof(struct iwl_rxon_cmd));
5bbe233b 2412 }
5bbe233b 2413 }
d7129e19
JB		 2414
2415 mutex_unlock(&priv->mutex);
2416
2d0ddec5 2417 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2418}
2419EXPORT_SYMBOL(iwl_bss_info_changed);
2420
9944b938
AK		 2421int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2422{
2423 struct iwl_priv *priv = hw->priv;
2424 unsigned long flags;
2425 __le64 timestamp;
2426
2427 IWL_DEBUG_MAC80211(priv, "enter\n");
2428
2429 if (!iwl_is_ready_rf(priv)) {
2430 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2431 return -EIO;
2432 }
2433
2434 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2435 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2436 return -EIO;
2437 }
2438
2439 spin_lock_irqsave(&priv->lock, flags);
2440
2441 if (priv->ibss_beacon)
2442 dev_kfree_skb(priv->ibss_beacon);
2443
2444 priv->ibss_beacon = skb;
2445
2446 priv->assoc_id = 0;
2447 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2448 priv->timestamp = le64_to_cpu(timestamp);
2449
2450 IWL_DEBUG_MAC80211(priv, "leave\n");
2451 spin_unlock_irqrestore(&priv->lock, flags);
2452
2453 iwl_reset_qos(priv);
2454
2455 priv->cfg->ops->lib->post_associate(priv);
2456
2457
2458 return 0;
2459}
2460EXPORT_SYMBOL(iwl_mac_beacon_update);
2461
727882d6
AK		 2462int iwl_set_mode(struct iwl_priv *priv, int mode)
2463{
2464 if (mode == NL80211_IFTYPE_ADHOC) {
2465 const struct iwl_channel_info *ch_info;
2466
2467 ch_info = iwl_get_channel_info(priv,
2468 priv->band,
2469 le16_to_cpu(priv->staging_rxon.channel));
2470
2471 if (!ch_info || !is_channel_ibss(ch_info)) {
2472 IWL_ERR(priv, "channel %d not IBSS channel\n",
2473 le16_to_cpu(priv->staging_rxon.channel));
2474 return -EINVAL;
2475 }
2476 }
2477
2478 iwl_connection_init_rx_config(priv, mode);
2479
2480 if (priv->cfg->ops->hcmd->set_rxon_chain)
2481 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2482
2483 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2484
c587de0b 2485 iwl_clear_stations_table(priv);
727882d6
AK		 2486
2487 /* dont commit rxon if rf-kill is on*/
2488 if (!iwl_is_ready_rf(priv))
2489 return -EAGAIN;
2490
727882d6
AK		 2491 iwlcore_commit_rxon(priv);
2492
2493 return 0;
2494}
2495EXPORT_SYMBOL(iwl_set_mode);
2496
cbb6ab94
AK		 2497int iwl_mac_add_interface(struct ieee80211_hw *hw,
2498 struct ieee80211_if_init_conf *conf)
2499{
2500 struct iwl_priv *priv = hw->priv;
2501 unsigned long flags;
2502
2503 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2504
2505 if (priv->vif) {
2506 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2507 return -EOPNOTSUPP;
2508 }
2509
2510 spin_lock_irqsave(&priv->lock, flags);
2511 priv->vif = conf->vif;
2512 priv->iw_mode = conf->type;
2513
2514 spin_unlock_irqrestore(&priv->lock, flags);
2515
2516 mutex_lock(&priv->mutex);
2517
2518 if (conf->mac_addr) {
2519 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2520 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2521 }
2522
2523 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2524 /* we are not ready, will run again when ready */
2525 set_bit(STATUS_MODE_PENDING, &priv->status);
2526
2527 mutex_unlock(&priv->mutex);
2528
2529 IWL_DEBUG_MAC80211(priv, "leave\n");
2530 return 0;
2531}
2532EXPORT_SYMBOL(iwl_mac_add_interface);
2533
d8052319
AK		 2534void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2535 struct ieee80211_if_init_conf *conf)
2536{
2537 struct iwl_priv *priv = hw->priv;
2538
2539 IWL_DEBUG_MAC80211(priv, "enter\n");
2540
2541 mutex_lock(&priv->mutex);
2542
2543 if (iwl_is_ready_rf(priv)) {
2544 iwl_scan_cancel_timeout(priv, 100);
2545 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2546 iwlcore_commit_rxon(priv);
2547 }
2548 if (priv->vif == conf->vif) {
2549 priv->vif = NULL;
2550 memset(priv->bssid, 0, ETH_ALEN);
2551 }
2552 mutex_unlock(&priv->mutex);
2553
2554 IWL_DEBUG_MAC80211(priv, "leave\n");
2555
2556}
2557EXPORT_SYMBOL(iwl_mac_remove_interface);
2558
4808368d
AK		 2559/**
2560 * iwl_mac_config - mac80211 config callback
2561 *
2562 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2563 * be set inappropriately and the driver currently sets the hardware up to
2564 * use it whenever needed.
2565 */
2566int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2567{
2568 struct iwl_priv *priv = hw->priv;
2569 const struct iwl_channel_info *ch_info;
2570 struct ieee80211_conf *conf = &hw->conf;
28bd723b 2571 struct iwl_ht_info *ht_conf = &priv->current_ht_config;
4808368d
AK		 2572 unsigned long flags = 0;
2573 int ret = 0;
2574 u16 ch;
2575 int scan_active = 0;
2576
2577 mutex_lock(&priv->mutex);
2578
4808368d
AK		 2579 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2580 conf->channel->hw_value, changed);
2581
2582 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2583 test_bit(STATUS_SCANNING, &priv->status))) {
2584 scan_active = 1;
2585 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2586 }
2587
2588
2589 /* during scanning mac80211 will delay channel setting until
2590 * scan finish with changed = 0
2591 */
2592 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2593 if (scan_active)
2594 goto set_ch_out;
2595
2596 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2597 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2598 if (!is_channel_valid(ch_info)) {
2599 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2600 ret = -EINVAL;
2601 goto set_ch_out;
2602 }
2603
2604 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2605 !is_channel_ibss(ch_info)) {
2606 IWL_ERR(priv, "channel %d in band %d not "
2607 "IBSS channel\n",
2608 conf->channel->hw_value, conf->channel->band);
2609 ret = -EINVAL;
2610 goto set_ch_out;
2611 }
2612
4808368d
AK		 2613 spin_lock_irqsave(&priv->lock, flags);
2614
28bd723b
DH		 2615 /* Configure HT40 channels */
2616 ht_conf->is_ht = conf_is_ht(conf);
2617 if (ht_conf->is_ht) {
2618 if (conf_is_ht40_minus(conf)) {
2619 ht_conf->extension_chan_offset =
2620 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2621 ht_conf->is_40mhz = true;
28bd723b
DH		 2622 } else if (conf_is_ht40_plus(conf)) {
2623 ht_conf->extension_chan_offset =
2624 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2625 ht_conf->is_40mhz = true;
28bd723b
DH		 2626 } else {
2627 ht_conf->extension_chan_offset =
2628 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2629 ht_conf->is_40mhz = false;
28bd723b
DH		 2630 }
2631 } else
c812ee24 2632 ht_conf->is_40mhz = false;
28bd723b
DH		 2633 /* Default to no protection. Protection mode will later be set
2634 * from BSS config in iwl_ht_conf */
2635 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2636
2637 /* if we are switching from ht to 2.4 clear flags
2638 * from any ht related info since 2.4 does not
2639 * support ht */
2640 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2641 priv->staging_rxon.flags = 0;
2642
2643 iwl_set_rxon_channel(priv, conf->channel);
2644
2645 iwl_set_flags_for_band(priv, conf->channel->band);
2646 spin_unlock_irqrestore(&priv->lock, flags);
2647 set_ch_out:
2648 /* The list of supported rates and rate mask can be different
2649 * for each band; since the band may have changed, reset
2650 * the rate mask to what mac80211 lists */
2651 iwl_set_rate(priv);
2652 }
2653
e312c24c
JB		 2654 if (changed & IEEE80211_CONF_CHANGE_PS) {
2655 ret = iwl_power_update_mode(priv, false);
4808368d 2656 if (ret)
e312c24c 2657 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2658 }
2659
2660 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2661 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2662 priv->tx_power_user_lmt, conf->power_level);
2663
2664 iwl_set_tx_power(priv, conf->power_level, false);
2665 }
2666
2667 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2668 if (priv->cfg->ops->hcmd->set_rxon_chain)
2669 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2670
0cf4c01e
MA		 2671 if (!iwl_is_ready(priv)) {
2672 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2673 goto out;
2674 }
2675
4808368d
AK		 2676 if (scan_active)
2677 goto out;
2678
2679 if (memcmp(&priv->active_rxon,
2680 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2681 iwlcore_commit_rxon(priv);
2682 else
2683 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2684
2685
2686out:
2687 IWL_DEBUG_MAC80211(priv, "leave\n");
2688 mutex_unlock(&priv->mutex);
2689 return ret;
2690}
2691EXPORT_SYMBOL(iwl_mac_config);
2692
aa89f31e
AK		 2693int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2694 struct ieee80211_tx_queue_stats *stats)
2695{
2696 struct iwl_priv *priv = hw->priv;
2697 int i, avail;
2698 struct iwl_tx_queue *txq;
2699 struct iwl_queue *q;
2700 unsigned long flags;
2701
2702 IWL_DEBUG_MAC80211(priv, "enter\n");
2703
2704 if (!iwl_is_ready_rf(priv)) {
2705 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2706 return -EIO;
2707 }
2708
2709 spin_lock_irqsave(&priv->lock, flags);
2710
2711 for (i = 0; i < AC_NUM; i++) {
2712 txq = &priv->txq[i];
2713 q = &txq->q;
2714 avail = iwl_queue_space(q);
2715
2716 stats[i].len = q->n_window - avail;
2717 stats[i].limit = q->n_window - q->high_mark;
2718 stats[i].count = q->n_window;
2719
2720 }
2721 spin_unlock_irqrestore(&priv->lock, flags);
2722
2723 IWL_DEBUG_MAC80211(priv, "leave\n");
2724
2725 return 0;
2726}
2727EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2728
bd564261
AK		 2729void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2730{
2731 struct iwl_priv *priv = hw->priv;
2732 unsigned long flags;
2733
2734 mutex_lock(&priv->mutex);
2735 IWL_DEBUG_MAC80211(priv, "enter\n");
2736
2737 spin_lock_irqsave(&priv->lock, flags);
2738 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2739 spin_unlock_irqrestore(&priv->lock, flags);
2740
2741 iwl_reset_qos(priv);
2742
2743 spin_lock_irqsave(&priv->lock, flags);
2744 priv->assoc_id = 0;
2745 priv->assoc_capability = 0;
2746 priv->assoc_station_added = 0;
2747
2748 /* new association get rid of ibss beacon skb */
2749 if (priv->ibss_beacon)
2750 dev_kfree_skb(priv->ibss_beacon);
2751
2752 priv->ibss_beacon = NULL;
2753
57c4d7b4 2754 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261
AK		 2755 priv->timestamp = 0;
2756 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2757 priv->beacon_int = 0;
2758
2759 spin_unlock_irqrestore(&priv->lock, flags);
2760
2761 if (!iwl_is_ready_rf(priv)) {
2762 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2763 mutex_unlock(&priv->mutex);
2764 return;
2765 }
2766
2767 /* we are restarting association process
2768 * clear RXON_FILTER_ASSOC_MSK bit
2769 */
2770 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2771 iwl_scan_cancel_timeout(priv, 100);
2772 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2773 iwlcore_commit_rxon(priv);
2774 }
2775
bd564261 2776 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
bd564261
AK		 2777 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2778 mutex_unlock(&priv->mutex);
2779 return;
2780 }
2781
2782 iwl_set_rate(priv);
2783
2784 mutex_unlock(&priv->mutex);
2785
2786 IWL_DEBUG_MAC80211(priv, "leave\n");
2787}
2788EXPORT_SYMBOL(iwl_mac_reset_tsf);
2789
20594eb0
WYG		 2790#ifdef CONFIG_IWLWIFI_DEBUGFS
2791
2792#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2793
2794void iwl_reset_traffic_log(struct iwl_priv *priv)
2795{
2796 priv->tx_traffic_idx = 0;
2797 priv->rx_traffic_idx = 0;
2798 if (priv->tx_traffic)
2799 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2800 if (priv->rx_traffic)
2801 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2802}
2803
2804int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2805{
2806 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2807
2808 if (iwl_debug_level & IWL_DL_TX) {
2809 if (!priv->tx_traffic) {
2810 priv->tx_traffic =
2811 kzalloc(traffic_size, GFP_KERNEL);
2812 if (!priv->tx_traffic)
2813 return -ENOMEM;
2814 }
2815 }
2816 if (iwl_debug_level & IWL_DL_RX) {
2817 if (!priv->rx_traffic) {
2818 priv->rx_traffic =
2819 kzalloc(traffic_size, GFP_KERNEL);
2820 if (!priv->rx_traffic)
2821 return -ENOMEM;
2822 }
2823 }
2824 iwl_reset_traffic_log(priv);
2825 return 0;
2826}
2827EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2828
2829void iwl_free_traffic_mem(struct iwl_priv *priv)
2830{
2831 kfree(priv->tx_traffic);
2832 priv->tx_traffic = NULL;
2833
2834 kfree(priv->rx_traffic);
2835 priv->rx_traffic = NULL;
2836}
2837EXPORT_SYMBOL(iwl_free_traffic_mem);
2838
2839void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2840 u16 length, struct ieee80211_hdr *header)
2841{
2842 __le16 fc;
2843 u16 len;
2844
2845 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2846 return;
2847
2848 if (!priv->tx_traffic)
2849 return;
2850
2851 fc = header->frame_control;
2852 if (ieee80211_is_data(fc)) {
2853 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2854 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2855 memcpy((priv->tx_traffic +
2856 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2857 header, len);
2858 priv->tx_traffic_idx =
2859 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2860 }
2861}
2862EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2863
2864void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2865 u16 length, struct ieee80211_hdr *header)
2866{
2867 __le16 fc;
2868 u16 len;
2869
2870 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2871 return;
2872
2873 if (!priv->rx_traffic)
2874 return;
2875
2876 fc = header->frame_control;
2877 if (ieee80211_is_data(fc)) {
2878 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2879 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2880 memcpy((priv->rx_traffic +
2881 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2882 header, len);
2883 priv->rx_traffic_idx =
2884 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2885 }
2886}
2887EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2888
2889const char *get_mgmt_string(int cmd)
2890{
2891 switch (cmd) {
2892 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2893 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2894 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2895 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2896 IWL_CMD(MANAGEMENT_PROBE_REQ);
2897 IWL_CMD(MANAGEMENT_PROBE_RESP);
2898 IWL_CMD(MANAGEMENT_BEACON);
2899 IWL_CMD(MANAGEMENT_ATIM);
2900 IWL_CMD(MANAGEMENT_DISASSOC);
2901 IWL_CMD(MANAGEMENT_AUTH);
2902 IWL_CMD(MANAGEMENT_DEAUTH);
2903 IWL_CMD(MANAGEMENT_ACTION);
2904 default:
2905 return "UNKNOWN";
2906
2907 }
2908}
2909
2910const char *get_ctrl_string(int cmd)
2911{
2912 switch (cmd) {
2913 IWL_CMD(CONTROL_BACK_REQ);
2914 IWL_CMD(CONTROL_BACK);
2915 IWL_CMD(CONTROL_PSPOLL);
2916 IWL_CMD(CONTROL_RTS);
2917 IWL_CMD(CONTROL_CTS);
2918 IWL_CMD(CONTROL_ACK);
2919 IWL_CMD(CONTROL_CFEND);
2920 IWL_CMD(CONTROL_CFENDACK);
2921 default:
2922 return "UNKNOWN";
2923
2924 }
2925}
2926
2927void iwl_clear_tx_stats(struct iwl_priv *priv)
2928{
2929 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
2930
2931}
2932
2933void iwl_clear_rx_stats(struct iwl_priv *priv)
2934{
2935 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
2936}
2937
2938/*
2939 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2940 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2941 * Use debugFs to display the rx/rx_statistics
2942 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2943 * information will be recorded, but DATA pkt still will be recorded
2944 * for the reason of iwl_led.c need to control the led blinking based on
2945 * number of tx and rx data.
2946 *
2947 */
2948void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2949{
2950 struct traffic_stats *stats;
2951
2952 if (is_tx)
2953 stats = &priv->tx_stats;
2954 else
2955 stats = &priv->rx_stats;
2956
2957 if (ieee80211_is_mgmt(fc)) {
2958 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2959 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2960 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2961 break;
2962 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2963 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2964 break;
2965 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2966 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2967 break;
2968 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2969 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2970 break;
2971 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2972 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2973 break;
2974 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2975 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2976 break;
2977 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2978 stats->mgmt[MANAGEMENT_BEACON]++;
2979 break;
2980 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2981 stats->mgmt[MANAGEMENT_ATIM]++;
2982 break;
2983 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2984 stats->mgmt[MANAGEMENT_DISASSOC]++;
2985 break;
2986 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2987 stats->mgmt[MANAGEMENT_AUTH]++;
2988 break;
2989 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2990 stats->mgmt[MANAGEMENT_DEAUTH]++;
2991 break;
2992 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2993 stats->mgmt[MANAGEMENT_ACTION]++;
2994 break;
2995 }
2996 } else if (ieee80211_is_ctl(fc)) {
2997 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2998 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2999 stats->ctrl[CONTROL_BACK_REQ]++;
3000 break;
3001 case cpu_to_le16(IEEE80211_STYPE_BACK):
3002 stats->ctrl[CONTROL_BACK]++;
3003 break;
3004 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3005 stats->ctrl[CONTROL_PSPOLL]++;
3006 break;
3007 case cpu_to_le16(IEEE80211_STYPE_RTS):
3008 stats->ctrl[CONTROL_RTS]++;
3009 break;
3010 case cpu_to_le16(IEEE80211_STYPE_CTS):
3011 stats->ctrl[CONTROL_CTS]++;
3012 break;
3013 case cpu_to_le16(IEEE80211_STYPE_ACK):
3014 stats->ctrl[CONTROL_ACK]++;
3015 break;
3016 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3017 stats->ctrl[CONTROL_CFEND]++;
3018 break;
3019 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3020 stats->ctrl[CONTROL_CFENDACK]++;
3021 break;
3022 }
3023 } else {
3024 /* data */
3025 stats->data_cnt++;
3026 stats->data_bytes += len;
3027 }
3028}
3029EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 3030#endif
3031
6da3a13e
WYG		 3032#ifdef CONFIG_PM
3033
3034int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3035{
3036 struct iwl_priv *priv = pci_get_drvdata(pdev);
3037
3038 /*
3039 * This function is called when system goes into suspend state
3040 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3041 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3042 * it will not call apm_ops.stop() to stop the DMA operation.
3043 * Calling apm_ops.stop here to make sure we stop the DMA.
3044 */
3045 priv->cfg->ops->lib->apm_ops.stop(priv);
3046
3047 pci_save_state(pdev);
3048 pci_disable_device(pdev);
3049 pci_set_power_state(pdev, PCI_D3hot);
3050
3051 return 0;
3052}
3053EXPORT_SYMBOL(iwl_pci_suspend);
3054
3055int iwl_pci_resume(struct pci_dev *pdev)
3056{
3057 struct iwl_priv *priv = pci_get_drvdata(pdev);
3058 int ret;
3059
3060 pci_set_power_state(pdev, PCI_D0);
3061 ret = pci_enable_device(pdev);
3062 if (ret)
3063 return ret;
3064 pci_restore_state(pdev);
3065 iwl_enable_interrupts(priv);
3066
3067 return 0;
3068}
3069EXPORT_SYMBOL(iwl_pci_resume);
3070
3071#endif /* CONFIG_PM */
Linux kernel - Deliverables
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