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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
901069c7 | 3 | * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
759ef89f | 22 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
24 | * | |
25 | *****************************************************************************/ | |
fcd427bb | 26 | /* |
3e0d4cb1 | 27 | * Please use this file (iwl-dev.h) for driver implementation definitions. |
5a36ba0e | 28 | * Please use iwl-commands.h for uCode API definitions. |
fcd427bb BC |
29 | */ |
30 | ||
be1f3ab6 EG |
31 | #ifndef __iwl_dev_h__ |
32 | #define __iwl_dev_h__ | |
b481de9c | 33 | |
a6b7a407 | 34 | #include <linux/interrupt.h> |
5d08cd1d CH |
35 | #include <linux/pci.h> /* for struct pci_device_id */ |
36 | #include <linux/kernel.h> | |
7194207c | 37 | #include <linux/wait.h> |
5ed540ae | 38 | #include <linux/leds.h> |
5d08cd1d CH |
39 | #include <net/ieee80211_radiotap.h> |
40 | ||
6bc913bd | 41 | #include "iwl-eeprom.h" |
6f83eaa1 | 42 | #include "iwl-csr.h" |
5d08cd1d | 43 | #include "iwl-prph.h" |
0a6857e7 | 44 | #include "iwl-debug.h" |
b744cb79 | 45 | #include "iwl-agn-hw.h" |
ab53d8af | 46 | #include "iwl-led.h" |
5da4b55f | 47 | #include "iwl-power.h" |
e227ceac | 48 | #include "iwl-agn-rs.h" |
0975cc8f | 49 | #include "iwl-agn-tt.h" |
d5934110 | 50 | #include "iwl-bus.h" |
41c50542 | 51 | #include "iwl-trans.h" |
48f20d35 | 52 | #include "iwl-shared.h" |
5d08cd1d | 53 | |
672639de WYG |
54 | struct iwl_tx_queue; |
55 | ||
099b40b7 | 56 | /* CT-KILL constants */ |
672639de WYG |
57 | #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ |
58 | #define CT_KILL_THRESHOLD 114 /* in Celsius */ | |
59 | #define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */ | |
4bf775cd | 60 | |
5d08cd1d CH |
61 | /* Default noise level to report when noise measurement is not available. |
62 | * This may be because we're: | |
63 | * 1) Not associated (4965, no beacon statistics being sent to driver) | |
64 | * 2) Scanning (noise measurement does not apply to associated channel) | |
65 | * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) | |
66 | * Use default noise value of -127 ... this is below the range of measurable | |
67 | * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. | |
68 | * Also, -127 works better than 0 when averaging frames with/without | |
69 | * noise info (e.g. averaging might be done in app); measured dBm values are | |
70 | * always negative ... using a negative value as the default keeps all | |
71 | * averages within an s8's (used in some apps) range of negative values. */ | |
72 | #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) | |
73 | ||
5d08cd1d CH |
74 | /* |
75 | * RTS threshold here is total size [2347] minus 4 FCS bytes | |
76 | * Per spec: | |
77 | * a value of 0 means RTS on all data/management packets | |
78 | * a value > max MSDU size means no RTS | |
79 | * else RTS for data/management frames where MPDU is larger | |
80 | * than RTS value. | |
81 | */ | |
82 | #define DEFAULT_RTS_THRESHOLD 2347U | |
83 | #define MIN_RTS_THRESHOLD 0U | |
84 | #define MAX_RTS_THRESHOLD 2347U | |
85 | #define MAX_MSDU_SIZE 2304U | |
86 | #define MAX_MPDU_SIZE 2346U | |
51b7ef05 | 87 | #define DEFAULT_BEACON_INTERVAL 200U |
5d08cd1d CH |
88 | #define DEFAULT_SHORT_RETRY_LIMIT 7U |
89 | #define DEFAULT_LONG_RETRY_LIMIT 4U | |
90 | ||
c2acea8e JB |
91 | /* defined below */ |
92 | struct iwl_device_cmd; | |
93 | ||
94 | struct iwl_cmd_meta { | |
95 | /* only for SYNC commands, iff the reply skb is wanted */ | |
96 | struct iwl_host_cmd *source; | |
97 | /* | |
98 | * only for ASYNC commands | |
99 | * (which is somewhat stupid -- look at iwl-sta.c for instance | |
100 | * which duplicates a bunch of code because the callback isn't | |
101 | * invoked for SYNC commands, if it were and its result passed | |
102 | * through it would be simpler...) | |
103 | */ | |
5696aea6 JB |
104 | void (*callback)(struct iwl_priv *priv, |
105 | struct iwl_device_cmd *cmd, | |
2f301227 | 106 | struct iwl_rx_packet *pkt); |
c2acea8e | 107 | |
c2acea8e JB |
108 | u32 flags; |
109 | ||
2e724443 FT |
110 | DEFINE_DMA_UNMAP_ADDR(mapping); |
111 | DEFINE_DMA_UNMAP_LEN(len); | |
c2acea8e JB |
112 | }; |
113 | ||
5d08cd1d CH |
114 | /* |
115 | * Generic queue structure | |
116 | * | |
4ce7cc2b JB |
117 | * Contains common data for Rx and Tx queues. |
118 | * | |
119 | * Note the difference between n_bd and n_window: the hardware | |
120 | * always assumes 256 descriptors, so n_bd is always 256 (unless | |
121 | * there might be HW changes in the future). For the normal TX | |
122 | * queues, n_window, which is the size of the software queue data | |
123 | * is also 256; however, for the command queue, n_window is only | |
124 | * 32 since we don't need so many commands pending. Since the HW | |
125 | * still uses 256 BDs for DMA though, n_bd stays 256. As a result, | |
126 | * the software buffers (in the variables @meta, @txb in struct | |
127 | * iwl_tx_queue) only have 32 entries, while the HW buffers (@tfds | |
128 | * in the same struct) have 256. | |
129 | * This means that we end up with the following: | |
130 | * HW entries: | 0 | ... | N * 32 | ... | N * 32 + 31 | ... | 255 | | |
131 | * SW entries: | 0 | ... | 31 | | |
132 | * where N is a number between 0 and 7. This means that the SW | |
133 | * data is a window overlayed over the HW queue. | |
5d08cd1d | 134 | */ |
443cfd45 | 135 | struct iwl_queue { |
5d08cd1d CH |
136 | int n_bd; /* number of BDs in this queue */ |
137 | int write_ptr; /* 1-st empty entry (index) host_w*/ | |
138 | int read_ptr; /* last used entry (index) host_r*/ | |
b74e31a9 | 139 | /* use for monitoring and recovering the stuck queue */ |
5d08cd1d CH |
140 | dma_addr_t dma_addr; /* physical addr for BD's */ |
141 | int n_window; /* safe queue window */ | |
142 | u32 id; | |
143 | int low_mark; /* low watermark, resume queue if free | |
144 | * space more than this */ | |
145 | int high_mark; /* high watermark, stop queue if free | |
146 | * space less than this */ | |
a839cf69 | 147 | }; |
5d08cd1d | 148 | |
bc47279f | 149 | /* One for each TFD */ |
8567c63e | 150 | struct iwl_tx_info { |
ff0d91c3 | 151 | struct sk_buff *skb; |
c90cbbbd | 152 | struct iwl_rxon_context *ctx; |
5d08cd1d CH |
153 | }; |
154 | ||
155 | /** | |
16466903 | 156 | * struct iwl_tx_queue - Tx Queue for DMA |
bc47279f BC |
157 | * @q: generic Rx/Tx queue descriptor |
158 | * @bd: base of circular buffer of TFDs | |
c2acea8e JB |
159 | * @cmd: array of command/TX buffer pointers |
160 | * @meta: array of meta data for each command/tx buffer | |
bc47279f BC |
161 | * @dma_addr_cmd: physical address of cmd/tx buffer array |
162 | * @txb: array of per-TFD driver data | |
22de94de | 163 | * @time_stamp: time (in jiffies) of last read_ptr change |
bc47279f BC |
164 | * @need_update: indicates need to update read/write index |
165 | * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled | |
a0eaad71 EG |
166 | * @sta_id: valid if sched_retry is set |
167 | * @tid: valid if sched_retry is set | |
5d08cd1d | 168 | * |
bc47279f BC |
169 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame |
170 | * descriptors) and required locking structures. | |
5d08cd1d | 171 | */ |
188cf6c7 SO |
172 | #define TFD_TX_CMD_SLOTS 256 |
173 | #define TFD_CMD_SLOTS 32 | |
174 | ||
16466903 | 175 | struct iwl_tx_queue { |
443cfd45 | 176 | struct iwl_queue q; |
4ce7cc2b | 177 | struct iwl_tfd *tfds; |
c2acea8e JB |
178 | struct iwl_device_cmd **cmd; |
179 | struct iwl_cmd_meta *meta; | |
8567c63e | 180 | struct iwl_tx_info *txb; |
22de94de | 181 | unsigned long time_stamp; |
3fd07a1e TW |
182 | u8 need_update; |
183 | u8 sched_retry; | |
184 | u8 active; | |
185 | u8 swq_id; | |
a0eaad71 EG |
186 | |
187 | u16 sta_id; | |
188 | u16 tid; | |
5d08cd1d CH |
189 | }; |
190 | ||
191 | #define IWL_NUM_SCAN_RATES (2) | |
192 | ||
5d08cd1d CH |
193 | /* |
194 | * One for each channel, holds all channel setup data | |
195 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | |
196 | * with one another! | |
197 | */ | |
bf85ea4f | 198 | struct iwl_channel_info { |
073d3f5f | 199 | struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ |
7aafef1c WYG |
200 | struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for |
201 | * HT40 channel */ | |
5d08cd1d CH |
202 | |
203 | u8 channel; /* channel number */ | |
204 | u8 flags; /* flags copied from EEPROM */ | |
205 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | |
fcd427bb | 206 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ |
5d08cd1d CH |
207 | s8 min_power; /* always 0 */ |
208 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ | |
209 | ||
210 | u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ | |
211 | u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ | |
8318d78a | 212 | enum ieee80211_band band; |
5d08cd1d | 213 | |
7aafef1c WYG |
214 | /* HT40 channel info */ |
215 | s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | |
7aafef1c WYG |
216 | u8 ht40_flags; /* flags copied from EEPROM */ |
217 | u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ | |
5d08cd1d CH |
218 | }; |
219 | ||
751ca305 | 220 | #define IWL_TX_FIFO_BK 0 /* shared */ |
edc1a3a0 | 221 | #define IWL_TX_FIFO_BE 1 |
751ca305 | 222 | #define IWL_TX_FIFO_VI 2 /* shared */ |
edc1a3a0 | 223 | #define IWL_TX_FIFO_VO 3 |
751ca305 JB |
224 | #define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK |
225 | #define IWL_TX_FIFO_BE_IPAN 4 | |
226 | #define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI | |
227 | #define IWL_TX_FIFO_VO_IPAN 5 | |
72c04ce0 JB |
228 | /* re-uses the VO FIFO, uCode will properly flush/schedule */ |
229 | #define IWL_TX_FIFO_AUX 5 | |
edc1a3a0 | 230 | #define IWL_TX_FIFO_UNUSED -1 |
5d08cd1d | 231 | |
72c04ce0 JB |
232 | /* AUX (TX during scan dwell) queue */ |
233 | #define IWL_AUX_QUEUE 10 | |
234 | ||
235 | /* | |
236 | * Minimum number of queues. MAX_NUM is defined in hw specific files. | |
237 | * Set the minimum to accommodate | |
238 | * - 4 standard TX queues | |
239 | * - the command queue | |
240 | * - 4 PAN TX queues | |
241 | * - the PAN multicast queue, and | |
242 | * - the AUX (TX during scan dwell) queue. | |
243 | */ | |
244 | #define IWL_MIN_NUM_QUEUES 11 | |
5d08cd1d | 245 | |
bd35f150 | 246 | /* |
13bb9483 | 247 | * Command queue depends on iPAN support. |
bd35f150 | 248 | */ |
13bb9483 JB |
249 | #define IWL_DEFAULT_CMD_QUEUE_NUM 4 |
250 | #define IWL_IPAN_CMD_QUEUE_NUM 9 | |
bd35f150 | 251 | |
751ca305 JB |
252 | /* |
253 | * This queue number is required for proper operation | |
254 | * because the ucode will stop/start the scheduler as | |
255 | * required. | |
256 | */ | |
257 | #define IWL_IPAN_MCAST_QUEUE 8 | |
258 | ||
5d08cd1d CH |
259 | #define IEEE80211_DATA_LEN 2304 |
260 | #define IEEE80211_4ADDR_LEN 30 | |
261 | #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) | |
262 | #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) | |
263 | ||
5d08cd1d | 264 | |
5d08cd1d CH |
265 | #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) |
266 | #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) | |
267 | #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) | |
268 | ||
269 | enum { | |
c587de0b | 270 | CMD_SYNC = 0, |
e419d62d EG |
271 | CMD_ASYNC = BIT(0), |
272 | CMD_WANT_SKB = BIT(1), | |
c7c1115b | 273 | CMD_ON_DEMAND = BIT(2), |
5d08cd1d CH |
274 | }; |
275 | ||
c8c24872 | 276 | #define DEF_CMD_PAYLOAD_SIZE 320 |
bd68fb6f | 277 | |
bc47279f | 278 | /** |
c2acea8e | 279 | * struct iwl_device_cmd |
bc47279f BC |
280 | * |
281 | * For allocation of the command and tx queues, this establishes the overall | |
4ce7cc2b JB |
282 | * size of the largest command we send to uCode, except for commands that |
283 | * aren't fully copied and use other TFD space. | |
bc47279f | 284 | */ |
c2acea8e | 285 | struct iwl_device_cmd { |
857485c0 | 286 | struct iwl_cmd_header hdr; /* uCode API */ |
5d08cd1d | 287 | union { |
5d08cd1d CH |
288 | u32 flags; |
289 | u8 val8; | |
290 | u16 val16; | |
291 | u32 val32; | |
83d527d9 | 292 | struct iwl_tx_cmd tx; |
c8c24872 WYG |
293 | struct iwl6000_channel_switch_cmd chswitch; |
294 | u8 payload[DEF_CMD_PAYLOAD_SIZE]; | |
ba2d3587 ED |
295 | } __packed cmd; |
296 | } __packed; | |
5d08cd1d | 297 | |
c2acea8e JB |
298 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) |
299 | ||
4ce7cc2b JB |
300 | #define IWL_MAX_CMD_TFDS 2 |
301 | ||
302 | enum iwl_hcmd_dataflag { | |
303 | IWL_HCMD_DFL_NOCOPY = BIT(0), | |
304 | }; | |
3257e5d4 | 305 | |
e419d62d EG |
306 | /** |
307 | * struct iwl_host_cmd - Host command to the uCode | |
308 | * @data: array of chunks that composes the data of the host command | |
309 | * @reply_page: pointer to the page that holds the response to the host command | |
310 | * @callback: | |
311 | * @flags: can be CMD_* note CMD_WANT_SKB is incompatible withe CMD_ASYNC | |
312 | * @len: array of the lenths of the chunks in data | |
313 | * @dataflags: | |
314 | * @id: id of the host command | |
315 | */ | |
857485c0 | 316 | struct iwl_host_cmd { |
3fa50738 | 317 | const void *data[IWL_MAX_CMD_TFDS]; |
2f301227 | 318 | unsigned long reply_page; |
5696aea6 JB |
319 | void (*callback)(struct iwl_priv *priv, |
320 | struct iwl_device_cmd *cmd, | |
2f301227 | 321 | struct iwl_rx_packet *pkt); |
c2acea8e | 322 | u32 flags; |
3fa50738 | 323 | u16 len[IWL_MAX_CMD_TFDS]; |
4ce7cc2b | 324 | u8 dataflags[IWL_MAX_CMD_TFDS]; |
c2acea8e | 325 | u8 id; |
5d08cd1d CH |
326 | }; |
327 | ||
5d08cd1d CH |
328 | #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 |
329 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | |
330 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | |
331 | ||
5d08cd1d CH |
332 | #define IWL_SUPPORTED_RATES_IE_LEN 8 |
333 | ||
5d08cd1d CH |
334 | #define MAX_TID_COUNT 9 |
335 | ||
336 | #define IWL_INVALID_RATE 0xFF | |
337 | #define IWL_INVALID_VALUE -1 | |
338 | ||
bc47279f | 339 | /** |
6def9761 | 340 | * struct iwl_ht_agg -- aggregation status while waiting for block-ack |
bc47279f BC |
341 | * @txq_id: Tx queue used for Tx attempt |
342 | * @frame_count: # frames attempted by Tx command | |
343 | * @wait_for_ba: Expect block-ack before next Tx reply | |
344 | * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window | |
345 | * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window | |
346 | * @bitmap1: High order, one bit for each frame pending ACK in Tx window | |
347 | * @rate_n_flags: Rate at which Tx was attempted | |
348 | * | |
349 | * If REPLY_TX indicates that aggregation was attempted, driver must wait | |
350 | * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info | |
351 | * until block ack arrives. | |
352 | */ | |
6def9761 | 353 | struct iwl_ht_agg { |
5d08cd1d CH |
354 | u16 txq_id; |
355 | u16 frame_count; | |
356 | u16 wait_for_ba; | |
357 | u16 start_idx; | |
fe01b477 | 358 | u64 bitmap; |
5d08cd1d | 359 | u32 rate_n_flags; |
fe01b477 RR |
360 | #define IWL_AGG_OFF 0 |
361 | #define IWL_AGG_ON 1 | |
362 | #define IWL_EMPTYING_HW_QUEUE_ADDBA 2 | |
363 | #define IWL_EMPTYING_HW_QUEUE_DELBA 3 | |
364 | u8 state; | |
c8823ec1 | 365 | u8 tx_fifo; |
5d08cd1d | 366 | }; |
fe01b477 | 367 | |
5d08cd1d | 368 | |
6def9761 | 369 | struct iwl_tid_data { |
f862a236 | 370 | u16 seq_number; /* agn only */ |
fe01b477 | 371 | u16 tfds_in_queue; |
6def9761 | 372 | struct iwl_ht_agg agg; |
5d08cd1d CH |
373 | }; |
374 | ||
a78fe754 | 375 | union iwl_ht_rate_supp { |
5d08cd1d CH |
376 | u16 rates; |
377 | struct { | |
378 | u8 siso_rate; | |
379 | u8 mimo_rate; | |
380 | }; | |
381 | }; | |
382 | ||
172c1d11 WYG |
383 | #define CFG_HT_RX_AMPDU_FACTOR_8K (0x0) |
384 | #define CFG_HT_RX_AMPDU_FACTOR_16K (0x1) | |
385 | #define CFG_HT_RX_AMPDU_FACTOR_32K (0x2) | |
386 | #define CFG_HT_RX_AMPDU_FACTOR_64K (0x3) | |
387 | #define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K | |
388 | #define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K | |
389 | #define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K | |
bcc693a1 WYG |
390 | |
391 | /* | |
392 | * Maximal MPDU density for TX aggregation | |
393 | * 4 - 2us density | |
394 | * 5 - 4us density | |
395 | * 6 - 8us density | |
396 | * 7 - 16us density | |
397 | */ | |
172c1d11 | 398 | #define CFG_HT_MPDU_DENSITY_2USEC (0x4) |
bcc693a1 | 399 | #define CFG_HT_MPDU_DENSITY_4USEC (0x5) |
172c1d11 WYG |
400 | #define CFG_HT_MPDU_DENSITY_8USEC (0x6) |
401 | #define CFG_HT_MPDU_DENSITY_16USEC (0x7) | |
bcc693a1 | 402 | #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC |
172c1d11 WYG |
403 | #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC |
404 | #define CFG_HT_MPDU_DENSITY_MIN (0x1) | |
5d08cd1d | 405 | |
fad95bf5 | 406 | struct iwl_ht_config { |
02bb1bea | 407 | bool single_chain_sufficient; |
ba37a3d0 | 408 | enum ieee80211_smps_mode smps; /* current smps mode */ |
5d08cd1d | 409 | }; |
5d08cd1d | 410 | |
5d08cd1d | 411 | /* QoS structures */ |
1ff50bda | 412 | struct iwl_qos_info { |
5d08cd1d | 413 | int qos_active; |
1ff50bda | 414 | struct iwl_qosparam_cmd def_qos_parm; |
5d08cd1d | 415 | }; |
5d08cd1d | 416 | |
fe6b23dd RC |
417 | /* |
418 | * Structure should be accessed with sta_lock held. When station addition | |
419 | * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only | |
420 | * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock | |
421 | * held. | |
422 | */ | |
6def9761 | 423 | struct iwl_station_entry { |
133636de | 424 | struct iwl_addsta_cmd sta; |
6def9761 | 425 | struct iwl_tid_data tid[MAX_TID_COUNT]; |
dcef732c | 426 | u8 used, ctxid; |
fe6b23dd | 427 | struct iwl_link_quality_cmd *lq; |
5d08cd1d CH |
428 | }; |
429 | ||
fd1af15d | 430 | struct iwl_station_priv_common { |
238d781d | 431 | struct iwl_rxon_context *ctx; |
fd1af15d JB |
432 | u8 sta_id; |
433 | }; | |
434 | ||
8d9698b3 RC |
435 | /* |
436 | * iwl_station_priv: Driver's private station information | |
437 | * | |
438 | * When mac80211 creates a station it reserves some space (hw->sta_data_size) | |
439 | * in the structure for use by driver. This structure is places in that | |
440 | * space. | |
8d9698b3 RC |
441 | */ |
442 | struct iwl_station_priv { | |
fd1af15d | 443 | struct iwl_station_priv_common common; |
8d9698b3 | 444 | struct iwl_lq_sta lq_sta; |
6ab10ff8 JB |
445 | atomic_t pending_frames; |
446 | bool client; | |
447 | bool asleep; | |
7b090687 | 448 | u8 max_agg_bufsize; |
8d9698b3 RC |
449 | }; |
450 | ||
fd1af15d JB |
451 | /** |
452 | * struct iwl_vif_priv - driver's private per-interface information | |
453 | * | |
454 | * When mac80211 allocates a virtual interface, it can allocate | |
455 | * space for us to put data into. | |
456 | */ | |
457 | struct iwl_vif_priv { | |
246ed355 | 458 | struct iwl_rxon_context *ctx; |
fd1af15d JB |
459 | u8 ibss_bssid_sta_id; |
460 | }; | |
461 | ||
5d08cd1d CH |
462 | /* one for each uCode image (inst/data, boot/init/runtime) */ |
463 | struct fw_desc { | |
464 | void *v_addr; /* access by driver */ | |
465 | dma_addr_t p_addr; /* access by card's busmaster DMA */ | |
466 | u32 len; /* bytes */ | |
467 | }; | |
468 | ||
dbf28e21 JB |
469 | struct fw_img { |
470 | struct fw_desc code, data; | |
471 | }; | |
472 | ||
dd7a2509 | 473 | /* v1/v2 uCode file layout */ |
cc0f555d JS |
474 | struct iwl_ucode_header { |
475 | __le32 ver; /* major/minor/API/serial */ | |
476 | union { | |
477 | struct { | |
478 | __le32 inst_size; /* bytes of runtime code */ | |
479 | __le32 data_size; /* bytes of runtime data */ | |
480 | __le32 init_size; /* bytes of init code */ | |
481 | __le32 init_data_size; /* bytes of init data */ | |
482 | __le32 boot_size; /* bytes of bootstrap code */ | |
483 | u8 data[0]; /* in same order as sizes */ | |
484 | } v1; | |
485 | struct { | |
486 | __le32 build; /* build number */ | |
487 | __le32 inst_size; /* bytes of runtime code */ | |
488 | __le32 data_size; /* bytes of runtime data */ | |
489 | __le32 init_size; /* bytes of init code */ | |
490 | __le32 init_data_size; /* bytes of init data */ | |
491 | __le32 boot_size; /* bytes of bootstrap code */ | |
492 | u8 data[0]; /* in same order as sizes */ | |
493 | } v2; | |
494 | } u; | |
5d08cd1d CH |
495 | }; |
496 | ||
dd7a2509 JB |
497 | /* |
498 | * new TLV uCode file layout | |
499 | * | |
500 | * The new TLV file format contains TLVs, that each specify | |
501 | * some piece of data. To facilitate "groups", for example | |
502 | * different instruction image with different capabilities, | |
503 | * bundled with the same init image, an alternative mechanism | |
504 | * is provided: | |
505 | * When the alternative field is 0, that means that the item | |
506 | * is always valid. When it is non-zero, then it is only | |
507 | * valid in conjunction with items of the same alternative, | |
508 | * in which case the driver (user) selects one alternative | |
509 | * to use. | |
510 | */ | |
511 | ||
512 | enum iwl_ucode_tlv_type { | |
513 | IWL_UCODE_TLV_INVALID = 0, /* unused */ | |
514 | IWL_UCODE_TLV_INST = 1, | |
515 | IWL_UCODE_TLV_DATA = 2, | |
516 | IWL_UCODE_TLV_INIT = 3, | |
517 | IWL_UCODE_TLV_INIT_DATA = 4, | |
518 | IWL_UCODE_TLV_BOOT = 5, | |
519 | IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ | |
ece9c4ee | 520 | IWL_UCODE_TLV_PAN = 7, |
b2e640d4 JB |
521 | IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, |
522 | IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, | |
523 | IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, | |
524 | IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, | |
525 | IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, | |
526 | IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, | |
c8312fac | 527 | IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, |
6a822d06 | 528 | IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, |
c8ac61cf JB |
529 | IWL_UCODE_TLV_WOWLAN_INST = 16, |
530 | IWL_UCODE_TLV_WOWLAN_DATA = 17, | |
3997ff39 JB |
531 | IWL_UCODE_TLV_FLAGS = 18, |
532 | }; | |
533 | ||
534 | /** | |
535 | * enum iwl_ucode_tlv_flag - ucode API flags | |
536 | * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously | |
537 | * was a separate TLV but moved here to save space. | |
d2690c0d JB |
538 | * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behaviour on hidden SSID, |
539 | * treats good CRC threshold as a boolean | |
3997ff39 | 540 | * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w). |
c6baf7fb | 541 | * @IWL_UCODE_TLV_FLAGS_P2P: This uCode image supports P2P. |
3997ff39 JB |
542 | */ |
543 | enum iwl_ucode_tlv_flag { | |
544 | IWL_UCODE_TLV_FLAGS_PAN = BIT(0), | |
d2690c0d | 545 | IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1), |
3997ff39 | 546 | IWL_UCODE_TLV_FLAGS_MFP = BIT(2), |
c6baf7fb | 547 | IWL_UCODE_TLV_FLAGS_P2P = BIT(3), |
dd7a2509 JB |
548 | }; |
549 | ||
550 | struct iwl_ucode_tlv { | |
551 | __le16 type; /* see above */ | |
552 | __le16 alternative; /* see comment */ | |
553 | __le32 length; /* not including type/length fields */ | |
554 | u8 data[0]; | |
ba2d3587 | 555 | } __packed; |
dd7a2509 JB |
556 | |
557 | #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 | |
558 | ||
559 | struct iwl_tlv_ucode_header { | |
560 | /* | |
561 | * The TLV style ucode header is distinguished from | |
562 | * the v1/v2 style header by first four bytes being | |
563 | * zero, as such is an invalid combination of | |
564 | * major/minor/API/serial versions. | |
565 | */ | |
566 | __le32 zero; | |
567 | __le32 magic; | |
568 | u8 human_readable[64]; | |
569 | __le32 ver; /* major/minor/API/serial */ | |
570 | __le32 build; | |
571 | __le64 alternatives; /* bitmask of valid alternatives */ | |
572 | /* | |
573 | * The data contained herein has a TLV layout, | |
574 | * see above for the TLV header and types. | |
575 | * Note that each TLV is padded to a length | |
576 | * that is a multiple of 4 for alignment. | |
577 | */ | |
578 | u8 data[0]; | |
579 | }; | |
580 | ||
f0832f13 EG |
581 | struct iwl_sensitivity_ranges { |
582 | u16 min_nrg_cck; | |
583 | u16 max_nrg_cck; | |
584 | ||
585 | u16 nrg_th_cck; | |
586 | u16 nrg_th_ofdm; | |
587 | ||
588 | u16 auto_corr_min_ofdm; | |
589 | u16 auto_corr_min_ofdm_mrc; | |
590 | u16 auto_corr_min_ofdm_x1; | |
591 | u16 auto_corr_min_ofdm_mrc_x1; | |
592 | ||
593 | u16 auto_corr_max_ofdm; | |
594 | u16 auto_corr_max_ofdm_mrc; | |
595 | u16 auto_corr_max_ofdm_x1; | |
596 | u16 auto_corr_max_ofdm_mrc_x1; | |
597 | ||
598 | u16 auto_corr_max_cck; | |
599 | u16 auto_corr_max_cck_mrc; | |
600 | u16 auto_corr_min_cck; | |
601 | u16 auto_corr_min_cck_mrc; | |
55036d66 WYG |
602 | |
603 | u16 barker_corr_th_min; | |
604 | u16 barker_corr_th_min_mrc; | |
605 | u16 nrg_th_cca; | |
f0832f13 EG |
606 | }; |
607 | ||
099b40b7 | 608 | |
b5047f78 TW |
609 | #define KELVIN_TO_CELSIUS(x) ((x)-273) |
610 | #define CELSIUS_TO_KELVIN(x) ((x)+273) | |
611 | ||
612 | ||
5d08cd1d CH |
613 | /****************************************************************************** |
614 | * | |
a33c2f47 EG |
615 | * Functions implemented in core module which are forward declared here |
616 | * for use by iwl-[4-5].c | |
5d08cd1d | 617 | * |
a33c2f47 EG |
618 | * NOTE: The implementation of these functions are not hardware specific |
619 | * which is why they are in the core module files. | |
5d08cd1d CH |
620 | * |
621 | * Naming convention -- | |
a33c2f47 | 622 | * iwl_ <-- Is part of iwlwifi |
5d08cd1d | 623 | * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) |
5d08cd1d CH |
624 | * |
625 | ****************************************************************************/ | |
5b9f8cd3 | 626 | extern void iwl_update_chain_flags(struct iwl_priv *priv); |
a33c2f47 | 627 | extern const u8 iwl_bcast_addr[ETH_ALEN]; |
443cfd45 | 628 | extern int iwl_queue_space(const struct iwl_queue *q); |
fd4abac5 TW |
629 | static inline int iwl_queue_used(const struct iwl_queue *q, int i) |
630 | { | |
c8106d76 | 631 | return q->write_ptr >= q->read_ptr ? |
fd4abac5 TW |
632 | (i >= q->read_ptr && i < q->write_ptr) : |
633 | !(i < q->read_ptr && i >= q->write_ptr); | |
634 | } | |
635 | ||
636 | ||
4ce7cc2b | 637 | static inline u8 get_cmd_index(struct iwl_queue *q, u32 index) |
fd4abac5 | 638 | { |
fd4abac5 TW |
639 | return index & (q->n_window - 1); |
640 | } | |
641 | ||
b481de9c ZY |
642 | #define IWL_OPERATION_MODE_AUTO 0 |
643 | #define IWL_OPERATION_MODE_HT_ONLY 1 | |
644 | #define IWL_OPERATION_MODE_MIXED 2 | |
645 | #define IWL_OPERATION_MODE_20MHZ 3 | |
646 | ||
3195cdb7 TW |
647 | #define IWL_TX_CRC_SIZE 4 |
648 | #define IWL_TX_DELIMITER_SIZE 4 | |
b481de9c | 649 | |
b481de9c | 650 | #define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 |
b481de9c | 651 | |
b481de9c | 652 | /* Sensitivity and chain noise calibration */ |
b481de9c | 653 | #define INITIALIZATION_VALUE 0xFFFF |
d8c07e7a | 654 | #define IWL_CAL_NUM_BEACONS 16 |
b481de9c ZY |
655 | #define MAXIMUM_ALLOWED_PATHLOSS 15 |
656 | ||
b481de9c ZY |
657 | #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 |
658 | ||
659 | #define MAX_FA_OFDM 50 | |
660 | #define MIN_FA_OFDM 5 | |
661 | #define MAX_FA_CCK 50 | |
662 | #define MIN_FA_CCK 5 | |
663 | ||
b481de9c ZY |
664 | #define AUTO_CORR_STEP_OFDM 1 |
665 | ||
b481de9c ZY |
666 | #define AUTO_CORR_STEP_CCK 3 |
667 | #define AUTO_CORR_MAX_TH_CCK 160 | |
668 | ||
b481de9c ZY |
669 | #define NRG_DIFF 2 |
670 | #define NRG_STEP_CCK 2 | |
671 | #define NRG_MARGIN 8 | |
672 | #define MAX_NUMBER_CCK_NO_FA 100 | |
673 | ||
674 | #define AUTO_CORR_CCK_MIN_VAL_DEF (125) | |
675 | ||
676 | #define CHAIN_A 0 | |
677 | #define CHAIN_B 1 | |
678 | #define CHAIN_C 2 | |
679 | #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4 | |
680 | #define ALL_BAND_FILTER 0xFF00 | |
681 | #define IN_BAND_FILTER 0xFF | |
682 | #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF | |
683 | ||
3195cdb7 TW |
684 | #define NRG_NUM_PREV_STAT_L 20 |
685 | #define NUM_RX_CHAINS 3 | |
686 | ||
3240cab3 | 687 | enum iwlagn_false_alarm_state { |
b481de9c ZY |
688 | IWL_FA_TOO_MANY = 0, |
689 | IWL_FA_TOO_FEW = 1, | |
690 | IWL_FA_GOOD_RANGE = 2, | |
691 | }; | |
692 | ||
3240cab3 | 693 | enum iwlagn_chain_noise_state { |
b481de9c | 694 | IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ |
04816448 GE |
695 | IWL_CHAIN_NOISE_ACCUMULATE, |
696 | IWL_CHAIN_NOISE_CALIBRATED, | |
697 | IWL_CHAIN_NOISE_DONE, | |
b481de9c ZY |
698 | }; |
699 | ||
f69f42a6 TW |
700 | |
701 | /* | |
702 | * enum iwl_calib | |
703 | * defines the order in which results of initial calibrations | |
704 | * should be sent to the runtime uCode | |
705 | */ | |
706 | enum iwl_calib { | |
707 | IWL_CALIB_XTAL, | |
819500c5 | 708 | IWL_CALIB_DC, |
f69f42a6 TW |
709 | IWL_CALIB_LO, |
710 | IWL_CALIB_TX_IQ, | |
711 | IWL_CALIB_TX_IQ_PERD, | |
201706ac | 712 | IWL_CALIB_BASE_BAND, |
bf53f939 | 713 | IWL_CALIB_TEMP_OFFSET, |
f69f42a6 TW |
714 | IWL_CALIB_MAX |
715 | }; | |
716 | ||
6e21f2c1 TW |
717 | /* Opaque calibration results */ |
718 | struct iwl_calib_result { | |
719 | void *buf; | |
720 | size_t buf_len; | |
7c616cba TW |
721 | }; |
722 | ||
b481de9c | 723 | /* Sensitivity calib data */ |
f0832f13 | 724 | struct iwl_sensitivity_data { |
b481de9c ZY |
725 | u32 auto_corr_ofdm; |
726 | u32 auto_corr_ofdm_mrc; | |
727 | u32 auto_corr_ofdm_x1; | |
728 | u32 auto_corr_ofdm_mrc_x1; | |
729 | u32 auto_corr_cck; | |
730 | u32 auto_corr_cck_mrc; | |
731 | ||
732 | u32 last_bad_plcp_cnt_ofdm; | |
733 | u32 last_fa_cnt_ofdm; | |
734 | u32 last_bad_plcp_cnt_cck; | |
735 | u32 last_fa_cnt_cck; | |
736 | ||
737 | u32 nrg_curr_state; | |
738 | u32 nrg_prev_state; | |
739 | u32 nrg_value[10]; | |
740 | u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; | |
741 | u32 nrg_silence_ref; | |
742 | u32 nrg_energy_idx; | |
743 | u32 nrg_silence_idx; | |
744 | u32 nrg_th_cck; | |
745 | s32 nrg_auto_corr_silence_diff; | |
746 | u32 num_in_cck_no_fa; | |
747 | u32 nrg_th_ofdm; | |
55036d66 WYG |
748 | |
749 | u16 barker_corr_th_min; | |
750 | u16 barker_corr_th_min_mrc; | |
751 | u16 nrg_th_cca; | |
b481de9c ZY |
752 | }; |
753 | ||
754 | /* Chain noise (differential Rx gain) calib data */ | |
f0832f13 | 755 | struct iwl_chain_noise_data { |
04816448 | 756 | u32 active_chains; |
b481de9c ZY |
757 | u32 chain_noise_a; |
758 | u32 chain_noise_b; | |
759 | u32 chain_noise_c; | |
760 | u32 chain_signal_a; | |
761 | u32 chain_signal_b; | |
762 | u32 chain_signal_c; | |
04816448 | 763 | u16 beacon_count; |
b481de9c ZY |
764 | u8 disconn_array[NUM_RX_CHAINS]; |
765 | u8 delta_gain_code[NUM_RX_CHAINS]; | |
766 | u8 radio_write; | |
04816448 | 767 | u8 state; |
b481de9c ZY |
768 | }; |
769 | ||
abceddb4 BC |
770 | #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ |
771 | #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ | |
b481de9c | 772 | |
20594eb0 WYG |
773 | #define IWL_TRAFFIC_ENTRIES (256) |
774 | #define IWL_TRAFFIC_ENTRY_SIZE (64) | |
5d08cd1d | 775 | |
5d08cd1d CH |
776 | enum { |
777 | MEASUREMENT_READY = (1 << 0), | |
778 | MEASUREMENT_ACTIVE = (1 << 1), | |
779 | }; | |
780 | ||
0848e297 WYG |
781 | enum iwl_nvm_type { |
782 | NVM_DEVICE_TYPE_EEPROM = 0, | |
783 | NVM_DEVICE_TYPE_OTP, | |
784 | }; | |
785 | ||
415e4993 WYG |
786 | /* |
787 | * Two types of OTP memory access modes | |
788 | * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode, | |
789 | * based on physical memory addressing | |
790 | * IWL_OTP_ACCESS_RELATIVE - relative address mode, | |
791 | * based on logical memory addressing | |
792 | */ | |
793 | enum iwl_access_mode { | |
794 | IWL_OTP_ACCESS_ABSOLUTE, | |
795 | IWL_OTP_ACCESS_RELATIVE, | |
796 | }; | |
65b7998a WYG |
797 | |
798 | /** | |
799 | * enum iwl_pa_type - Power Amplifier type | |
800 | * @IWL_PA_SYSTEM: based on uCode configuration | |
65b7998a WYG |
801 | * @IWL_PA_INTERNAL: use Internal only |
802 | */ | |
803 | enum iwl_pa_type { | |
804 | IWL_PA_SYSTEM = 0, | |
740e7f51 | 805 | IWL_PA_INTERNAL = 1, |
65b7998a WYG |
806 | }; |
807 | ||
91835ba4 WYG |
808 | /* reply_tx_statistics (for _agn devices) */ |
809 | struct reply_tx_error_statistics { | |
810 | u32 pp_delay; | |
811 | u32 pp_few_bytes; | |
812 | u32 pp_bt_prio; | |
813 | u32 pp_quiet_period; | |
814 | u32 pp_calc_ttak; | |
815 | u32 int_crossed_retry; | |
816 | u32 short_limit; | |
817 | u32 long_limit; | |
818 | u32 fifo_underrun; | |
819 | u32 drain_flow; | |
820 | u32 rfkill_flush; | |
821 | u32 life_expire; | |
822 | u32 dest_ps; | |
823 | u32 host_abort; | |
824 | u32 bt_retry; | |
825 | u32 sta_invalid; | |
826 | u32 frag_drop; | |
827 | u32 tid_disable; | |
828 | u32 fifo_flush; | |
829 | u32 insuff_cf_poll; | |
830 | u32 fail_hw_drop; | |
831 | u32 sta_color_mismatch; | |
832 | u32 unknown; | |
833 | }; | |
834 | ||
814665fe WYG |
835 | /* reply_agg_tx_statistics (for _agn devices) */ |
836 | struct reply_agg_tx_error_statistics { | |
837 | u32 underrun; | |
838 | u32 bt_prio; | |
839 | u32 few_bytes; | |
840 | u32 abort; | |
841 | u32 last_sent_ttl; | |
842 | u32 last_sent_try; | |
843 | u32 last_sent_bt_kill; | |
844 | u32 scd_query; | |
845 | u32 bad_crc32; | |
846 | u32 response; | |
847 | u32 dump_tx; | |
848 | u32 delay_tx; | |
849 | u32 unknown; | |
850 | }; | |
851 | ||
22fdf3c9 WYG |
852 | /* management statistics */ |
853 | enum iwl_mgmt_stats { | |
854 | MANAGEMENT_ASSOC_REQ = 0, | |
855 | MANAGEMENT_ASSOC_RESP, | |
856 | MANAGEMENT_REASSOC_REQ, | |
857 | MANAGEMENT_REASSOC_RESP, | |
858 | MANAGEMENT_PROBE_REQ, | |
859 | MANAGEMENT_PROBE_RESP, | |
860 | MANAGEMENT_BEACON, | |
861 | MANAGEMENT_ATIM, | |
862 | MANAGEMENT_DISASSOC, | |
863 | MANAGEMENT_AUTH, | |
864 | MANAGEMENT_DEAUTH, | |
865 | MANAGEMENT_ACTION, | |
866 | MANAGEMENT_MAX, | |
867 | }; | |
868 | /* control statistics */ | |
869 | enum iwl_ctrl_stats { | |
870 | CONTROL_BACK_REQ = 0, | |
871 | CONTROL_BACK, | |
872 | CONTROL_PSPOLL, | |
873 | CONTROL_RTS, | |
874 | CONTROL_CTS, | |
875 | CONTROL_ACK, | |
876 | CONTROL_CFEND, | |
877 | CONTROL_CFENDACK, | |
878 | CONTROL_MAX, | |
879 | }; | |
880 | ||
881 | struct traffic_stats { | |
5ed540ae | 882 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
22fdf3c9 WYG |
883 | u32 mgmt[MANAGEMENT_MAX]; |
884 | u32 ctrl[CONTROL_MAX]; | |
885 | u32 data_cnt; | |
886 | u64 data_bytes; | |
22fdf3c9 | 887 | #endif |
5ed540ae | 888 | }; |
22fdf3c9 | 889 | |
a9e1cb6a WYG |
890 | /* |
891 | * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds | |
892 | * to perform continuous uCode event logging operation if enabled | |
893 | */ | |
894 | #define UCODE_TRACE_PERIOD (100) | |
895 | ||
896 | /* | |
897 | * iwl_event_log: current uCode event log position | |
898 | * | |
899 | * @ucode_trace: enable/disable ucode continuous trace timer | |
900 | * @num_wraps: how many times the event buffer wraps | |
901 | * @next_entry: the entry just before the next one that uCode would fill | |
902 | * @non_wraps_count: counter for no wrap detected when dump ucode events | |
903 | * @wraps_once_count: counter for wrap once detected when dump ucode events | |
904 | * @wraps_more_count: counter for wrap more than once detected | |
905 | * when dump ucode events | |
906 | */ | |
907 | struct iwl_event_log { | |
908 | bool ucode_trace; | |
909 | u32 num_wraps; | |
910 | u32 next_entry; | |
911 | int non_wraps_count; | |
912 | int wraps_once_count; | |
913 | int wraps_more_count; | |
914 | }; | |
915 | ||
2be76703 WYG |
916 | /* |
917 | * host interrupt timeout value | |
918 | * used with setting interrupt coalescing timer | |
919 | * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit | |
920 | * | |
921 | * default interrupt coalescing timer is 64 x 32 = 2048 usecs | |
922 | * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs | |
923 | */ | |
924 | #define IWL_HOST_INT_TIMEOUT_MAX (0xFF) | |
925 | #define IWL_HOST_INT_TIMEOUT_DEF (0x40) | |
926 | #define IWL_HOST_INT_TIMEOUT_MIN (0x0) | |
927 | #define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF) | |
928 | #define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10) | |
929 | #define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0) | |
930 | ||
3e4fb5fa TAN |
931 | /* |
932 | * This is the threshold value of plcp error rate per 100mSecs. It is | |
933 | * used to set and check for the validity of plcp_delta. | |
934 | */ | |
680788ac | 935 | #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1) |
3e4fb5fa TAN |
936 | #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50) |
937 | #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100) | |
6c3872e1 | 938 | #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200) |
3e4fb5fa | 939 | #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255) |
680788ac | 940 | #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0) |
3e4fb5fa | 941 | |
8a472da4 WYG |
942 | #define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3) |
943 | #define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) | |
944 | ||
22de94de SG |
945 | /* TX queue watchdog timeouts in mSecs */ |
946 | #define IWL_DEF_WD_TIMEOUT (2000) | |
947 | #define IWL_LONG_WD_TIMEOUT (10000) | |
948 | #define IWL_MAX_WD_TIMEOUT (120000) | |
b74e31a9 | 949 | |
bee008b7 WYG |
950 | /* BT Antenna Coupling Threshold (dB) */ |
951 | #define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35) | |
952 | ||
491bc292 WYG |
953 | /* Firmware reload counter and Timestamp */ |
954 | #define IWL_MIN_RELOAD_DURATION 1000 /* 1000 ms */ | |
955 | #define IWL_MAX_CONTINUE_RELOAD_CNT 4 | |
956 | ||
957 | ||
a93e7973 WYG |
958 | enum iwl_reset { |
959 | IWL_RF_RESET = 0, | |
960 | IWL_FW_RESET, | |
8a472da4 WYG |
961 | IWL_MAX_FORCE_RESET, |
962 | }; | |
963 | ||
964 | struct iwl_force_reset { | |
965 | int reset_request_count; | |
966 | int reset_success_count; | |
967 | int reset_reject_count; | |
968 | unsigned long reset_duration; | |
969 | unsigned long last_force_reset_jiffies; | |
a93e7973 WYG |
970 | }; |
971 | ||
a0ee74cf | 972 | /* extend beacon time format bit shifting */ |
a0ee74cf WYG |
973 | /* |
974 | * for _agn devices | |
975 | * bits 31:22 - extended | |
976 | * bits 21:0 - interval | |
977 | */ | |
978 | #define IWLAGN_EXT_BEACON_TIME_POS 22 | |
979 | ||
7194207c JB |
980 | /** |
981 | * struct iwl_notification_wait - notification wait entry | |
982 | * @list: list head for global list | |
983 | * @fn: function called with the notification | |
984 | * @cmd: command ID | |
985 | * | |
986 | * This structure is not used directly, to wait for a | |
987 | * notification declare it on the stack, and call | |
988 | * iwlagn_init_notification_wait() with appropriate | |
989 | * parameters. Then do whatever will cause the ucode | |
990 | * to notify the driver, and to wait for that then | |
991 | * call iwlagn_wait_notification(). | |
992 | * | |
993 | * Each notification is one-shot. If at some point we | |
994 | * need to support multi-shot notifications (which | |
995 | * can't be allocated on the stack) we need to modify | |
996 | * the code for them. | |
997 | */ | |
998 | struct iwl_notification_wait { | |
999 | struct list_head list; | |
1000 | ||
09f18afe JB |
1001 | void (*fn)(struct iwl_priv *priv, struct iwl_rx_packet *pkt, |
1002 | void *data); | |
1003 | void *fn_data; | |
7194207c JB |
1004 | |
1005 | u8 cmd; | |
e74fe233 | 1006 | bool triggered, aborted; |
7194207c JB |
1007 | }; |
1008 | ||
246ed355 JB |
1009 | enum iwl_rxon_context_id { |
1010 | IWL_RXON_CTX_BSS, | |
ece9c4ee | 1011 | IWL_RXON_CTX_PAN, |
246ed355 JB |
1012 | |
1013 | NUM_IWL_RXON_CTX | |
1014 | }; | |
1015 | ||
1016 | struct iwl_rxon_context { | |
8bd413e6 | 1017 | struct ieee80211_vif *vif; |
e72f368b JB |
1018 | |
1019 | const u8 *ac_to_fifo; | |
1020 | const u8 *ac_to_queue; | |
1021 | u8 mcast_queue; | |
1022 | ||
763cc3bf JB |
1023 | /* |
1024 | * We could use the vif to indicate active, but we | |
1025 | * also need it to be active during disabling when | |
1026 | * we already removed the vif for type setting. | |
1027 | */ | |
1028 | bool always_active, is_active; | |
1029 | ||
2295c66b JB |
1030 | bool ht_need_multiple_chains; |
1031 | ||
246ed355 | 1032 | enum iwl_rxon_context_id ctxid; |
d0fe478c JB |
1033 | |
1034 | u32 interface_modes, exclusive_interface_modes; | |
1035 | u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype; | |
1036 | ||
246ed355 JB |
1037 | /* |
1038 | * We declare this const so it can only be | |
1039 | * changed via explicit cast within the | |
1040 | * routines that actually update the physical | |
1041 | * hardware. | |
1042 | */ | |
1043 | const struct iwl_rxon_cmd active; | |
1044 | struct iwl_rxon_cmd staging; | |
1045 | ||
1046 | struct iwl_rxon_time_cmd timing; | |
a194e324 | 1047 | |
8dfdb9d5 JB |
1048 | struct iwl_qos_info qos_data; |
1049 | ||
2995bafa | 1050 | u8 bcast_sta_id, ap_sta_id; |
8f2d3d2a JB |
1051 | |
1052 | u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd; | |
8dfdb9d5 | 1053 | u8 qos_cmd; |
c10afb6e JB |
1054 | u8 wep_key_cmd; |
1055 | ||
1056 | struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; | |
1057 | u8 key_mapping_keys; | |
770e13bd JB |
1058 | |
1059 | __le32 station_flags; | |
7e6a5886 | 1060 | |
bbb05cb5 JB |
1061 | int beacon_int; |
1062 | ||
7e6a5886 JB |
1063 | struct { |
1064 | bool non_gf_sta_present; | |
1065 | u8 protection; | |
1066 | bool enabled, is_40mhz; | |
1067 | u8 extension_chan_offset; | |
1068 | } ht; | |
68b99311 GT |
1069 | |
1070 | bool last_tx_rejected; | |
246ed355 JB |
1071 | }; |
1072 | ||
266af4c7 JB |
1073 | enum iwl_scan_type { |
1074 | IWL_SCAN_NORMAL, | |
1075 | IWL_SCAN_RADIO_RESET, | |
c6baf7fb | 1076 | IWL_SCAN_ROC, |
266af4c7 JB |
1077 | }; |
1078 | ||
872907bb JB |
1079 | enum iwlagn_ucode_type { |
1080 | IWL_UCODE_NONE, | |
1081 | IWL_UCODE_REGULAR, | |
1082 | IWL_UCODE_INIT, | |
1083 | IWL_UCODE_WOWLAN, | |
1084 | }; | |
1085 | ||
7a4e5281 WYG |
1086 | #ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL |
1087 | struct iwl_testmode_trace { | |
49b72100 WYG |
1088 | u32 buff_size; |
1089 | u32 total_size; | |
eb64dca0 | 1090 | u32 num_chunks; |
7a4e5281 WYG |
1091 | u8 *cpu_addr; |
1092 | u8 *trace_addr; | |
1093 | dma_addr_t dma_addr; | |
1094 | bool trace_enabled; | |
1095 | }; | |
1096 | #endif | |
a48709c5 | 1097 | |
e98a1939 WYG |
1098 | /* uCode ownership */ |
1099 | #define IWL_OWNERSHIP_DRIVER 0 | |
1100 | #define IWL_OWNERSHIP_TM 1 | |
1101 | ||
c79dd5b5 | 1102 | struct iwl_priv { |
5d08cd1d | 1103 | |
cac988a6 EG |
1104 | /*data shared among all the driver's layers */ |
1105 | struct iwl_shared _shrd; | |
1106 | struct iwl_shared *shrd; | |
1107 | ||
5d08cd1d CH |
1108 | /* ieee device used by generic ieee processing code */ |
1109 | struct ieee80211_hw *hw; | |
1110 | struct ieee80211_channel *ieee_channels; | |
1111 | struct ieee80211_rate *ieee_rates; | |
82b9a121 | 1112 | struct iwl_cfg *cfg; |
5d08cd1d | 1113 | |
8318d78a | 1114 | enum ieee80211_band band; |
5d08cd1d | 1115 | |
4613e72d CK |
1116 | void (*pre_rx_handler)(struct iwl_priv *priv, |
1117 | struct iwl_rx_mem_buffer *rxb); | |
c79dd5b5 | 1118 | void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, |
a55360e4 | 1119 | struct iwl_rx_mem_buffer *rxb); |
5d08cd1d | 1120 | |
8318d78a | 1121 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
5d08cd1d | 1122 | |
5d08cd1d | 1123 | /* spectrum measurement report caching */ |
2aa6ab86 | 1124 | struct iwl_spectrum_notification measure_report; |
5d08cd1d | 1125 | u8 measurement_status; |
81963d68 | 1126 | |
5d08cd1d CH |
1127 | /* ucode beacon time */ |
1128 | u32 ucode_beacon_time; | |
a13d276f | 1129 | int missed_beacon_threshold; |
5d08cd1d | 1130 | |
a85d7cca JB |
1131 | /* track IBSS manager (last beacon) status */ |
1132 | u32 ibss_manager; | |
1133 | ||
410f2bb3 SG |
1134 | /* jiffies when last recovery from statistics was performed */ |
1135 | unsigned long rx_statistics_jiffies; | |
3e4fb5fa | 1136 | |
1f7b6172 EG |
1137 | /*counters */ |
1138 | u32 rx_handlers_stats[REPLY_MAX]; | |
1139 | ||
a93e7973 | 1140 | /* force reset */ |
8a472da4 | 1141 | struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; |
a93e7973 | 1142 | |
491bc292 WYG |
1143 | /* firmware reload counter and timestamp */ |
1144 | unsigned long reload_jiffies; | |
1145 | int reload_count; | |
1146 | ||
5a2a780c | 1147 | /* we allocate array of iwl_channel_info for NIC's valid channels. |
5d08cd1d | 1148 | * Access via channel # using indirect index array */ |
bf85ea4f | 1149 | struct iwl_channel_info *channel_info; /* channel info array */ |
5d08cd1d CH |
1150 | u8 channel_count; /* # of channels */ |
1151 | ||
5d08cd1d CH |
1152 | /* thermal calibration */ |
1153 | s32 temperature; /* degrees Kelvin */ | |
1154 | s32 last_temperature; | |
1155 | ||
7c616cba | 1156 | /* init calibration results */ |
6e21f2c1 | 1157 | struct iwl_calib_result calib_results[IWL_CALIB_MAX]; |
7c616cba | 1158 | |
5d08cd1d | 1159 | /* Scan related variables */ |
5d08cd1d | 1160 | unsigned long scan_start; |
5d08cd1d | 1161 | unsigned long scan_start_tsf; |
811ecc99 | 1162 | void *scan_cmd; |
00700ee0 | 1163 | enum ieee80211_band scan_band; |
1ecf9fc1 | 1164 | struct cfg80211_scan_request *scan_request; |
f84b29ec | 1165 | struct ieee80211_vif *scan_vif; |
266af4c7 | 1166 | enum iwl_scan_type scan_type; |
76eff18b TW |
1167 | u8 scan_tx_ant[IEEE80211_NUM_BANDS]; |
1168 | u8 mgmt_tx_ant; | |
5d08cd1d | 1169 | |
6ac2f839 | 1170 | /*TODO: remove these pointers - use bus(priv) instead */ |
d5934110 | 1171 | struct iwl_bus *bus; /* bus specific data */ |
5d08cd1d | 1172 | |
246ed355 JB |
1173 | /* microcode/device supports multiple contexts */ |
1174 | u8 valid_contexts; | |
1175 | ||
c10afb6e JB |
1176 | /* max number of station keys */ |
1177 | u8 sta_key_max_num; | |
1178 | ||
d2690c0d JB |
1179 | bool new_scan_threshold_behaviour; |
1180 | ||
c6fa17ed WYG |
1181 | /* EEPROM MAC addresses */ |
1182 | struct mac_address addresses[2]; | |
1183 | ||
5d08cd1d | 1184 | /* uCode images, save to reload in case of failure */ |
b08dfd04 | 1185 | int fw_index; /* firmware we're trying to load */ |
c02b3acd CR |
1186 | u32 ucode_ver; /* version of ucode, copy of |
1187 | iwl_ucode.ver */ | |
e98a1939 WYG |
1188 | |
1189 | /* uCode owner: default: IWL_OWNERSHIP_DRIVER */ | |
1190 | u8 ucode_owner; | |
1191 | ||
dbf28e21 JB |
1192 | struct fw_img ucode_rt; |
1193 | struct fw_img ucode_init; | |
c8ac61cf | 1194 | struct fw_img ucode_wowlan; |
dbf28e21 | 1195 | |
872907bb | 1196 | enum iwlagn_ucode_type ucode_type; |
dbb983b7 | 1197 | u8 ucode_write_complete; /* the image write is complete */ |
b08dfd04 | 1198 | char firmware_name[25]; |
5d08cd1d | 1199 | |
246ed355 | 1200 | struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX]; |
5d08cd1d | 1201 | |
6f213ff1 | 1202 | __le16 switch_channel; |
0924e519 | 1203 | |
d7d5783c JB |
1204 | struct { |
1205 | u32 error_event_table; | |
1206 | u32 log_event_table; | |
1207 | } device_pointers; | |
5d08cd1d | 1208 | |
5d08cd1d | 1209 | u16 active_rate; |
5d08cd1d | 1210 | |
5d08cd1d | 1211 | u8 start_calib; |
f0832f13 EG |
1212 | struct iwl_sensitivity_data sensitivity_data; |
1213 | struct iwl_chain_noise_data chain_noise_data; | |
c8312fac | 1214 | bool enhance_sensitivity_table; |
5d08cd1d | 1215 | __le16 sensitivity_tbl[HD_TABLE_SIZE]; |
c8312fac | 1216 | __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES]; |
5d08cd1d | 1217 | |
fad95bf5 | 1218 | struct iwl_ht_config current_ht_config; |
5d08cd1d | 1219 | |
5d08cd1d | 1220 | /* Rate scaling data */ |
5d08cd1d CH |
1221 | u8 retry_rate; |
1222 | ||
1223 | wait_queue_head_t wait_command_queue; | |
1224 | ||
1225 | int activity_timer_active; | |
1226 | ||
5a878bf6 | 1227 | /* Tx DMA processing queues */ |
88804e2b | 1228 | struct iwl_tx_queue *txq; |
5d08cd1d | 1229 | unsigned long txq_ctx_active_msk; |
5d08cd1d | 1230 | |
19758bef | 1231 | /* counts mgmt, ctl, and data packets */ |
22fdf3c9 WYG |
1232 | struct traffic_stats tx_stats; |
1233 | struct traffic_stats rx_stats; | |
19758bef | 1234 | |
5da4b55f | 1235 | struct iwl_power_mgr power_data; |
3ad3b92a | 1236 | struct iwl_tt_mgmt thermal_throttle; |
5d08cd1d | 1237 | |
9c5ac091 | 1238 | /* station table variables */ |
5d08cd1d | 1239 | int num_stations; |
3240cab3 | 1240 | struct iwl_station_entry stations[IWLAGN_STATION_COUNT]; |
80fb47a1 | 1241 | unsigned long ucode_key_table; |
5d08cd1d | 1242 | |
e4e72fb4 JB |
1243 | /* queue refcounts */ |
1244 | #define IWL_MAX_HW_QUEUES 32 | |
1245 | unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; | |
1246 | /* for each AC */ | |
1247 | atomic_t queue_stop_count[4]; | |
1248 | ||
5d08cd1d | 1249 | /* Indication if ieee80211_ops->open has been called */ |
69dc5d9d | 1250 | u8 is_open; |
5d08cd1d CH |
1251 | |
1252 | u8 mac80211_registered; | |
5d08cd1d | 1253 | |
af6b8ee3 | 1254 | /* eeprom -- this is in the card's little endian byte order */ |
073d3f5f | 1255 | u8 *eeprom; |
0848e297 | 1256 | int nvm_device_type; |
073d3f5f | 1257 | struct iwl_eeprom_calib_info *calib_info; |
5d08cd1d | 1258 | |
05c914fe | 1259 | enum nl80211_iftype iw_mode; |
5d08cd1d | 1260 | |
5d08cd1d | 1261 | /* Last Rx'd beacon timestamp */ |
3109ece1 | 1262 | u64 timestamp; |
5d08cd1d | 1263 | |
0da0e5bf JB |
1264 | struct { |
1265 | __le32 flag; | |
1266 | struct statistics_general_common common; | |
1267 | struct statistics_rx_non_phy rx_non_phy; | |
1268 | struct statistics_rx_phy rx_ofdm; | |
1269 | struct statistics_rx_ht_phy rx_ofdm_ht; | |
1270 | struct statistics_rx_phy rx_cck; | |
1271 | struct statistics_tx tx; | |
1272 | #ifdef CONFIG_IWLWIFI_DEBUGFS | |
1273 | struct statistics_bt_activity bt_activity; | |
1274 | __le32 num_bt_kills, accum_num_bt_kills; | |
1275 | #endif | |
1276 | } statistics; | |
1277 | #ifdef CONFIG_IWLWIFI_DEBUGFS | |
1278 | struct { | |
1279 | struct statistics_general_common common; | |
1280 | struct statistics_rx_non_phy rx_non_phy; | |
1281 | struct statistics_rx_phy rx_ofdm; | |
1282 | struct statistics_rx_ht_phy rx_ofdm_ht; | |
1283 | struct statistics_rx_phy rx_cck; | |
1284 | struct statistics_tx tx; | |
1285 | struct statistics_bt_activity bt_activity; | |
1286 | } accum_stats, delta_stats, max_delta_stats; | |
1287 | #endif | |
1288 | ||
898ed67b WYG |
1289 | /* |
1290 | * reporting the number of tids has AGG on. 0 means | |
1291 | * no AGGREGATION | |
1292 | */ | |
1293 | u8 agg_tids_count; | |
1294 | ||
1295 | struct iwl_rx_phy_res last_phy_res; | |
1296 | bool last_phy_res_valid; | |
1297 | ||
1298 | struct completion firmware_loading_complete; | |
1299 | ||
1300 | u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; | |
1301 | u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; | |
1302 | ||
1303 | /* | |
1304 | * chain noise reset and gain commands are the | |
1305 | * two extra calibration commands follows the standard | |
1306 | * phy calibration commands | |
1307 | */ | |
1308 | u8 phy_calib_chain_noise_reset_cmd; | |
1309 | u8 phy_calib_chain_noise_gain_cmd; | |
1310 | ||
1311 | /* counts reply_tx error */ | |
1312 | struct reply_tx_error_statistics reply_tx_stats; | |
1313 | struct reply_agg_tx_error_statistics reply_agg_tx_stats; | |
1314 | /* notification wait support */ | |
1315 | struct list_head notif_waits; | |
1316 | spinlock_t notif_wait_lock; | |
1317 | wait_queue_head_t notif_waitq; | |
1318 | ||
1319 | /* remain-on-channel offload support */ | |
1320 | struct ieee80211_channel *hw_roc_channel; | |
c6baf7fb | 1321 | struct delayed_work hw_roc_disable_work; |
898ed67b WYG |
1322 | enum nl80211_channel_type hw_roc_chantype; |
1323 | int hw_roc_duration; | |
1324 | bool hw_roc_setup; | |
1325 | ||
22bf59a0 | 1326 | /* bt coex */ |
f21dd005 | 1327 | u8 bt_enable_flag; |
da5dbb97 | 1328 | u8 bt_status; |
66e863a5 | 1329 | u8 bt_traffic_load, last_bt_traffic_load; |
f37837c9 | 1330 | bool bt_ch_announce; |
bee008b7 WYG |
1331 | bool bt_full_concurrent; |
1332 | bool bt_ant_couple_ok; | |
fbba9410 WYG |
1333 | __le32 kill_ack_mask; |
1334 | __le32 kill_cts_mask; | |
1335 | __le16 bt_valid; | |
22bf59a0 WYG |
1336 | u16 bt_on_thresh; |
1337 | u16 bt_duration; | |
1338 | u16 dynamic_frag_thresh; | |
bee008b7 | 1339 | u8 bt_ci_compliance; |
9e4afc21 | 1340 | struct work_struct bt_traffic_change_work; |
207ecc5e MV |
1341 | bool bt_enable_pspoll; |
1342 | struct iwl_rxon_context *cur_rssi_ctx; | |
1343 | bool bt_is_sco; | |
9e4afc21 | 1344 | |
5d08cd1d | 1345 | struct work_struct restart; |
5d08cd1d | 1346 | struct work_struct scan_completed; |
5d08cd1d | 1347 | struct work_struct abort_scan; |
12e934dc | 1348 | |
5d08cd1d | 1349 | struct work_struct beacon_update; |
76d04815 | 1350 | struct iwl_rxon_context *beacon_ctx; |
12e934dc | 1351 | struct sk_buff *beacon_skb; |
4ce7cc2b | 1352 | void *beacon_cmd; |
76d04815 | 1353 | |
a28027cd WYG |
1354 | struct work_struct tt_work; |
1355 | struct work_struct ct_enter; | |
1356 | struct work_struct ct_exit; | |
88be0264 | 1357 | struct work_struct start_internal_scan; |
65550636 | 1358 | struct work_struct tx_flush; |
bee008b7 | 1359 | struct work_struct bt_full_concurrency; |
fbba9410 | 1360 | struct work_struct bt_runtime_config; |
5d08cd1d | 1361 | |
5d08cd1d | 1362 | struct delayed_work scan_check; |
4a8a4322 | 1363 | |
630fe9b6 TW |
1364 | /* TX Power */ |
1365 | s8 tx_power_user_lmt; | |
dc1b0973 | 1366 | s8 tx_power_device_lmt; |
ae16fc3c | 1367 | s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */ |
a25a66ac | 1368 | s8 tx_power_next; |
5d08cd1d | 1369 | |
712b6cf5 TW |
1370 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
1371 | /* debugfs */ | |
20594eb0 WYG |
1372 | u16 tx_traffic_idx; |
1373 | u16 rx_traffic_idx; | |
1374 | u8 *tx_traffic; | |
1375 | u8 *rx_traffic; | |
4c84a8f1 JB |
1376 | struct dentry *debugfs_dir; |
1377 | u32 dbgfs_sram_offset, dbgfs_sram_len; | |
d73e4923 | 1378 | bool disable_ht40; |
c8ac61cf | 1379 | void *wowlan_sram; |
712b6cf5 | 1380 | #endif /* CONFIG_IWLWIFI_DEBUGFS */ |
5d08cd1d CH |
1381 | |
1382 | struct work_struct txpower_work; | |
445c2dff TW |
1383 | u32 disable_sens_cal; |
1384 | u32 disable_chain_noise_cal; | |
16e727e8 | 1385 | struct work_struct run_time_calib_work; |
5d08cd1d | 1386 | struct timer_list statistics_periodic; |
a9e1cb6a | 1387 | struct timer_list ucode_trace; |
22de94de | 1388 | struct timer_list watchdog; |
a9e1cb6a WYG |
1389 | |
1390 | struct iwl_event_log event_log; | |
5ed540ae WYG |
1391 | |
1392 | struct led_classdev led; | |
1393 | unsigned long blink_on, blink_off; | |
1394 | bool led_registered; | |
7a4e5281 WYG |
1395 | #ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL |
1396 | struct iwl_testmode_trace testmode_trace; | |
4e308119 | 1397 | u32 tm_fixed_rate; |
c10e2c10 | 1398 | #endif |
6489854b | 1399 | |
c8ac61cf JB |
1400 | /* WoWLAN GTK rekey data */ |
1401 | u8 kck[NL80211_KCK_LEN], kek[NL80211_KEK_LEN]; | |
1402 | __le64 replay_ctr; | |
1403 | __le16 last_seq_ctl; | |
1404 | bool have_rekey_data; | |
c79dd5b5 | 1405 | }; /*iwl_priv */ |
5d08cd1d | 1406 | |
36470749 RR |
1407 | static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) |
1408 | { | |
1409 | set_bit(txq_id, &priv->txq_ctx_active_msk); | |
1410 | } | |
1411 | ||
1412 | static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) | |
1413 | { | |
1414 | clear_bit(txq_id, &priv->txq_ctx_active_msk); | |
1415 | } | |
1416 | ||
48f20d35 EG |
1417 | extern struct iwl_mod_params iwlagn_mod_params; |
1418 | ||
a332f8d6 TW |
1419 | static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, |
1420 | int txq_id, int idx) | |
1421 | { | |
ff0d91c3 | 1422 | if (priv->txq[txq_id].txb[idx].skb) |
a332f8d6 | 1423 | return (struct ieee80211_hdr *)priv->txq[txq_id]. |
ff0d91c3 | 1424 | txb[idx].skb->data; |
a332f8d6 TW |
1425 | return NULL; |
1426 | } | |
a332f8d6 | 1427 | |
246ed355 JB |
1428 | static inline struct iwl_rxon_context * |
1429 | iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif) | |
1430 | { | |
1431 | struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; | |
1432 | ||
1433 | return vif_priv->ctx; | |
1434 | } | |
1435 | ||
1436 | #define for_each_context(priv, ctx) \ | |
1437 | for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \ | |
1438 | ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \ | |
1439 | if (priv->valid_contexts & BIT(ctx->ctxid)) | |
1440 | ||
054ec924 | 1441 | static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx) |
246ed355 | 1442 | { |
054ec924 | 1443 | return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; |
246ed355 JB |
1444 | } |
1445 | ||
054ec924 JB |
1446 | static inline int iwl_is_associated(struct iwl_priv *priv, |
1447 | enum iwl_rxon_context_id ctxid) | |
246ed355 | 1448 | { |
054ec924 | 1449 | return iwl_is_associated_ctx(&priv->contexts[ctxid]); |
246ed355 | 1450 | } |
a332f8d6 | 1451 | |
054ec924 | 1452 | static inline int iwl_is_any_associated(struct iwl_priv *priv) |
5d08cd1d | 1453 | { |
054ec924 JB |
1454 | struct iwl_rxon_context *ctx; |
1455 | for_each_context(priv, ctx) | |
1456 | if (iwl_is_associated_ctx(ctx)) | |
1457 | return true; | |
1458 | return false; | |
5d08cd1d CH |
1459 | } |
1460 | ||
bf85ea4f | 1461 | static inline int is_channel_valid(const struct iwl_channel_info *ch_info) |
5d08cd1d CH |
1462 | { |
1463 | if (ch_info == NULL) | |
1464 | return 0; | |
1465 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; | |
1466 | } | |
1467 | ||
bf85ea4f | 1468 | static inline int is_channel_radar(const struct iwl_channel_info *ch_info) |
5d08cd1d CH |
1469 | { |
1470 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; | |
1471 | } | |
1472 | ||
bf85ea4f | 1473 | static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info) |
5d08cd1d | 1474 | { |
8318d78a | 1475 | return ch_info->band == IEEE80211_BAND_5GHZ; |
5d08cd1d CH |
1476 | } |
1477 | ||
bf85ea4f | 1478 | static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info) |
5d08cd1d | 1479 | { |
8318d78a | 1480 | return ch_info->band == IEEE80211_BAND_2GHZ; |
5d08cd1d CH |
1481 | } |
1482 | ||
bf85ea4f | 1483 | static inline int is_channel_passive(const struct iwl_channel_info *ch) |
5d08cd1d CH |
1484 | { |
1485 | return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; | |
1486 | } | |
1487 | ||
bf85ea4f | 1488 | static inline int is_channel_ibss(const struct iwl_channel_info *ch) |
5d08cd1d CH |
1489 | { |
1490 | return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; | |
1491 | } | |
1492 | ||
be1f3ab6 | 1493 | #endif /* __iwl_dev_h__ */ |