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rt2x00: Cleanup rt2x00mac_bss_info_changed()
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
759ef89f 22 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY		 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC		 29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG		 32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH		 35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
6bc913bd 39#include "iwl-eeprom.h"
6f83eaa1 40#include "iwl-csr.h"
5d08cd1d 41#include "iwl-prph.h"
dbb6654c 42#include "iwl-fh.h"
0a6857e7 43#include "iwl-debug.h"
dbb6654c
WT		 44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h"
46#include "iwl-3945-led.h"
ab53d8af 47#include "iwl-led.h"
5da4b55f 48#include "iwl-power.h"
e227ceac 49#include "iwl-agn-rs.h"
5d08cd1d 50
fed9017e
RR		 51/* configuration for the iwl4965 */
52extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW		 53extern struct iwl_cfg iwl5300_agn_cfg;
54extern struct iwl_cfg iwl5100_agn_cfg;
55extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK		 56extern struct iwl_cfg iwl5100_bg_cfg;
57extern struct iwl_cfg iwl5100_abg_cfg;
7100e924 58extern struct iwl_cfg iwl5150_agn_cfg;
65b7998a
WYG		 59extern struct iwl_cfg iwl6000h_2agn_cfg;
60extern struct iwl_cfg iwl6000i_2agn_cfg;
e1228374
JS		 61extern struct iwl_cfg iwl6000_3agn_cfg;
62extern struct iwl_cfg iwl6050_2agn_cfg;
63extern struct iwl_cfg iwl6050_3agn_cfg;
77dcb6a9 64extern struct iwl_cfg iwl1000_bgn_cfg;
fed9017e 65
672639de
WYG		 66struct iwl_tx_queue;
67
cec2d3f3
JS		 68/* shared structures from iwl-5000.c */
69extern struct iwl_mod_params iwl50_mod_params;
70extern struct iwl_ops iwl5000_ops;
cc0f555d 71extern struct iwl_ucode_ops iwl5000_ucode;
e8c00dcb
JS		 72extern struct iwl_lib_ops iwl5000_lib;
73extern struct iwl_hcmd_ops iwl5000_hcmd;
74extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils;
75
76/* shared functions from iwl-5000.c */
77extern u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len);
78extern u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd,
79 u8 *data);
80extern void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
81 __le32 *tx_flags);
82extern int iwl5000_calc_rssi(struct iwl_priv *priv,
83 struct iwl_rx_phy_res *rx_resp);
672639de
WYG		 84extern int iwl5000_apm_init(struct iwl_priv *priv);
85extern void iwl5000_apm_stop(struct iwl_priv *priv);
86extern int iwl5000_apm_reset(struct iwl_priv *priv);
87extern void iwl5000_nic_config(struct iwl_priv *priv);
88extern u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv);
89extern const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
90 size_t offset);
91extern void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
92 struct iwl_tx_queue *txq,
93 u16 byte_cnt);
94extern void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
95 struct iwl_tx_queue *txq);
96extern int iwl5000_load_ucode(struct iwl_priv *priv);
97extern void iwl5000_init_alive_start(struct iwl_priv *priv);
98extern int iwl5000_alive_notify(struct iwl_priv *priv);
99extern int iwl5000_hw_set_hw_params(struct iwl_priv *priv);
100extern int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
101 int tx_fifo, int sta_id, int tid, u16 ssn_idx);
102extern int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
103 u16 ssn_idx, u8 tx_fifo);
104extern void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask);
105extern void iwl5000_setup_deferred_work(struct iwl_priv *priv);
106extern void iwl5000_rx_handler_setup(struct iwl_priv *priv);
107extern int iwl5000_hw_valid_rtc_data_addr(u32 addr);
108extern int iwl5000_send_tx_power(struct iwl_priv *priv);
109extern void iwl5000_temperature(struct iwl_priv *priv);
cec2d3f3 110
099b40b7 111/* CT-KILL constants */
672639de
WYG		 112#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
113#define CT_KILL_THRESHOLD 114 /* in Celsius */
114#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */
4bf775cd 115
5d08cd1d
CH		 116/* Default noise level to report when noise measurement is not available.
117 * This may be because we're:
118 * 1) Not associated (4965, no beacon statistics being sent to driver)
119 * 2) Scanning (noise measurement does not apply to associated channel)
120 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
121 * Use default noise value of -127 ... this is below the range of measurable
122 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
123 * Also, -127 works better than 0 when averaging frames with/without
124 * noise info (e.g. averaging might be done in app); measured dBm values are
125 * always negative ... using a negative value as the default keeps all
126 * averages within an s8's (used in some apps) range of negative values. */
127#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
128
5d08cd1d
CH		 129/*
130 * RTS threshold here is total size [2347] minus 4 FCS bytes
131 * Per spec:
132 * a value of 0 means RTS on all data/management packets
133 * a value > max MSDU size means no RTS
134 * else RTS for data/management frames where MPDU is larger
135 * than RTS value.
136 */
137#define DEFAULT_RTS_THRESHOLD 2347U
138#define MIN_RTS_THRESHOLD 0U
139#define MAX_RTS_THRESHOLD 2347U
140#define MAX_MSDU_SIZE 2304U
141#define MAX_MPDU_SIZE 2346U
142#define DEFAULT_BEACON_INTERVAL 100U
143#define DEFAULT_SHORT_RETRY_LIMIT 7U
144#define DEFAULT_LONG_RETRY_LIMIT 4U
145
a55360e4 146struct iwl_rx_mem_buffer {
4018517a
JB		 147 dma_addr_t real_dma_addr;
148 dma_addr_t aligned_dma_addr;
5d08cd1d
CH		 149 struct sk_buff *skb;
150 struct list_head list;
151};
152
c2acea8e
JB		 153/* defined below */
154struct iwl_device_cmd;
155
156struct iwl_cmd_meta {
157 /* only for SYNC commands, iff the reply skb is wanted */
158 struct iwl_host_cmd *source;
159 /*
160 * only for ASYNC commands
161 * (which is somewhat stupid -- look at iwl-sta.c for instance
162 * which duplicates a bunch of code because the callback isn't
163 * invoked for SYNC commands, if it were and its result passed
164 * through it would be simpler...)
165 */
5696aea6
JB		 166 void (*callback)(struct iwl_priv *priv,
167 struct iwl_device_cmd *cmd,
168 struct sk_buff *skb);
c2acea8e
JB		 169
170 /* The CMD_SIZE_HUGE flag bit indicates that the command
171 * structure is stored at the end of the shared queue memory. */
172 u32 flags;
173
174 DECLARE_PCI_UNMAP_ADDR(mapping)
175 DECLARE_PCI_UNMAP_LEN(len)
176};
177
5d08cd1d
CH		 178/*
179 * Generic queue structure
180 *
181 * Contains common data for Rx and Tx queues
182 */
443cfd45 183struct iwl_queue {
5d08cd1d
CH		 184 int n_bd; /* number of BDs in this queue */
185 int write_ptr; /* 1-st empty entry (index) host_w*/
186 int read_ptr; /* last used entry (index) host_r*/
187 dma_addr_t dma_addr; /* physical addr for BD's */
188 int n_window; /* safe queue window */
189 u32 id;
190 int low_mark; /* low watermark, resume queue if free
191 * space more than this */
192 int high_mark; /* high watermark, stop queue if free
193 * space less than this */
194} __attribute__ ((packed));
195
bc47279f 196/* One for each TFD */
8567c63e 197struct iwl_tx_info {
499b1883 198 struct sk_buff *skb[IWL_NUM_OF_TBS - 1];
5d08cd1d
CH		 199};
200
201/**
16466903 202 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC		 203 * @q: generic Rx/Tx queue descriptor
204 * @bd: base of circular buffer of TFDs
c2acea8e
JB		 205 * @cmd: array of command/TX buffer pointers
206 * @meta: array of meta data for each command/tx buffer
bc47279f
BC		 207 * @dma_addr_cmd: physical address of cmd/tx buffer array
208 * @txb: array of per-TFD driver data
209 * @need_update: indicates need to update read/write index
210 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 211 *
bc47279f
BC		 212 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
213 * descriptors) and required locking structures.
5d08cd1d 214 */
188cf6c7
SO		 215#define TFD_TX_CMD_SLOTS 256
216#define TFD_CMD_SLOTS 32
217
16466903 218struct iwl_tx_queue {
443cfd45 219 struct iwl_queue q;
59606ffa 220 void *tfds;
c2acea8e
JB		 221 struct iwl_device_cmd **cmd;
222 struct iwl_cmd_meta *meta;
8567c63e 223 struct iwl_tx_info *txb;
3fd07a1e
TW		 224 u8 need_update;
225 u8 sched_retry;
226 u8 active;
227 u8 swq_id;
5d08cd1d
CH		 228};
229
230#define IWL_NUM_SCAN_RATES (2)
231
bb8c093b 232struct iwl4965_channel_tgd_info {
5d08cd1d
CH		 233 u8 type;
234 s8 max_power;
235};
236
bb8c093b 237struct iwl4965_channel_tgh_info {
5d08cd1d
CH		 238 s64 last_radar_time;
239};
240
d20b3c65
SO		 241#define IWL4965_MAX_RATE (33)
242
85d41495
KA		 243struct iwl3945_clip_group {
244 /* maximum power level to prevent clipping for each rate, derived by
245 * us from this band's saturation power in EEPROM */
246 const s8 clip_powers[IWL_MAX_RATES];
247};
248
d20b3c65
SO		 249/* current Tx power values to use, one for each rate for each channel.
250 * requested power is limited by:
251 * -- regulatory EEPROM limits for this channel
252 * -- hardware capabilities (clip-powers)
253 * -- spectrum management
254 * -- user preference (e.g. iwconfig)
255 * when requested power is set, base power index must also be set. */
256struct iwl3945_channel_power_info {
257 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
258 s8 power_table_index; /* actual (compenst'd) index into gain table */
259 s8 base_power_index; /* gain index for power at factory temp. */
260 s8 requested_power; /* power (dBm) requested for this chnl/rate */
261};
262
263/* current scan Tx power values to use, one for each scan rate for each
264 * channel. */
265struct iwl3945_scan_power_info {
266 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
267 s8 power_table_index; /* actual (compenst'd) index into gain table */
268 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
269};
270
5d08cd1d
CH		 271/*
272 * One for each channel, holds all channel setup data
273 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
274 * with one another!
275 */
bf85ea4f 276struct iwl_channel_info {
bb8c093b
CH		 277 struct iwl4965_channel_tgd_info tgd;
278 struct iwl4965_channel_tgh_info tgh;
073d3f5f 279 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
7aafef1c
WYG		 280 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
281 * HT40 channel */
5d08cd1d
CH		 282
283 u8 channel; /* channel number */
284 u8 flags; /* flags copied from EEPROM */
285 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 286 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH		 287 s8 min_power; /* always 0 */
288 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
289
290 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
291 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 292 enum ieee80211_band band;
5d08cd1d 293
7aafef1c
WYG		 294 /* HT40 channel info */
295 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
296 s8 ht40_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
297 s8 ht40_min_power; /* always 0 */
298 s8 ht40_scan_power; /* (dBm) eeprom, direct scans, any rate */
299 u8 ht40_flags; /* flags copied from EEPROM */
300 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
d20b3c65
SO		 301
302 /* Radio/DSP gain settings for each "normal" data Tx rate.
303 * These include, in addition to RF and DSP gain, a few fields for
304 * remembering/modifying gain settings (indexes). */
305 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
306
307 /* Radio/DSP gain settings for each scan rate, for directed scans. */
308 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
5d08cd1d
CH		 309};
310
5d08cd1d
CH		 311#define IWL_TX_FIFO_AC0 0
312#define IWL_TX_FIFO_AC1 1
313#define IWL_TX_FIFO_AC2 2
314#define IWL_TX_FIFO_AC3 3
315#define IWL_TX_FIFO_HCCA_1 5
316#define IWL_TX_FIFO_HCCA_2 6
317#define IWL_TX_FIFO_NONE 7
318
01a7e084
RC		 319/* Minimum number of queues. MAX_NUM is defined in hw specific files.
320 * Set the minimum to accommodate the 4 standard TX queues, 1 command
321 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
322#define IWL_MIN_NUM_QUEUES 10
5d08cd1d
CH		 323
324/* Power management (not Tx power) structures */
325
6f4083aa
TW		 326enum iwl_pwr_src {
327 IWL_PWR_SRC_VMAIN,
328 IWL_PWR_SRC_VAUX,
329};
330
5d08cd1d
CH		 331#define IEEE80211_DATA_LEN 2304
332#define IEEE80211_4ADDR_LEN 30
333#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
334#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
335
fcab423d 336struct iwl_frame {
5d08cd1d
CH		 337 union {
338 struct ieee80211_hdr frame;
4bf64efd 339 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH		 340 u8 raw[IEEE80211_FRAME_LEN];
341 u8 cmd[360];
342 } u;
343 struct list_head list;
344};
345
5d08cd1d
CH		 346#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
347#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
348#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
349
350enum {
c587de0b
TW		 351 CMD_SYNC = 0,
352 CMD_SIZE_NORMAL = 0,
353 CMD_NO_SKB = 0,
5d08cd1d 354 CMD_SIZE_HUGE = (1 << 0),
5d08cd1d 355 CMD_ASYNC = (1 << 1),
5d08cd1d
CH		 356 CMD_WANT_SKB = (1 << 2),
357};
358
d2f18bfd 359#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 360
bc47279f 361/**
c2acea8e 362 * struct iwl_device_cmd
bc47279f
BC		 363 *
364 * For allocation of the command and tx queues, this establishes the overall
365 * size of the largest command we send to uCode, except for a scan command
366 * (which is relatively huge; space is allocated separately).
367 */
c2acea8e 368struct iwl_device_cmd {
857485c0 369 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 370 union {
5d08cd1d
CH		 371 u32 flags;
372 u8 val8;
373 u16 val16;
374 u32 val32;
83d527d9 375 struct iwl_tx_cmd tx;
bd68fb6f 376 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH		 377 } __attribute__ ((packed)) cmd;
378} __attribute__ ((packed));
379
c2acea8e
JB		 380#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
381
3257e5d4 382
857485c0 383struct iwl_host_cmd {
5d08cd1d 384 const void *data;
c2acea8e 385 struct sk_buff *reply_skb;
5696aea6
JB		 386 void (*callback)(struct iwl_priv *priv,
387 struct iwl_device_cmd *cmd,
388 struct sk_buff *skb);
c2acea8e
JB		 389 u32 flags;
390 u16 len;
391 u8 id;
5d08cd1d
CH		 392};
393
5d08cd1d
CH		 394/*
395 * RX related structures and functions
396 */
397#define RX_FREE_BUFFERS 64
398#define RX_LOW_WATERMARK 8
399
400#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
401#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
402#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
403
404/**
a55360e4 405 * struct iwl_rx_queue - Rx queue
df833b1d
RC		 406 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
407 * @dma_addr: bus address of buffer of receive buffer descriptors (rbd)
5d08cd1d
CH		 408 * @read: Shared index to newest available Rx buffer
409 * @write: Shared index to oldest written Rx packet
410 * @free_count: Number of pre-allocated buffers in rx_free
411 * @rx_free: list of free SKBs for use
412 * @rx_used: List of Rx buffers with no SKB
413 * @need_update: flag to indicate we need to update read/write index
df833b1d
RC		 414 * @rb_stts: driver's pointer to receive buffer status
415 * @rb_stts_dma: bus address of receive buffer status
5d08cd1d 416 *
a55360e4 417 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 418 */
a55360e4 419struct iwl_rx_queue {
5d08cd1d
CH		 420 __le32 *bd;
421 dma_addr_t dma_addr;
a55360e4
TW		 422 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
423 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH		 424 u32 read;
425 u32 write;
426 u32 free_count;
4752c93c 427 u32 write_actual;
5d08cd1d
CH		 428 struct list_head rx_free;
429 struct list_head rx_used;
430 int need_update;
8d86422a
WT		 431 struct iwl_rb_status *rb_stts;
432 dma_addr_t rb_stts_dma;
5d08cd1d
CH		 433 spinlock_t lock;
434};
435
436#define IWL_SUPPORTED_RATES_IE_LEN 8
437
5d08cd1d
CH		 438#define MAX_TID_COUNT 9
439
440#define IWL_INVALID_RATE 0xFF
441#define IWL_INVALID_VALUE -1
442
bc47279f 443/**
6def9761 444 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC		 445 * @txq_id: Tx queue used for Tx attempt
446 * @frame_count: # frames attempted by Tx command
447 * @wait_for_ba: Expect block-ack before next Tx reply
448 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
449 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
450 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
451 * @rate_n_flags: Rate at which Tx was attempted
452 *
453 * If REPLY_TX indicates that aggregation was attempted, driver must wait
454 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
455 * until block ack arrives.
456 */
6def9761 457struct iwl_ht_agg {
5d08cd1d
CH		 458 u16 txq_id;
459 u16 frame_count;
460 u16 wait_for_ba;
461 u16 start_idx;
fe01b477 462 u64 bitmap;
5d08cd1d 463 u32 rate_n_flags;
fe01b477
RR		 464#define IWL_AGG_OFF 0
465#define IWL_AGG_ON 1
466#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
467#define IWL_EMPTYING_HW_QUEUE_DELBA 3
468 u8 state;
5d08cd1d 469};
fe01b477 470
5d08cd1d 471
6def9761 472struct iwl_tid_data {
5d08cd1d 473 u16 seq_number;
fe01b477 474 u16 tfds_in_queue;
6def9761 475 struct iwl_ht_agg agg;
5d08cd1d
CH		 476};
477
6def9761 478struct iwl_hw_key {
5d08cd1d
CH		 479 enum ieee80211_key_alg alg;
480 int keylen;
0211ddda 481 u8 keyidx;
5d08cd1d
CH		 482 u8 key[32];
483};
484
a78fe754 485union iwl_ht_rate_supp {
5d08cd1d
CH		 486 u16 rates;
487 struct {
488 u8 siso_rate;
489 u8 mimo_rate;
490 };
491};
492
5d08cd1d 493#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
bcc693a1
WYG		 494
495/*
496 * Maximal MPDU density for TX aggregation
497 * 4 - 2us density
498 * 5 - 4us density
499 * 6 - 8us density
500 * 7 - 16us density
501 */
502#define CFG_HT_MPDU_DENSITY_4USEC (0x5)
503#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
5d08cd1d 504
9e0cc6de
RR		 505struct iwl_ht_info {
506 /* self configuration data */
5d08cd1d 507 u8 is_ht;
9e0cc6de 508 u8 supported_chan_width;
12837be1 509 u8 sm_ps;
d9fe60de 510 struct ieee80211_mcs_info mcs;
9e0cc6de 511 /* BSS related data */
5d08cd1d 512 u8 extension_chan_offset;
9e0cc6de
RR		 513 u8 ht_protection;
514 u8 non_GF_STA_present;
5d08cd1d 515};
5d08cd1d 516
1ff50bda 517union iwl_qos_capabity {
5d08cd1d
CH		 518 struct {
519 u8 edca_count:4; /* bit 0-3 */
520 u8 q_ack:1; /* bit 4 */
521 u8 queue_request:1; /* bit 5 */
522 u8 txop_request:1; /* bit 6 */
523 u8 reserved:1; /* bit 7 */
524 } q_AP;
525 struct {
526 u8 acvo_APSD:1; /* bit 0 */
527 u8 acvi_APSD:1; /* bit 1 */
528 u8 ac_bk_APSD:1; /* bit 2 */
529 u8 ac_be_APSD:1; /* bit 3 */
530 u8 q_ack:1; /* bit 4 */
531 u8 max_len:2; /* bit 5-6 */
532 u8 more_data_ack:1; /* bit 7 */
533 } q_STA;
534 u8 val;
535};
536
537/* QoS structures */
1ff50bda 538struct iwl_qos_info {
5d08cd1d 539 int qos_active;
1ff50bda
EG		 540 union iwl_qos_capabity qos_cap;
541 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 542};
5d08cd1d
CH		 543
544#define STA_PS_STATUS_WAKE 0
545#define STA_PS_STATUS_SLEEP 1
546
85d41495
KA		 547
548struct iwl3945_station_entry {
549 struct iwl3945_addsta_cmd sta;
c15ff610 550 struct iwl_tid_data tid[MAX_TID_COUNT];
85d41495
KA		 551 u8 used;
552 u8 ps_status;
bed420d9 553 struct iwl_hw_key keyinfo;
85d41495
KA		 554};
555
6def9761 556struct iwl_station_entry {
133636de 557 struct iwl_addsta_cmd sta;
6def9761 558 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH		 559 u8 used;
560 u8 ps_status;
6def9761 561 struct iwl_hw_key keyinfo;
5d08cd1d
CH		 562};
563
564/* one for each uCode image (inst/data, boot/init/runtime) */
565struct fw_desc {
566 void *v_addr; /* access by driver */
567 dma_addr_t p_addr; /* access by card's busmaster DMA */
568 u32 len; /* bytes */
569};
570
571/* uCode file layout */
cc0f555d
JS		 572struct iwl_ucode_header {
573 __le32 ver; /* major/minor/API/serial */
574 union {
575 struct {
576 __le32 inst_size; /* bytes of runtime code */
577 __le32 data_size; /* bytes of runtime data */
578 __le32 init_size; /* bytes of init code */
579 __le32 init_data_size; /* bytes of init data */
580 __le32 boot_size; /* bytes of bootstrap code */
581 u8 data[0]; /* in same order as sizes */
582 } v1;
583 struct {
584 __le32 build; /* build number */
585 __le32 inst_size; /* bytes of runtime code */
586 __le32 data_size; /* bytes of runtime data */
587 __le32 init_size; /* bytes of init code */
588 __le32 init_data_size; /* bytes of init data */
589 __le32 boot_size; /* bytes of bootstrap code */
590 u8 data[0]; /* in same order as sizes */
591 } v2;
592 } u;
5d08cd1d 593};
cc0f555d 594#define UCODE_HEADER_SIZE(ver) ((ver) == 1 ? 24 : 28)
5d08cd1d 595
bb8c093b 596struct iwl4965_ibss_seq {
5d08cd1d
CH		 597 u8 mac[ETH_ALEN];
598 u16 seq_num;
599 u16 frag_num;
600 unsigned long packet_time;
601 struct list_head list;
602};
603
f0832f13
EG		 604struct iwl_sensitivity_ranges {
605 u16 min_nrg_cck;
606 u16 max_nrg_cck;
607
608 u16 nrg_th_cck;
609 u16 nrg_th_ofdm;
610
611 u16 auto_corr_min_ofdm;
612 u16 auto_corr_min_ofdm_mrc;
613 u16 auto_corr_min_ofdm_x1;
614 u16 auto_corr_min_ofdm_mrc_x1;
615
616 u16 auto_corr_max_ofdm;
617 u16 auto_corr_max_ofdm_mrc;
618 u16 auto_corr_max_ofdm_x1;
619 u16 auto_corr_max_ofdm_mrc_x1;
620
621 u16 auto_corr_max_cck;
622 u16 auto_corr_max_cck_mrc;
623 u16 auto_corr_min_cck;
624 u16 auto_corr_min_cck_mrc;
625};
626
099b40b7 627
b5047f78
TW		 628#define KELVIN_TO_CELSIUS(x) ((x)-273)
629#define CELSIUS_TO_KELVIN(x) ((x)+273)
630
631
bc47279f 632/**
5425e490 633 * struct iwl_hw_params
bc47279f 634 * @max_txq_num: Max # Tx queues supported
f3f911d1 635 * @dma_chnl_num: Number of Tx DMA/FIFO channels
4ddbb7d0 636 * @scd_bc_tbls_size: size of scheduler byte count tables
a8e74e27 637 * @tfd_size: TFD size
099b40b7
RR		 638 * @tx/rx_chains_num: Number of TX/RX chains
639 * @valid_tx/rx_ant: usable antennas
bc47279f 640 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 641 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 642 * @rx_buf_size: Rx buffer size
141c43a3 643 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
bc47279f
BC		 644 * @max_stations:
645 * @bcast_sta_id:
7aafef1c 646 * @ht40_channel: is 40MHz width possible in band 2.4
099b40b7
RR		 647 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
648 * @sw_crypto: 0 for hw, 1 for sw
649 * @max_xxx_size: for ucode uses
650 * @ct_kill_threshold: temperature threshold
a96a27f9 651 * @calib_init_cfg: setup initial calibrations for the hw
f0832f13 652 * @struct iwl_sensitivity_ranges: range of sensitivity values
bc47279f 653 */
5425e490 654struct iwl_hw_params {
f3f911d1
ZY		 655 u8 max_txq_num;
656 u8 dma_chnl_num;
4ddbb7d0 657 u16 scd_bc_tbls_size;
a8e74e27 658 u32 tfd_size;
ec35cf2a
TW		 659 u8 tx_chains_num;
660 u8 rx_chains_num;
661 u8 valid_tx_ant;
662 u8 valid_rx_ant;
5d08cd1d 663 u16 max_rxq_size;
ec35cf2a 664 u16 max_rxq_log;
9ee1ba47 665 u32 rx_buf_size;
141c43a3 666 u32 rx_wrt_ptr_reg;
9ee1ba47 667 u32 max_pkt_size;
5d08cd1d
CH		 668 u8 max_stations;
669 u8 bcast_sta_id;
7aafef1c 670 u8 ht40_channel;
2c2f3b33 671 u8 max_beacon_itrvl; /* in 1024 ms */
099b40b7
RR		 672 u32 max_inst_size;
673 u32 max_data_size;
674 u32 max_bsm_size;
675 u32 ct_kill_threshold; /* value in hw-dependent units */
672639de
WYG		 676 u32 ct_kill_exit_threshold; /* value in hw-dependent units */
677 /* for 1000, 6000 series and up */
be5d56ed 678 u32 calib_init_cfg;
f0832f13 679 const struct iwl_sensitivity_ranges *sens;
5d08cd1d
CH		 680};
681
5d08cd1d 682
5d08cd1d
CH		 683/******************************************************************************
684 *
a33c2f47
EG		 685 * Functions implemented in core module which are forward declared here
686 * for use by iwl-[4-5].c
5d08cd1d 687 *
a33c2f47
EG		 688 * NOTE: The implementation of these functions are not hardware specific
689 * which is why they are in the core module files.
5d08cd1d
CH		 690 *
691 * Naming convention --
a33c2f47 692 * iwl_ <-- Is part of iwlwifi
5d08cd1d 693 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH		 694 * iwl4965_bg_ <-- Called from work queue context
695 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH		 696 *
697 ****************************************************************************/
5b9f8cd3
EG		 698extern void iwl_update_chain_flags(struct iwl_priv *priv);
699extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
a33c2f47 700extern const u8 iwl_bcast_addr[ETH_ALEN];
b3bbacb7 701extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 702extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
443cfd45 703extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW		 704static inline int iwl_queue_used(const struct iwl_queue *q, int i)
705{
706 return q->write_ptr > q->read_ptr ?
707 (i >= q->read_ptr && i < q->write_ptr) :
708 !(i < q->read_ptr && i >= q->write_ptr);
709}
710
711
712static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
713{
714 /* This is for scan command, the big buffer at end of command array */
715 if (is_huge)
716 return q->n_window; /* must be power of 2 */
717
718 /* Otherwise, use normal size buffers */
719 return index & (q->n_window - 1);
720}
721
722
4ddbb7d0
TW		 723struct iwl_dma_ptr {
724 dma_addr_t dma;
725 void *addr;
b481de9c
ZY		 726 size_t size;
727};
728
b481de9c
ZY		 729#define IWL_CHANNEL_WIDTH_20MHZ 0
730#define IWL_CHANNEL_WIDTH_40MHZ 1
731
b481de9c
ZY		 732#define IWL_OPERATION_MODE_AUTO 0
733#define IWL_OPERATION_MODE_HT_ONLY 1
734#define IWL_OPERATION_MODE_MIXED 2
735#define IWL_OPERATION_MODE_20MHZ 3
736
3195cdb7
TW		 737#define IWL_TX_CRC_SIZE 4
738#define IWL_TX_DELIMITER_SIZE 4
b481de9c 739
b481de9c 740#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 741
b481de9c 742/* Sensitivity and chain noise calibration */
b481de9c
ZY		 743#define INITIALIZATION_VALUE 0xFFFF
744#define CAL_NUM_OF_BEACONS 20
745#define MAXIMUM_ALLOWED_PATHLOSS 15
746
b481de9c
ZY		 747#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
748
749#define MAX_FA_OFDM 50
750#define MIN_FA_OFDM 5
751#define MAX_FA_CCK 50
752#define MIN_FA_CCK 5
753
b481de9c
ZY		 754#define AUTO_CORR_STEP_OFDM 1
755
b481de9c
ZY		 756#define AUTO_CORR_STEP_CCK 3
757#define AUTO_CORR_MAX_TH_CCK 160
758
b481de9c
ZY		 759#define NRG_DIFF 2
760#define NRG_STEP_CCK 2
761#define NRG_MARGIN 8
762#define MAX_NUMBER_CCK_NO_FA 100
763
764#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
765
766#define CHAIN_A 0
767#define CHAIN_B 1
768#define CHAIN_C 2
769#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
770#define ALL_BAND_FILTER 0xFF00
771#define IN_BAND_FILTER 0xFF
772#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
773
3195cdb7
TW		 774#define NRG_NUM_PREV_STAT_L 20
775#define NUM_RX_CHAINS 3
776
bb8c093b 777enum iwl4965_false_alarm_state {
b481de9c
ZY		 778 IWL_FA_TOO_MANY = 0,
779 IWL_FA_TOO_FEW = 1,
780 IWL_FA_GOOD_RANGE = 2,
781};
782
bb8c093b 783enum iwl4965_chain_noise_state {
b481de9c 784 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
04816448
GE		 785 IWL_CHAIN_NOISE_ACCUMULATE,
786 IWL_CHAIN_NOISE_CALIBRATED,
787 IWL_CHAIN_NOISE_DONE,
b481de9c
ZY		 788};
789
bb8c093b 790enum iwl4965_calib_enabled_state {
b481de9c
ZY		 791 IWL_CALIB_DISABLED = 0, /* must be 0 */
792 IWL_CALIB_ENABLED = 1,
793};
794
f69f42a6
TW		 795
796/*
797 * enum iwl_calib
798 * defines the order in which results of initial calibrations
799 * should be sent to the runtime uCode
800 */
801enum iwl_calib {
802 IWL_CALIB_XTAL,
819500c5 803 IWL_CALIB_DC,
f69f42a6
TW		 804 IWL_CALIB_LO,
805 IWL_CALIB_TX_IQ,
806 IWL_CALIB_TX_IQ_PERD,
201706ac 807 IWL_CALIB_BASE_BAND,
f69f42a6
TW		 808 IWL_CALIB_MAX
809};
810
6e21f2c1
TW		 811/* Opaque calibration results */
812struct iwl_calib_result {
813 void *buf;
814 size_t buf_len;
7c616cba
TW		 815};
816
dbb983b7
RR		 817enum ucode_type {
818 UCODE_NONE = 0,
819 UCODE_INIT,
820 UCODE_RT
821};
822
b481de9c 823/* Sensitivity calib data */
f0832f13 824struct iwl_sensitivity_data {
b481de9c
ZY		 825 u32 auto_corr_ofdm;
826 u32 auto_corr_ofdm_mrc;
827 u32 auto_corr_ofdm_x1;
828 u32 auto_corr_ofdm_mrc_x1;
829 u32 auto_corr_cck;
830 u32 auto_corr_cck_mrc;
831
832 u32 last_bad_plcp_cnt_ofdm;
833 u32 last_fa_cnt_ofdm;
834 u32 last_bad_plcp_cnt_cck;
835 u32 last_fa_cnt_cck;
836
837 u32 nrg_curr_state;
838 u32 nrg_prev_state;
839 u32 nrg_value[10];
840 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
841 u32 nrg_silence_ref;
842 u32 nrg_energy_idx;
843 u32 nrg_silence_idx;
844 u32 nrg_th_cck;
845 s32 nrg_auto_corr_silence_diff;
846 u32 num_in_cck_no_fa;
847 u32 nrg_th_ofdm;
b481de9c
ZY		 848};
849
850/* Chain noise (differential Rx gain) calib data */
f0832f13 851struct iwl_chain_noise_data {
04816448 852 u32 active_chains;
b481de9c
ZY		 853 u32 chain_noise_a;
854 u32 chain_noise_b;
855 u32 chain_noise_c;
856 u32 chain_signal_a;
857 u32 chain_signal_b;
858 u32 chain_signal_c;
04816448 859 u16 beacon_count;
b481de9c
ZY		 860 u8 disconn_array[NUM_RX_CHAINS];
861 u8 delta_gain_code[NUM_RX_CHAINS];
862 u8 radio_write;
04816448 863 u8 state;
b481de9c
ZY		 864};
865
abceddb4
BC		 866#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
867#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 868
20594eb0
WYG		 869#define IWL_TRAFFIC_ENTRIES (256)
870#define IWL_TRAFFIC_ENTRY_SIZE (64)
5d08cd1d 871
5d08cd1d
CH		 872enum {
873 MEASUREMENT_READY = (1 << 0),
874 MEASUREMENT_ACTIVE = (1 << 1),
875};
876
0848e297
WYG		 877enum iwl_nvm_type {
878 NVM_DEVICE_TYPE_EEPROM = 0,
879 NVM_DEVICE_TYPE_OTP,
880};
881
415e4993
WYG		 882/*
883 * Two types of OTP memory access modes
884 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
885 * based on physical memory addressing
886 * IWL_OTP_ACCESS_RELATIVE - relative address mode,
887 * based on logical memory addressing
888 */
889enum iwl_access_mode {
890 IWL_OTP_ACCESS_ABSOLUTE,
891 IWL_OTP_ACCESS_RELATIVE,
892};
65b7998a
WYG		 893
894/**
895 * enum iwl_pa_type - Power Amplifier type
896 * @IWL_PA_SYSTEM: based on uCode configuration
897 * @IWL_PA_HYBRID: use both Internal and external PA
898 * @IWL_PA_INTERNAL: use Internal only
899 */
900enum iwl_pa_type {
901 IWL_PA_SYSTEM = 0,
902 IWL_PA_HYBRID = 1,
903 IWL_PA_INTERNAL = 2,
904};
905
a83b9141
WYG		 906/* interrupt statistics */
907struct isr_statistics {
908 u32 hw;
909 u32 sw;
910 u32 sw_err;
911 u32 sch;
912 u32 alive;
913 u32 rfkill;
914 u32 ctkill;
915 u32 wakeup;
916 u32 rx;
917 u32 rx_handlers[REPLY_MAX];
918 u32 tx;
919 u32 unhandled;
920};
5d08cd1d 921
22fdf3c9
WYG		 922#ifdef CONFIG_IWLWIFI_DEBUGFS
923/* management statistics */
924enum iwl_mgmt_stats {
925 MANAGEMENT_ASSOC_REQ = 0,
926 MANAGEMENT_ASSOC_RESP,
927 MANAGEMENT_REASSOC_REQ,
928 MANAGEMENT_REASSOC_RESP,
929 MANAGEMENT_PROBE_REQ,
930 MANAGEMENT_PROBE_RESP,
931 MANAGEMENT_BEACON,
932 MANAGEMENT_ATIM,
933 MANAGEMENT_DISASSOC,
934 MANAGEMENT_AUTH,
935 MANAGEMENT_DEAUTH,
936 MANAGEMENT_ACTION,
937 MANAGEMENT_MAX,
938};
939/* control statistics */
940enum iwl_ctrl_stats {
941 CONTROL_BACK_REQ = 0,
942 CONTROL_BACK,
943 CONTROL_PSPOLL,
944 CONTROL_RTS,
945 CONTROL_CTS,
946 CONTROL_ACK,
947 CONTROL_CFEND,
948 CONTROL_CFENDACK,
949 CONTROL_MAX,
950};
951
952struct traffic_stats {
953 u32 mgmt[MANAGEMENT_MAX];
954 u32 ctrl[CONTROL_MAX];
955 u32 data_cnt;
956 u64 data_bytes;
957};
958#else
959struct traffic_stats {
960 u64 data_bytes;
961};
962#endif
963
dfe7d458
RR		 964#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
965
c79dd5b5 966struct iwl_priv {
5d08cd1d
CH		 967
968 /* ieee device used by generic ieee processing code */
969 struct ieee80211_hw *hw;
970 struct ieee80211_channel *ieee_channels;
971 struct ieee80211_rate *ieee_rates;
82b9a121 972 struct iwl_cfg *cfg;
5d08cd1d
CH		 973
974 /* temporary frame storage list */
975 struct list_head free_frames;
976 int frames_count;
977
8318d78a 978 enum ieee80211_band band;
5d08cd1d
CH		 979 int alloc_rxb_skb;
980
c79dd5b5 981 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 982 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 983
8318d78a 984 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 985
80bc5393 986#if defined(CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT) || defined(CONFIG_IWL3945_SPECTRUM_MEASUREMENT)
5d08cd1d 987 /* spectrum measurement report caching */
2aa6ab86 988 struct iwl_spectrum_notification measure_report;
5d08cd1d
CH		 989 u8 measurement_status;
990#endif
991 /* ucode beacon time */
992 u32 ucode_beacon_time;
993
bb8c093b 994 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 995 * Access via channel # using indirect index array */
bf85ea4f 996 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH		 997 u8 channel_count; /* # of channels */
998
85d41495
KA		 999 /* each calibration channel group in the EEPROM has a derived
1000 * clip setting for each rate. 3945 only.*/
1001 const struct iwl3945_clip_group clip39_groups[5];
1002
5d08cd1d
CH		 1003 /* thermal calibration */
1004 s32 temperature; /* degrees Kelvin */
1005 s32 last_temperature;
1006
7c616cba 1007 /* init calibration results */
6e21f2c1 1008 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
7c616cba 1009
5d08cd1d
CH		 1010 /* Scan related variables */
1011 unsigned long last_scan_jiffies;
7878a5a4 1012 unsigned long next_scan_jiffies;
5d08cd1d
CH		 1013 unsigned long scan_start;
1014 unsigned long scan_pass_start;
1015 unsigned long scan_start_tsf;
805cee5b 1016 void *scan;
5d08cd1d 1017 int scan_bands;
1ecf9fc1 1018 struct cfg80211_scan_request *scan_request;
76eff18b
TW		 1019 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1020 u8 mgmt_tx_ant;
5d08cd1d
CH		 1021
1022 /* spinlock */
1023 spinlock_t lock; /* protect general shared data */
1024 spinlock_t hcmd_lock; /* protect hcmd */
a8b50a0a 1025 spinlock_t reg_lock; /* protect hw register access */
5d08cd1d
CH		 1026 struct mutex mutex;
1027
1028 /* basic pci-network driver stuff */
1029 struct pci_dev *pci_dev;
1030
1031 /* pci hardware address support */
1032 void __iomem *hw_base;
b661c819
TW		 1033 u32 hw_rev;
1034 u32 hw_wa_rev;
1035 u8 rev_id;
5d08cd1d
CH		 1036
1037 /* uCode images, save to reload in case of failure */
c02b3acd
CR		 1038 u32 ucode_ver; /* version of ucode, copy of
1039 iwl_ucode.ver */
5d08cd1d
CH		 1040 struct fw_desc ucode_code; /* runtime inst */
1041 struct fw_desc ucode_data; /* runtime data original */
1042 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1043 struct fw_desc ucode_init; /* initialization inst */
1044 struct fw_desc ucode_init_data; /* initialization data */
1045 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR		 1046 enum ucode_type ucode_type;
1047 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH		 1048
1049
3195c1f3 1050 struct iwl_rxon_time_cmd rxon_timing;
5d08cd1d
CH		 1051
1052 /* We declare this const so it can only be
1053 * changed via explicit cast within the
1054 * routines that actually update the physical
1055 * hardware */
c1adf9fb
GG		 1056 const struct iwl_rxon_cmd active_rxon;
1057 struct iwl_rxon_cmd staging_rxon;
5d08cd1d 1058
c1adf9fb 1059 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH		 1060
1061 /* 1st responses from initialize and runtime uCode images.
1062 * 4965's initialize alive response contains some calibration data. */
885ba202
TW		 1063 struct iwl_init_alive_resp card_alive_init;
1064 struct iwl_alive_resp card_alive;
5d08cd1d 1065
5c8df2d5 1066#ifdef CONFIG_IWLWIFI_LEDS
ab53d8af
MA		 1067 unsigned long last_blink_time;
1068 u8 last_blink_rate;
1069 u8 allow_blinking;
1070 u64 led_tpt;
4a8a4322 1071 struct iwl_led led[IWL_LED_TRG_MAX];
4a8a4322
AK		 1072 unsigned int rxtxpackets;
1073#endif
5d08cd1d
CH		 1074 u16 active_rate;
1075 u16 active_rate_basic;
1076
5d08cd1d 1077 u8 assoc_station_added;
5d08cd1d 1078 u8 start_calib;
f0832f13
EG		 1079 struct iwl_sensitivity_data sensitivity_data;
1080 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 1081 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 1082
9e0cc6de 1083 struct iwl_ht_info current_ht_config;
5d08cd1d
CH		 1084 u8 last_phy_res[100];
1085
5d08cd1d
CH		 1086 /* Rate scaling data */
1087 s8 data_retry_limit;
1088 u8 retry_rate;
1089
1090 wait_queue_head_t wait_command_queue;
1091
1092 int activity_timer_active;
1093
1094 /* Rx and Tx DMA processing queues */
a55360e4 1095 struct iwl_rx_queue rxq;
16466903 1096 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 1097 unsigned long txq_ctx_active_msk;
4ddbb7d0
TW		 1098 struct iwl_dma_ptr kw; /* keep warm address */
1099 struct iwl_dma_ptr scd_bc_tbls;
1100
5d08cd1d
CH		 1101 u32 scd_base_addr; /* scheduler sram base address */
1102
1103 unsigned long status;
5d08cd1d 1104
a96a27f9 1105 int last_rx_rssi; /* From Rx packet statistics */
5d08cd1d
CH		 1106 int last_rx_noise; /* From beacon statistics */
1107
19758bef 1108 /* counts mgmt, ctl, and data packets */
22fdf3c9
WYG		 1109 struct traffic_stats tx_stats;
1110 struct traffic_stats rx_stats;
19758bef 1111
a83b9141
WYG		 1112 /* counts interrupts */
1113 struct isr_statistics isr_stats;
1114
5da4b55f 1115 struct iwl_power_mgr power_data;
3ad3b92a 1116 struct iwl_tt_mgmt thermal_throttle;
5d08cd1d 1117
8f91aecb 1118 struct iwl_notif_statistics statistics;
5d08cd1d
CH		 1119 unsigned long last_statistics_time;
1120
1121 /* context information */
5d08cd1d
CH		 1122 u16 rates_mask;
1123
5d08cd1d
CH		 1124 u8 bssid[ETH_ALEN];
1125 u16 rts_threshold;
1126 u8 mac_addr[ETH_ALEN];
1127
1128 /*station table variables */
1129 spinlock_t sta_lock;
1130 int num_stations;
6def9761 1131 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG		 1132 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
1133 u8 default_wep_key;
1134 u8 key_mapping_key;
80fb47a1 1135 unsigned long ucode_key_table;
5d08cd1d 1136
e4e72fb4
JB		 1137 /* queue refcounts */
1138#define IWL_MAX_HW_QUEUES 32
1139 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1140 /* for each AC */
1141 atomic_t queue_stop_count[4];
1142
5d08cd1d 1143 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 1144 u8 is_open;
5d08cd1d
CH		 1145
1146 u8 mac80211_registered;
5d08cd1d 1147
5d08cd1d
CH		 1148 /* Rx'd packet timing information */
1149 u32 last_beacon_time;
1150 u64 last_tsf;
1151
5d08cd1d 1152 /* eeprom */
073d3f5f 1153 u8 *eeprom;
0848e297 1154 int nvm_device_type;
073d3f5f 1155 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 1156
05c914fe 1157 enum nl80211_iftype iw_mode;
5d08cd1d
CH		 1158
1159 struct sk_buff *ibss_beacon;
1160
1161 /* Last Rx'd beacon timestamp */
3109ece1 1162 u64 timestamp;
5d08cd1d 1163 u16 beacon_int;
32bfd35d 1164 struct ieee80211_vif *vif;
5d08cd1d 1165
8cd812bc 1166 /*Added for 3945 */
3832ec9d
AK		 1167 void *shared_virt;
1168 dma_addr_t shared_phys;
1169 /*End*/
5425e490 1170 struct iwl_hw_params hw_params;
4ddbb7d0 1171
ef850d7c
MA		 1172 /* INT ICT Table */
1173 u32 *ict_tbl;
1174 dma_addr_t ict_tbl_dma;
1175 dma_addr_t aligned_ict_tbl_dma;
1176 int ict_index;
1177 void *ict_tbl_vir;
1178 u32 inta;
1179 bool use_ict;
059ff826 1180
40cefda9 1181 u32 inta_mask;
5d08cd1d
CH		 1182 /* Current association information needed to configure the
1183 * hardware */
1184 u16 assoc_id;
1185 u16 assoc_capability;
5d08cd1d 1186
1ff50bda 1187 struct iwl_qos_info qos_data;
5d08cd1d
CH		 1188
1189 struct workqueue_struct *workqueue;
1190
1191 struct work_struct up;
1192 struct work_struct restart;
1193 struct work_struct calibrated_work;
1194 struct work_struct scan_completed;
1195 struct work_struct rx_replenish;
5d08cd1d
CH		 1196 struct work_struct abort_scan;
1197 struct work_struct update_link_led;
1198 struct work_struct auth_work;
1199 struct work_struct report_work;
1200 struct work_struct request_scan;
1201 struct work_struct beacon_update;
a28027cd
WYG		 1202 struct work_struct tt_work;
1203 struct work_struct ct_enter;
1204 struct work_struct ct_exit;
5d08cd1d
CH		 1205
1206 struct tasklet_struct irq_tasklet;
1207
1208 struct delayed_work init_alive_start;
1209 struct delayed_work alive_start;
5d08cd1d 1210 struct delayed_work scan_check;
4a8a4322
AK		 1211
1212 /*For 3945 only*/
1213 struct delayed_work thermal_periodic;
2663516d 1214 struct delayed_work rfkill_poll;
4a8a4322 1215
630fe9b6
TW		 1216 /* TX Power */
1217 s8 tx_power_user_lmt;
dc1b0973 1218 s8 tx_power_device_lmt;
5d08cd1d 1219
5d08cd1d 1220
d08853a3 1221#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1222 /* debugging info */
3d816c77
RC		 1223 u32 debug_level; /* per device debugging will override global
1224 iwl_debug_level if set */
5d08cd1d
CH		 1225 u32 framecnt_to_us;
1226 atomic_t restrict_refcnt;
1e4247d4 1227 bool disable_ht40;
712b6cf5
TW		 1228#ifdef CONFIG_IWLWIFI_DEBUGFS
1229 /* debugfs */
20594eb0
WYG		 1230 u16 tx_traffic_idx;
1231 u16 rx_traffic_idx;
1232 u8 *tx_traffic;
1233 u8 *rx_traffic;
712b6cf5
TW		 1234 struct iwl_debugfs *dbgfs;
1235#endif /* CONFIG_IWLWIFI_DEBUGFS */
1236#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH		 1237
1238 struct work_struct txpower_work;
445c2dff
TW		 1239 u32 disable_sens_cal;
1240 u32 disable_chain_noise_cal;
203566f3 1241 u32 disable_tx_power_cal;
16e727e8 1242 struct work_struct run_time_calib_work;
5d08cd1d 1243 struct timer_list statistics_periodic;
086ed117 1244 bool hw_ready;
4a8a4322
AK		 1245 /*For 3945*/
1246#define IWL_DEFAULT_TX_POWER 0x0F
4a8a4322 1247
4a8a4322
AK		 1248 struct iwl3945_notif_statistics statistics_39;
1249
4a8a4322 1250 u32 sta_supp_rates;
c79dd5b5 1251}; /*iwl_priv */
5d08cd1d 1252
36470749
RR		 1253static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1254{
1255 set_bit(txq_id, &priv->txq_ctx_active_msk);
1256}
1257
1258static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1259{
1260 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1261}
1262
994d31f7 1263#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6 1264const char *iwl_get_tx_fail_reason(u32 status);
3d816c77
RC		 1265/*
1266 * iwl_get_debug_level: Return active debug level for device
1267 *
1268 * Using sysfs it is possible to set per device debug level. This debug
1269 * level will be used if set, otherwise the global debug level which can be
1270 * set via module parameter is used.
1271 */
1272static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1273{
1274 if (priv->debug_level)
1275 return priv->debug_level;
1276 else
1277 return iwl_debug_level;
1278}
a332f8d6
TW		 1279#else
1280static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
3d816c77
RC		 1281
1282static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1283{
1284 return iwl_debug_level;
1285}
a332f8d6
TW		 1286#endif
1287
1288
a332f8d6
TW		 1289static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1290 int txq_id, int idx)
1291{
1292 if (priv->txq[txq_id].txb[idx].skb[0])
1293 return (struct ieee80211_hdr *)priv->txq[txq_id].
1294 txb[idx].skb[0]->data;
1295 return NULL;
1296}
a332f8d6
TW		 1297
1298
3109ece1 1299static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH		 1300{
1301 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1302}
1303
bf85ea4f 1304static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH		 1305{
1306 if (ch_info == NULL)
1307 return 0;
1308 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1309}
1310
bf85ea4f 1311static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH		 1312{
1313 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1314}
1315
bf85ea4f 1316static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1317{
8318d78a 1318 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH		 1319}
1320
bf85ea4f 1321static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1322{
8318d78a 1323 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH		 1324}
1325
bf85ea4f 1326static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH		 1327{
1328 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1329}
1330
bf85ea4f 1331static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH		 1332{
1333 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1334}
1335
be1f3ab6 1336#endif /* __iwl_dev_h__ */
Linux kernel - Deliverables
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