iwl3945: fix sparse error
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
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4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
759ef89f 22 * Intel Linux Wireless <ilw@linux.intel.com>
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23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
6bc913bd 39#include "iwl-eeprom.h"
6f83eaa1 40#include "iwl-csr.h"
5d08cd1d 41#include "iwl-prph.h"
dbb6654c 42#include "iwl-fh.h"
0a6857e7 43#include "iwl-debug.h"
dbb6654c
WT
44#include "iwl-rfkill.h"
45#include "iwl-4965-hw.h"
46#include "iwl-3945-hw.h"
47#include "iwl-3945-led.h"
ab53d8af 48#include "iwl-led.h"
5da4b55f 49#include "iwl-power.h"
e227ceac 50#include "iwl-agn-rs.h"
5d08cd1d 51
fed9017e
RR
52/* configuration for the iwl4965 */
53extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
54extern struct iwl_cfg iwl5300_agn_cfg;
55extern struct iwl_cfg iwl5100_agn_cfg;
56extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
57extern struct iwl_cfg iwl5100_bg_cfg;
58extern struct iwl_cfg iwl5100_abg_cfg;
7100e924 59extern struct iwl_cfg iwl5150_agn_cfg;
e1228374
JS
60extern struct iwl_cfg iwl6000_2ag_cfg;
61extern struct iwl_cfg iwl6000_2agn_cfg;
62extern struct iwl_cfg iwl6000_3agn_cfg;
63extern struct iwl_cfg iwl6050_2agn_cfg;
64extern struct iwl_cfg iwl6050_3agn_cfg;
77dcb6a9 65extern struct iwl_cfg iwl1000_bgn_cfg;
fed9017e 66
cec2d3f3
JS
67/* shared structures from iwl-5000.c */
68extern struct iwl_mod_params iwl50_mod_params;
69extern struct iwl_ops iwl5000_ops;
e8c00dcb
JS
70extern struct iwl_lib_ops iwl5000_lib;
71extern struct iwl_hcmd_ops iwl5000_hcmd;
72extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils;
73
74/* shared functions from iwl-5000.c */
75extern u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len);
76extern u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd,
77 u8 *data);
78extern void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
79 __le32 *tx_flags);
80extern int iwl5000_calc_rssi(struct iwl_priv *priv,
81 struct iwl_rx_phy_res *rx_resp);
cec2d3f3 82
099b40b7
RR
83/* CT-KILL constants */
84#define CT_KILL_THRESHOLD 110 /* in Celsius */
4bf775cd 85
5d08cd1d
CH
86/* Default noise level to report when noise measurement is not available.
87 * This may be because we're:
88 * 1) Not associated (4965, no beacon statistics being sent to driver)
89 * 2) Scanning (noise measurement does not apply to associated channel)
90 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
91 * Use default noise value of -127 ... this is below the range of measurable
92 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
93 * Also, -127 works better than 0 when averaging frames with/without
94 * noise info (e.g. averaging might be done in app); measured dBm values are
95 * always negative ... using a negative value as the default keeps all
96 * averages within an s8's (used in some apps) range of negative values. */
97#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
98
5d08cd1d
CH
99/*
100 * RTS threshold here is total size [2347] minus 4 FCS bytes
101 * Per spec:
102 * a value of 0 means RTS on all data/management packets
103 * a value > max MSDU size means no RTS
104 * else RTS for data/management frames where MPDU is larger
105 * than RTS value.
106 */
107#define DEFAULT_RTS_THRESHOLD 2347U
108#define MIN_RTS_THRESHOLD 0U
109#define MAX_RTS_THRESHOLD 2347U
110#define MAX_MSDU_SIZE 2304U
111#define MAX_MPDU_SIZE 2346U
112#define DEFAULT_BEACON_INTERVAL 100U
113#define DEFAULT_SHORT_RETRY_LIMIT 7U
114#define DEFAULT_LONG_RETRY_LIMIT 4U
115
a55360e4 116struct iwl_rx_mem_buffer {
4018517a
JB
117 dma_addr_t real_dma_addr;
118 dma_addr_t aligned_dma_addr;
5d08cd1d
CH
119 struct sk_buff *skb;
120 struct list_head list;
121};
122
5d08cd1d
CH
123/*
124 * Generic queue structure
125 *
126 * Contains common data for Rx and Tx queues
127 */
443cfd45 128struct iwl_queue {
5d08cd1d
CH
129 int n_bd; /* number of BDs in this queue */
130 int write_ptr; /* 1-st empty entry (index) host_w*/
131 int read_ptr; /* last used entry (index) host_r*/
132 dma_addr_t dma_addr; /* physical addr for BD's */
133 int n_window; /* safe queue window */
134 u32 id;
135 int low_mark; /* low watermark, resume queue if free
136 * space more than this */
137 int high_mark; /* high watermark, stop queue if free
138 * space less than this */
139} __attribute__ ((packed));
140
bc47279f 141/* One for each TFD */
8567c63e 142struct iwl_tx_info {
499b1883 143 struct sk_buff *skb[IWL_NUM_OF_TBS - 1];
5d08cd1d
CH
144};
145
146/**
16466903 147 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
148 * @q: generic Rx/Tx queue descriptor
149 * @bd: base of circular buffer of TFDs
150 * @cmd: array of command/Tx buffers
151 * @dma_addr_cmd: physical address of cmd/tx buffer array
152 * @txb: array of per-TFD driver data
153 * @need_update: indicates need to update read/write index
154 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 155 *
bc47279f
BC
156 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
157 * descriptors) and required locking structures.
5d08cd1d 158 */
188cf6c7
SO
159#define TFD_TX_CMD_SLOTS 256
160#define TFD_CMD_SLOTS 32
161
16466903 162struct iwl_tx_queue {
443cfd45 163 struct iwl_queue q;
59606ffa 164 void *tfds;
da99c4b6 165 struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS];
8567c63e 166 struct iwl_tx_info *txb;
3fd07a1e
TW
167 u8 need_update;
168 u8 sched_retry;
169 u8 active;
170 u8 swq_id;
5d08cd1d
CH
171};
172
173#define IWL_NUM_SCAN_RATES (2)
174
bb8c093b 175struct iwl4965_channel_tgd_info {
5d08cd1d
CH
176 u8 type;
177 s8 max_power;
178};
179
bb8c093b 180struct iwl4965_channel_tgh_info {
5d08cd1d
CH
181 s64 last_radar_time;
182};
183
d20b3c65
SO
184#define IWL4965_MAX_RATE (33)
185
85d41495
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186struct iwl3945_clip_group {
187 /* maximum power level to prevent clipping for each rate, derived by
188 * us from this band's saturation power in EEPROM */
189 const s8 clip_powers[IWL_MAX_RATES];
190};
191
d20b3c65
SO
192/* current Tx power values to use, one for each rate for each channel.
193 * requested power is limited by:
194 * -- regulatory EEPROM limits for this channel
195 * -- hardware capabilities (clip-powers)
196 * -- spectrum management
197 * -- user preference (e.g. iwconfig)
198 * when requested power is set, base power index must also be set. */
199struct iwl3945_channel_power_info {
200 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
201 s8 power_table_index; /* actual (compenst'd) index into gain table */
202 s8 base_power_index; /* gain index for power at factory temp. */
203 s8 requested_power; /* power (dBm) requested for this chnl/rate */
204};
205
206/* current scan Tx power values to use, one for each scan rate for each
207 * channel. */
208struct iwl3945_scan_power_info {
209 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
210 s8 power_table_index; /* actual (compenst'd) index into gain table */
211 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
212};
213
5d08cd1d
CH
214/*
215 * One for each channel, holds all channel setup data
216 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
217 * with one another!
218 */
bf85ea4f 219struct iwl_channel_info {
bb8c093b
CH
220 struct iwl4965_channel_tgd_info tgd;
221 struct iwl4965_channel_tgh_info tgh;
073d3f5f
TW
222 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
223 struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
224 * FAT channel */
5d08cd1d
CH
225
226 u8 channel; /* channel number */
227 u8 flags; /* flags copied from EEPROM */
228 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 229 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
230 s8 min_power; /* always 0 */
231 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
232
233 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
234 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 235 enum ieee80211_band band;
5d08cd1d 236
5d08cd1d
CH
237 /* FAT channel info */
238 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
239 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
240 s8 fat_min_power; /* always 0 */
241 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
242 u8 fat_flags; /* flags copied from EEPROM */
fcd427bb 243 u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */
d20b3c65
SO
244
245 /* Radio/DSP gain settings for each "normal" data Tx rate.
246 * These include, in addition to RF and DSP gain, a few fields for
247 * remembering/modifying gain settings (indexes). */
248 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
249
250 /* Radio/DSP gain settings for each scan rate, for directed scans. */
251 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
5d08cd1d
CH
252};
253
5d08cd1d
CH
254#define IWL_TX_FIFO_AC0 0
255#define IWL_TX_FIFO_AC1 1
256#define IWL_TX_FIFO_AC2 2
257#define IWL_TX_FIFO_AC3 3
258#define IWL_TX_FIFO_HCCA_1 5
259#define IWL_TX_FIFO_HCCA_2 6
260#define IWL_TX_FIFO_NONE 7
261
262/* Minimum number of queues. MAX_NUM is defined in hw specific files */
263#define IWL_MIN_NUM_QUEUES 4
264
265/* Power management (not Tx power) structures */
266
6f4083aa
TW
267enum iwl_pwr_src {
268 IWL_PWR_SRC_VMAIN,
269 IWL_PWR_SRC_VAUX,
270};
271
5d08cd1d
CH
272#define IEEE80211_DATA_LEN 2304
273#define IEEE80211_4ADDR_LEN 30
274#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
275#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
276
fcab423d 277struct iwl_frame {
5d08cd1d
CH
278 union {
279 struct ieee80211_hdr frame;
4bf64efd 280 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH
281 u8 raw[IEEE80211_FRAME_LEN];
282 u8 cmd[360];
283 } u;
284 struct list_head list;
285};
286
5d08cd1d
CH
287#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
288#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
289#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
290
291enum {
292 /* CMD_SIZE_NORMAL = 0, */
293 CMD_SIZE_HUGE = (1 << 0),
294 /* CMD_SYNC = 0, */
295 CMD_ASYNC = (1 << 1),
296 /* CMD_NO_SKB = 0, */
297 CMD_WANT_SKB = (1 << 2),
298};
299
857485c0 300struct iwl_cmd;
c79dd5b5 301struct iwl_priv;
5d08cd1d 302
857485c0
TW
303struct iwl_cmd_meta {
304 struct iwl_cmd_meta *source;
5d08cd1d
CH
305 union {
306 struct sk_buff *skb;
c79dd5b5 307 int (*callback)(struct iwl_priv *priv,
857485c0 308 struct iwl_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH
309 } __attribute__ ((packed)) u;
310
311 /* The CMD_SIZE_HUGE flag bit indicates that the command
312 * structure is stored at the end of the shared queue memory. */
313 u32 flags;
499b1883
TW
314 DECLARE_PCI_UNMAP_ADDR(mapping)
315 DECLARE_PCI_UNMAP_LEN(len)
5d08cd1d
CH
316} __attribute__ ((packed));
317
d2f18bfd 318#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 319
bc47279f 320/**
857485c0 321 * struct iwl_cmd
bc47279f
BC
322 *
323 * For allocation of the command and tx queues, this establishes the overall
324 * size of the largest command we send to uCode, except for a scan command
325 * (which is relatively huge; space is allocated separately).
326 */
857485c0
TW
327struct iwl_cmd {
328 struct iwl_cmd_meta meta; /* driver data */
329 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 330 union {
5d08cd1d
CH
331 u32 flags;
332 u8 val8;
333 u16 val16;
334 u32 val32;
83d527d9 335 struct iwl_tx_cmd tx;
bd68fb6f 336 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH
337 } __attribute__ ((packed)) cmd;
338} __attribute__ ((packed));
339
3257e5d4 340
857485c0 341struct iwl_host_cmd {
5d08cd1d
CH
342 u8 id;
343 u16 len;
857485c0 344 struct iwl_cmd_meta meta;
5d08cd1d
CH
345 const void *data;
346};
347
857485c0
TW
348#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
349 sizeof(struct iwl_cmd_meta))
5d08cd1d
CH
350
351/*
352 * RX related structures and functions
353 */
354#define RX_FREE_BUFFERS 64
355#define RX_LOW_WATERMARK 8
356
357#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
358#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
359#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
360
361/**
a55360e4 362 * struct iwl_rx_queue - Rx queue
5d08cd1d
CH
363 * @read: Shared index to newest available Rx buffer
364 * @write: Shared index to oldest written Rx packet
365 * @free_count: Number of pre-allocated buffers in rx_free
366 * @rx_free: list of free SKBs for use
367 * @rx_used: List of Rx buffers with no SKB
368 * @need_update: flag to indicate we need to update read/write index
369 *
a55360e4 370 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 371 */
a55360e4 372struct iwl_rx_queue {
5d08cd1d
CH
373 __le32 *bd;
374 dma_addr_t dma_addr;
a55360e4
TW
375 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
376 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
377 u32 read;
378 u32 write;
379 u32 free_count;
380 struct list_head rx_free;
381 struct list_head rx_used;
382 int need_update;
8d86422a
WT
383 struct iwl_rb_status *rb_stts;
384 dma_addr_t rb_stts_dma;
5d08cd1d
CH
385 spinlock_t lock;
386};
387
388#define IWL_SUPPORTED_RATES_IE_LEN 8
389
5d08cd1d
CH
390#define MAX_TID_COUNT 9
391
392#define IWL_INVALID_RATE 0xFF
393#define IWL_INVALID_VALUE -1
394
bc47279f 395/**
6def9761 396 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
397 * @txq_id: Tx queue used for Tx attempt
398 * @frame_count: # frames attempted by Tx command
399 * @wait_for_ba: Expect block-ack before next Tx reply
400 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
401 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
402 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
403 * @rate_n_flags: Rate at which Tx was attempted
404 *
405 * If REPLY_TX indicates that aggregation was attempted, driver must wait
406 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
407 * until block ack arrives.
408 */
6def9761 409struct iwl_ht_agg {
5d08cd1d
CH
410 u16 txq_id;
411 u16 frame_count;
412 u16 wait_for_ba;
413 u16 start_idx;
fe01b477 414 u64 bitmap;
5d08cd1d 415 u32 rate_n_flags;
fe01b477
RR
416#define IWL_AGG_OFF 0
417#define IWL_AGG_ON 1
418#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
419#define IWL_EMPTYING_HW_QUEUE_DELBA 3
420 u8 state;
5d08cd1d 421};
fe01b477 422
5d08cd1d 423
6def9761 424struct iwl_tid_data {
5d08cd1d 425 u16 seq_number;
fe01b477 426 u16 tfds_in_queue;
6def9761 427 struct iwl_ht_agg agg;
5d08cd1d
CH
428};
429
6def9761 430struct iwl_hw_key {
5d08cd1d
CH
431 enum ieee80211_key_alg alg;
432 int keylen;
0211ddda 433 u8 keyidx;
5d08cd1d
CH
434 u8 key[32];
435};
436
a78fe754 437union iwl_ht_rate_supp {
5d08cd1d
CH
438 u16 rates;
439 struct {
440 u8 siso_rate;
441 u8 mimo_rate;
442 };
443};
444
5d08cd1d 445#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
5d08cd1d
CH
446#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
447#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
448
9e0cc6de
RR
449struct iwl_ht_info {
450 /* self configuration data */
5d08cd1d 451 u8 is_ht;
9e0cc6de 452 u8 supported_chan_width;
12837be1 453 u8 sm_ps;
9e0cc6de 454 u8 is_green_field;
bb54244b 455 u8 sgf; /* HT_SHORT_GI_* short guard interval */
5d08cd1d
CH
456 u8 max_amsdu_size;
457 u8 ampdu_factor;
458 u8 mpdu_density;
d9fe60de 459 struct ieee80211_mcs_info mcs;
9e0cc6de 460 /* BSS related data */
5d08cd1d 461 u8 extension_chan_offset;
5d08cd1d 462 u8 tx_chan_width;
9e0cc6de
RR
463 u8 ht_protection;
464 u8 non_GF_STA_present;
5d08cd1d 465};
5d08cd1d 466
1ff50bda 467union iwl_qos_capabity {
5d08cd1d
CH
468 struct {
469 u8 edca_count:4; /* bit 0-3 */
470 u8 q_ack:1; /* bit 4 */
471 u8 queue_request:1; /* bit 5 */
472 u8 txop_request:1; /* bit 6 */
473 u8 reserved:1; /* bit 7 */
474 } q_AP;
475 struct {
476 u8 acvo_APSD:1; /* bit 0 */
477 u8 acvi_APSD:1; /* bit 1 */
478 u8 ac_bk_APSD:1; /* bit 2 */
479 u8 ac_be_APSD:1; /* bit 3 */
480 u8 q_ack:1; /* bit 4 */
481 u8 max_len:2; /* bit 5-6 */
482 u8 more_data_ack:1; /* bit 7 */
483 } q_STA;
484 u8 val;
485};
486
487/* QoS structures */
1ff50bda 488struct iwl_qos_info {
5d08cd1d 489 int qos_active;
1ff50bda
EG
490 union iwl_qos_capabity qos_cap;
491 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 492};
5d08cd1d
CH
493
494#define STA_PS_STATUS_WAKE 0
495#define STA_PS_STATUS_SLEEP 1
496
85d41495
KA
497struct iwl3945_tid_data {
498 u16 seq_number;
499};
500
501struct iwl3945_hw_key {
502 enum ieee80211_key_alg alg;
503 int keylen;
504 u8 key[32];
505};
506
507struct iwl3945_station_entry {
508 struct iwl3945_addsta_cmd sta;
509 struct iwl3945_tid_data tid[MAX_TID_COUNT];
510 u8 used;
511 u8 ps_status;
512 struct iwl3945_hw_key keyinfo;
513};
514
6def9761 515struct iwl_station_entry {
133636de 516 struct iwl_addsta_cmd sta;
6def9761 517 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
518 u8 used;
519 u8 ps_status;
6def9761 520 struct iwl_hw_key keyinfo;
5d08cd1d
CH
521};
522
523/* one for each uCode image (inst/data, boot/init/runtime) */
524struct fw_desc {
525 void *v_addr; /* access by driver */
526 dma_addr_t p_addr; /* access by card's busmaster DMA */
527 u32 len; /* bytes */
528};
529
530/* uCode file layout */
14b3d338 531struct iwl_ucode {
c02b3acd 532 __le32 ver; /* major/minor/API/serial */
5d08cd1d
CH
533 __le32 inst_size; /* bytes of runtime instructions */
534 __le32 data_size; /* bytes of runtime data */
535 __le32 init_size; /* bytes of initialization instructions */
536 __le32 init_data_size; /* bytes of initialization data */
537 __le32 boot_size; /* bytes of bootstrap instructions */
538 u8 data[0]; /* data in same order as "size" elements */
539};
540
bb8c093b 541struct iwl4965_ibss_seq {
5d08cd1d
CH
542 u8 mac[ETH_ALEN];
543 u16 seq_num;
544 u16 frag_num;
545 unsigned long packet_time;
546 struct list_head list;
547};
548
f0832f13
EG
549struct iwl_sensitivity_ranges {
550 u16 min_nrg_cck;
551 u16 max_nrg_cck;
552
553 u16 nrg_th_cck;
554 u16 nrg_th_ofdm;
555
556 u16 auto_corr_min_ofdm;
557 u16 auto_corr_min_ofdm_mrc;
558 u16 auto_corr_min_ofdm_x1;
559 u16 auto_corr_min_ofdm_mrc_x1;
560
561 u16 auto_corr_max_ofdm;
562 u16 auto_corr_max_ofdm_mrc;
563 u16 auto_corr_max_ofdm_x1;
564 u16 auto_corr_max_ofdm_mrc_x1;
565
566 u16 auto_corr_max_cck;
567 u16 auto_corr_max_cck_mrc;
568 u16 auto_corr_min_cck;
569 u16 auto_corr_min_cck_mrc;
570};
571
099b40b7 572
b5047f78
TW
573#define KELVIN_TO_CELSIUS(x) ((x)-273)
574#define CELSIUS_TO_KELVIN(x) ((x)+273)
575
576
bc47279f 577/**
5425e490 578 * struct iwl_hw_params
bc47279f 579 * @max_txq_num: Max # Tx queues supported
f3f911d1 580 * @dma_chnl_num: Number of Tx DMA/FIFO channels
4ddbb7d0 581 * @scd_bc_tbls_size: size of scheduler byte count tables
a8e74e27 582 * @tfd_size: TFD size
099b40b7
RR
583 * @tx/rx_chains_num: Number of TX/RX chains
584 * @valid_tx/rx_ant: usable antennas
bc47279f 585 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 586 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 587 * @rx_buf_size: Rx buffer size
141c43a3 588 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
bc47279f
BC
589 * @max_stations:
590 * @bcast_sta_id:
099b40b7
RR
591 * @fat_channel: is 40MHz width possible in band 2.4
592 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
593 * @sw_crypto: 0 for hw, 1 for sw
594 * @max_xxx_size: for ucode uses
595 * @ct_kill_threshold: temperature threshold
a96a27f9 596 * @calib_init_cfg: setup initial calibrations for the hw
f0832f13 597 * @struct iwl_sensitivity_ranges: range of sensitivity values
bc47279f 598 */
5425e490 599struct iwl_hw_params {
f3f911d1
ZY
600 u8 max_txq_num;
601 u8 dma_chnl_num;
4ddbb7d0 602 u16 scd_bc_tbls_size;
a8e74e27 603 u32 tfd_size;
ec35cf2a
TW
604 u8 tx_chains_num;
605 u8 rx_chains_num;
606 u8 valid_tx_ant;
607 u8 valid_rx_ant;
5d08cd1d 608 u16 max_rxq_size;
ec35cf2a 609 u16 max_rxq_log;
9ee1ba47 610 u32 rx_buf_size;
141c43a3 611 u32 rx_wrt_ptr_reg;
9ee1ba47 612 u32 max_pkt_size;
5d08cd1d
CH
613 u8 max_stations;
614 u8 bcast_sta_id;
099b40b7
RR
615 u8 fat_channel;
616 u8 sw_crypto;
617 u32 max_inst_size;
618 u32 max_data_size;
619 u32 max_bsm_size;
620 u32 ct_kill_threshold; /* value in hw-dependent units */
be5d56ed 621 u32 calib_init_cfg;
f0832f13 622 const struct iwl_sensitivity_ranges *sens;
5d08cd1d
CH
623};
624
5d08cd1d 625
5d08cd1d
CH
626/******************************************************************************
627 *
a33c2f47
EG
628 * Functions implemented in core module which are forward declared here
629 * for use by iwl-[4-5].c
5d08cd1d 630 *
a33c2f47
EG
631 * NOTE: The implementation of these functions are not hardware specific
632 * which is why they are in the core module files.
5d08cd1d
CH
633 *
634 * Naming convention --
a33c2f47 635 * iwl_ <-- Is part of iwlwifi
5d08cd1d 636 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
637 * iwl4965_bg_ <-- Called from work queue context
638 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
639 *
640 ****************************************************************************/
5b9f8cd3
EG
641extern void iwl_update_chain_flags(struct iwl_priv *priv);
642extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
a33c2f47 643extern const u8 iwl_bcast_addr[ETH_ALEN];
b3bbacb7 644extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 645extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
443cfd45 646extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
647static inline int iwl_queue_used(const struct iwl_queue *q, int i)
648{
649 return q->write_ptr > q->read_ptr ?
650 (i >= q->read_ptr && i < q->write_ptr) :
651 !(i < q->read_ptr && i >= q->write_ptr);
652}
653
654
655static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
656{
657 /* This is for scan command, the big buffer at end of command array */
658 if (is_huge)
659 return q->n_window; /* must be power of 2 */
660
661 /* Otherwise, use normal size buffers */
662 return index & (q->n_window - 1);
663}
664
665
4ddbb7d0
TW
666struct iwl_dma_ptr {
667 dma_addr_t dma;
668 void *addr;
b481de9c
ZY
669 size_t size;
670};
671
34c22cf9
WT
672#define HT_SHORT_GI_20MHZ (1 << 0)
673#define HT_SHORT_GI_40MHZ (1 << 1)
674
b481de9c
ZY
675#define IWL_CHANNEL_WIDTH_20MHZ 0
676#define IWL_CHANNEL_WIDTH_40MHZ 1
677
b481de9c
ZY
678#define IWL_OPERATION_MODE_AUTO 0
679#define IWL_OPERATION_MODE_HT_ONLY 1
680#define IWL_OPERATION_MODE_MIXED 2
681#define IWL_OPERATION_MODE_20MHZ 3
682
3195cdb7
TW
683#define IWL_TX_CRC_SIZE 4
684#define IWL_TX_DELIMITER_SIZE 4
b481de9c 685
b481de9c 686#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 687
b481de9c 688/* Sensitivity and chain noise calibration */
b481de9c
ZY
689#define INITIALIZATION_VALUE 0xFFFF
690#define CAL_NUM_OF_BEACONS 20
691#define MAXIMUM_ALLOWED_PATHLOSS 15
692
b481de9c
ZY
693#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
694
695#define MAX_FA_OFDM 50
696#define MIN_FA_OFDM 5
697#define MAX_FA_CCK 50
698#define MIN_FA_CCK 5
699
b481de9c
ZY
700#define AUTO_CORR_STEP_OFDM 1
701
b481de9c
ZY
702#define AUTO_CORR_STEP_CCK 3
703#define AUTO_CORR_MAX_TH_CCK 160
704
b481de9c
ZY
705#define NRG_DIFF 2
706#define NRG_STEP_CCK 2
707#define NRG_MARGIN 8
708#define MAX_NUMBER_CCK_NO_FA 100
709
710#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
711
712#define CHAIN_A 0
713#define CHAIN_B 1
714#define CHAIN_C 2
715#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
716#define ALL_BAND_FILTER 0xFF00
717#define IN_BAND_FILTER 0xFF
718#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
719
3195cdb7
TW
720#define NRG_NUM_PREV_STAT_L 20
721#define NUM_RX_CHAINS 3
722
bb8c093b 723enum iwl4965_false_alarm_state {
b481de9c
ZY
724 IWL_FA_TOO_MANY = 0,
725 IWL_FA_TOO_FEW = 1,
726 IWL_FA_GOOD_RANGE = 2,
727};
728
bb8c093b 729enum iwl4965_chain_noise_state {
b481de9c 730 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
04816448
GE
731 IWL_CHAIN_NOISE_ACCUMULATE,
732 IWL_CHAIN_NOISE_CALIBRATED,
733 IWL_CHAIN_NOISE_DONE,
b481de9c
ZY
734};
735
bb8c093b 736enum iwl4965_calib_enabled_state {
b481de9c
ZY
737 IWL_CALIB_DISABLED = 0, /* must be 0 */
738 IWL_CALIB_ENABLED = 1,
739};
740
f69f42a6
TW
741
742/*
743 * enum iwl_calib
744 * defines the order in which results of initial calibrations
745 * should be sent to the runtime uCode
746 */
747enum iwl_calib {
748 IWL_CALIB_XTAL,
819500c5 749 IWL_CALIB_DC,
f69f42a6
TW
750 IWL_CALIB_LO,
751 IWL_CALIB_TX_IQ,
752 IWL_CALIB_TX_IQ_PERD,
201706ac 753 IWL_CALIB_BASE_BAND,
f69f42a6
TW
754 IWL_CALIB_MAX
755};
756
6e21f2c1
TW
757/* Opaque calibration results */
758struct iwl_calib_result {
759 void *buf;
760 size_t buf_len;
7c616cba
TW
761};
762
dbb983b7
RR
763enum ucode_type {
764 UCODE_NONE = 0,
765 UCODE_INIT,
766 UCODE_RT
767};
768
b481de9c 769/* Sensitivity calib data */
f0832f13 770struct iwl_sensitivity_data {
b481de9c
ZY
771 u32 auto_corr_ofdm;
772 u32 auto_corr_ofdm_mrc;
773 u32 auto_corr_ofdm_x1;
774 u32 auto_corr_ofdm_mrc_x1;
775 u32 auto_corr_cck;
776 u32 auto_corr_cck_mrc;
777
778 u32 last_bad_plcp_cnt_ofdm;
779 u32 last_fa_cnt_ofdm;
780 u32 last_bad_plcp_cnt_cck;
781 u32 last_fa_cnt_cck;
782
783 u32 nrg_curr_state;
784 u32 nrg_prev_state;
785 u32 nrg_value[10];
786 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
787 u32 nrg_silence_ref;
788 u32 nrg_energy_idx;
789 u32 nrg_silence_idx;
790 u32 nrg_th_cck;
791 s32 nrg_auto_corr_silence_diff;
792 u32 num_in_cck_no_fa;
793 u32 nrg_th_ofdm;
b481de9c
ZY
794};
795
796/* Chain noise (differential Rx gain) calib data */
f0832f13 797struct iwl_chain_noise_data {
04816448 798 u32 active_chains;
b481de9c
ZY
799 u32 chain_noise_a;
800 u32 chain_noise_b;
801 u32 chain_noise_c;
802 u32 chain_signal_a;
803 u32 chain_signal_b;
804 u32 chain_signal_c;
04816448 805 u16 beacon_count;
b481de9c
ZY
806 u8 disconn_array[NUM_RX_CHAINS];
807 u8 delta_gain_code[NUM_RX_CHAINS];
808 u8 radio_write;
04816448 809 u8 state;
b481de9c
ZY
810};
811
abceddb4
BC
812#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
813#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 814
5d08cd1d 815
5d08cd1d
CH
816enum {
817 MEASUREMENT_READY = (1 << 0),
818 MEASUREMENT_ACTIVE = (1 << 1),
819};
820
5d08cd1d 821
dfe7d458
RR
822#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
823
c79dd5b5 824struct iwl_priv {
5d08cd1d
CH
825
826 /* ieee device used by generic ieee processing code */
827 struct ieee80211_hw *hw;
828 struct ieee80211_channel *ieee_channels;
829 struct ieee80211_rate *ieee_rates;
82b9a121 830 struct iwl_cfg *cfg;
5d08cd1d
CH
831
832 /* temporary frame storage list */
833 struct list_head free_frames;
834 int frames_count;
835
8318d78a 836 enum ieee80211_band band;
5d08cd1d
CH
837 int alloc_rxb_skb;
838
c79dd5b5 839 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 840 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 841
8318d78a 842 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 843
80bc5393 844#if defined(CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT) || defined(CONFIG_IWL3945_SPECTRUM_MEASUREMENT)
5d08cd1d 845 /* spectrum measurement report caching */
2aa6ab86 846 struct iwl_spectrum_notification measure_report;
5d08cd1d
CH
847 u8 measurement_status;
848#endif
849 /* ucode beacon time */
850 u32 ucode_beacon_time;
851
bb8c093b 852 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 853 * Access via channel # using indirect index array */
bf85ea4f 854 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
855 u8 channel_count; /* # of channels */
856
85d41495
KA
857 /* each calibration channel group in the EEPROM has a derived
858 * clip setting for each rate. 3945 only.*/
859 const struct iwl3945_clip_group clip39_groups[5];
860
5d08cd1d
CH
861 /* thermal calibration */
862 s32 temperature; /* degrees Kelvin */
863 s32 last_temperature;
864
7c616cba 865 /* init calibration results */
6e21f2c1 866 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
7c616cba 867
5d08cd1d
CH
868 /* Scan related variables */
869 unsigned long last_scan_jiffies;
7878a5a4 870 unsigned long next_scan_jiffies;
5d08cd1d
CH
871 unsigned long scan_start;
872 unsigned long scan_pass_start;
873 unsigned long scan_start_tsf;
805cee5b 874 void *scan;
5d08cd1d
CH
875 int scan_bands;
876 int one_direct_scan;
877 u8 direct_ssid_len;
878 u8 direct_ssid[IW_ESSID_MAX_SIZE];
76eff18b
TW
879 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
880 u8 mgmt_tx_ant;
5d08cd1d
CH
881
882 /* spinlock */
883 spinlock_t lock; /* protect general shared data */
884 spinlock_t hcmd_lock; /* protect hcmd */
885 struct mutex mutex;
886
887 /* basic pci-network driver stuff */
888 struct pci_dev *pci_dev;
889
890 /* pci hardware address support */
891 void __iomem *hw_base;
b661c819
TW
892 u32 hw_rev;
893 u32 hw_wa_rev;
894 u8 rev_id;
5d08cd1d
CH
895
896 /* uCode images, save to reload in case of failure */
c02b3acd
CR
897 u32 ucode_ver; /* version of ucode, copy of
898 iwl_ucode.ver */
5d08cd1d
CH
899 struct fw_desc ucode_code; /* runtime inst */
900 struct fw_desc ucode_data; /* runtime data original */
901 struct fw_desc ucode_data_backup; /* runtime data save/restore */
902 struct fw_desc ucode_init; /* initialization inst */
903 struct fw_desc ucode_init_data; /* initialization data */
904 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
905 enum ucode_type ucode_type;
906 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
907
908
3195c1f3 909 struct iwl_rxon_time_cmd rxon_timing;
5d08cd1d
CH
910
911 /* We declare this const so it can only be
912 * changed via explicit cast within the
913 * routines that actually update the physical
914 * hardware */
c1adf9fb
GG
915 const struct iwl_rxon_cmd active_rxon;
916 struct iwl_rxon_cmd staging_rxon;
5d08cd1d
CH
917
918 int error_recovering;
c1adf9fb 919 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH
920
921 /* 1st responses from initialize and runtime uCode images.
922 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
923 struct iwl_init_alive_resp card_alive_init;
924 struct iwl_alive_resp card_alive;
80bc5393 925#if defined(CONFIG_IWLWIFI_RFKILL)
80fcc9e2 926 struct rfkill *rfkill;
ad97edd2 927#endif
5d08cd1d 928
4a8a4322 929#if defined(CONFIG_IWLWIFI_LEDS) || defined(CONFIG_IWL3945_LEDS)
ab53d8af
MA
930 unsigned long last_blink_time;
931 u8 last_blink_rate;
932 u8 allow_blinking;
933 u64 led_tpt;
5d08cd1d
CH
934#endif
935
4a8a4322
AK
936#ifdef CONFIG_IWLWIFI_LEDS
937 struct iwl_led led[IWL_LED_TRG_MAX];
938#endif
939
940#ifdef CONFIG_IWL3945_LEDS
941 struct iwl3945_led led39[IWL_LED_TRG_MAX];
942 unsigned int rxtxpackets;
943#endif
5d08cd1d
CH
944 u16 active_rate;
945 u16 active_rate_basic;
946
5d08cd1d 947 u8 assoc_station_added;
5d08cd1d 948 u8 start_calib;
f0832f13
EG
949 struct iwl_sensitivity_data sensitivity_data;
950 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 951 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 952
9e0cc6de 953 struct iwl_ht_info current_ht_config;
5d08cd1d
CH
954 u8 last_phy_res[100];
955
5d08cd1d
CH
956 /* Rate scaling data */
957 s8 data_retry_limit;
958 u8 retry_rate;
959
960 wait_queue_head_t wait_command_queue;
961
962 int activity_timer_active;
963
964 /* Rx and Tx DMA processing queues */
a55360e4 965 struct iwl_rx_queue rxq;
16466903 966 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 967 unsigned long txq_ctx_active_msk;
4ddbb7d0
TW
968 struct iwl_dma_ptr kw; /* keep warm address */
969 struct iwl_dma_ptr scd_bc_tbls;
970
5d08cd1d
CH
971 u32 scd_base_addr; /* scheduler sram base address */
972
973 unsigned long status;
5d08cd1d 974
a96a27f9 975 int last_rx_rssi; /* From Rx packet statistics */
5d08cd1d
CH
976 int last_rx_noise; /* From beacon statistics */
977
19758bef
TW
978 /* counts mgmt, ctl, and data packets */
979 struct traffic_stats {
980 u32 cnt;
981 u64 bytes;
982 } tx_stats[3], rx_stats[3];
983
5da4b55f 984 struct iwl_power_mgr power_data;
5d08cd1d 985
8f91aecb 986 struct iwl_notif_statistics statistics;
5d08cd1d
CH
987 unsigned long last_statistics_time;
988
989 /* context information */
5d08cd1d
CH
990 u16 rates_mask;
991
992 u32 power_mode;
5d08cd1d
CH
993 u8 bssid[ETH_ALEN];
994 u16 rts_threshold;
995 u8 mac_addr[ETH_ALEN];
996
997 /*station table variables */
998 spinlock_t sta_lock;
999 int num_stations;
6def9761 1000 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
1001 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
1002 u8 default_wep_key;
1003 u8 key_mapping_key;
80fb47a1 1004 unsigned long ucode_key_table;
5d08cd1d
CH
1005
1006 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 1007 u8 is_open;
5d08cd1d
CH
1008
1009 u8 mac80211_registered;
5d08cd1d 1010
5d08cd1d
CH
1011 /* Rx'd packet timing information */
1012 u32 last_beacon_time;
1013 u64 last_tsf;
1014
5d08cd1d 1015 /* eeprom */
073d3f5f
TW
1016 u8 *eeprom;
1017 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 1018
05c914fe 1019 enum nl80211_iftype iw_mode;
5d08cd1d
CH
1020
1021 struct sk_buff *ibss_beacon;
1022
1023 /* Last Rx'd beacon timestamp */
3109ece1 1024 u64 timestamp;
5d08cd1d 1025 u16 beacon_int;
32bfd35d 1026 struct ieee80211_vif *vif;
5d08cd1d 1027
8cd812bc 1028 /*Added for 3945 */
3832ec9d
AK
1029 void *shared_virt;
1030 dma_addr_t shared_phys;
1031 /*End*/
5425e490 1032 struct iwl_hw_params hw_params;
4ddbb7d0 1033
059ff826 1034
5d08cd1d
CH
1035 /* Current association information needed to configure the
1036 * hardware */
1037 u16 assoc_id;
1038 u16 assoc_capability;
5d08cd1d 1039
1ff50bda 1040 struct iwl_qos_info qos_data;
5d08cd1d
CH
1041
1042 struct workqueue_struct *workqueue;
1043
1044 struct work_struct up;
1045 struct work_struct restart;
1046 struct work_struct calibrated_work;
1047 struct work_struct scan_completed;
1048 struct work_struct rx_replenish;
1049 struct work_struct rf_kill;
1050 struct work_struct abort_scan;
1051 struct work_struct update_link_led;
1052 struct work_struct auth_work;
1053 struct work_struct report_work;
1054 struct work_struct request_scan;
1055 struct work_struct beacon_update;
1056
1057 struct tasklet_struct irq_tasklet;
1058
c90a74ba 1059 struct delayed_work set_power_save;
5d08cd1d
CH
1060 struct delayed_work init_alive_start;
1061 struct delayed_work alive_start;
5d08cd1d 1062 struct delayed_work scan_check;
4a8a4322
AK
1063
1064 /*For 3945 only*/
1065 struct delayed_work thermal_periodic;
2663516d 1066 struct delayed_work rfkill_poll;
4a8a4322 1067
630fe9b6
TW
1068 /* TX Power */
1069 s8 tx_power_user_lmt;
1070 s8 tx_power_channel_lmt;
5d08cd1d 1071
5d08cd1d 1072
d08853a3 1073#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1074 /* debugging info */
bf403db8 1075 u32 debug_level;
5d08cd1d
CH
1076 u32 framecnt_to_us;
1077 atomic_t restrict_refcnt;
712b6cf5
TW
1078#ifdef CONFIG_IWLWIFI_DEBUGFS
1079 /* debugfs */
1080 struct iwl_debugfs *dbgfs;
1081#endif /* CONFIG_IWLWIFI_DEBUGFS */
1082#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1083
1084 struct work_struct txpower_work;
445c2dff
TW
1085 u32 disable_sens_cal;
1086 u32 disable_chain_noise_cal;
203566f3 1087 u32 disable_tx_power_cal;
16e727e8 1088 struct work_struct run_time_calib_work;
5d08cd1d 1089 struct timer_list statistics_periodic;
4a8a4322
AK
1090
1091 /*For 3945*/
1092#define IWL_DEFAULT_TX_POWER 0x0F
4a8a4322 1093
4a8a4322
AK
1094 struct iwl3945_notif_statistics statistics_39;
1095
1096 struct iwl3945_station_entry stations_39[IWL_STATION_COUNT];
1097
4a8a4322 1098 u32 sta_supp_rates;
c79dd5b5 1099}; /*iwl_priv */
5d08cd1d 1100
36470749
RR
1101static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1102{
1103 set_bit(txq_id, &priv->txq_ctx_active_msk);
1104}
1105
1106static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1107{
1108 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1109}
1110
994d31f7 1111#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6
TW
1112const char *iwl_get_tx_fail_reason(u32 status);
1113#else
1114static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1115#endif
1116
1117
a332f8d6
TW
1118static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1119 int txq_id, int idx)
1120{
1121 if (priv->txq[txq_id].txb[idx].skb[0])
1122 return (struct ieee80211_hdr *)priv->txq[txq_id].
1123 txb[idx].skb[0]->data;
1124 return NULL;
1125}
a332f8d6
TW
1126
1127
3109ece1 1128static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1129{
1130 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1131}
1132
bf85ea4f 1133static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1134{
1135 if (ch_info == NULL)
1136 return 0;
1137 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1138}
1139
bf85ea4f 1140static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1141{
1142 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1143}
1144
bf85ea4f 1145static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1146{
8318d78a 1147 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1148}
1149
bf85ea4f 1150static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1151{
8318d78a 1152 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1153}
1154
bf85ea4f 1155static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1156{
1157 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1158}
1159
bf85ea4f 1160static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1161{
1162 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1163}
1164
be1f3ab6 1165#endif /* __iwl_dev_h__ */
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