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Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-eeprom-parse.c
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JB		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
62#include <linux/types.h>
63#include <linux/slab.h>
64#include <linux/export.h>
65#include "iwl-modparams.h"
66#include "iwl-eeprom-parse.h"
67
68/* EEPROM offset definitions */
69
70/* indirect access definitions */
71#define ADDRESS_MSK 0x0000FFFF
72#define INDIRECT_TYPE_MSK 0x000F0000
73#define INDIRECT_HOST 0x00010000
74#define INDIRECT_GENERAL 0x00020000
75#define INDIRECT_REGULATORY 0x00030000
76#define INDIRECT_CALIBRATION 0x00040000
77#define INDIRECT_PROCESS_ADJST 0x00050000
78#define INDIRECT_OTHERS 0x00060000
79#define INDIRECT_TXP_LIMIT 0x00070000
80#define INDIRECT_TXP_LIMIT_SIZE 0x00080000
81#define INDIRECT_ADDRESS 0x00100000
82
83/* corresponding link offsets in EEPROM */
84#define EEPROM_LINK_HOST (2*0x64)
85#define EEPROM_LINK_GENERAL (2*0x65)
86#define EEPROM_LINK_REGULATORY (2*0x66)
87#define EEPROM_LINK_CALIBRATION (2*0x67)
88#define EEPROM_LINK_PROCESS_ADJST (2*0x68)
89#define EEPROM_LINK_OTHERS (2*0x69)
90#define EEPROM_LINK_TXP_LIMIT (2*0x6a)
91#define EEPROM_LINK_TXP_LIMIT_SIZE (2*0x6b)
92
93/* General */
94#define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
95#define EEPROM_SUBSYSTEM_ID (2*0x0A) /* 2 bytes */
96#define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
97#define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
98#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
99#define EEPROM_VERSION (2*0x44) /* 2 bytes */
100#define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */
101#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
102#define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
103#define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */
104
105/* calibration */
106struct iwl_eeprom_calib_hdr {
107 u8 version;
108 u8 pa_type;
109 __le16 voltage;
110} __packed;
111
112#define EEPROM_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
113#define EEPROM_XTAL ((2*0x128) | EEPROM_CALIB_ALL)
114
115/* temperature */
116#define EEPROM_KELVIN_TEMPERATURE ((2*0x12A) | EEPROM_CALIB_ALL)
117#define EEPROM_RAW_TEMPERATURE ((2*0x12B) | EEPROM_CALIB_ALL)
118
119/*
120 * EEPROM bands
121 * These are the channel numbers from each band in the order
122 * that they are stored in the EEPROM band information. Note
123 * that EEPROM bands aren't the same as mac80211 bands, and
124 * there are even special "ht40 bands" in the EEPROM.
125 */
126static const u8 iwl_eeprom_band_1[14] = { /* 2.4 GHz */
127 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
128};
129
130static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
131 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
132};
133
134static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
135 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
136};
137
138static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
139 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
140};
141
142static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
143 145, 149, 153, 157, 161, 165
144};
145
146static const u8 iwl_eeprom_band_6[] = { /* 2.4 ht40 channel */
147 1, 2, 3, 4, 5, 6, 7
148};
149
150static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */
151 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
152};
153
154#define IWL_NUM_CHANNELS (ARRAY_SIZE(iwl_eeprom_band_1) + \
155 ARRAY_SIZE(iwl_eeprom_band_2) + \
156 ARRAY_SIZE(iwl_eeprom_band_3) + \
157 ARRAY_SIZE(iwl_eeprom_band_4) + \
158 ARRAY_SIZE(iwl_eeprom_band_5))
159
160/* rate data (static) */
161static struct ieee80211_rate iwl_cfg80211_rates[] = {
162 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
163 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
164 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
165 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
166 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
167 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
168 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
169 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
170 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
171 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
172 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
173 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
174 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
175 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
176 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
177};
178#define RATES_24_OFFS 0
179#define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
180#define RATES_52_OFFS 4
181#define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
182
183/* EEPROM reading functions */
184
185static u16 iwl_eeprom_query16(const u8 *eeprom, size_t eeprom_size, int offset)
186{
187 if (WARN_ON(offset + sizeof(u16) > eeprom_size))
188 return 0;
189 return le16_to_cpup((__le16 *)(eeprom + offset));
190}
191
192static u32 eeprom_indirect_address(const u8 *eeprom, size_t eeprom_size,
193 u32 address)
194{
195 u16 offset = 0;
196
197 if ((address & INDIRECT_ADDRESS) == 0)
198 return address;
199
200 switch (address & INDIRECT_TYPE_MSK) {
201 case INDIRECT_HOST:
202 offset = iwl_eeprom_query16(eeprom, eeprom_size,
203 EEPROM_LINK_HOST);
204 break;
205 case INDIRECT_GENERAL:
206 offset = iwl_eeprom_query16(eeprom, eeprom_size,
207 EEPROM_LINK_GENERAL);
208 break;
209 case INDIRECT_REGULATORY:
210 offset = iwl_eeprom_query16(eeprom, eeprom_size,
211 EEPROM_LINK_REGULATORY);
212 break;
213 case INDIRECT_TXP_LIMIT:
214 offset = iwl_eeprom_query16(eeprom, eeprom_size,
215 EEPROM_LINK_TXP_LIMIT);
216 break;
217 case INDIRECT_TXP_LIMIT_SIZE:
218 offset = iwl_eeprom_query16(eeprom, eeprom_size,
219 EEPROM_LINK_TXP_LIMIT_SIZE);
220 break;
221 case INDIRECT_CALIBRATION:
222 offset = iwl_eeprom_query16(eeprom, eeprom_size,
223 EEPROM_LINK_CALIBRATION);
224 break;
225 case INDIRECT_PROCESS_ADJST:
226 offset = iwl_eeprom_query16(eeprom, eeprom_size,
227 EEPROM_LINK_PROCESS_ADJST);
228 break;
229 case INDIRECT_OTHERS:
230 offset = iwl_eeprom_query16(eeprom, eeprom_size,
231 EEPROM_LINK_OTHERS);
232 break;
233 default:
234 WARN_ON(1);
235 break;
236 }
237
238 /* translate the offset from words to byte */
239 return (address & ADDRESS_MSK) + (offset << 1);
240}
241
242static const u8 *iwl_eeprom_query_addr(const u8 *eeprom, size_t eeprom_size,
243 u32 offset)
244{
245 u32 address = eeprom_indirect_address(eeprom, eeprom_size, offset);
246
247 if (WARN_ON(address >= eeprom_size))
248 return NULL;
249
250 return &eeprom[address];
251}
252
253static int iwl_eeprom_read_calib(const u8 *eeprom, size_t eeprom_size,
254 struct iwl_eeprom_data *data)
255{
256 struct iwl_eeprom_calib_hdr *hdr;
257
258 hdr = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size,
259 EEPROM_CALIB_ALL);
260 if (!hdr)
261 return -ENODATA;
262 data->calib_version = hdr->version;
263 data->calib_voltage = hdr->voltage;
264
265 return 0;
266}
267
268/**
269 * enum iwl_eeprom_channel_flags - channel flags in EEPROM
270 * @EEPROM_CHANNEL_VALID: channel is usable for this SKU/geo
271 * @EEPROM_CHANNEL_IBSS: usable as an IBSS channel
272 * @EEPROM_CHANNEL_ACTIVE: active scanning allowed
273 * @EEPROM_CHANNEL_RADAR: radar detection required
274 * @EEPROM_CHANNEL_WIDE: 20 MHz channel okay (?)
275 * @EEPROM_CHANNEL_DFS: dynamic freq selection candidate
276 */
277enum iwl_eeprom_channel_flags {
278 EEPROM_CHANNEL_VALID = BIT(0),
279 EEPROM_CHANNEL_IBSS = BIT(1),
280 EEPROM_CHANNEL_ACTIVE = BIT(3),
281 EEPROM_CHANNEL_RADAR = BIT(4),
282 EEPROM_CHANNEL_WIDE = BIT(5),
283 EEPROM_CHANNEL_DFS = BIT(7),
284};
285
286/**
287 * struct iwl_eeprom_channel - EEPROM channel data
288 * @flags: %EEPROM_CHANNEL_* flags
289 * @max_power_avg: max power (in dBm) on this channel, at most 31 dBm
290 */
291struct iwl_eeprom_channel {
292 u8 flags;
293 s8 max_power_avg;
294} __packed;
295
296
297enum iwl_eeprom_enhanced_txpwr_flags {
298 IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0),
299 IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1),
300 IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2),
301 IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3),
302 IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4),
303 IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5),
304 IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6),
305 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7),
306};
307
308/**
309 * iwl_eeprom_enhanced_txpwr structure
310 * @flags: entry flags
311 * @channel: channel number
312 * @chain_a_max_pwr: chain a max power in 1/2 dBm
313 * @chain_b_max_pwr: chain b max power in 1/2 dBm
314 * @chain_c_max_pwr: chain c max power in 1/2 dBm
315 * @delta_20_in_40: 20-in-40 deltas (hi/lo)
316 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm
317 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm
318 *
319 * This structure presents the enhanced regulatory tx power limit layout
320 * in an EEPROM image.
321 */
322struct iwl_eeprom_enhanced_txpwr {
323 u8 flags;
324 u8 channel;
325 s8 chain_a_max;
326 s8 chain_b_max;
327 s8 chain_c_max;
328 u8 delta_20_in_40;
329 s8 mimo2_max;
330 s8 mimo3_max;
331} __packed;
332
333static s8 iwl_get_max_txpwr_half_dbm(const struct iwl_eeprom_data *data,
334 struct iwl_eeprom_enhanced_txpwr *txp)
335{
336 s8 result = 0; /* (.5 dBm) */
337
338 /* Take the highest tx power from any valid chains */
339 if (data->valid_tx_ant & ANT_A && txp->chain_a_max > result)
340 result = txp->chain_a_max;
341
342 if (data->valid_tx_ant & ANT_B && txp->chain_b_max > result)
343 result = txp->chain_b_max;
344
345 if (data->valid_tx_ant & ANT_C && txp->chain_c_max > result)
346 result = txp->chain_c_max;
347
348 if ((data->valid_tx_ant == ANT_AB ||
349 data->valid_tx_ant == ANT_BC ||
350 data->valid_tx_ant == ANT_AC) && txp->mimo2_max > result)
351 result = txp->mimo2_max;
352
353 if (data->valid_tx_ant == ANT_ABC && txp->mimo3_max > result)
354 result = txp->mimo3_max;
355
356 return result;
357}
358
359#define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
360#define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
361#define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
362
363#define TXP_CHECK_AND_PRINT(x) \
364 ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) ? # x " " : "")
365
366static void
367iwl_eeprom_enh_txp_read_element(struct iwl_eeprom_data *data,
368 struct iwl_eeprom_enhanced_txpwr *txp,
369 int n_channels, s8 max_txpower_avg)
370{
371 int ch_idx;
372 enum ieee80211_band band;
373
374 band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
375 IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
376
377 for (ch_idx = 0; ch_idx < n_channels; ch_idx++) {
378 struct ieee80211_channel *chan = &data->channels[ch_idx];
379
380 /* update matching channel or from common data only */
381 if (txp->channel != 0 && chan->hw_value != txp->channel)
382 continue;
383
384 /* update matching band only */
385 if (band != chan->band)
386 continue;
387
388 if (chan->max_power < max_txpower_avg &&
389 !(txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ))
390 chan->max_power = max_txpower_avg;
391 }
392}
393
394static void iwl_eeprom_enhanced_txpower(struct device *dev,
395 struct iwl_eeprom_data *data,
396 const u8 *eeprom, size_t eeprom_size,
397 int n_channels)
398{
399 struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
400 int idx, entries;
401 __le16 *txp_len;
402 s8 max_txp_avg_halfdbm;
403
404 BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
405
406 /* the length is in 16-bit words, but we want entries */
407 txp_len = (__le16 *)iwl_eeprom_query_addr(eeprom, eeprom_size,
408 EEPROM_TXP_SZ_OFFS);
409 entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
410
411 txp_array = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size,
412 EEPROM_TXP_OFFS);
413
414 for (idx = 0; idx < entries; idx++) {
415 txp = &txp_array[idx];
416 /* skip invalid entries */
417 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
418 continue;
419
420 IWL_DEBUG_EEPROM(dev, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
421 (txp->channel && (txp->flags &
422 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
423 "Common " : (txp->channel) ?
424 "Channel" : "Common",
425 (txp->channel),
426 TXP_CHECK_AND_PRINT(VALID),
427 TXP_CHECK_AND_PRINT(BAND_52G),
428 TXP_CHECK_AND_PRINT(OFDM),
429 TXP_CHECK_AND_PRINT(40MHZ),
430 TXP_CHECK_AND_PRINT(HT_AP),
431 TXP_CHECK_AND_PRINT(RES1),
432 TXP_CHECK_AND_PRINT(RES2),
433 TXP_CHECK_AND_PRINT(COMMON_TYPE),
434 txp->flags);
435 IWL_DEBUG_EEPROM(dev,
436 "\t\t chain_A: 0x%02x chain_B: 0X%02x chain_C: 0X%02x\n",
437 txp->chain_a_max, txp->chain_b_max,
438 txp->chain_c_max);
439 IWL_DEBUG_EEPROM(dev,
440 "\t\t MIMO2: 0x%02x MIMO3: 0x%02x High 20_on_40: 0x%02x Low 20_on_40: 0x%02x\n",
441 txp->mimo2_max, txp->mimo3_max,
442 ((txp->delta_20_in_40 & 0xf0) >> 4),
443 (txp->delta_20_in_40 & 0x0f));
444
445 max_txp_avg_halfdbm = iwl_get_max_txpwr_half_dbm(data, txp);
446
447 iwl_eeprom_enh_txp_read_element(data, txp, n_channels,
448 DIV_ROUND_UP(max_txp_avg_halfdbm, 2));
449
450 if (max_txp_avg_halfdbm > data->max_tx_pwr_half_dbm)
451 data->max_tx_pwr_half_dbm = max_txp_avg_halfdbm;
452 }
453}
454
455static void iwl_init_band_reference(const struct iwl_cfg *cfg,
456 const u8 *eeprom, size_t eeprom_size,
457 int eeprom_band, int *eeprom_ch_count,
458 const struct iwl_eeprom_channel **ch_info,
459 const u8 **eeprom_ch_array)
460{
461 u32 offset = cfg->eeprom_params->regulatory_bands[eeprom_band - 1];
462
463 offset |= INDIRECT_ADDRESS | INDIRECT_REGULATORY;
464
465 *ch_info = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size, offset);
466
467 switch (eeprom_band) {
468 case 1: /* 2.4GHz band */
469 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
470 *eeprom_ch_array = iwl_eeprom_band_1;
471 break;
472 case 2: /* 4.9GHz band */
473 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
474 *eeprom_ch_array = iwl_eeprom_band_2;
475 break;
476 case 3: /* 5.2GHz band */
477 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
478 *eeprom_ch_array = iwl_eeprom_band_3;
479 break;
480 case 4: /* 5.5GHz band */
481 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
482 *eeprom_ch_array = iwl_eeprom_band_4;
483 break;
484 case 5: /* 5.7GHz band */
485 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
486 *eeprom_ch_array = iwl_eeprom_band_5;
487 break;
488 case 6: /* 2.4GHz ht40 channels */
489 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
490 *eeprom_ch_array = iwl_eeprom_band_6;
491 break;
492 case 7: /* 5 GHz ht40 channels */
493 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
494 *eeprom_ch_array = iwl_eeprom_band_7;
495 break;
496 default:
497 *eeprom_ch_count = 0;
498 *eeprom_ch_array = NULL;
499 WARN_ON(1);
500 }
501}
502
503#define CHECK_AND_PRINT(x) \
504 ((eeprom_ch->flags & EEPROM_CHANNEL_##x) ? # x " " : "")
505
506static void iwl_mod_ht40_chan_info(struct device *dev,
507 struct iwl_eeprom_data *data, int n_channels,
508 enum ieee80211_band band, u16 channel,
509 const struct iwl_eeprom_channel *eeprom_ch,
510 u8 clear_ht40_extension_channel)
511{
512 struct ieee80211_channel *chan = NULL;
513 int i;
514
515 for (i = 0; i < n_channels; i++) {
516 if (data->channels[i].band != band)
517 continue;
518 if (data->channels[i].hw_value != channel)
519 continue;
520 chan = &data->channels[i];
521 break;
522 }
523
524 if (!chan)
525 return;
526
527 IWL_DEBUG_EEPROM(dev,
528 "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
529 channel,
530 band == IEEE80211_BAND_5GHZ ? "5.2" : "2.4",
531 CHECK_AND_PRINT(IBSS),
532 CHECK_AND_PRINT(ACTIVE),
533 CHECK_AND_PRINT(RADAR),
534 CHECK_AND_PRINT(WIDE),
535 CHECK_AND_PRINT(DFS),
536 eeprom_ch->flags,
537 eeprom_ch->max_power_avg,
538 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
539 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? ""
540 : "not ");
541
542 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
543 chan->flags &= ~clear_ht40_extension_channel;
544}
545
546#define CHECK_AND_PRINT_I(x) \
547 ((eeprom_ch_info[ch_idx].flags & EEPROM_CHANNEL_##x) ? # x " " : "")
548
549static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
550 struct iwl_eeprom_data *data,
551 const u8 *eeprom, size_t eeprom_size)
552{
553 int band, ch_idx;
554 const struct iwl_eeprom_channel *eeprom_ch_info;
555 const u8 *eeprom_ch_array;
556 int eeprom_ch_count;
557 int n_channels = 0;
558
559 /*
560 * Loop through the 5 EEPROM bands and add them to the parse list
561 */
562 for (band = 1; band <= 5; band++) {
563 struct ieee80211_channel *channel;
564
565 iwl_init_band_reference(cfg, eeprom, eeprom_size, band,
566 &eeprom_ch_count, &eeprom_ch_info,
567 &eeprom_ch_array);
568
569 /* Loop through each band adding each of the channels */
570 for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) {
571 const struct iwl_eeprom_channel *eeprom_ch;
572
573 eeprom_ch = &eeprom_ch_info[ch_idx];
574
575 if (!(eeprom_ch->flags & EEPROM_CHANNEL_VALID)) {
576 IWL_DEBUG_EEPROM(dev,
577 "Ch. %d Flags %x [%sGHz] - No traffic\n",
578 eeprom_ch_array[ch_idx],
579 eeprom_ch_info[ch_idx].flags,
580 (band != 1) ? "5.2" : "2.4");
581 continue;
582 }
583
584 channel = &data->channels[n_channels];
585 n_channels++;
586
587 channel->hw_value = eeprom_ch_array[ch_idx];
588 channel->band = (band == 1) ? IEEE80211_BAND_2GHZ
589 : IEEE80211_BAND_5GHZ;
590 channel->center_freq =
591 ieee80211_channel_to_frequency(
592 channel->hw_value, channel->band);
593
594 /* set no-HT40, will enable as appropriate later */
595 channel->flags = IEEE80211_CHAN_NO_HT40;
596
597 if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS))
598 channel->flags |= IEEE80211_CHAN_NO_IBSS;
599
600 if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE))
601 channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
602
603 if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR)
604 channel->flags |= IEEE80211_CHAN_RADAR;
605
606 /* Initialize regulatory-based run-time data */
607 channel->max_power =
608 eeprom_ch_info[ch_idx].max_power_avg;
609 IWL_DEBUG_EEPROM(dev,
610 "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
611 channel->hw_value,
612 (band != 1) ? "5.2" : "2.4",
613 CHECK_AND_PRINT_I(VALID),
614 CHECK_AND_PRINT_I(IBSS),
615 CHECK_AND_PRINT_I(ACTIVE),
616 CHECK_AND_PRINT_I(RADAR),
617 CHECK_AND_PRINT_I(WIDE),
618 CHECK_AND_PRINT_I(DFS),
619 eeprom_ch_info[ch_idx].flags,
620 eeprom_ch_info[ch_idx].max_power_avg,
621 ((eeprom_ch_info[ch_idx].flags &
622 EEPROM_CHANNEL_IBSS) &&
623 !(eeprom_ch_info[ch_idx].flags &
624 EEPROM_CHANNEL_RADAR))
625 ? "" : "not ");
626 }
627 }
628
629 if (cfg->eeprom_params->enhanced_txpower) {
630 /*
631 * for newer device (6000 series and up)
632 * EEPROM contain enhanced tx power information
633 * driver need to process addition information
634 * to determine the max channel tx power limits
635 */
636 iwl_eeprom_enhanced_txpower(dev, data, eeprom, eeprom_size,
637 n_channels);
638 } else {
639 /* All others use data from channel map */
640 int i;
641
642 data->max_tx_pwr_half_dbm = -128;
643
644 for (i = 0; i < n_channels; i++)
645 data->max_tx_pwr_half_dbm =
646 max_t(s8, data->max_tx_pwr_half_dbm,
647 data->channels[i].max_power * 2);
648 }
649
650 /* Check if we do have HT40 channels */
651 if (cfg->eeprom_params->regulatory_bands[5] ==
652 EEPROM_REGULATORY_BAND_NO_HT40 &&
653 cfg->eeprom_params->regulatory_bands[6] ==
654 EEPROM_REGULATORY_BAND_NO_HT40)
655 return n_channels;
656
657 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
658 for (band = 6; band <= 7; band++) {
659 enum ieee80211_band ieeeband;
660
661 iwl_init_band_reference(cfg, eeprom, eeprom_size, band,
662 &eeprom_ch_count, &eeprom_ch_info,
663 &eeprom_ch_array);
664
665 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
666 ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ
667 : IEEE80211_BAND_5GHZ;
668
669 /* Loop through each band adding each of the channels */
670 for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) {
671 /* Set up driver's info for lower half */
672 iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband,
673 eeprom_ch_array[ch_idx],
674 &eeprom_ch_info[ch_idx],
675 IEEE80211_CHAN_NO_HT40PLUS);
676
677 /* Set up driver's info for upper half */
678 iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband,
679 eeprom_ch_array[ch_idx] + 4,
680 &eeprom_ch_info[ch_idx],
681 IEEE80211_CHAN_NO_HT40MINUS);
682 }
683 }
684
685 return n_channels;
686}
687
688static int iwl_init_sband_channels(struct iwl_eeprom_data *data,
689 struct ieee80211_supported_band *sband,
690 int n_channels, enum ieee80211_band band)
691{
692 struct ieee80211_channel *chan = &data->channels[0];
693 int n = 0, idx = 0;
694
695 while (chan->band != band && idx < n_channels)
696 chan = &data->channels[++idx];
697
698 sband->channels = &data->channels[idx];
699
700 while (chan->band == band && idx < n_channels) {
701 chan = &data->channels[++idx];
702 n++;
703 }
704
705 sband->n_channels = n;
706
707 return n;
708}
709
710#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
711#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
712
713static void iwl_init_ht_hw_capab(const struct iwl_cfg *cfg,
714 struct iwl_eeprom_data *data,
715 struct ieee80211_sta_ht_cap *ht_info,
716 enum ieee80211_band band)
717{
718 int max_bit_rate = 0;
719 u8 rx_chains;
720 u8 tx_chains;
721
722 tx_chains = hweight8(data->valid_tx_ant);
723 if (cfg->rx_with_siso_diversity)
724 rx_chains = 1;
725 else
726 rx_chains = hweight8(data->valid_rx_ant);
727
728 if (!(data->sku & EEPROM_SKU_CAP_11N_ENABLE) || !cfg->ht_params) {
729 ht_info->ht_supported = false;
730 return;
731 }
732
733 ht_info->ht_supported = true;
734 ht_info->cap = 0;
735
736 if (iwlwifi_mod_params.amsdu_size_8K)
737 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
738
739 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
740 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_4;
741
742 ht_info->mcs.rx_mask[0] = 0xFF;
743 if (rx_chains >= 2)
744 ht_info->mcs.rx_mask[1] = 0xFF;
745 if (rx_chains >= 3)
746 ht_info->mcs.rx_mask[2] = 0xFF;
747
748 if (cfg->ht_params->ht_greenfield_support)
749 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
750 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
751
752 max_bit_rate = MAX_BIT_RATE_20_MHZ;
753
754 if (cfg->ht_params->ht40_bands & BIT(band)) {
755 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
756 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
757 ht_info->mcs.rx_mask[4] = 0x01;
758 max_bit_rate = MAX_BIT_RATE_40_MHZ;
759 }
760
761 /* Highest supported Rx data rate */
762 max_bit_rate *= rx_chains;
763 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
764 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
765
766 /* Tx MCS capabilities */
767 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
768 if (tx_chains != rx_chains) {
769 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
770 ht_info->mcs.tx_params |= ((tx_chains - 1) <<
771 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
772 }
773}
774
775static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
776 struct iwl_eeprom_data *data,
777 const u8 *eeprom, size_t eeprom_size)
778{
779 int n_channels = iwl_init_channel_map(dev, cfg, data,
780 eeprom, eeprom_size);
781 int n_used = 0;
782 struct ieee80211_supported_band *sband;
783
784 sband = &data->bands[IEEE80211_BAND_2GHZ];
785 sband->band = IEEE80211_BAND_2GHZ;
786 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
787 sband->n_bitrates = N_RATES_24;
788 n_used += iwl_init_sband_channels(data, sband, n_channels,
789 IEEE80211_BAND_2GHZ);
790 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ);
791
792 sband = &data->bands[IEEE80211_BAND_5GHZ];
793 sband->band = IEEE80211_BAND_5GHZ;
794 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
795 sband->n_bitrates = N_RATES_52;
796 n_used += iwl_init_sband_channels(data, sband, n_channels,
797 IEEE80211_BAND_5GHZ);
798 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ);
799
800 if (n_channels != n_used)
801 IWL_ERR_DEV(dev, "EEPROM: used only %d of %d channels\n",
802 n_used, n_channels);
803}
804
805/* EEPROM data functions */
806
807struct iwl_eeprom_data *
808iwl_parse_eeprom_data(struct device *dev, const struct iwl_cfg *cfg,
809 const u8 *eeprom, size_t eeprom_size)
810{
811 struct iwl_eeprom_data *data;
812 const void *tmp;
813
814 if (WARN_ON(!cfg || !cfg->eeprom_params))
815 return NULL;
816
817 data = kzalloc(sizeof(*data) +
818 sizeof(struct ieee80211_channel) * IWL_NUM_CHANNELS,
819 GFP_KERNEL);
820 if (!data)
821 return NULL;
822
823 /* get MAC address(es) */
824 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_MAC_ADDRESS);
825 if (!tmp)
826 goto err_free;
827 memcpy(data->hw_addr, tmp, ETH_ALEN);
828 data->n_hw_addrs = iwl_eeprom_query16(eeprom, eeprom_size,
829 EEPROM_NUM_MAC_ADDRESS);
830
831 if (iwl_eeprom_read_calib(eeprom, eeprom_size, data))
832 goto err_free;
833
834 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_XTAL);
835 if (!tmp)
836 goto err_free;
837 memcpy(data->xtal_calib, tmp, sizeof(data->xtal_calib));
838
839 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size,
840 EEPROM_RAW_TEMPERATURE);
841 if (!tmp)
842 goto err_free;
843 data->raw_temperature = *(__le16 *)tmp;
844
845 tmp = iwl_eeprom_query_addr(eeprom, eeprom_size,
846 EEPROM_KELVIN_TEMPERATURE);
847 if (!tmp)
848 goto err_free;
849 data->kelvin_temperature = *(__le16 *)tmp;
850 data->kelvin_voltage = *((__le16 *)tmp + 1);
851
852 data->radio_cfg = iwl_eeprom_query16(eeprom, eeprom_size,
853 EEPROM_RADIO_CONFIG);
854 data->sku = iwl_eeprom_query16(eeprom, eeprom_size,
855 EEPROM_SKU_CAP);
63d76dc0
JB		 856 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
857 data->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
858
26a7ca9a
JB		 859 data->eeprom_version = iwl_eeprom_query16(eeprom, eeprom_size,
860 EEPROM_VERSION);
861
862 data->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(data->radio_cfg);
863 data->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(data->radio_cfg);
864
865 /* check overrides (some devices have wrong EEPROM) */
866 if (cfg->valid_tx_ant)
867 data->valid_tx_ant = cfg->valid_tx_ant;
868 if (cfg->valid_rx_ant)
869 data->valid_rx_ant = cfg->valid_rx_ant;
870
871 if (!data->valid_tx_ant || !data->valid_rx_ant) {
872 IWL_ERR_DEV(dev, "invalid antennas (0x%x, 0x%x)\n",
873 data->valid_tx_ant, data->valid_rx_ant);
874 goto err_free;
875 }
876
877 iwl_init_sbands(dev, cfg, data, eeprom, eeprom_size);
878
879 return data;
880 err_free:
881 kfree(data);
882 return NULL;
883}
884EXPORT_SYMBOL_GPL(iwl_parse_eeprom_data);
885
886/* helper functions */
887int iwl_eeprom_check_version(struct iwl_eeprom_data *data,
888 struct iwl_trans *trans)
889{
890 if (data->eeprom_version >= trans->cfg->eeprom_ver ||
891 data->calib_version >= trans->cfg->eeprom_calib_ver) {
892 IWL_INFO(trans, "device EEPROM VER=0x%x, CALIB=0x%x\n",
893 data->eeprom_version, data->calib_version);
894 return 0;
895 }
896
897 IWL_ERR(trans,
898 "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
899 data->eeprom_version, trans->cfg->eeprom_ver,
900 data->calib_version, trans->cfg->eeprom_calib_ver);
901 return -EINVAL;
902}
903EXPORT_SYMBOL_GPL(iwl_eeprom_check_version);
Linux kernel - Deliverables
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