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1bd3cbc1 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
8 | * Copyright(c) 2014 Intel Corporation. All rights reserved. | |
4203263d | 9 | * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH |
1bd3cbc1 EG |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of version 2 of the GNU General Public License as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
23 | * USA | |
24 | * | |
25 | * The full GNU General Public License is included in this distribution | |
26 | * in the file called COPYING. | |
27 | * | |
28 | * Contact Information: | |
29 | * Intel Linux Wireless <ilw@linux.intel.com> | |
30 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
31 | * | |
32 | * BSD LICENSE | |
33 | * | |
34 | * Copyright(c) 2014 Intel Corporation. All rights reserved. | |
4203263d | 35 | * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH |
1bd3cbc1 EG |
36 | * All rights reserved. |
37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | |
41 | * | |
42 | * * Redistributions of source code must retain the above copyright | |
43 | * notice, this list of conditions and the following disclaimer. | |
44 | * * Redistributions in binary form must reproduce the above copyright | |
45 | * notice, this list of conditions and the following disclaimer in | |
46 | * the documentation and/or other materials provided with the | |
47 | * distribution. | |
48 | * * Neither the name Intel Corporation nor the names of its | |
49 | * contributors may be used to endorse or promote products derived | |
50 | * from this software without specific prior written permission. | |
51 | * | |
52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
53 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
54 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
55 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
56 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
57 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
58 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
59 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
60 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
61 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
63 | *****************************************************************************/ | |
64 | ||
65 | #ifndef __fw_error_dump_h__ | |
66 | #define __fw_error_dump_h__ | |
67 | ||
68 | #include <linux/types.h> | |
69 | ||
70 | #define IWL_FW_ERROR_DUMP_BARKER 0x14789632 | |
71 | ||
72 | /** | |
73 | * enum iwl_fw_error_dump_type - types of data in the dump file | |
473ad712 | 74 | * @IWL_FW_ERROR_DUMP_CSR: Control Status Registers - from offset 0 |
7b445f35 | 75 | * @IWL_FW_ERROR_DUMP_RXF: |
4d075007 JB |
76 | * @IWL_FW_ERROR_DUMP_TXCMD: last TX command data, structured as |
77 | * &struct iwl_fw_error_dump_txcmd packets | |
06ddbf5a EG |
78 | * @IWL_FW_ERROR_DUMP_DEV_FW_INFO: struct %iwl_fw_error_dump_info |
79 | * info on the device / firmware. | |
c2d20201 | 80 | * @IWL_FW_ERROR_DUMP_FW_MONITOR: firmware monitor |
67c65f2c EG |
81 | * @IWL_FW_ERROR_DUMP_PRPH: range of periphery registers - there can be several |
82 | * sections like this in a single file. | |
06d51e0d | 83 | * @IWL_FW_ERROR_DUMP_FH_REGS: range of FH registers |
e06d8437 | 84 | * @IWL_FW_ERROR_DUMP_MEM: chunk of memory |
b6eaa45a EG |
85 | * @IWL_FW_ERROR_DUMP_ERROR_INFO: description of what triggered this dump. |
86 | * Structured as &struct iwl_fw_error_dump_trigger_desc. | |
bd7fc617 EG |
87 | * @IWL_FW_ERROR_DUMP_RB: the content of an RB structured as |
88 | * &struct iwl_fw_error_dump_rb | |
f0afea54 MG |
89 | * @IWL_FW_ERROR_PAGING: UMAC's image memory segments which were |
90 | * paged to the DRAM. | |
1bd3cbc1 EG |
91 | */ |
92 | enum iwl_fw_error_dump_type { | |
a549b296 | 93 | /* 0 is deprecated */ |
473ad712 | 94 | IWL_FW_ERROR_DUMP_CSR = 1, |
7b445f35 | 95 | IWL_FW_ERROR_DUMP_RXF = 2, |
4d075007 | 96 | IWL_FW_ERROR_DUMP_TXCMD = 3, |
06ddbf5a | 97 | IWL_FW_ERROR_DUMP_DEV_FW_INFO = 4, |
c2d20201 | 98 | IWL_FW_ERROR_DUMP_FW_MONITOR = 5, |
67c65f2c | 99 | IWL_FW_ERROR_DUMP_PRPH = 6, |
06d51e0d LK |
100 | IWL_FW_ERROR_DUMP_TXF = 7, |
101 | IWL_FW_ERROR_DUMP_FH_REGS = 8, | |
e06d8437 | 102 | IWL_FW_ERROR_DUMP_MEM = 9, |
b6eaa45a | 103 | IWL_FW_ERROR_DUMP_ERROR_INFO = 10, |
bd7fc617 | 104 | IWL_FW_ERROR_DUMP_RB = 11, |
f0afea54 | 105 | IWL_FW_ERROR_DUMP_PAGING = 12, |
1bd3cbc1 EG |
106 | |
107 | IWL_FW_ERROR_DUMP_MAX, | |
108 | }; | |
109 | ||
110 | /** | |
111 | * struct iwl_fw_error_dump_data - data for one type | |
112 | * @type: %enum iwl_fw_error_dump_type | |
d4849277 EG |
113 | * @len: the length starting from %data |
114 | * @data: the data itself | |
1bd3cbc1 EG |
115 | */ |
116 | struct iwl_fw_error_dump_data { | |
117 | __le32 type; | |
118 | __le32 len; | |
119 | __u8 data[]; | |
7b445f35 | 120 | } __packed; |
1bd3cbc1 EG |
121 | |
122 | /** | |
123 | * struct iwl_fw_error_dump_file - the layout of the header of the file | |
124 | * @barker: must be %IWL_FW_ERROR_DUMP_BARKER | |
125 | * @file_len: the length of all the file starting from %barker | |
126 | * @data: array of %struct iwl_fw_error_dump_data | |
127 | */ | |
128 | struct iwl_fw_error_dump_file { | |
129 | __le32 barker; | |
130 | __le32 file_len; | |
131 | u8 data[0]; | |
7b445f35 | 132 | } __packed; |
1bd3cbc1 | 133 | |
4d075007 JB |
134 | /** |
135 | * struct iwl_fw_error_dump_txcmd - TX command data | |
136 | * @cmdlen: original length of command | |
137 | * @caplen: captured length of command (may be less) | |
138 | * @data: captured command data, @caplen bytes | |
139 | */ | |
140 | struct iwl_fw_error_dump_txcmd { | |
141 | __le32 cmdlen; | |
142 | __le32 caplen; | |
143 | u8 data[]; | |
144 | } __packed; | |
145 | ||
04fd2c28 LK |
146 | /** |
147 | * struct iwl_fw_error_dump_fifo - RX/TX FIFO data | |
148 | * @fifo_num: number of FIFO (starting from 0) | |
149 | * @available_bytes: num of bytes available in FIFO (may be less than FIFO size) | |
150 | * @wr_ptr: position of write pointer | |
151 | * @rd_ptr: position of read pointer | |
152 | * @fence_ptr: position of fence pointer | |
153 | * @fence_mode: the current mode of the fence (before locking) - | |
154 | * 0=follow RD pointer ; 1 = freeze | |
155 | * @data: all of the FIFO's data | |
156 | */ | |
157 | struct iwl_fw_error_dump_fifo { | |
158 | __le32 fifo_num; | |
159 | __le32 available_bytes; | |
160 | __le32 wr_ptr; | |
161 | __le32 rd_ptr; | |
162 | __le32 fence_ptr; | |
163 | __le32 fence_mode; | |
164 | u8 data[]; | |
165 | } __packed; | |
166 | ||
06ddbf5a EG |
167 | enum iwl_fw_error_dump_family { |
168 | IWL_FW_ERROR_DUMP_FAMILY_7 = 7, | |
169 | IWL_FW_ERROR_DUMP_FAMILY_8 = 8, | |
170 | }; | |
171 | ||
172 | /** | |
173 | * struct iwl_fw_error_dump_info - info on the device / firmware | |
174 | * @device_family: the family of the device (7 / 8) | |
175 | * @hw_step: the step of the device | |
176 | * @fw_human_readable: human readable FW version | |
177 | * @dev_human_readable: name of the device | |
178 | * @bus_human_readable: name of the bus used | |
179 | */ | |
180 | struct iwl_fw_error_dump_info { | |
181 | __le32 device_family; | |
182 | __le32 hw_step; | |
183 | u8 fw_human_readable[FW_VER_HUMAN_READABLE_SZ]; | |
184 | u8 dev_human_readable[64]; | |
185 | u8 bus_human_readable[8]; | |
186 | } __packed; | |
187 | ||
c2d20201 | 188 | /** |
c544e9c4 | 189 | * struct iwl_fw_error_dump_fw_mon - FW monitor data |
c2d20201 EG |
190 | * @fw_mon_wr_ptr: the position of the write pointer in the cyclic buffer |
191 | * @fw_mon_base_ptr: base pointer of the data | |
0d365ae5 | 192 | * @fw_mon_cycle_cnt: number of wraparounds |
c2d20201 EG |
193 | * @reserved: for future use |
194 | * @data: captured data | |
195 | */ | |
c544e9c4 | 196 | struct iwl_fw_error_dump_fw_mon { |
c2d20201 EG |
197 | __le32 fw_mon_wr_ptr; |
198 | __le32 fw_mon_base_ptr; | |
199 | __le32 fw_mon_cycle_cnt; | |
200 | __le32 reserved[3]; | |
201 | u8 data[]; | |
202 | } __packed; | |
203 | ||
67c65f2c EG |
204 | /** |
205 | * struct iwl_fw_error_dump_prph - periphery registers data | |
206 | * @prph_start: address of the first register in this chunk | |
207 | * @data: the content of the registers | |
208 | */ | |
209 | struct iwl_fw_error_dump_prph { | |
210 | __le32 prph_start; | |
211 | __le32 data[]; | |
212 | }; | |
213 | ||
e06d8437 EG |
214 | enum iwl_fw_error_dump_mem_type { |
215 | IWL_FW_ERROR_DUMP_MEM_SRAM, | |
216 | IWL_FW_ERROR_DUMP_MEM_SMEM, | |
217 | }; | |
218 | ||
219 | /** | |
220 | * struct iwl_fw_error_dump_mem - chunk of memory | |
221 | * @type: %enum iwl_fw_error_dump_mem_type | |
222 | * @offset: the offset from which the memory was read | |
223 | * @data: the content of the memory | |
224 | */ | |
225 | struct iwl_fw_error_dump_mem { | |
226 | __le32 type; | |
227 | __le32 offset; | |
228 | u8 data[]; | |
229 | }; | |
230 | ||
bd7fc617 EG |
231 | /** |
232 | * struct iwl_fw_error_dump_rb - content of an Receive Buffer | |
233 | * @index: the index of the Receive Buffer in the Rx queue | |
234 | * @rxq: the RB's Rx queue | |
235 | * @reserved: | |
236 | * @data: the content of the Receive Buffer | |
237 | */ | |
238 | struct iwl_fw_error_dump_rb { | |
239 | __le32 index; | |
240 | __le32 rxq; | |
241 | __le32 reserved; | |
242 | u8 data[]; | |
243 | }; | |
244 | ||
f0afea54 MG |
245 | /** |
246 | * struct iwl_fw_error_dump_paging - content of the UMAC's image page | |
247 | * block on DRAM | |
248 | * @index: the index of the page block | |
249 | * @reserved: | |
250 | * @data: the content of the page block | |
251 | */ | |
252 | struct iwl_fw_error_dump_paging { | |
253 | __le32 index; | |
254 | __le32 reserved; | |
255 | u8 data[]; | |
256 | }; | |
257 | ||
4d075007 | 258 | /** |
1fa16056 | 259 | * iwl_fw_error_next_data - advance fw error dump data pointer |
4d075007 JB |
260 | * @data: previous data block |
261 | * Returns: next data block | |
262 | */ | |
263 | static inline struct iwl_fw_error_dump_data * | |
1fa16056 | 264 | iwl_fw_error_next_data(struct iwl_fw_error_dump_data *data) |
4d075007 JB |
265 | { |
266 | return (void *)(data->data + le32_to_cpu(data->len)); | |
267 | } | |
268 | ||
d2709ad7 EG |
269 | /** |
270 | * enum iwl_fw_dbg_trigger - triggers available | |
271 | * | |
272 | * @FW_DBG_TRIGGER_USER: trigger log collection by user | |
273 | * This should not be defined as a trigger to the driver, but a value the | |
274 | * driver should set to indicate that the trigger was initiated by the | |
275 | * user. | |
276 | * @FW_DBG_TRIGGER_FW_ASSERT: trigger log collection when the firmware asserts | |
9d761fd8 EG |
277 | * @FW_DBG_TRIGGER_MISSED_BEACONS: trigger log collection when beacons are |
278 | * missed. | |
f35d9c55 | 279 | * @FW_DBG_TRIGGER_CHANNEL_SWITCH: trigger log collection upon channel switch. |
917f39bb EG |
280 | * @FW_DBG_TRIGGER_FW_NOTIF: trigger log collection when the firmware sends a |
281 | * command response or a notification. | |
d42f5350 | 282 | * @FW_DBG_TRIGGER_MLME: trigger log collection upon MLME event. |
5a756c20 | 283 | * @FW_DBG_TRIGGER_STATS: trigger log collection upon statistics threshold. |
3ec50b5e EG |
284 | * @FW_DBG_TRIGGER_RSSI: trigger log collection when the rssi of the beacon |
285 | * goes below a threshold. | |
5d42e7b2 EG |
286 | * @FW_DBG_TRIGGER_TXQ_TIMERS: configures the timers for the Tx queue hang |
287 | * detection. | |
874c174e EG |
288 | * @FW_DBG_TRIGGER_TIME_EVENT: trigger log collection upon time events related |
289 | * events. | |
4203263d | 290 | * @FW_DBG_TRIGGER_BA: trigger log collection upon BlockAck related events. |
d2709ad7 EG |
291 | */ |
292 | enum iwl_fw_dbg_trigger { | |
293 | FW_DBG_TRIGGER_INVALID = 0, | |
294 | FW_DBG_TRIGGER_USER, | |
295 | FW_DBG_TRIGGER_FW_ASSERT, | |
9d761fd8 | 296 | FW_DBG_TRIGGER_MISSED_BEACONS, |
f35d9c55 | 297 | FW_DBG_TRIGGER_CHANNEL_SWITCH, |
917f39bb | 298 | FW_DBG_TRIGGER_FW_NOTIF, |
d42f5350 | 299 | FW_DBG_TRIGGER_MLME, |
5a756c20 | 300 | FW_DBG_TRIGGER_STATS, |
3ec50b5e | 301 | FW_DBG_TRIGGER_RSSI, |
5d42e7b2 | 302 | FW_DBG_TRIGGER_TXQ_TIMERS, |
874c174e | 303 | FW_DBG_TRIGGER_TIME_EVENT, |
4203263d | 304 | FW_DBG_TRIGGER_BA, |
d2709ad7 EG |
305 | |
306 | /* must be last */ | |
307 | FW_DBG_TRIGGER_MAX, | |
308 | }; | |
309 | ||
b6eaa45a EG |
310 | /** |
311 | * struct iwl_fw_error_dump_trigger_desc - describes the trigger condition | |
312 | * @type: %enum iwl_fw_dbg_trigger | |
313 | * @data: raw data about what happened | |
314 | */ | |
315 | struct iwl_fw_error_dump_trigger_desc { | |
316 | __le32 type; | |
317 | u8 data[]; | |
318 | }; | |
319 | ||
1bd3cbc1 | 320 | #endif /* __fw_error_dump_h__ */ |