iwlwifi: virtualize iwl_{grab,release}_nic_access
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-io.c
CommitLineData
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1/******************************************************************************
2 *
4e318262 3 * Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Intel Linux Wireless <ilw@linux.intel.com>
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *
27 *****************************************************************************/
83ed9015
EG
28#include <linux/delay.h>
29#include <linux/device.h>
cc5f7e39 30#include <linux/export.h>
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31
32#include "iwl-io.h"
6ac7d115 33#include "iwl-csr.h"
83ed9015 34#include "iwl-debug.h"
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35
36#define IWL_POLL_INTERVAL 10 /* microseconds */
37
7a65d170 38void __iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
02a7fa00 39{
1042db2a 40 iwl_write32(trans, reg, iwl_read32(trans, reg) | mask);
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41}
42
7a65d170 43void __iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
02a7fa00 44{
1042db2a 45 iwl_write32(trans, reg, iwl_read32(trans, reg) & ~mask);
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46}
47
1042db2a 48void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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49{
50 unsigned long flags;
51
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52 spin_lock_irqsave(&trans->reg_lock, flags);
53 __iwl_set_bit(trans, reg, mask);
54 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 55}
cc5f7e39 56EXPORT_SYMBOL_GPL(iwl_set_bit);
02a7fa00 57
1042db2a 58void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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59{
60 unsigned long flags;
61
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62 spin_lock_irqsave(&trans->reg_lock, flags);
63 __iwl_clear_bit(trans, reg, mask);
64 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 65}
cc5f7e39 66EXPORT_SYMBOL_GPL(iwl_clear_bit);
02a7fa00 67
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68void iwl_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
69{
70 unsigned long flags;
71 u32 v;
72
73#ifdef CONFIG_IWLWIFI_DEBUG
74 WARN_ON_ONCE(value & ~mask);
75#endif
76
77 spin_lock_irqsave(&trans->reg_lock, flags);
78 v = iwl_read32(trans, reg);
79 v &= ~mask;
80 v |= value;
81 iwl_write32(trans, reg, v);
82 spin_unlock_irqrestore(&trans->reg_lock, flags);
83}
84EXPORT_SYMBOL_GPL(iwl_set_bits_mask);
85
1042db2a 86int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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87 u32 bits, u32 mask, int timeout)
88{
89 int t = 0;
90
91 do {
1042db2a 92 if ((iwl_read32(trans, addr) & mask) == (bits & mask))
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93 return t;
94 udelay(IWL_POLL_INTERVAL);
95 t += IWL_POLL_INTERVAL;
96 } while (t < timeout);
97
98 return -ETIMEDOUT;
99}
cc5f7e39 100EXPORT_SYMBOL_GPL(iwl_poll_bit);
02a7fa00 101
1042db2a 102u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
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103{
104 u32 value;
105 unsigned long flags;
106
1042db2a 107 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 108 iwl_trans_grab_nic_access(trans, false);
1042db2a 109 value = iwl_read32(trans, reg);
7a65d170 110 iwl_trans_release_nic_access(trans);
1042db2a 111 spin_unlock_irqrestore(&trans->reg_lock, flags);
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112
113 return value;
114}
cc5f7e39 115EXPORT_SYMBOL_GPL(iwl_read_direct32);
02a7fa00 116
1042db2a 117void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
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118{
119 unsigned long flags;
120
1042db2a 121 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 122 if (likely(iwl_trans_grab_nic_access(trans, false))) {
1042db2a 123 iwl_write32(trans, reg, value);
7a65d170 124 iwl_trans_release_nic_access(trans);
02a7fa00 125 }
1042db2a 126 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 127}
cc5f7e39 128EXPORT_SYMBOL_GPL(iwl_write_direct32);
02a7fa00 129
1042db2a 130int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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131 int timeout)
132{
133 int t = 0;
134
135 do {
1042db2a 136 if ((iwl_read_direct32(trans, addr) & mask) == mask)
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137 return t;
138 udelay(IWL_POLL_INTERVAL);
139 t += IWL_POLL_INTERVAL;
140 } while (t < timeout);
141
142 return -ETIMEDOUT;
143}
cc5f7e39 144EXPORT_SYMBOL_GPL(iwl_poll_direct_bit);
02a7fa00 145
6a06b6c1 146static inline u32 __iwl_read_prph(struct iwl_trans *trans, u32 ofs)
02a7fa00 147{
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148 u32 val = iwl_trans_read_prph(trans, ofs);
149 trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
150 return val;
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151}
152
6a06b6c1 153static inline void __iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
02a7fa00 154{
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155 trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
156 iwl_trans_write_prph(trans, ofs, val);
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157}
158
6a06b6c1 159u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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160{
161 unsigned long flags;
162 u32 val;
163
1042db2a 164 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 165 iwl_trans_grab_nic_access(trans, false);
6a06b6c1 166 val = __iwl_read_prph(trans, ofs);
7a65d170 167 iwl_trans_release_nic_access(trans);
1042db2a 168 spin_unlock_irqrestore(&trans->reg_lock, flags);
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169 return val;
170}
cc5f7e39 171EXPORT_SYMBOL_GPL(iwl_read_prph);
02a7fa00 172
6a06b6c1 173void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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174{
175 unsigned long flags;
176
1042db2a 177 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 178 if (likely(iwl_trans_grab_nic_access(trans, false))) {
6a06b6c1 179 __iwl_write_prph(trans, ofs, val);
7a65d170 180 iwl_trans_release_nic_access(trans);
02a7fa00 181 }
1042db2a 182 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 183}
cc5f7e39 184EXPORT_SYMBOL_GPL(iwl_write_prph);
02a7fa00 185
6a06b6c1 186void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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187{
188 unsigned long flags;
189
1042db2a 190 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 191 if (likely(iwl_trans_grab_nic_access(trans, false))) {
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EG
192 __iwl_write_prph(trans, ofs,
193 __iwl_read_prph(trans, ofs) | mask);
7a65d170 194 iwl_trans_release_nic_access(trans);
bfe4b80e 195 }
1042db2a 196 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 197}
cc5f7e39 198EXPORT_SYMBOL_GPL(iwl_set_bits_prph);
02a7fa00 199
6a06b6c1 200void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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201 u32 bits, u32 mask)
202{
203 unsigned long flags;
204
1042db2a 205 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 206 if (likely(iwl_trans_grab_nic_access(trans, false))) {
6a06b6c1
EG
207 __iwl_write_prph(trans, ofs,
208 (__iwl_read_prph(trans, ofs) & mask) | bits);
7a65d170 209 iwl_trans_release_nic_access(trans);
bfe4b80e 210 }
1042db2a 211 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 212}
cc5f7e39 213EXPORT_SYMBOL_GPL(iwl_set_bits_mask_prph);
02a7fa00 214
6a06b6c1 215void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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216{
217 unsigned long flags;
218 u32 val;
219
1042db2a 220 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 221 if (likely(iwl_trans_grab_nic_access(trans, false))) {
6a06b6c1
EG
222 val = __iwl_read_prph(trans, ofs);
223 __iwl_write_prph(trans, ofs, (val & ~mask));
7a65d170 224 iwl_trans_release_nic_access(trans);
bfe4b80e 225 }
1042db2a 226 spin_unlock_irqrestore(&trans->reg_lock, flags);
02a7fa00 227}
cc5f7e39 228EXPORT_SYMBOL_GPL(iwl_clear_bits_prph);
02a7fa00 229
e4b1681e
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230void _iwl_read_targ_mem_dwords(struct iwl_trans *trans, u32 addr,
231 void *buf, int dwords)
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232{
233 unsigned long flags;
e46f6538
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234 int offs;
235 u32 *vals = buf;
02a7fa00 236
1042db2a 237 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 238 if (likely(iwl_trans_grab_nic_access(trans, false))) {
bfe4b80e 239 iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
e4b1681e 240 for (offs = 0; offs < dwords; offs++)
bfe4b80e 241 vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
7a65d170 242 iwl_trans_release_nic_access(trans);
bfe4b80e 243 }
1042db2a 244 spin_unlock_irqrestore(&trans->reg_lock, flags);
e46f6538 245}
e4b1681e 246EXPORT_SYMBOL_GPL(_iwl_read_targ_mem_dwords);
e46f6538 247
1042db2a 248u32 iwl_read_targ_mem(struct iwl_trans *trans, u32 addr)
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249{
250 u32 value;
251
e4b1681e 252 _iwl_read_targ_mem_dwords(trans, addr, &value, 1);
e46f6538 253
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JB
254 return value;
255}
cc5f7e39 256EXPORT_SYMBOL_GPL(iwl_read_targ_mem);
02a7fa00 257
e4b1681e 258int _iwl_write_targ_mem_dwords(struct iwl_trans *trans, u32 addr,
986ea6c9 259 const void *buf, int dwords)
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260{
261 unsigned long flags;
ee8ba880 262 int offs, result = 0;
986ea6c9 263 const u32 *vals = buf;
02a7fa00 264
1042db2a 265 spin_lock_irqsave(&trans->reg_lock, flags);
7a65d170 266 if (likely(iwl_trans_grab_nic_access(trans, false))) {
1042db2a 267 iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);
e4b1681e 268 for (offs = 0; offs < dwords; offs++)
1042db2a 269 iwl_write32(trans, HBUS_TARG_MEM_WDAT, vals[offs]);
7a65d170
EG
270 iwl_trans_release_nic_access(trans);
271 } else {
ee8ba880 272 result = -EBUSY;
7a65d170 273 }
1042db2a 274 spin_unlock_irqrestore(&trans->reg_lock, flags);
ee8ba880
HK
275
276 return result;
277}
e4b1681e 278EXPORT_SYMBOL_GPL(_iwl_write_targ_mem_dwords);
ee8ba880 279
1042db2a 280int iwl_write_targ_mem(struct iwl_trans *trans, u32 addr, u32 val)
ee8ba880 281{
e4b1681e 282 return _iwl_write_targ_mem_dwords(trans, addr, &val, 1);
02a7fa00 283}
cc5f7e39 284EXPORT_SYMBOL_GPL(iwl_write_targ_mem);
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