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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
1f447808 | 3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of version 2 of the GNU General Public License as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program; if not, write to the Free Software Foundation, Inc., | |
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution in the | |
21 | * file called LICENSE. | |
22 | * | |
23 | * Contact Information: | |
759ef89f | 24 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
25 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | * | |
27 | *****************************************************************************/ | |
28 | ||
3395f6e9 TW |
29 | #ifndef __iwl_io_h__ |
30 | #define __iwl_io_h__ | |
b481de9c ZY |
31 | |
32 | #include <linux/io.h> | |
33 | ||
0a6857e7 | 34 | #include "iwl-debug.h" |
be1a71a1 | 35 | #include "iwl-devtrace.h" |
b481de9c ZY |
36 | |
37 | /* | |
38 | * IO, register, and NIC memory access functions | |
39 | * | |
40 | * NOTE on naming convention and macro usage for these | |
41 | * | |
42 | * A single _ prefix before a an access function means that no state | |
43 | * check or debug information is printed when that function is called. | |
44 | * | |
45 | * A double __ prefix before an access function means that state is checked | |
775ea378 TW |
46 | * and the current line number and caller function name are printed in addition |
47 | * to any other debug output. | |
b481de9c ZY |
48 | * |
49 | * The non-prefixed name is the #define that maps the caller into a | |
775ea378 TW |
50 | * #define that provides the caller's name and __LINE__ to the double |
51 | * prefix version. | |
b481de9c ZY |
52 | * |
53 | * If you wish to call the function without any debug or state checking, | |
54 | * you should use the single _ prefix version (as is used by dependent IO | |
3395f6e9 TW |
55 | * routines, for example _iwl_read_direct32 calls the non-check version of |
56 | * _iwl_read32.) | |
b481de9c ZY |
57 | * |
58 | * These declarations are *extremely* useful in quickly isolating code deltas | |
a96a27f9 | 59 | * which result in misconfiguration of the hardware I/O. In combination with |
b481de9c ZY |
60 | * git-bisect and the IO debug level you can quickly determine the specific |
61 | * commit which breaks the IO sequence to the hardware. | |
62 | * | |
63 | */ | |
64 | ||
4e03185f BC |
65 | static inline void _iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val) |
66 | { | |
67 | trace_iwlwifi_dev_iowrite8(priv, ofs, val); | |
68 | iowrite8(val, priv->hw_base + ofs); | |
69 | } | |
70 | ||
71 | #ifdef CONFIG_IWLWIFI_DEBUG | |
72 | static inline void __iwl_write8(const char *f, u32 l, struct iwl_priv *priv, | |
73 | u32 ofs, u8 val) | |
74 | { | |
75 | IWL_DEBUG_IO(priv, "write8(0x%08X, 0x%02X) - %s %d\n", ofs, val, f, l); | |
76 | _iwl_write8(priv, ofs, val); | |
77 | } | |
78 | #define iwl_write8(priv, ofs, val) \ | |
79 | __iwl_write8(__FILE__, __LINE__, priv, ofs, val) | |
80 | #else | |
81 | #define iwl_write8(priv, ofs, val) _iwl_write8(priv, ofs, val) | |
82 | #endif | |
83 | ||
84 | ||
be1a71a1 JB |
85 | static inline void _iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val) |
86 | { | |
87 | trace_iwlwifi_dev_iowrite32(priv, ofs, val); | |
88 | iowrite32(val, priv->hw_base + ofs); | |
89 | } | |
90 | ||
0a6857e7 | 91 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 92 | static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv, |
b481de9c ZY |
93 | u32 ofs, u32 val) |
94 | { | |
e1623446 | 95 | IWL_DEBUG_IO(priv, "write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l); |
3395f6e9 | 96 | _iwl_write32(priv, ofs, val); |
b481de9c | 97 | } |
3395f6e9 TW |
98 | #define iwl_write32(priv, ofs, val) \ |
99 | __iwl_write32(__FILE__, __LINE__, priv, ofs, val) | |
b481de9c | 100 | #else |
3395f6e9 | 101 | #define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val) |
b481de9c ZY |
102 | #endif |
103 | ||
be1a71a1 JB |
104 | static inline u32 _iwl_read32(struct iwl_priv *priv, u32 ofs) |
105 | { | |
106 | u32 val = ioread32(priv->hw_base + ofs); | |
107 | trace_iwlwifi_dev_ioread32(priv, ofs, val); | |
108 | return val; | |
109 | } | |
110 | ||
0a6857e7 | 111 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 112 | static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs) |
b481de9c | 113 | { |
e1623446 | 114 | IWL_DEBUG_IO(priv, "read_direct32(0x%08X) - %s %d\n", ofs, f, l); |
3395f6e9 | 115 | return _iwl_read32(priv, ofs); |
b481de9c | 116 | } |
3395f6e9 | 117 | #define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs) |
b481de9c | 118 | #else |
3395f6e9 | 119 | #define iwl_read32(p, o) _iwl_read32(p, o) |
b481de9c ZY |
120 | #endif |
121 | ||
4087f6f6 | 122 | #define IWL_POLL_INTERVAL 10 /* microseconds */ |
3395f6e9 | 123 | static inline int _iwl_poll_bit(struct iwl_priv *priv, u32 addr, |
b481de9c ZY |
124 | u32 bits, u32 mask, int timeout) |
125 | { | |
4087f6f6 | 126 | int t = 0; |
b481de9c ZY |
127 | |
128 | do { | |
3395f6e9 | 129 | if ((_iwl_read32(priv, addr) & mask) == (bits & mask)) |
4087f6f6 WF |
130 | return t; |
131 | udelay(IWL_POLL_INTERVAL); | |
132 | t += IWL_POLL_INTERVAL; | |
133 | } while (t < timeout); | |
b481de9c ZY |
134 | |
135 | return -ETIMEDOUT; | |
136 | } | |
0a6857e7 | 137 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 138 | static inline int __iwl_poll_bit(const char *f, u32 l, |
c79dd5b5 | 139 | struct iwl_priv *priv, u32 addr, |
b481de9c ZY |
140 | u32 bits, u32 mask, int timeout) |
141 | { | |
3395f6e9 | 142 | int ret = _iwl_poll_bit(priv, addr, bits, mask, timeout); |
e1623446 | 143 | IWL_DEBUG_IO(priv, "poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n", |
5c1b0958 | 144 | addr, bits, mask, |
c3056065 | 145 | unlikely(ret == -ETIMEDOUT) ? "timeout" : "", f, l); |
ac17a947 | 146 | return ret; |
b481de9c | 147 | } |
3395f6e9 TW |
148 | #define iwl_poll_bit(priv, addr, bits, mask, timeout) \ |
149 | __iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout) | |
b481de9c | 150 | #else |
3395f6e9 | 151 | #define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t) |
b481de9c ZY |
152 | #endif |
153 | ||
3395f6e9 | 154 | static inline void _iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 155 | { |
3395f6e9 | 156 | _iwl_write32(priv, reg, _iwl_read32(priv, reg) | mask); |
b481de9c | 157 | } |
0a6857e7 | 158 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 159 | static inline void __iwl_set_bit(const char *f, u32 l, |
c79dd5b5 | 160 | struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 161 | { |
3395f6e9 | 162 | u32 val = _iwl_read32(priv, reg) | mask; |
e1623446 | 163 | IWL_DEBUG_IO(priv, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); |
3395f6e9 | 164 | _iwl_write32(priv, reg, val); |
b481de9c | 165 | } |
a8b50a0a MA |
166 | static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m) |
167 | { | |
168 | unsigned long reg_flags; | |
169 | ||
170 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
171 | __iwl_set_bit(__FILE__, __LINE__, p, r, m); | |
172 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
173 | } | |
b481de9c | 174 | #else |
a8b50a0a MA |
175 | static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m) |
176 | { | |
177 | unsigned long reg_flags; | |
178 | ||
179 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
180 | _iwl_set_bit(p, r, m); | |
181 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
182 | } | |
b481de9c ZY |
183 | #endif |
184 | ||
3395f6e9 | 185 | static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 186 | { |
3395f6e9 | 187 | _iwl_write32(priv, reg, _iwl_read32(priv, reg) & ~mask); |
b481de9c | 188 | } |
0a6857e7 | 189 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 190 | static inline void __iwl_clear_bit(const char *f, u32 l, |
c79dd5b5 | 191 | struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 192 | { |
3395f6e9 | 193 | u32 val = _iwl_read32(priv, reg) & ~mask; |
e1623446 | 194 | IWL_DEBUG_IO(priv, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); |
3395f6e9 | 195 | _iwl_write32(priv, reg, val); |
b481de9c | 196 | } |
a8b50a0a MA |
197 | static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m) |
198 | { | |
199 | unsigned long reg_flags; | |
200 | ||
201 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
202 | __iwl_clear_bit(__FILE__, __LINE__, p, r, m); | |
203 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
204 | } | |
b481de9c | 205 | #else |
a8b50a0a MA |
206 | static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m) |
207 | { | |
208 | unsigned long reg_flags; | |
209 | ||
210 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
211 | _iwl_clear_bit(p, r, m); | |
212 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
213 | } | |
b481de9c ZY |
214 | #endif |
215 | ||
3395f6e9 | 216 | static inline int _iwl_grab_nic_access(struct iwl_priv *priv) |
b481de9c | 217 | { |
ac17a947 | 218 | int ret; |
18d426c4 | 219 | u32 val; |
a8b50a0a | 220 | |
b481de9c | 221 | /* this bit wakes up the NIC */ |
3395f6e9 | 222 | _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
a7e66110 BC |
223 | |
224 | /* | |
225 | * These bits say the device is running, and should keep running for | |
226 | * at least a short while (at least as long as MAC_ACCESS_REQ stays 1), | |
227 | * but they do not indicate that embedded SRAM is restored yet; | |
228 | * 3945 and 4965 have volatile SRAM, and must save/restore contents | |
229 | * to/from host DRAM when sleeping/waking for power-saving. | |
230 | * Each direction takes approximately 1/4 millisecond; with this | |
231 | * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a | |
232 | * series of register accesses are expected (e.g. reading Event Log), | |
233 | * to keep device from sleeping. | |
234 | * | |
235 | * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that | |
236 | * SRAM is okay/restored. We don't check that here because this call | |
237 | * is just for hardware register access; but GP1 MAC_SLEEP check is a | |
238 | * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). | |
239 | * | |
240 | * 5000 series and later (including 1000 series) have non-volatile SRAM, | |
241 | * and do not save/restore SRAM when power cycling. | |
242 | */ | |
3395f6e9 | 243 | ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
244 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, |
245 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | |
e9414b6b | 246 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); |
ac17a947 | 247 | if (ret < 0) { |
18d426c4 RC |
248 | val = _iwl_read32(priv, CSR_GP_CNTRL); |
249 | IWL_ERR(priv, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); | |
a8b50a0a | 250 | _iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); |
b481de9c ZY |
251 | return -EIO; |
252 | } | |
253 | ||
b481de9c ZY |
254 | return 0; |
255 | } | |
256 | ||
0a6857e7 | 257 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 258 | static inline int __iwl_grab_nic_access(const char *f, u32 l, |
c79dd5b5 | 259 | struct iwl_priv *priv) |
b481de9c | 260 | { |
e1623446 | 261 | IWL_DEBUG_IO(priv, "grabbing nic access - %s %d\n", f, l); |
3395f6e9 | 262 | return _iwl_grab_nic_access(priv); |
b481de9c | 263 | } |
3395f6e9 TW |
264 | #define iwl_grab_nic_access(priv) \ |
265 | __iwl_grab_nic_access(__FILE__, __LINE__, priv) | |
b481de9c | 266 | #else |
3395f6e9 TW |
267 | #define iwl_grab_nic_access(priv) \ |
268 | _iwl_grab_nic_access(priv) | |
b481de9c ZY |
269 | #endif |
270 | ||
3395f6e9 | 271 | static inline void _iwl_release_nic_access(struct iwl_priv *priv) |
b481de9c | 272 | { |
a8b50a0a MA |
273 | _iwl_clear_bit(priv, CSR_GP_CNTRL, |
274 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | |
b481de9c | 275 | } |
0a6857e7 | 276 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 277 | static inline void __iwl_release_nic_access(const char *f, u32 l, |
c79dd5b5 | 278 | struct iwl_priv *priv) |
b481de9c | 279 | { |
b481de9c | 280 | |
e1623446 | 281 | IWL_DEBUG_IO(priv, "releasing nic access - %s %d\n", f, l); |
3395f6e9 | 282 | _iwl_release_nic_access(priv); |
b481de9c | 283 | } |
3395f6e9 TW |
284 | #define iwl_release_nic_access(priv) \ |
285 | __iwl_release_nic_access(__FILE__, __LINE__, priv) | |
b481de9c | 286 | #else |
3395f6e9 TW |
287 | #define iwl_release_nic_access(priv) \ |
288 | _iwl_release_nic_access(priv) | |
b481de9c ZY |
289 | #endif |
290 | ||
3395f6e9 | 291 | static inline u32 _iwl_read_direct32(struct iwl_priv *priv, u32 reg) |
b481de9c | 292 | { |
3395f6e9 | 293 | return _iwl_read32(priv, reg); |
b481de9c | 294 | } |
0a6857e7 | 295 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 296 | static inline u32 __iwl_read_direct32(const char *f, u32 l, |
c79dd5b5 | 297 | struct iwl_priv *priv, u32 reg) |
b481de9c | 298 | { |
3395f6e9 | 299 | u32 value = _iwl_read_direct32(priv, reg); |
e1623446 | 300 | IWL_DEBUG_IO(priv, "read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value, |
b481de9c ZY |
301 | f, l); |
302 | return value; | |
303 | } | |
a8b50a0a MA |
304 | static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) |
305 | { | |
306 | u32 value; | |
307 | unsigned long reg_flags; | |
308 | ||
309 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
310 | iwl_grab_nic_access(priv); | |
311 | value = __iwl_read_direct32(__FILE__, __LINE__, priv, reg); | |
312 | iwl_release_nic_access(priv); | |
313 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
314 | return value; | |
315 | } | |
316 | ||
b481de9c | 317 | #else |
a8b50a0a MA |
318 | static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) |
319 | { | |
320 | u32 value; | |
321 | unsigned long reg_flags; | |
322 | ||
323 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
324 | iwl_grab_nic_access(priv); | |
325 | value = _iwl_read_direct32(priv, reg); | |
326 | iwl_release_nic_access(priv); | |
327 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
328 | return value; | |
329 | ||
330 | } | |
b481de9c ZY |
331 | #endif |
332 | ||
3395f6e9 | 333 | static inline void _iwl_write_direct32(struct iwl_priv *priv, |
b481de9c ZY |
334 | u32 reg, u32 value) |
335 | { | |
3395f6e9 | 336 | _iwl_write32(priv, reg, value); |
b481de9c | 337 | } |
a8b50a0a | 338 | static inline void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value) |
b481de9c | 339 | { |
a8b50a0a MA |
340 | unsigned long reg_flags; |
341 | ||
342 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
343 | if (!iwl_grab_nic_access(priv)) { | |
344 | _iwl_write_direct32(priv, reg, value); | |
345 | iwl_release_nic_access(priv); | |
346 | } | |
347 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 348 | } |
b481de9c | 349 | |
3395f6e9 | 350 | static inline void iwl_write_reg_buf(struct iwl_priv *priv, |
b481de9c ZY |
351 | u32 reg, u32 len, u32 *values) |
352 | { | |
353 | u32 count = sizeof(u32); | |
354 | ||
355 | if ((priv != NULL) && (values != NULL)) { | |
356 | for (; 0 < len; len -= count, reg += count, values++) | |
a8b50a0a | 357 | iwl_write_direct32(priv, reg, *values); |
b481de9c ZY |
358 | } |
359 | } | |
360 | ||
73d7b5ac ZY |
361 | static inline int _iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr, |
362 | u32 mask, int timeout) | |
b481de9c | 363 | { |
a8b50a0a MA |
364 | int t = 0; |
365 | ||
366 | do { | |
367 | if ((iwl_read_direct32(priv, addr) & mask) == mask) | |
368 | return t; | |
369 | udelay(IWL_POLL_INTERVAL); | |
370 | t += IWL_POLL_INTERVAL; | |
371 | } while (t < timeout); | |
372 | ||
373 | return -ETIMEDOUT; | |
b481de9c ZY |
374 | } |
375 | ||
0a6857e7 | 376 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 377 | static inline int __iwl_poll_direct_bit(const char *f, u32 l, |
c79dd5b5 | 378 | struct iwl_priv *priv, |
b481de9c ZY |
379 | u32 addr, u32 mask, int timeout) |
380 | { | |
3395f6e9 | 381 | int ret = _iwl_poll_direct_bit(priv, addr, mask, timeout); |
b481de9c | 382 | |
ac17a947 | 383 | if (unlikely(ret == -ETIMEDOUT)) |
e1623446 | 384 | IWL_DEBUG_IO(priv, "poll_direct_bit(0x%08X, 0x%08X) - " |
b481de9c ZY |
385 | "timedout - %s %d\n", addr, mask, f, l); |
386 | else | |
e1623446 | 387 | IWL_DEBUG_IO(priv, "poll_direct_bit(0x%08X, 0x%08X) = 0x%08X " |
ac17a947 TW |
388 | "- %s %d\n", addr, mask, ret, f, l); |
389 | return ret; | |
b481de9c | 390 | } |
3395f6e9 TW |
391 | #define iwl_poll_direct_bit(priv, addr, mask, timeout) \ |
392 | __iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout) | |
b481de9c | 393 | #else |
3395f6e9 | 394 | #define iwl_poll_direct_bit _iwl_poll_direct_bit |
b481de9c ZY |
395 | #endif |
396 | ||
3395f6e9 | 397 | static inline u32 _iwl_read_prph(struct iwl_priv *priv, u32 reg) |
b481de9c | 398 | { |
3395f6e9 | 399 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); |
a8ec42c1 | 400 | rmb(); |
3395f6e9 | 401 | return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT); |
b481de9c | 402 | } |
a8b50a0a | 403 | static inline u32 iwl_read_prph(struct iwl_priv *priv, u32 reg) |
b481de9c | 404 | { |
a8b50a0a MA |
405 | unsigned long reg_flags; |
406 | u32 val; | |
b481de9c | 407 | |
a8b50a0a MA |
408 | spin_lock_irqsave(&priv->reg_lock, reg_flags); |
409 | iwl_grab_nic_access(priv); | |
410 | val = _iwl_read_prph(priv, reg); | |
411 | iwl_release_nic_access(priv); | |
412 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
413 | return val; | |
414 | } | |
b481de9c | 415 | |
3395f6e9 | 416 | static inline void _iwl_write_prph(struct iwl_priv *priv, |
b481de9c ZY |
417 | u32 addr, u32 val) |
418 | { | |
3395f6e9 | 419 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_WADDR, |
b481de9c | 420 | ((addr & 0x0000FFFF) | (3 << 24))); |
a8ec42c1 | 421 | wmb(); |
3395f6e9 | 422 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val); |
b481de9c | 423 | } |
a8b50a0a MA |
424 | |
425 | static inline void iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val) | |
b481de9c | 426 | { |
a8b50a0a | 427 | unsigned long reg_flags; |
b481de9c | 428 | |
a8b50a0a MA |
429 | spin_lock_irqsave(&priv->reg_lock, reg_flags); |
430 | if (!iwl_grab_nic_access(priv)) { | |
431 | _iwl_write_prph(priv, addr, val); | |
432 | iwl_release_nic_access(priv); | |
433 | } | |
434 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
435 | } | |
b481de9c | 436 | |
3395f6e9 TW |
437 | #define _iwl_set_bits_prph(priv, reg, mask) \ |
438 | _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask)) | |
a8b50a0a MA |
439 | |
440 | static inline void iwl_set_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask) | |
b481de9c | 441 | { |
a8b50a0a | 442 | unsigned long reg_flags; |
ac17a947 | 443 | |
a8b50a0a MA |
444 | spin_lock_irqsave(&priv->reg_lock, reg_flags); |
445 | iwl_grab_nic_access(priv); | |
3395f6e9 | 446 | _iwl_set_bits_prph(priv, reg, mask); |
a8b50a0a MA |
447 | iwl_release_nic_access(priv); |
448 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 449 | } |
b481de9c | 450 | |
3395f6e9 TW |
451 | #define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \ |
452 | _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits)) | |
d8609652 | 453 | |
a8b50a0a MA |
454 | static inline void iwl_set_bits_mask_prph(struct iwl_priv *priv, u32 reg, |
455 | u32 bits, u32 mask) | |
b481de9c | 456 | { |
a8b50a0a MA |
457 | unsigned long reg_flags; |
458 | ||
459 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
460 | iwl_grab_nic_access(priv); | |
3395f6e9 | 461 | _iwl_set_bits_mask_prph(priv, reg, bits, mask); |
a8b50a0a MA |
462 | iwl_release_nic_access(priv); |
463 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 464 | } |
b481de9c | 465 | |
3395f6e9 | 466 | static inline void iwl_clear_bits_prph(struct iwl_priv |
b481de9c ZY |
467 | *priv, u32 reg, u32 mask) |
468 | { | |
a8b50a0a MA |
469 | unsigned long reg_flags; |
470 | u32 val; | |
471 | ||
472 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
473 | iwl_grab_nic_access(priv); | |
474 | val = _iwl_read_prph(priv, reg); | |
3395f6e9 | 475 | _iwl_write_prph(priv, reg, (val & ~mask)); |
a8b50a0a MA |
476 | iwl_release_nic_access(priv); |
477 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c ZY |
478 | } |
479 | ||
3395f6e9 | 480 | static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr) |
b481de9c | 481 | { |
a8b50a0a MA |
482 | unsigned long reg_flags; |
483 | u32 value; | |
484 | ||
485 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
486 | iwl_grab_nic_access(priv); | |
487 | ||
488 | _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr); | |
a8ec42c1 | 489 | rmb(); |
a8b50a0a MA |
490 | value = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
491 | ||
492 | iwl_release_nic_access(priv); | |
493 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
494 | return value; | |
b481de9c ZY |
495 | } |
496 | ||
3395f6e9 | 497 | static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val) |
b481de9c | 498 | { |
a8b50a0a MA |
499 | unsigned long reg_flags; |
500 | ||
501 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
502 | if (!iwl_grab_nic_access(priv)) { | |
503 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | |
504 | wmb(); | |
505 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val); | |
506 | iwl_release_nic_access(priv); | |
507 | } | |
508 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c ZY |
509 | } |
510 | ||
3395f6e9 | 511 | static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr, |
af7cca2a | 512 | u32 len, u32 *values) |
b481de9c | 513 | { |
a8b50a0a MA |
514 | unsigned long reg_flags; |
515 | ||
516 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
517 | if (!iwl_grab_nic_access(priv)) { | |
518 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | |
519 | wmb(); | |
520 | for (; 0 < len; len -= sizeof(u32), values++) | |
521 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values); | |
522 | ||
523 | iwl_release_nic_access(priv); | |
524 | } | |
525 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 526 | } |
b481de9c | 527 | #endif |