iwlwifi: change last 5ghz channel to 165 & add support for 8000 family
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-nvm-parse.c
CommitLineData
b1e1adfa
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
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27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *****************************************************************************/
64#include <linux/types.h>
65#include <linux/slab.h>
66#include <linux/export.h>
9f32e017 67#include <linux/etherdevice.h>
1e0b393a 68#include <linux/pci.h>
48e29340 69#include "iwl-drv.h"
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JB
70#include "iwl-modparams.h"
71#include "iwl-nvm-parse.h"
72
73/* NVM offsets (in words) definitions */
74enum wkp_nvm_offsets {
75 /* NVM HW-Section offset (in words) definitions */
76 HW_ADDR = 0x15,
77
77db0a3c 78 /* NVM SW-Section offset (in words) definitions */
b1e1adfa
JB
79 NVM_SW_SECTION = 0x1C0,
80 NVM_VERSION = 0,
81 RADIO_CFG = 1,
82 SKU = 2,
83 N_HW_ADDRS = 3,
84 NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
85
77db0a3c 86 /* NVM calibration section offset (in words) definitions */
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JB
87 NVM_CALIB_SECTION = 0x2B8,
88 XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
89};
90
77db0a3c
EH
91enum family_8000_nvm_offsets {
92 /* NVM HW-Section offset (in words) definitions */
1e0b393a
EH
93 HW_ADDR0_WFPM_FAMILY_8000 = 0x12,
94 HW_ADDR1_WFPM_FAMILY_8000 = 0x16,
95 HW_ADDR0_PCIE_FAMILY_8000 = 0x8A,
96 HW_ADDR1_PCIE_FAMILY_8000 = 0x8E,
77db0a3c
EH
97 MAC_ADDRESS_OVERRIDE_FAMILY_8000 = 1,
98
99 /* NVM SW-Section offset (in words) definitions */
100 NVM_SW_SECTION_FAMILY_8000 = 0x1C0,
101 NVM_VERSION_FAMILY_8000 = 0,
102 RADIO_CFG_FAMILY_8000 = 2,
103 SKU_FAMILY_8000 = 4,
104 N_HW_ADDRS_FAMILY_8000 = 5,
105
106 /* NVM REGULATORY -Section offset (in words) definitions */
107 NVM_CHANNELS_FAMILY_8000 = 0,
108
109 /* NVM calibration section offset (in words) definitions */
110 NVM_CALIB_SECTION_FAMILY_8000 = 0x2B8,
111 XTAL_CALIB_FAMILY_8000 = 0x316 - NVM_CALIB_SECTION_FAMILY_8000
112};
113
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JB
114/* SKU Capabilities (actual values from NVM definition) */
115enum nvm_sku_bits {
116 NVM_SKU_CAP_BAND_24GHZ = BIT(0),
117 NVM_SKU_CAP_BAND_52GHZ = BIT(1),
118 NVM_SKU_CAP_11N_ENABLE = BIT(2),
bfc824b0 119 NVM_SKU_CAP_11AC_ENABLE = BIT(3),
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JB
120};
121
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JB
122/*
123 * These are the channel numbers in the order that they are stored in the NVM
124 */
125static const u8 iwl_nvm_channels[] = {
126 /* 2.4 GHz */
127 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
128 /* 5 GHz */
129 36, 40, 44 , 48, 52, 56, 60, 64,
130 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
131 149, 153, 157, 161, 165
132};
133
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EH
134static const u8 iwl_nvm_channels_family_8000[] = {
135 /* 2.4 GHz */
9b1c9a66 136 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
77db0a3c
EH
137 /* 5 GHz */
138 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
139 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
140 149, 153, 157, 161, 165, 169, 173, 177, 181
141};
142
749f1fe1 143#define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
77db0a3c 144#define IWL_NUM_CHANNELS_FAMILY_8000 ARRAY_SIZE(iwl_nvm_channels_family_8000)
749f1fe1 145#define NUM_2GHZ_CHANNELS 14
9b1c9a66 146#define NUM_2GHZ_CHANNELS_FAMILY_8000 14
749f1fe1
EH
147#define FIRST_2GHZ_HT_MINUS 5
148#define LAST_2GHZ_HT_PLUS 9
b281c93d
MG
149#define LAST_5GHZ_HT 165
150#define LAST_5GHZ_HT_FAMILY_8000 181
b1e1adfa 151
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JB
152/* rate data (static) */
153static struct ieee80211_rate iwl_cfg80211_rates[] = {
154 { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
155 { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
156 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
157 { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
158 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
159 { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
160 .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
161 { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
162 { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
163 { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
164 { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
165 { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
166 { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
167 { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
168 { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
169};
170#define RATES_24_OFFS 0
171#define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
172#define RATES_52_OFFS 4
173#define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
174
175/**
176 * enum iwl_nvm_channel_flags - channel flags in NVM
177 * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
178 * @NVM_CHANNEL_IBSS: usable as an IBSS channel
179 * @NVM_CHANNEL_ACTIVE: active scanning allowed
180 * @NVM_CHANNEL_RADAR: radar detection required
9ee6dace
DS
181 * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
182 * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
183 * on same channel on 2.4 or same UNII band on 5.2
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JB
184 * @NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
185 * @NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
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EL
186 * @NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
187 * @NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
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JB
188 */
189enum iwl_nvm_channel_flags {
190 NVM_CHANNEL_VALID = BIT(0),
191 NVM_CHANNEL_IBSS = BIT(1),
192 NVM_CHANNEL_ACTIVE = BIT(3),
193 NVM_CHANNEL_RADAR = BIT(4),
9ee6dace
DS
194 NVM_CHANNEL_INDOOR_ONLY = BIT(5),
195 NVM_CHANNEL_GO_CONCURRENT = BIT(6),
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JB
196 NVM_CHANNEL_WIDE = BIT(8),
197 NVM_CHANNEL_40MHZ = BIT(9),
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EL
198 NVM_CHANNEL_80MHZ = BIT(10),
199 NVM_CHANNEL_160MHZ = BIT(11),
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JB
200};
201
202#define CHECK_AND_PRINT_I(x) \
203 ((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
204
770ceda6 205static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
b281c93d 206 u16 nvm_flags, const struct iwl_cfg *cfg)
770ceda6
AN
207{
208 u32 flags = IEEE80211_CHAN_NO_HT40;
b281c93d
MG
209 u32 last_5ghz_ht = LAST_5GHZ_HT;
210
211 if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
212 last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
770ceda6
AN
213
214 if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
215 if (ch_num <= LAST_2GHZ_HT_PLUS)
216 flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
217 if (ch_num >= FIRST_2GHZ_HT_MINUS)
218 flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
b281c93d 219 } else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
770ceda6
AN
220 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
221 flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
222 else
223 flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
224 }
225 if (!(nvm_flags & NVM_CHANNEL_80MHZ))
226 flags |= IEEE80211_CHAN_NO_80MHZ;
227 if (!(nvm_flags & NVM_CHANNEL_160MHZ))
228 flags |= IEEE80211_CHAN_NO_160MHZ;
229
230 if (!(nvm_flags & NVM_CHANNEL_IBSS))
231 flags |= IEEE80211_CHAN_NO_IR;
232
233 if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
234 flags |= IEEE80211_CHAN_NO_IR;
235
236 if (nvm_flags & NVM_CHANNEL_RADAR)
237 flags |= IEEE80211_CHAN_RADAR;
238
239 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
240 flags |= IEEE80211_CHAN_INDOOR_ONLY;
241
242 /* Set the GO concurrent flag only in case that NO_IR is set.
243 * Otherwise it is meaningless
244 */
245 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
246 (flags & IEEE80211_CHAN_NO_IR))
247 flags |= IEEE80211_CHAN_GO_CONCURRENT;
248
249 return flags;
250}
251
b1e1adfa
JB
252static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
253 struct iwl_nvm_data *data,
770ceda6
AN
254 const __le16 * const nvm_ch_flags,
255 bool lar_supported)
b1e1adfa
JB
256{
257 int ch_idx;
258 int n_channels = 0;
259 struct ieee80211_channel *channel;
260 u16 ch_flags;
261 bool is_5ghz;
749f1fe1 262 int num_of_ch, num_2ghz_channels;
77db0a3c
EH
263 const u8 *nvm_chan;
264
265 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
266 num_of_ch = IWL_NUM_CHANNELS;
267 nvm_chan = &iwl_nvm_channels[0];
749f1fe1 268 num_2ghz_channels = NUM_2GHZ_CHANNELS;
77db0a3c
EH
269 } else {
270 num_of_ch = IWL_NUM_CHANNELS_FAMILY_8000;
271 nvm_chan = &iwl_nvm_channels_family_8000[0];
749f1fe1 272 num_2ghz_channels = NUM_2GHZ_CHANNELS_FAMILY_8000;
77db0a3c 273 }
b1e1adfa 274
77db0a3c 275 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
b1e1adfa 276 ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
c5128654 277
749f1fe1 278 if (ch_idx >= num_2ghz_channels &&
c5128654 279 !data->sku_cap_band_52GHz_enable)
a76f3bfe 280 continue;
c5128654 281
770ceda6 282 if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
a76f3bfe
EP
283 /*
284 * Channels might become valid later if lar is
285 * supported, hence we still want to add them to
286 * the list of supported channels to cfg80211.
287 */
b1e1adfa
JB
288 IWL_DEBUG_EEPROM(dev,
289 "Ch. %d Flags %x [%sGHz] - No traffic\n",
77db0a3c 290 nvm_chan[ch_idx],
b1e1adfa 291 ch_flags,
749f1fe1 292 (ch_idx >= num_2ghz_channels) ?
b1e1adfa
JB
293 "5.2" : "2.4");
294 continue;
295 }
296
297 channel = &data->channels[n_channels];
298 n_channels++;
299
77db0a3c 300 channel->hw_value = nvm_chan[ch_idx];
749f1fe1 301 channel->band = (ch_idx < num_2ghz_channels) ?
b1e1adfa
JB
302 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
303 channel->center_freq =
304 ieee80211_channel_to_frequency(
305 channel->hw_value, channel->band);
306
b1e1adfa
JB
307 /* Initialize regulatory-based run-time data */
308
88f2fd73
MG
309 /*
310 * Default value - highest tx power value. max_power
311 * is not used in mvm, and is used for backwards compatibility
312 */
22d059a5 313 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
b1e1adfa 314 is_5ghz = channel->band == IEEE80211_BAND_5GHZ;
770ceda6
AN
315
316 /* don't put limitations in case we're using LAR */
317 if (!lar_supported)
318 channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
319 ch_idx, is_5ghz,
b281c93d 320 ch_flags, cfg);
770ceda6
AN
321 else
322 channel->flags = 0;
323
b1e1adfa 324 IWL_DEBUG_EEPROM(dev,
9ee6dace 325 "Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
b1e1adfa
JB
326 channel->hw_value,
327 is_5ghz ? "5.2" : "2.4",
328 CHECK_AND_PRINT_I(VALID),
329 CHECK_AND_PRINT_I(IBSS),
330 CHECK_AND_PRINT_I(ACTIVE),
331 CHECK_AND_PRINT_I(RADAR),
332 CHECK_AND_PRINT_I(WIDE),
9ee6dace
DS
333 CHECK_AND_PRINT_I(INDOOR_ONLY),
334 CHECK_AND_PRINT_I(GO_CONCURRENT),
b1e1adfa
JB
335 ch_flags,
336 channel->max_power,
337 ((ch_flags & NVM_CHANNEL_IBSS) &&
338 !(ch_flags & NVM_CHANNEL_RADAR))
339 ? "" : "not ");
340 }
341
342 return n_channels;
343}
344
33158fef
EL
345static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
346 struct iwl_nvm_data *data,
6ca89f1f
JB
347 struct ieee80211_sta_vht_cap *vht_cap,
348 u8 tx_chains, u8 rx_chains)
33158fef 349{
6ca89f1f
JB
350 int num_rx_ants = num_of_ant(rx_chains);
351 int num_tx_ants = num_of_ant(tx_chains);
c064ddf3
EH
352 unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
353 IEEE80211_VHT_MAX_AMPDU_1024K);
48e6de61 354
33158fef
EL
355 vht_cap->vht_supported = true;
356
357 vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
358 IEEE80211_VHT_CAP_RXSTBC_1 |
359 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
e36b766d 360 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
c064ddf3
EH
361 max_ampdu_exponent <<
362 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
33158fef 363
a3576ff2
ES
364 if (cfg->ht_params->ldpc)
365 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
366
6ca89f1f 367 if (num_tx_ants > 1)
5f7a6f9b 368 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
6ca89f1f
JB
369 else
370 vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
5f7a6f9b 371
33158fef
EL
372 if (iwlwifi_mod_params.amsdu_size_8K)
373 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
374
375 vht_cap->vht_mcs.rx_mcs_map =
376 cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
377 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
378 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
379 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
380 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
381 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
382 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
383 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
384
6ca89f1f
JB
385 if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
386 vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
33158fef
EL
387 /* this works because NOT_SUPPORTED == 3 */
388 vht_cap->vht_mcs.rx_mcs_map |=
389 cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
390 }
391
392 vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
393}
394
b1e1adfa 395static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
77db0a3c
EH
396 struct iwl_nvm_data *data,
397 const __le16 *ch_section, bool enable_vht,
770ceda6 398 u8 tx_chains, u8 rx_chains, bool lar_supported)
b1e1adfa 399{
77db0a3c 400 int n_channels;
b1e1adfa
JB
401 int n_used = 0;
402 struct ieee80211_supported_band *sband;
403
77db0a3c
EH
404 if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
405 n_channels = iwl_init_channel_map(
406 dev, cfg, data,
770ceda6 407 &ch_section[NVM_CHANNELS], lar_supported);
77db0a3c
EH
408 else
409 n_channels = iwl_init_channel_map(
410 dev, cfg, data,
770ceda6
AN
411 &ch_section[NVM_CHANNELS_FAMILY_8000],
412 lar_supported);
77db0a3c 413
b1e1adfa
JB
414 sband = &data->bands[IEEE80211_BAND_2GHZ];
415 sband->band = IEEE80211_BAND_2GHZ;
416 sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
417 sband->n_bitrates = N_RATES_24;
418 n_used += iwl_init_sband_channels(data, sband, n_channels,
419 IEEE80211_BAND_2GHZ);
9ce4fa72
EG
420 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ,
421 tx_chains, rx_chains);
b1e1adfa
JB
422
423 sband = &data->bands[IEEE80211_BAND_5GHZ];
424 sband->band = IEEE80211_BAND_5GHZ;
425 sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
426 sband->n_bitrates = N_RATES_52;
427 n_used += iwl_init_sband_channels(data, sband, n_channels,
428 IEEE80211_BAND_5GHZ);
9ce4fa72
EG
429 iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ,
430 tx_chains, rx_chains);
bfc824b0 431 if (enable_vht)
6ca89f1f
JB
432 iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
433 tx_chains, rx_chains);
b1e1adfa
JB
434
435 if (n_channels != n_used)
436 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
437 n_used, n_channels);
438}
439
77db0a3c
EH
440static int iwl_get_sku(const struct iwl_cfg *cfg,
441 const __le16 *nvm_sw)
442{
443 if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
444 return le16_to_cpup(nvm_sw + SKU);
445 else
446 return le32_to_cpup((__le32 *)(nvm_sw + SKU_FAMILY_8000));
447}
448
449static int iwl_get_nvm_version(const struct iwl_cfg *cfg,
450 const __le16 *nvm_sw)
451{
452 if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
453 return le16_to_cpup(nvm_sw + NVM_VERSION);
454 else
455 return le32_to_cpup((__le32 *)(nvm_sw +
456 NVM_VERSION_FAMILY_8000));
457}
458
459static int iwl_get_radio_cfg(const struct iwl_cfg *cfg,
460 const __le16 *nvm_sw)
461{
462 if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
463 return le16_to_cpup(nvm_sw + RADIO_CFG);
464 else
465 return le32_to_cpup((__le32 *)(nvm_sw + RADIO_CFG_FAMILY_8000));
466}
467
468#define N_HW_ADDRS_MASK_FAMILY_8000 0xF
469static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg,
470 const __le16 *nvm_sw)
471{
472 if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
473 return le16_to_cpup(nvm_sw + N_HW_ADDRS);
474 else
475 return le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000))
476 & N_HW_ADDRS_MASK_FAMILY_8000;
477}
478
479static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
480 struct iwl_nvm_data *data,
481 u32 radio_cfg)
482{
483 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
484 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
485 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
486 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
487 data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
77db0a3c
EH
488 return;
489 }
490
491 /* set the radio configuration for family 8000 */
492 data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK_FAMILY_8000(radio_cfg);
493 data->radio_cfg_step = NVM_RF_CFG_STEP_MSK_FAMILY_8000(radio_cfg);
494 data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK_FAMILY_8000(radio_cfg);
495 data->radio_cfg_pnum = NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(radio_cfg);
a0544272
MH
496 data->valid_tx_ant = NVM_RF_CFG_TX_ANT_MSK_FAMILY_8000(radio_cfg);
497 data->valid_rx_ant = NVM_RF_CFG_RX_ANT_MSK_FAMILY_8000(radio_cfg);
77db0a3c
EH
498}
499
500static void iwl_set_hw_address(const struct iwl_cfg *cfg,
501 struct iwl_nvm_data *data,
502 const __le16 *nvm_sec)
503{
9f32e017 504 const u8 *hw_addr = (const u8 *)(nvm_sec + HW_ADDR);
77db0a3c
EH
505
506 /* The byte order is little endian 16 bit, meaning 214365 */
507 data->hw_addr[0] = hw_addr[1];
508 data->hw_addr[1] = hw_addr[0];
509 data->hw_addr[2] = hw_addr[3];
510 data->hw_addr[3] = hw_addr[2];
511 data->hw_addr[4] = hw_addr[5];
512 data->hw_addr[5] = hw_addr[4];
513}
514
6a68a39f
EH
515static void iwl_set_hw_address_family_8000(struct device *dev,
516 const struct iwl_cfg *cfg,
9f32e017
EH
517 struct iwl_nvm_data *data,
518 const __le16 *mac_override,
519 const __le16 *nvm_hw)
520{
521 const u8 *hw_addr;
522
523 if (mac_override) {
524 hw_addr = (const u8 *)(mac_override +
525 MAC_ADDRESS_OVERRIDE_FAMILY_8000);
526
527 /* The byte order is little endian 16 bit, meaning 214365 */
528 data->hw_addr[0] = hw_addr[1];
529 data->hw_addr[1] = hw_addr[0];
530 data->hw_addr[2] = hw_addr[3];
531 data->hw_addr[3] = hw_addr[2];
532 data->hw_addr[4] = hw_addr[5];
533 data->hw_addr[5] = hw_addr[4];
534
6a68a39f 535 if (is_valid_ether_addr(data->hw_addr))
9f32e017 536 return;
6a68a39f
EH
537
538 IWL_ERR_DEV(dev,
539 "mac address from nvm override section is not valid\n");
9f32e017
EH
540 }
541
6a68a39f 542 if (nvm_hw) {
1e0b393a
EH
543 /* read the MAC address from OTP */
544 if (!dev_is_pci(dev) || (data->nvm_version < 0xE08)) {
545 /* read the mac address from the WFPM location */
546 hw_addr = (const u8 *)(nvm_hw +
547 HW_ADDR0_WFPM_FAMILY_8000);
548 data->hw_addr[0] = hw_addr[3];
549 data->hw_addr[1] = hw_addr[2];
550 data->hw_addr[2] = hw_addr[1];
551 data->hw_addr[3] = hw_addr[0];
552
553 hw_addr = (const u8 *)(nvm_hw +
554 HW_ADDR1_WFPM_FAMILY_8000);
555 data->hw_addr[4] = hw_addr[1];
556 data->hw_addr[5] = hw_addr[0];
557 } else if ((data->nvm_version >= 0xE08) &&
558 (data->nvm_version < 0xE0B)) {
559 /* read "reverse order" from the PCIe location */
560 hw_addr = (const u8 *)(nvm_hw +
561 HW_ADDR0_PCIE_FAMILY_8000);
562 data->hw_addr[5] = hw_addr[2];
563 data->hw_addr[4] = hw_addr[1];
564 data->hw_addr[3] = hw_addr[0];
565
566 hw_addr = (const u8 *)(nvm_hw +
567 HW_ADDR1_PCIE_FAMILY_8000);
568 data->hw_addr[2] = hw_addr[3];
569 data->hw_addr[1] = hw_addr[2];
570 data->hw_addr[0] = hw_addr[1];
571 } else {
572 /* read from the PCIe location */
573 hw_addr = (const u8 *)(nvm_hw +
574 HW_ADDR0_PCIE_FAMILY_8000);
575 data->hw_addr[5] = hw_addr[0];
576 data->hw_addr[4] = hw_addr[1];
577 data->hw_addr[3] = hw_addr[2];
578
579 hw_addr = (const u8 *)(nvm_hw +
580 HW_ADDR1_PCIE_FAMILY_8000);
581 data->hw_addr[2] = hw_addr[1];
582 data->hw_addr[1] = hw_addr[2];
583 data->hw_addr[0] = hw_addr[3];
584 }
ca55eb47
EH
585 if (!is_valid_ether_addr(data->hw_addr))
586 IWL_ERR_DEV(dev,
587 "mac address from hw section is not valid\n");
1e0b393a 588
6a68a39f
EH
589 return;
590 }
9f32e017 591
6a68a39f 592 IWL_ERR_DEV(dev, "mac address is not found\n");
9f32e017
EH
593}
594
b1e1adfa
JB
595struct iwl_nvm_data *
596iwl_parse_nvm_data(struct device *dev, const struct iwl_cfg *cfg,
597 const __le16 *nvm_hw, const __le16 *nvm_sw,
77db0a3c 598 const __le16 *nvm_calib, const __le16 *regulatory,
770ceda6
AN
599 const __le16 *mac_override, u8 tx_chains, u8 rx_chains,
600 bool lar_supported)
b1e1adfa
JB
601{
602 struct iwl_nvm_data *data;
77db0a3c
EH
603 u32 sku;
604 u32 radio_cfg;
605
606 if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
607 data = kzalloc(sizeof(*data) +
608 sizeof(struct ieee80211_channel) *
609 IWL_NUM_CHANNELS,
610 GFP_KERNEL);
611 else
612 data = kzalloc(sizeof(*data) +
613 sizeof(struct ieee80211_channel) *
614 IWL_NUM_CHANNELS_FAMILY_8000,
615 GFP_KERNEL);
b1e1adfa
JB
616 if (!data)
617 return NULL;
618
77db0a3c 619 data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
b1e1adfa 620
77db0a3c
EH
621 radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw);
622 iwl_set_radio_cfg(cfg, data, radio_cfg);
a0544272
MH
623 if (data->valid_tx_ant)
624 tx_chains &= data->valid_tx_ant;
625 if (data->valid_rx_ant)
626 rx_chains &= data->valid_rx_ant;
b1e1adfa 627
77db0a3c 628 sku = iwl_get_sku(cfg, nvm_sw);
b1e1adfa
JB
629 data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
630 data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
631 data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
77db0a3c 632 data->sku_cap_11ac_enable = sku & NVM_SKU_CAP_11AC_ENABLE;
b1e1adfa
JB
633 if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
634 data->sku_cap_11n_enable = false;
635
77db0a3c 636 data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
b1e1adfa 637
77db0a3c
EH
638 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
639 /* Checking for required sections */
640 if (!nvm_calib) {
641 IWL_ERR_DEV(dev,
642 "Can't parse empty Calib NVM sections\n");
1270c416 643 kfree(data);
77db0a3c
EH
644 return NULL;
645 }
646 /* in family 8000 Xtal calibration values moved to OTP */
647 data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
648 data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
b1e1adfa
JB
649 }
650
77db0a3c
EH
651 if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
652 iwl_set_hw_address(cfg, data, nvm_hw);
b1e1adfa 653
77db0a3c
EH
654 iwl_init_sbands(dev, cfg, data, nvm_sw,
655 sku & NVM_SKU_CAP_11AC_ENABLE, tx_chains,
770ceda6 656 rx_chains, lar_supported);
77db0a3c
EH
657 } else {
658 /* MAC address in family 8000 */
6a68a39f
EH
659 iwl_set_hw_address_family_8000(dev, cfg, data, mac_override,
660 nvm_hw);
b1e1adfa 661
77db0a3c
EH
662 iwl_init_sbands(dev, cfg, data, regulatory,
663 sku & NVM_SKU_CAP_11AC_ENABLE, tx_chains,
770ceda6 664 rx_chains, lar_supported);
77db0a3c 665 }
b1e1adfa 666
33b2f684 667 data->calib_version = 255;
b1e1adfa
JB
668
669 return data;
670}
48e29340 671IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
af45a900
AN
672
673static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
b281c93d
MG
674 int ch_idx, u16 nvm_flags,
675 const struct iwl_cfg *cfg)
af45a900
AN
676{
677 u32 flags = NL80211_RRF_NO_HT40;
b281c93d
MG
678 u32 last_5ghz_ht = LAST_5GHZ_HT;
679
680 if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
681 last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
af45a900
AN
682
683 if (ch_idx < NUM_2GHZ_CHANNELS &&
684 (nvm_flags & NVM_CHANNEL_40MHZ)) {
685 if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
686 flags &= ~NL80211_RRF_NO_HT40PLUS;
687 if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
688 flags &= ~NL80211_RRF_NO_HT40MINUS;
b281c93d 689 } else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
af45a900
AN
690 (nvm_flags & NVM_CHANNEL_40MHZ)) {
691 if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
692 flags &= ~NL80211_RRF_NO_HT40PLUS;
693 else
694 flags &= ~NL80211_RRF_NO_HT40MINUS;
695 }
696
697 if (!(nvm_flags & NVM_CHANNEL_80MHZ))
698 flags |= NL80211_RRF_NO_80MHZ;
699 if (!(nvm_flags & NVM_CHANNEL_160MHZ))
700 flags |= NL80211_RRF_NO_160MHZ;
701
af45a900
AN
702 if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
703 flags |= NL80211_RRF_NO_IR;
704
705 if (nvm_flags & NVM_CHANNEL_RADAR)
706 flags |= NL80211_RRF_DFS;
707
708 if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
709 flags |= NL80211_RRF_NO_OUTDOOR;
710
711 /* Set the GO concurrent flag only in case that NO_IR is set.
712 * Otherwise it is meaningless
713 */
714 if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
715 (flags & NL80211_RRF_NO_IR))
716 flags |= NL80211_RRF_GO_CONCURRENT;
717
718 return flags;
719}
720
721struct ieee80211_regdomain *
162ee3c9
AN
722iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
723 int num_of_ch, __le32 *channels, u16 fw_mcc)
af45a900
AN
724{
725 int ch_idx;
726 u16 ch_flags, prev_ch_flags = 0;
162ee3c9
AN
727 const u8 *nvm_chan = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
728 iwl_nvm_channels_family_8000 : iwl_nvm_channels;
af45a900
AN
729 struct ieee80211_regdomain *regd;
730 int size_of_regd;
731 struct ieee80211_reg_rule *rule;
732 enum ieee80211_band band;
733 int center_freq, prev_center_freq = 0;
734 int valid_rules = 0;
735 bool new_rule;
736
737 if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
738 return ERR_PTR(-EINVAL);
739
740 IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
741 num_of_ch);
742
743 /* build a regdomain rule for every valid channel */
744 size_of_regd =
745 sizeof(struct ieee80211_regdomain) +
746 num_of_ch * sizeof(struct ieee80211_reg_rule);
747
748 regd = kzalloc(size_of_regd, GFP_KERNEL);
749 if (!regd)
750 return ERR_PTR(-ENOMEM);
751
752 for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
753 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
754 band = (ch_idx < NUM_2GHZ_CHANNELS) ?
755 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
756 center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
757 band);
758 new_rule = false;
759
760 if (!(ch_flags & NVM_CHANNEL_VALID)) {
761 IWL_DEBUG_DEV(dev, IWL_DL_LAR,
762 "Ch. %d Flags %x [%sGHz] - No traffic\n",
763 nvm_chan[ch_idx],
764 ch_flags,
765 (ch_idx >= NUM_2GHZ_CHANNELS) ?
766 "5.2" : "2.4");
767 continue;
768 }
769
770 /* we can't continue the same rule */
771 if (ch_idx == 0 || prev_ch_flags != ch_flags ||
772 center_freq - prev_center_freq > 20) {
773 valid_rules++;
774 new_rule = true;
775 }
776
777 rule = &regd->reg_rules[valid_rules - 1];
778
779 if (new_rule)
780 rule->freq_range.start_freq_khz =
781 MHZ_TO_KHZ(center_freq - 10);
782
783 rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
784
785 /* this doesn't matter - not used by FW */
786 rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
787 rule->power_rule.max_eirp = DBM_TO_MBM(20);
788
789 rule->flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
b281c93d 790 ch_flags, cfg);
af45a900
AN
791
792 /* rely on auto-calculation to merge BW of contiguous chans */
793 rule->flags |= NL80211_RRF_AUTO_BW;
794 rule->freq_range.max_bandwidth_khz = 0;
795
796 prev_ch_flags = ch_flags;
797 prev_center_freq = center_freq;
798
799 IWL_DEBUG_DEV(dev, IWL_DL_LAR,
bdf2fae8 800 "Ch. %d [%sGHz] %s%s%s%s%s%s%s%s%s(0x%02x): Ad-Hoc %ssupported\n",
af45a900
AN
801 center_freq,
802 band == IEEE80211_BAND_5GHZ ? "5.2" : "2.4",
803 CHECK_AND_PRINT_I(VALID),
af45a900
AN
804 CHECK_AND_PRINT_I(ACTIVE),
805 CHECK_AND_PRINT_I(RADAR),
806 CHECK_AND_PRINT_I(WIDE),
807 CHECK_AND_PRINT_I(40MHZ),
808 CHECK_AND_PRINT_I(80MHZ),
809 CHECK_AND_PRINT_I(160MHZ),
810 CHECK_AND_PRINT_I(INDOOR_ONLY),
811 CHECK_AND_PRINT_I(GO_CONCURRENT),
812 ch_flags,
bdf2fae8 813 ((ch_flags & NVM_CHANNEL_ACTIVE) &&
af45a900
AN
814 !(ch_flags & NVM_CHANNEL_RADAR))
815 ? "" : "not ");
816 }
817
818 regd->n_reg_rules = valid_rules;
819
820 /* set alpha2 from FW. */
821 regd->alpha2[0] = fw_mcc >> 8;
822 regd->alpha2[1] = fw_mcc & 0xff;
823
824 return regd;
825}
826IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
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