iwlwifi: make debug level more user friendly
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
WT
51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
b481de9c
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60/*
61 * module name, copyright, version, etc.
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
df878d8f
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
5905a1aa 92 .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
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95 /* the rest are 0 by default */
96};
97
7e4bca5e
SO
98/**
99 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
100 * @priv: eeprom and antenna fields are used to determine antenna flags
101 *
102 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
103 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
104 *
105 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
106 * IWL_ANTENNA_MAIN - Force MAIN antenna
107 * IWL_ANTENNA_AUX - Force AUX antenna
108 */
109__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
110{
111 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
112
113 switch (iwl3945_mod_params.antenna) {
114 case IWL_ANTENNA_DIVERSITY:
115 return 0;
116
117 case IWL_ANTENNA_MAIN:
118 if (eeprom->antenna_switch_type)
119 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
121
122 case IWL_ANTENNA_AUX:
123 if (eeprom->antenna_switch_type)
124 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
126 }
127
128 /* bad antenna selector value */
129 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
130 iwl3945_mod_params.antenna);
131
132 return 0; /* "diversity" is default if error */
133}
134
6e21f15c 135static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
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136 struct ieee80211_key_conf *keyconf,
137 u8 sta_id)
138{
139 unsigned long flags;
140 __le16 key_flags = 0;
6e21f15c
AK
141 int ret;
142
143 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
144 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
145
146 if (sta_id == priv->hw_params.bcast_sta_id)
147 key_flags |= STA_KEY_MULTICAST_MSK;
148
149 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
150 keyconf->hw_key_idx = keyconf->keyidx;
151 key_flags &= ~STA_KEY_FLG_INVALID;
b481de9c 152
b481de9c 153 spin_lock_irqsave(&priv->sta_lock, flags);
c587de0b
TW
154 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
155 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
156 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
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157 keyconf->keylen);
158
c587de0b 159 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
b481de9c 160 keyconf->keylen);
6e21f15c 161
c587de0b 162 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
6e21f15c 163 == STA_KEY_FLG_NO_ENC)
c587de0b 164 priv->stations[sta_id].sta.key.key_offset =
6e21f15c
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165 iwl_get_free_ucode_key_index(priv);
166 /* else, we are overriding an existing key => no need to allocated room
167 * in uCode. */
168
c587de0b 169 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
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170 "no space for a new key");
171
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TW
172 priv->stations[sta_id].sta.key.key_flags = key_flags;
173 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
174 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
b481de9c 175
6e21f15c
AK
176 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
177
c587de0b 178 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6e21f15c 179
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180 spin_unlock_irqrestore(&priv->sta_lock, flags);
181
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182 return ret;
183}
184
185static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
186 struct ieee80211_key_conf *keyconf,
187 u8 sta_id)
188{
189 return -EOPNOTSUPP;
190}
191
192static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
193 struct ieee80211_key_conf *keyconf,
194 u8 sta_id)
195{
196 return -EOPNOTSUPP;
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197}
198
4a8a4322 199static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
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200{
201 unsigned long flags;
202
203 spin_lock_irqsave(&priv->sta_lock, flags);
c587de0b
TW
204 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
205 memset(&priv->stations[sta_id].sta.key, 0,
4c897253 206 sizeof(struct iwl4965_keyinfo));
c587de0b
TW
207 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
208 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
209 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
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210 spin_unlock_irqrestore(&priv->sta_lock, flags);
211
e1623446 212 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
c587de0b 213 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
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214 return 0;
215}
216
fa11d525 217static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
6e21f15c
AK
218 struct ieee80211_key_conf *keyconf, u8 sta_id)
219{
220 int ret = 0;
221
222 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
223
224 switch (keyconf->alg) {
225 case ALG_CCMP:
226 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
227 break;
228 case ALG_TKIP:
229 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
230 break;
231 case ALG_WEP:
232 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
233 break;
234 default:
1e680233 235 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
6e21f15c
AK
236 ret = -EINVAL;
237 }
238
239 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
240 keyconf->alg, keyconf->keylen, keyconf->keyidx,
241 sta_id, ret);
242
243 return ret;
244}
245
246static int iwl3945_remove_static_key(struct iwl_priv *priv)
247{
248 int ret = -EOPNOTSUPP;
249
250 return ret;
251}
252
253static int iwl3945_set_static_key(struct iwl_priv *priv,
254 struct ieee80211_key_conf *key)
255{
256 if (key->alg == ALG_WEP)
257 return -EOPNOTSUPP;
258
259 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
260 return -EINVAL;
261}
262
4a8a4322 263static void iwl3945_clear_free_frames(struct iwl_priv *priv)
b481de9c
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264{
265 struct list_head *element;
266
e1623446 267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
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268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
bb8c093b 273 kfree(list_entry(element, struct iwl3945_frame, list));
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274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
39aadf8c 278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
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279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282}
283
4a8a4322 284static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 285{
bb8c093b 286 struct iwl3945_frame *frame;
b481de9c
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287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
15b1687c 291 IWL_ERR(priv, "Could not allocate frame!\n");
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292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
bb8c093b 301 return list_entry(element, struct iwl3945_frame, list);
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302}
303
4a8a4322 304static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
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305{
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308}
309
4a8a4322 310unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 311 struct ieee80211_hdr *hdr,
73ec1cc2 312 int left)
b481de9c
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313{
314
8ccde88a 315 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
316 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
317 (priv->iw_mode != NL80211_IFTYPE_AP)))
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318 return 0;
319
320 if (priv->ibss_beacon->len > left)
321 return 0;
322
323 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
324
325 return priv->ibss_beacon->len;
326}
327
4a8a4322 328static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 329{
bb8c093b 330 struct iwl3945_frame *frame;
b481de9c
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331 unsigned int frame_size;
332 int rc;
333 u8 rate;
334
bb8c093b 335 frame = iwl3945_get_free_frame(priv);
b481de9c
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336
337 if (!frame) {
15b1687c 338 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
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339 "command.\n");
340 return -ENOMEM;
341 }
342
8ccde88a 343 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 344
bb8c093b 345 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 346
518099a8 347 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
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348 &frame->u.cmd[0]);
349
bb8c093b 350 iwl3945_free_frame(priv, frame);
b481de9c
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351
352 return rc;
353}
354
4a8a4322 355static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 356{
3832ec9d 357 if (priv->shared_virt)
b481de9c 358 pci_free_consistent(priv->pci_dev,
bb8c093b 359 sizeof(struct iwl3945_shared),
3832ec9d
AK
360 priv->shared_virt,
361 priv->shared_phys);
b481de9c
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362}
363
4a8a4322 364static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 365 struct ieee80211_tx_info *info,
c2d79b48 366 struct iwl_cmd *cmd,
b481de9c 367 struct sk_buff *skb_frag,
6e21f15c 368 int sta_id)
b481de9c 369{
e52119c5 370 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
c587de0b 371 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
b481de9c
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372
373 switch (keyinfo->alg) {
374 case ALG_CCMP:
e52119c5
WT
375 tx->sec_ctl = TX_CMD_SEC_CCM;
376 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 377 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
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378 break;
379
380 case ALG_TKIP:
b481de9c
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381 break;
382
383 case ALG_WEP:
e52119c5 384 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 385 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
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386
387 if (keyinfo->keylen == 13)
e52119c5 388 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 389
e52119c5 390 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 391
e1623446 392 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 393 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
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394 break;
395
b481de9c 396 default:
978785a3 397 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
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398 break;
399 }
400}
401
402/*
403 * handle build REPLY_TX command notification.
404 */
4a8a4322 405static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 406 struct iwl_cmd *cmd,
e039fa4a 407 struct ieee80211_tx_info *info,
e52119c5 408 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 409{
e52119c5
WT
410 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
411 __le32 tx_flags = tx->tx_flags;
fd7c8a40 412 __le16 fc = hdr->frame_control;
e6a9854b 413 u8 rc_flags = info->control.rates[0].flags;
b481de9c 414
e52119c5 415 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 416 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 417 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 418 if (ieee80211_is_mgmt(fc))
b481de9c 419 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 420 if (ieee80211_is_probe_resp(fc) &&
b481de9c
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421 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
422 tx_flags |= TX_CMD_FLG_TSF_MSK;
423 } else {
424 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
425 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
426 }
427
e52119c5 428 tx->sta_id = std_id;
8b7b1e05 429 if (ieee80211_has_morefrags(fc))
b481de9c
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430 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
431
fd7c8a40
HH
432 if (ieee80211_is_data_qos(fc)) {
433 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 434 tx->tid_tspec = qc[0] & 0xf;
b481de9c 435 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 436 } else {
b481de9c 437 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 438 }
b481de9c 439
e6a9854b 440 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
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441 tx_flags |= TX_CMD_FLG_RTS_MSK;
442 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 443 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
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444 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
445 tx_flags |= TX_CMD_FLG_CTS_MSK;
446 }
447
448 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
449 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
450
451 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
452 if (ieee80211_is_mgmt(fc)) {
453 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 454 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 455 else
e52119c5 456 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 457 } else {
e52119c5 458 tx->timeout.pm_frame_timeout = 0;
5c8df2d5 459#ifdef CONFIG_IWLWIFI_LEDS
ab53d8af
MA
460 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
461#endif
462 }
b481de9c 463
e52119c5
WT
464 tx->driver_txop = 0;
465 tx->tx_flags = tx_flags;
466 tx->next_frame_len = 0;
b481de9c
ZY
467}
468
b481de9c
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469/*
470 * start REPLY_TX command process
471 */
4a8a4322 472static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
473{
474 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 475 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 476 struct iwl3945_tx_cmd *tx;
188cf6c7 477 struct iwl_tx_queue *txq = NULL;
d20b3c65 478 struct iwl_queue *q = NULL;
e52119c5 479 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
480 dma_addr_t phys_addr;
481 dma_addr_t txcmd_phys;
e52119c5 482 int txq_id = skb_get_queue_mapping(skb);
df833b1d 483 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
54dbb525
TW
484 u8 id;
485 u8 unicast;
b481de9c 486 u8 sta_id;
54dbb525 487 u8 tid = 0;
b481de9c 488 u16 seq_number = 0;
fd7c8a40 489 __le16 fc;
b481de9c 490 u8 wait_write_ptr = 0;
54dbb525 491 u8 *qc = NULL;
b481de9c
ZY
492 unsigned long flags;
493 int rc;
494
495 spin_lock_irqsave(&priv->lock, flags);
775a6e27 496 if (iwl_is_rfkill(priv)) {
e1623446 497 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
498 goto drop_unlock;
499 }
500
e039fa4a 501 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 502 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
503 goto drop_unlock;
504 }
505
506 unicast = !is_multicast_ether_addr(hdr->addr1);
507 id = 0;
508
fd7c8a40 509 fc = hdr->frame_control;
b481de9c 510
d08853a3 511#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 512 if (ieee80211_is_auth(fc))
e1623446 513 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 514 else if (ieee80211_is_assoc_req(fc))
e1623446 515 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 516 else if (ieee80211_is_reassoc_req(fc))
e1623446 517 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
518#endif
519
7878a5a4 520 /* drop all data frame if we are not associated */
914233d6 521 if (ieee80211_is_data(fc) &&
279b05d4 522 (!iwl_is_monitor_mode(priv)) && /* packet injection */
8ccde88a 523 (!iwl_is_associated(priv) ||
05c914fe 524 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 525 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
526 goto drop_unlock;
527 }
528
529 spin_unlock_irqrestore(&priv->lock, flags);
530
7294ec95 531 hdr_len = ieee80211_hdrlen(fc);
6440adb5
CB
532
533 /* Find (or create) index into station table for destination station */
f5d30266 534 sta_id = iwl_get_sta_id(priv, hdr);
b481de9c 535 if (sta_id == IWL_INVALID_STATION) {
e1623446 536 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 537 hdr->addr1);
b481de9c
ZY
538 goto drop;
539 }
540
e1623446 541 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 542
fd7c8a40
HH
543 if (ieee80211_is_data_qos(fc)) {
544 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 545 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
c587de0b 546 seq_number = priv->stations[sta_id].tid[tid].seq_number &
b481de9c
ZY
547 IEEE80211_SCTL_SEQ;
548 hdr->seq_ctrl = cpu_to_le16(seq_number) |
549 (hdr->seq_ctrl &
c1b4aa3f 550 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
551 seq_number += 0x10;
552 }
6440adb5
CB
553
554 /* Descriptor for chosen Tx queue */
188cf6c7 555 txq = &priv->txq[txq_id];
b481de9c
ZY
556 q = &txq->q;
557
558 spin_lock_irqsave(&priv->lock, flags);
559
fc4b6853 560 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 561
6440adb5 562 /* Set up driver data for this TFD */
dbb6654c 563 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 564 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
CB
565
566 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 567 out_cmd = txq->cmd[idx];
e52119c5 568 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 569 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 570 memset(tx, 0, sizeof(*tx));
6440adb5
CB
571
572 /*
573 * Set up the Tx-command (not MAC!) header.
574 * Store the chosen Tx queue and TFD index within the sequence field;
575 * after Tx, uCode's Tx response will return this value so driver can
576 * locate the frame within the tx queue and do post-tx processing.
577 */
b481de9c
ZY
578 out_cmd->hdr.cmd = REPLY_TX;
579 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 580 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
581
582 /* Copy MAC header from skb into command buffer */
e52119c5 583 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 584
df833b1d
RC
585
586 if (info->control.hw_key)
587 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
588
589 /* TODO need this for burst mode later on */
590 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
591
592 /* set is_hcca to 0; it probably will never be implemented */
593 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
594
595 /* Total # bytes to be transmitted */
596 len = (u16)skb->len;
597 tx->len = cpu_to_le16(len);
598
599
600 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
601 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
602
603 if (!ieee80211_has_morefrags(hdr->frame_control)) {
604 txq->need_update = 1;
605 if (qc)
c587de0b 606 priv->stations[sta_id].tid[tid].seq_number = seq_number;
df833b1d
RC
607 } else {
608 wait_write_ptr = 1;
609 txq->need_update = 0;
610 }
611
612 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
613 le16_to_cpu(out_cmd->hdr.sequence));
614 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
a562a9dd
RC
615 iwl_print_hex_dump(IWL_DL_TX, tx, sizeof(*tx));
616 iwl_print_hex_dump(IWL_DL_TX, (u8 *)tx->hdr,
df833b1d
RC
617 ieee80211_hdrlen(fc));
618
6440adb5
CB
619 /*
620 * Use the first empty entry in this queue's command buffer array
621 * to contain the Tx command and MAC header concatenated together
622 * (payload data will be in another buffer).
623 * Size of this varies, due to varying MAC header length.
624 * If end is not dword aligned, we'll have 2 extra bytes at the end
625 * of the MAC header (device reads on dword boundaries).
626 * We'll tell device about this padding later.
627 */
3832ec9d 628 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 629 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
630
631 len_org = len;
632 len = (len + 3) & ~3;
633
634 if (len_org != len)
635 len_org = 1;
636 else
637 len_org = 0;
638
6440adb5
CB
639 /* Physical address of this Tx command's header (not MAC header!),
640 * within command buffer array. */
df833b1d
RC
641 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
642 len, PCI_DMA_TODEVICE);
643 /* we do not map meta data ... so we can safely access address to
644 * provide to unmap command*/
188cf6c7 645 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
df833b1d 646 pci_unmap_len_set(&out_cmd->meta, len, len);
b481de9c 647
6440adb5
CB
648 /* Add buffer containing Tx command and MAC(!) header to TFD's
649 * first entry */
7aaa1d79
SO
650 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
651 txcmd_phys, len, 1, 0);
b481de9c 652
b481de9c 653
6440adb5
CB
654 /* Set up TFD's 2nd entry to point directly to remainder of skb,
655 * if any (802.11 null frames have no payload). */
b481de9c
ZY
656 len = skb->len - hdr_len;
657 if (len) {
658 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
659 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
660 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
661 phys_addr, len,
662 0, U32_PAD(len));
b481de9c
ZY
663 }
664
b481de9c 665
6440adb5 666 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 667 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 668 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
669 spin_unlock_irqrestore(&priv->lock, flags);
670
671 if (rc)
672 return rc;
673
d20b3c65 674 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
675 && priv->mac80211_registered) {
676 if (wait_write_ptr) {
677 spin_lock_irqsave(&priv->lock, flags);
678 txq->need_update = 1;
4f3602c8 679 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
680 spin_unlock_irqrestore(&priv->lock, flags);
681 }
682
e4e72fb4 683 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
b481de9c
ZY
684 }
685
686 return 0;
687
688drop_unlock:
689 spin_unlock_irqrestore(&priv->lock, flags);
690drop:
691 return -1;
692}
693
c8b0e6e1 694#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
695
696#include "iwl-spectrum.h"
697
698#define BEACON_TIME_MASK_LOW 0x00FFFFFF
699#define BEACON_TIME_MASK_HIGH 0xFF000000
700#define TIME_UNIT 1024
701
702/*
703 * extended beacon time format
704 * time in usec will be changed into a 32-bit value in 8:24 format
705 * the high 1 byte is the beacon counts
706 * the lower 3 bytes is the time in usec within one beacon interval
707 */
708
bb8c093b 709static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
710{
711 u32 quot;
712 u32 rem;
713 u32 interval = beacon_interval * 1024;
714
715 if (!interval || !usec)
716 return 0;
717
718 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
719 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
720
721 return (quot << 24) + rem;
722}
723
724/* base is usually what we get from ucode with each received frame,
725 * the same as HW timer counter counting down
726 */
727
bb8c093b 728static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
729{
730 u32 base_low = base & BEACON_TIME_MASK_LOW;
731 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
732 u32 interval = beacon_interval * TIME_UNIT;
733 u32 res = (base & BEACON_TIME_MASK_HIGH) +
734 (addon & BEACON_TIME_MASK_HIGH);
735
736 if (base_low > addon_low)
737 res += base_low - addon_low;
738 else if (base_low < addon_low) {
739 res += interval + base_low - addon_low;
740 res += (1 << 24);
741 } else
742 res += (1 << 24);
743
744 return cpu_to_le32(res);
745}
746
4a8a4322 747static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
748 struct ieee80211_measurement_params *params,
749 u8 type)
750{
600c0e11 751 struct iwl_spectrum_cmd spectrum;
3d24a9f7 752 struct iwl_rx_packet *res;
c2d79b48 753 struct iwl_host_cmd cmd = {
b481de9c
ZY
754 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
755 .data = (void *)&spectrum,
756 .meta.flags = CMD_WANT_SKB,
757 };
758 u32 add_time = le64_to_cpu(params->start_time);
759 int rc;
760 int spectrum_resp_status;
761 int duration = le16_to_cpu(params->duration);
762
8ccde88a 763 if (iwl_is_associated(priv))
b481de9c 764 add_time =
bb8c093b 765 iwl3945_usecs_to_beacons(
b481de9c
ZY
766 le64_to_cpu(params->start_time) - priv->last_tsf,
767 le16_to_cpu(priv->rxon_timing.beacon_interval));
768
769 memset(&spectrum, 0, sizeof(spectrum));
770
771 spectrum.channel_count = cpu_to_le16(1);
772 spectrum.flags =
773 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
774 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
775 cmd.len = sizeof(spectrum);
776 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
777
8ccde88a 778 if (iwl_is_associated(priv))
b481de9c 779 spectrum.start_time =
bb8c093b 780 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
781 add_time,
782 le16_to_cpu(priv->rxon_timing.beacon_interval));
783 else
784 spectrum.start_time = 0;
785
786 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
787 spectrum.channels[0].channel = params->channel;
788 spectrum.channels[0].type = type;
8ccde88a 789 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
790 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
791 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
792
518099a8 793 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
794 if (rc)
795 return rc;
796
3d24a9f7 797 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 798 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 799 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
800 rc = -EIO;
801 }
802
803 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
804 switch (spectrum_resp_status) {
805 case 0: /* Command will be handled */
806 if (res->u.spectrum.id != 0xff) {
e1623446 807 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 808 res->u.spectrum.id);
b481de9c
ZY
809 priv->measurement_status &= ~MEASUREMENT_READY;
810 }
811 priv->measurement_status |= MEASUREMENT_ACTIVE;
812 rc = 0;
813 break;
814
815 case 1: /* Command will not be handled */
816 rc = -EAGAIN;
817 break;
818 }
819
820 dev_kfree_skb_any(cmd.meta.u.skb);
821
822 return rc;
823}
824#endif
825
4a8a4322 826static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 827 struct iwl_rx_mem_buffer *rxb)
b481de9c 828{
3d24a9f7
TW
829 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
830 struct iwl_alive_resp *palive;
b481de9c
ZY
831 struct delayed_work *pwork;
832
833 palive = &pkt->u.alive_frame;
834
e1623446 835 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
836 "0x%01X 0x%01X\n",
837 palive->is_valid, palive->ver_type,
838 palive->ver_subtype);
839
840 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 841 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
842 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
843 sizeof(struct iwl_alive_resp));
b481de9c
ZY
844 pwork = &priv->init_alive_start;
845 } else {
e1623446 846 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 847 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 848 sizeof(struct iwl_alive_resp));
b481de9c 849 pwork = &priv->alive_start;
bb8c093b 850 iwl3945_disable_events(priv);
b481de9c
ZY
851 }
852
853 /* We delay the ALIVE response by 5ms to
854 * give the HW RF Kill time to activate... */
855 if (palive->is_valid == UCODE_VALID_OK)
856 queue_delayed_work(priv->workqueue, pwork,
857 msecs_to_jiffies(5));
858 else
39aadf8c 859 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
860}
861
4a8a4322 862static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 863 struct iwl_rx_mem_buffer *rxb)
b481de9c 864{
c7e035a9 865#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 866 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 867#endif
b481de9c 868
e1623446 869 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
870 return;
871}
872
bb8c093b 873static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 874{
4a8a4322
AK
875 struct iwl_priv *priv =
876 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
877 struct sk_buff *beacon;
878
879 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 880 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
881
882 if (!beacon) {
15b1687c 883 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
884 return;
885 }
886
887 mutex_lock(&priv->mutex);
888 /* new beacon skb is allocated every time; dispose previous.*/
889 if (priv->ibss_beacon)
890 dev_kfree_skb(priv->ibss_beacon);
891
892 priv->ibss_beacon = beacon;
893 mutex_unlock(&priv->mutex);
894
bb8c093b 895 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
896}
897
4a8a4322 898static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 899 struct iwl_rx_mem_buffer *rxb)
b481de9c 900{
d08853a3 901#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 902 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 903 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
904 u8 rate = beacon->beacon_notify_hdr.rate;
905
e1623446 906 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
907 "tsf %d %d rate %d\n",
908 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
909 beacon->beacon_notify_hdr.failure_frame,
910 le32_to_cpu(beacon->ibss_mgr_status),
911 le32_to_cpu(beacon->high_tsf),
912 le32_to_cpu(beacon->low_tsf), rate);
913#endif
914
05c914fe 915 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
916 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
917 queue_work(priv->workqueue, &priv->beacon_update);
918}
919
b481de9c
ZY
920/* Handle notification from uCode that card's power state is changing
921 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 922static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 923 struct iwl_rx_mem_buffer *rxb)
b481de9c 924{
3d24a9f7 925 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
926 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
927 unsigned long status = priv->status;
928
e1623446 929 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
930 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
931 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
932
5d49f498 933 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
934 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
935
936 if (flags & HW_CARD_DISABLED)
937 set_bit(STATUS_RF_KILL_HW, &priv->status);
938 else
939 clear_bit(STATUS_RF_KILL_HW, &priv->status);
940
941
af0053d6 942 iwl_scan_cancel(priv);
b481de9c
ZY
943
944 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
a60e77e5
JB
945 test_bit(STATUS_RF_KILL_HW, &priv->status)))
946 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
947 test_bit(STATUS_RF_KILL_HW, &priv->status));
b481de9c
ZY
948 else
949 wake_up_interruptible(&priv->wait_command_queue);
950}
951
952/**
bb8c093b 953 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
954 *
955 * Setup the RX handlers for each of the reply types sent from the uCode
956 * to the host.
957 *
958 * This function chains into the hardware specific files for them to setup
959 * any hardware specific handlers as well.
960 */
4a8a4322 961static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 962{
bb8c093b
CH
963 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
964 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
261b9c33 965 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
8ccde88a 966 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
030f05ed 967 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
b481de9c 968 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
030f05ed 969 iwl_rx_pm_debug_statistics_notif;
bb8c093b 970 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 971
9fbab516
BC
972 /*
973 * The same handler is used for both the REPLY to a discrete
974 * statistics request from the host as well as for the periodic
975 * statistics notifications (after received beacons) from the uCode.
b481de9c 976 */
bb8c093b
CH
977 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
978 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 979
261b9c33 980 iwl_setup_spectrum_handlers(priv);
cade0eb2 981 iwl_setup_rx_scan_handlers(priv);
bb8c093b 982 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 983
9fbab516 984 /* Set up hardware specific Rx handlers */
bb8c093b 985 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
986}
987
b481de9c
ZY
988/************************** RX-FUNCTIONS ****************************/
989/*
990 * Rx theory of operation
991 *
992 * The host allocates 32 DMA target addresses and passes the host address
993 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
994 * 0 to 31
995 *
996 * Rx Queue Indexes
997 * The host/firmware share two index registers for managing the Rx buffers.
998 *
999 * The READ index maps to the first position that the firmware may be writing
1000 * to -- the driver can read up to (but not including) this position and get
1001 * good data.
1002 * The READ index is managed by the firmware once the card is enabled.
1003 *
1004 * The WRITE index maps to the last position the driver has read from -- the
1005 * position preceding WRITE is the last slot the firmware can place a packet.
1006 *
1007 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1008 * WRITE = READ.
1009 *
9fbab516 1010 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1011 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1012 *
9fbab516 1013 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1014 * and fire the RX interrupt. The driver can then query the READ index and
1015 * process as many packets as possible, moving the WRITE index forward as it
1016 * resets the Rx queue buffers with new memory.
1017 *
1018 * The management in the driver is as follows:
1019 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1020 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1021 * to replenish the iwl->rxq->rx_free.
bb8c093b 1022 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1023 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1024 * 'processed' and 'read' driver indexes as well)
1025 * + A received packet is processed and handed to the kernel network stack,
1026 * detached from the iwl->rxq. The driver 'processed' index is updated.
1027 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1028 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1029 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1030 * were enough free buffers and RX_STALLED is set it is cleared.
1031 *
1032 *
1033 * Driver sequence:
1034 *
9fbab516 1035 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1036 * iwl3945_rx_queue_restock
9fbab516 1037 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1038 * queue, updates firmware pointers, and updates
1039 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1040 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1041 *
1042 * -- enable interrupts --
6100b588 1043 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1044 * READ INDEX, detaching the SKB from the pool.
1045 * Moves the packet buffer from queue to rx_used.
bb8c093b 1046 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1047 * slots.
1048 * ...
1049 *
1050 */
1051
b481de9c 1052/**
9fbab516 1053 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1054 */
4a8a4322 1055static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1056 dma_addr_t dma_addr)
1057{
1058 return cpu_to_le32((u32)dma_addr);
1059}
1060
1061/**
bb8c093b 1062 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1063 *
9fbab516 1064 * If there are slots in the RX queue that need to be restocked,
b481de9c 1065 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1066 * as we can, pulling from rx_free.
b481de9c
ZY
1067 *
1068 * This moves the 'write' index forward to catch up with 'processed', and
1069 * also updates the memory address in the firmware to reference the new
1070 * target buffer.
1071 */
4a8a4322 1072static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1073{
cc2f362c 1074 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1075 struct list_head *element;
6100b588 1076 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1077 unsigned long flags;
1078 int write, rc;
1079
1080 spin_lock_irqsave(&rxq->lock, flags);
1081 write = rxq->write & ~0x7;
37d68317 1082 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1083 /* Get next free Rx buffer, remove from free list */
b481de9c 1084 element = rxq->rx_free.next;
6100b588 1085 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1086 list_del(element);
6440adb5
CB
1087
1088 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1089 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1090 rxq->queue[rxq->write] = rxb;
1091 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1092 rxq->free_count--;
1093 }
1094 spin_unlock_irqrestore(&rxq->lock, flags);
1095 /* If the pre-allocated buffer pool is dropping low, schedule to
1096 * refill it */
1097 if (rxq->free_count <= RX_LOW_WATERMARK)
1098 queue_work(priv->workqueue, &priv->rx_replenish);
1099
1100
6440adb5
CB
1101 /* If we've added more space for the firmware to place data, tell it.
1102 * Increment device's write pointer in multiples of 8. */
d14d4440 1103 if ((rxq->write_actual != (rxq->write & ~0x7))
b481de9c
ZY
1104 || (abs(rxq->write - rxq->read) > 7)) {
1105 spin_lock_irqsave(&rxq->lock, flags);
1106 rxq->need_update = 1;
1107 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1108 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1109 if (rc)
1110 return rc;
1111 }
1112
1113 return 0;
1114}
1115
1116/**
bb8c093b 1117 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1118 *
1119 * When moving to rx_free an SKB is allocated for the slot.
1120 *
bb8c093b 1121 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1122 * This is called as a scheduled work item (except for during initialization)
b481de9c 1123 */
d14d4440 1124static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
b481de9c 1125{
cc2f362c 1126 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1127 struct list_head *element;
6100b588 1128 struct iwl_rx_mem_buffer *rxb;
b481de9c 1129 unsigned long flags;
72240498
AK
1130
1131 while (1) {
1132 spin_lock_irqsave(&rxq->lock, flags);
1133
1134 if (list_empty(&rxq->rx_used)) {
1135 spin_unlock_irqrestore(&rxq->lock, flags);
1136 return;
1137 }
1138
b481de9c 1139 element = rxq->rx_used.next;
6100b588 1140 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
72240498
AK
1141 list_del(element);
1142 spin_unlock_irqrestore(&rxq->lock, flags);
6440adb5
CB
1143
1144 /* Alloc a new receive buffer */
b481de9c 1145 rxb->skb =
1e33dc64 1146 alloc_skb(priv->hw_params.rx_buf_size,
d14d4440 1147 priority);
b481de9c
ZY
1148 if (!rxb->skb) {
1149 if (net_ratelimit())
978785a3 1150 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1151 /* We don't reschedule replenish work here -- we will
1152 * call the restock method and if it still needs
1153 * more buffers it will schedule replenish */
1154 break;
1155 }
12342c47
ZY
1156
1157 /* If radiotap head is required, reserve some headroom here.
1158 * The physical head count is a variable rx_stats->phy_count.
1159 * We reserve 4 bytes here. Plus these extra bytes, the
1160 * headroom of the physical head should be enough for the
1161 * radiotap head that iwl3945 supported. See iwl3945_rt.
1162 */
1163 skb_reserve(rxb->skb, 4);
1164
6440adb5 1165 /* Get physical address of RB/SKB */
1e33dc64
WT
1166 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1167 rxb->skb->data,
1168 priv->hw_params.rx_buf_size,
1169 PCI_DMA_FROMDEVICE);
72240498
AK
1170
1171 spin_lock_irqsave(&rxq->lock, flags);
b481de9c 1172 list_add_tail(&rxb->list, &rxq->rx_free);
72240498 1173 priv->alloc_rxb_skb++;
b481de9c 1174 rxq->free_count++;
72240498 1175 spin_unlock_irqrestore(&rxq->lock, flags);
b481de9c 1176 }
5c0eef96
MA
1177}
1178
df833b1d
RC
1179void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1180{
1181 unsigned long flags;
1182 int i;
1183 spin_lock_irqsave(&rxq->lock, flags);
1184 INIT_LIST_HEAD(&rxq->rx_free);
1185 INIT_LIST_HEAD(&rxq->rx_used);
1186 /* Fill the rx_used queue with _all_ of the Rx buffers */
1187 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1188 /* In the reset function, these buffers may have been allocated
1189 * to an SKB, so we need to unmap and free potential storage */
1190 if (rxq->pool[i].skb != NULL) {
1191 pci_unmap_single(priv->pci_dev,
1192 rxq->pool[i].real_dma_addr,
1193 priv->hw_params.rx_buf_size,
1194 PCI_DMA_FROMDEVICE);
1195 priv->alloc_rxb_skb--;
1196 dev_kfree_skb(rxq->pool[i].skb);
1197 rxq->pool[i].skb = NULL;
1198 }
1199 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1200 }
1201
1202 /* Set us so that we have processed and used all buffers, but have
1203 * not restocked the Rx queue with fresh buffers */
1204 rxq->read = rxq->write = 0;
1205 rxq->free_count = 0;
d14d4440 1206 rxq->write_actual = 0;
df833b1d
RC
1207 spin_unlock_irqrestore(&rxq->lock, flags);
1208}
df833b1d 1209
5c0eef96
MA
1210void iwl3945_rx_replenish(void *data)
1211{
4a8a4322 1212 struct iwl_priv *priv = data;
5c0eef96
MA
1213 unsigned long flags;
1214
d14d4440 1215 iwl3945_rx_allocate(priv, GFP_KERNEL);
b481de9c
ZY
1216
1217 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1218 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1219 spin_unlock_irqrestore(&priv->lock, flags);
1220}
1221
d14d4440
AK
1222static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1223{
1224 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1225
1226 iwl3945_rx_queue_restock(priv);
1227}
1228
1229
df833b1d
RC
1230/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1231 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1232 * This free routine walks the list of POOL entries and if SKB is set to
1233 * non NULL it is unmapped and freed
1234 */
1235static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1236{
1237 int i;
1238 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1239 if (rxq->pool[i].skb != NULL) {
1240 pci_unmap_single(priv->pci_dev,
1241 rxq->pool[i].real_dma_addr,
1242 priv->hw_params.rx_buf_size,
1243 PCI_DMA_FROMDEVICE);
1244 dev_kfree_skb(rxq->pool[i].skb);
1245 }
1246 }
1247
1248 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1249 rxq->dma_addr);
1250 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1251 rxq->rb_stts, rxq->rb_stts_dma);
1252 rxq->bd = NULL;
1253 rxq->rb_stts = NULL;
1254}
df833b1d
RC
1255
1256
b481de9c
ZY
1257/* Convert linear signal-to-noise ratio into dB */
1258static u8 ratio2dB[100] = {
1259/* 0 1 2 3 4 5 6 7 8 9 */
1260 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1261 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1262 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1263 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1264 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1265 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1266 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1267 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1268 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1269 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1270};
1271
1272/* Calculates a relative dB value from a ratio of linear
1273 * (i.e. not dB) signal levels.
1274 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1275int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1276{
221c80cf
AB
1277 /* 1000:1 or higher just report as 60 dB */
1278 if (sig_ratio >= 1000)
b481de9c
ZY
1279 return 60;
1280
221c80cf 1281 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1282 * add 20 dB to make up for divide by 10 */
221c80cf 1283 if (sig_ratio >= 100)
3ac7f146 1284 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1285
1286 /* We shouldn't see this */
1287 if (sig_ratio < 1)
1288 return 0;
1289
1290 /* Use table for ratios 1:1 - 99:1 */
1291 return (int)ratio2dB[sig_ratio];
1292}
1293
1294#define PERFECT_RSSI (-20) /* dBm */
1295#define WORST_RSSI (-95) /* dBm */
1296#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1297
1298/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1299 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1300 * about formulas used below. */
bb8c093b 1301int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1302{
1303 int sig_qual;
1304 int degradation = PERFECT_RSSI - rssi_dbm;
1305
1306 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1307 * as indicator; formula is (signal dbm - noise dbm).
1308 * SNR at or above 40 is a great signal (100%).
1309 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1310 * Weakest usable signal is usually 10 - 15 dB SNR. */
1311 if (noise_dbm) {
1312 if (rssi_dbm - noise_dbm >= 40)
1313 return 100;
1314 else if (rssi_dbm < noise_dbm)
1315 return 0;
1316 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1317
1318 /* Else use just the signal level.
1319 * This formula is a least squares fit of data points collected and
1320 * compared with a reference system that had a percentage (%) display
1321 * for signal quality. */
1322 } else
1323 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1324 (15 * RSSI_RANGE + 62 * degradation)) /
1325 (RSSI_RANGE * RSSI_RANGE);
1326
1327 if (sig_qual > 100)
1328 sig_qual = 100;
1329 else if (sig_qual < 1)
1330 sig_qual = 0;
1331
1332 return sig_qual;
1333}
1334
1335/**
9fbab516 1336 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1337 *
1338 * Uses the priv->rx_handlers callback function array to invoke
1339 * the appropriate handlers, including command responses,
1340 * frame-received notifications, and other notifications.
1341 */
4a8a4322 1342static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1343{
6100b588 1344 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1345 struct iwl_rx_packet *pkt;
cc2f362c 1346 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1347 u32 r, i;
1348 int reclaim;
1349 unsigned long flags;
5c0eef96 1350 u8 fill_rx = 0;
d68ab680 1351 u32 count = 8;
d14d4440 1352 int total_empty = 0;
b481de9c 1353
6440adb5
CB
1354 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1355 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1356 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1357 i = rxq->read;
1358
d14d4440
AK
1359 /* calculate total frames need to be restock after handling RX */
1360 total_empty = r - priv->rxq.write_actual;
1361 if (total_empty < 0)
1362 total_empty += RX_QUEUE_SIZE;
1363
1364 if (total_empty > (RX_QUEUE_SIZE / 2))
5c0eef96 1365 fill_rx = 1;
b481de9c
ZY
1366 /* Rx interrupt, but nothing sent from uCode */
1367 if (i == r)
e1623446 1368 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1369
1370 while (i != r) {
1371 rxb = rxq->queue[i];
1372
9fbab516 1373 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1374 * then a bug has been introduced in the queue refilling
1375 * routines -- catch it here */
1376 BUG_ON(rxb == NULL);
1377
1378 rxq->queue[i] = NULL;
1379
df833b1d
RC
1380 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1381 priv->hw_params.rx_buf_size,
1382 PCI_DMA_FROMDEVICE);
3d24a9f7 1383 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1384
1385 /* Reclaim a command buffer only if this packet is a response
1386 * to a (driver-originated) command.
1387 * If the packet (e.g. Rx frame) originated from uCode,
1388 * there is no command buffer to reclaim.
1389 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1390 * but apparently a few don't get set; catch them here. */
1391 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1392 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1393 (pkt->hdr.cmd != REPLY_TX);
1394
1395 /* Based on type of command response or notification,
1396 * handle those that need handling via function in
bb8c093b 1397 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1398 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1399 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1400 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1401 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1402 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
86ddbf62 1403 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
b481de9c
ZY
1404 } else {
1405 /* No handling needed */
e1623446 1406 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1407 "r %d i %d No handler needed for %s, 0x%02x\n",
1408 r, i, get_cmd_string(pkt->hdr.cmd),
1409 pkt->hdr.cmd);
1410 }
1411
1412 if (reclaim) {
9fbab516 1413 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1414 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1415 * as we reclaim the driver command queue */
1416 if (rxb && rxb->skb)
732587ab 1417 iwl_tx_cmd_complete(priv, rxb);
b481de9c 1418 else
39aadf8c 1419 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
1420 }
1421
1422 /* For now we just don't re-use anything. We can tweak this
1423 * later to try and re-use notification packets and SKBs that
1424 * fail to Rx correctly */
1425 if (rxb->skb != NULL) {
1426 priv->alloc_rxb_skb--;
1427 dev_kfree_skb_any(rxb->skb);
1428 rxb->skb = NULL;
1429 }
1430
b481de9c
ZY
1431 spin_lock_irqsave(&rxq->lock, flags);
1432 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1433 spin_unlock_irqrestore(&rxq->lock, flags);
1434 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1435 /* If there are a lot of unused frames,
1436 * restock the Rx queue so ucode won't assert. */
1437 if (fill_rx) {
1438 count++;
1439 if (count >= 8) {
1440 priv->rxq.read = i;
d14d4440 1441 iwl3945_rx_replenish_now(priv);
5c0eef96
MA
1442 count = 0;
1443 }
1444 }
b481de9c
ZY
1445 }
1446
1447 /* Backtrack one entry */
1448 priv->rxq.read = i;
d14d4440
AK
1449 if (fill_rx)
1450 iwl3945_rx_replenish_now(priv);
1451 else
1452 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1453}
1454
0359facc 1455/* call this function to flush any scheduled tasklet */
4a8a4322 1456static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 1457{
a96a27f9 1458 /* wait to make sure we flush pending tasklet*/
0359facc
MA
1459 synchronize_irq(priv->pci_dev->irq);
1460 tasklet_kill(&priv->irq_tasklet);
1461}
1462
b481de9c
ZY
1463static const char *desc_lookup(int i)
1464{
1465 switch (i) {
1466 case 1:
1467 return "FAIL";
1468 case 2:
1469 return "BAD_PARAM";
1470 case 3:
1471 return "BAD_CHECKSUM";
1472 case 4:
1473 return "NMI_INTERRUPT";
1474 case 5:
1475 return "SYSASSERT";
1476 case 6:
1477 return "FATAL_ERROR";
1478 }
1479
1480 return "UNKNOWN";
1481}
1482
1483#define ERROR_START_OFFSET (1 * sizeof(u32))
1484#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1485
4a8a4322 1486static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
1487{
1488 u32 i;
1489 u32 desc, time, count, base, data1;
1490 u32 blink1, blink2, ilink1, ilink2;
b481de9c
ZY
1491
1492 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1493
bb8c093b 1494 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1495 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
1496 return;
1497 }
1498
b481de9c 1499
5d49f498 1500 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
1501
1502 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
1503 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1504 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1505 priv->status, count);
b481de9c
ZY
1506 }
1507
15b1687c 1508 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
1509 "ilink1 nmiPC Line\n");
1510 for (i = ERROR_START_OFFSET;
1511 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1512 i += ERROR_ELEM_SIZE) {
5d49f498 1513 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 1514 time =
5d49f498 1515 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 1516 blink1 =
5d49f498 1517 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 1518 blink2 =
5d49f498 1519 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 1520 ilink1 =
5d49f498 1521 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 1522 ilink2 =
5d49f498 1523 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 1524 data1 =
5d49f498 1525 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 1526
15b1687c
WT
1527 IWL_ERR(priv,
1528 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1529 desc_lookup(desc), desc, time, blink1, blink2,
1530 ilink1, ilink2, data1);
b481de9c
ZY
1531 }
1532
b481de9c
ZY
1533}
1534
f58177b9 1535#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
1536
1537/**
bb8c093b 1538 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 1539 *
b481de9c 1540 */
4a8a4322 1541static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
1542 u32 num_events, u32 mode)
1543{
1544 u32 i;
1545 u32 base; /* SRAM byte address of event log header */
1546 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1547 u32 ptr; /* SRAM byte address of log data */
1548 u32 ev, time, data; /* event log data */
1549
1550 if (num_events == 0)
1551 return;
1552
1553 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1554
1555 if (mode == 0)
1556 event_size = 2 * sizeof(u32);
1557 else
1558 event_size = 3 * sizeof(u32);
1559
1560 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1561
1562 /* "time" is actually "data" for mode 0 (no timestamp).
1563 * place event id # at far right for easier visual parsing. */
1564 for (i = 0; i < num_events; i++) {
5d49f498 1565 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 1566 ptr += sizeof(u32);
5d49f498 1567 time = iwl_read_targ_mem(priv, ptr);
b481de9c 1568 ptr += sizeof(u32);
15b1687c
WT
1569 if (mode == 0) {
1570 /* data, ev */
1571 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1572 } else {
5d49f498 1573 data = iwl_read_targ_mem(priv, ptr);
b481de9c 1574 ptr += sizeof(u32);
15b1687c 1575 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
1576 }
1577 }
1578}
1579
4a8a4322 1580static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c 1581{
b481de9c
ZY
1582 u32 base; /* SRAM byte address of event log header */
1583 u32 capacity; /* event log capacity in # entries */
1584 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1585 u32 num_wraps; /* # times uCode wrapped to top of log */
1586 u32 next_entry; /* index of next entry to be written by uCode */
1587 u32 size; /* # entries that we'll print */
1588
1589 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 1590 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 1591 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
1592 return;
1593 }
1594
b481de9c 1595 /* event log header */
5d49f498
AK
1596 capacity = iwl_read_targ_mem(priv, base);
1597 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1598 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1599 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
1600
1601 size = num_wraps ? capacity : next_entry;
1602
1603 /* bail out if nothing in log */
1604 if (size == 0) {
15b1687c 1605 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
b481de9c
ZY
1606 return;
1607 }
1608
15b1687c 1609 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
1610 size, num_wraps);
1611
1612 /* if uCode has wrapped back to top of log, start at the oldest entry,
1613 * i.e the next one that uCode would fill. */
1614 if (num_wraps)
bb8c093b 1615 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
1616 capacity - next_entry, mode);
1617
1618 /* (then/else) start at top of log */
bb8c093b 1619 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 1620
b481de9c
ZY
1621}
1622
4a8a4322 1623static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1624{
1625 u32 inta, handled = 0;
1626 u32 inta_fh;
1627 unsigned long flags;
d08853a3 1628#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1629 u32 inta_mask;
1630#endif
1631
1632 spin_lock_irqsave(&priv->lock, flags);
1633
1634 /* Ack/clear/reset pending uCode interrupts.
1635 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1636 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
1637 inta = iwl_read32(priv, CSR_INT);
1638 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1639
1640 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1641 * Any new interrupts that happen after this, either while we're
1642 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
1643 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1644 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1645
d08853a3 1646#ifdef CONFIG_IWLWIFI_DEBUG
a562a9dd 1647 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 1648 /* just for debug */
5d49f498 1649 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 1650 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
1651 inta, inta_mask, inta_fh);
1652 }
1653#endif
1654
1655 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1656 * atomic, make sure that inta covers all the interrupts that
1657 * we've discovered, even if FH interrupt came in just after
1658 * reading CSR_INT. */
6f83eaa1 1659 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 1660 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1661 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
1662 inta |= CSR_INT_BIT_FH_TX;
1663
1664 /* Now service all interrupt bits discovered above. */
1665 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 1666 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
1667
1668 /* Tell the device to stop sending interrupts */
ed3b932e 1669 iwl_disable_interrupts(priv);
b481de9c 1670
86ddbf62 1671 priv->isr_stats.hw++;
8ccde88a 1672 iwl_irq_handle_error(priv);
b481de9c
ZY
1673
1674 handled |= CSR_INT_BIT_HW_ERR;
1675
1676 spin_unlock_irqrestore(&priv->lock, flags);
1677
1678 return;
1679 }
1680
d08853a3 1681#ifdef CONFIG_IWLWIFI_DEBUG
a562a9dd 1682 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 1683 /* NIC fires this, but we don't use it, redundant with WAKEUP */
86ddbf62 1684 if (inta & CSR_INT_BIT_SCD) {
e1623446 1685 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 1686 "the frame/frames.\n");
86ddbf62
AK
1687 priv->isr_stats.sch++;
1688 }
b481de9c
ZY
1689
1690 /* Alive notification via Rx interrupt will do the real work */
86ddbf62 1691 if (inta & CSR_INT_BIT_ALIVE) {
e1623446 1692 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
86ddbf62
AK
1693 priv->isr_stats.alive++;
1694 }
b481de9c
ZY
1695 }
1696#endif
1697 /* Safely ignore these bits for debug checks below */
25c03d8e 1698 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1699
b481de9c
ZY
1700 /* Error detected by uCode */
1701 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
1702 IWL_ERR(priv, "Microcode SW error detected. "
1703 "Restarting 0x%X.\n", inta);
86ddbf62
AK
1704 priv->isr_stats.sw++;
1705 priv->isr_stats.sw_err = inta;
8ccde88a 1706 iwl_irq_handle_error(priv);
b481de9c
ZY
1707 handled |= CSR_INT_BIT_SW_ERR;
1708 }
1709
1710 /* uCode wakes up after power-down sleep */
1711 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 1712 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 1713 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
1714 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1715 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1716 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1717 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1718 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1719 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c 1720
86ddbf62 1721 priv->isr_stats.wakeup++;
b481de9c
ZY
1722 handled |= CSR_INT_BIT_WAKEUP;
1723 }
1724
1725 /* All uCode command responses, including Tx command responses,
1726 * Rx "responses" (frame-received notification), and other
1727 * notifications from uCode come through here*/
1728 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 1729 iwl3945_rx_handle(priv);
86ddbf62 1730 priv->isr_stats.rx++;
b481de9c
ZY
1731 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1732 }
1733
1734 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 1735 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
86ddbf62 1736 priv->isr_stats.tx++;
b481de9c 1737
5d49f498 1738 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
a8b50a0a
MA
1739 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1740 (FH39_SRVC_CHNL), 0x0);
b481de9c
ZY
1741 handled |= CSR_INT_BIT_FH_TX;
1742 }
1743
86ddbf62 1744 if (inta & ~handled) {
15b1687c 1745 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
86ddbf62
AK
1746 priv->isr_stats.unhandled++;
1747 }
b481de9c 1748
40cefda9 1749 if (inta & ~priv->inta_mask) {
39aadf8c 1750 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
40cefda9 1751 inta & ~priv->inta_mask);
39aadf8c 1752 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
1753 }
1754
1755 /* Re-enable all interrupts */
0359facc
MA
1756 /* only Re-enable if disabled by irq */
1757 if (test_bit(STATUS_INT_ENABLED, &priv->status))
ed3b932e 1758 iwl_enable_interrupts(priv);
b481de9c 1759
d08853a3 1760#ifdef CONFIG_IWLWIFI_DEBUG
a562a9dd 1761 if (iwl_debug_level & (IWL_DL_ISR)) {
5d49f498
AK
1762 inta = iwl_read32(priv, CSR_INT);
1763 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1764 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 1765 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
1766 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1767 }
1768#endif
1769 spin_unlock_irqrestore(&priv->lock, flags);
1770}
1771
4a8a4322 1772static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 1773 enum ieee80211_band band,
f9340520 1774 u8 is_active, u8 n_probes,
bb8c093b 1775 struct iwl3945_scan_channel *scan_ch)
b481de9c 1776{
4e05c234 1777 struct ieee80211_channel *chan;
8318d78a 1778 const struct ieee80211_supported_band *sband;
d20b3c65 1779 const struct iwl_channel_info *ch_info;
b481de9c
ZY
1780 u16 passive_dwell = 0;
1781 u16 active_dwell = 0;
1782 int added, i;
1783
cbba18c6 1784 sband = iwl_get_hw_mode(priv, band);
8318d78a 1785 if (!sband)
b481de9c
ZY
1786 return 0;
1787
77fecfb8
SO
1788 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1789 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 1790
8f4807a1
AK
1791 if (passive_dwell <= active_dwell)
1792 passive_dwell = active_dwell + 1;
1793
4e05c234
JB
1794 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1795 chan = priv->scan_request->channels[i];
1796
1797 if (chan->band != band)
182e2e66
JB
1798 continue;
1799
4e05c234 1800 scan_ch->channel = chan->hw_value;
b481de9c 1801
e6148917 1802 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 1803 if (!is_channel_valid(ch_info)) {
e1623446 1804 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
1805 scan_ch->channel);
1806 continue;
1807 }
1808
011a0330
AK
1809 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1810 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1811 /* If passive , set up for auto-switch
1812 * and use long active_dwell time.
1813 */
b481de9c 1814 if (!is_active || is_channel_passive(ch_info) ||
4e05c234 1815 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 1816 scan_ch->type = 0; /* passive */
011a0330
AK
1817 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1818 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1819 } else {
b481de9c 1820 scan_ch->type = 1; /* active */
011a0330 1821 }
b481de9c 1822
011a0330
AK
1823 /* Set direct probe bits. These may be used both for active
1824 * scan channels (probes gets sent right away),
1825 * or for passive channels (probes get se sent only after
1826 * hearing clear Rx packet).*/
1827 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1828 if (n_probes)
0d21044e 1829 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
1830 } else {
1831 /* uCode v1 does not allow setting direct probe bits on
1832 * passive channel. */
1833 if ((scan_ch->type & 1) && n_probes)
0d21044e 1834 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 1835 }
b481de9c 1836
9fbab516 1837 /* Set txpower levels to defaults */
b481de9c
ZY
1838 scan_ch->tpc.dsp_atten = 110;
1839 /* scan_pwr_info->tpc.dsp_atten; */
1840
1841 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 1842 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
1843 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1844 else {
1845 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1846 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 1847 * power level:
8a1b0245 1848 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
1849 */
1850 }
1851
e1623446 1852 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
1853 scan_ch->channel,
1854 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1855 (scan_ch->type & 1) ?
1856 active_dwell : passive_dwell);
1857
1858 scan_ch++;
1859 added++;
1860 }
1861
e1623446 1862 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
1863 return added;
1864}
1865
4a8a4322 1866static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
1867 struct ieee80211_rate *rates)
1868{
1869 int i;
1870
1871 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
1872 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1873 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1874 rates[i].hw_value_short = i;
1875 rates[i].flags = 0;
d9829a67 1876 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 1877 /*
8318d78a 1878 * If CCK != 1M then set short preamble rate flag.
b481de9c 1879 */
bb8c093b 1880 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 1881 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 1882 }
b481de9c
ZY
1883 }
1884}
1885
b481de9c
ZY
1886/******************************************************************************
1887 *
1888 * uCode download functions
1889 *
1890 ******************************************************************************/
1891
4a8a4322 1892static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1893{
98c92211
TW
1894 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1895 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1896 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1897 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1898 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1899 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1900}
1901
1902/**
bb8c093b 1903 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
1904 * looking at all data.
1905 */
4a8a4322 1906static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
1907{
1908 u32 val;
1909 u32 save_len = len;
1910 int rc = 0;
1911 u32 errcnt;
1912
e1623446 1913 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 1914
5d49f498 1915 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1916 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
1917
1918 errcnt = 0;
1919 for (; len > 0; len -= sizeof(u32), image++) {
1920 /* read data comes through single port, auto-incr addr */
1921 /* NOTE: Use the debugless read so we don't flood kernel log
1922 * if IWL_DL_IO is set */
5d49f498 1923 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 1924 if (val != le32_to_cpu(*image)) {
15b1687c 1925 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
1926 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1927 save_len - len, val, le32_to_cpu(*image));
1928 rc = -EIO;
1929 errcnt++;
1930 if (errcnt >= 20)
1931 break;
1932 }
1933 }
1934
b481de9c
ZY
1935
1936 if (!errcnt)
e1623446
TW
1937 IWL_DEBUG_INFO(priv,
1938 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
1939
1940 return rc;
1941}
1942
1943
1944/**
bb8c093b 1945 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
1946 * using sample data 100 bytes apart. If these sample points are good,
1947 * it's a pretty good bet that everything between them is good, too.
1948 */
4a8a4322 1949static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
1950{
1951 u32 val;
1952 int rc = 0;
1953 u32 errcnt = 0;
1954 u32 i;
1955
e1623446 1956 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 1957
b481de9c
ZY
1958 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1959 /* read data comes through single port, auto-incr addr */
1960 /* NOTE: Use the debugless read so we don't flood kernel log
1961 * if IWL_DL_IO is set */
5d49f498 1962 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1963 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 1964 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
1965 if (val != le32_to_cpu(*image)) {
1966#if 0 /* Enable this if you want to see details */
15b1687c 1967 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
1968 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1969 i, val, *image);
1970#endif
1971 rc = -EIO;
1972 errcnt++;
1973 if (errcnt >= 3)
1974 break;
1975 }
1976 }
1977
b481de9c
ZY
1978 return rc;
1979}
1980
1981
1982/**
bb8c093b 1983 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
1984 * and verify its contents
1985 */
4a8a4322 1986static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
1987{
1988 __le32 *image;
1989 u32 len;
1990 int rc = 0;
1991
1992 /* Try bootstrap */
1993 image = (__le32 *)priv->ucode_boot.v_addr;
1994 len = priv->ucode_boot.len;
bb8c093b 1995 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 1996 if (rc == 0) {
e1623446 1997 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
1998 return 0;
1999 }
2000
2001 /* Try initialize */
2002 image = (__le32 *)priv->ucode_init.v_addr;
2003 len = priv->ucode_init.len;
bb8c093b 2004 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2005 if (rc == 0) {
e1623446 2006 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2007 return 0;
2008 }
2009
2010 /* Try runtime/protocol */
2011 image = (__le32 *)priv->ucode_code.v_addr;
2012 len = priv->ucode_code.len;
bb8c093b 2013 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2014 if (rc == 0) {
e1623446 2015 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2016 return 0;
2017 }
2018
15b1687c 2019 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2020
9fbab516
BC
2021 /* Since nothing seems to match, show first several data entries in
2022 * instruction SRAM, so maybe visual inspection will give a clue.
2023 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2024 image = (__le32 *)priv->ucode_boot.v_addr;
2025 len = priv->ucode_boot.len;
bb8c093b 2026 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2027
2028 return rc;
2029}
2030
4a8a4322 2031static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2032{
2033 /* Remove all resets to allow NIC to operate */
5d49f498 2034 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2035}
2036
2037/**
bb8c093b 2038 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2039 *
2040 * Copy into buffers for card to fetch via bus-mastering
2041 */
4a8a4322 2042static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2043{
cc0f555d 2044 const struct iwl_ucode_header *ucode;
a0987a8d 2045 int ret = -EINVAL, index;
b481de9c
ZY
2046 const struct firmware *ucode_raw;
2047 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2048 const char *name_pre = priv->cfg->fw_name_pre;
2049 const unsigned int api_max = priv->cfg->ucode_api_max;
2050 const unsigned int api_min = priv->cfg->ucode_api_min;
2051 char buf[25];
b481de9c
ZY
2052 u8 *src;
2053 size_t len;
a0987a8d 2054 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2055
2056 /* Ask kernel firmware_class module to get the boot firmware off disk.
2057 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2058 for (index = api_max; index >= api_min; index--) {
2059 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2060 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2061 if (ret < 0) {
15b1687c 2062 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2063 buf, ret);
2064 if (ret == -ENOENT)
2065 continue;
2066 else
2067 goto error;
2068 } else {
2069 if (index < api_max)
15b1687c
WT
2070 IWL_ERR(priv, "Loaded firmware %s, "
2071 "which is deprecated. "
2072 " Please use API v%u instead.\n",
a0987a8d 2073 buf, api_max);
e1623446
TW
2074 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2075 "(%zd bytes) from disk\n",
a0987a8d
RC
2076 buf, ucode_raw->size);
2077 break;
2078 }
b481de9c
ZY
2079 }
2080
a0987a8d
RC
2081 if (ret < 0)
2082 goto error;
b481de9c
ZY
2083
2084 /* Make sure that we got at least our header! */
cc0f555d 2085 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
15b1687c 2086 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2087 ret = -EINVAL;
b481de9c
ZY
2088 goto err_release;
2089 }
2090
2091 /* Data from ucode file: header followed by uCode images */
cc0f555d 2092 ucode = (struct iwl_ucode_header *)ucode_raw->data;
b481de9c 2093
c02b3acd 2094 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2095 api_ver = IWL_UCODE_API(priv->ucode_ver);
cc0f555d
JS
2096 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2097 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2098 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2099 init_data_size =
2100 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2101 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2102 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
b481de9c 2103
a0987a8d
RC
2104 /* api_ver should match the api version forming part of the
2105 * firmware filename ... but we don't check for that and only rely
877d0310 2106 * on the API version read from firmware header from here on forward */
a0987a8d
RC
2107
2108 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2109 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2110 "Driver supports v%u, firmware is v%u.\n",
2111 api_max, api_ver);
2112 priv->ucode_ver = 0;
2113 ret = -EINVAL;
2114 goto err_release;
2115 }
2116 if (api_ver != api_max)
15b1687c 2117 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2118 "got %u. New firmware can be obtained "
2119 "from http://www.intellinuxwireless.org.\n",
2120 api_max, api_ver);
2121
978785a3
TW
2122 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2123 IWL_UCODE_MAJOR(priv->ucode_ver),
2124 IWL_UCODE_MINOR(priv->ucode_ver),
2125 IWL_UCODE_API(priv->ucode_ver),
2126 IWL_UCODE_SERIAL(priv->ucode_ver));
2127
e1623446 2128 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2129 priv->ucode_ver);
e1623446
TW
2130 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2131 inst_size);
2132 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2133 data_size);
2134 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2135 init_size);
2136 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2137 init_data_size);
2138 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2139 boot_size);
b481de9c 2140
a0987a8d 2141
b481de9c 2142 /* Verify size of file vs. image size info in file's header */
cc0f555d 2143 if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
b481de9c
ZY
2144 inst_size + data_size + init_size +
2145 init_data_size + boot_size) {
2146
cc0f555d
JS
2147 IWL_DEBUG_INFO(priv,
2148 "uCode file size %zd does not match expected size\n",
2149 ucode_raw->size);
90e759d1 2150 ret = -EINVAL;
b481de9c
ZY
2151 goto err_release;
2152 }
2153
2154 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2155 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2156 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2157 inst_size);
2158 ret = -EINVAL;
b481de9c
ZY
2159 goto err_release;
2160 }
2161
250bdd21 2162 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2163 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2164 data_size);
2165 ret = -EINVAL;
b481de9c
ZY
2166 goto err_release;
2167 }
250bdd21 2168 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2169 IWL_DEBUG_INFO(priv,
2170 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2171 init_size);
2172 ret = -EINVAL;
b481de9c
ZY
2173 goto err_release;
2174 }
250bdd21 2175 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2176 IWL_DEBUG_INFO(priv,
2177 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2178 init_data_size);
2179 ret = -EINVAL;
b481de9c
ZY
2180 goto err_release;
2181 }
250bdd21 2182 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2183 IWL_DEBUG_INFO(priv,
2184 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2185 boot_size);
2186 ret = -EINVAL;
b481de9c
ZY
2187 goto err_release;
2188 }
2189
2190 /* Allocate ucode buffers for card's bus-master loading ... */
2191
2192 /* Runtime instructions and 2 copies of data:
2193 * 1) unmodified from disk
2194 * 2) backup cache for save/restore during power-downs */
2195 priv->ucode_code.len = inst_size;
98c92211 2196 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2197
2198 priv->ucode_data.len = data_size;
98c92211 2199 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2200
2201 priv->ucode_data_backup.len = data_size;
98c92211 2202 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2203
90e759d1
TW
2204 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2205 !priv->ucode_data_backup.v_addr)
2206 goto err_pci_alloc;
b481de9c
ZY
2207
2208 /* Initialization instructions and data */
90e759d1
TW
2209 if (init_size && init_data_size) {
2210 priv->ucode_init.len = init_size;
98c92211 2211 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2212
2213 priv->ucode_init_data.len = init_data_size;
98c92211 2214 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2215
2216 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2217 goto err_pci_alloc;
2218 }
b481de9c
ZY
2219
2220 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2221 if (boot_size) {
2222 priv->ucode_boot.len = boot_size;
98c92211 2223 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2224
90e759d1
TW
2225 if (!priv->ucode_boot.v_addr)
2226 goto err_pci_alloc;
2227 }
b481de9c
ZY
2228
2229 /* Copy images into buffers for card's bus-master reads ... */
2230
2231 /* Runtime instructions (first block of data in file) */
cc0f555d 2232 len = inst_size;
e1623446
TW
2233 IWL_DEBUG_INFO(priv,
2234 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2235 memcpy(priv->ucode_code.v_addr, src, len);
cc0f555d
JS
2236 src += len;
2237
e1623446 2238 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2239 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2240
2241 /* Runtime data (2nd block)
bb8c093b 2242 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
cc0f555d 2243 len = data_size;
e1623446
TW
2244 IWL_DEBUG_INFO(priv,
2245 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2246 memcpy(priv->ucode_data.v_addr, src, len);
2247 memcpy(priv->ucode_data_backup.v_addr, src, len);
cc0f555d 2248 src += len;
b481de9c
ZY
2249
2250 /* Initialization instructions (3rd block) */
2251 if (init_size) {
cc0f555d 2252 len = init_size;
e1623446
TW
2253 IWL_DEBUG_INFO(priv,
2254 "Copying (but not loading) init instr len %zd\n", len);
b481de9c 2255 memcpy(priv->ucode_init.v_addr, src, len);
cc0f555d 2256 src += len;
b481de9c
ZY
2257 }
2258
2259 /* Initialization data (4th block) */
2260 if (init_data_size) {
cc0f555d 2261 len = init_data_size;
e1623446
TW
2262 IWL_DEBUG_INFO(priv,
2263 "Copying (but not loading) init data len %zd\n", len);
b481de9c 2264 memcpy(priv->ucode_init_data.v_addr, src, len);
cc0f555d 2265 src += len;
b481de9c
ZY
2266 }
2267
2268 /* Bootstrap instructions (5th block) */
cc0f555d 2269 len = boot_size;
e1623446
TW
2270 IWL_DEBUG_INFO(priv,
2271 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2272 memcpy(priv->ucode_boot.v_addr, src, len);
2273
2274 /* We have our copies now, allow OS release its copies */
2275 release_firmware(ucode_raw);
2276 return 0;
2277
2278 err_pci_alloc:
15b1687c 2279 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2280 ret = -ENOMEM;
bb8c093b 2281 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2282
2283 err_release:
2284 release_firmware(ucode_raw);
2285
2286 error:
90e759d1 2287 return ret;
b481de9c
ZY
2288}
2289
2290
2291/**
bb8c093b 2292 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2293 *
2294 * Tell initialization uCode where to find runtime uCode.
2295 *
2296 * BSM registers initially contain pointers to initialization uCode.
2297 * We need to replace them to load runtime uCode inst and data,
2298 * and to save runtime data when powering down.
2299 */
4a8a4322 2300static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
2301{
2302 dma_addr_t pinst;
2303 dma_addr_t pdata;
b481de9c
ZY
2304
2305 /* bits 31:0 for 3945 */
2306 pinst = priv->ucode_code.p_addr;
2307 pdata = priv->ucode_data_backup.p_addr;
2308
b481de9c 2309 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
2310 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2311 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2312 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
2313 priv->ucode_data.len);
2314
a96a27f9 2315 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 2316 * that all new ptr/size info is in place */
5d49f498 2317 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
2318 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2319
e1623446 2320 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c 2321
a8b50a0a 2322 return 0;
b481de9c
ZY
2323}
2324
2325/**
bb8c093b 2326 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
2327 *
2328 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2329 *
b481de9c 2330 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 2331 */
4a8a4322 2332static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
2333{
2334 /* Check alive response for "valid" sign from uCode */
2335 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2336 /* We had an error bringing up the hardware, so take it
2337 * all the way back down so we can try again */
e1623446 2338 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
2339 goto restart;
2340 }
2341
2342 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2343 * This is a paranoid check, because we would not have gotten the
2344 * "initialize" alive if code weren't properly loaded. */
bb8c093b 2345 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2346 /* Runtime instruction load was bad;
2347 * take it all the way back down so we can try again */
e1623446 2348 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
2349 goto restart;
2350 }
2351
2352 /* Send pointers to protocol/runtime uCode image ... init code will
2353 * load and launch runtime uCode, which will send us another "Alive"
2354 * notification. */
e1623446 2355 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 2356 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
2357 /* Runtime instruction load won't happen;
2358 * take it all the way back down so we can try again */
e1623446 2359 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
2360 goto restart;
2361 }
2362 return;
2363
2364 restart:
2365 queue_work(priv->workqueue, &priv->restart);
2366}
2367
b481de9c 2368/**
bb8c093b 2369 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 2370 * from protocol/runtime uCode (initialization uCode's
bb8c093b 2371 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 2372 */
4a8a4322 2373static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c 2374{
b481de9c
ZY
2375 int thermal_spin = 0;
2376 u32 rfkill;
2377
e1623446 2378 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
2379
2380 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2381 /* We had an error bringing up the hardware, so take it
2382 * all the way back down so we can try again */
e1623446 2383 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
2384 goto restart;
2385 }
2386
2387 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2388 * This is a paranoid check, because we would not have gotten the
2389 * "runtime" alive if code weren't properly loaded. */
bb8c093b 2390 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
2391 /* Runtime instruction load was bad;
2392 * take it all the way back down so we can try again */
e1623446 2393 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
2394 goto restart;
2395 }
2396
c587de0b 2397 iwl_clear_stations_table(priv);
b481de9c 2398
5d49f498 2399 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 2400 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
b481de9c
ZY
2401
2402 if (rfkill & 0x1) {
2403 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 2404 /* if RFKILL is not on, then wait for thermal
b481de9c 2405 * sensor in adapter to kick in */
bb8c093b 2406 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
2407 thermal_spin++;
2408 udelay(10);
2409 }
2410
2411 if (thermal_spin)
e1623446 2412 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
2413 thermal_spin * 10);
2414 } else
2415 set_bit(STATUS_RF_KILL_HW, &priv->status);
2416
9fbab516 2417 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
2418 set_bit(STATUS_ALIVE, &priv->status);
2419
775a6e27 2420 if (iwl_is_rfkill(priv))
b481de9c
ZY
2421 return;
2422
36d6825b 2423 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2424
2425 priv->active_rate = priv->rates_mask;
2426 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2427
d25aabb0 2428 iwl_power_update_mode(priv, false);
b481de9c 2429
8ccde88a 2430 if (iwl_is_associated(priv)) {
bb8c093b 2431 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 2432 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 2433
8a9b9926 2434 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c
ZY
2435 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2436 } else {
2437 /* Initialize our rx_config data */
8ccde88a 2438 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
2439 }
2440
9fbab516 2441 /* Configure Bluetooth device coexistence support */
17f841cd 2442 iwl_send_bt_config(priv);
b481de9c
ZY
2443
2444 /* Configure the adapter for unassociated operation */
e0158e61 2445 iwlcore_commit_rxon(priv);
b481de9c 2446
b481de9c
ZY
2447 iwl3945_reg_txpower_periodic(priv);
2448
fe00b5a5
RC
2449 iwl3945_led_register(priv);
2450
e1623446 2451 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 2452 set_bit(STATUS_READY, &priv->status);
5a66926a 2453 wake_up_interruptible(&priv->wait_command_queue);
b481de9c 2454
9bdf5eca
MA
2455 /* reassociate for ADHOC mode */
2456 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2457 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2458 priv->vif);
2459 if (beacon)
9944b938 2460 iwl_mac_beacon_update(priv->hw, beacon);
9bdf5eca
MA
2461 }
2462
f45c2714 2463 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
727882d6 2464 iwl_set_mode(priv, priv->iw_mode);
f45c2714 2465
b481de9c
ZY
2466 return;
2467
2468 restart:
2469 queue_work(priv->workqueue, &priv->restart);
2470}
2471
4a8a4322 2472static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2473
4a8a4322 2474static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2475{
2476 unsigned long flags;
2477 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2478 struct ieee80211_conf *conf = NULL;
2479
e1623446 2480 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
2481
2482 conf = ieee80211_get_hw_conf(priv->hw);
2483
2484 if (!exit_pending)
2485 set_bit(STATUS_EXIT_PENDING, &priv->status);
2486
ab53d8af 2487 iwl3945_led_unregister(priv);
c587de0b 2488 iwl_clear_stations_table(priv);
b481de9c
ZY
2489
2490 /* Unblock any waiting calls */
2491 wake_up_interruptible_all(&priv->wait_command_queue);
2492
b481de9c
ZY
2493 /* Wipe out the EXIT_PENDING status bit if we are not actually
2494 * exiting the module */
2495 if (!exit_pending)
2496 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2497
2498 /* stop and reset the on-board processor */
5d49f498 2499 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2500
2501 /* tell the device to stop sending interrupts */
0359facc 2502 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 2503 iwl_disable_interrupts(priv);
0359facc
MA
2504 spin_unlock_irqrestore(&priv->lock, flags);
2505 iwl_synchronize_irq(priv);
b481de9c
ZY
2506
2507 if (priv->mac80211_registered)
2508 ieee80211_stop_queues(priv->hw);
2509
bb8c093b 2510 /* If we have not previously called iwl3945_init() then
6da3a13e 2511 * clear all bits but the RF Kill bits and return */
775a6e27 2512 if (!iwl_is_init(priv)) {
b481de9c
ZY
2513 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2514 STATUS_RF_KILL_HW |
9788864e
RC
2515 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2516 STATUS_GEO_CONFIGURED |
ebef2008
AK
2517 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2518 STATUS_EXIT_PENDING;
b481de9c
ZY
2519 goto exit;
2520 }
2521
6da3a13e 2522 /* ...otherwise clear out all the status bits but the RF Kill
a60e77e5 2523 * bit and continue taking the NIC down. */
b481de9c
ZY
2524 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2525 STATUS_RF_KILL_HW |
9788864e
RC
2526 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2527 STATUS_GEO_CONFIGURED |
b481de9c 2528 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
2529 STATUS_FW_ERROR |
2530 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2531 STATUS_EXIT_PENDING;
b481de9c 2532
e9414b6b 2533 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 2534 spin_lock_irqsave(&priv->lock, flags);
5d49f498 2535 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2536 spin_unlock_irqrestore(&priv->lock, flags);
2537
bb8c093b
CH
2538 iwl3945_hw_txq_ctx_stop(priv);
2539 iwl3945_hw_rxq_stop(priv);
b481de9c 2540
a8b50a0a
MA
2541 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2542 APMG_CLK_VAL_DMA_CLK_RQT);
b481de9c
ZY
2543
2544 udelay(5);
2545
6da3a13e 2546 if (exit_pending)
e9414b6b
AM
2547 priv->cfg->ops->lib->apm_ops.stop(priv);
2548 else
2549 priv->cfg->ops->lib->apm_ops.reset(priv);
2550
b481de9c 2551 exit:
3d24a9f7 2552 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2553
2554 if (priv->ibss_beacon)
2555 dev_kfree_skb(priv->ibss_beacon);
2556 priv->ibss_beacon = NULL;
2557
2558 /* clear out any free frames */
bb8c093b 2559 iwl3945_clear_free_frames(priv);
b481de9c
ZY
2560}
2561
4a8a4322 2562static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
2563{
2564 mutex_lock(&priv->mutex);
bb8c093b 2565 __iwl3945_down(priv);
b481de9c 2566 mutex_unlock(&priv->mutex);
b24d22b1 2567
bb8c093b 2568 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
2569}
2570
2571#define MAX_HW_RESTARTS 5
2572
4a8a4322 2573static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
2574{
2575 int rc, i;
2576
2577 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 2578 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
2579 return -EIO;
2580 }
2581
e903fbd4 2582 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 2583 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
2584 return -EIO;
2585 }
2586
e655b9f0 2587 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 2588 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
2589 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2590 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2591 else {
2592 set_bit(STATUS_RF_KILL_HW, &priv->status);
6da3a13e
WYG
2593 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2594 return -ENODEV;
b481de9c 2595 }
80fcc9e2 2596
5d49f498 2597 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2598
bb8c093b 2599 rc = iwl3945_hw_nic_init(priv);
b481de9c 2600 if (rc) {
15b1687c 2601 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
2602 return rc;
2603 }
2604
2605 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
2606 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2607 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2608 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2609
2610 /* clear (again), then enable host interrupts */
5d49f498 2611 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
ed3b932e 2612 iwl_enable_interrupts(priv);
b481de9c
ZY
2613
2614 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
2615 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2616 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2617
2618 /* Copy original ucode data image from disk into backup cache.
2619 * This will be used to initialize the on-board processor's
2620 * data SRAM for a clean start when the runtime program first loads. */
2621 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2622 priv->ucode_data.len);
b481de9c 2623
e655b9f0
ZY
2624 /* We return success when we resume from suspend and rf_kill is on. */
2625 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2626 return 0;
2627
b481de9c
ZY
2628 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2629
c587de0b 2630 iwl_clear_stations_table(priv);
b481de9c
ZY
2631
2632 /* load bootstrap state machine,
2633 * load bootstrap program into processor's memory,
2634 * prepare to load the "initialize" uCode */
0164b9b4 2635 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
2636
2637 if (rc) {
15b1687c
WT
2638 IWL_ERR(priv,
2639 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
2640 continue;
2641 }
2642
2643 /* start card; "initialize" will load runtime ucode */
bb8c093b 2644 iwl3945_nic_start(priv);
b481de9c 2645
e1623446 2646 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
2647
2648 return 0;
2649 }
2650
2651 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2652 __iwl3945_down(priv);
ebef2008 2653 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2654
2655 /* tried to restart and config the device for as long as our
2656 * patience could withstand */
15b1687c 2657 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
2658 return -EIO;
2659}
2660
2661
2662/*****************************************************************************
2663 *
2664 * Workqueue callbacks
2665 *
2666 *****************************************************************************/
2667
bb8c093b 2668static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 2669{
4a8a4322
AK
2670 struct iwl_priv *priv =
2671 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2672
2673 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2674 return;
2675
2676 mutex_lock(&priv->mutex);
bb8c093b 2677 iwl3945_init_alive_start(priv);
b481de9c
ZY
2678 mutex_unlock(&priv->mutex);
2679}
2680
bb8c093b 2681static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 2682{
4a8a4322
AK
2683 struct iwl_priv *priv =
2684 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2685
2686 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2687 return;
2688
2689 mutex_lock(&priv->mutex);
bb8c093b 2690 iwl3945_alive_start(priv);
b481de9c
ZY
2691 mutex_unlock(&priv->mutex);
2692}
2693
2663516d
HS
2694static void iwl3945_rfkill_poll(struct work_struct *data)
2695{
2696 struct iwl_priv *priv =
2697 container_of(data, struct iwl_priv, rfkill_poll.work);
2663516d
HS
2698
2699 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2700 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2701 else
2702 set_bit(STATUS_RF_KILL_HW, &priv->status);
2703
a60e77e5
JB
2704 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2705 test_bit(STATUS_RF_KILL_HW, &priv->status));
2663516d
HS
2706
2707 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2708 round_jiffies_relative(2 * HZ));
2709
2710}
2711
b481de9c 2712#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 2713static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 2714{
4a8a4322
AK
2715 struct iwl_priv *priv =
2716 container_of(data, struct iwl_priv, request_scan);
c2d79b48 2717 struct iwl_host_cmd cmd = {
b481de9c 2718 .id = REPLY_SCAN_CMD,
bb8c093b 2719 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
2720 .meta.flags = CMD_SIZE_HUGE,
2721 };
2722 int rc = 0;
bb8c093b 2723 struct iwl3945_scan_cmd *scan;
b481de9c 2724 struct ieee80211_conf *conf = NULL;
1ecf9fc1 2725 u8 n_probes = 0;
8318d78a 2726 enum ieee80211_band band;
1ecf9fc1 2727 bool is_active = false;
b481de9c
ZY
2728
2729 conf = ieee80211_get_hw_conf(priv->hw);
2730
2731 mutex_lock(&priv->mutex);
2732
fbc9f97b
RC
2733 cancel_delayed_work(&priv->scan_check);
2734
775a6e27 2735 if (!iwl_is_ready(priv)) {
39aadf8c 2736 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
2737 goto done;
2738 }
2739
a96a27f9 2740 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
2741 * was given the chance to run... */
2742 if (!test_bit(STATUS_SCANNING, &priv->status))
2743 goto done;
2744
2745 /* This should never be called or scheduled if there is currently
2746 * a scan active in the hardware. */
2747 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
2748 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2749 "Ignoring second request.\n");
b481de9c
ZY
2750 rc = -EIO;
2751 goto done;
2752 }
2753
2754 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 2755 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
2756 goto done;
2757 }
2758
2759 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
2760 IWL_DEBUG_HC(priv,
2761 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
2762 goto done;
2763 }
2764
775a6e27 2765 if (iwl_is_rfkill(priv)) {
e1623446 2766 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
2767 goto done;
2768 }
2769
2770 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
2771 IWL_DEBUG_HC(priv,
2772 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
2773 goto done;
2774 }
2775
2776 if (!priv->scan_bands) {
e1623446 2777 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
2778 goto done;
2779 }
2780
805cee5b
WT
2781 if (!priv->scan) {
2782 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 2783 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 2784 if (!priv->scan) {
b481de9c
ZY
2785 rc = -ENOMEM;
2786 goto done;
2787 }
2788 }
805cee5b 2789 scan = priv->scan;
bb8c093b 2790 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
2791
2792 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2793 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2794
8ccde88a 2795 if (iwl_is_associated(priv)) {
b481de9c
ZY
2796 u16 interval = 0;
2797 u32 extra;
2798 u32 suspend_time = 100;
2799 u32 scan_suspend_time = 100;
2800 unsigned long flags;
2801
e1623446 2802 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
2803
2804 spin_lock_irqsave(&priv->lock, flags);
2805 interval = priv->beacon_int;
2806 spin_unlock_irqrestore(&priv->lock, flags);
2807
2808 scan->suspend_time = 0;
15e869d8 2809 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
2810 if (!interval)
2811 interval = suspend_time;
2812 /*
2813 * suspend time format:
2814 * 0-19: beacon interval in usec (time before exec.)
2815 * 20-23: 0
2816 * 24-31: number of beacons (suspend between channels)
2817 */
2818
2819 extra = (suspend_time / interval) << 24;
2820 scan_suspend_time = 0xFF0FFFFF &
2821 (extra | ((suspend_time % interval) * 1024));
2822
2823 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 2824 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
2825 scan_suspend_time, interval);
2826 }
2827
1ecf9fc1
JB
2828 if (priv->scan_request->n_ssids) {
2829 int i, p = 0;
2830 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2831 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2832 /* always does wildcard anyway */
2833 if (!priv->scan_request->ssids[i].ssid_len)
2834 continue;
2835 scan->direct_scan[p].id = WLAN_EID_SSID;
2836 scan->direct_scan[p].len =
2837 priv->scan_request->ssids[i].ssid_len;
2838 memcpy(scan->direct_scan[p].ssid,
2839 priv->scan_request->ssids[i].ssid,
2840 priv->scan_request->ssids[i].ssid_len);
2841 n_probes++;
2842 p++;
2843 }
2844 is_active = true;
f9340520 2845 } else
1ecf9fc1 2846 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
b481de9c
ZY
2847
2848 /* We don't build a direct scan probe request; the uCode will do
2849 * that based on the direct_mask added to each channel entry */
b481de9c 2850 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 2851 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
2852 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2853
2854 /* flags + rate selection */
2855
66b5004d 2856 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
2857 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2858 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2859 scan->good_CRC_th = 0;
8318d78a 2860 band = IEEE80211_BAND_2GHZ;
66b5004d 2861 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c 2862 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
b097ad29
JB
2863 /*
2864 * If active scaning is requested but a certain channel
2865 * is marked passive, we can do active scanning if we
2866 * detect transmissions.
2867 */
2868 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
8318d78a 2869 band = IEEE80211_BAND_5GHZ;
66b5004d 2870 } else {
39aadf8c 2871 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
2872 goto done;
2873 }
2874
77fecfb8 2875 scan->tx_cmd.len = cpu_to_le16(
1ecf9fc1
JB
2876 iwl_fill_probe_req(priv,
2877 (struct ieee80211_mgmt *)scan->data,
2878 priv->scan_request->ie,
2879 priv->scan_request->ie_len,
2880 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
77fecfb8 2881
b481de9c
ZY
2882 /* select Rx antennas */
2883 scan->flags |= iwl3945_get_antenna_flags(priv);
2884
279b05d4 2885 if (iwl_is_monitor_mode(priv))
b481de9c
ZY
2886 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2887
f9340520 2888 scan->channel_count =
1ecf9fc1 2889 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
f9340520 2890 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 2891
14b54336 2892 if (scan->channel_count == 0) {
e1623446 2893 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
2894 goto done;
2895 }
2896
b481de9c 2897 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 2898 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
2899 cmd.data = scan;
2900 scan->len = cpu_to_le16(cmd.len);
2901
2902 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 2903 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
2904 if (rc)
2905 goto done;
2906
2907 queue_delayed_work(priv->workqueue, &priv->scan_check,
2908 IWL_SCAN_CHECK_WATCHDOG);
2909
2910 mutex_unlock(&priv->mutex);
2911 return;
2912
2913 done:
2420ebc1
MA
2914 /* can not perform scan make sure we clear scanning
2915 * bits from status so next scan request can be performed.
2916 * if we dont clear scanning status bit here all next scan
2917 * will fail
2918 */
2919 clear_bit(STATUS_SCAN_HW, &priv->status);
2920 clear_bit(STATUS_SCANNING, &priv->status);
2921
01ebd063 2922 /* inform mac80211 scan aborted */
b481de9c
ZY
2923 queue_work(priv->workqueue, &priv->scan_completed);
2924 mutex_unlock(&priv->mutex);
2925}
2926
bb8c093b 2927static void iwl3945_bg_up(struct work_struct *data)
b481de9c 2928{
4a8a4322 2929 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2930
2931 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2932 return;
2933
2934 mutex_lock(&priv->mutex);
bb8c093b 2935 __iwl3945_up(priv);
b481de9c
ZY
2936 mutex_unlock(&priv->mutex);
2937}
2938
bb8c093b 2939static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 2940{
4a8a4322 2941 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2942
2943 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2944 return;
2945
19cc1087
JB
2946 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2947 mutex_lock(&priv->mutex);
2948 priv->vif = NULL;
2949 priv->is_open = 0;
2950 mutex_unlock(&priv->mutex);
2951 iwl3945_down(priv);
2952 ieee80211_restart_hw(priv->hw);
2953 } else {
2954 iwl3945_down(priv);
2955 queue_work(priv->workqueue, &priv->up);
2956 }
b481de9c
ZY
2957}
2958
bb8c093b 2959static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 2960{
4a8a4322
AK
2961 struct iwl_priv *priv =
2962 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2963
2964 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2965 return;
2966
2967 mutex_lock(&priv->mutex);
bb8c093b 2968 iwl3945_rx_replenish(priv);
b481de9c
ZY
2969 mutex_unlock(&priv->mutex);
2970}
2971
7878a5a4
MA
2972#define IWL_DELAY_NEXT_SCAN (HZ*2)
2973
5bbe233b 2974void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 2975{
b481de9c
ZY
2976 int rc = 0;
2977 struct ieee80211_conf *conf = NULL;
2978
05c914fe 2979 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 2980 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
2981 return;
2982 }
2983
2984
e1623446 2985 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 2986 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
2987
2988 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2989 return;
2990
322a9811 2991 if (!priv->vif || !priv->is_open)
6ef89d0a 2992 return;
322a9811 2993
af0053d6 2994 iwl_scan_cancel_timeout(priv, 200);
15e869d8 2995
b481de9c
ZY
2996 conf = ieee80211_get_hw_conf(priv->hw);
2997
8ccde88a 2998 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 2999 iwlcore_commit_rxon(priv);
b481de9c 3000
28afaf91 3001 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
2c2f3b33 3002 iwl_setup_rxon_timing(priv);
518099a8 3003 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3004 sizeof(priv->rxon_timing), &priv->rxon_timing);
3005 if (rc)
39aadf8c 3006 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3007 "Attempting to continue.\n");
3008
8ccde88a 3009 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3010
8ccde88a 3011 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3012
e1623446 3013 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3014 priv->assoc_id, priv->beacon_int);
3015
3016 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3017 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3018 else
8ccde88a 3019 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3020
8ccde88a 3021 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3022 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3023 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3024 else
8ccde88a 3025 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3026
05c914fe 3027 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3028 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3029
3030 }
3031
e0158e61 3032 iwlcore_commit_rxon(priv);
b481de9c
ZY
3033
3034 switch (priv->iw_mode) {
05c914fe 3035 case NL80211_IFTYPE_STATION:
bb8c093b 3036 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3037 break;
3038
05c914fe 3039 case NL80211_IFTYPE_ADHOC:
b481de9c 3040
ce546fd2 3041 priv->assoc_id = 1;
c587de0b 3042 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
b481de9c 3043 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3044 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3045 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3046 CMD_ASYNC);
bb8c093b
CH
3047 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3048 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3049
3050 break;
3051
3052 default:
15b1687c 3053 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3054 __func__, priv->iw_mode);
b481de9c
ZY
3055 break;
3056 }
3057
14d2aac5 3058 iwl_activate_qos(priv, 0);
292ae174 3059
7878a5a4
MA
3060 /* we have just associated, don't start scan too early */
3061 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3062}
3063
b481de9c
ZY
3064/*****************************************************************************
3065 *
3066 * mac80211 entry point functions
3067 *
3068 *****************************************************************************/
3069
5a66926a
ZY
3070#define UCODE_READY_TIMEOUT (2 * HZ)
3071
bb8c093b 3072static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3073{
4a8a4322 3074 struct iwl_priv *priv = hw->priv;
5a66926a 3075 int ret;
b481de9c 3076
e1623446 3077 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3078
3079 /* we should be verifying the device is ready to be opened */
3080 mutex_lock(&priv->mutex);
3081
5a66926a
ZY
3082 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3083 * ucode filename and max sizes are card-specific. */
3084
3085 if (!priv->ucode_code.len) {
3086 ret = iwl3945_read_ucode(priv);
3087 if (ret) {
15b1687c 3088 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3089 mutex_unlock(&priv->mutex);
3090 goto out_release_irq;
3091 }
3092 }
b481de9c 3093
e655b9f0 3094 ret = __iwl3945_up(priv);
b481de9c
ZY
3095
3096 mutex_unlock(&priv->mutex);
5a66926a 3097
e655b9f0
ZY
3098 if (ret)
3099 goto out_release_irq;
3100
e1623446 3101 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0 3102
5a66926a
ZY
3103 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3104 * mac80211 will not be run successfully. */
3105 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3106 test_bit(STATUS_READY, &priv->status),
3107 UCODE_READY_TIMEOUT);
3108 if (!ret) {
3109 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3110 IWL_ERR(priv,
3111 "Wait for START_ALIVE timeout after %dms.\n",
3112 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3113 ret = -ETIMEDOUT;
3114 goto out_release_irq;
3115 }
3116 }
3117
2663516d
HS
3118 /* ucode is running and will send rfkill notifications,
3119 * no need to poll the killswitch state anymore */
3120 cancel_delayed_work(&priv->rfkill_poll);
3121
e655b9f0 3122 priv->is_open = 1;
e1623446 3123 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3124 return 0;
5a66926a
ZY
3125
3126out_release_irq:
e655b9f0 3127 priv->is_open = 0;
e1623446 3128 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3129 return ret;
b481de9c
ZY
3130}
3131
bb8c093b 3132static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3133{
4a8a4322 3134 struct iwl_priv *priv = hw->priv;
b481de9c 3135
e1623446 3136 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3137
e655b9f0 3138 if (!priv->is_open) {
e1623446 3139 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3140 return;
3141 }
3142
b481de9c 3143 priv->is_open = 0;
5a66926a 3144
775a6e27 3145 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3146 /* stop mac, cancel any scan request and clear
3147 * RXON_FILTER_ASSOC_MSK BIT
3148 */
5a66926a 3149 mutex_lock(&priv->mutex);
af0053d6 3150 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3151 mutex_unlock(&priv->mutex);
fde3571f
MA
3152 }
3153
5a66926a
ZY
3154 iwl3945_down(priv);
3155
3156 flush_workqueue(priv->workqueue);
2663516d
HS
3157
3158 /* start polling the killswitch state again */
3159 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3160 round_jiffies_relative(2 * HZ));
6ef89d0a 3161
e1623446 3162 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3163}
3164
e039fa4a 3165static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3166{
4a8a4322 3167 struct iwl_priv *priv = hw->priv;
b481de9c 3168
e1623446 3169 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3170
e1623446 3171 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3172 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3173
e039fa4a 3174 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3175 dev_kfree_skb_any(skb);
3176
e1623446 3177 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3178 return NETDEV_TX_OK;
b481de9c
ZY
3179}
3180
60690a6a 3181void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
3182{
3183 int rc = 0;
3184
d986bcd1 3185 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
3186 return;
3187
3188 /* The following should be done only at AP bring up */
8ccde88a 3189 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
3190
3191 /* RXON - unassoc (to set timing command) */
8ccde88a 3192 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
e0158e61 3193 iwlcore_commit_rxon(priv);
b481de9c
ZY
3194
3195 /* RXON Timing */
28afaf91 3196 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
2c2f3b33 3197 iwl_setup_rxon_timing(priv);
518099a8
SO
3198 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3199 sizeof(priv->rxon_timing),
3200 &priv->rxon_timing);
b481de9c 3201 if (rc)
39aadf8c 3202 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3203 "Attempting to continue.\n");
3204
3205 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 3206 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3207 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3208 priv->staging_rxon.flags |=
b481de9c
ZY
3209 RXON_FLG_SHORT_PREAMBLE_MSK;
3210 else
8ccde88a 3211 priv->staging_rxon.flags &=
b481de9c
ZY
3212 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3213
8ccde88a 3214 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
3215 if (priv->assoc_capability &
3216 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3217 priv->staging_rxon.flags |=
b481de9c
ZY
3218 RXON_FLG_SHORT_SLOT_MSK;
3219 else
8ccde88a 3220 priv->staging_rxon.flags &=
b481de9c
ZY
3221 ~RXON_FLG_SHORT_SLOT_MSK;
3222
05c914fe 3223 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3224 priv->staging_rxon.flags &=
b481de9c
ZY
3225 ~RXON_FLG_SHORT_SLOT_MSK;
3226 }
3227 /* restore RXON assoc */
8ccde88a 3228 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
e0158e61 3229 iwlcore_commit_rxon(priv);
c587de0b 3230 iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
556f8db7 3231 }
bb8c093b 3232 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3233
3234 /* FIXME - we need to add code here to detect a totally new
3235 * configuration, reset the AP, unassoc, rxon timing, assoc,
3236 * clear sta table, add BCAST sta... */
3237}
3238
bb8c093b 3239static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
3240 struct ieee80211_vif *vif,
3241 struct ieee80211_sta *sta,
3242 struct ieee80211_key_conf *key)
b481de9c 3243{
4a8a4322 3244 struct iwl_priv *priv = hw->priv;
dc822b5d 3245 const u8 *addr;
6e21f15c
AK
3246 int ret = 0;
3247 u8 sta_id = IWL_INVALID_STATION;
3248 u8 static_key;
b481de9c 3249
e1623446 3250 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3251
df878d8f 3252 if (iwl3945_mod_params.sw_crypto) {
e1623446 3253 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
3254 return -EOPNOTSUPP;
3255 }
3256
42986796 3257 addr = sta ? sta->addr : iwl_bcast_addr;
6e21f15c
AK
3258 static_key = !iwl_is_associated(priv);
3259
3260 if (!static_key) {
c587de0b 3261 sta_id = iwl_find_station(priv, addr);
6e21f15c 3262 if (sta_id == IWL_INVALID_STATION) {
12514396 3263 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
6e21f15c
AK
3264 addr);
3265 return -EINVAL;
3266 }
b481de9c
ZY
3267 }
3268
3269 mutex_lock(&priv->mutex);
af0053d6 3270 iwl_scan_cancel_timeout(priv, 100);
6e21f15c 3271 mutex_unlock(&priv->mutex);
15e869d8 3272
b481de9c 3273 switch (cmd) {
6e21f15c
AK
3274 case SET_KEY:
3275 if (static_key)
3276 ret = iwl3945_set_static_key(priv, key);
3277 else
3278 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3279 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
b481de9c
ZY
3280 break;
3281 case DISABLE_KEY:
6e21f15c
AK
3282 if (static_key)
3283 ret = iwl3945_remove_static_key(priv);
3284 else
3285 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3286 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
3287 break;
3288 default:
42986796 3289 ret = -EINVAL;
b481de9c
ZY
3290 }
3291
e1623446 3292 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3293
42986796 3294 return ret;
b481de9c
ZY
3295}
3296
b481de9c
ZY
3297/*****************************************************************************
3298 *
3299 * sysfs attributes
3300 *
3301 *****************************************************************************/
3302
d08853a3 3303#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3304
3305/*
3306 * The following adds a new attribute to the sysfs representation
3307 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3308 * used for controlling the debug level.
3309 *
3310 * See the level definitions in iwl for details.
a562a9dd
RC
3311 *
3312 * FIXME This file can be deprecated as the module parameter is
3313 * writable and users can thus also change the debug level
3314 * using the /sys/module/iwl3945/parameters/debug file.
b481de9c 3315 */
40b8ec0b
SO
3316static ssize_t show_debug_level(struct device *d,
3317 struct device_attribute *attr, char *buf)
b481de9c 3318{
a562a9dd 3319 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c 3320}
40b8ec0b
SO
3321static ssize_t store_debug_level(struct device *d,
3322 struct device_attribute *attr,
b481de9c
ZY
3323 const char *buf, size_t count)
3324{
928841b1 3325 struct iwl_priv *priv = dev_get_drvdata(d);
40b8ec0b
SO
3326 unsigned long val;
3327 int ret;
b481de9c 3328
40b8ec0b
SO
3329 ret = strict_strtoul(buf, 0, &val);
3330 if (ret)
978785a3 3331 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 3332 else
a562a9dd 3333 iwl_debug_level = val;
b481de9c
ZY
3334
3335 return strnlen(buf, count);
3336}
3337
40b8ec0b
SO
3338static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3339 show_debug_level, store_debug_level);
b481de9c 3340
d08853a3 3341#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3342
b481de9c
ZY
3343static ssize_t show_temperature(struct device *d,
3344 struct device_attribute *attr, char *buf)
3345{
928841b1 3346 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3347
775a6e27 3348 if (!iwl_is_alive(priv))
b481de9c
ZY
3349 return -EAGAIN;
3350
bb8c093b 3351 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
3352}
3353
3354static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3355
b481de9c
ZY
3356static ssize_t show_tx_power(struct device *d,
3357 struct device_attribute *attr, char *buf)
3358{
928841b1 3359 struct iwl_priv *priv = dev_get_drvdata(d);
62ea9c5b 3360 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3361}
3362
3363static ssize_t store_tx_power(struct device *d,
3364 struct device_attribute *attr,
3365 const char *buf, size_t count)
3366{
928841b1 3367 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3368 char *p = (char *)buf;
3369 u32 val;
3370
3371 val = simple_strtoul(p, &p, 10);
3372 if (p == buf)
978785a3 3373 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 3374 else
bb8c093b 3375 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
3376
3377 return count;
3378}
3379
3380static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3381
3382static ssize_t show_flags(struct device *d,
3383 struct device_attribute *attr, char *buf)
3384{
928841b1 3385 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3386
8ccde88a 3387 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
3388}
3389
3390static ssize_t store_flags(struct device *d,
3391 struct device_attribute *attr,
3392 const char *buf, size_t count)
3393{
928841b1 3394 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3395 u32 flags = simple_strtoul(buf, NULL, 0);
3396
3397 mutex_lock(&priv->mutex);
8ccde88a 3398 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 3399 /* Cancel any currently running scans... */
af0053d6 3400 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3401 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3402 else {
e1623446 3403 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 3404 flags);
8ccde88a 3405 priv->staging_rxon.flags = cpu_to_le32(flags);
e0158e61 3406 iwlcore_commit_rxon(priv);
b481de9c
ZY
3407 }
3408 }
3409 mutex_unlock(&priv->mutex);
3410
3411 return count;
3412}
3413
3414static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3415
3416static ssize_t show_filter_flags(struct device *d,
3417 struct device_attribute *attr, char *buf)
3418{
928841b1 3419 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3420
3421 return sprintf(buf, "0x%04X\n",
8ccde88a 3422 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
3423}
3424
3425static ssize_t store_filter_flags(struct device *d,
3426 struct device_attribute *attr,
3427 const char *buf, size_t count)
3428{
928841b1 3429 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3430 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3431
3432 mutex_lock(&priv->mutex);
8ccde88a 3433 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 3434 /* Cancel any currently running scans... */
af0053d6 3435 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 3436 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 3437 else {
e1623446 3438 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 3439 "0x%04X\n", filter_flags);
8ccde88a 3440 priv->staging_rxon.filter_flags =
b481de9c 3441 cpu_to_le32(filter_flags);
e0158e61 3442 iwlcore_commit_rxon(priv);
b481de9c
ZY
3443 }
3444 }
3445 mutex_unlock(&priv->mutex);
3446
3447 return count;
3448}
3449
3450static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3451 store_filter_flags);
3452
c8b0e6e1 3453#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
3454
3455static ssize_t show_measurement(struct device *d,
3456 struct device_attribute *attr, char *buf)
3457{
4a8a4322 3458 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 3459 struct iwl_spectrum_notification measure_report;
b481de9c 3460 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 3461 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
3462 unsigned long flags;
3463
3464 spin_lock_irqsave(&priv->lock, flags);
3465 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3466 spin_unlock_irqrestore(&priv->lock, flags);
3467 return 0;
3468 }
3469 memcpy(&measure_report, &priv->measure_report, size);
3470 priv->measurement_status = 0;
3471 spin_unlock_irqrestore(&priv->lock, flags);
3472
3473 while (size && (PAGE_SIZE - len)) {
3474 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3475 PAGE_SIZE - len, 1);
3476 len = strlen(buf);
3477 if (PAGE_SIZE - len)
3478 buf[len++] = '\n';
3479
3480 ofs += 16;
3481 size -= min(size, 16U);
3482 }
3483
3484 return len;
3485}
3486
3487static ssize_t store_measurement(struct device *d,
3488 struct device_attribute *attr,
3489 const char *buf, size_t count)
3490{
4a8a4322 3491 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3492 struct ieee80211_measurement_params params = {
8ccde88a 3493 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
3494 .start_time = cpu_to_le64(priv->last_tsf),
3495 .duration = cpu_to_le16(1),
3496 };
3497 u8 type = IWL_MEASURE_BASIC;
3498 u8 buffer[32];
3499 u8 channel;
3500
3501 if (count) {
3502 char *p = buffer;
3503 strncpy(buffer, buf, min(sizeof(buffer), count));
3504 channel = simple_strtoul(p, NULL, 0);
3505 if (channel)
3506 params.channel = channel;
3507
3508 p = buffer;
3509 while (*p && *p != ' ')
3510 p++;
3511 if (*p)
3512 type = simple_strtoul(p + 1, NULL, 0);
3513 }
3514
e1623446 3515 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 3516 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3517 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
3518
3519 return count;
3520}
3521
3522static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3523 show_measurement, store_measurement);
c8b0e6e1 3524#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 3525
b481de9c
ZY
3526static ssize_t store_retry_rate(struct device *d,
3527 struct device_attribute *attr,
3528 const char *buf, size_t count)
3529{
4a8a4322 3530 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3531
3532 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3533 if (priv->retry_rate <= 0)
3534 priv->retry_rate = 1;
3535
3536 return count;
3537}
3538
3539static ssize_t show_retry_rate(struct device *d,
3540 struct device_attribute *attr, char *buf)
3541{
4a8a4322 3542 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3543 return sprintf(buf, "%d", priv->retry_rate);
3544}
3545
3546static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3547 store_retry_rate);
3548
d25aabb0 3549
b481de9c
ZY
3550static ssize_t store_power_level(struct device *d,
3551 struct device_attribute *attr,
3552 const char *buf, size_t count)
3553{
4a8a4322 3554 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
3555 int ret;
3556 unsigned long mode;
3557
b481de9c 3558
b481de9c
ZY
3559 mutex_lock(&priv->mutex);
3560
d25aabb0
WT
3561 ret = strict_strtoul(buf, 10, &mode);
3562 if (ret)
3563 goto out;
b481de9c 3564
d25aabb0
WT
3565 ret = iwl_power_set_user_mode(priv, mode);
3566 if (ret) {
3567 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
3568 goto out;
b481de9c 3569 }
d25aabb0 3570 ret = count;
b481de9c
ZY
3571
3572 out:
3573 mutex_unlock(&priv->mutex);
d25aabb0 3574 return ret;
b481de9c
ZY
3575}
3576
d25aabb0
WT
3577static ssize_t show_power_level(struct device *d,
3578 struct device_attribute *attr, char *buf)
3579{
3580 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
3581 int level = priv->power_data.power_mode;
3582 char *p = buf;
3583
872ed190 3584 p += sprintf(p, "%d\n", level);
d25aabb0
WT
3585 return p - buf + 1;
3586}
3587
3588static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
3589 show_power_level, store_power_level);
3590
b481de9c
ZY
3591#define MAX_WX_STRING 80
3592
3593/* Values are in microsecond */
3594static const s32 timeout_duration[] = {
3595 350000,
3596 250000,
3597 75000,
3598 37000,
3599 25000,
3600};
3601static const s32 period_duration[] = {
3602 400000,
3603 700000,
3604 1000000,
3605 1000000,
3606 1000000
3607};
3608
b481de9c
ZY
3609static ssize_t show_channels(struct device *d,
3610 struct device_attribute *attr, char *buf)
3611{
8318d78a
JB
3612 /* all this shit doesn't belong into sysfs anyway */
3613 return 0;
b481de9c
ZY
3614}
3615
3616static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3617
3618static ssize_t show_statistics(struct device *d,
3619 struct device_attribute *attr, char *buf)
3620{
4a8a4322 3621 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3622 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 3623 u32 len = 0, ofs = 0;
f2c7e521 3624 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
3625 int rc = 0;
3626
775a6e27 3627 if (!iwl_is_alive(priv))
b481de9c
ZY
3628 return -EAGAIN;
3629
3630 mutex_lock(&priv->mutex);
17f841cd 3631 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3632 mutex_unlock(&priv->mutex);
3633
3634 if (rc) {
3635 len = sprintf(buf,
3636 "Error sending statistics request: 0x%08X\n", rc);
3637 return len;
3638 }
3639
3640 while (size && (PAGE_SIZE - len)) {
3641 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3642 PAGE_SIZE - len, 1);
3643 len = strlen(buf);
3644 if (PAGE_SIZE - len)
3645 buf[len++] = '\n';
3646
3647 ofs += 16;
3648 size -= min(size, 16U);
3649 }
3650
3651 return len;
3652}
3653
3654static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3655
3656static ssize_t show_antenna(struct device *d,
3657 struct device_attribute *attr, char *buf)
3658{
4a8a4322 3659 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 3660
775a6e27 3661 if (!iwl_is_alive(priv))
b481de9c
ZY
3662 return -EAGAIN;
3663
7e4bca5e 3664 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
3665}
3666
3667static ssize_t store_antenna(struct device *d,
3668 struct device_attribute *attr,
3669 const char *buf, size_t count)
3670{
7530f85f 3671 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 3672 int ant;
b481de9c
ZY
3673
3674 if (count == 0)
3675 return 0;
3676
3677 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 3678 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
3679 return count;
3680 }
3681
3682 if ((ant >= 0) && (ant <= 2)) {
e1623446 3683 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 3684 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 3685 } else
e1623446 3686 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
3687
3688
3689 return count;
3690}
3691
3692static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3693
3694static ssize_t show_status(struct device *d,
3695 struct device_attribute *attr, char *buf)
3696{
928841b1 3697 struct iwl_priv *priv = dev_get_drvdata(d);
775a6e27 3698 if (!iwl_is_alive(priv))
b481de9c
ZY
3699 return -EAGAIN;
3700 return sprintf(buf, "0x%08x\n", (int)priv->status);
3701}
3702
3703static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3704
3705static ssize_t dump_error_log(struct device *d,
3706 struct device_attribute *attr,
3707 const char *buf, size_t count)
3708{
928841b1 3709 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3710 char *p = (char *)buf;
3711
3712 if (p[0] == '1')
928841b1 3713 iwl3945_dump_nic_error_log(priv);
b481de9c
ZY
3714
3715 return strnlen(buf, count);
3716}
3717
3718static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3719
3720static ssize_t dump_event_log(struct device *d,
3721 struct device_attribute *attr,
3722 const char *buf, size_t count)
3723{
928841b1 3724 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3725 char *p = (char *)buf;
3726
3727 if (p[0] == '1')
928841b1 3728 iwl3945_dump_nic_event_log(priv);
b481de9c
ZY
3729
3730 return strnlen(buf, count);
3731}
3732
3733static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
3734
3735/*****************************************************************************
3736 *
a96a27f9 3737 * driver setup and tear down
b481de9c
ZY
3738 *
3739 *****************************************************************************/
3740
4a8a4322 3741static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 3742{
d21050c7 3743 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
3744
3745 init_waitqueue_head(&priv->wait_command_queue);
3746
bb8c093b
CH
3747 INIT_WORK(&priv->up, iwl3945_bg_up);
3748 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3749 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
bb8c093b 3750 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
3751 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3752 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 3753 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
3754 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3755 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3756 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3757 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
3758
3759 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
3760
3761 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 3762 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
3763}
3764
4a8a4322 3765static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 3766{
bb8c093b 3767 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 3768
e47eb6ad 3769 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
3770 cancel_delayed_work(&priv->scan_check);
3771 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
3772 cancel_work_sync(&priv->beacon_update);
3773}
3774
bb8c093b 3775static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
3776 &dev_attr_antenna.attr,
3777 &dev_attr_channels.attr,
3778 &dev_attr_dump_errors.attr,
3779 &dev_attr_dump_events.attr,
3780 &dev_attr_flags.attr,
3781 &dev_attr_filter_flags.attr,
c8b0e6e1 3782#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
3783 &dev_attr_measurement.attr,
3784#endif
3785 &dev_attr_power_level.attr,
b481de9c 3786 &dev_attr_retry_rate.attr,
b481de9c
ZY
3787 &dev_attr_statistics.attr,
3788 &dev_attr_status.attr,
3789 &dev_attr_temperature.attr,
b481de9c 3790 &dev_attr_tx_power.attr,
d08853a3 3791#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
3792 &dev_attr_debug_level.attr,
3793#endif
b481de9c
ZY
3794 NULL
3795};
3796
bb8c093b 3797static struct attribute_group iwl3945_attribute_group = {
b481de9c 3798 .name = NULL, /* put in device directory */
bb8c093b 3799 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
3800};
3801
bb8c093b
CH
3802static struct ieee80211_ops iwl3945_hw_ops = {
3803 .tx = iwl3945_mac_tx,
3804 .start = iwl3945_mac_start,
3805 .stop = iwl3945_mac_stop,
cbb6ab94 3806 .add_interface = iwl_mac_add_interface,
d8052319 3807 .remove_interface = iwl_mac_remove_interface,
4808368d 3808 .config = iwl_mac_config,
8ccde88a 3809 .configure_filter = iwl_configure_filter,
bb8c093b 3810 .set_key = iwl3945_mac_set_key,
aa89f31e 3811 .get_tx_stats = iwl_mac_get_tx_stats,
488829f1 3812 .conf_tx = iwl_mac_conf_tx,
bd564261 3813 .reset_tsf = iwl_mac_reset_tsf,
5bbe233b 3814 .bss_info_changed = iwl_bss_info_changed,
e9dde6f6 3815 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
3816};
3817
e52119c5 3818static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
3819{
3820 int ret;
e6148917 3821 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
3822
3823 priv->retry_rate = 1;
3824 priv->ibss_beacon = NULL;
3825
3826 spin_lock_init(&priv->lock);
90a30a02
KA
3827 spin_lock_init(&priv->sta_lock);
3828 spin_lock_init(&priv->hcmd_lock);
3829
3830 INIT_LIST_HEAD(&priv->free_frames);
3831
3832 mutex_init(&priv->mutex);
3833
3834 /* Clear the driver's (not device's) station table */
c587de0b 3835 iwl_clear_stations_table(priv);
90a30a02
KA
3836
3837 priv->data_retry_limit = -1;
3838 priv->ieee_channels = NULL;
3839 priv->ieee_rates = NULL;
3840 priv->band = IEEE80211_BAND_2GHZ;
3841
3842 priv->iw_mode = NL80211_IFTYPE_STATION;
3843
3844 iwl_reset_qos(priv);
3845
3846 priv->qos_data.qos_active = 0;
3847 priv->qos_data.qos_cap.val = 0;
3848
3849 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
3850 /* If power management is turned on, default to CAM mode */
3851 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 3852 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 3853
e6148917
SO
3854 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3855 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3856 eeprom->version);
3857 ret = -EINVAL;
3858 goto err;
3859 }
3860 ret = iwl_init_channel_map(priv);
90a30a02
KA
3861 if (ret) {
3862 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3863 goto err;
3864 }
3865
e6148917
SO
3866 /* Set up txpower settings in driver for all channels */
3867 if (iwl3945_txpower_set_from_eeprom(priv)) {
3868 ret = -EIO;
3869 goto err_free_channel_map;
3870 }
3871
534166de 3872 ret = iwlcore_init_geos(priv);
90a30a02
KA
3873 if (ret) {
3874 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3875 goto err_free_channel_map;
3876 }
534166de
SO
3877 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3878
2a4ddaab
AK
3879 return 0;
3880
3881err_free_channel_map:
3882 iwl_free_channel_map(priv);
3883err:
3884 return ret;
3885}
3886
3887static int iwl3945_setup_mac(struct iwl_priv *priv)
3888{
3889 int ret;
3890 struct ieee80211_hw *hw = priv->hw;
3891
3892 hw->rate_control_algorithm = "iwl-3945-rs";
3893 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3894
3895 /* Tell mac80211 our characteristics */
3896 hw->flags = IEEE80211_HW_SIGNAL_DBM |
b1c6019b
MA
3897 IEEE80211_HW_NOISE_DBM |
3898 IEEE80211_HW_SPECTRUM_MGMT;
2a4ddaab
AK
3899
3900 hw->wiphy->interface_modes =
3901 BIT(NL80211_IFTYPE_STATION) |
3902 BIT(NL80211_IFTYPE_ADHOC);
3903
3904 hw->wiphy->custom_regulatory = true;
3905
1ecf9fc1
JB
3906 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3907 /* we create the 802.11 header and a zero-length SSID element */
3908 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
d60cc91a 3909
2a4ddaab
AK
3910 /* Default value; 4 EDCA QOS priorities */
3911 hw->queues = 4;
3912
534166de
SO
3913 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3914 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3915 &priv->bands[IEEE80211_BAND_2GHZ];
2a4ddaab 3916
534166de
SO
3917 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3918 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3919 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02 3920
2a4ddaab
AK
3921 ret = ieee80211_register_hw(priv->hw);
3922 if (ret) {
3923 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3924 return ret;
3925 }
3926 priv->mac80211_registered = 1;
90a30a02 3927
2a4ddaab 3928 return 0;
90a30a02
KA
3929}
3930
bb8c093b 3931static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
3932{
3933 int err = 0;
4a8a4322 3934 struct iwl_priv *priv;
b481de9c 3935 struct ieee80211_hw *hw;
c0f20d91 3936 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 3937 struct iwl3945_eeprom *eeprom;
0359facc 3938 unsigned long flags;
b481de9c 3939
cee53ddb
KA
3940 /***********************
3941 * 1. Allocating HW data
3942 * ********************/
3943
b481de9c
ZY
3944 /* mac80211 allocates memory for this device instance, including
3945 * space for this driver's private structure */
90a30a02 3946 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 3947 if (hw == NULL) {
a3139c59 3948 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
3949 err = -ENOMEM;
3950 goto out;
3951 }
b481de9c 3952 priv = hw->priv;
90a30a02 3953 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 3954
90a30a02
KA
3955 /*
3956 * Disabling hardware scan means that mac80211 will perform scans
3957 * "the hard way", rather than using device's scan.
3958 */
df878d8f 3959 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 3960 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
3961 iwl3945_hw_ops.hw_scan = NULL;
3962 }
3963
90a30a02 3964
e1623446 3965 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
3966 priv->cfg = cfg;
3967 priv->pci_dev = pdev;
40cefda9 3968 priv->inta_mask = CSR_INI_SET_MASK;
cee53ddb 3969
d08853a3 3970#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3971 atomic_set(&priv->restrict_refcnt, 0);
3972#endif
b481de9c 3973
cee53ddb
KA
3974 /***************************
3975 * 2. Initializing PCI bus
3976 * *************************/
b481de9c
ZY
3977 if (pci_enable_device(pdev)) {
3978 err = -ENODEV;
3979 goto out_ieee80211_free_hw;
3980 }
3981
3982 pci_set_master(pdev);
3983
284901a9 3984 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 3985 if (!err)
284901a9 3986 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
b481de9c 3987 if (err) {
978785a3 3988 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
3989 goto out_pci_disable_device;
3990 }
3991
3992 pci_set_drvdata(pdev, priv);
3993 err = pci_request_regions(pdev, DRV_NAME);
3994 if (err)
3995 goto out_pci_disable_device;
6440adb5 3996
cee53ddb
KA
3997 /***********************
3998 * 3. Read REV Register
3999 * ********************/
b481de9c
ZY
4000 priv->hw_base = pci_iomap(pdev, 0, 0);
4001 if (!priv->hw_base) {
4002 err = -ENODEV;
4003 goto out_pci_release_regions;
4004 }
4005
e1623446 4006 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 4007 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 4008 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 4009
cee53ddb
KA
4010 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4011 * PCI Tx retries from interfering with C3 CPU state */
4012 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 4013
a8b50a0a
MA
4014 /* this spin lock will be used in apm_ops.init and EEPROM access
4015 * we should init now
4016 */
4017 spin_lock_init(&priv->reg_lock);
4018
90a30a02
KA
4019 /* amp init */
4020 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 4021 if (err < 0) {
d5df2a16 4022 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
90a30a02 4023 goto out_iounmap;
cee53ddb 4024 }
b481de9c 4025
cee53ddb
KA
4026 /***********************
4027 * 4. Read EEPROM
4028 * ********************/
90a30a02 4029
cee53ddb 4030 /* Read the EEPROM */
e6148917 4031 err = iwl_eeprom_init(priv);
cee53ddb 4032 if (err) {
15b1687c 4033 IWL_ERR(priv, "Unable to init EEPROM\n");
c8f16138 4034 goto out_iounmap;
cee53ddb
KA
4035 }
4036 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
4037 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4038 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 4039 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 4040 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 4041
cee53ddb
KA
4042 /***********************
4043 * 5. Setup HW Constants
4044 * ********************/
b481de9c 4045 /* Device-specific setup */
3832ec9d 4046 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 4047 IWL_ERR(priv, "failed to set hw settings\n");
c8f16138 4048 goto out_eeprom_free;
b481de9c
ZY
4049 }
4050
cee53ddb
KA
4051 /***********************
4052 * 6. Setup priv
4053 * ********************/
cee53ddb 4054
90a30a02 4055 err = iwl3945_init_drv(priv);
b481de9c 4056 if (err) {
90a30a02 4057 IWL_ERR(priv, "initializing driver failed\n");
c8f16138 4058 goto out_unset_hw_params;
b481de9c
ZY
4059 }
4060
978785a3
TW
4061 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4062 priv->cfg->name);
cee53ddb 4063
cee53ddb 4064 /***********************
09f9bf79 4065 * 7. Setup Services
cee53ddb
KA
4066 * ********************/
4067
4068 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4069 iwl_disable_interrupts(priv);
cee53ddb
KA
4070 spin_unlock_irqrestore(&priv->lock, flags);
4071
2663516d
HS
4072 pci_enable_msi(priv->pci_dev);
4073
ef850d7c
MA
4074 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4075 IRQF_SHARED, DRV_NAME, priv);
2663516d
HS
4076 if (err) {
4077 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4078 goto out_disable_msi;
4079 }
4080
cee53ddb 4081 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 4082 if (err) {
15b1687c 4083 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 4084 goto out_release_irq;
849e0dce 4085 }
849e0dce 4086
8ccde88a
SO
4087 iwl_set_rxon_channel(priv,
4088 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
4089 iwl3945_setup_deferred_work(priv);
4090 iwl3945_setup_rx_handlers(priv);
4091
cee53ddb 4092 /*********************************
09f9bf79 4093 * 8. Setup and Register mac80211
cee53ddb
KA
4094 * *******************************/
4095
2a4ddaab 4096 iwl_enable_interrupts(priv);
b481de9c 4097
2a4ddaab
AK
4098 err = iwl3945_setup_mac(priv);
4099 if (err)
4100 goto out_remove_sysfs;
cee53ddb 4101
a75fbe8d
AK
4102 err = iwl_dbgfs_register(priv, DRV_NAME);
4103 if (err)
4104 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4105
2663516d
HS
4106 /* Start monitoring the killswitch */
4107 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4108 2 * HZ);
4109
b481de9c
ZY
4110 return 0;
4111
cee53ddb 4112 out_remove_sysfs:
c8f16138
RC
4113 destroy_workqueue(priv->workqueue);
4114 priv->workqueue = NULL;
cee53ddb 4115 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4116 out_release_irq:
2663516d 4117 free_irq(priv->pci_dev->irq, priv);
2663516d
HS
4118 out_disable_msi:
4119 pci_disable_msi(priv->pci_dev);
c8f16138
RC
4120 iwlcore_free_geos(priv);
4121 iwl_free_channel_map(priv);
4122 out_unset_hw_params:
4123 iwl3945_unset_hw_params(priv);
4124 out_eeprom_free:
4125 iwl_eeprom_free(priv);
b481de9c
ZY
4126 out_iounmap:
4127 pci_iounmap(pdev, priv->hw_base);
4128 out_pci_release_regions:
4129 pci_release_regions(pdev);
4130 out_pci_disable_device:
b481de9c 4131 pci_set_drvdata(pdev, NULL);
623d563e 4132 pci_disable_device(pdev);
b481de9c
ZY
4133 out_ieee80211_free_hw:
4134 ieee80211_free_hw(priv->hw);
4135 out:
4136 return err;
4137}
4138
c83dbf68 4139static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 4140{
4a8a4322 4141 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4142 unsigned long flags;
b481de9c
ZY
4143
4144 if (!priv)
4145 return;
4146
e1623446 4147 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 4148
a75fbe8d
AK
4149 iwl_dbgfs_unregister(priv);
4150
b481de9c 4151 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4152
d552bfb6
KA
4153 if (priv->mac80211_registered) {
4154 ieee80211_unregister_hw(priv->hw);
4155 priv->mac80211_registered = 0;
4156 } else {
4157 iwl3945_down(priv);
4158 }
b481de9c 4159
0359facc
MA
4160 /* make sure we flush any pending irq or
4161 * tasklet for the driver
4162 */
4163 spin_lock_irqsave(&priv->lock, flags);
ed3b932e 4164 iwl_disable_interrupts(priv);
0359facc
MA
4165 spin_unlock_irqrestore(&priv->lock, flags);
4166
4167 iwl_synchronize_irq(priv);
4168
bb8c093b 4169 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 4170
71d449b5 4171 cancel_delayed_work_sync(&priv->rfkill_poll);
2663516d 4172
bb8c093b 4173 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
4174
4175 if (priv->rxq.bd)
df833b1d 4176 iwl3945_rx_queue_free(priv, &priv->rxq);
bb8c093b 4177 iwl3945_hw_txq_ctx_free(priv);
b481de9c 4178
3832ec9d 4179 iwl3945_unset_hw_params(priv);
c587de0b 4180 iwl_clear_stations_table(priv);
b481de9c 4181
6ef89d0a
MA
4182 /*netif_stop_queue(dev); */
4183 flush_workqueue(priv->workqueue);
4184
bb8c093b 4185 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
4186 * priv->workqueue... so we can't take down the workqueue
4187 * until now... */
4188 destroy_workqueue(priv->workqueue);
4189 priv->workqueue = NULL;
4190
2663516d
HS
4191 free_irq(pdev->irq, priv);
4192 pci_disable_msi(pdev);
4193
b481de9c
ZY
4194 pci_iounmap(pdev, priv->hw_base);
4195 pci_release_regions(pdev);
4196 pci_disable_device(pdev);
4197 pci_set_drvdata(pdev, NULL);
4198
e6148917 4199 iwl_free_channel_map(priv);
534166de 4200 iwlcore_free_geos(priv);
805cee5b 4201 kfree(priv->scan);
b481de9c
ZY
4202 if (priv->ibss_beacon)
4203 dev_kfree_skb(priv->ibss_beacon);
4204
4205 ieee80211_free_hw(priv->hw);
4206}
4207
b481de9c
ZY
4208
4209/*****************************************************************************
4210 *
4211 * driver and module entry point
4212 *
4213 *****************************************************************************/
4214
bb8c093b 4215static struct pci_driver iwl3945_driver = {
b481de9c 4216 .name = DRV_NAME,
bb8c093b
CH
4217 .id_table = iwl3945_hw_card_ids,
4218 .probe = iwl3945_pci_probe,
4219 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 4220#ifdef CONFIG_PM
6da3a13e
WYG
4221 .suspend = iwl_pci_suspend,
4222 .resume = iwl_pci_resume,
b481de9c
ZY
4223#endif
4224};
4225
bb8c093b 4226static int __init iwl3945_init(void)
b481de9c
ZY
4227{
4228
4229 int ret;
4230 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4231 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
4232
4233 ret = iwl3945_rate_control_register();
4234 if (ret) {
a3139c59
SO
4235 printk(KERN_ERR DRV_NAME
4236 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
4237 return ret;
4238 }
4239
bb8c093b 4240 ret = pci_register_driver(&iwl3945_driver);
b481de9c 4241 if (ret) {
a3139c59 4242 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 4243 goto error_register;
b481de9c 4244 }
b481de9c
ZY
4245
4246 return ret;
897e1cf2 4247
897e1cf2
RC
4248error_register:
4249 iwl3945_rate_control_unregister();
4250 return ret;
b481de9c
ZY
4251}
4252
bb8c093b 4253static void __exit iwl3945_exit(void)
b481de9c 4254{
bb8c093b 4255 pci_unregister_driver(&iwl3945_driver);
897e1cf2 4256 iwl3945_rate_control_unregister();
b481de9c
ZY
4257}
4258
a0987a8d 4259MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 4260
df878d8f 4261module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 4262MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
9c74d9fb
SO
4263module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4264MODULE_PARM_DESC(swcrypto,
4265 "using software crypto (default 1 [software])\n");
a562a9dd
RC
4266#ifdef CONFIG_IWLWIFI_DEBUG
4267module_param_named(debug, iwl_debug_level, uint, 0644);
b481de9c 4268MODULE_PARM_DESC(debug, "debug output mask");
a562a9dd 4269#endif
df878d8f 4270module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c 4271MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
af48d048
SO
4272module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4273MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4274
bb8c093b
CH
4275module_exit(iwl3945_exit);
4276module_init(iwl3945_init);
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