iwl3945: use iwl_mac_hw_scan callback
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
CommitLineData
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1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
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26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
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32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/dma-mapping.h>
35#include <linux/delay.h>
36#include <linux/skbuff.h>
37#include <linux/netdevice.h>
38#include <linux/wireless.h>
39#include <linux/firmware.h>
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40#include <linux/etherdevice.h>
41#include <linux/if_arp.h>
42
43#include <net/ieee80211_radiotap.h>
7e272fcf 44#include <net/lib80211.h>
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45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
a3139c59
SO
49#define DRV_NAME "iwl3945"
50
dbb6654c
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51#include "iwl-fh.h"
52#include "iwl-3945-fh.h"
600c0e11 53#include "iwl-commands.h"
17f841cd 54#include "iwl-sta.h"
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55#include "iwl-3945.h"
56#include "iwl-helpers.h"
5747d47f 57#include "iwl-core.h"
d20b3c65 58#include "iwl-dev.h"
b481de9c 59
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60/*
61 * module name, copyright, version, etc.
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62 */
63
64#define DRV_DESCRIPTION \
65"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
d08853a3 67#ifdef CONFIG_IWLWIFI_DEBUG
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68#define VD "d"
69#else
70#define VD
71#endif
72
c8b0e6e1 73#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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74#define VS "s"
75#else
76#define VS
77#endif
78
eaa686c3 79#define IWL39_VERSION "1.2.26k" VD VS
01f8162a 80#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
a7b75207 81#define DRV_AUTHOR "<ilw@linux.intel.com>"
eaa686c3 82#define DRV_VERSION IWL39_VERSION
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
a7b75207 87MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
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88MODULE_LICENSE("GPL");
89
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90 /* module parameters */
91struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
9c74d9fb 93 .sw_crypto = 1,
af48d048 94 .restart_fw = 1,
df878d8f
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95 /* the rest are 0 by default */
96};
97
b481de9c 98/*************** STATION TABLE MANAGEMENT ****
9fbab516 99 * mac80211 should be examined to determine if sta_info is duplicating
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100 * the functionality provided here
101 */
102
103/**************************************************************/
01ebd063 104#if 0 /* temporary disable till we add real remove station */
6440adb5
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105/**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
4a8a4322 110static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
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111{
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
3832ec9d 121 index = priv->hw_params.bcast_sta_id;
b481de9c 122 else
3832ec9d 123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
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124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
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134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
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136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144}
556f8db7 145#endif
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146
147/**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
4a8a4322 152static void iwl3945_clear_stations_table(struct iwl_priv *priv)
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153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
f2c7e521 159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
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160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162}
163
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164/**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
4a8a4322 167u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
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168{
169 int i;
170 int index = IWL_INVALID_STATION;
bb8c093b 171 struct iwl3945_station_entry *station;
b481de9c 172 unsigned long flags_spin;
c14c521e 173 u8 rate;
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174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
3832ec9d 179 index = priv->hw_params.bcast_sta_id;
b481de9c 180 else
3832ec9d 181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
f2c7e521 182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
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183 addr)) {
184 index = i;
185 break;
186 }
187
f2c7e521 188 if (!priv->stations_39[i].used &&
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189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
01ebd063 193 /* These two conditions has the same outcome but keep them separate
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194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
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200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
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202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
e1623446 206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
f2c7e521 207 station = &priv->stations_39[index];
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208 station->used = 1;
209 priv->num_stations++;
210
6440adb5 211 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
8318d78a 218 if (priv->band == IEEE80211_BAND_5GHZ)
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219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
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222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
bb8c093b 225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
c14c521e 226
b481de9c 227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
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228
229 /* Add station to device's station table */
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230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
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232 return index;
233
234}
235
4a8a4322 236static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
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237{
238 int rc = 0;
3d24a9f7 239 struct iwl_rx_packet *res = NULL;
bb8c093b 240 struct iwl3945_rxon_assoc_cmd rxon_assoc;
c2d79b48 241 struct iwl_host_cmd cmd = {
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242 .id = REPLY_RXON_ASSOC,
243 .len = sizeof(rxon_assoc),
244 .meta.flags = CMD_WANT_SKB,
245 .data = &rxon_assoc,
246 };
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247 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
248 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
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249
250 if ((rxon1->flags == rxon2->flags) &&
251 (rxon1->filter_flags == rxon2->filter_flags) &&
252 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
253 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
e1623446 254 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
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255 return 0;
256 }
257
8ccde88a
SO
258 rxon_assoc.flags = priv->staging_rxon.flags;
259 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
260 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
261 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
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262 rxon_assoc.reserved = 0;
263
518099a8 264 rc = iwl_send_cmd_sync(priv, &cmd);
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265 if (rc)
266 return rc;
267
3d24a9f7 268 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 269 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 270 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
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271 rc = -EIO;
272 }
273
274 priv->alloc_rxb_skb--;
275 dev_kfree_skb_any(cmd.meta.u.skb);
276
277 return rc;
278}
279
7e4bca5e
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280/**
281 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
282 * @priv: eeprom and antenna fields are used to determine antenna flags
283 *
284 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
285 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
286 *
287 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
288 * IWL_ANTENNA_MAIN - Force MAIN antenna
289 * IWL_ANTENNA_AUX - Force AUX antenna
290 */
291__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
292{
293 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
294
295 switch (iwl3945_mod_params.antenna) {
296 case IWL_ANTENNA_DIVERSITY:
297 return 0;
298
299 case IWL_ANTENNA_MAIN:
300 if (eeprom->antenna_switch_type)
301 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
302 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
303
304 case IWL_ANTENNA_AUX:
305 if (eeprom->antenna_switch_type)
306 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
307 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
308 }
309
310 /* bad antenna selector value */
311 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
312 iwl3945_mod_params.antenna);
313
314 return 0; /* "diversity" is default if error */
315}
316
b481de9c 317/**
bb8c093b 318 * iwl3945_commit_rxon - commit staging_rxon to hardware
b481de9c 319 *
01ebd063 320 * The RXON command in staging_rxon is committed to the hardware and
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321 * the active_rxon structure is updated with the new data. This
322 * function correctly transitions out of the RXON_ASSOC_MSK state if
323 * a HW tune is required based on the RXON structure changes.
324 */
4a8a4322 325static int iwl3945_commit_rxon(struct iwl_priv *priv)
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326{
327 /* cast away the const for active_rxon in this function */
8ccde88a
SO
328 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
329 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
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330 int rc = 0;
331
775a6e27 332 if (!iwl_is_alive(priv))
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333 return -1;
334
335 /* always get timestamp with Rx frame */
8ccde88a 336 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
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337
338 /* select antenna */
8ccde88a 339 staging_rxon->flags &=
b481de9c 340 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
8ccde88a 341 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
b481de9c 342
8ccde88a 343 rc = iwl_check_rxon_cmd(priv);
b481de9c 344 if (rc) {
15b1687c 345 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
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346 return -EINVAL;
347 }
348
349 /* If we don't need to send a full RXON, we can use
bb8c093b 350 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 351 * and other flags for the current radio configuration. */
8ccde88a 352 if (!iwl_full_rxon_required(priv)) {
bb8c093b 353 rc = iwl3945_send_rxon_assoc(priv);
b481de9c 354 if (rc) {
15b1687c 355 IWL_ERR(priv, "Error setting RXON_ASSOC "
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356 "configuration (%d).\n", rc);
357 return rc;
358 }
359
8ccde88a 360 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
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361
362 return 0;
363 }
364
365 /* If we are currently associated and the new config requires
366 * an RXON_ASSOC and the new config wants the associated mask enabled,
367 * we must clear the associated from the active configuration
368 * before we apply the new config */
8ccde88a
SO
369 if (iwl_is_associated(priv) &&
370 (staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK)) {
e1623446 371 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
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372 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
373
8ccde88a
SO
374 /*
375 * reserved4 and 5 could have been filled by the iwlcore code.
376 * Let's clear them before pushing to the 3945.
377 */
378 active_rxon->reserved4 = 0;
379 active_rxon->reserved5 = 0;
518099a8 380 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 381 sizeof(struct iwl3945_rxon_cmd),
8ccde88a 382 &priv->active_rxon);
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383
384 /* If the mask clearing failed then we set
385 * active_rxon back to what it was previously */
386 if (rc) {
387 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
15b1687c 388 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
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389 "configuration (%d).\n", rc);
390 return rc;
391 }
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392 }
393
e1623446 394 IWL_DEBUG_INFO(priv, "Sending RXON\n"
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395 "* with%s RXON_FILTER_ASSOC_MSK\n"
396 "* channel = %d\n"
e174961c 397 "* bssid = %pM\n",
8ccde88a 398 ((priv->staging_rxon.filter_flags &
b481de9c 399 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
8ccde88a
SO
400 le16_to_cpu(staging_rxon->channel),
401 staging_rxon->bssid_addr);
402
403 /*
404 * reserved4 and 5 could have been filled by the iwlcore code.
405 * Let's clear them before pushing to the 3945.
406 */
407 staging_rxon->reserved4 = 0;
408 staging_rxon->reserved5 = 0;
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409
410 /* Apply the new configuration */
518099a8 411 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
8ccde88a
SO
412 sizeof(struct iwl3945_rxon_cmd),
413 staging_rxon);
b481de9c 414 if (rc) {
15b1687c 415 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
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416 return rc;
417 }
418
8ccde88a 419 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
b481de9c 420
bb8c093b 421 iwl3945_clear_stations_table(priv);
556f8db7 422
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423 /* If we issue a new RXON command which required a tune then we must
424 * send a new TXPOWER command or we won't be able to Tx any frames */
75bcfae9 425 rc = priv->cfg->ops->lib->send_tx_power(priv);
b481de9c 426 if (rc) {
15b1687c 427 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
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428 return rc;
429 }
430
431 /* Add the broadcast address so we can send broadcast frames */
b5323d36 432 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
b481de9c 433 IWL_INVALID_STATION) {
15b1687c 434 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
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435 return -EIO;
436 }
437
438 /* If we have set the ASSOC_MSK and we are in BSS mode then
439 * add the IWL_AP_ID to the station rate table */
8ccde88a 440 if (iwl_is_associated(priv) &&
05c914fe 441 (priv->iw_mode == NL80211_IFTYPE_STATION))
8ccde88a
SO
442 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
443 1, 0)
b481de9c 444 == IWL_INVALID_STATION) {
15b1687c 445 IWL_ERR(priv, "Error adding AP address for transmit\n");
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446 return -EIO;
447 }
448
8318d78a 449 /* Init the hardware's rate fallback order based on the band */
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450 rc = iwl3945_init_hw_rate_table(priv);
451 if (rc) {
15b1687c 452 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
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453 return -EIO;
454 }
455
456 return 0;
457}
458
4a8a4322 459static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
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460 struct ieee80211_key_conf *keyconf,
461 u8 sta_id)
462{
463 unsigned long flags;
464 __le16 key_flags = 0;
465
466 switch (keyconf->alg) {
467 case ALG_CCMP:
468 key_flags |= STA_KEY_FLG_CCMP;
469 key_flags |= cpu_to_le16(
470 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
471 key_flags &= ~STA_KEY_FLG_INVALID;
472 break;
473 case ALG_TKIP:
474 case ALG_WEP:
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475 default:
476 return -EINVAL;
477 }
478 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
479 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
480 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
481 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
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482 keyconf->keylen);
483
f2c7e521 484 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
b481de9c 485 keyconf->keylen);
f2c7e521
AK
486 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
487 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
488 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
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489
490 spin_unlock_irqrestore(&priv->sta_lock, flags);
491
e1623446 492 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
17f841cd
SO
493 iwl_send_add_sta(priv,
494 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
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495 return 0;
496}
497
4a8a4322 498static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
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499{
500 unsigned long flags;
501
502 spin_lock_irqsave(&priv->sta_lock, flags);
f2c7e521
AK
503 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
504 memset(&priv->stations_39[sta_id].sta.key, 0,
4c897253 505 sizeof(struct iwl4965_keyinfo));
f2c7e521
AK
506 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
507 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
508 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
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509 spin_unlock_irqrestore(&priv->sta_lock, flags);
510
e1623446 511 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
17f841cd
SO
512 iwl_send_add_sta(priv,
513 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
b481de9c
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514 return 0;
515}
516
4a8a4322 517static void iwl3945_clear_free_frames(struct iwl_priv *priv)
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518{
519 struct list_head *element;
520
e1623446 521 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
b481de9c
ZY
522 priv->frames_count);
523
524 while (!list_empty(&priv->free_frames)) {
525 element = priv->free_frames.next;
526 list_del(element);
bb8c093b 527 kfree(list_entry(element, struct iwl3945_frame, list));
b481de9c
ZY
528 priv->frames_count--;
529 }
530
531 if (priv->frames_count) {
39aadf8c 532 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
b481de9c
ZY
533 priv->frames_count);
534 priv->frames_count = 0;
535 }
536}
537
4a8a4322 538static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
b481de9c 539{
bb8c093b 540 struct iwl3945_frame *frame;
b481de9c
ZY
541 struct list_head *element;
542 if (list_empty(&priv->free_frames)) {
543 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
544 if (!frame) {
15b1687c 545 IWL_ERR(priv, "Could not allocate frame!\n");
b481de9c
ZY
546 return NULL;
547 }
548
549 priv->frames_count++;
550 return frame;
551 }
552
553 element = priv->free_frames.next;
554 list_del(element);
bb8c093b 555 return list_entry(element, struct iwl3945_frame, list);
b481de9c
ZY
556}
557
4a8a4322 558static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
b481de9c
ZY
559{
560 memset(frame, 0, sizeof(*frame));
561 list_add(&frame->list, &priv->free_frames);
562}
563
4a8a4322 564unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
b481de9c 565 struct ieee80211_hdr *hdr,
73ec1cc2 566 int left)
b481de9c
ZY
567{
568
8ccde88a 569 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
05c914fe
JB
570 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
571 (priv->iw_mode != NL80211_IFTYPE_AP)))
b481de9c
ZY
572 return 0;
573
574 if (priv->ibss_beacon->len > left)
575 return 0;
576
577 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
578
579 return priv->ibss_beacon->len;
580}
581
4a8a4322 582static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 583{
bb8c093b 584 struct iwl3945_frame *frame;
b481de9c
ZY
585 unsigned int frame_size;
586 int rc;
587 u8 rate;
588
bb8c093b 589 frame = iwl3945_get_free_frame(priv);
b481de9c
ZY
590
591 if (!frame) {
15b1687c 592 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
b481de9c
ZY
593 "command.\n");
594 return -ENOMEM;
595 }
596
8ccde88a 597 rate = iwl_rate_get_lowest_plcp(priv);
b481de9c 598
bb8c093b 599 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 600
518099a8 601 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
602 &frame->u.cmd[0]);
603
bb8c093b 604 iwl3945_free_frame(priv, frame);
b481de9c
ZY
605
606 return rc;
607}
608
4a8a4322 609static void iwl3945_unset_hw_params(struct iwl_priv *priv)
b481de9c 610{
3832ec9d 611 if (priv->shared_virt)
b481de9c 612 pci_free_consistent(priv->pci_dev,
bb8c093b 613 sizeof(struct iwl3945_shared),
3832ec9d
AK
614 priv->shared_virt,
615 priv->shared_phys);
b481de9c
ZY
616}
617
b481de9c
ZY
618/*
619 * QoS support
620*/
4a8a4322 621static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
4c897253 622 struct iwl_qosparam_cmd *qos)
b481de9c
ZY
623{
624
518099a8 625 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
4c897253 626 sizeof(struct iwl_qosparam_cmd), qos);
b481de9c
ZY
627}
628
4a8a4322 629static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
630{
631 unsigned long flags;
632
b481de9c
ZY
633 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
634 return;
635
b481de9c
ZY
636 spin_lock_irqsave(&priv->lock, flags);
637 priv->qos_data.def_qos_parm.qos_flags = 0;
638
639 if (priv->qos_data.qos_cap.q_AP.queue_request &&
640 !priv->qos_data.qos_cap.q_AP.txop_request)
641 priv->qos_data.def_qos_parm.qos_flags |=
642 QOS_PARAM_FLG_TXOP_TYPE_MSK;
643
644 if (priv->qos_data.qos_active)
645 priv->qos_data.def_qos_parm.qos_flags |=
646 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
647
648 spin_unlock_irqrestore(&priv->lock, flags);
649
8ccde88a 650 if (force || iwl_is_associated(priv)) {
e1623446 651 IWL_DEBUG_QOS(priv, "send QoS cmd with QoS active %d \n",
b481de9c
ZY
652 priv->qos_data.qos_active);
653
bb8c093b 654 iwl3945_send_qos_params_command(priv,
b481de9c
ZY
655 &(priv->qos_data.def_qos_parm));
656 }
657}
658
b481de9c 659
b481de9c 660#define MAX_UCODE_BEACON_INTERVAL 1024
c1b4aa3f 661#define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
b481de9c 662
bb8c093b 663static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
664{
665 u16 new_val = 0;
666 u16 beacon_factor = 0;
667
668 beacon_factor =
669 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
670 / MAX_UCODE_BEACON_INTERVAL;
671 new_val = beacon_val / beacon_factor;
672
673 return cpu_to_le16(new_val);
674}
675
4a8a4322 676static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
677{
678 u64 interval_tm_unit;
679 u64 tsf, result;
680 unsigned long flags;
681 struct ieee80211_conf *conf = NULL;
682 u16 beacon_int = 0;
683
684 conf = ieee80211_get_hw_conf(priv->hw);
685
686 spin_lock_irqsave(&priv->lock, flags);
28afaf91 687 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
b481de9c
ZY
688 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
689
28afaf91 690 tsf = priv->timestamp;
b481de9c
ZY
691
692 beacon_int = priv->beacon_int;
693 spin_unlock_irqrestore(&priv->lock, flags);
694
05c914fe 695 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
b481de9c
ZY
696 if (beacon_int == 0) {
697 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
698 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
699 } else {
700 priv->rxon_timing.beacon_interval =
701 cpu_to_le16(beacon_int);
702 priv->rxon_timing.beacon_interval =
bb8c093b 703 iwl3945_adjust_beacon_interval(
b481de9c
ZY
704 le16_to_cpu(priv->rxon_timing.beacon_interval));
705 }
706
707 priv->rxon_timing.atim_window = 0;
708 } else {
709 priv->rxon_timing.beacon_interval =
bb8c093b 710 iwl3945_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
711 /* TODO: we need to get atim_window from upper stack
712 * for now we set to 0 */
713 priv->rxon_timing.atim_window = 0;
714 }
715
716 interval_tm_unit =
717 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
718 result = do_div(tsf, interval_tm_unit);
719 priv->rxon_timing.beacon_init_val =
720 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
721
e1623446
TW
722 IWL_DEBUG_ASSOC(priv,
723 "beacon interval %d beacon timer %d beacon tim %d\n",
b481de9c
ZY
724 le16_to_cpu(priv->rxon_timing.beacon_interval),
725 le32_to_cpu(priv->rxon_timing.beacon_init_val),
726 le16_to_cpu(priv->rxon_timing.atim_window));
727}
728
4a8a4322 729static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
b481de9c 730{
05c914fe 731 if (mode == NL80211_IFTYPE_ADHOC) {
d20b3c65 732 const struct iwl_channel_info *ch_info;
b481de9c 733
e6148917 734 ch_info = iwl_get_channel_info(priv,
8318d78a 735 priv->band,
8ccde88a 736 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
737
738 if (!ch_info || !is_channel_ibss(ch_info)) {
15b1687c 739 IWL_ERR(priv, "channel %d not IBSS channel\n",
8ccde88a 740 le16_to_cpu(priv->staging_rxon.channel));
b481de9c
ZY
741 return -EINVAL;
742 }
743 }
744
8ccde88a 745 iwl_connection_init_rx_config(priv, mode);
b481de9c 746
bb8c093b 747 iwl3945_clear_stations_table(priv);
b481de9c 748
a96a27f9 749 /* don't commit rxon if rf-kill is on*/
775a6e27 750 if (!iwl_is_ready_rf(priv))
fde3571f
MA
751 return -EAGAIN;
752
753 cancel_delayed_work(&priv->scan_check);
af0053d6 754 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 755 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
e1623446 756 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
fde3571f
MA
757 return -EAGAIN;
758 }
759
bb8c093b 760 iwl3945_commit_rxon(priv);
b481de9c
ZY
761
762 return 0;
763}
764
4a8a4322 765static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
e039fa4a 766 struct ieee80211_tx_info *info,
c2d79b48 767 struct iwl_cmd *cmd,
b481de9c
ZY
768 struct sk_buff *skb_frag,
769 int last_frag)
770{
e52119c5 771 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
1c014420 772 struct iwl3945_hw_key *keyinfo =
f2c7e521 773 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
b481de9c
ZY
774
775 switch (keyinfo->alg) {
776 case ALG_CCMP:
e52119c5
WT
777 tx->sec_ctl = TX_CMD_SEC_CCM;
778 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
e1623446 779 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
b481de9c
ZY
780 break;
781
782 case ALG_TKIP:
783#if 0
e52119c5 784 tx->sec_ctl = TX_CMD_SEC_TKIP;
b481de9c
ZY
785
786 if (last_frag)
e52119c5 787 memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
b481de9c
ZY
788 8);
789 else
e52119c5 790 memset(tx->tkip_mic.byte, 0, 8);
b481de9c
ZY
791#endif
792 break;
793
794 case ALG_WEP:
e52119c5 795 tx->sec_ctl = TX_CMD_SEC_WEP |
e039fa4a 796 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
b481de9c
ZY
797
798 if (keyinfo->keylen == 13)
e52119c5 799 tx->sec_ctl |= TX_CMD_SEC_KEY128;
b481de9c 800
e52119c5 801 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
b481de9c 802
e1623446 803 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
e039fa4a 804 "with key %d\n", info->control.hw_key->hw_key_idx);
b481de9c
ZY
805 break;
806
b481de9c 807 default:
978785a3 808 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
b481de9c
ZY
809 break;
810 }
811}
812
813/*
814 * handle build REPLY_TX command notification.
815 */
4a8a4322 816static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
c2d79b48 817 struct iwl_cmd *cmd,
e039fa4a 818 struct ieee80211_tx_info *info,
e52119c5 819 struct ieee80211_hdr *hdr, u8 std_id)
b481de9c 820{
e52119c5
WT
821 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
822 __le32 tx_flags = tx->tx_flags;
fd7c8a40 823 __le16 fc = hdr->frame_control;
e6a9854b 824 u8 rc_flags = info->control.rates[0].flags;
b481de9c 825
e52119c5 826 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
e039fa4a 827 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
b481de9c 828 tx_flags |= TX_CMD_FLG_ACK_MSK;
fd7c8a40 829 if (ieee80211_is_mgmt(fc))
b481de9c 830 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
fd7c8a40 831 if (ieee80211_is_probe_resp(fc) &&
b481de9c
ZY
832 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
833 tx_flags |= TX_CMD_FLG_TSF_MSK;
834 } else {
835 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
836 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
837 }
838
e52119c5 839 tx->sta_id = std_id;
8b7b1e05 840 if (ieee80211_has_morefrags(fc))
b481de9c
ZY
841 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
842
fd7c8a40
HH
843 if (ieee80211_is_data_qos(fc)) {
844 u8 *qc = ieee80211_get_qos_ctl(hdr);
e52119c5 845 tx->tid_tspec = qc[0] & 0xf;
b481de9c 846 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 847 } else {
b481de9c 848 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
54dbb525 849 }
b481de9c 850
e6a9854b 851 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
b481de9c
ZY
852 tx_flags |= TX_CMD_FLG_RTS_MSK;
853 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
e6a9854b 854 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
b481de9c
ZY
855 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
856 tx_flags |= TX_CMD_FLG_CTS_MSK;
857 }
858
859 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
860 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
861
862 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
fd7c8a40
HH
863 if (ieee80211_is_mgmt(fc)) {
864 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
e52119c5 865 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 866 else
e52119c5 867 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 868 } else {
e52119c5 869 tx->timeout.pm_frame_timeout = 0;
ab53d8af
MA
870#ifdef CONFIG_IWL3945_LEDS
871 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
872#endif
873 }
b481de9c 874
e52119c5
WT
875 tx->driver_txop = 0;
876 tx->tx_flags = tx_flags;
877 tx->next_frame_len = 0;
b481de9c
ZY
878}
879
6440adb5
CB
880/**
881 * iwl3945_get_sta_id - Find station's index within station table
882 */
4a8a4322 883static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
b481de9c
ZY
884{
885 int sta_id;
886 u16 fc = le16_to_cpu(hdr->frame_control);
887
6440adb5 888 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
889 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
890 is_multicast_ether_addr(hdr->addr1))
3832ec9d 891 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
892
893 switch (priv->iw_mode) {
894
6440adb5
CB
895 /* If we are a client station in a BSS network, use the special
896 * AP station entry (that's the only station we communicate with) */
05c914fe 897 case NL80211_IFTYPE_STATION:
b481de9c
ZY
898 return IWL_AP_ID;
899
900 /* If we are an AP, then find the station, or use BCAST */
05c914fe 901 case NL80211_IFTYPE_AP:
bb8c093b 902 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
903 if (sta_id != IWL_INVALID_STATION)
904 return sta_id;
3832ec9d 905 return priv->hw_params.bcast_sta_id;
b481de9c 906
6440adb5
CB
907 /* If this frame is going out to an IBSS network, find the station,
908 * or create a new station table entry */
05c914fe 909 case NL80211_IFTYPE_ADHOC: {
6440adb5 910 /* Create new station table entry */
bb8c093b 911 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
912 if (sta_id != IWL_INVALID_STATION)
913 return sta_id;
914
bb8c093b 915 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
916
917 if (sta_id != IWL_INVALID_STATION)
918 return sta_id;
919
e1623446 920 IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
b481de9c 921 "Defaulting to broadcast...\n",
e174961c 922 hdr->addr1);
40b8ec0b 923 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
3832ec9d 924 return priv->hw_params.bcast_sta_id;
0795af57 925 }
914233d6
SG
926 /* If we are in monitor mode, use BCAST. This is required for
927 * packet injection. */
05c914fe 928 case NL80211_IFTYPE_MONITOR:
3832ec9d 929 return priv->hw_params.bcast_sta_id;
914233d6 930
b481de9c 931 default:
39aadf8c
WT
932 IWL_WARN(priv, "Unknown mode of operation: %d\n",
933 priv->iw_mode);
3832ec9d 934 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
935 }
936}
937
938/*
939 * start REPLY_TX command process
940 */
4a8a4322 941static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
b481de9c
ZY
942{
943 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
e039fa4a 944 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e52119c5 945 struct iwl3945_tx_cmd *tx;
188cf6c7 946 struct iwl_tx_queue *txq = NULL;
d20b3c65 947 struct iwl_queue *q = NULL;
e52119c5 948 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
949 dma_addr_t phys_addr;
950 dma_addr_t txcmd_phys;
e52119c5 951 int txq_id = skb_get_queue_mapping(skb);
54dbb525
TW
952 u16 len, idx, len_org, hdr_len;
953 u8 id;
954 u8 unicast;
b481de9c 955 u8 sta_id;
54dbb525 956 u8 tid = 0;
b481de9c 957 u16 seq_number = 0;
fd7c8a40 958 __le16 fc;
b481de9c 959 u8 wait_write_ptr = 0;
54dbb525 960 u8 *qc = NULL;
b481de9c
ZY
961 unsigned long flags;
962 int rc;
963
964 spin_lock_irqsave(&priv->lock, flags);
775a6e27 965 if (iwl_is_rfkill(priv)) {
e1623446 966 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
b481de9c
ZY
967 goto drop_unlock;
968 }
969
e039fa4a 970 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
15b1687c 971 IWL_ERR(priv, "ERROR: No TX rate available.\n");
b481de9c
ZY
972 goto drop_unlock;
973 }
974
975 unicast = !is_multicast_ether_addr(hdr->addr1);
976 id = 0;
977
fd7c8a40 978 fc = hdr->frame_control;
b481de9c 979
d08853a3 980#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c 981 if (ieee80211_is_auth(fc))
e1623446 982 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
fd7c8a40 983 else if (ieee80211_is_assoc_req(fc))
e1623446 984 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
fd7c8a40 985 else if (ieee80211_is_reassoc_req(fc))
e1623446 986 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
b481de9c
ZY
987#endif
988
7878a5a4 989 /* drop all data frame if we are not associated */
914233d6 990 if (ieee80211_is_data(fc) &&
05c914fe 991 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
8ccde88a 992 (!iwl_is_associated(priv) ||
05c914fe 993 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
e1623446 994 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
b481de9c
ZY
995 goto drop_unlock;
996 }
997
998 spin_unlock_irqrestore(&priv->lock, flags);
999
7294ec95 1000 hdr_len = ieee80211_hdrlen(fc);
6440adb5
CB
1001
1002 /* Find (or create) index into station table for destination station */
bb8c093b 1003 sta_id = iwl3945_get_sta_id(priv, hdr);
b481de9c 1004 if (sta_id == IWL_INVALID_STATION) {
e1623446 1005 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
e174961c 1006 hdr->addr1);
b481de9c
ZY
1007 goto drop;
1008 }
1009
e1623446 1010 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
b481de9c 1011
fd7c8a40
HH
1012 if (ieee80211_is_data_qos(fc)) {
1013 qc = ieee80211_get_qos_ctl(hdr);
7294ec95 1014 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
f2c7e521 1015 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
b481de9c
ZY
1016 IEEE80211_SCTL_SEQ;
1017 hdr->seq_ctrl = cpu_to_le16(seq_number) |
1018 (hdr->seq_ctrl &
c1b4aa3f 1019 cpu_to_le16(IEEE80211_SCTL_FRAG));
b481de9c
ZY
1020 seq_number += 0x10;
1021 }
6440adb5
CB
1022
1023 /* Descriptor for chosen Tx queue */
188cf6c7 1024 txq = &priv->txq[txq_id];
b481de9c
ZY
1025 q = &txq->q;
1026
1027 spin_lock_irqsave(&priv->lock, flags);
1028
fc4b6853 1029 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 1030
6440adb5 1031 /* Set up driver data for this TFD */
dbb6654c 1032 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
fc4b6853 1033 txq->txb[q->write_ptr].skb[0] = skb;
6440adb5
CB
1034
1035 /* Init first empty entry in queue's array of Tx/cmd buffers */
188cf6c7 1036 out_cmd = txq->cmd[idx];
e52119c5 1037 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
b481de9c 1038 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
e52119c5 1039 memset(tx, 0, sizeof(*tx));
6440adb5
CB
1040
1041 /*
1042 * Set up the Tx-command (not MAC!) header.
1043 * Store the chosen Tx queue and TFD index within the sequence field;
1044 * after Tx, uCode's Tx response will return this value so driver can
1045 * locate the frame within the tx queue and do post-tx processing.
1046 */
b481de9c
ZY
1047 out_cmd->hdr.cmd = REPLY_TX;
1048 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 1049 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
1050
1051 /* Copy MAC header from skb into command buffer */
e52119c5 1052 memcpy(tx->hdr, hdr, hdr_len);
b481de9c 1053
6440adb5
CB
1054 /*
1055 * Use the first empty entry in this queue's command buffer array
1056 * to contain the Tx command and MAC header concatenated together
1057 * (payload data will be in another buffer).
1058 * Size of this varies, due to varying MAC header length.
1059 * If end is not dword aligned, we'll have 2 extra bytes at the end
1060 * of the MAC header (device reads on dword boundaries).
1061 * We'll tell device about this padding later.
1062 */
3832ec9d 1063 len = sizeof(struct iwl3945_tx_cmd) +
4c897253 1064 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
1065
1066 len_org = len;
1067 len = (len + 3) & ~3;
1068
1069 if (len_org != len)
1070 len_org = 1;
1071 else
1072 len_org = 0;
1073
6440adb5
CB
1074 /* Physical address of this Tx command's header (not MAC header!),
1075 * within command buffer array. */
188cf6c7
SO
1076 txcmd_phys = pci_map_single(priv->pci_dev,
1077 out_cmd, sizeof(struct iwl_cmd),
1078 PCI_DMA_TODEVICE);
1079 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
1080 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
1081 /* Add buffer containing Tx command and MAC(!) header to TFD's
1082 * first entry */
1083 txcmd_phys += offsetof(struct iwl_cmd, hdr);
b481de9c 1084
6440adb5
CB
1085 /* Add buffer containing Tx command and MAC(!) header to TFD's
1086 * first entry */
7aaa1d79
SO
1087 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1088 txcmd_phys, len, 1, 0);
b481de9c 1089
d0f09804 1090 if (info->control.hw_key)
e039fa4a 1091 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
b481de9c 1092
6440adb5
CB
1093 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1094 * if any (802.11 null frames have no payload). */
b481de9c
ZY
1095 len = skb->len - hdr_len;
1096 if (len) {
1097 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
1098 len, PCI_DMA_TODEVICE);
7aaa1d79
SO
1099 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1100 phys_addr, len,
1101 0, U32_PAD(len));
b481de9c
ZY
1102 }
1103
6440adb5 1104 /* Total # bytes to be transmitted */
b481de9c 1105 len = (u16)skb->len;
e52119c5 1106 tx->len = cpu_to_le16(len);
b481de9c
ZY
1107
1108 /* TODO need this for burst mode later on */
e52119c5 1109 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
b481de9c
ZY
1110
1111 /* set is_hcca to 0; it probably will never be implemented */
e039fa4a 1112 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
b481de9c 1113
e52119c5
WT
1114 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
1115 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
b481de9c 1116
8b7b1e05 1117 if (!ieee80211_has_morefrags(hdr->frame_control)) {
b481de9c 1118 txq->need_update = 1;
3ac7f146 1119 if (qc)
f2c7e521 1120 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
b481de9c
ZY
1121 } else {
1122 wait_write_ptr = 1;
1123 txq->need_update = 0;
1124 }
1125
e52119c5 1126 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
b481de9c 1127
e52119c5 1128 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
7294ec95 1129 ieee80211_hdrlen(fc));
b481de9c 1130
6440adb5 1131 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 1132 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
4f3602c8 1133 rc = iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1134 spin_unlock_irqrestore(&priv->lock, flags);
1135
1136 if (rc)
1137 return rc;
1138
d20b3c65 1139 if ((iwl_queue_space(q) < q->high_mark)
b481de9c
ZY
1140 && priv->mac80211_registered) {
1141 if (wait_write_ptr) {
1142 spin_lock_irqsave(&priv->lock, flags);
1143 txq->need_update = 1;
4f3602c8 1144 iwl_txq_update_write_ptr(priv, txq);
b481de9c
ZY
1145 spin_unlock_irqrestore(&priv->lock, flags);
1146 }
1147
e2530083 1148 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
b481de9c
ZY
1149 }
1150
1151 return 0;
1152
1153drop_unlock:
1154 spin_unlock_irqrestore(&priv->lock, flags);
1155drop:
1156 return -1;
1157}
1158
4a8a4322 1159static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY
1160{
1161 unsigned long flags;
1162
1163 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
1164 return;
1165
e1623446 1166 IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO %s\n",
b481de9c
ZY
1167 disable_radio ? "OFF" : "ON");
1168
1169 if (disable_radio) {
af0053d6 1170 iwl_scan_cancel(priv);
b481de9c 1171 /* FIXME: This is a workaround for AP */
05c914fe 1172 if (priv->iw_mode != NL80211_IFTYPE_AP) {
b481de9c 1173 spin_lock_irqsave(&priv->lock, flags);
5d49f498 1174 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1175 CSR_UCODE_SW_BIT_RFKILL);
1176 spin_unlock_irqrestore(&priv->lock, flags);
c496294e 1177 iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY
1178 set_bit(STATUS_RF_KILL_SW, &priv->status);
1179 }
1180 return;
1181 }
1182
1183 spin_lock_irqsave(&priv->lock, flags);
5d49f498 1184 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
1185
1186 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1187 spin_unlock_irqrestore(&priv->lock, flags);
1188
1189 /* wake up ucode */
1190 msleep(10);
1191
1192 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
1193 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1194 if (!iwl_grab_nic_access(priv))
1195 iwl_release_nic_access(priv);
b481de9c
ZY
1196 spin_unlock_irqrestore(&priv->lock, flags);
1197
1198 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
e1623446 1199 IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
b481de9c
ZY
1200 "disabled by HW switch\n");
1201 return;
1202 }
1203
808e72a0
ZY
1204 if (priv->is_open)
1205 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1206 return;
1207}
1208
c8b0e6e1 1209#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
1210
1211#include "iwl-spectrum.h"
1212
1213#define BEACON_TIME_MASK_LOW 0x00FFFFFF
1214#define BEACON_TIME_MASK_HIGH 0xFF000000
1215#define TIME_UNIT 1024
1216
1217/*
1218 * extended beacon time format
1219 * time in usec will be changed into a 32-bit value in 8:24 format
1220 * the high 1 byte is the beacon counts
1221 * the lower 3 bytes is the time in usec within one beacon interval
1222 */
1223
bb8c093b 1224static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
1225{
1226 u32 quot;
1227 u32 rem;
1228 u32 interval = beacon_interval * 1024;
1229
1230 if (!interval || !usec)
1231 return 0;
1232
1233 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
1234 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
1235
1236 return (quot << 24) + rem;
1237}
1238
1239/* base is usually what we get from ucode with each received frame,
1240 * the same as HW timer counter counting down
1241 */
1242
bb8c093b 1243static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
1244{
1245 u32 base_low = base & BEACON_TIME_MASK_LOW;
1246 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
1247 u32 interval = beacon_interval * TIME_UNIT;
1248 u32 res = (base & BEACON_TIME_MASK_HIGH) +
1249 (addon & BEACON_TIME_MASK_HIGH);
1250
1251 if (base_low > addon_low)
1252 res += base_low - addon_low;
1253 else if (base_low < addon_low) {
1254 res += interval + base_low - addon_low;
1255 res += (1 << 24);
1256 } else
1257 res += (1 << 24);
1258
1259 return cpu_to_le32(res);
1260}
1261
4a8a4322 1262static int iwl3945_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
1263 struct ieee80211_measurement_params *params,
1264 u8 type)
1265{
600c0e11 1266 struct iwl_spectrum_cmd spectrum;
3d24a9f7 1267 struct iwl_rx_packet *res;
c2d79b48 1268 struct iwl_host_cmd cmd = {
b481de9c
ZY
1269 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
1270 .data = (void *)&spectrum,
1271 .meta.flags = CMD_WANT_SKB,
1272 };
1273 u32 add_time = le64_to_cpu(params->start_time);
1274 int rc;
1275 int spectrum_resp_status;
1276 int duration = le16_to_cpu(params->duration);
1277
8ccde88a 1278 if (iwl_is_associated(priv))
b481de9c 1279 add_time =
bb8c093b 1280 iwl3945_usecs_to_beacons(
b481de9c
ZY
1281 le64_to_cpu(params->start_time) - priv->last_tsf,
1282 le16_to_cpu(priv->rxon_timing.beacon_interval));
1283
1284 memset(&spectrum, 0, sizeof(spectrum));
1285
1286 spectrum.channel_count = cpu_to_le16(1);
1287 spectrum.flags =
1288 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
1289 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
1290 cmd.len = sizeof(spectrum);
1291 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
1292
8ccde88a 1293 if (iwl_is_associated(priv))
b481de9c 1294 spectrum.start_time =
bb8c093b 1295 iwl3945_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
1296 add_time,
1297 le16_to_cpu(priv->rxon_timing.beacon_interval));
1298 else
1299 spectrum.start_time = 0;
1300
1301 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
1302 spectrum.channels[0].channel = params->channel;
1303 spectrum.channels[0].type = type;
8ccde88a 1304 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
b481de9c
ZY
1305 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1306 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1307
518099a8 1308 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1309 if (rc)
1310 return rc;
1311
3d24a9f7 1312 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c 1313 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
15b1687c 1314 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
b481de9c
ZY
1315 rc = -EIO;
1316 }
1317
1318 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1319 switch (spectrum_resp_status) {
1320 case 0: /* Command will be handled */
1321 if (res->u.spectrum.id != 0xff) {
e1623446 1322 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
bc434dd2 1323 res->u.spectrum.id);
b481de9c
ZY
1324 priv->measurement_status &= ~MEASUREMENT_READY;
1325 }
1326 priv->measurement_status |= MEASUREMENT_ACTIVE;
1327 rc = 0;
1328 break;
1329
1330 case 1: /* Command will not be handled */
1331 rc = -EAGAIN;
1332 break;
1333 }
1334
1335 dev_kfree_skb_any(cmd.meta.u.skb);
1336
1337 return rc;
1338}
1339#endif
1340
4a8a4322 1341static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
6100b588 1342 struct iwl_rx_mem_buffer *rxb)
b481de9c 1343{
3d24a9f7
TW
1344 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1345 struct iwl_alive_resp *palive;
b481de9c
ZY
1346 struct delayed_work *pwork;
1347
1348 palive = &pkt->u.alive_frame;
1349
e1623446 1350 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
b481de9c
ZY
1351 "0x%01X 0x%01X\n",
1352 palive->is_valid, palive->ver_type,
1353 palive->ver_subtype);
1354
1355 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
e1623446 1356 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
3d24a9f7
TW
1357 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1358 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1359 pwork = &priv->init_alive_start;
1360 } else {
e1623446 1361 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c 1362 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3d24a9f7 1363 sizeof(struct iwl_alive_resp));
b481de9c 1364 pwork = &priv->alive_start;
bb8c093b 1365 iwl3945_disable_events(priv);
b481de9c
ZY
1366 }
1367
1368 /* We delay the ALIVE response by 5ms to
1369 * give the HW RF Kill time to activate... */
1370 if (palive->is_valid == UCODE_VALID_OK)
1371 queue_delayed_work(priv->workqueue, pwork,
1372 msecs_to_jiffies(5));
1373 else
39aadf8c 1374 IWL_WARN(priv, "uCode did not respond OK.\n");
b481de9c
ZY
1375}
1376
4a8a4322 1377static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
6100b588 1378 struct iwl_rx_mem_buffer *rxb)
b481de9c 1379{
c7e035a9 1380#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1381 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
c7e035a9 1382#endif
b481de9c 1383
e1623446 1384 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
b481de9c
ZY
1385 return;
1386}
1387
4a8a4322 1388static void iwl3945_rx_reply_error(struct iwl_priv *priv,
6100b588 1389 struct iwl_rx_mem_buffer *rxb)
b481de9c 1390{
3d24a9f7 1391 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c 1392
15b1687c 1393 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
b481de9c
ZY
1394 "seq 0x%04X ser 0x%08X\n",
1395 le32_to_cpu(pkt->u.err_resp.error_type),
1396 get_cmd_string(pkt->u.err_resp.cmd_id),
1397 pkt->u.err_resp.cmd_id,
1398 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1399 le32_to_cpu(pkt->u.err_resp.error_info));
1400}
1401
4a8a4322 1402static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
6100b588 1403 struct iwl_rx_mem_buffer *rxb)
b481de9c 1404{
c8b0e6e1 1405#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3d24a9f7 1406 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
600c0e11 1407 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1408
1409 if (!report->state) {
e1623446 1410 IWL_DEBUG(priv, IWL_DL_11H | IWL_DL_INFO,
b481de9c
ZY
1411 "Spectrum Measure Notification: Start\n");
1412 return;
1413 }
1414
1415 memcpy(&priv->measure_report, report, sizeof(*report));
1416 priv->measurement_status |= MEASUREMENT_READY;
1417#endif
1418}
1419
4a8a4322 1420static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
6100b588 1421 struct iwl_rx_mem_buffer *rxb)
b481de9c 1422{
d08853a3 1423#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1424 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
600c0e11 1425 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
e1623446 1426 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
b481de9c
ZY
1427 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1428#endif
1429}
1430
4a8a4322 1431static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
6100b588 1432 struct iwl_rx_mem_buffer *rxb)
b481de9c 1433{
3d24a9f7 1434 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
e1623446 1435 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
b481de9c
ZY
1436 "notification for %s:\n",
1437 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
40b8ec0b
SO
1438 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
1439 le32_to_cpu(pkt->len));
b481de9c
ZY
1440}
1441
bb8c093b 1442static void iwl3945_bg_beacon_update(struct work_struct *work)
b481de9c 1443{
4a8a4322
AK
1444 struct iwl_priv *priv =
1445 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1446 struct sk_buff *beacon;
1447
1448 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1449 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1450
1451 if (!beacon) {
15b1687c 1452 IWL_ERR(priv, "update beacon failed\n");
b481de9c
ZY
1453 return;
1454 }
1455
1456 mutex_lock(&priv->mutex);
1457 /* new beacon skb is allocated every time; dispose previous.*/
1458 if (priv->ibss_beacon)
1459 dev_kfree_skb(priv->ibss_beacon);
1460
1461 priv->ibss_beacon = beacon;
1462 mutex_unlock(&priv->mutex);
1463
bb8c093b 1464 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
1465}
1466
4a8a4322 1467static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
6100b588 1468 struct iwl_rx_mem_buffer *rxb)
b481de9c 1469{
d08853a3 1470#ifdef CONFIG_IWLWIFI_DEBUG
3d24a9f7 1471 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
bb8c093b 1472 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
b481de9c
ZY
1473 u8 rate = beacon->beacon_notify_hdr.rate;
1474
e1623446 1475 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
b481de9c
ZY
1476 "tsf %d %d rate %d\n",
1477 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1478 beacon->beacon_notify_hdr.failure_frame,
1479 le32_to_cpu(beacon->ibss_mgr_status),
1480 le32_to_cpu(beacon->high_tsf),
1481 le32_to_cpu(beacon->low_tsf), rate);
1482#endif
1483
05c914fe 1484 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
b481de9c
ZY
1485 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1486 queue_work(priv->workqueue, &priv->beacon_update);
1487}
1488
b481de9c
ZY
1489/* Handle notification from uCode that card's power state is changing
1490 * due to software, hardware, or critical temperature RFKILL */
4a8a4322 1491static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
6100b588 1492 struct iwl_rx_mem_buffer *rxb)
b481de9c 1493{
3d24a9f7 1494 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
1495 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1496 unsigned long status = priv->status;
1497
e1623446 1498 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
b481de9c
ZY
1499 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1500 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1501
5d49f498 1502 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1503 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1504
1505 if (flags & HW_CARD_DISABLED)
1506 set_bit(STATUS_RF_KILL_HW, &priv->status);
1507 else
1508 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1509
1510
1511 if (flags & SW_CARD_DISABLED)
1512 set_bit(STATUS_RF_KILL_SW, &priv->status);
1513 else
1514 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1515
af0053d6 1516 iwl_scan_cancel(priv);
b481de9c
ZY
1517
1518 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1519 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1520 (test_bit(STATUS_RF_KILL_SW, &status) !=
1521 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1522 queue_work(priv->workqueue, &priv->rf_kill);
1523 else
1524 wake_up_interruptible(&priv->wait_command_queue);
1525}
1526
1527/**
bb8c093b 1528 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1529 *
1530 * Setup the RX handlers for each of the reply types sent from the uCode
1531 * to the host.
1532 *
1533 * This function chains into the hardware specific files for them to setup
1534 * any hardware specific handlers as well.
1535 */
4a8a4322 1536static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1537{
bb8c093b
CH
1538 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1539 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
1540 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
8ccde88a 1541 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
b481de9c 1542 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1543 iwl3945_rx_spectrum_measure_notif;
1544 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
b481de9c 1545 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1546 iwl3945_rx_pm_debug_statistics_notif;
1547 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
b481de9c 1548
9fbab516
BC
1549 /*
1550 * The same handler is used for both the REPLY to a discrete
1551 * statistics request from the host as well as for the periodic
1552 * statistics notifications (after received beacons) from the uCode.
b481de9c 1553 */
bb8c093b
CH
1554 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1555 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
b481de9c 1556
cade0eb2 1557 iwl_setup_rx_scan_handlers(priv);
bb8c093b 1558 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
b481de9c 1559
9fbab516 1560 /* Set up hardware specific Rx handlers */
bb8c093b 1561 iwl3945_hw_rx_handler_setup(priv);
b481de9c
ZY
1562}
1563
91c066f2
TW
1564/**
1565 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
1566 * When FW advances 'R' index, all entries between old and new 'R' index
1567 * need to be reclaimed.
1568 */
4a8a4322 1569static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
91c066f2
TW
1570 int txq_id, int index)
1571{
188cf6c7 1572 struct iwl_tx_queue *txq = &priv->txq[txq_id];
d20b3c65 1573 struct iwl_queue *q = &txq->q;
91c066f2
TW
1574 int nfreed = 0;
1575
625a381a 1576 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
15b1687c 1577 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
91c066f2
TW
1578 "is out of range [0-%d] %d %d.\n", txq_id,
1579 index, q->n_bd, q->write_ptr, q->read_ptr);
1580 return;
1581 }
1582
1583 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
1584 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1585 if (nfreed > 1) {
15b1687c 1586 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
91c066f2
TW
1587 q->write_ptr, q->read_ptr);
1588 queue_work(priv->workqueue, &priv->restart);
1589 break;
1590 }
1591 nfreed++;
1592 }
1593}
1594
1595
b481de9c 1596/**
bb8c093b 1597 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
1598 * @rxb: Rx buffer to reclaim
1599 *
1600 * If an Rx buffer has an async callback associated with it the callback
1601 * will be executed. The attached skb (if present) will only be freed
1602 * if the callback returns 1
1603 */
4a8a4322 1604static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
6100b588 1605 struct iwl_rx_mem_buffer *rxb)
b481de9c 1606{
3d24a9f7 1607 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1608 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1609 int txq_id = SEQ_TO_QUEUE(sequence);
1610 int index = SEQ_TO_INDEX(sequence);
600c0e11 1611 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
b481de9c 1612 int cmd_index;
c2d79b48 1613 struct iwl_cmd *cmd;
b481de9c 1614
638d0eb9
CR
1615 if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
1616 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
1617 txq_id, sequence,
1618 priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
1619 priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
1620 iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
1621 return;
1622 }
b481de9c 1623
188cf6c7
SO
1624 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
1625 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
b481de9c
ZY
1626
1627 /* Input error checking is done when commands are added to queue. */
1628 if (cmd->meta.flags & CMD_WANT_SKB) {
1629 cmd->meta.source->u.skb = rxb->skb;
1630 rxb->skb = NULL;
1631 } else if (cmd->meta.u.callback &&
1632 !cmd->meta.u.callback(priv, cmd, rxb->skb))
1633 rxb->skb = NULL;
1634
91c066f2 1635 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
1636
1637 if (!(cmd->meta.flags & CMD_ASYNC)) {
1638 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1639 wake_up_interruptible(&priv->wait_command_queue);
1640 }
1641}
1642
1643/************************** RX-FUNCTIONS ****************************/
1644/*
1645 * Rx theory of operation
1646 *
1647 * The host allocates 32 DMA target addresses and passes the host address
1648 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1649 * 0 to 31
1650 *
1651 * Rx Queue Indexes
1652 * The host/firmware share two index registers for managing the Rx buffers.
1653 *
1654 * The READ index maps to the first position that the firmware may be writing
1655 * to -- the driver can read up to (but not including) this position and get
1656 * good data.
1657 * The READ index is managed by the firmware once the card is enabled.
1658 *
1659 * The WRITE index maps to the last position the driver has read from -- the
1660 * position preceding WRITE is the last slot the firmware can place a packet.
1661 *
1662 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1663 * WRITE = READ.
1664 *
9fbab516 1665 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
1666 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1667 *
9fbab516 1668 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
1669 * and fire the RX interrupt. The driver can then query the READ index and
1670 * process as many packets as possible, moving the WRITE index forward as it
1671 * resets the Rx queue buffers with new memory.
1672 *
1673 * The management in the driver is as follows:
1674 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1675 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 1676 * to replenish the iwl->rxq->rx_free.
bb8c093b 1677 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
1678 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1679 * 'processed' and 'read' driver indexes as well)
1680 * + A received packet is processed and handed to the kernel network stack,
1681 * detached from the iwl->rxq. The driver 'processed' index is updated.
1682 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1683 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1684 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1685 * were enough free buffers and RX_STALLED is set it is cleared.
1686 *
1687 *
1688 * Driver sequence:
1689 *
9fbab516 1690 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 1691 * iwl3945_rx_queue_restock
9fbab516 1692 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
1693 * queue, updates firmware pointers, and updates
1694 * the WRITE index. If insufficient rx_free buffers
bb8c093b 1695 * are available, schedules iwl3945_rx_replenish
b481de9c
ZY
1696 *
1697 * -- enable interrupts --
6100b588 1698 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
b481de9c
ZY
1699 * READ INDEX, detaching the SKB from the pool.
1700 * Moves the packet buffer from queue to rx_used.
bb8c093b 1701 * Calls iwl3945_rx_queue_restock to refill any empty
b481de9c
ZY
1702 * slots.
1703 * ...
1704 *
1705 */
1706
b481de9c 1707/**
9fbab516 1708 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 1709 */
4a8a4322 1710static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
1711 dma_addr_t dma_addr)
1712{
1713 return cpu_to_le32((u32)dma_addr);
1714}
1715
1716/**
bb8c093b 1717 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 1718 *
9fbab516 1719 * If there are slots in the RX queue that need to be restocked,
b481de9c 1720 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 1721 * as we can, pulling from rx_free.
b481de9c
ZY
1722 *
1723 * This moves the 'write' index forward to catch up with 'processed', and
1724 * also updates the memory address in the firmware to reference the new
1725 * target buffer.
1726 */
4a8a4322 1727static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
b481de9c 1728{
cc2f362c 1729 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1730 struct list_head *element;
6100b588 1731 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1732 unsigned long flags;
1733 int write, rc;
1734
1735 spin_lock_irqsave(&rxq->lock, flags);
1736 write = rxq->write & ~0x7;
37d68317 1737 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 1738 /* Get next free Rx buffer, remove from free list */
b481de9c 1739 element = rxq->rx_free.next;
6100b588 1740 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
b481de9c 1741 list_del(element);
6440adb5
CB
1742
1743 /* Point to Rx buffer via next RBD in circular buffer */
6100b588 1744 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
b481de9c
ZY
1745 rxq->queue[rxq->write] = rxb;
1746 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1747 rxq->free_count--;
1748 }
1749 spin_unlock_irqrestore(&rxq->lock, flags);
1750 /* If the pre-allocated buffer pool is dropping low, schedule to
1751 * refill it */
1752 if (rxq->free_count <= RX_LOW_WATERMARK)
1753 queue_work(priv->workqueue, &priv->rx_replenish);
1754
1755
6440adb5
CB
1756 /* If we've added more space for the firmware to place data, tell it.
1757 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
1758 if ((write != (rxq->write & ~0x7))
1759 || (abs(rxq->write - rxq->read) > 7)) {
1760 spin_lock_irqsave(&rxq->lock, flags);
1761 rxq->need_update = 1;
1762 spin_unlock_irqrestore(&rxq->lock, flags);
141c43a3 1763 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
1764 if (rc)
1765 return rc;
1766 }
1767
1768 return 0;
1769}
1770
1771/**
bb8c093b 1772 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
1773 *
1774 * When moving to rx_free an SKB is allocated for the slot.
1775 *
bb8c093b 1776 * Also restock the Rx queue via iwl3945_rx_queue_restock.
01ebd063 1777 * This is called as a scheduled work item (except for during initialization)
b481de9c 1778 */
4a8a4322 1779static void iwl3945_rx_allocate(struct iwl_priv *priv)
b481de9c 1780{
cc2f362c 1781 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c 1782 struct list_head *element;
6100b588 1783 struct iwl_rx_mem_buffer *rxb;
b481de9c
ZY
1784 unsigned long flags;
1785 spin_lock_irqsave(&rxq->lock, flags);
1786 while (!list_empty(&rxq->rx_used)) {
1787 element = rxq->rx_used.next;
6100b588 1788 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
6440adb5
CB
1789
1790 /* Alloc a new receive buffer */
b481de9c 1791 rxb->skb =
1e33dc64
WT
1792 alloc_skb(priv->hw_params.rx_buf_size,
1793 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
1794 if (!rxb->skb) {
1795 if (net_ratelimit())
978785a3 1796 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
b481de9c
ZY
1797 /* We don't reschedule replenish work here -- we will
1798 * call the restock method and if it still needs
1799 * more buffers it will schedule replenish */
1800 break;
1801 }
12342c47
ZY
1802
1803 /* If radiotap head is required, reserve some headroom here.
1804 * The physical head count is a variable rx_stats->phy_count.
1805 * We reserve 4 bytes here. Plus these extra bytes, the
1806 * headroom of the physical head should be enough for the
1807 * radiotap head that iwl3945 supported. See iwl3945_rt.
1808 */
1809 skb_reserve(rxb->skb, 4);
1810
b481de9c
ZY
1811 priv->alloc_rxb_skb++;
1812 list_del(element);
6440adb5
CB
1813
1814 /* Get physical address of RB/SKB */
1e33dc64
WT
1815 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1816 rxb->skb->data,
1817 priv->hw_params.rx_buf_size,
1818 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1819 list_add_tail(&rxb->list, &rxq->rx_free);
1820 rxq->free_count++;
1821 }
1822 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
1823}
1824
1825/*
1826 * this should be called while priv->lock is locked
1827 */
4fd1f841 1828static void __iwl3945_rx_replenish(void *data)
5c0eef96 1829{
4a8a4322 1830 struct iwl_priv *priv = data;
5c0eef96
MA
1831
1832 iwl3945_rx_allocate(priv);
1833 iwl3945_rx_queue_restock(priv);
1834}
1835
1836
1837void iwl3945_rx_replenish(void *data)
1838{
4a8a4322 1839 struct iwl_priv *priv = data;
5c0eef96
MA
1840 unsigned long flags;
1841
1842 iwl3945_rx_allocate(priv);
b481de9c
ZY
1843
1844 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 1845 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
1846 spin_unlock_irqrestore(&priv->lock, flags);
1847}
1848
b481de9c
ZY
1849/* Convert linear signal-to-noise ratio into dB */
1850static u8 ratio2dB[100] = {
1851/* 0 1 2 3 4 5 6 7 8 9 */
1852 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1853 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1854 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1855 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1856 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1857 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1858 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1859 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1860 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1861 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1862};
1863
1864/* Calculates a relative dB value from a ratio of linear
1865 * (i.e. not dB) signal levels.
1866 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 1867int iwl3945_calc_db_from_ratio(int sig_ratio)
b481de9c 1868{
221c80cf
AB
1869 /* 1000:1 or higher just report as 60 dB */
1870 if (sig_ratio >= 1000)
b481de9c
ZY
1871 return 60;
1872
221c80cf 1873 /* 100:1 or higher, divide by 10 and use table,
b481de9c 1874 * add 20 dB to make up for divide by 10 */
221c80cf 1875 if (sig_ratio >= 100)
3ac7f146 1876 return 20 + (int)ratio2dB[sig_ratio/10];
b481de9c
ZY
1877
1878 /* We shouldn't see this */
1879 if (sig_ratio < 1)
1880 return 0;
1881
1882 /* Use table for ratios 1:1 - 99:1 */
1883 return (int)ratio2dB[sig_ratio];
1884}
1885
1886#define PERFECT_RSSI (-20) /* dBm */
1887#define WORST_RSSI (-95) /* dBm */
1888#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1889
1890/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1891 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1892 * about formulas used below. */
bb8c093b 1893int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
1894{
1895 int sig_qual;
1896 int degradation = PERFECT_RSSI - rssi_dbm;
1897
1898 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1899 * as indicator; formula is (signal dbm - noise dbm).
1900 * SNR at or above 40 is a great signal (100%).
1901 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1902 * Weakest usable signal is usually 10 - 15 dB SNR. */
1903 if (noise_dbm) {
1904 if (rssi_dbm - noise_dbm >= 40)
1905 return 100;
1906 else if (rssi_dbm < noise_dbm)
1907 return 0;
1908 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1909
1910 /* Else use just the signal level.
1911 * This formula is a least squares fit of data points collected and
1912 * compared with a reference system that had a percentage (%) display
1913 * for signal quality. */
1914 } else
1915 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1916 (15 * RSSI_RANGE + 62 * degradation)) /
1917 (RSSI_RANGE * RSSI_RANGE);
1918
1919 if (sig_qual > 100)
1920 sig_qual = 100;
1921 else if (sig_qual < 1)
1922 sig_qual = 0;
1923
1924 return sig_qual;
1925}
1926
1927/**
9fbab516 1928 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1929 *
1930 * Uses the priv->rx_handlers callback function array to invoke
1931 * the appropriate handlers, including command responses,
1932 * frame-received notifications, and other notifications.
1933 */
4a8a4322 1934static void iwl3945_rx_handle(struct iwl_priv *priv)
b481de9c 1935{
6100b588 1936 struct iwl_rx_mem_buffer *rxb;
3d24a9f7 1937 struct iwl_rx_packet *pkt;
cc2f362c 1938 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1939 u32 r, i;
1940 int reclaim;
1941 unsigned long flags;
5c0eef96 1942 u8 fill_rx = 0;
d68ab680 1943 u32 count = 8;
b481de9c 1944
6440adb5
CB
1945 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1946 * buffer that the driver may process (last buffer filled by ucode). */
8cd812bc 1947 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
b481de9c
ZY
1948 i = rxq->read;
1949
37d68317 1950 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96 1951 fill_rx = 1;
b481de9c
ZY
1952 /* Rx interrupt, but nothing sent from uCode */
1953 if (i == r)
e1623446 1954 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
b481de9c
ZY
1955
1956 while (i != r) {
1957 rxb = rxq->queue[i];
1958
9fbab516 1959 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1960 * then a bug has been introduced in the queue refilling
1961 * routines -- catch it here */
1962 BUG_ON(rxb == NULL);
1963
1964 rxq->queue[i] = NULL;
1965
6100b588 1966 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
1e33dc64 1967 priv->hw_params.rx_buf_size,
b481de9c 1968 PCI_DMA_FROMDEVICE);
3d24a9f7 1969 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1970
1971 /* Reclaim a command buffer only if this packet is a response
1972 * to a (driver-originated) command.
1973 * If the packet (e.g. Rx frame) originated from uCode,
1974 * there is no command buffer to reclaim.
1975 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1976 * but apparently a few don't get set; catch them here. */
1977 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1978 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1979 (pkt->hdr.cmd != REPLY_TX);
1980
1981 /* Based on type of command response or notification,
1982 * handle those that need handling via function in
bb8c093b 1983 * rx_handlers table. See iwl3945_setup_rx_handlers() */
b481de9c 1984 if (priv->rx_handlers[pkt->hdr.cmd]) {
e1623446 1985 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1986 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1987 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1988 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1989 } else {
1990 /* No handling needed */
e1623446 1991 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
b481de9c
ZY
1992 "r %d i %d No handler needed for %s, 0x%02x\n",
1993 r, i, get_cmd_string(pkt->hdr.cmd),
1994 pkt->hdr.cmd);
1995 }
1996
1997 if (reclaim) {
9fbab516 1998 /* Invoke any callbacks, transfer the skb to caller, and
518099a8 1999 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
2000 * as we reclaim the driver command queue */
2001 if (rxb && rxb->skb)
bb8c093b 2002 iwl3945_tx_cmd_complete(priv, rxb);
b481de9c 2003 else
39aadf8c 2004 IWL_WARN(priv, "Claim null rxb?\n");
b481de9c
ZY
2005 }
2006
2007 /* For now we just don't re-use anything. We can tweak this
2008 * later to try and re-use notification packets and SKBs that
2009 * fail to Rx correctly */
2010 if (rxb->skb != NULL) {
2011 priv->alloc_rxb_skb--;
2012 dev_kfree_skb_any(rxb->skb);
2013 rxb->skb = NULL;
2014 }
2015
6100b588 2016 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1e33dc64
WT
2017 priv->hw_params.rx_buf_size,
2018 PCI_DMA_FROMDEVICE);
b481de9c
ZY
2019 spin_lock_irqsave(&rxq->lock, flags);
2020 list_add_tail(&rxb->list, &priv->rxq.rx_used);
2021 spin_unlock_irqrestore(&rxq->lock, flags);
2022 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
2023 /* If there are a lot of unused frames,
2024 * restock the Rx queue so ucode won't assert. */
2025 if (fill_rx) {
2026 count++;
2027 if (count >= 8) {
2028 priv->rxq.read = i;
2029 __iwl3945_rx_replenish(priv);
2030 count = 0;
2031 }
2032 }
b481de9c
ZY
2033 }
2034
2035 /* Backtrack one entry */
2036 priv->rxq.read = i;
bb8c093b 2037 iwl3945_rx_queue_restock(priv);
b481de9c
ZY
2038}
2039
4a8a4322 2040static void iwl3945_enable_interrupts(struct iwl_priv *priv)
b481de9c 2041{
e1623446 2042 IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
b481de9c 2043 set_bit(STATUS_INT_ENABLED, &priv->status);
5d49f498 2044 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
2045}
2046
0359facc
MA
2047
2048/* call this function to flush any scheduled tasklet */
4a8a4322 2049static inline void iwl_synchronize_irq(struct iwl_priv *priv)
0359facc 2050{
a96a27f9 2051 /* wait to make sure we flush pending tasklet*/
0359facc
MA
2052 synchronize_irq(priv->pci_dev->irq);
2053 tasklet_kill(&priv->irq_tasklet);
2054}
2055
2056
4a8a4322 2057static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
2058{
2059 clear_bit(STATUS_INT_ENABLED, &priv->status);
2060
2061 /* disable interrupts from uCode/NIC to host */
5d49f498 2062 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
2063
2064 /* acknowledge/clear/reset any interrupts still pending
2065 * from uCode or flow handler (Rx/Tx DMA) */
5d49f498
AK
2066 iwl_write32(priv, CSR_INT, 0xffffffff);
2067 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
e1623446 2068 IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
b481de9c
ZY
2069}
2070
2071static const char *desc_lookup(int i)
2072{
2073 switch (i) {
2074 case 1:
2075 return "FAIL";
2076 case 2:
2077 return "BAD_PARAM";
2078 case 3:
2079 return "BAD_CHECKSUM";
2080 case 4:
2081 return "NMI_INTERRUPT";
2082 case 5:
2083 return "SYSASSERT";
2084 case 6:
2085 return "FATAL_ERROR";
2086 }
2087
2088 return "UNKNOWN";
2089}
2090
2091#define ERROR_START_OFFSET (1 * sizeof(u32))
2092#define ERROR_ELEM_SIZE (7 * sizeof(u32))
2093
4a8a4322 2094static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
2095{
2096 u32 i;
2097 u32 desc, time, count, base, data1;
2098 u32 blink1, blink2, ilink1, ilink2;
2099 int rc;
2100
2101 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2102
bb8c093b 2103 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2104 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
b481de9c
ZY
2105 return;
2106 }
2107
5d49f498 2108 rc = iwl_grab_nic_access(priv);
b481de9c 2109 if (rc) {
39aadf8c 2110 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2111 return;
2112 }
2113
5d49f498 2114 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
2115
2116 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
15b1687c
WT
2117 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2118 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2119 priv->status, count);
b481de9c
ZY
2120 }
2121
15b1687c 2122 IWL_ERR(priv, "Desc Time asrtPC blink2 "
b481de9c
ZY
2123 "ilink1 nmiPC Line\n");
2124 for (i = ERROR_START_OFFSET;
2125 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
2126 i += ERROR_ELEM_SIZE) {
5d49f498 2127 desc = iwl_read_targ_mem(priv, base + i);
b481de9c 2128 time =
5d49f498 2129 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
b481de9c 2130 blink1 =
5d49f498 2131 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
b481de9c 2132 blink2 =
5d49f498 2133 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
b481de9c 2134 ilink1 =
5d49f498 2135 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
b481de9c 2136 ilink2 =
5d49f498 2137 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
b481de9c 2138 data1 =
5d49f498 2139 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
b481de9c 2140
15b1687c
WT
2141 IWL_ERR(priv,
2142 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
2143 desc_lookup(desc), desc, time, blink1, blink2,
2144 ilink1, ilink2, data1);
b481de9c
ZY
2145 }
2146
5d49f498 2147 iwl_release_nic_access(priv);
b481de9c
ZY
2148
2149}
2150
f58177b9 2151#define EVENT_START_OFFSET (6 * sizeof(u32))
b481de9c
ZY
2152
2153/**
bb8c093b 2154 * iwl3945_print_event_log - Dump error event log to syslog
b481de9c 2155 *
5d49f498 2156 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 2157 */
4a8a4322 2158static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
2159 u32 num_events, u32 mode)
2160{
2161 u32 i;
2162 u32 base; /* SRAM byte address of event log header */
2163 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2164 u32 ptr; /* SRAM byte address of log data */
2165 u32 ev, time, data; /* event log data */
2166
2167 if (num_events == 0)
2168 return;
2169
2170 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2171
2172 if (mode == 0)
2173 event_size = 2 * sizeof(u32);
2174 else
2175 event_size = 3 * sizeof(u32);
2176
2177 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2178
2179 /* "time" is actually "data" for mode 0 (no timestamp).
2180 * place event id # at far right for easier visual parsing. */
2181 for (i = 0; i < num_events; i++) {
5d49f498 2182 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 2183 ptr += sizeof(u32);
5d49f498 2184 time = iwl_read_targ_mem(priv, ptr);
b481de9c 2185 ptr += sizeof(u32);
15b1687c
WT
2186 if (mode == 0) {
2187 /* data, ev */
2188 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
2189 } else {
5d49f498 2190 data = iwl_read_targ_mem(priv, ptr);
b481de9c 2191 ptr += sizeof(u32);
15b1687c 2192 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
b481de9c
ZY
2193 }
2194 }
2195}
2196
4a8a4322 2197static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
2198{
2199 int rc;
2200 u32 base; /* SRAM byte address of event log header */
2201 u32 capacity; /* event log capacity in # entries */
2202 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2203 u32 num_wraps; /* # times uCode wrapped to top of log */
2204 u32 next_entry; /* index of next entry to be written by uCode */
2205 u32 size; /* # entries that we'll print */
2206
2207 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 2208 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
15b1687c 2209 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
b481de9c
ZY
2210 return;
2211 }
2212
5d49f498 2213 rc = iwl_grab_nic_access(priv);
b481de9c 2214 if (rc) {
39aadf8c 2215 IWL_WARN(priv, "Can not read from adapter at this time.\n");
b481de9c
ZY
2216 return;
2217 }
2218
2219 /* event log header */
5d49f498
AK
2220 capacity = iwl_read_targ_mem(priv, base);
2221 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2222 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2223 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
2224
2225 size = num_wraps ? capacity : next_entry;
2226
2227 /* bail out if nothing in log */
2228 if (size == 0) {
15b1687c 2229 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
5d49f498 2230 iwl_release_nic_access(priv);
b481de9c
ZY
2231 return;
2232 }
2233
15b1687c 2234 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
2235 size, num_wraps);
2236
2237 /* if uCode has wrapped back to top of log, start at the oldest entry,
2238 * i.e the next one that uCode would fill. */
2239 if (num_wraps)
bb8c093b 2240 iwl3945_print_event_log(priv, next_entry,
b481de9c
ZY
2241 capacity - next_entry, mode);
2242
2243 /* (then/else) start at top of log */
bb8c093b 2244 iwl3945_print_event_log(priv, 0, next_entry, mode);
b481de9c 2245
5d49f498 2246 iwl_release_nic_access(priv);
b481de9c
ZY
2247}
2248
4a8a4322 2249static void iwl3945_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
2250{
2251 unsigned long flags;
2252
8ccde88a
SO
2253 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
2254 sizeof(priv->staging_rxon));
2255 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2256 iwl3945_commit_rxon(priv);
b481de9c 2257
bb8c093b 2258 iwl3945_add_station(priv, priv->bssid, 1, 0);
b481de9c
ZY
2259
2260 spin_lock_irqsave(&priv->lock, flags);
8ccde88a 2261 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
b481de9c
ZY
2262 priv->error_recovering = 0;
2263 spin_unlock_irqrestore(&priv->lock, flags);
2264}
2265
4a8a4322 2266static void iwl3945_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
2267{
2268 u32 inta, handled = 0;
2269 u32 inta_fh;
2270 unsigned long flags;
d08853a3 2271#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2272 u32 inta_mask;
2273#endif
2274
2275 spin_lock_irqsave(&priv->lock, flags);
2276
2277 /* Ack/clear/reset pending uCode interrupts.
2278 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
2279 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5d49f498
AK
2280 inta = iwl_read32(priv, CSR_INT);
2281 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
2282
2283 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
2284 * Any new interrupts that happen after this, either while we're
2285 * in this tasklet, or later, will show up in next ISR/tasklet. */
5d49f498
AK
2286 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2287 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 2288
d08853a3 2289#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2290 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 2291 /* just for debug */
5d49f498 2292 inta_mask = iwl_read32(priv, CSR_INT_MASK);
e1623446 2293 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
2294 inta, inta_mask, inta_fh);
2295 }
2296#endif
2297
2298 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
2299 * atomic, make sure that inta covers all the interrupts that
2300 * we've discovered, even if FH interrupt came in just after
2301 * reading CSR_INT. */
6f83eaa1 2302 if (inta_fh & CSR39_FH_INT_RX_MASK)
b481de9c 2303 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 2304 if (inta_fh & CSR39_FH_INT_TX_MASK)
b481de9c
ZY
2305 inta |= CSR_INT_BIT_FH_TX;
2306
2307 /* Now service all interrupt bits discovered above. */
2308 if (inta & CSR_INT_BIT_HW_ERR) {
15b1687c 2309 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
b481de9c
ZY
2310
2311 /* Tell the device to stop sending interrupts */
bb8c093b 2312 iwl3945_disable_interrupts(priv);
b481de9c 2313
8ccde88a 2314 iwl_irq_handle_error(priv);
b481de9c
ZY
2315
2316 handled |= CSR_INT_BIT_HW_ERR;
2317
2318 spin_unlock_irqrestore(&priv->lock, flags);
2319
2320 return;
2321 }
2322
d08853a3 2323#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2324 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 2325 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e 2326 if (inta & CSR_INT_BIT_SCD)
e1623446 2327 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
25c03d8e 2328 "the frame/frames.\n");
b481de9c
ZY
2329
2330 /* Alive notification via Rx interrupt will do the real work */
2331 if (inta & CSR_INT_BIT_ALIVE)
e1623446 2332 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
b481de9c
ZY
2333 }
2334#endif
2335 /* Safely ignore these bits for debug checks below */
25c03d8e 2336 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 2337
b481de9c
ZY
2338 /* Error detected by uCode */
2339 if (inta & CSR_INT_BIT_SW_ERR) {
15b1687c
WT
2340 IWL_ERR(priv, "Microcode SW error detected. "
2341 "Restarting 0x%X.\n", inta);
8ccde88a 2342 iwl_irq_handle_error(priv);
b481de9c
ZY
2343 handled |= CSR_INT_BIT_SW_ERR;
2344 }
2345
2346 /* uCode wakes up after power-down sleep */
2347 if (inta & CSR_INT_BIT_WAKEUP) {
e1623446 2348 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
141c43a3 2349 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
4f3602c8
SO
2350 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
2351 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
2352 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
2353 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
2354 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
2355 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
2356
2357 handled |= CSR_INT_BIT_WAKEUP;
2358 }
2359
2360 /* All uCode command responses, including Tx command responses,
2361 * Rx "responses" (frame-received notification), and other
2362 * notifications from uCode come through here*/
2363 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 2364 iwl3945_rx_handle(priv);
b481de9c
ZY
2365 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
2366 }
2367
2368 if (inta & CSR_INT_BIT_FH_TX) {
e1623446 2369 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
b481de9c 2370
5d49f498
AK
2371 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
2372 if (!iwl_grab_nic_access(priv)) {
2373 iwl_write_direct32(priv, FH39_TCSR_CREDIT
bddadf86 2374 (FH39_SRVC_CHNL), 0x0);
5d49f498 2375 iwl_release_nic_access(priv);
b481de9c
ZY
2376 }
2377 handled |= CSR_INT_BIT_FH_TX;
2378 }
2379
2380 if (inta & ~handled)
15b1687c 2381 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
b481de9c
ZY
2382
2383 if (inta & ~CSR_INI_SET_MASK) {
39aadf8c 2384 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
b481de9c 2385 inta & ~CSR_INI_SET_MASK);
39aadf8c 2386 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
b481de9c
ZY
2387 }
2388
2389 /* Re-enable all interrupts */
0359facc
MA
2390 /* only Re-enable if disabled by irq */
2391 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2392 iwl3945_enable_interrupts(priv);
b481de9c 2393
d08853a3 2394#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b 2395 if (priv->debug_level & (IWL_DL_ISR)) {
5d49f498
AK
2396 inta = iwl_read32(priv, CSR_INT);
2397 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2398 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
e1623446 2399 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
b481de9c
ZY
2400 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2401 }
2402#endif
2403 spin_unlock_irqrestore(&priv->lock, flags);
2404}
2405
bb8c093b 2406static irqreturn_t iwl3945_isr(int irq, void *data)
b481de9c 2407{
4a8a4322 2408 struct iwl_priv *priv = data;
b481de9c
ZY
2409 u32 inta, inta_mask;
2410 u32 inta_fh;
2411 if (!priv)
2412 return IRQ_NONE;
2413
2414 spin_lock(&priv->lock);
2415
2416 /* Disable (but don't clear!) interrupts here to avoid
2417 * back-to-back ISRs and sporadic interrupts from our NIC.
2418 * If we have something to service, the tasklet will re-enable ints.
2419 * If we *don't* have something, we'll re-enable before leaving here. */
5d49f498
AK
2420 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
2421 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
2422
2423 /* Discover which interrupts are active/pending */
5d49f498
AK
2424 inta = iwl_read32(priv, CSR_INT);
2425 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
2426
2427 /* Ignore interrupt if there's nothing in NIC to service.
2428 * This may be due to IRQ shared with another device,
2429 * or due to sporadic interrupts thrown from our NIC. */
2430 if (!inta && !inta_fh) {
e1623446 2431 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
b481de9c
ZY
2432 goto none;
2433 }
2434
2435 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2436 /* Hardware disappeared */
39aadf8c 2437 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
cb4da1a3 2438 goto unplugged;
b481de9c
ZY
2439 }
2440
e1623446 2441 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
b481de9c
ZY
2442 inta, inta_mask, inta_fh);
2443
25c03d8e
JP
2444 inta &= ~CSR_INT_BIT_SCD;
2445
bb8c093b 2446 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
2447 if (likely(inta || inta_fh))
2448 tasklet_schedule(&priv->irq_tasklet);
cb4da1a3 2449unplugged:
b481de9c
ZY
2450 spin_unlock(&priv->lock);
2451
2452 return IRQ_HANDLED;
2453
2454 none:
2455 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
2456 /* only Re-enable if disabled by irq */
2457 if (test_bit(STATUS_INT_ENABLED, &priv->status))
2458 iwl3945_enable_interrupts(priv);
b481de9c
ZY
2459 spin_unlock(&priv->lock);
2460 return IRQ_NONE;
2461}
2462
4a8a4322 2463static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 2464 enum ieee80211_band band,
f9340520 2465 u8 is_active, u8 n_probes,
bb8c093b 2466 struct iwl3945_scan_channel *scan_ch)
b481de9c
ZY
2467{
2468 const struct ieee80211_channel *channels = NULL;
8318d78a 2469 const struct ieee80211_supported_band *sband;
d20b3c65 2470 const struct iwl_channel_info *ch_info;
b481de9c
ZY
2471 u16 passive_dwell = 0;
2472 u16 active_dwell = 0;
2473 int added, i;
2474
cbba18c6 2475 sband = iwl_get_hw_mode(priv, band);
8318d78a 2476 if (!sband)
b481de9c
ZY
2477 return 0;
2478
8318d78a 2479 channels = sband->channels;
b481de9c 2480
77fecfb8
SO
2481 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2482 passive_dwell = iwl_get_passive_dwell_time(priv, band);
b481de9c 2483
8f4807a1
AK
2484 if (passive_dwell <= active_dwell)
2485 passive_dwell = active_dwell + 1;
2486
8318d78a 2487 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
2488 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2489 continue;
2490
8318d78a 2491 scan_ch->channel = channels[i].hw_value;
b481de9c 2492
e6148917 2493 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
b481de9c 2494 if (!is_channel_valid(ch_info)) {
e1623446 2495 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
b481de9c
ZY
2496 scan_ch->channel);
2497 continue;
2498 }
2499
011a0330
AK
2500 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2501 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2502 /* If passive , set up for auto-switch
2503 * and use long active_dwell time.
2504 */
b481de9c 2505 if (!is_active || is_channel_passive(ch_info) ||
011a0330 2506 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
b481de9c 2507 scan_ch->type = 0; /* passive */
011a0330
AK
2508 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2509 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2510 } else {
b481de9c 2511 scan_ch->type = 1; /* active */
011a0330 2512 }
b481de9c 2513
011a0330
AK
2514 /* Set direct probe bits. These may be used both for active
2515 * scan channels (probes gets sent right away),
2516 * or for passive channels (probes get se sent only after
2517 * hearing clear Rx packet).*/
2518 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2519 if (n_probes)
0d21044e 2520 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330
AK
2521 } else {
2522 /* uCode v1 does not allow setting direct probe bits on
2523 * passive channel. */
2524 if ((scan_ch->type & 1) && n_probes)
0d21044e 2525 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
011a0330 2526 }
b481de9c 2527
9fbab516 2528 /* Set txpower levels to defaults */
b481de9c
ZY
2529 scan_ch->tpc.dsp_atten = 110;
2530 /* scan_pwr_info->tpc.dsp_atten; */
2531
2532 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 2533 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
2534 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2535 else {
2536 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2537 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 2538 * power level:
8a1b0245 2539 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
2540 */
2541 }
2542
e1623446 2543 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
b481de9c
ZY
2544 scan_ch->channel,
2545 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2546 (scan_ch->type & 1) ?
2547 active_dwell : passive_dwell);
2548
2549 scan_ch++;
2550 added++;
2551 }
2552
e1623446 2553 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
b481de9c
ZY
2554 return added;
2555}
2556
4a8a4322 2557static void iwl3945_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
2558 struct ieee80211_rate *rates)
2559{
2560 int i;
2561
2562 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
2563 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2564 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2565 rates[i].hw_value_short = i;
2566 rates[i].flags = 0;
d9829a67 2567 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 2568 /*
8318d78a 2569 * If CCK != 1M then set short preamble rate flag.
b481de9c 2570 */
bb8c093b 2571 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
8318d78a 2572 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 2573 }
b481de9c
ZY
2574 }
2575}
2576
b481de9c
ZY
2577/******************************************************************************
2578 *
2579 * uCode download functions
2580 *
2581 ******************************************************************************/
2582
4a8a4322 2583static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 2584{
98c92211
TW
2585 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2586 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2587 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2588 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2589 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2590 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
2591}
2592
2593/**
bb8c093b 2594 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
2595 * looking at all data.
2596 */
4a8a4322 2597static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2598{
2599 u32 val;
2600 u32 save_len = len;
2601 int rc = 0;
2602 u32 errcnt;
2603
e1623446 2604 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2605
5d49f498 2606 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2607 if (rc)
2608 return rc;
2609
5d49f498 2610 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2611 IWL39_RTC_INST_LOWER_BOUND);
b481de9c
ZY
2612
2613 errcnt = 0;
2614 for (; len > 0; len -= sizeof(u32), image++) {
2615 /* read data comes through single port, auto-incr addr */
2616 /* NOTE: Use the debugless read so we don't flood kernel log
2617 * if IWL_DL_IO is set */
5d49f498 2618 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c 2619 if (val != le32_to_cpu(*image)) {
15b1687c 2620 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2621 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2622 save_len - len, val, le32_to_cpu(*image));
2623 rc = -EIO;
2624 errcnt++;
2625 if (errcnt >= 20)
2626 break;
2627 }
2628 }
2629
5d49f498 2630 iwl_release_nic_access(priv);
b481de9c
ZY
2631
2632 if (!errcnt)
e1623446
TW
2633 IWL_DEBUG_INFO(priv,
2634 "ucode image in INSTRUCTION memory is good\n");
b481de9c
ZY
2635
2636 return rc;
2637}
2638
2639
2640/**
bb8c093b 2641 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
2642 * using sample data 100 bytes apart. If these sample points are good,
2643 * it's a pretty good bet that everything between them is good, too.
2644 */
4a8a4322 2645static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
2646{
2647 u32 val;
2648 int rc = 0;
2649 u32 errcnt = 0;
2650 u32 i;
2651
e1623446 2652 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b481de9c 2653
5d49f498 2654 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
2655 if (rc)
2656 return rc;
2657
2658 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2659 /* read data comes through single port, auto-incr addr */
2660 /* NOTE: Use the debugless read so we don't flood kernel log
2661 * if IWL_DL_IO is set */
5d49f498 2662 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 2663 i + IWL39_RTC_INST_LOWER_BOUND);
5d49f498 2664 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
2665 if (val != le32_to_cpu(*image)) {
2666#if 0 /* Enable this if you want to see details */
15b1687c 2667 IWL_ERR(priv, "uCode INST section is invalid at "
b481de9c
ZY
2668 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2669 i, val, *image);
2670#endif
2671 rc = -EIO;
2672 errcnt++;
2673 if (errcnt >= 3)
2674 break;
2675 }
2676 }
2677
5d49f498 2678 iwl_release_nic_access(priv);
b481de9c
ZY
2679
2680 return rc;
2681}
2682
2683
2684/**
bb8c093b 2685 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
2686 * and verify its contents
2687 */
4a8a4322 2688static int iwl3945_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
2689{
2690 __le32 *image;
2691 u32 len;
2692 int rc = 0;
2693
2694 /* Try bootstrap */
2695 image = (__le32 *)priv->ucode_boot.v_addr;
2696 len = priv->ucode_boot.len;
bb8c093b 2697 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2698 if (rc == 0) {
e1623446 2699 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b481de9c
ZY
2700 return 0;
2701 }
2702
2703 /* Try initialize */
2704 image = (__le32 *)priv->ucode_init.v_addr;
2705 len = priv->ucode_init.len;
bb8c093b 2706 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2707 if (rc == 0) {
e1623446 2708 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b481de9c
ZY
2709 return 0;
2710 }
2711
2712 /* Try runtime/protocol */
2713 image = (__le32 *)priv->ucode_code.v_addr;
2714 len = priv->ucode_code.len;
bb8c093b 2715 rc = iwl3945_verify_inst_sparse(priv, image, len);
b481de9c 2716 if (rc == 0) {
e1623446 2717 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b481de9c
ZY
2718 return 0;
2719 }
2720
15b1687c 2721 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b481de9c 2722
9fbab516
BC
2723 /* Since nothing seems to match, show first several data entries in
2724 * instruction SRAM, so maybe visual inspection will give a clue.
2725 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
2726 image = (__le32 *)priv->ucode_boot.v_addr;
2727 len = priv->ucode_boot.len;
bb8c093b 2728 rc = iwl3945_verify_inst_full(priv, image, len);
b481de9c
ZY
2729
2730 return rc;
2731}
2732
4a8a4322 2733static void iwl3945_nic_start(struct iwl_priv *priv)
b481de9c
ZY
2734{
2735 /* Remove all resets to allow NIC to operate */
5d49f498 2736 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
2737}
2738
2739/**
bb8c093b 2740 * iwl3945_read_ucode - Read uCode images from disk file.
b481de9c
ZY
2741 *
2742 * Copy into buffers for card to fetch via bus-mastering
2743 */
4a8a4322 2744static int iwl3945_read_ucode(struct iwl_priv *priv)
b481de9c 2745{
a78fe754 2746 struct iwl_ucode *ucode;
a0987a8d 2747 int ret = -EINVAL, index;
b481de9c
ZY
2748 const struct firmware *ucode_raw;
2749 /* firmware file name contains uCode/driver compatibility version */
a0987a8d
RC
2750 const char *name_pre = priv->cfg->fw_name_pre;
2751 const unsigned int api_max = priv->cfg->ucode_api_max;
2752 const unsigned int api_min = priv->cfg->ucode_api_min;
2753 char buf[25];
b481de9c
ZY
2754 u8 *src;
2755 size_t len;
a0987a8d 2756 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
b481de9c
ZY
2757
2758 /* Ask kernel firmware_class module to get the boot firmware off disk.
2759 * request_firmware() is synchronous, file is in memory on return. */
a0987a8d
RC
2760 for (index = api_max; index >= api_min; index--) {
2761 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2762 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2763 if (ret < 0) {
15b1687c 2764 IWL_ERR(priv, "%s firmware file req failed: %d\n",
a0987a8d
RC
2765 buf, ret);
2766 if (ret == -ENOENT)
2767 continue;
2768 else
2769 goto error;
2770 } else {
2771 if (index < api_max)
15b1687c
WT
2772 IWL_ERR(priv, "Loaded firmware %s, "
2773 "which is deprecated. "
2774 " Please use API v%u instead.\n",
a0987a8d 2775 buf, api_max);
e1623446
TW
2776 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2777 "(%zd bytes) from disk\n",
a0987a8d
RC
2778 buf, ucode_raw->size);
2779 break;
2780 }
b481de9c
ZY
2781 }
2782
a0987a8d
RC
2783 if (ret < 0)
2784 goto error;
b481de9c
ZY
2785
2786 /* Make sure that we got at least our header! */
2787 if (ucode_raw->size < sizeof(*ucode)) {
15b1687c 2788 IWL_ERR(priv, "File size way too small!\n");
90e759d1 2789 ret = -EINVAL;
b481de9c
ZY
2790 goto err_release;
2791 }
2792
2793 /* Data from ucode file: header followed by uCode images */
2794 ucode = (void *)ucode_raw->data;
2795
c02b3acd 2796 priv->ucode_ver = le32_to_cpu(ucode->ver);
a0987a8d 2797 api_ver = IWL_UCODE_API(priv->ucode_ver);
b481de9c
ZY
2798 inst_size = le32_to_cpu(ucode->inst_size);
2799 data_size = le32_to_cpu(ucode->data_size);
2800 init_size = le32_to_cpu(ucode->init_size);
2801 init_data_size = le32_to_cpu(ucode->init_data_size);
2802 boot_size = le32_to_cpu(ucode->boot_size);
2803
a0987a8d
RC
2804 /* api_ver should match the api version forming part of the
2805 * firmware filename ... but we don't check for that and only rely
2806 * on the API version read from firware header from here on forward */
2807
2808 if (api_ver < api_min || api_ver > api_max) {
15b1687c 2809 IWL_ERR(priv, "Driver unable to support your firmware API. "
a0987a8d
RC
2810 "Driver supports v%u, firmware is v%u.\n",
2811 api_max, api_ver);
2812 priv->ucode_ver = 0;
2813 ret = -EINVAL;
2814 goto err_release;
2815 }
2816 if (api_ver != api_max)
15b1687c 2817 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
a0987a8d
RC
2818 "got %u. New firmware can be obtained "
2819 "from http://www.intellinuxwireless.org.\n",
2820 api_max, api_ver);
2821
978785a3
TW
2822 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2823 IWL_UCODE_MAJOR(priv->ucode_ver),
2824 IWL_UCODE_MINOR(priv->ucode_ver),
2825 IWL_UCODE_API(priv->ucode_ver),
2826 IWL_UCODE_SERIAL(priv->ucode_ver));
2827
e1623446 2828 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
a0987a8d 2829 priv->ucode_ver);
e1623446
TW
2830 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2831 inst_size);
2832 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2833 data_size);
2834 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2835 init_size);
2836 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2837 init_data_size);
2838 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2839 boot_size);
b481de9c 2840
a0987a8d 2841
b481de9c
ZY
2842 /* Verify size of file vs. image size info in file's header */
2843 if (ucode_raw->size < sizeof(*ucode) +
2844 inst_size + data_size + init_size +
2845 init_data_size + boot_size) {
2846
e1623446
TW
2847 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2848 ucode_raw->size);
90e759d1 2849 ret = -EINVAL;
b481de9c
ZY
2850 goto err_release;
2851 }
2852
2853 /* Verify that uCode images will fit in card's SRAM */
250bdd21 2854 if (inst_size > IWL39_MAX_INST_SIZE) {
e1623446 2855 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
90e759d1
TW
2856 inst_size);
2857 ret = -EINVAL;
b481de9c
ZY
2858 goto err_release;
2859 }
2860
250bdd21 2861 if (data_size > IWL39_MAX_DATA_SIZE) {
e1623446 2862 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
90e759d1
TW
2863 data_size);
2864 ret = -EINVAL;
b481de9c
ZY
2865 goto err_release;
2866 }
250bdd21 2867 if (init_size > IWL39_MAX_INST_SIZE) {
e1623446
TW
2868 IWL_DEBUG_INFO(priv,
2869 "uCode init instr len %d too large to fit in\n",
90e759d1
TW
2870 init_size);
2871 ret = -EINVAL;
b481de9c
ZY
2872 goto err_release;
2873 }
250bdd21 2874 if (init_data_size > IWL39_MAX_DATA_SIZE) {
e1623446
TW
2875 IWL_DEBUG_INFO(priv,
2876 "uCode init data len %d too large to fit in\n",
90e759d1
TW
2877 init_data_size);
2878 ret = -EINVAL;
b481de9c
ZY
2879 goto err_release;
2880 }
250bdd21 2881 if (boot_size > IWL39_MAX_BSM_SIZE) {
e1623446
TW
2882 IWL_DEBUG_INFO(priv,
2883 "uCode boot instr len %d too large to fit in\n",
90e759d1
TW
2884 boot_size);
2885 ret = -EINVAL;
b481de9c
ZY
2886 goto err_release;
2887 }
2888
2889 /* Allocate ucode buffers for card's bus-master loading ... */
2890
2891 /* Runtime instructions and 2 copies of data:
2892 * 1) unmodified from disk
2893 * 2) backup cache for save/restore during power-downs */
2894 priv->ucode_code.len = inst_size;
98c92211 2895 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
2896
2897 priv->ucode_data.len = data_size;
98c92211 2898 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
2899
2900 priv->ucode_data_backup.len = data_size;
98c92211 2901 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c 2902
90e759d1
TW
2903 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2904 !priv->ucode_data_backup.v_addr)
2905 goto err_pci_alloc;
b481de9c
ZY
2906
2907 /* Initialization instructions and data */
90e759d1
TW
2908 if (init_size && init_data_size) {
2909 priv->ucode_init.len = init_size;
98c92211 2910 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
2911
2912 priv->ucode_init_data.len = init_data_size;
98c92211 2913 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
2914
2915 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2916 goto err_pci_alloc;
2917 }
b481de9c
ZY
2918
2919 /* Bootstrap (instructions only, no data) */
90e759d1
TW
2920 if (boot_size) {
2921 priv->ucode_boot.len = boot_size;
98c92211 2922 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 2923
90e759d1
TW
2924 if (!priv->ucode_boot.v_addr)
2925 goto err_pci_alloc;
2926 }
b481de9c
ZY
2927
2928 /* Copy images into buffers for card's bus-master reads ... */
2929
2930 /* Runtime instructions (first block of data in file) */
2931 src = &ucode->data[0];
2932 len = priv->ucode_code.len;
e1623446
TW
2933 IWL_DEBUG_INFO(priv,
2934 "Copying (but not loading) uCode instr len %zd\n", len);
b481de9c 2935 memcpy(priv->ucode_code.v_addr, src, len);
e1623446 2936 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
b481de9c
ZY
2937 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2938
2939 /* Runtime data (2nd block)
bb8c093b 2940 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
b481de9c
ZY
2941 src = &ucode->data[inst_size];
2942 len = priv->ucode_data.len;
e1623446
TW
2943 IWL_DEBUG_INFO(priv,
2944 "Copying (but not loading) uCode data len %zd\n", len);
b481de9c
ZY
2945 memcpy(priv->ucode_data.v_addr, src, len);
2946 memcpy(priv->ucode_data_backup.v_addr, src, len);
2947
2948 /* Initialization instructions (3rd block) */
2949 if (init_size) {
2950 src = &ucode->data[inst_size + data_size];
2951 len = priv->ucode_init.len;
e1623446
TW
2952 IWL_DEBUG_INFO(priv,
2953 "Copying (but not loading) init instr len %zd\n", len);
b481de9c
ZY
2954 memcpy(priv->ucode_init.v_addr, src, len);
2955 }
2956
2957 /* Initialization data (4th block) */
2958 if (init_data_size) {
2959 src = &ucode->data[inst_size + data_size + init_size];
2960 len = priv->ucode_init_data.len;
e1623446
TW
2961 IWL_DEBUG_INFO(priv,
2962 "Copying (but not loading) init data len %zd\n", len);
b481de9c
ZY
2963 memcpy(priv->ucode_init_data.v_addr, src, len);
2964 }
2965
2966 /* Bootstrap instructions (5th block) */
2967 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2968 len = priv->ucode_boot.len;
e1623446
TW
2969 IWL_DEBUG_INFO(priv,
2970 "Copying (but not loading) boot instr len %zd\n", len);
b481de9c
ZY
2971 memcpy(priv->ucode_boot.v_addr, src, len);
2972
2973 /* We have our copies now, allow OS release its copies */
2974 release_firmware(ucode_raw);
2975 return 0;
2976
2977 err_pci_alloc:
15b1687c 2978 IWL_ERR(priv, "failed to allocate pci memory\n");
90e759d1 2979 ret = -ENOMEM;
bb8c093b 2980 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
2981
2982 err_release:
2983 release_firmware(ucode_raw);
2984
2985 error:
90e759d1 2986 return ret;
b481de9c
ZY
2987}
2988
2989
2990/**
bb8c093b 2991 * iwl3945_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
2992 *
2993 * Tell initialization uCode where to find runtime uCode.
2994 *
2995 * BSM registers initially contain pointers to initialization uCode.
2996 * We need to replace them to load runtime uCode inst and data,
2997 * and to save runtime data when powering down.
2998 */
4a8a4322 2999static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
3000{
3001 dma_addr_t pinst;
3002 dma_addr_t pdata;
3003 int rc = 0;
3004 unsigned long flags;
3005
3006 /* bits 31:0 for 3945 */
3007 pinst = priv->ucode_code.p_addr;
3008 pdata = priv->ucode_data_backup.p_addr;
3009
3010 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3011 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3012 if (rc) {
3013 spin_unlock_irqrestore(&priv->lock, flags);
3014 return rc;
3015 }
3016
3017 /* Tell bootstrap uCode where to find image to load */
5d49f498
AK
3018 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
3019 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
3020 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
3021 priv->ucode_data.len);
3022
a96a27f9 3023 /* Inst byte count must be last to set up, bit 31 signals uCode
b481de9c 3024 * that all new ptr/size info is in place */
5d49f498 3025 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
3026 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
3027
5d49f498 3028 iwl_release_nic_access(priv);
b481de9c
ZY
3029
3030 spin_unlock_irqrestore(&priv->lock, flags);
3031
e1623446 3032 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
b481de9c
ZY
3033
3034 return rc;
3035}
3036
3037/**
bb8c093b 3038 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
3039 *
3040 * Called after REPLY_ALIVE notification received from "initialize" uCode.
3041 *
b481de9c 3042 * Tell "initialize" uCode to go ahead and load the runtime uCode.
9fbab516 3043 */
4a8a4322 3044static void iwl3945_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
3045{
3046 /* Check alive response for "valid" sign from uCode */
3047 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
3048 /* We had an error bringing up the hardware, so take it
3049 * all the way back down so we can try again */
e1623446 3050 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
b481de9c
ZY
3051 goto restart;
3052 }
3053
3054 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
3055 * This is a paranoid check, because we would not have gotten the
3056 * "initialize" alive if code weren't properly loaded. */
bb8c093b 3057 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
3058 /* Runtime instruction load was bad;
3059 * take it all the way back down so we can try again */
e1623446 3060 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
b481de9c
ZY
3061 goto restart;
3062 }
3063
3064 /* Send pointers to protocol/runtime uCode image ... init code will
3065 * load and launch runtime uCode, which will send us another "Alive"
3066 * notification. */
e1623446 3067 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
bb8c093b 3068 if (iwl3945_set_ucode_ptrs(priv)) {
b481de9c
ZY
3069 /* Runtime instruction load won't happen;
3070 * take it all the way back down so we can try again */
e1623446 3071 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
b481de9c
ZY
3072 goto restart;
3073 }
3074 return;
3075
3076 restart:
3077 queue_work(priv->workqueue, &priv->restart);
3078}
3079
3080
9bdf5eca
MA
3081/* temporary */
3082static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
3083 struct sk_buff *skb);
3084
b481de9c 3085/**
bb8c093b 3086 * iwl3945_alive_start - called after REPLY_ALIVE notification received
b481de9c 3087 * from protocol/runtime uCode (initialization uCode's
bb8c093b 3088 * Alive gets handled by iwl3945_init_alive_start()).
b481de9c 3089 */
4a8a4322 3090static void iwl3945_alive_start(struct iwl_priv *priv)
b481de9c
ZY
3091{
3092 int rc = 0;
3093 int thermal_spin = 0;
3094 u32 rfkill;
3095
e1623446 3096 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
b481de9c
ZY
3097
3098 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
3099 /* We had an error bringing up the hardware, so take it
3100 * all the way back down so we can try again */
e1623446 3101 IWL_DEBUG_INFO(priv, "Alive failed.\n");
b481de9c
ZY
3102 goto restart;
3103 }
3104
3105 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
3106 * This is a paranoid check, because we would not have gotten the
3107 * "runtime" alive if code weren't properly loaded. */
bb8c093b 3108 if (iwl3945_verify_ucode(priv)) {
b481de9c
ZY
3109 /* Runtime instruction load was bad;
3110 * take it all the way back down so we can try again */
e1623446 3111 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
b481de9c
ZY
3112 goto restart;
3113 }
3114
bb8c093b 3115 iwl3945_clear_stations_table(priv);
b481de9c 3116
5d49f498 3117 rc = iwl_grab_nic_access(priv);
b481de9c 3118 if (rc) {
39aadf8c 3119 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
b481de9c
ZY
3120 return;
3121 }
3122
5d49f498 3123 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
e1623446 3124 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
5d49f498 3125 iwl_release_nic_access(priv);
b481de9c
ZY
3126
3127 if (rfkill & 0x1) {
3128 clear_bit(STATUS_RF_KILL_HW, &priv->status);
a96a27f9 3129 /* if RFKILL is not on, then wait for thermal
b481de9c 3130 * sensor in adapter to kick in */
bb8c093b 3131 while (iwl3945_hw_get_temperature(priv) == 0) {
b481de9c
ZY
3132 thermal_spin++;
3133 udelay(10);
3134 }
3135
3136 if (thermal_spin)
e1623446 3137 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
b481de9c
ZY
3138 thermal_spin * 10);
3139 } else
3140 set_bit(STATUS_RF_KILL_HW, &priv->status);
3141
9fbab516 3142 /* After the ALIVE response, we can send commands to 3945 uCode */
b481de9c
ZY
3143 set_bit(STATUS_ALIVE, &priv->status);
3144
3145 /* Clear out the uCode error bit if it is set */
3146 clear_bit(STATUS_FW_ERROR, &priv->status);
3147
775a6e27 3148 if (iwl_is_rfkill(priv))
b481de9c
ZY
3149 return;
3150
36d6825b 3151 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
3152
3153 priv->active_rate = priv->rates_mask;
3154 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
3155
d25aabb0 3156 iwl_power_update_mode(priv, false);
b481de9c 3157
8ccde88a 3158 if (iwl_is_associated(priv)) {
bb8c093b 3159 struct iwl3945_rxon_cmd *active_rxon =
8ccde88a 3160 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
b481de9c 3161
8ccde88a
SO
3162 memcpy(&priv->staging_rxon, &priv->active_rxon,
3163 sizeof(priv->staging_rxon));
b481de9c
ZY
3164 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3165 } else {
3166 /* Initialize our rx_config data */
8ccde88a 3167 iwl_connection_init_rx_config(priv, priv->iw_mode);
b481de9c
ZY
3168 }
3169
9fbab516 3170 /* Configure Bluetooth device coexistence support */
17f841cd 3171 iwl_send_bt_config(priv);
b481de9c
ZY
3172
3173 /* Configure the adapter for unassociated operation */
bb8c093b 3174 iwl3945_commit_rxon(priv);
b481de9c 3175
b481de9c
ZY
3176 iwl3945_reg_txpower_periodic(priv);
3177
fe00b5a5
RC
3178 iwl3945_led_register(priv);
3179
e1623446 3180 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
a9f46786 3181 set_bit(STATUS_READY, &priv->status);
5a66926a 3182 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
3183
3184 if (priv->error_recovering)
bb8c093b 3185 iwl3945_error_recovery(priv);
b481de9c 3186
9bdf5eca
MA
3187 /* reassociate for ADHOC mode */
3188 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
3189 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
3190 priv->vif);
3191 if (beacon)
3192 iwl3945_mac_beacon_update(priv->hw, beacon);
3193 }
3194
b481de9c
ZY
3195 return;
3196
3197 restart:
3198 queue_work(priv->workqueue, &priv->restart);
3199}
3200
4a8a4322 3201static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 3202
4a8a4322 3203static void __iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3204{
3205 unsigned long flags;
3206 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
3207 struct ieee80211_conf *conf = NULL;
3208
e1623446 3209 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
b481de9c
ZY
3210
3211 conf = ieee80211_get_hw_conf(priv->hw);
3212
3213 if (!exit_pending)
3214 set_bit(STATUS_EXIT_PENDING, &priv->status);
3215
ab53d8af 3216 iwl3945_led_unregister(priv);
bb8c093b 3217 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3218
3219 /* Unblock any waiting calls */
3220 wake_up_interruptible_all(&priv->wait_command_queue);
3221
b481de9c
ZY
3222 /* Wipe out the EXIT_PENDING status bit if we are not actually
3223 * exiting the module */
3224 if (!exit_pending)
3225 clear_bit(STATUS_EXIT_PENDING, &priv->status);
3226
3227 /* stop and reset the on-board processor */
5d49f498 3228 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
3229
3230 /* tell the device to stop sending interrupts */
0359facc 3231 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3232 iwl3945_disable_interrupts(priv);
0359facc
MA
3233 spin_unlock_irqrestore(&priv->lock, flags);
3234 iwl_synchronize_irq(priv);
b481de9c
ZY
3235
3236 if (priv->mac80211_registered)
3237 ieee80211_stop_queues(priv->hw);
3238
bb8c093b 3239 /* If we have not previously called iwl3945_init() then
b481de9c 3240 * clear all bits but the RF Kill and SUSPEND bits and return */
775a6e27 3241 if (!iwl_is_init(priv)) {
b481de9c
ZY
3242 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3243 STATUS_RF_KILL_HW |
3244 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3245 STATUS_RF_KILL_SW |
9788864e
RC
3246 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3247 STATUS_GEO_CONFIGURED |
b481de9c 3248 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
ebef2008
AK
3249 STATUS_IN_SUSPEND |
3250 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3251 STATUS_EXIT_PENDING;
b481de9c
ZY
3252 goto exit;
3253 }
3254
3255 /* ...otherwise clear out all the status bits but the RF Kill and
3256 * SUSPEND bits and continue taking the NIC down. */
3257 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
3258 STATUS_RF_KILL_HW |
3259 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
3260 STATUS_RF_KILL_SW |
9788864e
RC
3261 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
3262 STATUS_GEO_CONFIGURED |
b481de9c
ZY
3263 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
3264 STATUS_IN_SUSPEND |
3265 test_bit(STATUS_FW_ERROR, &priv->status) <<
ebef2008
AK
3266 STATUS_FW_ERROR |
3267 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
3268 STATUS_EXIT_PENDING;
b481de9c 3269
e9414b6b 3270 priv->cfg->ops->lib->apm_ops.reset(priv);
b481de9c 3271 spin_lock_irqsave(&priv->lock, flags);
5d49f498 3272 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
3273 spin_unlock_irqrestore(&priv->lock, flags);
3274
bb8c093b
CH
3275 iwl3945_hw_txq_ctx_stop(priv);
3276 iwl3945_hw_rxq_stop(priv);
b481de9c
ZY
3277
3278 spin_lock_irqsave(&priv->lock, flags);
5d49f498
AK
3279 if (!iwl_grab_nic_access(priv)) {
3280 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 3281 APMG_CLK_VAL_DMA_CLK_RQT);
5d49f498 3282 iwl_release_nic_access(priv);
b481de9c
ZY
3283 }
3284 spin_unlock_irqrestore(&priv->lock, flags);
3285
3286 udelay(5);
3287
e9414b6b
AM
3288 if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
3289 priv->cfg->ops->lib->apm_ops.stop(priv);
3290 else
3291 priv->cfg->ops->lib->apm_ops.reset(priv);
3292
b481de9c 3293 exit:
3d24a9f7 3294 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
3295
3296 if (priv->ibss_beacon)
3297 dev_kfree_skb(priv->ibss_beacon);
3298 priv->ibss_beacon = NULL;
3299
3300 /* clear out any free frames */
bb8c093b 3301 iwl3945_clear_free_frames(priv);
b481de9c
ZY
3302}
3303
4a8a4322 3304static void iwl3945_down(struct iwl_priv *priv)
b481de9c
ZY
3305{
3306 mutex_lock(&priv->mutex);
bb8c093b 3307 __iwl3945_down(priv);
b481de9c 3308 mutex_unlock(&priv->mutex);
b24d22b1 3309
bb8c093b 3310 iwl3945_cancel_deferred_work(priv);
b481de9c
ZY
3311}
3312
3313#define MAX_HW_RESTARTS 5
3314
4a8a4322 3315static int __iwl3945_up(struct iwl_priv *priv)
b481de9c
ZY
3316{
3317 int rc, i;
3318
3319 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
39aadf8c 3320 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
b481de9c
ZY
3321 return -EIO;
3322 }
3323
3324 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
39aadf8c 3325 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
b481de9c 3326 "parameter)\n");
e655b9f0
ZY
3327 return -ENODEV;
3328 }
3329
e903fbd4 3330 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
15b1687c 3331 IWL_ERR(priv, "ucode not available for device bring up\n");
e903fbd4
RC
3332 return -EIO;
3333 }
3334
e655b9f0 3335 /* If platform's RF_KILL switch is NOT set to KILL */
5d49f498 3336 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
3337 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3338 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3339 else {
3340 set_bit(STATUS_RF_KILL_HW, &priv->status);
3341 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
39aadf8c 3342 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
e655b9f0
ZY
3343 return -ENODEV;
3344 }
b481de9c 3345 }
80fcc9e2 3346
5d49f498 3347 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 3348
bb8c093b 3349 rc = iwl3945_hw_nic_init(priv);
b481de9c 3350 if (rc) {
15b1687c 3351 IWL_ERR(priv, "Unable to int nic\n");
b481de9c
ZY
3352 return rc;
3353 }
3354
3355 /* make sure rfkill handshake bits are cleared */
5d49f498
AK
3356 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3357 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
3358 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3359
3360 /* clear (again), then enable host interrupts */
5d49f498 3361 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 3362 iwl3945_enable_interrupts(priv);
b481de9c
ZY
3363
3364 /* really make sure rfkill handshake bits are cleared */
5d49f498
AK
3365 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3366 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
3367
3368 /* Copy original ucode data image from disk into backup cache.
3369 * This will be used to initialize the on-board processor's
3370 * data SRAM for a clean start when the runtime program first loads. */
3371 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 3372 priv->ucode_data.len);
b481de9c 3373
e655b9f0
ZY
3374 /* We return success when we resume from suspend and rf_kill is on. */
3375 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
3376 return 0;
3377
b481de9c
ZY
3378 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3379
bb8c093b 3380 iwl3945_clear_stations_table(priv);
b481de9c
ZY
3381
3382 /* load bootstrap state machine,
3383 * load bootstrap program into processor's memory,
3384 * prepare to load the "initialize" uCode */
0164b9b4 3385 priv->cfg->ops->lib->load_ucode(priv);
b481de9c
ZY
3386
3387 if (rc) {
15b1687c
WT
3388 IWL_ERR(priv,
3389 "Unable to set up bootstrap uCode: %d\n", rc);
b481de9c
ZY
3390 continue;
3391 }
3392
3393 /* start card; "initialize" will load runtime ucode */
bb8c093b 3394 iwl3945_nic_start(priv);
b481de9c 3395
e1623446 3396 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
b481de9c
ZY
3397
3398 return 0;
3399 }
3400
3401 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 3402 __iwl3945_down(priv);
ebef2008 3403 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
3404
3405 /* tried to restart and config the device for as long as our
3406 * patience could withstand */
15b1687c 3407 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
b481de9c
ZY
3408 return -EIO;
3409}
3410
3411
3412/*****************************************************************************
3413 *
3414 * Workqueue callbacks
3415 *
3416 *****************************************************************************/
3417
bb8c093b 3418static void iwl3945_bg_init_alive_start(struct work_struct *data)
b481de9c 3419{
4a8a4322
AK
3420 struct iwl_priv *priv =
3421 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
3422
3423 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3424 return;
3425
3426 mutex_lock(&priv->mutex);
bb8c093b 3427 iwl3945_init_alive_start(priv);
b481de9c
ZY
3428 mutex_unlock(&priv->mutex);
3429}
3430
bb8c093b 3431static void iwl3945_bg_alive_start(struct work_struct *data)
b481de9c 3432{
4a8a4322
AK
3433 struct iwl_priv *priv =
3434 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
3435
3436 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3437 return;
3438
3439 mutex_lock(&priv->mutex);
bb8c093b 3440 iwl3945_alive_start(priv);
b481de9c
ZY
3441 mutex_unlock(&priv->mutex);
3442}
3443
2663516d
HS
3444static void iwl3945_rfkill_poll(struct work_struct *data)
3445{
3446 struct iwl_priv *priv =
3447 container_of(data, struct iwl_priv, rfkill_poll.work);
3448 unsigned long status = priv->status;
3449
3450 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3451 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3452 else
3453 set_bit(STATUS_RF_KILL_HW, &priv->status);
3454
3455 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
3456 queue_work(priv->workqueue, &priv->rf_kill);
3457
3458 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3459 round_jiffies_relative(2 * HZ));
3460
3461}
3462
b481de9c 3463#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
bb8c093b 3464static void iwl3945_bg_request_scan(struct work_struct *data)
b481de9c 3465{
4a8a4322
AK
3466 struct iwl_priv *priv =
3467 container_of(data, struct iwl_priv, request_scan);
c2d79b48 3468 struct iwl_host_cmd cmd = {
b481de9c 3469 .id = REPLY_SCAN_CMD,
bb8c093b 3470 .len = sizeof(struct iwl3945_scan_cmd),
b481de9c
ZY
3471 .meta.flags = CMD_SIZE_HUGE,
3472 };
3473 int rc = 0;
bb8c093b 3474 struct iwl3945_scan_cmd *scan;
b481de9c 3475 struct ieee80211_conf *conf = NULL;
f9340520 3476 u8 n_probes = 2;
8318d78a 3477 enum ieee80211_band band;
9387b7ca 3478 DECLARE_SSID_BUF(ssid);
b481de9c
ZY
3479
3480 conf = ieee80211_get_hw_conf(priv->hw);
3481
3482 mutex_lock(&priv->mutex);
3483
775a6e27 3484 if (!iwl_is_ready(priv)) {
39aadf8c 3485 IWL_WARN(priv, "request scan called when driver not ready.\n");
b481de9c
ZY
3486 goto done;
3487 }
3488
a96a27f9 3489 /* Make sure the scan wasn't canceled before this queued work
b481de9c
ZY
3490 * was given the chance to run... */
3491 if (!test_bit(STATUS_SCANNING, &priv->status))
3492 goto done;
3493
3494 /* This should never be called or scheduled if there is currently
3495 * a scan active in the hardware. */
3496 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
e1623446
TW
3497 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
3498 "Ignoring second request.\n");
b481de9c
ZY
3499 rc = -EIO;
3500 goto done;
3501 }
3502
3503 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 3504 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
b481de9c
ZY
3505 goto done;
3506 }
3507
3508 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
e1623446
TW
3509 IWL_DEBUG_HC(priv,
3510 "Scan request while abort pending. Queuing.\n");
b481de9c
ZY
3511 goto done;
3512 }
3513
775a6e27 3514 if (iwl_is_rfkill(priv)) {
e1623446 3515 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
b481de9c
ZY
3516 goto done;
3517 }
3518
3519 if (!test_bit(STATUS_READY, &priv->status)) {
e1623446
TW
3520 IWL_DEBUG_HC(priv,
3521 "Scan request while uninitialized. Queuing.\n");
b481de9c
ZY
3522 goto done;
3523 }
3524
3525 if (!priv->scan_bands) {
e1623446 3526 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
b481de9c
ZY
3527 goto done;
3528 }
3529
805cee5b
WT
3530 if (!priv->scan) {
3531 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
b481de9c 3532 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
805cee5b 3533 if (!priv->scan) {
b481de9c
ZY
3534 rc = -ENOMEM;
3535 goto done;
3536 }
3537 }
805cee5b 3538 scan = priv->scan;
bb8c093b 3539 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
3540
3541 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3542 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3543
8ccde88a 3544 if (iwl_is_associated(priv)) {
b481de9c
ZY
3545 u16 interval = 0;
3546 u32 extra;
3547 u32 suspend_time = 100;
3548 u32 scan_suspend_time = 100;
3549 unsigned long flags;
3550
e1623446 3551 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
b481de9c
ZY
3552
3553 spin_lock_irqsave(&priv->lock, flags);
3554 interval = priv->beacon_int;
3555 spin_unlock_irqrestore(&priv->lock, flags);
3556
3557 scan->suspend_time = 0;
15e869d8 3558 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
3559 if (!interval)
3560 interval = suspend_time;
3561 /*
3562 * suspend time format:
3563 * 0-19: beacon interval in usec (time before exec.)
3564 * 20-23: 0
3565 * 24-31: number of beacons (suspend between channels)
3566 */
3567
3568 extra = (suspend_time / interval) << 24;
3569 scan_suspend_time = 0xFF0FFFFF &
3570 (extra | ((suspend_time % interval) * 1024));
3571
3572 scan->suspend_time = cpu_to_le32(scan_suspend_time);
e1623446 3573 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
b481de9c
ZY
3574 scan_suspend_time, interval);
3575 }
3576
3577 /* We should add the ability for user to lock to PASSIVE ONLY */
3578 if (priv->one_direct_scan) {
e1623446
TW
3579 IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
3580 print_ssid(ssid, priv->direct_ssid,
9387b7ca 3581 priv->direct_ssid_len));
b481de9c
ZY
3582 scan->direct_scan[0].id = WLAN_EID_SSID;
3583 scan->direct_scan[0].len = priv->direct_ssid_len;
3584 memcpy(scan->direct_scan[0].ssid,
3585 priv->direct_ssid, priv->direct_ssid_len);
f9340520 3586 n_probes++;
f9340520 3587 } else
e1623446 3588 IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
b481de9c
ZY
3589
3590 /* We don't build a direct scan probe request; the uCode will do
3591 * that based on the direct_mask added to each channel entry */
b481de9c 3592 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3832ec9d 3593 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
3594 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3595
3596 /* flags + rate selection */
3597
66b5004d 3598 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
b481de9c
ZY
3599 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3600 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3601 scan->good_CRC_th = 0;
8318d78a 3602 band = IEEE80211_BAND_2GHZ;
66b5004d 3603 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
b481de9c
ZY
3604 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3605 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 3606 band = IEEE80211_BAND_5GHZ;
66b5004d 3607 } else {
39aadf8c 3608 IWL_WARN(priv, "Invalid scan band count\n");
b481de9c
ZY
3609 goto done;
3610 }
3611
77fecfb8
SO
3612 scan->tx_cmd.len = cpu_to_le16(
3613 iwl_fill_probe_req(priv, band,
3614 (struct ieee80211_mgmt *)scan->data,
3615 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3616
b481de9c
ZY
3617 /* select Rx antennas */
3618 scan->flags |= iwl3945_get_antenna_flags(priv);
3619
05c914fe 3620 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
b481de9c
ZY
3621 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3622
f9340520
AK
3623 scan->channel_count =
3624 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
3625 n_probes,
3626 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 3627
14b54336 3628 if (scan->channel_count == 0) {
e1623446 3629 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
14b54336
RC
3630 goto done;
3631 }
3632
b481de9c 3633 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 3634 scan->channel_count * sizeof(struct iwl3945_scan_channel);
b481de9c
ZY
3635 cmd.data = scan;
3636 scan->len = cpu_to_le16(cmd.len);
3637
3638 set_bit(STATUS_SCAN_HW, &priv->status);
518099a8 3639 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3640 if (rc)
3641 goto done;
3642
3643 queue_delayed_work(priv->workqueue, &priv->scan_check,
3644 IWL_SCAN_CHECK_WATCHDOG);
3645
3646 mutex_unlock(&priv->mutex);
3647 return;
3648
3649 done:
2420ebc1
MA
3650 /* can not perform scan make sure we clear scanning
3651 * bits from status so next scan request can be performed.
3652 * if we dont clear scanning status bit here all next scan
3653 * will fail
3654 */
3655 clear_bit(STATUS_SCAN_HW, &priv->status);
3656 clear_bit(STATUS_SCANNING, &priv->status);
3657
01ebd063 3658 /* inform mac80211 scan aborted */
b481de9c
ZY
3659 queue_work(priv->workqueue, &priv->scan_completed);
3660 mutex_unlock(&priv->mutex);
3661}
3662
bb8c093b 3663static void iwl3945_bg_up(struct work_struct *data)
b481de9c 3664{
4a8a4322 3665 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
3666
3667 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3668 return;
3669
3670 mutex_lock(&priv->mutex);
bb8c093b 3671 __iwl3945_up(priv);
b481de9c 3672 mutex_unlock(&priv->mutex);
c0af96a6 3673 iwl_rfkill_set_hw_state(priv);
b481de9c
ZY
3674}
3675
bb8c093b 3676static void iwl3945_bg_restart(struct work_struct *data)
b481de9c 3677{
4a8a4322 3678 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
3679
3680 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3681 return;
3682
bb8c093b 3683 iwl3945_down(priv);
b481de9c
ZY
3684 queue_work(priv->workqueue, &priv->up);
3685}
3686
bb8c093b 3687static void iwl3945_bg_rx_replenish(struct work_struct *data)
b481de9c 3688{
4a8a4322
AK
3689 struct iwl_priv *priv =
3690 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
3691
3692 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3693 return;
3694
3695 mutex_lock(&priv->mutex);
bb8c093b 3696 iwl3945_rx_replenish(priv);
b481de9c
ZY
3697 mutex_unlock(&priv->mutex);
3698}
3699
7878a5a4
MA
3700#define IWL_DELAY_NEXT_SCAN (HZ*2)
3701
4a8a4322 3702static void iwl3945_post_associate(struct iwl_priv *priv)
b481de9c 3703{
b481de9c
ZY
3704 int rc = 0;
3705 struct ieee80211_conf *conf = NULL;
3706
05c914fe 3707 if (priv->iw_mode == NL80211_IFTYPE_AP) {
15b1687c 3708 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
b481de9c
ZY
3709 return;
3710 }
3711
3712
e1623446 3713 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
8ccde88a 3714 priv->assoc_id, priv->active_rxon.bssid_addr);
b481de9c
ZY
3715
3716 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3717 return;
3718
322a9811 3719 if (!priv->vif || !priv->is_open)
6ef89d0a 3720 return;
322a9811 3721
af0053d6 3722 iwl_scan_cancel_timeout(priv, 200);
15e869d8 3723
b481de9c
ZY
3724 conf = ieee80211_get_hw_conf(priv->hw);
3725
8ccde88a 3726 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3727 iwl3945_commit_rxon(priv);
b481de9c 3728
28afaf91 3729 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 3730 iwl3945_setup_rxon_timing(priv);
518099a8 3731 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
3732 sizeof(priv->rxon_timing), &priv->rxon_timing);
3733 if (rc)
39aadf8c 3734 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
3735 "Attempting to continue.\n");
3736
8ccde88a 3737 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
b481de9c 3738
8ccde88a 3739 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 3740
e1623446 3741 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
b481de9c
ZY
3742 priv->assoc_id, priv->beacon_int);
3743
3744 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 3745 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3746 else
8ccde88a 3747 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
b481de9c 3748
8ccde88a 3749 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c 3750 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 3751 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3752 else
8ccde88a 3753 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c 3754
05c914fe 3755 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 3756 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
b481de9c
ZY
3757
3758 }
3759
bb8c093b 3760 iwl3945_commit_rxon(priv);
b481de9c
ZY
3761
3762 switch (priv->iw_mode) {
05c914fe 3763 case NL80211_IFTYPE_STATION:
bb8c093b 3764 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
3765 break;
3766
05c914fe 3767 case NL80211_IFTYPE_ADHOC:
b481de9c 3768
ce546fd2 3769 priv->assoc_id = 1;
bb8c093b 3770 iwl3945_add_station(priv, priv->bssid, 0, 0);
b481de9c 3771 iwl3945_sync_sta(priv, IWL_STA_ID,
8318d78a 3772 (priv->band == IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
3773 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3774 CMD_ASYNC);
bb8c093b
CH
3775 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3776 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
3777
3778 break;
3779
3780 default:
15b1687c 3781 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3ac7f146 3782 __func__, priv->iw_mode);
b481de9c
ZY
3783 break;
3784 }
3785
bb8c093b 3786 iwl3945_activate_qos(priv, 0);
292ae174 3787
7878a5a4
MA
3788 /* we have just associated, don't start scan too early */
3789 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
cd56d331
AK
3790}
3791
e8975581 3792static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
76bb77e0 3793
b481de9c
ZY
3794/*****************************************************************************
3795 *
3796 * mac80211 entry point functions
3797 *
3798 *****************************************************************************/
3799
5a66926a
ZY
3800#define UCODE_READY_TIMEOUT (2 * HZ)
3801
bb8c093b 3802static int iwl3945_mac_start(struct ieee80211_hw *hw)
b481de9c 3803{
4a8a4322 3804 struct iwl_priv *priv = hw->priv;
5a66926a 3805 int ret;
b481de9c 3806
e1623446 3807 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
3808
3809 /* we should be verifying the device is ready to be opened */
3810 mutex_lock(&priv->mutex);
3811
8ccde88a 3812 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
5a66926a
ZY
3813 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3814 * ucode filename and max sizes are card-specific. */
3815
3816 if (!priv->ucode_code.len) {
3817 ret = iwl3945_read_ucode(priv);
3818 if (ret) {
15b1687c 3819 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
5a66926a
ZY
3820 mutex_unlock(&priv->mutex);
3821 goto out_release_irq;
3822 }
3823 }
b481de9c 3824
e655b9f0 3825 ret = __iwl3945_up(priv);
b481de9c
ZY
3826
3827 mutex_unlock(&priv->mutex);
5a66926a 3828
c0af96a6 3829 iwl_rfkill_set_hw_state(priv);
80fcc9e2 3830
e655b9f0
ZY
3831 if (ret)
3832 goto out_release_irq;
3833
e1623446 3834 IWL_DEBUG_INFO(priv, "Start UP work.\n");
e655b9f0
ZY
3835
3836 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
3837 return 0;
3838
5a66926a
ZY
3839 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3840 * mac80211 will not be run successfully. */
3841 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3842 test_bit(STATUS_READY, &priv->status),
3843 UCODE_READY_TIMEOUT);
3844 if (!ret) {
3845 if (!test_bit(STATUS_READY, &priv->status)) {
15b1687c
WT
3846 IWL_ERR(priv,
3847 "Wait for START_ALIVE timeout after %dms.\n",
3848 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5a66926a
ZY
3849 ret = -ETIMEDOUT;
3850 goto out_release_irq;
3851 }
3852 }
3853
2663516d
HS
3854 /* ucode is running and will send rfkill notifications,
3855 * no need to poll the killswitch state anymore */
3856 cancel_delayed_work(&priv->rfkill_poll);
3857
e655b9f0 3858 priv->is_open = 1;
e1623446 3859 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 3860 return 0;
5a66926a
ZY
3861
3862out_release_irq:
e655b9f0 3863 priv->is_open = 0;
e1623446 3864 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
5a66926a 3865 return ret;
b481de9c
ZY
3866}
3867
bb8c093b 3868static void iwl3945_mac_stop(struct ieee80211_hw *hw)
b481de9c 3869{
4a8a4322 3870 struct iwl_priv *priv = hw->priv;
b481de9c 3871
e1623446 3872 IWL_DEBUG_MAC80211(priv, "enter\n");
6ef89d0a 3873
e655b9f0 3874 if (!priv->is_open) {
e1623446 3875 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
e655b9f0
ZY
3876 return;
3877 }
3878
b481de9c 3879 priv->is_open = 0;
5a66926a 3880
775a6e27 3881 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
3882 /* stop mac, cancel any scan request and clear
3883 * RXON_FILTER_ASSOC_MSK BIT
3884 */
5a66926a 3885 mutex_lock(&priv->mutex);
af0053d6 3886 iwl_scan_cancel_timeout(priv, 100);
fde3571f 3887 mutex_unlock(&priv->mutex);
fde3571f
MA
3888 }
3889
5a66926a
ZY
3890 iwl3945_down(priv);
3891
3892 flush_workqueue(priv->workqueue);
2663516d
HS
3893
3894 /* start polling the killswitch state again */
3895 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3896 round_jiffies_relative(2 * HZ));
6ef89d0a 3897
e1623446 3898 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3899}
3900
e039fa4a 3901static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3902{
4a8a4322 3903 struct iwl_priv *priv = hw->priv;
b481de9c 3904
e1623446 3905 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 3906
e1623446 3907 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 3908 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 3909
e039fa4a 3910 if (iwl3945_tx_skb(priv, skb))
b481de9c
ZY
3911 dev_kfree_skb_any(skb);
3912
e1623446 3913 IWL_DEBUG_MAC80211(priv, "leave\n");
637f8837 3914 return NETDEV_TX_OK;
b481de9c
ZY
3915}
3916
bb8c093b 3917static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3918 struct ieee80211_if_init_conf *conf)
3919{
4a8a4322 3920 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3921 unsigned long flags;
3922
e1623446 3923 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
b481de9c 3924
32bfd35d 3925 if (priv->vif) {
e1623446 3926 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
864792e3 3927 return -EOPNOTSUPP;
b481de9c
ZY
3928 }
3929
3930 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 3931 priv->vif = conf->vif;
60294de3 3932 priv->iw_mode = conf->type;
b481de9c
ZY
3933
3934 spin_unlock_irqrestore(&priv->lock, flags);
3935
3936 mutex_lock(&priv->mutex);
864792e3
TW
3937
3938 if (conf->mac_addr) {
e1623446 3939 IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
864792e3
TW
3940 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
3941 }
3942
775a6e27 3943 if (iwl_is_ready(priv))
5a66926a 3944 iwl3945_set_mode(priv, conf->type);
b481de9c 3945
b481de9c
ZY
3946 mutex_unlock(&priv->mutex);
3947
e1623446 3948 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
3949 return 0;
3950}
3951
3952/**
bb8c093b 3953 * iwl3945_mac_config - mac80211 config callback
b481de9c
ZY
3954 *
3955 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
3956 * be set inappropriately and the driver currently sets the hardware up to
3957 * use it whenever needed.
3958 */
e8975581 3959static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
b481de9c 3960{
4a8a4322 3961 struct iwl_priv *priv = hw->priv;
d20b3c65 3962 const struct iwl_channel_info *ch_info;
e8975581 3963 struct ieee80211_conf *conf = &hw->conf;
b481de9c 3964 unsigned long flags;
76bb77e0 3965 int ret = 0;
b481de9c
ZY
3966
3967 mutex_lock(&priv->mutex);
e1623446
TW
3968 IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
3969 conf->channel->hw_value);
b481de9c 3970
775a6e27 3971 if (!iwl_is_ready(priv)) {
e1623446 3972 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
76bb77e0
ZY
3973 ret = -EIO;
3974 goto out;
b481de9c
ZY
3975 }
3976
df878d8f 3977 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
b481de9c 3978 test_bit(STATUS_SCANNING, &priv->status))) {
e1623446 3979 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
a0646470 3980 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 3981 mutex_unlock(&priv->mutex);
a0646470 3982 return 0;
b481de9c
ZY
3983 }
3984
3985 spin_lock_irqsave(&priv->lock, flags);
3986
e6148917
SO
3987 ch_info = iwl_get_channel_info(priv, conf->channel->band,
3988 conf->channel->hw_value);
b481de9c 3989 if (!is_channel_valid(ch_info)) {
e1623446
TW
3990 IWL_DEBUG_SCAN(priv,
3991 "Channel %d [%d] is INVALID for this band.\n",
3992 conf->channel->hw_value, conf->channel->band);
3993 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
b481de9c 3994 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
3995 ret = -EINVAL;
3996 goto out;
b481de9c
ZY
3997 }
3998
8ccde88a 3999 iwl_set_rxon_channel(priv, conf->channel);
b481de9c 4000
8ccde88a 4001 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
4002
4003 /* The list of supported rates and rate mask can be different
4004 * for each phymode; since the phymode may have changed, reset
4005 * the rate mask to what mac80211 lists */
8ccde88a 4006 iwl_set_rate(priv);
b481de9c
ZY
4007
4008 spin_unlock_irqrestore(&priv->lock, flags);
4009
4010#ifdef IEEE80211_CONF_CHANNEL_SWITCH
4011 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 4012 iwl3945_hw_channel_switch(priv, conf->channel);
76bb77e0 4013 goto out;
b481de9c
ZY
4014 }
4015#endif
4016
bb8c093b 4017 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
4018
4019 if (!conf->radio_enabled) {
e1623446 4020 IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
76bb77e0 4021 goto out;
b481de9c
ZY
4022 }
4023
775a6e27 4024 if (iwl_is_rfkill(priv)) {
e1623446 4025 IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
76bb77e0
ZY
4026 ret = -EIO;
4027 goto out;
b481de9c
ZY
4028 }
4029
8ccde88a 4030 iwl_set_rate(priv);
b481de9c 4031
8ccde88a
SO
4032 if (memcmp(&priv->active_rxon,
4033 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 4034 iwl3945_commit_rxon(priv);
b481de9c 4035 else
e1623446 4036 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
b481de9c 4037
e1623446 4038 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c 4039
76bb77e0 4040out:
a0646470 4041 clear_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 4042 mutex_unlock(&priv->mutex);
76bb77e0 4043 return ret;
b481de9c
ZY
4044}
4045
4a8a4322 4046static void iwl3945_config_ap(struct iwl_priv *priv)
b481de9c
ZY
4047{
4048 int rc = 0;
4049
d986bcd1 4050 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
4051 return;
4052
4053 /* The following should be done only at AP bring up */
8ccde88a 4054 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
4055
4056 /* RXON - unassoc (to set timing command) */
8ccde88a 4057 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4058 iwl3945_commit_rxon(priv);
b481de9c
ZY
4059
4060 /* RXON Timing */
28afaf91 4061 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
bb8c093b 4062 iwl3945_setup_rxon_timing(priv);
518099a8
SO
4063 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
4064 sizeof(priv->rxon_timing),
4065 &priv->rxon_timing);
b481de9c 4066 if (rc)
39aadf8c 4067 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
b481de9c
ZY
4068 "Attempting to continue.\n");
4069
4070 /* FIXME: what should be the assoc_id for AP? */
8ccde88a 4071 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
b481de9c 4072 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
8ccde88a 4073 priv->staging_rxon.flags |=
b481de9c
ZY
4074 RXON_FLG_SHORT_PREAMBLE_MSK;
4075 else
8ccde88a 4076 priv->staging_rxon.flags &=
b481de9c
ZY
4077 ~RXON_FLG_SHORT_PREAMBLE_MSK;
4078
8ccde88a 4079 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
b481de9c
ZY
4080 if (priv->assoc_capability &
4081 WLAN_CAPABILITY_SHORT_SLOT_TIME)
8ccde88a 4082 priv->staging_rxon.flags |=
b481de9c
ZY
4083 RXON_FLG_SHORT_SLOT_MSK;
4084 else
8ccde88a 4085 priv->staging_rxon.flags &=
b481de9c
ZY
4086 ~RXON_FLG_SHORT_SLOT_MSK;
4087
05c914fe 4088 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
8ccde88a 4089 priv->staging_rxon.flags &=
b481de9c
ZY
4090 ~RXON_FLG_SHORT_SLOT_MSK;
4091 }
4092 /* restore RXON assoc */
8ccde88a 4093 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 4094 iwl3945_commit_rxon(priv);
b5323d36 4095 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
556f8db7 4096 }
bb8c093b 4097 iwl3945_send_beacon_cmd(priv);
b481de9c
ZY
4098
4099 /* FIXME - we need to add code here to detect a totally new
4100 * configuration, reset the AP, unassoc, rxon timing, assoc,
4101 * clear sta table, add BCAST sta... */
4102}
4103
32bfd35d
JB
4104static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
4105 struct ieee80211_vif *vif,
4a8a4322 4106 struct ieee80211_if_conf *conf)
b481de9c 4107{
4a8a4322 4108 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4109 int rc;
4110
4111 if (conf == NULL)
4112 return -EIO;
4113
b716bb91 4114 if (priv->vif != vif) {
e1623446 4115 IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
b716bb91
EG
4116 return 0;
4117 }
4118
9d139c81 4119 /* handle this temporarily here */
05c914fe 4120 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
9d139c81
JB
4121 conf->changed & IEEE80211_IFCC_BEACON) {
4122 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
4123 if (!beacon)
4124 return -ENOMEM;
9bdf5eca 4125 mutex_lock(&priv->mutex);
9d139c81 4126 rc = iwl3945_mac_beacon_update(hw, beacon);
9bdf5eca 4127 mutex_unlock(&priv->mutex);
9d139c81
JB
4128 if (rc)
4129 return rc;
4130 }
4131
775a6e27 4132 if (!iwl_is_alive(priv))
5a66926a
ZY
4133 return -EAGAIN;
4134
b481de9c
ZY
4135 mutex_lock(&priv->mutex);
4136
b481de9c 4137 if (conf->bssid)
e1623446 4138 IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
b481de9c 4139
4150c572
JB
4140/*
4141 * very dubious code was here; the probe filtering flag is never set:
4142 *
b481de9c
ZY
4143 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
4144 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 4145 */
b481de9c 4146
05c914fe 4147 if (priv->iw_mode == NL80211_IFTYPE_AP) {
b481de9c
ZY
4148 if (!conf->bssid) {
4149 conf->bssid = priv->mac_addr;
4150 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
e1623446 4151 IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
e174961c 4152 conf->bssid);
b481de9c
ZY
4153 }
4154 if (priv->ibss_beacon)
4155 dev_kfree_skb(priv->ibss_beacon);
4156
9d139c81 4157 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
b481de9c
ZY
4158 }
4159
775a6e27 4160 if (iwl_is_rfkill(priv))
fde3571f
MA
4161 goto done;
4162
b481de9c
ZY
4163 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
4164 !is_multicast_ether_addr(conf->bssid)) {
4165 /* If there is currently a HW scan going on in the background
4166 * then we need to cancel it else the RXON below will fail. */
af0053d6 4167 if (iwl_scan_cancel_timeout(priv, 100)) {
39aadf8c 4168 IWL_WARN(priv, "Aborted scan still in progress "
b481de9c 4169 "after 100ms\n");
e1623446 4170 IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
b481de9c
ZY
4171 mutex_unlock(&priv->mutex);
4172 return -EAGAIN;
4173 }
8ccde88a 4174 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
b481de9c
ZY
4175
4176 /* TODO: Audit driver for usage of these members and see
4177 * if mac80211 deprecates them (priv->bssid looks like it
4178 * shouldn't be there, but I haven't scanned the IBSS code
4179 * to verify) - jpk */
4180 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
4181
05c914fe 4182 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4183 iwl3945_config_ap(priv);
b481de9c 4184 else {
bb8c093b 4185 rc = iwl3945_commit_rxon(priv);
05c914fe 4186 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
bb8c093b 4187 iwl3945_add_station(priv,
8ccde88a 4188 priv->active_rxon.bssid_addr, 1, 0);
b481de9c
ZY
4189 }
4190
4191 } else {
af0053d6 4192 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4193 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4194 iwl3945_commit_rxon(priv);
b481de9c
ZY
4195 }
4196
fde3571f 4197 done:
e1623446 4198 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4199 mutex_unlock(&priv->mutex);
4200
4201 return 0;
4202}
4203
bb8c093b 4204static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
4205 struct ieee80211_if_init_conf *conf)
4206{
4a8a4322 4207 struct iwl_priv *priv = hw->priv;
b481de9c 4208
e1623446 4209 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c
ZY
4210
4211 mutex_lock(&priv->mutex);
6ef89d0a 4212
775a6e27 4213 if (iwl_is_ready_rf(priv)) {
af0053d6 4214 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4215 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
fde3571f
MA
4216 iwl3945_commit_rxon(priv);
4217 }
32bfd35d
JB
4218 if (priv->vif == conf->vif) {
4219 priv->vif = NULL;
b481de9c 4220 memset(priv->bssid, 0, ETH_ALEN);
b481de9c
ZY
4221 }
4222 mutex_unlock(&priv->mutex);
4223
e1623446 4224 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4225}
4226
cd56d331
AK
4227#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
4228
4229static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
4230 struct ieee80211_vif *vif,
4231 struct ieee80211_bss_conf *bss_conf,
4232 u32 changes)
4233{
4a8a4322 4234 struct iwl_priv *priv = hw->priv;
cd56d331 4235
e1623446 4236 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
cd56d331
AK
4237
4238 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
e1623446 4239 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
cd56d331
AK
4240 bss_conf->use_short_preamble);
4241 if (bss_conf->use_short_preamble)
8ccde88a 4242 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331 4243 else
8ccde88a
SO
4244 priv->staging_rxon.flags &=
4245 ~RXON_FLG_SHORT_PREAMBLE_MSK;
cd56d331
AK
4246 }
4247
4248 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
e1623446
TW
4249 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n",
4250 bss_conf->use_cts_prot);
cd56d331 4251 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
8ccde88a 4252 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
cd56d331 4253 else
8ccde88a 4254 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
cd56d331
AK
4255 }
4256
4257 if (changes & BSS_CHANGED_ASSOC) {
e1623446 4258 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
cd56d331
AK
4259 /* This should never happen as this function should
4260 * never be called from interrupt context. */
4261 if (WARN_ON_ONCE(in_interrupt()))
4262 return;
4263 if (bss_conf->assoc) {
4264 priv->assoc_id = bss_conf->aid;
4265 priv->beacon_int = bss_conf->beacon_int;
28afaf91 4266 priv->timestamp = bss_conf->timestamp;
cd56d331 4267 priv->assoc_capability = bss_conf->assoc_capability;
3dae0c42 4268 priv->power_data.dtim_period = bss_conf->dtim_period;
cd56d331
AK
4269 priv->next_scan_jiffies = jiffies +
4270 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
4271 mutex_lock(&priv->mutex);
4272 iwl3945_post_associate(priv);
4273 mutex_unlock(&priv->mutex);
4274 } else {
4275 priv->assoc_id = 0;
e1623446
TW
4276 IWL_DEBUG_MAC80211(priv,
4277 "DISASSOC %d\n", bss_conf->assoc);
cd56d331 4278 }
8ccde88a 4279 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
e1623446
TW
4280 IWL_DEBUG_MAC80211(priv,
4281 "Associated Changes %d\n", changes);
cd56d331
AK
4282 iwl3945_send_rxon_assoc(priv);
4283 }
4284
4285}
4286
bb8c093b 4287static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d
JB
4288 struct ieee80211_vif *vif,
4289 struct ieee80211_sta *sta,
4290 struct ieee80211_key_conf *key)
b481de9c 4291{
4a8a4322 4292 struct iwl_priv *priv = hw->priv;
dc822b5d 4293 const u8 *addr;
42986796 4294 int ret;
b481de9c
ZY
4295 u8 sta_id;
4296
e1623446 4297 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4298
df878d8f 4299 if (iwl3945_mod_params.sw_crypto) {
e1623446 4300 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
b481de9c
ZY
4301 return -EOPNOTSUPP;
4302 }
4303
42986796 4304 addr = sta ? sta->addr : iwl_bcast_addr;
bb8c093b 4305 sta_id = iwl3945_hw_find_station(priv, addr);
b481de9c 4306 if (sta_id == IWL_INVALID_STATION) {
e1623446 4307 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
e174961c 4308 addr);
b481de9c
ZY
4309 return -EINVAL;
4310 }
4311
4312 mutex_lock(&priv->mutex);
4313
af0053d6 4314 iwl_scan_cancel_timeout(priv, 100);
15e869d8 4315
b481de9c
ZY
4316 switch (cmd) {
4317 case SET_KEY:
42986796
WT
4318 ret = iwl3945_update_sta_key_info(priv, key, sta_id);
4319 if (!ret) {
8ccde88a 4320 iwl_set_rxon_hwcrypto(priv, 1);
bb8c093b 4321 iwl3945_commit_rxon(priv);
b481de9c 4322 key->hw_key_idx = sta_id;
e1623446
TW
4323 IWL_DEBUG_MAC80211(priv,
4324 "set_key success, using hwcrypto\n");
b481de9c
ZY
4325 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4326 }
4327 break;
4328 case DISABLE_KEY:
42986796
WT
4329 ret = iwl3945_clear_sta_key_info(priv, sta_id);
4330 if (!ret) {
8ccde88a 4331 iwl_set_rxon_hwcrypto(priv, 0);
bb8c093b 4332 iwl3945_commit_rxon(priv);
e1623446 4333 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
b481de9c
ZY
4334 }
4335 break;
4336 default:
42986796 4337 ret = -EINVAL;
b481de9c
ZY
4338 }
4339
e1623446 4340 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4341 mutex_unlock(&priv->mutex);
4342
42986796 4343 return ret;
b481de9c
ZY
4344}
4345
e100bb64 4346static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
4347 const struct ieee80211_tx_queue_params *params)
4348{
4a8a4322 4349 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4350 unsigned long flags;
4351 int q;
b481de9c 4352
e1623446 4353 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4354
775a6e27 4355 if (!iwl_is_ready_rf(priv)) {
e1623446 4356 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4357 return -EIO;
4358 }
4359
4360 if (queue >= AC_NUM) {
e1623446 4361 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
b481de9c
ZY
4362 return 0;
4363 }
4364
b481de9c
ZY
4365 q = AC_NUM - 1 - queue;
4366
4367 spin_lock_irqsave(&priv->lock, flags);
4368
4369 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
4370 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
4371 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4372 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 4373 cpu_to_le16((params->txop * 32));
b481de9c
ZY
4374
4375 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4376 priv->qos_data.qos_active = 1;
4377
4378 spin_unlock_irqrestore(&priv->lock, flags);
4379
4380 mutex_lock(&priv->mutex);
05c914fe 4381 if (priv->iw_mode == NL80211_IFTYPE_AP)
bb8c093b 4382 iwl3945_activate_qos(priv, 1);
8ccde88a 4383 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 4384 iwl3945_activate_qos(priv, 0);
b481de9c
ZY
4385
4386 mutex_unlock(&priv->mutex);
4387
e1623446 4388 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4389 return 0;
4390}
4391
bb8c093b 4392static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
4393 struct ieee80211_tx_queue_stats *stats)
4394{
4a8a4322 4395 struct iwl_priv *priv = hw->priv;
b481de9c 4396 int i, avail;
188cf6c7 4397 struct iwl_tx_queue *txq;
d20b3c65 4398 struct iwl_queue *q;
b481de9c
ZY
4399 unsigned long flags;
4400
e1623446 4401 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4402
775a6e27 4403 if (!iwl_is_ready_rf(priv)) {
e1623446 4404 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4405 return -EIO;
4406 }
4407
4408 spin_lock_irqsave(&priv->lock, flags);
4409
4410 for (i = 0; i < AC_NUM; i++) {
188cf6c7 4411 txq = &priv->txq[i];
b481de9c 4412 q = &txq->q;
d20b3c65 4413 avail = iwl_queue_space(q);
b481de9c 4414
57ffc589
JB
4415 stats[i].len = q->n_window - avail;
4416 stats[i].limit = q->n_window - q->high_mark;
4417 stats[i].count = q->n_window;
b481de9c
ZY
4418
4419 }
4420 spin_unlock_irqrestore(&priv->lock, flags);
4421
e1623446 4422 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4423
4424 return 0;
4425}
4426
bb8c093b 4427static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 4428{
4a8a4322 4429 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4430 unsigned long flags;
4431
4432 mutex_lock(&priv->mutex);
e1623446 4433 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4434
775a6e27 4435 iwl_reset_qos(priv);
292ae174 4436
b481de9c
ZY
4437 spin_lock_irqsave(&priv->lock, flags);
4438 priv->assoc_id = 0;
4439 priv->assoc_capability = 0;
b481de9c
ZY
4440
4441 /* new association get rid of ibss beacon skb */
4442 if (priv->ibss_beacon)
4443 dev_kfree_skb(priv->ibss_beacon);
4444
4445 priv->ibss_beacon = NULL;
4446
4447 priv->beacon_int = priv->hw->conf.beacon_int;
28afaf91 4448 priv->timestamp = 0;
05c914fe 4449 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
b481de9c
ZY
4450 priv->beacon_int = 0;
4451
4452 spin_unlock_irqrestore(&priv->lock, flags);
4453
775a6e27 4454 if (!iwl_is_ready_rf(priv)) {
e1623446 4455 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
fde3571f
MA
4456 mutex_unlock(&priv->mutex);
4457 return;
4458 }
4459
15e869d8
MA
4460 /* we are restarting association process
4461 * clear RXON_FILTER_ASSOC_MSK bit
4462 */
05c914fe 4463 if (priv->iw_mode != NL80211_IFTYPE_AP) {
af0053d6 4464 iwl_scan_cancel_timeout(priv, 100);
8ccde88a 4465 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4466 iwl3945_commit_rxon(priv);
15e869d8
MA
4467 }
4468
b481de9c 4469 /* Per mac80211.h: This is only used in IBSS mode... */
05c914fe 4470 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
15e869d8 4471
e1623446 4472 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
b481de9c
ZY
4473 mutex_unlock(&priv->mutex);
4474 return;
b481de9c
ZY
4475 }
4476
8ccde88a 4477 iwl_set_rate(priv);
b481de9c
ZY
4478
4479 mutex_unlock(&priv->mutex);
4480
e1623446 4481 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4482
4483}
4484
e039fa4a 4485static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 4486{
4a8a4322 4487 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
4488 unsigned long flags;
4489
e1623446 4490 IWL_DEBUG_MAC80211(priv, "enter\n");
b481de9c 4491
775a6e27 4492 if (!iwl_is_ready_rf(priv)) {
e1623446 4493 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
b481de9c
ZY
4494 return -EIO;
4495 }
4496
05c914fe 4497 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
e1623446 4498 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
b481de9c
ZY
4499 return -EIO;
4500 }
4501
4502 spin_lock_irqsave(&priv->lock, flags);
4503
4504 if (priv->ibss_beacon)
4505 dev_kfree_skb(priv->ibss_beacon);
4506
4507 priv->ibss_beacon = skb;
4508
4509 priv->assoc_id = 0;
4510
e1623446 4511 IWL_DEBUG_MAC80211(priv, "leave\n");
b481de9c
ZY
4512 spin_unlock_irqrestore(&priv->lock, flags);
4513
775a6e27 4514 iwl_reset_qos(priv);
b481de9c 4515
dc4b1e7d 4516 iwl3945_post_associate(priv);
b481de9c 4517
b481de9c
ZY
4518
4519 return 0;
4520}
4521
4522/*****************************************************************************
4523 *
4524 * sysfs attributes
4525 *
4526 *****************************************************************************/
4527
d08853a3 4528#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4529
4530/*
4531 * The following adds a new attribute to the sysfs representation
4532 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
4533 * used for controlling the debug level.
4534 *
4535 * See the level definitions in iwl for details.
4536 */
40b8ec0b
SO
4537static ssize_t show_debug_level(struct device *d,
4538 struct device_attribute *attr, char *buf)
b481de9c 4539{
4a8a4322 4540 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4541
4542 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 4543}
40b8ec0b
SO
4544static ssize_t store_debug_level(struct device *d,
4545 struct device_attribute *attr,
b481de9c
ZY
4546 const char *buf, size_t count)
4547{
4a8a4322 4548 struct iwl_priv *priv = d->driver_data;
40b8ec0b
SO
4549 unsigned long val;
4550 int ret;
b481de9c 4551
40b8ec0b
SO
4552 ret = strict_strtoul(buf, 0, &val);
4553 if (ret)
978785a3 4554 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
b481de9c 4555 else
40b8ec0b 4556 priv->debug_level = val;
b481de9c
ZY
4557
4558 return strnlen(buf, count);
4559}
4560
40b8ec0b
SO
4561static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
4562 show_debug_level, store_debug_level);
b481de9c 4563
d08853a3 4564#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 4565
b481de9c
ZY
4566static ssize_t show_temperature(struct device *d,
4567 struct device_attribute *attr, char *buf)
4568{
4a8a4322 4569 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4570
775a6e27 4571 if (!iwl_is_alive(priv))
b481de9c
ZY
4572 return -EAGAIN;
4573
bb8c093b 4574 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
b481de9c
ZY
4575}
4576
4577static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
4578
b481de9c
ZY
4579static ssize_t show_tx_power(struct device *d,
4580 struct device_attribute *attr, char *buf)
4581{
4a8a4322 4582 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
62ea9c5b 4583 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
4584}
4585
4586static ssize_t store_tx_power(struct device *d,
4587 struct device_attribute *attr,
4588 const char *buf, size_t count)
4589{
4a8a4322 4590 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4591 char *p = (char *)buf;
4592 u32 val;
4593
4594 val = simple_strtoul(p, &p, 10);
4595 if (p == buf)
978785a3 4596 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
b481de9c 4597 else
bb8c093b 4598 iwl3945_hw_reg_set_txpower(priv, val);
b481de9c
ZY
4599
4600 return count;
4601}
4602
4603static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
4604
4605static ssize_t show_flags(struct device *d,
4606 struct device_attribute *attr, char *buf)
4607{
4a8a4322 4608 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 4609
8ccde88a 4610 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
b481de9c
ZY
4611}
4612
4613static ssize_t store_flags(struct device *d,
4614 struct device_attribute *attr,
4615 const char *buf, size_t count)
4616{
4a8a4322 4617 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4618 u32 flags = simple_strtoul(buf, NULL, 0);
4619
4620 mutex_lock(&priv->mutex);
8ccde88a 4621 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
b481de9c 4622 /* Cancel any currently running scans... */
af0053d6 4623 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4624 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4625 else {
e1623446 4626 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
b481de9c 4627 flags);
8ccde88a 4628 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 4629 iwl3945_commit_rxon(priv);
b481de9c
ZY
4630 }
4631 }
4632 mutex_unlock(&priv->mutex);
4633
4634 return count;
4635}
4636
4637static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
4638
4639static ssize_t show_filter_flags(struct device *d,
4640 struct device_attribute *attr, char *buf)
4641{
4a8a4322 4642 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4643
4644 return sprintf(buf, "0x%04X\n",
8ccde88a 4645 le32_to_cpu(priv->active_rxon.filter_flags));
b481de9c
ZY
4646}
4647
4648static ssize_t store_filter_flags(struct device *d,
4649 struct device_attribute *attr,
4650 const char *buf, size_t count)
4651{
4a8a4322 4652 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
4653 u32 filter_flags = simple_strtoul(buf, NULL, 0);
4654
4655 mutex_lock(&priv->mutex);
8ccde88a 4656 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
b481de9c 4657 /* Cancel any currently running scans... */
af0053d6 4658 if (iwl_scan_cancel_timeout(priv, 100))
39aadf8c 4659 IWL_WARN(priv, "Could not cancel scan.\n");
b481de9c 4660 else {
e1623446 4661 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
b481de9c 4662 "0x%04X\n", filter_flags);
8ccde88a 4663 priv->staging_rxon.filter_flags =
b481de9c 4664 cpu_to_le32(filter_flags);
bb8c093b 4665 iwl3945_commit_rxon(priv);
b481de9c
ZY
4666 }
4667 }
4668 mutex_unlock(&priv->mutex);
4669
4670 return count;
4671}
4672
4673static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
4674 store_filter_flags);
4675
c8b0e6e1 4676#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
4677
4678static ssize_t show_measurement(struct device *d,
4679 struct device_attribute *attr, char *buf)
4680{
4a8a4322 4681 struct iwl_priv *priv = dev_get_drvdata(d);
600c0e11 4682 struct iwl_spectrum_notification measure_report;
b481de9c 4683 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3ac7f146 4684 u8 *data = (u8 *)&measure_report;
b481de9c
ZY
4685 unsigned long flags;
4686
4687 spin_lock_irqsave(&priv->lock, flags);
4688 if (!(priv->measurement_status & MEASUREMENT_READY)) {
4689 spin_unlock_irqrestore(&priv->lock, flags);
4690 return 0;
4691 }
4692 memcpy(&measure_report, &priv->measure_report, size);
4693 priv->measurement_status = 0;
4694 spin_unlock_irqrestore(&priv->lock, flags);
4695
4696 while (size && (PAGE_SIZE - len)) {
4697 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4698 PAGE_SIZE - len, 1);
4699 len = strlen(buf);
4700 if (PAGE_SIZE - len)
4701 buf[len++] = '\n';
4702
4703 ofs += 16;
4704 size -= min(size, 16U);
4705 }
4706
4707 return len;
4708}
4709
4710static ssize_t store_measurement(struct device *d,
4711 struct device_attribute *attr,
4712 const char *buf, size_t count)
4713{
4a8a4322 4714 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4715 struct ieee80211_measurement_params params = {
8ccde88a 4716 .channel = le16_to_cpu(priv->active_rxon.channel),
b481de9c
ZY
4717 .start_time = cpu_to_le64(priv->last_tsf),
4718 .duration = cpu_to_le16(1),
4719 };
4720 u8 type = IWL_MEASURE_BASIC;
4721 u8 buffer[32];
4722 u8 channel;
4723
4724 if (count) {
4725 char *p = buffer;
4726 strncpy(buffer, buf, min(sizeof(buffer), count));
4727 channel = simple_strtoul(p, NULL, 0);
4728 if (channel)
4729 params.channel = channel;
4730
4731 p = buffer;
4732 while (*p && *p != ' ')
4733 p++;
4734 if (*p)
4735 type = simple_strtoul(p + 1, NULL, 0);
4736 }
4737
e1623446 4738 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
b481de9c 4739 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 4740 iwl3945_get_measurement(priv, &params, type);
b481de9c
ZY
4741
4742 return count;
4743}
4744
4745static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
4746 show_measurement, store_measurement);
c8b0e6e1 4747#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
b481de9c 4748
b481de9c
ZY
4749static ssize_t store_retry_rate(struct device *d,
4750 struct device_attribute *attr,
4751 const char *buf, size_t count)
4752{
4a8a4322 4753 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4754
4755 priv->retry_rate = simple_strtoul(buf, NULL, 0);
4756 if (priv->retry_rate <= 0)
4757 priv->retry_rate = 1;
4758
4759 return count;
4760}
4761
4762static ssize_t show_retry_rate(struct device *d,
4763 struct device_attribute *attr, char *buf)
4764{
4a8a4322 4765 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
4766 return sprintf(buf, "%d", priv->retry_rate);
4767}
4768
4769static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
4770 store_retry_rate);
4771
d25aabb0 4772
b481de9c
ZY
4773static ssize_t store_power_level(struct device *d,
4774 struct device_attribute *attr,
4775 const char *buf, size_t count)
4776{
4a8a4322 4777 struct iwl_priv *priv = dev_get_drvdata(d);
d25aabb0
WT
4778 int ret;
4779 unsigned long mode;
4780
b481de9c 4781
b481de9c
ZY
4782 mutex_lock(&priv->mutex);
4783
775a6e27 4784 if (!iwl_is_ready(priv)) {
d25aabb0 4785 ret = -EAGAIN;
b481de9c
ZY
4786 goto out;
4787 }
4788
d25aabb0
WT
4789 ret = strict_strtoul(buf, 10, &mode);
4790 if (ret)
4791 goto out;
b481de9c 4792
d25aabb0
WT
4793 ret = iwl_power_set_user_mode(priv, mode);
4794 if (ret) {
4795 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
4796 goto out;
b481de9c 4797 }
d25aabb0 4798 ret = count;
b481de9c
ZY
4799
4800 out:
4801 mutex_unlock(&priv->mutex);
d25aabb0 4802 return ret;
b481de9c
ZY
4803}
4804
d25aabb0
WT
4805static ssize_t show_power_level(struct device *d,
4806 struct device_attribute *attr, char *buf)
4807{
4808 struct iwl_priv *priv = dev_get_drvdata(d);
4809 int mode = priv->power_data.user_power_setting;
4810 int system = priv->power_data.system_power_setting;
4811 int level = priv->power_data.power_mode;
4812 char *p = buf;
4813
4814 switch (system) {
4815 case IWL_POWER_SYS_AUTO:
4816 p += sprintf(p, "SYSTEM:auto");
4817 break;
4818 case IWL_POWER_SYS_AC:
4819 p += sprintf(p, "SYSTEM:ac");
4820 break;
4821 case IWL_POWER_SYS_BATTERY:
4822 p += sprintf(p, "SYSTEM:battery");
4823 break;
4824 }
4825
4826 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
4827 "fixed" : "auto");
4828 p += sprintf(p, "\tINDEX:%d", level);
4829 p += sprintf(p, "\n");
4830 return p - buf + 1;
4831}
4832
4833static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
4834 show_power_level, store_power_level);
4835
b481de9c
ZY
4836#define MAX_WX_STRING 80
4837
4838/* Values are in microsecond */
4839static const s32 timeout_duration[] = {
4840 350000,
4841 250000,
4842 75000,
4843 37000,
4844 25000,
4845};
4846static const s32 period_duration[] = {
4847 400000,
4848 700000,
4849 1000000,
4850 1000000,
4851 1000000
4852};
4853
b481de9c
ZY
4854static ssize_t show_channels(struct device *d,
4855 struct device_attribute *attr, char *buf)
4856{
8318d78a
JB
4857 /* all this shit doesn't belong into sysfs anyway */
4858 return 0;
b481de9c
ZY
4859}
4860
4861static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
4862
4863static ssize_t show_statistics(struct device *d,
4864 struct device_attribute *attr, char *buf)
4865{
4a8a4322 4866 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 4867 u32 size = sizeof(struct iwl3945_notif_statistics);
b481de9c 4868 u32 len = 0, ofs = 0;
f2c7e521 4869 u8 *data = (u8 *)&priv->statistics_39;
b481de9c
ZY
4870 int rc = 0;
4871
775a6e27 4872 if (!iwl_is_alive(priv))
b481de9c
ZY
4873 return -EAGAIN;
4874
4875 mutex_lock(&priv->mutex);
17f841cd 4876 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
4877 mutex_unlock(&priv->mutex);
4878
4879 if (rc) {
4880 len = sprintf(buf,
4881 "Error sending statistics request: 0x%08X\n", rc);
4882 return len;
4883 }
4884
4885 while (size && (PAGE_SIZE - len)) {
4886 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
4887 PAGE_SIZE - len, 1);
4888 len = strlen(buf);
4889 if (PAGE_SIZE - len)
4890 buf[len++] = '\n';
4891
4892 ofs += 16;
4893 size -= min(size, 16U);
4894 }
4895
4896 return len;
4897}
4898
4899static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4900
4901static ssize_t show_antenna(struct device *d,
4902 struct device_attribute *attr, char *buf)
4903{
4a8a4322 4904 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 4905
775a6e27 4906 if (!iwl_is_alive(priv))
b481de9c
ZY
4907 return -EAGAIN;
4908
7e4bca5e 4909 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
b481de9c
ZY
4910}
4911
4912static ssize_t store_antenna(struct device *d,
4913 struct device_attribute *attr,
4914 const char *buf, size_t count)
4915{
7530f85f 4916 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
b481de9c 4917 int ant;
b481de9c
ZY
4918
4919 if (count == 0)
4920 return 0;
4921
4922 if (sscanf(buf, "%1i", &ant) != 1) {
e1623446 4923 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
b481de9c
ZY
4924 return count;
4925 }
4926
4927 if ((ant >= 0) && (ant <= 2)) {
e1623446 4928 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
7e4bca5e 4929 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
b481de9c 4930 } else
e1623446 4931 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
b481de9c
ZY
4932
4933
4934 return count;
4935}
4936
4937static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
4938
4939static ssize_t show_status(struct device *d,
4940 struct device_attribute *attr, char *buf)
4941{
4a8a4322 4942 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
775a6e27 4943 if (!iwl_is_alive(priv))
b481de9c
ZY
4944 return -EAGAIN;
4945 return sprintf(buf, "0x%08x\n", (int)priv->status);
4946}
4947
4948static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4949
4950static ssize_t dump_error_log(struct device *d,
4951 struct device_attribute *attr,
4952 const char *buf, size_t count)
4953{
4954 char *p = (char *)buf;
4955
4956 if (p[0] == '1')
4a8a4322 4957 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4958
4959 return strnlen(buf, count);
4960}
4961
4962static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
4963
4964static ssize_t dump_event_log(struct device *d,
4965 struct device_attribute *attr,
4966 const char *buf, size_t count)
4967{
4968 char *p = (char *)buf;
4969
4970 if (p[0] == '1')
4a8a4322 4971 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
4972
4973 return strnlen(buf, count);
4974}
4975
4976static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
4977
4978/*****************************************************************************
4979 *
a96a27f9 4980 * driver setup and tear down
b481de9c
ZY
4981 *
4982 *****************************************************************************/
4983
4a8a4322 4984static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
b481de9c 4985{
d21050c7 4986 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
b481de9c
ZY
4987
4988 init_waitqueue_head(&priv->wait_command_queue);
4989
bb8c093b
CH
4990 INIT_WORK(&priv->up, iwl3945_bg_up);
4991 INIT_WORK(&priv->restart, iwl3945_bg_restart);
4992 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
c0af96a6 4993 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
bb8c093b 4994 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
bb8c093b
CH
4995 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
4996 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
2663516d 4997 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
77fecfb8
SO
4998 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4999 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
5000 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
5001 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
bb8c093b
CH
5002
5003 iwl3945_hw_setup_deferred_work(priv);
b481de9c
ZY
5004
5005 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 5006 iwl3945_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
5007}
5008
4a8a4322 5009static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 5010{
bb8c093b 5011 iwl3945_hw_cancel_deferred_work(priv);
b481de9c 5012
e47eb6ad 5013 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
5014 cancel_delayed_work(&priv->scan_check);
5015 cancel_delayed_work(&priv->alive_start);
b481de9c
ZY
5016 cancel_work_sync(&priv->beacon_update);
5017}
5018
bb8c093b 5019static struct attribute *iwl3945_sysfs_entries[] = {
b481de9c
ZY
5020 &dev_attr_antenna.attr,
5021 &dev_attr_channels.attr,
5022 &dev_attr_dump_errors.attr,
5023 &dev_attr_dump_events.attr,
5024 &dev_attr_flags.attr,
5025 &dev_attr_filter_flags.attr,
c8b0e6e1 5026#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
b481de9c
ZY
5027 &dev_attr_measurement.attr,
5028#endif
5029 &dev_attr_power_level.attr,
b481de9c 5030 &dev_attr_retry_rate.attr,
b481de9c
ZY
5031 &dev_attr_statistics.attr,
5032 &dev_attr_status.attr,
5033 &dev_attr_temperature.attr,
b481de9c 5034 &dev_attr_tx_power.attr,
d08853a3 5035#ifdef CONFIG_IWLWIFI_DEBUG
40b8ec0b
SO
5036 &dev_attr_debug_level.attr,
5037#endif
b481de9c
ZY
5038 NULL
5039};
5040
bb8c093b 5041static struct attribute_group iwl3945_attribute_group = {
b481de9c 5042 .name = NULL, /* put in device directory */
bb8c093b 5043 .attrs = iwl3945_sysfs_entries,
b481de9c
ZY
5044};
5045
bb8c093b
CH
5046static struct ieee80211_ops iwl3945_hw_ops = {
5047 .tx = iwl3945_mac_tx,
5048 .start = iwl3945_mac_start,
5049 .stop = iwl3945_mac_stop,
5050 .add_interface = iwl3945_mac_add_interface,
5051 .remove_interface = iwl3945_mac_remove_interface,
5052 .config = iwl3945_mac_config,
5053 .config_interface = iwl3945_mac_config_interface,
8ccde88a 5054 .configure_filter = iwl_configure_filter,
bb8c093b 5055 .set_key = iwl3945_mac_set_key,
bb8c093b
CH
5056 .get_tx_stats = iwl3945_mac_get_tx_stats,
5057 .conf_tx = iwl3945_mac_conf_tx,
bb8c093b 5058 .reset_tsf = iwl3945_mac_reset_tsf,
cd56d331 5059 .bss_info_changed = iwl3945_bss_info_changed,
e9dde6f6 5060 .hw_scan = iwl_mac_hw_scan
b481de9c
ZY
5061};
5062
e52119c5 5063static int iwl3945_init_drv(struct iwl_priv *priv)
90a30a02
KA
5064{
5065 int ret;
e6148917 5066 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
90a30a02
KA
5067
5068 priv->retry_rate = 1;
5069 priv->ibss_beacon = NULL;
5070
5071 spin_lock_init(&priv->lock);
3dae0c42 5072 spin_lock_init(&priv->power_data.lock);
90a30a02
KA
5073 spin_lock_init(&priv->sta_lock);
5074 spin_lock_init(&priv->hcmd_lock);
5075
5076 INIT_LIST_HEAD(&priv->free_frames);
5077
5078 mutex_init(&priv->mutex);
5079
5080 /* Clear the driver's (not device's) station table */
5081 iwl3945_clear_stations_table(priv);
5082
5083 priv->data_retry_limit = -1;
5084 priv->ieee_channels = NULL;
5085 priv->ieee_rates = NULL;
5086 priv->band = IEEE80211_BAND_2GHZ;
5087
5088 priv->iw_mode = NL80211_IFTYPE_STATION;
5089
5090 iwl_reset_qos(priv);
5091
5092 priv->qos_data.qos_active = 0;
5093 priv->qos_data.qos_cap.val = 0;
5094
5095 priv->rates_mask = IWL_RATES_MASK;
d25aabb0
WT
5096 /* If power management is turned on, default to CAM mode */
5097 priv->power_mode = IWL_POWER_MODE_CAM;
62ea9c5b 5098 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
90a30a02 5099
e6148917
SO
5100 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
5101 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
5102 eeprom->version);
5103 ret = -EINVAL;
5104 goto err;
5105 }
5106 ret = iwl_init_channel_map(priv);
90a30a02
KA
5107 if (ret) {
5108 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
5109 goto err;
5110 }
5111
e6148917
SO
5112 /* Set up txpower settings in driver for all channels */
5113 if (iwl3945_txpower_set_from_eeprom(priv)) {
5114 ret = -EIO;
5115 goto err_free_channel_map;
5116 }
5117
534166de 5118 ret = iwlcore_init_geos(priv);
90a30a02
KA
5119 if (ret) {
5120 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
5121 goto err_free_channel_map;
5122 }
534166de
SO
5123 iwl3945_init_hw_rates(priv, priv->ieee_rates);
5124
5125 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5126 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5127 &priv->bands[IEEE80211_BAND_2GHZ];
5128 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5129 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5130 &priv->bands[IEEE80211_BAND_5GHZ];
90a30a02
KA
5131
5132 return 0;
5133
5134err_free_channel_map:
e6148917 5135 iwl_free_channel_map(priv);
90a30a02
KA
5136err:
5137 return ret;
5138}
5139
bb8c093b 5140static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
5141{
5142 int err = 0;
4a8a4322 5143 struct iwl_priv *priv;
b481de9c 5144 struct ieee80211_hw *hw;
c0f20d91 5145 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
e6148917 5146 struct iwl3945_eeprom *eeprom;
0359facc 5147 unsigned long flags;
b481de9c 5148
cee53ddb
KA
5149 /***********************
5150 * 1. Allocating HW data
5151 * ********************/
5152
b481de9c
ZY
5153 /* mac80211 allocates memory for this device instance, including
5154 * space for this driver's private structure */
90a30a02 5155 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
b481de9c 5156 if (hw == NULL) {
a3139c59 5157 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
b481de9c
ZY
5158 err = -ENOMEM;
5159 goto out;
5160 }
b481de9c 5161 priv = hw->priv;
90a30a02 5162 SET_IEEE80211_DEV(hw, &pdev->dev);
6440adb5 5163
df878d8f
KA
5164 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
5165 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
15b1687c
WT
5166 IWL_ERR(priv,
5167 "invalid queues_num, should be between %d and %d\n",
5168 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
a3139c59
SO
5169 err = -EINVAL;
5170 goto out;
5171 }
5172
90a30a02
KA
5173 /*
5174 * Disabling hardware scan means that mac80211 will perform scans
5175 * "the hard way", rather than using device's scan.
5176 */
df878d8f 5177 if (iwl3945_mod_params.disable_hw_scan) {
e1623446 5178 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
40b8ec0b
SO
5179 iwl3945_hw_ops.hw_scan = NULL;
5180 }
5181
90a30a02 5182
e1623446 5183 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
90a30a02
KA
5184 priv->cfg = cfg;
5185 priv->pci_dev = pdev;
cee53ddb 5186
d08853a3 5187#ifdef CONFIG_IWLWIFI_DEBUG
df878d8f 5188 priv->debug_level = iwl3945_mod_params.debug;
b481de9c
ZY
5189 atomic_set(&priv->restrict_refcnt, 0);
5190#endif
90a30a02
KA
5191 hw->rate_control_algorithm = "iwl-3945-rs";
5192 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
5193
566bfe5a 5194 /* Tell mac80211 our characteristics */
605a0bd6 5195 hw->flags = IEEE80211_HW_SIGNAL_DBM |
566bfe5a 5196 IEEE80211_HW_NOISE_DBM;
b481de9c 5197
f59ac048 5198 hw->wiphy->interface_modes =
f59ac048
LR
5199 BIT(NL80211_IFTYPE_STATION) |
5200 BIT(NL80211_IFTYPE_ADHOC);
5201
2a44f911 5202 hw->wiphy->custom_regulatory = true;
ea4a82dc 5203
2a519311
JB
5204 hw->wiphy->max_scan_ssids = 1;
5205
6440adb5 5206 /* 4 EDCA QOS priorities */
b481de9c
ZY
5207 hw->queues = 4;
5208
cee53ddb
KA
5209 /***************************
5210 * 2. Initializing PCI bus
5211 * *************************/
b481de9c
ZY
5212 if (pci_enable_device(pdev)) {
5213 err = -ENODEV;
5214 goto out_ieee80211_free_hw;
5215 }
5216
5217 pci_set_master(pdev);
5218
b481de9c
ZY
5219 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
5220 if (!err)
5221 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
5222 if (err) {
978785a3 5223 IWL_WARN(priv, "No suitable DMA available.\n");
b481de9c
ZY
5224 goto out_pci_disable_device;
5225 }
5226
5227 pci_set_drvdata(pdev, priv);
5228 err = pci_request_regions(pdev, DRV_NAME);
5229 if (err)
5230 goto out_pci_disable_device;
6440adb5 5231
cee53ddb
KA
5232 /***********************
5233 * 3. Read REV Register
5234 * ********************/
b481de9c
ZY
5235 priv->hw_base = pci_iomap(pdev, 0, 0);
5236 if (!priv->hw_base) {
5237 err = -ENODEV;
5238 goto out_pci_release_regions;
5239 }
5240
e1623446 5241 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
b481de9c 5242 (unsigned long long) pci_resource_len(pdev, 0));
e1623446 5243 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
b481de9c 5244
cee53ddb
KA
5245 /* We disable the RETRY_TIMEOUT register (0x41) to keep
5246 * PCI Tx retries from interfering with C3 CPU state */
5247 pci_write_config_byte(pdev, 0x41, 0x00);
b481de9c 5248
90a30a02
KA
5249 /* amp init */
5250 err = priv->cfg->ops->lib->apm_ops.init(priv);
cee53ddb 5251 if (err < 0) {
e1623446 5252 IWL_DEBUG_INFO(priv, "Failed to init APMG\n");
90a30a02 5253 goto out_iounmap;
cee53ddb 5254 }
b481de9c 5255
cee53ddb
KA
5256 /***********************
5257 * 4. Read EEPROM
5258 * ********************/
90a30a02 5259
cee53ddb 5260 /* Read the EEPROM */
e6148917 5261 err = iwl_eeprom_init(priv);
cee53ddb 5262 if (err) {
15b1687c 5263 IWL_ERR(priv, "Unable to init EEPROM\n");
cee53ddb
KA
5264 goto out_remove_sysfs;
5265 }
5266 /* MAC Address location in EEPROM same for 3945/4965 */
e6148917
SO
5267 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
5268 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
e1623446 5269 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
cee53ddb 5270 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 5271
cee53ddb
KA
5272 /***********************
5273 * 5. Setup HW Constants
5274 * ********************/
b481de9c 5275 /* Device-specific setup */
3832ec9d 5276 if (iwl3945_hw_set_hw_params(priv)) {
15b1687c 5277 IWL_ERR(priv, "failed to set hw settings\n");
b481de9c
ZY
5278 goto out_iounmap;
5279 }
5280
cee53ddb
KA
5281 /***********************
5282 * 6. Setup priv
5283 * ********************/
cee53ddb 5284
90a30a02 5285 err = iwl3945_init_drv(priv);
b481de9c 5286 if (err) {
90a30a02
KA
5287 IWL_ERR(priv, "initializing driver failed\n");
5288 goto out_free_geos;
b481de9c
ZY
5289 }
5290
978785a3
TW
5291 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
5292 priv->cfg->name);
cee53ddb
KA
5293
5294 /***********************************
5295 * 7. Initialize Module Parameters
5296 * **********************************/
5297
5298 /* Initialize module parameter values here */
5299 /* Disable radio (SW RF KILL) via parameter when loading driver */
df878d8f 5300 if (iwl3945_mod_params.disable) {
cee53ddb 5301 set_bit(STATUS_RF_KILL_SW, &priv->status);
e1623446 5302 IWL_DEBUG_INFO(priv, "Radio disabled.\n");
849e0dce
RC
5303 }
5304
cee53ddb
KA
5305
5306 /***********************
5307 * 8. Setup Services
5308 * ********************/
5309
5310 spin_lock_irqsave(&priv->lock, flags);
5311 iwl3945_disable_interrupts(priv);
5312 spin_unlock_irqrestore(&priv->lock, flags);
5313
2663516d
HS
5314 pci_enable_msi(priv->pci_dev);
5315
5316 err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
5317 DRV_NAME, priv);
5318 if (err) {
5319 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
5320 goto out_disable_msi;
5321 }
5322
cee53ddb 5323 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5324 if (err) {
15b1687c 5325 IWL_ERR(priv, "failed to create sysfs device attributes\n");
90a30a02 5326 goto out_release_irq;
849e0dce 5327 }
849e0dce 5328
8ccde88a
SO
5329 iwl_set_rxon_channel(priv,
5330 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
cee53ddb
KA
5331 iwl3945_setup_deferred_work(priv);
5332 iwl3945_setup_rx_handlers(priv);
5333
cee53ddb 5334 /*********************************
2663516d 5335 * 9. Setup and Register mac80211
cee53ddb
KA
5336 * *******************************/
5337
5a66926a
ZY
5338 err = ieee80211_register_hw(priv->hw);
5339 if (err) {
15b1687c 5340 IWL_ERR(priv, "Failed to register network device: %d\n", err);
cee53ddb 5341 goto out_remove_sysfs;
5a66926a 5342 }
b481de9c 5343
5a66926a
ZY
5344 priv->hw->conf.beacon_int = 100;
5345 priv->mac80211_registered = 1;
cee53ddb 5346
c0af96a6 5347 err = iwl_rfkill_init(priv);
ebef2008 5348 if (err)
15b1687c 5349 IWL_ERR(priv, "Unable to initialize RFKILL system. "
ebef2008
AK
5350 "Ignoring error: %d\n", err);
5351
2663516d
HS
5352 /* Start monitoring the killswitch */
5353 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
5354 2 * HZ);
5355
b481de9c
ZY
5356 return 0;
5357
cee53ddb
KA
5358 out_remove_sysfs:
5359 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
849e0dce 5360 out_free_geos:
534166de 5361 iwlcore_free_geos(priv);
b481de9c
ZY
5362
5363 out_release_irq:
2663516d 5364 free_irq(priv->pci_dev->irq, priv);
b481de9c
ZY
5365 destroy_workqueue(priv->workqueue);
5366 priv->workqueue = NULL;
3832ec9d 5367 iwl3945_unset_hw_params(priv);
2663516d
HS
5368 out_disable_msi:
5369 pci_disable_msi(priv->pci_dev);
b481de9c
ZY
5370 out_iounmap:
5371 pci_iounmap(pdev, priv->hw_base);
5372 out_pci_release_regions:
5373 pci_release_regions(pdev);
5374 out_pci_disable_device:
5375 pci_disable_device(pdev);
5376 pci_set_drvdata(pdev, NULL);
5377 out_ieee80211_free_hw:
5378 ieee80211_free_hw(priv->hw);
5379 out:
5380 return err;
5381}
5382
c83dbf68 5383static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
b481de9c 5384{
4a8a4322 5385 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 5386 unsigned long flags;
b481de9c
ZY
5387
5388 if (!priv)
5389 return;
5390
e1623446 5391 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
b481de9c 5392
b481de9c 5393 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 5394
d552bfb6
KA
5395 if (priv->mac80211_registered) {
5396 ieee80211_unregister_hw(priv->hw);
5397 priv->mac80211_registered = 0;
5398 } else {
5399 iwl3945_down(priv);
5400 }
b481de9c 5401
0359facc
MA
5402 /* make sure we flush any pending irq or
5403 * tasklet for the driver
5404 */
5405 spin_lock_irqsave(&priv->lock, flags);
5406 iwl3945_disable_interrupts(priv);
5407 spin_unlock_irqrestore(&priv->lock, flags);
5408
5409 iwl_synchronize_irq(priv);
5410
bb8c093b 5411 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
b481de9c 5412
c0af96a6 5413 iwl_rfkill_unregister(priv);
2663516d
HS
5414 cancel_delayed_work(&priv->rfkill_poll);
5415
bb8c093b 5416 iwl3945_dealloc_ucode_pci(priv);
b481de9c
ZY
5417
5418 if (priv->rxq.bd)
51af3d3f 5419 iwl_rx_queue_free(priv, &priv->rxq);
bb8c093b 5420 iwl3945_hw_txq_ctx_free(priv);
b481de9c 5421
3832ec9d 5422 iwl3945_unset_hw_params(priv);
bb8c093b 5423 iwl3945_clear_stations_table(priv);
b481de9c 5424
6ef89d0a
MA
5425 /*netif_stop_queue(dev); */
5426 flush_workqueue(priv->workqueue);
5427
bb8c093b 5428 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
b481de9c
ZY
5429 * priv->workqueue... so we can't take down the workqueue
5430 * until now... */
5431 destroy_workqueue(priv->workqueue);
5432 priv->workqueue = NULL;
5433
2663516d
HS
5434 free_irq(pdev->irq, priv);
5435 pci_disable_msi(pdev);
5436
b481de9c
ZY
5437 pci_iounmap(pdev, priv->hw_base);
5438 pci_release_regions(pdev);
5439 pci_disable_device(pdev);
5440 pci_set_drvdata(pdev, NULL);
5441
e6148917 5442 iwl_free_channel_map(priv);
534166de 5443 iwlcore_free_geos(priv);
805cee5b 5444 kfree(priv->scan);
b481de9c
ZY
5445 if (priv->ibss_beacon)
5446 dev_kfree_skb(priv->ibss_beacon);
5447
5448 ieee80211_free_hw(priv->hw);
5449}
5450
5451#ifdef CONFIG_PM
5452
bb8c093b 5453static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 5454{
4a8a4322 5455 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 5456
e655b9f0
ZY
5457 if (priv->is_open) {
5458 set_bit(STATUS_IN_SUSPEND, &priv->status);
5459 iwl3945_mac_stop(priv->hw);
5460 priv->is_open = 1;
5461 }
2663516d
HS
5462 pci_save_state(pdev);
5463 pci_disable_device(pdev);
b481de9c
ZY
5464 pci_set_power_state(pdev, PCI_D3hot);
5465
b481de9c
ZY
5466 return 0;
5467}
5468
bb8c093b 5469static int iwl3945_pci_resume(struct pci_dev *pdev)
b481de9c 5470{
4a8a4322 5471 struct iwl_priv *priv = pci_get_drvdata(pdev);
450154e4 5472 int ret;
b481de9c 5473
b481de9c 5474 pci_set_power_state(pdev, PCI_D0);
450154e4
WT
5475 ret = pci_enable_device(pdev);
5476 if (ret)
5477 return ret;
2663516d 5478 pci_restore_state(pdev);
b481de9c 5479
e655b9f0
ZY
5480 if (priv->is_open)
5481 iwl3945_mac_start(priv->hw);
b481de9c 5482
e655b9f0 5483 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
5484 return 0;
5485}
5486
5487#endif /* CONFIG_PM */
5488
5489/*****************************************************************************
5490 *
5491 * driver and module entry point
5492 *
5493 *****************************************************************************/
5494
bb8c093b 5495static struct pci_driver iwl3945_driver = {
b481de9c 5496 .name = DRV_NAME,
bb8c093b
CH
5497 .id_table = iwl3945_hw_card_ids,
5498 .probe = iwl3945_pci_probe,
5499 .remove = __devexit_p(iwl3945_pci_remove),
b481de9c 5500#ifdef CONFIG_PM
bb8c093b
CH
5501 .suspend = iwl3945_pci_suspend,
5502 .resume = iwl3945_pci_resume,
b481de9c
ZY
5503#endif
5504};
5505
bb8c093b 5506static int __init iwl3945_init(void)
b481de9c
ZY
5507{
5508
5509 int ret;
5510 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
5511 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
5512
5513 ret = iwl3945_rate_control_register();
5514 if (ret) {
a3139c59
SO
5515 printk(KERN_ERR DRV_NAME
5516 "Unable to register rate control algorithm: %d\n", ret);
897e1cf2
RC
5517 return ret;
5518 }
5519
bb8c093b 5520 ret = pci_register_driver(&iwl3945_driver);
b481de9c 5521 if (ret) {
a3139c59 5522 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
897e1cf2 5523 goto error_register;
b481de9c 5524 }
b481de9c
ZY
5525
5526 return ret;
897e1cf2 5527
897e1cf2
RC
5528error_register:
5529 iwl3945_rate_control_unregister();
5530 return ret;
b481de9c
ZY
5531}
5532
bb8c093b 5533static void __exit iwl3945_exit(void)
b481de9c 5534{
bb8c093b 5535 pci_unregister_driver(&iwl3945_driver);
897e1cf2 5536 iwl3945_rate_control_unregister();
b481de9c
ZY
5537}
5538
a0987a8d 5539MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
25cb6cad 5540
df878d8f 5541module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
b481de9c 5542MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
df878d8f 5543module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
b481de9c 5544MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9c74d9fb
SO
5545module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
5546MODULE_PARM_DESC(swcrypto,
5547 "using software crypto (default 1 [software])\n");
df878d8f 5548module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
b481de9c 5549MODULE_PARM_DESC(debug, "debug output mask");
df878d8f 5550module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
b481de9c
ZY
5551MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
5552
df878d8f 5553module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
b481de9c
ZY
5554MODULE_PARM_DESC(queues_num, "number of hw queues.");
5555
af48d048
SO
5556module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
5557MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
5558
bb8c093b
CH
5559module_exit(iwl3945_exit);
5560module_init(iwl3945_init);
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