iwlwifi: Don't unlock priv->mutex if it isn't locked
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
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44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
b481de9c 49#include "iwl-4965.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
b481de9c 54
c79dd5b5 55static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 56 struct iwl4965_tx_queue *txq);
416e1438 57
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58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
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64/*
65 * module name, copyright, version, etc.
66 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
67 */
68
69#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
70
0a6857e7 71#ifdef CONFIG_IWLWIFI_DEBUG
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72#define VD "d"
73#else
74#define VD
75#endif
76
c8b0e6e1 77#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
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78#define VS "s"
79#else
80#define VS
81#endif
82
df48c323 83#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 84
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85
86MODULE_DESCRIPTION(DRV_DESCRIPTION);
87MODULE_VERSION(DRV_VERSION);
88MODULE_AUTHOR(DRV_COPYRIGHT);
89MODULE_LICENSE("GPL");
90
91__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
92{
93 u16 fc = le16_to_cpu(hdr->frame_control);
94 int hdr_len = ieee80211_get_hdrlen(fc);
95
96 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
97 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
98 return NULL;
99}
100
8318d78a 101static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
c79dd5b5 102 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 103{
8318d78a 104 return priv->hw->wiphy->bands[band];
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105}
106
bb8c093b 107static int iwl4965_is_empty_essid(const char *essid, int essid_len)
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108{
109 /* Single white space is for Linksys APs */
110 if (essid_len == 1 && essid[0] == ' ')
111 return 1;
112
113 /* Otherwise, if the entire essid is 0, we assume it is hidden */
114 while (essid_len) {
115 essid_len--;
116 if (essid[essid_len] != '\0')
117 return 0;
118 }
119
120 return 1;
121}
122
bb8c093b 123static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
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124{
125 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
126 const char *s = essid;
127 char *d = escaped;
128
bb8c093b 129 if (iwl4965_is_empty_essid(essid, essid_len)) {
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130 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
131 return escaped;
132 }
133
134 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
135 while (essid_len--) {
136 if (*s == '\0') {
137 *d++ = '\\';
138 *d++ = '0';
139 s++;
140 } else
141 *d++ = *s++;
142 }
143 *d = '\0';
144 return escaped;
145}
146
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147/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
148 * DMA services
149 *
150 * Theory of operation
151 *
6440adb5
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152 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
153 * of buffer descriptors, each of which points to one or more data buffers for
154 * the device to read from or fill. Driver and device exchange status of each
155 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
156 * entries in each circular buffer, to protect against confusing empty and full
157 * queue states.
158 *
159 * The device reads or writes the data in the queues via the device's several
160 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
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161 *
162 * For Tx queue, there are low mark and high mark limits. If, after queuing
163 * the packet for Tx, free space become < low mark, Tx queue stopped. When
164 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
165 * Tx queue resumed.
166 *
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167 * The 4965 operates with up to 17 queues: One receive queue, one transmit
168 * queue (#4) for sending commands to the device firmware, and 15 other
169 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
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170 *
171 * See more detailed info in iwl-4965-hw.h.
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172 ***************************************************/
173
fe01b477 174int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 175{
fc4b6853 176 int s = q->read_ptr - q->write_ptr;
b481de9c 177
fc4b6853 178 if (q->read_ptr > q->write_ptr)
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179 s -= q->n_bd;
180
181 if (s <= 0)
182 s += q->n_window;
183 /* keep some reserve to not confuse empty and full situations */
184 s -= 2;
185 if (s < 0)
186 s = 0;
187 return s;
188}
189
b481de9c 190
bb8c093b 191static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 192{
fc4b6853
TW
193 return q->write_ptr > q->read_ptr ?
194 (i >= q->read_ptr && i < q->write_ptr) :
195 !(i < q->read_ptr && i >= q->write_ptr);
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196}
197
bb8c093b 198static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 199{
6440adb5 200 /* This is for scan command, the big buffer at end of command array */
b481de9c 201 if (is_huge)
6440adb5 202 return q->n_window; /* must be power of 2 */
b481de9c 203
6440adb5 204 /* Otherwise, use normal size buffers */
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205 return index & (q->n_window - 1);
206}
207
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208/**
209 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
210 */
c79dd5b5 211static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
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212 int count, int slots_num, u32 id)
213{
214 q->n_bd = count;
215 q->n_window = slots_num;
216 q->id = id;
217
c54b679d
TW
218 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
219 * and iwl_queue_dec_wrap are broken. */
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220 BUG_ON(!is_power_of_2(count));
221
222 /* slots_num must be power-of-two size, otherwise
223 * get_cmd_index is broken. */
224 BUG_ON(!is_power_of_2(slots_num));
225
226 q->low_mark = q->n_window / 4;
227 if (q->low_mark < 4)
228 q->low_mark = 4;
229
230 q->high_mark = q->n_window / 8;
231 if (q->high_mark < 2)
232 q->high_mark = 2;
233
fc4b6853 234 q->write_ptr = q->read_ptr = 0;
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235
236 return 0;
237}
238
6440adb5
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239/**
240 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
241 */
c79dd5b5 242static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 243 struct iwl4965_tx_queue *txq, u32 id)
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244{
245 struct pci_dev *dev = priv->pci_dev;
246
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247 /* Driver private data, only for Tx (not command) queues,
248 * not shared with device. */
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249 if (id != IWL_CMD_QUEUE_NUM) {
250 txq->txb = kmalloc(sizeof(txq->txb[0]) *
251 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
252 if (!txq->txb) {
01ebd063 253 IWL_ERROR("kmalloc for auxiliary BD "
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254 "structures failed\n");
255 goto error;
256 }
257 } else
258 txq->txb = NULL;
259
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260 /* Circular buffer of transmit frame descriptors (TFDs),
261 * shared with device */
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262 txq->bd = pci_alloc_consistent(dev,
263 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
264 &txq->q.dma_addr);
265
266 if (!txq->bd) {
267 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
268 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
269 goto error;
270 }
271 txq->q.id = id;
272
273 return 0;
274
275 error:
276 if (txq->txb) {
277 kfree(txq->txb);
278 txq->txb = NULL;
279 }
280
281 return -ENOMEM;
282}
283
8b6eaea8
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284/**
285 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
286 */
c79dd5b5 287int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 288 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
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289{
290 struct pci_dev *dev = priv->pci_dev;
291 int len;
292 int rc = 0;
293
8b6eaea8
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294 /*
295 * Alloc buffer array for commands (Tx or other types of commands).
296 * For the command queue (#4), allocate command space + one big
297 * command for scan, since scan command is very huge; the system will
298 * not have two scans at the same time, so only one is needed.
bb54244b 299 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB
300 * space is needed.
301 */
857485c0 302 len = sizeof(struct iwl_cmd) * slots_num;
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303 if (txq_id == IWL_CMD_QUEUE_NUM)
304 len += IWL_MAX_SCAN_SIZE;
305 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
306 if (!txq->cmd)
307 return -ENOMEM;
308
8b6eaea8 309 /* Alloc driver data array and TFD circular buffer */
bb8c093b 310 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
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311 if (rc) {
312 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
313
314 return -ENOMEM;
315 }
316 txq->need_update = 0;
317
318 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 319 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 320 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB
321
322 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 323 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 324
8b6eaea8 325 /* Tell device where to find queue */
bb8c093b 326 iwl4965_hw_tx_queue_init(priv, txq);
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327
328 return 0;
329}
330
331/**
bb8c093b 332 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
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333 * @txq: Transmit queue to deallocate.
334 *
335 * Empty queue by removing and destroying all BD's.
6440adb5
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336 * Free all buffers.
337 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 338 */
c79dd5b5 339void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 340{
bb8c093b 341 struct iwl4965_queue *q = &txq->q;
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342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344
345 if (q->n_bd == 0)
346 return;
347
348 /* first, empty all BD's */
fc4b6853 349 for (; q->write_ptr != q->read_ptr;
c54b679d 350 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 351 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 352
857485c0 353 len = sizeof(struct iwl_cmd) * q->n_window;
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354 if (q->id == IWL_CMD_QUEUE_NUM)
355 len += IWL_MAX_SCAN_SIZE;
356
6440adb5 357 /* De-alloc array of command/tx buffers */
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358 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
359
6440adb5 360 /* De-alloc circular buffer of TFDs */
b481de9c 361 if (txq->q.n_bd)
bb8c093b 362 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
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363 txq->q.n_bd, txq->bd, txq->q.dma_addr);
364
6440adb5 365 /* De-alloc array of per-TFD driver data */
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366 if (txq->txb) {
367 kfree(txq->txb);
368 txq->txb = NULL;
369 }
370
6440adb5 371 /* 0-fill queue descriptor structure */
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372 memset(txq, 0, sizeof(*txq));
373}
374
bb8c093b 375const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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376
377/*************** STATION TABLE MANAGEMENT ****
9fbab516 378 * mac80211 should be examined to determine if sta_info is duplicating
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379 * the functionality provided here
380 */
381
382/**************************************************************/
383
01ebd063 384#if 0 /* temporary disable till we add real remove station */
6440adb5
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385/**
386 * iwl4965_remove_station - Remove driver's knowledge of station.
387 *
388 * NOTE: This does not remove station from device's station table.
389 */
c79dd5b5 390static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
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391{
392 int index = IWL_INVALID_STATION;
393 int i;
394 unsigned long flags;
395
396 spin_lock_irqsave(&priv->sta_lock, flags);
397
398 if (is_ap)
399 index = IWL_AP_ID;
400 else if (is_broadcast_ether_addr(addr))
5425e490 401 index = priv->hw_params.bcast_sta_id;
b481de9c 402 else
5425e490 403 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
b481de9c
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404 if (priv->stations[i].used &&
405 !compare_ether_addr(priv->stations[i].sta.sta.addr,
406 addr)) {
407 index = i;
408 break;
409 }
410
411 if (unlikely(index == IWL_INVALID_STATION))
412 goto out;
413
414 if (priv->stations[index].used) {
415 priv->stations[index].used = 0;
416 priv->num_stations--;
417 }
418
419 BUG_ON(priv->num_stations < 0);
420
421out:
422 spin_unlock_irqrestore(&priv->sta_lock, flags);
423 return 0;
424}
556f8db7 425#endif
b481de9c 426
6440adb5
CB
427/**
428 * iwl4965_add_station_flags - Add station to tables in driver and device
429 */
c79dd5b5 430u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 431 int is_ap, u8 flags, void *ht_data)
b481de9c
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432{
433 int i;
434 int index = IWL_INVALID_STATION;
bb8c093b 435 struct iwl4965_station_entry *station;
b481de9c 436 unsigned long flags_spin;
0795af57 437 DECLARE_MAC_BUF(mac);
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438
439 spin_lock_irqsave(&priv->sta_lock, flags_spin);
440 if (is_ap)
441 index = IWL_AP_ID;
442 else if (is_broadcast_ether_addr(addr))
5425e490 443 index = priv->hw_params.bcast_sta_id;
b481de9c 444 else
5425e490 445 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
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446 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
447 addr)) {
448 index = i;
449 break;
450 }
451
452 if (!priv->stations[i].used &&
453 index == IWL_INVALID_STATION)
454 index = i;
455 }
456
457
9fbab516
BC
458 /* These two conditions have the same outcome, but keep them separate
459 since they have different meanings */
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460 if (unlikely(index == IWL_INVALID_STATION)) {
461 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
462 return index;
463 }
464
465 if (priv->stations[index].used &&
466 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
467 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
468 return index;
469 }
470
471
0795af57 472 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
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473 station = &priv->stations[index];
474 station->used = 1;
475 priv->num_stations++;
476
6440adb5 477 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 478 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
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479 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
480 station->sta.mode = 0;
481 station->sta.sta.sta_id = index;
482 station->sta.station_flags = 0;
483
c8b0e6e1 484#ifdef CONFIG_IWL4965_HT
b481de9c 485 /* BCAST station and IBSS stations do not work in HT mode */
5425e490 486 if (index != priv->hw_params.bcast_sta_id &&
b481de9c 487 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR
488 iwl4965_set_ht_add_station(priv, index,
489 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 490#endif /*CONFIG_IWL4965_HT*/
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491
492 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB
493
494 /* Add station to device's station table */
bb8c093b 495 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
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496 return index;
497
498}
499
b481de9c 500
b481de9c
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501
502/*************** HOST COMMAND QUEUE FUNCTIONS *****/
503
b481de9c 504/**
bb8c093b 505 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
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506 * @priv: device private data point
507 * @cmd: a point to the ucode command structure
508 *
509 * The function returns < 0 values to indicate the operation is
510 * failed. On success, it turns the index (> 0) of command in the
511 * command queue.
512 */
857485c0 513int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 514{
bb8c093b
CH
515 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
516 struct iwl4965_queue *q = &txq->q;
517 struct iwl4965_tfd_frame *tfd;
b481de9c 518 u32 *control_flags;
857485c0 519 struct iwl_cmd *out_cmd;
b481de9c
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520 u32 idx;
521 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
522 dma_addr_t phys_addr;
523 int ret;
524 unsigned long flags;
525
526 /* If any of the command structures end up being larger than
527 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
528 * we will need to increase the size of the TFD entries */
529 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
530 !(cmd->meta.flags & CMD_SIZE_HUGE));
531
fee1247a 532 if (iwl_is_rfkill(priv)) {
c342a1b9
GG
533 IWL_DEBUG_INFO("Not sending command - RF KILL");
534 return -EIO;
535 }
536
bb8c093b 537 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
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538 IWL_ERROR("No space for Tx\n");
539 return -ENOSPC;
540 }
541
542 spin_lock_irqsave(&priv->hcmd_lock, flags);
543
fc4b6853 544 tfd = &txq->bd[q->write_ptr];
b481de9c
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545 memset(tfd, 0, sizeof(*tfd));
546
547 control_flags = (u32 *) tfd;
548
fc4b6853 549 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
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550 out_cmd = &txq->cmd[idx];
551
552 out_cmd->hdr.cmd = cmd->id;
553 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
554 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
555
556 /* At this point, the out_cmd now has all of the incoming cmd
557 * information */
558
559 out_cmd->hdr.flags = 0;
560 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 561 INDEX_TO_SEQ(q->write_ptr));
b481de9c
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562 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
563 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
564
565 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 566 offsetof(struct iwl_cmd, hdr);
bb8c093b 567 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY
568
569 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
570 "%d bytes at %d[%d]:%d\n",
571 get_cmd_string(out_cmd->hdr.cmd),
572 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 573 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY
574
575 txq->need_update = 1;
6440adb5
CB
576
577 /* Set up entry in queue's byte count circular buffer */
e2a722eb 578 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
6440adb5
CB
579
580 /* Increment and update queue's write index */
c54b679d 581 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
e2a722eb 582 ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
583
584 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
585 return ret ? ret : idx;
586}
587
deb09c43
EG
588static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
589{
590 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
591
592 if (hw_decrypt)
593 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
594 else
595 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
596
597}
598
b481de9c 599/**
bb8c093b 600 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY
601 *
602 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC
603 * NOTE: mutex must be held before calling this fnction
604 */
c79dd5b5 605static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY
606 const u8 *addr, int is_ap)
607{
556f8db7 608 u8 sta_id;
b481de9c 609
6440adb5 610 /* Add station to device's station table */
67d62035
RR
611#ifdef CONFIG_IWL4965_HT
612 struct ieee80211_conf *conf = &priv->hw->conf;
613 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
614
615 if ((is_ap) &&
616 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
617 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
618 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
619 0, cur_ht_config);
620 else
621#endif /* CONFIG_IWL4965_HT */
622 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
623 0, NULL);
6440adb5
CB
624
625 /* Set up default rate scaling table in device's station table */
b481de9c
ZY
626 iwl4965_add_station(priv, addr, is_ap);
627
556f8db7 628 return sta_id;
b481de9c
ZY
629}
630
b481de9c 631/**
bb8c093b 632 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY
633 *
634 * NOTE: This is really only useful during development and can eventually
635 * be #ifdef'd out once the driver is stable and folks aren't actively
636 * making changes
637 */
bb8c093b 638static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY
639{
640 int error = 0;
641 int counter = 1;
642
643 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
644 error |= le32_to_cpu(rxon->flags &
645 (RXON_FLG_TGJ_NARROW_BAND_MSK |
646 RXON_FLG_RADAR_DETECT_MSK));
647 if (error)
648 IWL_WARNING("check 24G fields %d | %d\n",
649 counter++, error);
650 } else {
651 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
652 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
653 if (error)
654 IWL_WARNING("check 52 fields %d | %d\n",
655 counter++, error);
656 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
657 if (error)
658 IWL_WARNING("check 52 CCK %d | %d\n",
659 counter++, error);
660 }
661 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
662 if (error)
663 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
664
665 /* make sure basic rates 6Mbps and 1Mbps are supported */
666 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
667 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
668 if (error)
669 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
670
671 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
672 if (error)
673 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
674
675 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
676 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
677 if (error)
678 IWL_WARNING("check CCK and short slot %d | %d\n",
679 counter++, error);
680
681 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
682 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
683 if (error)
684 IWL_WARNING("check CCK & auto detect %d | %d\n",
685 counter++, error);
686
687 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
688 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
689 if (error)
690 IWL_WARNING("check TGG and auto detect %d | %d\n",
691 counter++, error);
692
693 if (error)
694 IWL_WARNING("Tuning to channel %d\n",
695 le16_to_cpu(rxon->channel));
696
697 if (error) {
bb8c093b 698 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY
699 return -1;
700 }
701 return 0;
702}
703
704/**
9fbab516 705 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 706 * @priv: staging_rxon is compared to active_rxon
b481de9c 707 *
9fbab516
BC
708 * If the RXON structure is changing enough to require a new tune,
709 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
710 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 711 */
c79dd5b5 712static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY
713{
714
715 /* These items are only settable from the full RXON command */
716 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
717 compare_ether_addr(priv->staging_rxon.bssid_addr,
718 priv->active_rxon.bssid_addr) ||
719 compare_ether_addr(priv->staging_rxon.node_addr,
720 priv->active_rxon.node_addr) ||
721 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
722 priv->active_rxon.wlap_bssid_addr) ||
723 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
724 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
725 (priv->staging_rxon.air_propagation !=
726 priv->active_rxon.air_propagation) ||
727 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
728 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
729 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
730 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
731 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
732 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
733 return 1;
734
735 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
736 * be updated with the RXON_ASSOC command -- however only some
737 * flag transitions are allowed using RXON_ASSOC */
738
739 /* Check if we are not switching bands */
740 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
741 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
742 return 1;
743
744 /* Check if we are switching association toggle */
745 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
746 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
747 return 1;
748
749 return 0;
750}
751
b481de9c 752/**
bb8c093b 753 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 754 *
01ebd063 755 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY
756 * the active_rxon structure is updated with the new data. This
757 * function correctly transitions out of the RXON_ASSOC_MSK state if
758 * a HW tune is required based on the RXON structure changes.
759 */
c79dd5b5 760static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY
761{
762 /* cast away the const for active_rxon in this function */
bb8c093b 763 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 764 DECLARE_MAC_BUF(mac);
b481de9c
ZY
765 int rc = 0;
766
fee1247a 767 if (!iwl_is_alive(priv))
b481de9c
ZY
768 return -1;
769
770 /* always get timestamp with Rx frame */
771 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
772
bb8c093b 773 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY
774 if (rc) {
775 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
776 return -EINVAL;
777 }
778
779 /* If we don't need to send a full RXON, we can use
bb8c093b 780 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 781 * and other flags for the current radio configuration. */
bb8c093b 782 if (!iwl4965_full_rxon_required(priv)) {
7e8c519e 783 rc = iwl_send_rxon_assoc(priv);
b481de9c
ZY
784 if (rc) {
785 IWL_ERROR("Error setting RXON_ASSOC "
786 "configuration (%d).\n", rc);
787 return rc;
788 }
789
790 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
791
792 return 0;
793 }
794
795 /* station table will be cleared */
796 priv->assoc_station_added = 0;
797
c8b0e6e1 798#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY
799 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
800 if (!priv->error_recovering)
801 priv->start_calib = 0;
802
803 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 804#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY
805
806 /* If we are currently associated and the new config requires
807 * an RXON_ASSOC and the new config wants the associated mask enabled,
808 * we must clear the associated from the active configuration
809 * before we apply the new config */
3109ece1 810 if (iwl_is_associated(priv) &&
b481de9c
ZY
811 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
812 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
813 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
814
857485c0 815 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 816 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY
817 &priv->active_rxon);
818
819 /* If the mask clearing failed then we set
820 * active_rxon back to what it was previously */
821 if (rc) {
822 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
823 IWL_ERROR("Error clearing ASSOC_MSK on current "
824 "configuration (%d).\n", rc);
825 return rc;
826 }
b481de9c
ZY
827 }
828
829 IWL_DEBUG_INFO("Sending RXON\n"
830 "* with%s RXON_FILTER_ASSOC_MSK\n"
831 "* channel = %d\n"
0795af57 832 "* bssid = %s\n",
b481de9c
ZY
833 ((priv->staging_rxon.filter_flags &
834 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
835 le16_to_cpu(priv->staging_rxon.channel),
0795af57 836 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 837
fcc76c6b 838 iwl4965_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
b481de9c 839 /* Apply the new configuration */
857485c0 840 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 841 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY
842 if (rc) {
843 IWL_ERROR("Error setting new configuration (%d).\n", rc);
844 return rc;
845 }
846
bf85ea4f 847 iwlcore_clear_stations_table(priv);
556f8db7 848
c8b0e6e1 849#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY
850 if (!priv->error_recovering)
851 priv->start_calib = 0;
852
853 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
854 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 855#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY
856
857 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
858
859 /* If we issue a new RXON command which required a tune then we must
860 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 861 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
862 if (rc) {
863 IWL_ERROR("Error setting Tx power (%d).\n", rc);
864 return rc;
865 }
866
867 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 868 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY
869 IWL_INVALID_STATION) {
870 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
871 return -EIO;
872 }
873
874 /* If we have set the ASSOC_MSK and we are in BSS mode then
875 * add the IWL_AP_ID to the station rate table */
3109ece1 876 if (iwl_is_associated(priv) &&
b481de9c 877 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 878 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY
879 == IWL_INVALID_STATION) {
880 IWL_ERROR("Error adding AP address for transmit.\n");
881 return -EIO;
882 }
883 priv->assoc_station_added = 1;
6974e363
EG
884 if (priv->default_wep_key &&
885 iwl_send_static_wepkey_cmd(priv, 0))
886 IWL_ERROR("Could not send WEP static key.\n");
b481de9c
ZY
887 }
888
889 return 0;
890}
891
c79dd5b5 892static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 893{
bb8c093b 894 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY
895 .flags = 3,
896 .lead_time = 0xAA,
897 .max_kill = 1,
898 .kill_ack_mask = 0,
899 .kill_cts_mask = 0,
900 };
901
857485c0 902 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 903 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY
904}
905
c79dd5b5 906static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY
907{
908 int rc = 0;
bb8c093b 909 struct iwl4965_rx_packet *res;
857485c0 910 struct iwl_host_cmd cmd = {
b481de9c
ZY
911 .id = REPLY_SCAN_ABORT_CMD,
912 .meta.flags = CMD_WANT_SKB,
913 };
914
915 /* If there isn't a scan actively going on in the hardware
916 * then we are in between scan bands and not actually
917 * actively scanning, so don't send the abort command */
918 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
919 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
920 return 0;
921 }
922
857485c0 923 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
924 if (rc) {
925 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
926 return rc;
927 }
928
bb8c093b 929 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
930 if (res->u.status != CAN_ABORT_STATUS) {
931 /* The scan abort will return 1 for success or
932 * 2 for "failure". A failure condition can be
933 * due to simply not being in an active scan which
934 * can occur if we send the scan abort before we
935 * the microcode has notified us that a scan is
936 * completed. */
937 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
938 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
939 clear_bit(STATUS_SCAN_HW, &priv->status);
940 }
941
942 dev_kfree_skb_any(cmd.meta.u.skb);
943
944 return rc;
945}
946
c79dd5b5 947static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
857485c0 948 struct iwl_cmd *cmd,
b481de9c
ZY
949 struct sk_buff *skb)
950{
951 return 1;
952}
953
954/*
955 * CARD_STATE_CMD
956 *
9fbab516 957 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY
958 *
959 * When in the 'enable' state the card operates as normal.
960 * When in the 'disable' state, the card enters into a low power mode.
961 * When in the 'halt' state, the card is shut down and must be fully
962 * restarted to come back on.
963 */
c79dd5b5 964static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 965{
857485c0 966 struct iwl_host_cmd cmd = {
b481de9c
ZY
967 .id = REPLY_CARD_STATE_CMD,
968 .len = sizeof(u32),
969 .data = &flags,
970 .meta.flags = meta_flag,
971 };
972
973 if (meta_flag & CMD_ASYNC)
bb8c093b 974 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 975
857485c0 976 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY
977}
978
c79dd5b5 979static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
857485c0 980 struct iwl_cmd *cmd, struct sk_buff *skb)
b481de9c 981{
bb8c093b 982 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY
983
984 if (!skb) {
985 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
986 return 1;
987 }
988
bb8c093b 989 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY
990 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
991 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
992 res->hdr.flags);
993 return 1;
994 }
995
996 switch (res->u.add_sta.status) {
997 case ADD_STA_SUCCESS_MSK:
998 break;
999 default:
1000 break;
1001 }
1002
1003 /* We didn't cache the SKB; let the caller free it */
1004 return 1;
1005}
1006
c79dd5b5 1007int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 1008 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1009{
bb8c093b 1010 struct iwl4965_rx_packet *res = NULL;
b481de9c 1011 int rc = 0;
857485c0 1012 struct iwl_host_cmd cmd = {
b481de9c 1013 .id = REPLY_ADD_STA,
bb8c093b 1014 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY
1015 .meta.flags = flags,
1016 .data = sta,
1017 };
1018
1019 if (flags & CMD_ASYNC)
bb8c093b 1020 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY
1021 else
1022 cmd.meta.flags |= CMD_WANT_SKB;
1023
857485c0 1024 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY
1025
1026 if (rc || (flags & CMD_ASYNC))
1027 return rc;
1028
bb8c093b 1029 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
1030 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1031 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1032 res->hdr.flags);
1033 rc = -EIO;
1034 }
1035
1036 if (rc == 0) {
1037 switch (res->u.add_sta.status) {
1038 case ADD_STA_SUCCESS_MSK:
1039 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1040 break;
1041 default:
1042 rc = -EIO;
1043 IWL_WARNING("REPLY_ADD_STA failed\n");
1044 break;
1045 }
1046 }
1047
1048 priv->alloc_rxb_skb--;
1049 dev_kfree_skb_any(cmd.meta.u.skb);
1050
1051 return rc;
1052}
1053
c79dd5b5 1054static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY
1055{
1056 struct list_head *element;
1057
1058 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1059 priv->frames_count);
1060
1061 while (!list_empty(&priv->free_frames)) {
1062 element = priv->free_frames.next;
1063 list_del(element);
bb8c093b 1064 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY
1065 priv->frames_count--;
1066 }
1067
1068 if (priv->frames_count) {
1069 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1070 priv->frames_count);
1071 priv->frames_count = 0;
1072 }
1073}
1074
c79dd5b5 1075static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1076{
bb8c093b 1077 struct iwl4965_frame *frame;
b481de9c
ZY
1078 struct list_head *element;
1079 if (list_empty(&priv->free_frames)) {
1080 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1081 if (!frame) {
1082 IWL_ERROR("Could not allocate frame!\n");
1083 return NULL;
1084 }
1085
1086 priv->frames_count++;
1087 return frame;
1088 }
1089
1090 element = priv->free_frames.next;
1091 list_del(element);
bb8c093b 1092 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY
1093}
1094
c79dd5b5 1095static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY
1096{
1097 memset(frame, 0, sizeof(*frame));
1098 list_add(&frame->list, &priv->free_frames);
1099}
1100
c79dd5b5 1101unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY
1102 struct ieee80211_hdr *hdr,
1103 const u8 *dest, int left)
1104{
1105
3109ece1 1106 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY
1107 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1108 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1109 return 0;
1110
1111 if (priv->ibss_beacon->len > left)
1112 return 0;
1113
1114 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1115
1116 return priv->ibss_beacon->len;
1117}
1118
bb8c093b 1119static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY
1120{
1121 u8 i;
1122
1123 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1124 i = iwl4965_rates[i].next_ieee) {
b481de9c 1125 if (rate_mask & (1 << i))
bb8c093b 1126 return iwl4965_rates[i].plcp;
b481de9c
ZY
1127 }
1128
1129 return IWL_RATE_INVALID;
1130}
1131
c79dd5b5 1132static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1133{
bb8c093b 1134 struct iwl4965_frame *frame;
b481de9c
ZY
1135 unsigned int frame_size;
1136 int rc;
1137 u8 rate;
1138
bb8c093b 1139 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY
1140
1141 if (!frame) {
1142 IWL_ERROR("Could not obtain free frame buffer for beacon "
1143 "command.\n");
1144 return -ENOMEM;
1145 }
1146
1147 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1148 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY
1149 0xFF0);
1150 if (rate == IWL_INVALID_RATE)
1151 rate = IWL_RATE_6M_PLCP;
1152 } else {
bb8c093b 1153 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY
1154 if (rate == IWL_INVALID_RATE)
1155 rate = IWL_RATE_1M_PLCP;
1156 }
1157
bb8c093b 1158 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1159
857485c0 1160 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
1161 &frame->u.cmd[0]);
1162
bb8c093b 1163 iwl4965_free_frame(priv, frame);
b481de9c
ZY
1164
1165 return rc;
1166}
1167
b481de9c
ZY
1168/******************************************************************************
1169 *
1170 * Misc. internal state and helper functions
1171 *
1172 ******************************************************************************/
b481de9c 1173
5425e490 1174static void iwl4965_unset_hw_params(struct iwl_priv *priv)
b481de9c 1175{
059ff826 1176 if (priv->shared_virt)
b481de9c 1177 pci_free_consistent(priv->pci_dev,
bb8c093b 1178 sizeof(struct iwl4965_shared),
059ff826
TW
1179 priv->shared_virt,
1180 priv->shared_phys);
b481de9c
ZY
1181}
1182
1183/**
bb8c093b 1184 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY
1185 *
1186 * return : set the bit for each supported rate insert in ie
1187 */
bb8c093b 1188static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1189 u16 basic_rate, int *left)
b481de9c
ZY
1190{
1191 u16 ret_rates = 0, bit;
1192 int i;
c7c46676
TW
1193 u8 *cnt = ie;
1194 u8 *rates = ie + 1;
b481de9c
ZY
1195
1196 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1197 if (bit & supported_rate) {
1198 ret_rates |= bit;
bb8c093b 1199 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW
1200 ((bit & basic_rate) ? 0x80 : 0x00);
1201 (*cnt)++;
1202 (*left)--;
1203 if ((*left <= 0) ||
1204 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY
1205 break;
1206 }
1207 }
1208
1209 return ret_rates;
1210}
1211
b481de9c 1212/**
bb8c093b 1213 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1214 */
c79dd5b5 1215static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW
1216 enum ieee80211_band band,
1217 struct ieee80211_mgmt *frame,
1218 int left, int is_direct)
b481de9c
ZY
1219{
1220 int len = 0;
1221 u8 *pos = NULL;
bee488db 1222 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032 1223#ifdef CONFIG_IWL4965_HT
78330fdd
TW
1224 const struct ieee80211_supported_band *sband =
1225 iwl4965_get_hw_mode(priv, band);
8fb88032 1226#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY
1227
1228 /* Make sure there is enough space for the probe request,
1229 * two mandatory IEs and the data */
1230 left -= 24;
1231 if (left < 0)
1232 return 0;
1233 len += 24;
1234
1235 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1236 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1237 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1238 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY
1239 frame->seq_ctrl = 0;
1240
1241 /* fill in our indirect SSID IE */
1242 /* ...next IE... */
1243
1244 left -= 2;
1245 if (left < 0)
1246 return 0;
1247 len += 2;
1248 pos = &(frame->u.probe_req.variable[0]);
1249 *pos++ = WLAN_EID_SSID;
1250 *pos++ = 0;
1251
1252 /* fill in our direct SSID IE... */
1253 if (is_direct) {
1254 /* ...next IE... */
1255 left -= 2 + priv->essid_len;
1256 if (left < 0)
1257 return 0;
1258 /* ... fill it in... */
1259 *pos++ = WLAN_EID_SSID;
1260 *pos++ = priv->essid_len;
1261 memcpy(pos, priv->essid, priv->essid_len);
1262 pos += priv->essid_len;
1263 len += 2 + priv->essid_len;
1264 }
1265
1266 /* fill in supported rate */
1267 /* ...next IE... */
1268 left -= 2;
1269 if (left < 0)
1270 return 0;
c7c46676 1271
b481de9c
ZY
1272 /* ... fill it in... */
1273 *pos++ = WLAN_EID_SUPP_RATES;
1274 *pos = 0;
c7c46676 1275
bee488db 1276 /* exclude 60M rate */
1277 active_rates = priv->rates_mask;
1278 active_rates &= ~IWL_RATE_60M_MASK;
1279
1280 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1281
c7c46676 1282 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1283 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1284 active_rate_basic, &left);
c7c46676
TW
1285 active_rates &= ~ret_rates;
1286
bb8c093b 1287 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1288 active_rate_basic, &left);
c7c46676
TW
1289 active_rates &= ~ret_rates;
1290
b481de9c
ZY
1291 len += 2 + *pos;
1292 pos += (*pos) + 1;
c7c46676 1293 if (active_rates == 0)
b481de9c
ZY
1294 goto fill_end;
1295
1296 /* fill in supported extended rate */
1297 /* ...next IE... */
1298 left -= 2;
1299 if (left < 0)
1300 return 0;
1301 /* ... fill it in... */
1302 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1303 *pos = 0;
bb8c093b 1304 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1305 active_rate_basic, &left);
b481de9c
ZY
1306 if (*pos > 0)
1307 len += 2 + *pos;
1308
c8b0e6e1 1309#ifdef CONFIG_IWL4965_HT
78330fdd
TW
1310 if (sband && sband->ht_info.ht_supported) {
1311 struct ieee80211_ht_cap *ht_cap;
b481de9c
ZY
1312 pos += (*pos) + 1;
1313 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032 1314 *pos++ = sizeof(struct ieee80211_ht_cap);
78330fdd
TW
1315 ht_cap = (struct ieee80211_ht_cap *)pos;
1316 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1317 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1318 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
1319 IEEE80211_HT_CAP_AMPDU_FACTOR) |
1320 ((sband->ht_info.ampdu_density << 2) &
1321 IEEE80211_HT_CAP_AMPDU_DENSITY);
8fb88032 1322 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 1323 }
c8b0e6e1 1324#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY
1325
1326 fill_end:
1327 return (u16)len;
1328}
1329
1330/*
1331 * QoS support
1332*/
c79dd5b5 1333static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1334 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY
1335{
1336
857485c0 1337 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1338 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY
1339}
1340
c79dd5b5 1341static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
1342{
1343 unsigned long flags;
1344
b481de9c
ZY
1345 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1346 return;
1347
1348 if (!priv->qos_data.qos_enable)
1349 return;
1350
1351 spin_lock_irqsave(&priv->lock, flags);
1352 priv->qos_data.def_qos_parm.qos_flags = 0;
1353
1354 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1355 !priv->qos_data.qos_cap.q_AP.txop_request)
1356 priv->qos_data.def_qos_parm.qos_flags |=
1357 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
1358 if (priv->qos_data.qos_active)
1359 priv->qos_data.def_qos_parm.qos_flags |=
1360 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1361
c8b0e6e1 1362#ifdef CONFIG_IWL4965_HT
fd105e79 1363 if (priv->current_ht_config.is_ht)
f1f1f5c7 1364 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1365#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1366
b481de9c
ZY
1367 spin_unlock_irqrestore(&priv->lock, flags);
1368
3109ece1 1369 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
1370 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1371 priv->qos_data.qos_active,
1372 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1373
bb8c093b 1374 iwl4965_send_qos_params_command(priv,
b481de9c
ZY
1375 &(priv->qos_data.def_qos_parm));
1376 }
1377}
1378
b481de9c
ZY
1379/*
1380 * Power management (not Tx power!) functions
1381 */
1382#define MSEC_TO_USEC 1024
1383
1384#define NOSLP __constant_cpu_to_le16(0), 0, 0
1385#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1386#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1387#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1388 __constant_cpu_to_le32(X1), \
1389 __constant_cpu_to_le32(X2), \
1390 __constant_cpu_to_le32(X3), \
1391 __constant_cpu_to_le32(X4)}
1392
1393
1394/* default power management (not Tx power) table values */
1395/* for tim 0-10 */
bb8c093b 1396static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY
1397 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1398 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1399 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1400 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1401 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1402 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1403};
1404
1405/* for tim > 10 */
bb8c093b 1406static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY
1407 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1408 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1409 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1410 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1411 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1412 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1413 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1414 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1415 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1416 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1417};
1418
c79dd5b5 1419int iwl4965_power_init_handle(struct iwl_priv *priv)
b481de9c
ZY
1420{
1421 int rc = 0, i;
bb8c093b
CH
1422 struct iwl4965_power_mgr *pow_data;
1423 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY
1424 u16 pci_pm;
1425
1426 IWL_DEBUG_POWER("Initialize power \n");
1427
1428 pow_data = &(priv->power_data);
1429
1430 memset(pow_data, 0, sizeof(*pow_data));
1431
1432 pow_data->active_index = IWL_POWER_RANGE_0;
1433 pow_data->dtim_val = 0xffff;
1434
1435 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1436 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1437
1438 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1439 if (rc != 0)
1440 return 0;
1441 else {
bb8c093b 1442 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY
1443
1444 IWL_DEBUG_POWER("adjust power command flags\n");
1445
1446 for (i = 0; i < IWL_POWER_AC; i++) {
1447 cmd = &pow_data->pwr_range_0[i].cmd;
1448
1449 if (pci_pm & 0x1)
1450 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1451 else
1452 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1453 }
1454 }
1455 return rc;
1456}
1457
c79dd5b5 1458static int iwl4965_update_power_cmd(struct iwl_priv *priv,
bb8c093b 1459 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY
1460{
1461 int rc = 0, i;
1462 u8 skip;
1463 u32 max_sleep = 0;
bb8c093b 1464 struct iwl4965_power_vec_entry *range;
b481de9c 1465 u8 period = 0;
bb8c093b 1466 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY
1467
1468 if (mode > IWL_POWER_INDEX_5) {
1469 IWL_DEBUG_POWER("Error invalid power mode \n");
1470 return -1;
1471 }
1472 pow_data = &(priv->power_data);
1473
1474 if (pow_data->active_index == IWL_POWER_RANGE_0)
1475 range = &pow_data->pwr_range_0[0];
1476 else
1477 range = &pow_data->pwr_range_1[1];
1478
bb8c093b 1479 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY
1480
1481#ifdef IWL_MAC80211_DISABLE
1482 if (priv->assoc_network != NULL) {
1483 unsigned long flags;
1484
1485 period = priv->assoc_network->tim.tim_period;
1486 }
1487#endif /*IWL_MAC80211_DISABLE */
1488 skip = range[mode].no_dtim;
1489
1490 if (period == 0) {
1491 period = 1;
1492 skip = 0;
1493 }
1494
1495 if (skip == 0) {
1496 max_sleep = period;
1497 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1498 } else {
1499 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1500 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1501 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1502 }
1503
1504 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1505 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1506 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1507 }
1508
1509 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1510 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1511 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1512 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1513 le32_to_cpu(cmd->sleep_interval[0]),
1514 le32_to_cpu(cmd->sleep_interval[1]),
1515 le32_to_cpu(cmd->sleep_interval[2]),
1516 le32_to_cpu(cmd->sleep_interval[3]),
1517 le32_to_cpu(cmd->sleep_interval[4]));
1518
1519 return rc;
1520}
1521
c79dd5b5 1522static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
b481de9c 1523{
9a62f73b 1524 u32 uninitialized_var(final_mode);
b481de9c 1525 int rc;
bb8c093b 1526 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY
1527
1528 /* If on battery, set to 3,
01ebd063 1529 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY
1530 * else user level */
1531 switch (mode) {
1532 case IWL_POWER_BATTERY:
1533 final_mode = IWL_POWER_INDEX_3;
1534 break;
1535 case IWL_POWER_AC:
1536 final_mode = IWL_POWER_MODE_CAM;
1537 break;
1538 default:
1539 final_mode = mode;
1540 break;
1541 }
1542
1543 cmd.keep_alive_beacons = 0;
1544
bb8c093b 1545 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 1546
857485c0 1547 rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY
1548
1549 if (final_mode == IWL_POWER_MODE_CAM)
1550 clear_bit(STATUS_POWER_PMI, &priv->status);
1551 else
1552 set_bit(STATUS_POWER_PMI, &priv->status);
1553
1554 return rc;
1555}
1556
c79dd5b5 1557int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
1558{
1559 /* Filter incoming packets to determine if they are targeted toward
1560 * this network, discarding packets coming from ourselves */
1561 switch (priv->iw_mode) {
1562 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1563 /* packets from our adapter are dropped (echo) */
1564 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1565 return 0;
1566 /* {broad,multi}cast packets to our IBSS go through */
1567 if (is_multicast_ether_addr(header->addr1))
1568 return !compare_ether_addr(header->addr3, priv->bssid);
1569 /* packets to our adapter go through */
1570 return !compare_ether_addr(header->addr1, priv->mac_addr);
1571 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1572 /* packets from our adapter are dropped (echo) */
1573 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1574 return 0;
1575 /* {broad,multi}cast packets to our BSS go through */
1576 if (is_multicast_ether_addr(header->addr1))
1577 return !compare_ether_addr(header->addr2, priv->bssid);
1578 /* packets to our adapter go through */
1579 return !compare_ether_addr(header->addr1, priv->mac_addr);
69dc5d9d
TW
1580 default:
1581 break;
b481de9c
ZY
1582 }
1583
1584 return 1;
1585}
1586
1587#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1588
bb8c093b 1589static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY
1590{
1591 switch (status & TX_STATUS_MSK) {
1592 case TX_STATUS_SUCCESS:
1593 return "SUCCESS";
1594 TX_STATUS_ENTRY(SHORT_LIMIT);
1595 TX_STATUS_ENTRY(LONG_LIMIT);
1596 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1597 TX_STATUS_ENTRY(MGMNT_ABORT);
1598 TX_STATUS_ENTRY(NEXT_FRAG);
1599 TX_STATUS_ENTRY(LIFE_EXPIRE);
1600 TX_STATUS_ENTRY(DEST_PS);
1601 TX_STATUS_ENTRY(ABORTED);
1602 TX_STATUS_ENTRY(BT_RETRY);
1603 TX_STATUS_ENTRY(STA_INVALID);
1604 TX_STATUS_ENTRY(FRAG_DROPPED);
1605 TX_STATUS_ENTRY(TID_DISABLE);
1606 TX_STATUS_ENTRY(FRAME_FLUSHED);
1607 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1608 TX_STATUS_ENTRY(TX_LOCKED);
1609 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1610 }
1611
1612 return "UNKNOWN";
1613}
1614
1615/**
bb8c093b 1616 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY
1617 *
1618 * NOTE: priv->mutex is not required before calling this function
1619 */
c79dd5b5 1620static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY
1621{
1622 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1623 clear_bit(STATUS_SCANNING, &priv->status);
1624 return 0;
1625 }
1626
1627 if (test_bit(STATUS_SCANNING, &priv->status)) {
1628 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1629 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1630 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1631 queue_work(priv->workqueue, &priv->abort_scan);
1632
1633 } else
1634 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1635
1636 return test_bit(STATUS_SCANNING, &priv->status);
1637 }
1638
1639 return 0;
1640}
1641
1642/**
bb8c093b 1643 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY
1644 * @ms: amount of time to wait (in milliseconds) for scan to abort
1645 *
1646 * NOTE: priv->mutex must be held before calling this function
1647 */
c79dd5b5 1648static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY
1649{
1650 unsigned long now = jiffies;
1651 int ret;
1652
bb8c093b 1653 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY
1654 if (ret && ms) {
1655 mutex_unlock(&priv->mutex);
1656 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1657 test_bit(STATUS_SCANNING, &priv->status))
1658 msleep(1);
1659 mutex_lock(&priv->mutex);
1660
1661 return test_bit(STATUS_SCANNING, &priv->status);
1662 }
1663
1664 return ret;
1665}
1666
c79dd5b5 1667static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY
1668{
1669 /* Reset ieee stats */
1670
1671 /* We don't reset the net_device_stats (ieee->stats) on
1672 * re-association */
1673
1674 priv->last_seq_num = -1;
1675 priv->last_frag_num = -1;
1676 priv->last_packet_time = 0;
1677
bb8c093b 1678 iwl4965_scan_cancel(priv);
b481de9c
ZY
1679}
1680
1681#define MAX_UCODE_BEACON_INTERVAL 4096
1682#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1683
bb8c093b 1684static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
1685{
1686 u16 new_val = 0;
1687 u16 beacon_factor = 0;
1688
1689 beacon_factor =
1690 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1691 / MAX_UCODE_BEACON_INTERVAL;
1692 new_val = beacon_val / beacon_factor;
1693
1694 return cpu_to_le16(new_val);
1695}
1696
c79dd5b5 1697static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
1698{
1699 u64 interval_tm_unit;
1700 u64 tsf, result;
1701 unsigned long flags;
1702 struct ieee80211_conf *conf = NULL;
1703 u16 beacon_int = 0;
1704
1705 conf = ieee80211_get_hw_conf(priv->hw);
1706
1707 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
1708 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
1709 priv->rxon_timing.timestamp.dw[0] =
1710 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY
1711
1712 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1713
3109ece1 1714 tsf = priv->timestamp;
b481de9c
ZY
1715
1716 beacon_int = priv->beacon_int;
1717 spin_unlock_irqrestore(&priv->lock, flags);
1718
1719 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1720 if (beacon_int == 0) {
1721 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1722 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1723 } else {
1724 priv->rxon_timing.beacon_interval =
1725 cpu_to_le16(beacon_int);
1726 priv->rxon_timing.beacon_interval =
bb8c093b 1727 iwl4965_adjust_beacon_interval(
b481de9c
ZY
1728 le16_to_cpu(priv->rxon_timing.beacon_interval));
1729 }
1730
1731 priv->rxon_timing.atim_window = 0;
1732 } else {
1733 priv->rxon_timing.beacon_interval =
bb8c093b 1734 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
1735 /* TODO: we need to get atim_window from upper stack
1736 * for now we set to 0 */
1737 priv->rxon_timing.atim_window = 0;
1738 }
1739
1740 interval_tm_unit =
1741 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1742 result = do_div(tsf, interval_tm_unit);
1743 priv->rxon_timing.beacon_init_val =
1744 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1745
1746 IWL_DEBUG_ASSOC
1747 ("beacon interval %d beacon timer %d beacon tim %d\n",
1748 le16_to_cpu(priv->rxon_timing.beacon_interval),
1749 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1750 le16_to_cpu(priv->rxon_timing.atim_window));
1751}
1752
c79dd5b5 1753static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY
1754{
1755 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1756 IWL_ERROR("APs don't scan.\n");
1757 return 0;
1758 }
1759
fee1247a 1760 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
1761 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1762 return -EIO;
1763 }
1764
1765 if (test_bit(STATUS_SCANNING, &priv->status)) {
1766 IWL_DEBUG_SCAN("Scan already in progress.\n");
1767 return -EAGAIN;
1768 }
1769
1770 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1771 IWL_DEBUG_SCAN("Scan request while abort pending. "
1772 "Queuing.\n");
1773 return -EAGAIN;
1774 }
1775
1776 IWL_DEBUG_INFO("Starting scan...\n");
1777 priv->scan_bands = 2;
1778 set_bit(STATUS_SCANNING, &priv->status);
1779 priv->scan_start = jiffies;
1780 priv->scan_pass_start = priv->scan_start;
1781
1782 queue_work(priv->workqueue, &priv->request_scan);
1783
1784 return 0;
1785}
1786
b481de9c 1787
c79dd5b5 1788static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 1789 enum ieee80211_band band)
b481de9c 1790{
8318d78a 1791 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
1792 priv->staging_rxon.flags &=
1793 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1794 | RXON_FLG_CCK_MSK);
1795 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1796 } else {
508e32e1 1797 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
1798 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1799 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1800 else
1801 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1802
1803 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
1804 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1805
1806 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1807 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1808 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1809 }
1810}
1811
1812/*
01ebd063 1813 * initialize rxon structure with default values from eeprom
b481de9c 1814 */
c79dd5b5 1815static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 1816{
bf85ea4f 1817 const struct iwl_channel_info *ch_info;
b481de9c
ZY
1818
1819 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1820
1821 switch (priv->iw_mode) {
1822 case IEEE80211_IF_TYPE_AP:
1823 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1824 break;
1825
1826 case IEEE80211_IF_TYPE_STA:
1827 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1828 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1829 break;
1830
1831 case IEEE80211_IF_TYPE_IBSS:
1832 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1833 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1834 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1835 RXON_FILTER_ACCEPT_GRP_MSK;
1836 break;
1837
1838 case IEEE80211_IF_TYPE_MNTR:
1839 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1840 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1841 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1842 break;
69dc5d9d
TW
1843 default:
1844 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
1845 break;
b481de9c
ZY
1846 }
1847
1848#if 0
1849 /* TODO: Figure out when short_preamble would be set and cache from
1850 * that */
1851 if (!hw_to_local(priv->hw)->short_preamble)
1852 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1853 else
1854 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1855#endif
1856
8622e705 1857 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY
1858 le16_to_cpu(priv->staging_rxon.channel));
1859
1860 if (!ch_info)
1861 ch_info = &priv->channel_info[0];
1862
1863 /*
1864 * in some case A channels are all non IBSS
1865 * in this case force B/G channel
1866 */
1867 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
1868 !(is_channel_ibss(ch_info)))
1869 ch_info = &priv->channel_info[0];
1870
1871 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 1872 priv->band = ch_info->band;
b481de9c 1873
8318d78a 1874 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY
1875
1876 priv->staging_rxon.ofdm_basic_rates =
1877 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1878 priv->staging_rxon.cck_basic_rates =
1879 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1880
1881 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1882 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1883 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1884 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1885 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1886 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1887 iwl4965_set_rxon_chain(priv);
1888}
1889
c79dd5b5 1890static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 1891{
b481de9c 1892 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 1893 const struct iwl_channel_info *ch_info;
b481de9c 1894
8622e705 1895 ch_info = iwl_get_channel_info(priv,
8318d78a 1896 priv->band,
b481de9c
ZY
1897 le16_to_cpu(priv->staging_rxon.channel));
1898
1899 if (!ch_info || !is_channel_ibss(ch_info)) {
1900 IWL_ERROR("channel %d not IBSS channel\n",
1901 le16_to_cpu(priv->staging_rxon.channel));
1902 return -EINVAL;
1903 }
1904 }
1905
b481de9c
ZY
1906 priv->iw_mode = mode;
1907
bb8c093b 1908 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
1909 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1910
bf85ea4f 1911 iwlcore_clear_stations_table(priv);
b481de9c 1912
fde3571f 1913 /* dont commit rxon if rf-kill is on*/
fee1247a 1914 if (!iwl_is_ready_rf(priv))
fde3571f
MA
1915 return -EAGAIN;
1916
1917 cancel_delayed_work(&priv->scan_check);
1918 if (iwl4965_scan_cancel_timeout(priv, 100)) {
1919 IWL_WARNING("Aborted scan still in progress after 100ms\n");
1920 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
1921 return -EAGAIN;
1922 }
1923
bb8c093b 1924 iwl4965_commit_rxon(priv);
b481de9c
ZY
1925
1926 return 0;
1927}
1928
c79dd5b5 1929static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 1930 struct ieee80211_tx_control *ctl,
857485c0 1931 struct iwl_cmd *cmd,
b481de9c 1932 struct sk_buff *skb_frag,
deb09c43 1933 int sta_id)
b481de9c 1934{
deb09c43 1935 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
6974e363
EG
1936 struct iwl_wep_key *wepkey;
1937 int keyidx = 0;
1938
1939 BUG_ON(ctl->key_idx > 3);
b481de9c
ZY
1940
1941 switch (keyinfo->alg) {
1942 case ALG_CCMP:
1943 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
1944 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS
1945 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
1946 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY
1947 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
1948 break;
1949
1950 case ALG_TKIP:
b481de9c 1951 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG
1952 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
1953 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
1954 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY
1955 break;
1956
1957 case ALG_WEP:
6974e363
EG
1958 wepkey = &priv->wep_keys[ctl->key_idx];
1959 cmd->cmd.tx.sec_ctl = 0;
1960 if (priv->default_wep_key) {
1961 /* the WEP key was sent as static */
1962 keyidx = ctl->key_idx;
1963 memcpy(&cmd->cmd.tx.key[3], wepkey->key,
1964 wepkey->key_size);
1965 if (wepkey->key_size == WEP_KEY_LEN_128)
1966 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
1967 } else {
0211ddda
EG
1968 /* the WEP key was sent as dynamic */
1969 keyidx = keyinfo->keyidx;
1970 memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
1971 keyinfo->keylen);
1972 if (keyinfo->keylen == WEP_KEY_LEN_128)
1973 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
6974e363 1974 }
b481de9c 1975
6974e363
EG
1976 cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
1977 (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
b481de9c
ZY
1978
1979 IWL_DEBUG_TX("Configuring packet for WEP encryption "
6974e363 1980 "with key %d\n", keyidx);
b481de9c
ZY
1981 break;
1982
b481de9c
ZY
1983 default:
1984 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
1985 break;
1986 }
1987}
1988
1989/*
1990 * handle build REPLY_TX command notification.
1991 */
c79dd5b5 1992static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 1993 struct iwl_cmd *cmd,
b481de9c
ZY
1994 struct ieee80211_tx_control *ctrl,
1995 struct ieee80211_hdr *hdr,
1996 int is_unicast, u8 std_id)
1997{
1998 __le16 *qc;
1999 u16 fc = le16_to_cpu(hdr->frame_control);
2000 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2001
2002 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2003 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2004 tx_flags |= TX_CMD_FLG_ACK_MSK;
2005 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2006 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2007 if (ieee80211_is_probe_response(fc) &&
2008 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2009 tx_flags |= TX_CMD_FLG_TSF_MSK;
2010 } else {
2011 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2012 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2013 }
2014
87e4f7df
TW
2015 if (ieee80211_is_back_request(fc))
2016 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2017
2018
b481de9c
ZY
2019 cmd->cmd.tx.sta_id = std_id;
2020 if (ieee80211_get_morefrag(hdr))
2021 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2022
2023 qc = ieee80211_get_qos_ctrl(hdr);
2024 if (qc) {
2025 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2026 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2027 } else
2028 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2029
2030 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2031 tx_flags |= TX_CMD_FLG_RTS_MSK;
2032 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2033 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2034 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2035 tx_flags |= TX_CMD_FLG_CTS_MSK;
2036 }
2037
2038 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2039 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2040
2041 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2042 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2043 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2044 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2045 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2046 else
bc434dd2 2047 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 2048 } else {
b481de9c 2049 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
ab53d8af 2050 }
b481de9c
ZY
2051
2052 cmd->cmd.tx.driver_txop = 0;
2053 cmd->cmd.tx.tx_flags = tx_flags;
2054 cmd->cmd.tx.next_frame_len = 0;
2055}
19758bef
TW
2056static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2057{
2058 /* 0 - mgmt, 1 - cnt, 2 - data */
2059 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2060 priv->tx_stats[idx].cnt++;
2061 priv->tx_stats[idx].bytes += len;
2062}
6440adb5
CB
2063/**
2064 * iwl4965_get_sta_id - Find station's index within station table
2065 *
2066 * If new IBSS station, create new entry in station table
2067 */
c79dd5b5 2068static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 2069 struct ieee80211_hdr *hdr)
b481de9c
ZY
2070{
2071 int sta_id;
2072 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2073 DECLARE_MAC_BUF(mac);
b481de9c 2074
6440adb5 2075 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
2076 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2077 is_multicast_ether_addr(hdr->addr1))
5425e490 2078 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
2079
2080 switch (priv->iw_mode) {
2081
6440adb5
CB
2082 /* If we are a client station in a BSS network, use the special
2083 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY
2084 case IEEE80211_IF_TYPE_STA:
2085 return IWL_AP_ID;
2086
2087 /* If we are an AP, then find the station, or use BCAST */
2088 case IEEE80211_IF_TYPE_AP:
bb8c093b 2089 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
2090 if (sta_id != IWL_INVALID_STATION)
2091 return sta_id;
5425e490 2092 return priv->hw_params.bcast_sta_id;
b481de9c 2093
6440adb5
CB
2094 /* If this frame is going out to an IBSS network, find the station,
2095 * or create a new station table entry */
b481de9c 2096 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2097 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
2098 if (sta_id != IWL_INVALID_STATION)
2099 return sta_id;
2100
6440adb5 2101 /* Create new station table entry */
67d62035
RR
2102 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2103 0, CMD_ASYNC, NULL);
b481de9c
ZY
2104
2105 if (sta_id != IWL_INVALID_STATION)
2106 return sta_id;
2107
0795af57 2108 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2109 "Defaulting to broadcast...\n",
0795af57 2110 print_mac(mac, hdr->addr1));
0a6857e7 2111 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
5425e490 2112 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
2113
2114 default:
01ebd063 2115 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
5425e490 2116 return priv->hw_params.bcast_sta_id;
b481de9c
ZY
2117 }
2118}
2119
2120/*
2121 * start REPLY_TX command process
2122 */
c79dd5b5 2123static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY
2124 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2125{
2126 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2127 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY
2128 u32 *control_flags;
2129 int txq_id = ctl->queue;
bb8c093b
CH
2130 struct iwl4965_tx_queue *txq = NULL;
2131 struct iwl4965_queue *q = NULL;
b481de9c
ZY
2132 dma_addr_t phys_addr;
2133 dma_addr_t txcmd_phys;
87e4f7df 2134 dma_addr_t scratch_phys;
857485c0 2135 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY
2136 u16 len, idx, len_org;
2137 u8 id, hdr_len, unicast;
2138 u8 sta_id;
2139 u16 seq_number = 0;
2140 u16 fc;
2141 __le16 *qc;
2142 u8 wait_write_ptr = 0;
2143 unsigned long flags;
2144 int rc;
2145
2146 spin_lock_irqsave(&priv->lock, flags);
fee1247a 2147 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
2148 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2149 goto drop_unlock;
2150 }
2151
32bfd35d
JB
2152 if (!priv->vif) {
2153 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY
2154 goto drop_unlock;
2155 }
2156
8318d78a 2157 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY
2158 IWL_ERROR("ERROR: No TX rate available.\n");
2159 goto drop_unlock;
2160 }
2161
2162 unicast = !is_multicast_ether_addr(hdr->addr1);
2163 id = 0;
2164
2165 fc = le16_to_cpu(hdr->frame_control);
2166
0a6857e7 2167#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
2168 if (ieee80211_is_auth(fc))
2169 IWL_DEBUG_TX("Sending AUTH frame\n");
2170 else if (ieee80211_is_assoc_request(fc))
2171 IWL_DEBUG_TX("Sending ASSOC frame\n");
2172 else if (ieee80211_is_reassoc_request(fc))
2173 IWL_DEBUG_TX("Sending REASSOC frame\n");
2174#endif
2175
7878a5a4 2176 /* drop all data frame if we are not associated */
76f3915b 2177 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
3109ece1 2178 (!iwl_is_associated(priv) ||
a6477249 2179 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2180 !priv->assoc_station_added)) {
3109ece1 2181 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY
2182 goto drop_unlock;
2183 }
2184
2185 spin_unlock_irqrestore(&priv->lock, flags);
2186
2187 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB
2188
2189 /* Find (or create) index into station table for destination station */
bb8c093b 2190 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2191 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP
2192 DECLARE_MAC_BUF(mac);
2193
2194 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2195 print_mac(mac, hdr->addr1));
b481de9c
ZY
2196 goto drop;
2197 }
2198
2199 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2200
2201 qc = ieee80211_get_qos_ctrl(hdr);
2202 if (qc) {
2203 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2204 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2205 IEEE80211_SCTL_SEQ;
2206 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2207 (hdr->seq_ctrl &
2208 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2209 seq_number += 0x10;
c8b0e6e1 2210#ifdef CONFIG_IWL4965_HT
b481de9c 2211 /* aggregation is on for this <sta,tid> */
fe01b477 2212 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2213 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2214 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2215#endif /* CONFIG_IWL4965_HT */
b481de9c 2216 }
6440adb5
CB
2217
2218 /* Descriptor for chosen Tx queue */
b481de9c
ZY
2219 txq = &priv->txq[txq_id];
2220 q = &txq->q;
2221
2222 spin_lock_irqsave(&priv->lock, flags);
2223
6440adb5 2224 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2225 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY
2226 memset(tfd, 0, sizeof(*tfd));
2227 control_flags = (u32 *) tfd;
fc4b6853 2228 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2229
6440adb5 2230 /* Set up driver data for this TFD */
bb8c093b 2231 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW
2232 txq->txb[q->write_ptr].skb[0] = skb;
2233 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2234 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB
2235
2236 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY
2237 out_cmd = &txq->cmd[idx];
2238 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2239 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB
2240
2241 /*
2242 * Set up the Tx-command (not MAC!) header.
2243 * Store the chosen Tx queue and TFD index within the sequence field;
2244 * after Tx, uCode's Tx response will return this value so driver can
2245 * locate the frame within the tx queue and do post-tx processing.
2246 */
b481de9c
ZY
2247 out_cmd->hdr.cmd = REPLY_TX;
2248 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2249 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB
2250
2251 /* Copy MAC header from skb into command buffer */
b481de9c
ZY
2252 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2253
6440adb5
CB
2254 /*
2255 * Use the first empty entry in this queue's command buffer array
2256 * to contain the Tx command and MAC header concatenated together
2257 * (payload data will be in another buffer).
2258 * Size of this varies, due to varying MAC header length.
2259 * If end is not dword aligned, we'll have 2 extra bytes at the end
2260 * of the MAC header (device reads on dword boundaries).
2261 * We'll tell device about this padding later.
2262 */
5425e490 2263 len = priv->hw_params.tx_cmd_len +
857485c0 2264 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY
2265
2266 len_org = len;
2267 len = (len + 3) & ~3;
2268
2269 if (len_org != len)
2270 len_org = 1;
2271 else
2272 len_org = 0;
2273
6440adb5
CB
2274 /* Physical address of this Tx command's header (not MAC header!),
2275 * within command buffer array. */
857485c0
TW
2276 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2277 offsetof(struct iwl_cmd, hdr);
b481de9c 2278
6440adb5
CB
2279 /* Add buffer containing Tx command and MAC(!) header to TFD's
2280 * first entry */
bb8c093b 2281 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY
2282
2283 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2284 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2285
6440adb5
CB
2286 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2287 * if any (802.11 null frames have no payload). */
b481de9c
ZY
2288 len = skb->len - hdr_len;
2289 if (len) {
2290 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2291 len, PCI_DMA_TODEVICE);
bb8c093b 2292 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY
2293 }
2294
6440adb5 2295 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY
2296 if (len_org)
2297 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2298
6440adb5 2299 /* Total # bytes to be transmitted */
b481de9c
ZY
2300 len = (u16)skb->len;
2301 out_cmd->cmd.tx.len = cpu_to_le16(len);
2302
2303 /* TODO need this for burst mode later on */
bb8c093b 2304 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY
2305
2306 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2307 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2308
19758bef
TW
2309 iwl_update_tx_stats(priv, fc, len);
2310
857485c0 2311 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW
2312 offsetof(struct iwl4965_tx_cmd, scratch);
2313 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2314 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2315
b481de9c
ZY
2316 if (!ieee80211_get_morefrag(hdr)) {
2317 txq->need_update = 1;
2318 if (qc) {
2319 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2320 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2321 }
2322 } else {
2323 wait_write_ptr = 1;
2324 txq->need_update = 0;
2325 }
2326
0a6857e7 2327 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY
2328 sizeof(out_cmd->cmd.tx));
2329
0a6857e7 2330 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY
2331 ieee80211_get_hdrlen(fc));
2332
6440adb5 2333 /* Set up entry for this TFD in Tx byte-count array */
e2a722eb 2334 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
b481de9c 2335
6440adb5 2336 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2337 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2338 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
2339 spin_unlock_irqrestore(&priv->lock, flags);
2340
2341 if (rc)
2342 return rc;
2343
bb8c093b 2344 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY
2345 && priv->mac80211_registered) {
2346 if (wait_write_ptr) {
2347 spin_lock_irqsave(&priv->lock, flags);
2348 txq->need_update = 1;
bb8c093b 2349 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
2350 spin_unlock_irqrestore(&priv->lock, flags);
2351 }
2352
2353 ieee80211_stop_queue(priv->hw, ctl->queue);
2354 }
2355
2356 return 0;
2357
2358drop_unlock:
2359 spin_unlock_irqrestore(&priv->lock, flags);
2360drop:
2361 return -1;
2362}
2363
c79dd5b5 2364static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2365{
8318d78a 2366 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
2367 struct ieee80211_rate *rate;
2368 int i;
2369
8318d78a 2370 hw = iwl4965_get_hw_mode(priv, priv->band);
c4ba9621
SA
2371 if (!hw) {
2372 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2373 return;
2374 }
b481de9c
ZY
2375
2376 priv->active_rate = 0;
2377 priv->active_rate_basic = 0;
2378
8318d78a
JB
2379 for (i = 0; i < hw->n_bitrates; i++) {
2380 rate = &(hw->bitrates[i]);
2381 if (rate->hw_value < IWL_RATE_COUNT)
2382 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
2383 }
2384
2385 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2386 priv->active_rate, priv->active_rate_basic);
2387
2388 /*
2389 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2390 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2391 * OFDM
2392 */
2393 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2394 priv->staging_rxon.cck_basic_rates =
2395 ((priv->active_rate_basic &
2396 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2397 else
2398 priv->staging_rxon.cck_basic_rates =
2399 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2400
2401 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2402 priv->staging_rxon.ofdm_basic_rates =
2403 ((priv->active_rate_basic &
2404 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2405 IWL_FIRST_OFDM_RATE) & 0xFF;
2406 else
2407 priv->staging_rxon.ofdm_basic_rates =
2408 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2409}
2410
ad97edd2 2411void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY
2412{
2413 unsigned long flags;
2414
2415 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2416 return;
2417
2418 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2419 disable_radio ? "OFF" : "ON");
2420
2421 if (disable_radio) {
bb8c093b 2422 iwl4965_scan_cancel(priv);
b481de9c
ZY
2423 /* FIXME: This is a workaround for AP */
2424 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2425 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2426 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
2427 CSR_UCODE_SW_BIT_RFKILL);
2428 spin_unlock_irqrestore(&priv->lock, flags);
ad97edd2 2429 /* call the host command only if no hw rf-kill set */
59003835
MA
2430 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
2431 iwl_is_ready(priv))
ad97edd2
MA
2432 iwl4965_send_card_state(priv,
2433 CARD_STATE_CMD_DISABLE,
2434 0);
b481de9c 2435 set_bit(STATUS_RF_KILL_SW, &priv->status);
ad97edd2
MA
2436
2437 /* make sure mac80211 stop sending Tx frame */
2438 if (priv->mac80211_registered)
2439 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2440 }
2441 return;
2442 }
2443
2444 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2445 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2446
2447 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2448 spin_unlock_irqrestore(&priv->lock, flags);
2449
2450 /* wake up ucode */
2451 msleep(10);
2452
2453 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2454 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2455 if (!iwl_grab_nic_access(priv))
2456 iwl_release_nic_access(priv);
b481de9c
ZY
2457 spin_unlock_irqrestore(&priv->lock, flags);
2458
2459 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2460 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2461 "disabled by HW switch\n");
2462 return;
2463 }
2464
2465 queue_work(priv->workqueue, &priv->restart);
2466 return;
2467}
2468
c79dd5b5 2469void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
b481de9c
ZY
2470 u32 decrypt_res, struct ieee80211_rx_status *stats)
2471{
2472 u16 fc =
2473 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2474
2475 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2476 return;
2477
2478 if (!(fc & IEEE80211_FCTL_PROTECTED))
2479 return;
2480
2481 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2482 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2483 case RX_RES_STATUS_SEC_TYPE_TKIP:
17e476b8
EG
2484 /* The uCode has got a bad phase 1 Key, pushes the packet.
2485 * Decryption will be done in SW. */
2486 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2487 RX_RES_STATUS_BAD_KEY_TTAK)
2488 break;
2489
b481de9c
ZY
2490 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2491 RX_RES_STATUS_BAD_ICV_MIC)
2492 stats->flag |= RX_FLAG_MMIC_ERROR;
2493 case RX_RES_STATUS_SEC_TYPE_WEP:
2494 case RX_RES_STATUS_SEC_TYPE_CCMP:
2495 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2496 RX_RES_STATUS_DECRYPT_OK) {
2497 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2498 stats->flag |= RX_FLAG_DECRYPTED;
2499 }
2500 break;
2501
2502 default:
2503 break;
2504 }
2505}
2506
b481de9c
ZY
2507
2508#define IWL_PACKET_RETRY_TIME HZ
2509
c79dd5b5 2510int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
2511{
2512 u16 sc = le16_to_cpu(header->seq_ctrl);
2513 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2514 u16 frag = sc & IEEE80211_SCTL_FRAG;
2515 u16 *last_seq, *last_frag;
2516 unsigned long *last_time;
2517
2518 switch (priv->iw_mode) {
2519 case IEEE80211_IF_TYPE_IBSS:{
2520 struct list_head *p;
bb8c093b 2521 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY
2522 u8 *mac = header->addr2;
2523 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2524
2525 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2526 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY
2527 if (!compare_ether_addr(entry->mac, mac))
2528 break;
2529 }
2530 if (p == &priv->ibss_mac_hash[index]) {
2531 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2532 if (!entry) {
bc434dd2 2533 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY
2534 return 0;
2535 }
2536 memcpy(entry->mac, mac, ETH_ALEN);
2537 entry->seq_num = seq;
2538 entry->frag_num = frag;
2539 entry->packet_time = jiffies;
bc434dd2 2540 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY
2541 return 0;
2542 }
2543 last_seq = &entry->seq_num;
2544 last_frag = &entry->frag_num;
2545 last_time = &entry->packet_time;
2546 break;
2547 }
2548 case IEEE80211_IF_TYPE_STA:
2549 last_seq = &priv->last_seq_num;
2550 last_frag = &priv->last_frag_num;
2551 last_time = &priv->last_packet_time;
2552 break;
2553 default:
2554 return 0;
2555 }
2556 if ((*last_seq == seq) &&
2557 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2558 if (*last_frag == frag)
2559 goto drop;
2560 if (*last_frag + 1 != frag)
2561 /* out-of-order fragment */
2562 goto drop;
2563 } else
2564 *last_seq = seq;
2565
2566 *last_frag = frag;
2567 *last_time = jiffies;
2568 return 0;
2569
2570 drop:
2571 return 1;
2572}
2573
c8b0e6e1 2574#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
2575
2576#include "iwl-spectrum.h"
2577
2578#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2579#define BEACON_TIME_MASK_HIGH 0xFF000000
2580#define TIME_UNIT 1024
2581
2582/*
2583 * extended beacon time format
2584 * time in usec will be changed into a 32-bit value in 8:24 format
2585 * the high 1 byte is the beacon counts
2586 * the lower 3 bytes is the time in usec within one beacon interval
2587 */
2588
bb8c093b 2589static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
2590{
2591 u32 quot;
2592 u32 rem;
2593 u32 interval = beacon_interval * 1024;
2594
2595 if (!interval || !usec)
2596 return 0;
2597
2598 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2599 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2600
2601 return (quot << 24) + rem;
2602}
2603
2604/* base is usually what we get from ucode with each received frame,
2605 * the same as HW timer counter counting down
2606 */
2607
bb8c093b 2608static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
2609{
2610 u32 base_low = base & BEACON_TIME_MASK_LOW;
2611 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2612 u32 interval = beacon_interval * TIME_UNIT;
2613 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2614 (addon & BEACON_TIME_MASK_HIGH);
2615
2616 if (base_low > addon_low)
2617 res += base_low - addon_low;
2618 else if (base_low < addon_low) {
2619 res += interval + base_low - addon_low;
2620 res += (1 << 24);
2621 } else
2622 res += (1 << 24);
2623
2624 return cpu_to_le32(res);
2625}
2626
c79dd5b5 2627static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
2628 struct ieee80211_measurement_params *params,
2629 u8 type)
2630{
bb8c093b
CH
2631 struct iwl4965_spectrum_cmd spectrum;
2632 struct iwl4965_rx_packet *res;
857485c0 2633 struct iwl_host_cmd cmd = {
b481de9c
ZY
2634 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2635 .data = (void *)&spectrum,
2636 .meta.flags = CMD_WANT_SKB,
2637 };
2638 u32 add_time = le64_to_cpu(params->start_time);
2639 int rc;
2640 int spectrum_resp_status;
2641 int duration = le16_to_cpu(params->duration);
2642
3109ece1 2643 if (iwl_is_associated(priv))
b481de9c 2644 add_time =
bb8c093b 2645 iwl4965_usecs_to_beacons(
b481de9c
ZY
2646 le64_to_cpu(params->start_time) - priv->last_tsf,
2647 le16_to_cpu(priv->rxon_timing.beacon_interval));
2648
2649 memset(&spectrum, 0, sizeof(spectrum));
2650
2651 spectrum.channel_count = cpu_to_le16(1);
2652 spectrum.flags =
2653 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2654 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2655 cmd.len = sizeof(spectrum);
2656 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2657
3109ece1 2658 if (iwl_is_associated(priv))
b481de9c 2659 spectrum.start_time =
bb8c093b 2660 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
2661 add_time,
2662 le16_to_cpu(priv->rxon_timing.beacon_interval));
2663 else
2664 spectrum.start_time = 0;
2665
2666 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2667 spectrum.channels[0].channel = params->channel;
2668 spectrum.channels[0].type = type;
2669 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2670 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2671 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2672
857485c0 2673 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
2674 if (rc)
2675 return rc;
2676
bb8c093b 2677 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
2678 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2679 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2680 rc = -EIO;
2681 }
2682
2683 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2684 switch (spectrum_resp_status) {
2685 case 0: /* Command will be handled */
2686 if (res->u.spectrum.id != 0xff) {
2687 IWL_DEBUG_INFO
2688 ("Replaced existing measurement: %d\n",
2689 res->u.spectrum.id);
2690 priv->measurement_status &= ~MEASUREMENT_READY;
2691 }
2692 priv->measurement_status |= MEASUREMENT_ACTIVE;
2693 rc = 0;
2694 break;
2695
2696 case 1: /* Command will not be handled */
2697 rc = -EAGAIN;
2698 break;
2699 }
2700
2701 dev_kfree_skb_any(cmd.meta.u.skb);
2702
2703 return rc;
2704}
2705#endif
2706
c79dd5b5 2707static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2708 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY
2709{
2710
2711 tx_sta->status.ack_signal = 0;
2712 tx_sta->status.excessive_retries = 0;
2713 tx_sta->status.queue_length = 0;
2714 tx_sta->status.queue_number = 0;
2715
2716 if (in_interrupt())
2717 ieee80211_tx_status_irqsafe(priv->hw,
2718 tx_sta->skb[0], &(tx_sta->status));
2719 else
2720 ieee80211_tx_status(priv->hw,
2721 tx_sta->skb[0], &(tx_sta->status));
2722
2723 tx_sta->skb[0] = NULL;
2724}
2725
2726/**
6440adb5 2727 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2728 *
6440adb5
CB
2729 * When FW advances 'R' index, all entries between old and new 'R' index
2730 * need to be reclaimed. As result, some free space forms. If there is
2731 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2732 */
c79dd5b5 2733int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2734{
bb8c093b
CH
2735 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2736 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY
2737 int nfreed = 0;
2738
2739 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2740 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2741 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2742 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY
2743 return 0;
2744 }
2745
c54b679d 2746 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2747 q->read_ptr != index;
c54b679d 2748 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2749 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2750 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2751 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2752 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY
2753 } else if (nfreed > 1) {
2754 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2755 q->write_ptr, q->read_ptr);
b481de9c
ZY
2756 queue_work(priv->workqueue, &priv->restart);
2757 }
2758 nfreed++;
2759 }
2760
fe01b477 2761/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY
2762 (txq_id != IWL_CMD_QUEUE_NUM) &&
2763 priv->mac80211_registered)
fe01b477 2764 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY
2765
2766
2767 return nfreed;
2768}
2769
bb8c093b 2770static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY
2771{
2772 status &= TX_STATUS_MSK;
2773 return (status == TX_STATUS_SUCCESS)
2774 || (status == TX_STATUS_DIRECT_DONE);
2775}
2776
2777/******************************************************************************
2778 *
2779 * Generic RX handler implementations
2780 *
2781 ******************************************************************************/
c8b0e6e1 2782#ifdef CONFIG_IWL4965_HT
b481de9c 2783
c79dd5b5 2784static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY
2785 struct ieee80211_hdr *hdr)
2786{
2787 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2788 return IWL_AP_ID;
2789 else {
2790 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 2791 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY
2792 }
2793}
2794
bb8c093b 2795static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2796 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY
2797{
2798 if (priv->txq[txq_id].txb[idx].skb[0])
2799 return (struct ieee80211_hdr *)priv->txq[txq_id].
2800 txb[idx].skb[0]->data;
2801 return NULL;
2802}
2803
bb8c093b 2804static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY
2805{
2806 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2807 tx_resp->frame_count);
2808 return le32_to_cpu(*scd_ssn) & MAX_SN;
2809
2810}
6440adb5
CB
2811
2812/**
2813 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2814 */
c79dd5b5 2815static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2816 struct iwl4965_ht_agg *agg,
fe01b477 2817 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY
2818 u16 start_idx)
2819{
fe01b477
RR
2820 u16 status;
2821 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY
2822 struct ieee80211_tx_status *tx_status = NULL;
2823 struct ieee80211_hdr *hdr = NULL;
2824 int i, sh;
2825 int txq_id, idx;
2826 u16 seq;
2827
2828 if (agg->wait_for_ba)
6440adb5 2829 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY
2830
2831 agg->frame_count = tx_resp->frame_count;
2832 agg->start_idx = start_idx;
2833 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2834 agg->bitmap = 0;
b481de9c 2835
6440adb5 2836 /* # frames attempted by Tx command */
b481de9c 2837 if (agg->frame_count == 1) {
6440adb5 2838 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR
2839 status = le16_to_cpu(frame_status[0].status);
2840 seq = le16_to_cpu(frame_status[0].sequence);
2841 idx = SEQ_TO_INDEX(seq);
2842 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 2843
b481de9c 2844 /* FIXME: code repetition */
fe01b477
RR
2845 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2846 agg->frame_count, agg->start_idx, idx);
b481de9c 2847
fe01b477 2848 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY
2849 tx_status->retry_count = tx_resp->failure_frame;
2850 tx_status->queue_number = status & 0xff;
fe01b477
RR
2851 tx_status->queue_length = tx_resp->failure_rts;
2852 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 2853 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 2854 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR
2855 iwl4965_hwrate_to_tx_control(priv,
2856 le32_to_cpu(tx_resp->rate_n_flags),
2857 &tx_status->control);
b481de9c
ZY
2858 /* FIXME: code repetition end */
2859
2860 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2861 status & 0xff, tx_resp->failure_frame);
2862 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 2863 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY
2864
2865 agg->wait_for_ba = 0;
2866 } else {
6440adb5 2867 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY
2868 u64 bitmap = 0;
2869 int start = agg->start_idx;
2870
6440adb5 2871 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY
2872 for (i = 0; i < agg->frame_count; i++) {
2873 u16 sc;
fe01b477
RR
2874 status = le16_to_cpu(frame_status[i].status);
2875 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY
2876 idx = SEQ_TO_INDEX(seq);
2877 txq_id = SEQ_TO_QUEUE(seq);
2878
2879 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2880 AGG_TX_STATE_ABORT_MSK))
2881 continue;
2882
2883 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2884 agg->frame_count, txq_id, idx);
2885
bb8c093b 2886 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY
2887
2888 sc = le16_to_cpu(hdr->seq_ctrl);
2889 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2890 IWL_ERROR("BUG_ON idx doesn't match seq control"
2891 " idx=%d, seq_idx=%d, seq=%d\n",
2892 idx, SEQ_TO_SN(sc),
2893 hdr->seq_ctrl);
2894 return -1;
2895 }
2896
2897 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2898 i, idx, SEQ_TO_SN(sc));
2899
2900 sh = idx - start;
2901 if (sh > 64) {
2902 sh = (start - idx) + 0xff;
2903 bitmap = bitmap << sh;
2904 sh = 0;
2905 start = idx;
2906 } else if (sh < -64)
2907 sh = 0xff - (start - idx);
2908 else if (sh < 0) {
2909 sh = start - idx;
2910 start = idx;
2911 bitmap = bitmap << sh;
2912 sh = 0;
2913 }
2914 bitmap |= (1 << sh);
2915 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2916 start, (u32)(bitmap & 0xFFFFFFFF));
2917 }
2918
fe01b477 2919 agg->bitmap = bitmap;
b481de9c
ZY
2920 agg->start_idx = start;
2921 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2922 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 2923 agg->frame_count, agg->start_idx,
06501d29 2924 (unsigned long long)agg->bitmap);
b481de9c
ZY
2925
2926 if (bitmap)
2927 agg->wait_for_ba = 1;
2928 }
2929 return 0;
2930}
2931#endif
b481de9c 2932
6440adb5
CB
2933/**
2934 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2935 */
c79dd5b5 2936static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 2937 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2938{
bb8c093b 2939 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
2940 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2941 int txq_id = SEQ_TO_QUEUE(sequence);
2942 int index = SEQ_TO_INDEX(sequence);
bb8c093b 2943 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 2944 struct ieee80211_tx_status *tx_status;
bb8c093b 2945 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 2946 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 2947#ifdef CONFIG_IWL4965_HT
fe01b477
RR
2948 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2949 struct ieee80211_hdr *hdr;
2950 __le16 *qc;
b481de9c
ZY
2951#endif
2952
2953 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
2954 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2955 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW
2956 index, txq->q.n_bd, txq->q.write_ptr,
2957 txq->q.read_ptr);
b481de9c
ZY
2958 return;
2959 }
2960
c8b0e6e1 2961#ifdef CONFIG_IWL4965_HT
fe01b477
RR
2962 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
2963 qc = ieee80211_get_qos_ctrl(hdr);
2964
2965 if (qc)
2966 tid = le16_to_cpu(*qc) & 0xf;
2967
2968 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
2969 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2970 IWL_ERROR("Station not known\n");
2971 return;
2972 }
2973
b481de9c 2974 if (txq->sched_retry) {
bb8c093b 2975 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 2976 struct iwl4965_ht_agg *agg = NULL;
b481de9c 2977
fe01b477 2978 if (!qc)
b481de9c 2979 return;
b481de9c
ZY
2980
2981 agg = &priv->stations[sta_id].tid[tid].agg;
2982
fe01b477
RR
2983 iwl4965_tx_status_reply_tx(priv, agg,
2984 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY
2985
2986 if ((tx_resp->frame_count == 1) &&
bb8c093b 2987 !iwl4965_is_tx_success(status)) {
b481de9c
ZY
2988 /* TODO: send BAR */
2989 }
2990
fe01b477
RR
2991 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2992 int freed;
c54b679d 2993 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY
2994 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2995 "%d index %d\n", scd_ssn , index);
fe01b477
RR
2996 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2997 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2998
2999 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3000 txq_id >= 0 && priv->mac80211_registered &&
3001 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3002 ieee80211_wake_queue(priv->hw, txq_id);
3003
3004 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY
3005 }
3006 } else {
c8b0e6e1 3007#endif /* CONFIG_IWL4965_HT */
fc4b6853 3008 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY
3009
3010 tx_status->retry_count = tx_resp->failure_frame;
3011 tx_status->queue_number = status;
3012 tx_status->queue_length = tx_resp->bt_kill_count;
3013 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 3014 tx_status->flags =
bb8c093b 3015 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR
3016 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
3017 &tx_status->control);
b481de9c 3018
b481de9c 3019 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3020 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY
3021 status, le32_to_cpu(tx_resp->rate_n_flags),
3022 tx_resp->failure_frame);
3023
3024 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR
3025 if (index != -1) {
3026 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3027#ifdef CONFIG_IWL4965_HT
3028 if (tid != MAX_TID_COUNT)
3029 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3030 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3031 (txq_id >= 0) &&
3032 priv->mac80211_registered)
3033 ieee80211_wake_queue(priv->hw, txq_id);
3034 if (tid != MAX_TID_COUNT)
3035 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3036#endif
3037 }
c8b0e6e1 3038#ifdef CONFIG_IWL4965_HT
b481de9c 3039 }
c8b0e6e1 3040#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY
3041
3042 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3043 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3044}
3045
3046
c79dd5b5 3047static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 3048 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3049{
bb8c093b
CH
3050 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3051 struct iwl4965_alive_resp *palive;
b481de9c
ZY
3052 struct delayed_work *pwork;
3053
3054 palive = &pkt->u.alive_frame;
3055
3056 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3057 "0x%01X 0x%01X\n",
3058 palive->is_valid, palive->ver_type,
3059 palive->ver_subtype);
3060
3061 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3062 IWL_DEBUG_INFO("Initialization Alive received.\n");
3063 memcpy(&priv->card_alive_init,
3064 &pkt->u.alive_frame,
bb8c093b 3065 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY
3066 pwork = &priv->init_alive_start;
3067 } else {
3068 IWL_DEBUG_INFO("Runtime Alive received.\n");
3069 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3070 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
3071 pwork = &priv->alive_start;
3072 }
3073
3074 /* We delay the ALIVE response by 5ms to
3075 * give the HW RF Kill time to activate... */
3076 if (palive->is_valid == UCODE_VALID_OK)
3077 queue_delayed_work(priv->workqueue, pwork,
3078 msecs_to_jiffies(5));
3079 else
3080 IWL_WARNING("uCode did not respond OK.\n");
3081}
3082
c79dd5b5 3083static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 3084 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3085{
bb8c093b 3086 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3087
3088 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3089 return;
3090}
3091
c79dd5b5 3092static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 3093 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3094{
bb8c093b 3095 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3096
3097 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3098 "seq 0x%04X ser 0x%08X\n",
3099 le32_to_cpu(pkt->u.err_resp.error_type),
3100 get_cmd_string(pkt->u.err_resp.cmd_id),
3101 pkt->u.err_resp.cmd_id,
3102 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3103 le32_to_cpu(pkt->u.err_resp.error_info));
3104}
3105
3106#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3107
c79dd5b5 3108static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3109{
bb8c093b
CH
3110 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3111 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3112 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
3113 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3114 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3115 rxon->channel = csa->channel;
3116 priv->staging_rxon.channel = csa->channel;
3117}
3118
c79dd5b5 3119static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 3120 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3121{
c8b0e6e1 3122#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH
3123 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3124 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
3125
3126 if (!report->state) {
3127 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3128 "Spectrum Measure Notification: Start\n");
3129 return;
3130 }
3131
3132 memcpy(&priv->measure_report, report, sizeof(*report));
3133 priv->measurement_status |= MEASUREMENT_READY;
3134#endif
3135}
3136
c79dd5b5 3137static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 3138 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3139{
0a6857e7 3140#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
3141 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3142 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
3143 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3144 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3145#endif
3146}
3147
c79dd5b5 3148static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 3149 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3150{
bb8c093b 3151 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3152 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3153 "notification for %s:\n",
3154 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 3155 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
3156}
3157
bb8c093b 3158static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3159{
c79dd5b5
TW
3160 struct iwl_priv *priv =
3161 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
3162 struct sk_buff *beacon;
3163
3164 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 3165 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY
3166
3167 if (!beacon) {
3168 IWL_ERROR("update beacon failed\n");
3169 return;
3170 }
3171
3172 mutex_lock(&priv->mutex);
3173 /* new beacon skb is allocated every time; dispose previous.*/
3174 if (priv->ibss_beacon)
3175 dev_kfree_skb(priv->ibss_beacon);
3176
3177 priv->ibss_beacon = beacon;
3178 mutex_unlock(&priv->mutex);
3179
bb8c093b 3180 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
3181}
3182
c79dd5b5 3183static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 3184 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3185{
0a6857e7 3186#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
3187 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3188 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3189 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
3190
3191 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3192 "tsf %d %d rate %d\n",
3193 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3194 beacon->beacon_notify_hdr.failure_frame,
3195 le32_to_cpu(beacon->ibss_mgr_status),
3196 le32_to_cpu(beacon->high_tsf),
3197 le32_to_cpu(beacon->low_tsf), rate);
3198#endif
3199
3200 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3201 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3202 queue_work(priv->workqueue, &priv->beacon_update);
3203}
3204
3205/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3206static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3207 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3208{
0a6857e7 3209#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH
3210 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3211 struct iwl4965_scanreq_notification *notif =
3212 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY
3213
3214 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3215#endif
3216}
3217
3218/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3219static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3220 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3221{
bb8c093b
CH
3222 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3223 struct iwl4965_scanstart_notification *notif =
3224 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY
3225 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3226 IWL_DEBUG_SCAN("Scan start: "
3227 "%d [802.11%s] "
3228 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3229 notif->channel,
3230 notif->band ? "bg" : "a",
3231 notif->tsf_high,
3232 notif->tsf_low, notif->status, notif->beacon_timer);
3233}
3234
3235/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3236static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3237 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3238{
bb8c093b
CH
3239 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3240 struct iwl4965_scanresults_notification *notif =
3241 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY
3242
3243 IWL_DEBUG_SCAN("Scan ch.res: "
3244 "%d [802.11%s] "
3245 "(TSF: 0x%08X:%08X) - %d "
3246 "elapsed=%lu usec (%dms since last)\n",
3247 notif->channel,
3248 notif->band ? "bg" : "a",
3249 le32_to_cpu(notif->tsf_high),
3250 le32_to_cpu(notif->tsf_low),
3251 le32_to_cpu(notif->statistics[0]),
3252 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3253 jiffies_to_msecs(elapsed_jiffies
3254 (priv->last_scan_jiffies, jiffies)));
3255
3256 priv->last_scan_jiffies = jiffies;
7878a5a4 3257 priv->next_scan_jiffies = 0;
b481de9c
ZY
3258}
3259
3260/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3261static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3262 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3263{
bb8c093b
CH
3264 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3265 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY
3266
3267 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3268 scan_notif->scanned_channels,
3269 scan_notif->tsf_low,
3270 scan_notif->tsf_high, scan_notif->status);
3271
3272 /* The HW is no longer scanning */
3273 clear_bit(STATUS_SCAN_HW, &priv->status);
3274
3275 /* The scan completion notification came in, so kill that timer... */
3276 cancel_delayed_work(&priv->scan_check);
3277
3278 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3279 (priv->scan_bands == 2) ? "2.4" : "5.2",
3280 jiffies_to_msecs(elapsed_jiffies
3281 (priv->scan_pass_start, jiffies)));
3282
3283 /* Remove this scanned band from the list
3284 * of pending bands to scan */
3285 priv->scan_bands--;
3286
3287 /* If a request to abort was given, or the scan did not succeed
3288 * then we reset the scan state machine and terminate,
3289 * re-queuing another scan if one has been requested */
3290 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3291 IWL_DEBUG_INFO("Aborted scan completed.\n");
3292 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3293 } else {
3294 /* If there are more bands on this scan pass reschedule */
3295 if (priv->scan_bands > 0)
3296 goto reschedule;
3297 }
3298
3299 priv->last_scan_jiffies = jiffies;
7878a5a4 3300 priv->next_scan_jiffies = 0;
b481de9c
ZY
3301 IWL_DEBUG_INFO("Setting scan to off\n");
3302
3303 clear_bit(STATUS_SCANNING, &priv->status);
3304
3305 IWL_DEBUG_INFO("Scan took %dms\n",
3306 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3307
3308 queue_work(priv->workqueue, &priv->scan_completed);
3309
3310 return;
3311
3312reschedule:
3313 priv->scan_pass_start = jiffies;
3314 queue_work(priv->workqueue, &priv->request_scan);
3315}
3316
3317/* Handle notification from uCode that card's power state is changing
3318 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3319static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3320 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3321{
bb8c093b 3322 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3323 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3324 unsigned long status = priv->status;
3325
3326 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3327 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3328 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3329
3330 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3331 RF_CARD_DISABLED)) {
3332
3395f6e9 3333 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
3334 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3335
3395f6e9
TW
3336 if (!iwl_grab_nic_access(priv)) {
3337 iwl_write_direct32(
b481de9c
ZY
3338 priv, HBUS_TARG_MBX_C,
3339 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3340
3395f6e9 3341 iwl_release_nic_access(priv);
b481de9c
ZY
3342 }
3343
3344 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 3345 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3346 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
3347 if (!iwl_grab_nic_access(priv)) {
3348 iwl_write_direct32(
b481de9c
ZY
3349 priv, HBUS_TARG_MBX_C,
3350 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3351
3395f6e9 3352 iwl_release_nic_access(priv);
b481de9c
ZY
3353 }
3354 }
3355
3356 if (flags & RF_CARD_DISABLED) {
3395f6e9 3357 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3358 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
3359 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3360 if (!iwl_grab_nic_access(priv))
3361 iwl_release_nic_access(priv);
b481de9c
ZY
3362 }
3363 }
3364
3365 if (flags & HW_CARD_DISABLED)
3366 set_bit(STATUS_RF_KILL_HW, &priv->status);
3367 else
3368 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3369
3370
3371 if (flags & SW_CARD_DISABLED)
3372 set_bit(STATUS_RF_KILL_SW, &priv->status);
3373 else
3374 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3375
3376 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3377 iwl4965_scan_cancel(priv);
b481de9c
ZY
3378
3379 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3380 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3381 (test_bit(STATUS_RF_KILL_SW, &status) !=
3382 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3383 queue_work(priv->workqueue, &priv->rf_kill);
3384 else
3385 wake_up_interruptible(&priv->wait_command_queue);
3386}
3387
3388/**
bb8c093b 3389 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
3390 *
3391 * Setup the RX handlers for each of the reply types sent from the uCode
3392 * to the host.
3393 *
3394 * This function chains into the hardware specific files for them to setup
3395 * any hardware specific handlers as well.
3396 */
c79dd5b5 3397static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3398{
bb8c093b
CH
3399 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3400 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3401 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3402 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3403 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
3404 iwl4965_rx_spectrum_measure_notif;
3405 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3406 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
3407 iwl4965_rx_pm_debug_statistics_notif;
3408 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3409
9fbab516
BC
3410 /*
3411 * The same handler is used for both the REPLY to a discrete
3412 * statistics request from the host as well as for the periodic
3413 * statistics notifications (after received beacons) from the uCode.
b481de9c 3414 */
bb8c093b
CH
3415 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3416 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3417
bb8c093b
CH
3418 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3419 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3420 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3421 iwl4965_rx_scan_results_notif;
b481de9c 3422 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH
3423 iwl4965_rx_scan_complete_notif;
3424 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3425 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3426
9fbab516 3427 /* Set up hardware specific Rx handlers */
bb8c093b 3428 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY
3429}
3430
3431/**
bb8c093b 3432 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
3433 * @rxb: Rx buffer to reclaim
3434 *
3435 * If an Rx buffer has an async callback associated with it the callback
3436 * will be executed. The attached skb (if present) will only be freed
3437 * if the callback returns 1
3438 */
c79dd5b5 3439static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3440 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3441{
bb8c093b 3442 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
3443 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3444 int txq_id = SEQ_TO_QUEUE(sequence);
3445 int index = SEQ_TO_INDEX(sequence);
3446 int huge = sequence & SEQ_HUGE_FRAME;
3447 int cmd_index;
857485c0 3448 struct iwl_cmd *cmd;
b481de9c
ZY
3449
3450 /* If a Tx command is being handled and it isn't in the actual
3451 * command queue then there a command routing bug has been introduced
3452 * in the queue management code. */
3453 if (txq_id != IWL_CMD_QUEUE_NUM)
3454 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3455 txq_id, pkt->hdr.cmd);
3456 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3457
3458 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3459 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3460
3461 /* Input error checking is done when commands are added to queue. */
3462 if (cmd->meta.flags & CMD_WANT_SKB) {
3463 cmd->meta.source->u.skb = rxb->skb;
3464 rxb->skb = NULL;
3465 } else if (cmd->meta.u.callback &&
3466 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3467 rxb->skb = NULL;
3468
bb8c093b 3469 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
3470
3471 if (!(cmd->meta.flags & CMD_ASYNC)) {
3472 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3473 wake_up_interruptible(&priv->wait_command_queue);
3474 }
3475}
3476
3477/************************** RX-FUNCTIONS ****************************/
3478/*
3479 * Rx theory of operation
3480 *
9fbab516
BC
3481 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3482 * each of which point to Receive Buffers to be filled by 4965. These get
3483 * used not only for Rx frames, but for any command response or notification
3484 * from the 4965. The driver and 4965 manage the Rx buffers by means
3485 * of indexes into the circular buffer.
b481de9c
ZY
3486 *
3487 * Rx Queue Indexes
3488 * The host/firmware share two index registers for managing the Rx buffers.
3489 *
3490 * The READ index maps to the first position that the firmware may be writing
3491 * to -- the driver can read up to (but not including) this position and get
3492 * good data.
3493 * The READ index is managed by the firmware once the card is enabled.
3494 *
3495 * The WRITE index maps to the last position the driver has read from -- the
3496 * position preceding WRITE is the last slot the firmware can place a packet.
3497 *
3498 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3499 * WRITE = READ.
3500 *
9fbab516 3501 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
3502 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3503 *
9fbab516 3504 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
3505 * and fire the RX interrupt. The driver can then query the READ index and
3506 * process as many packets as possible, moving the WRITE index forward as it
3507 * resets the Rx queue buffers with new memory.
3508 *
3509 * The management in the driver is as follows:
3510 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3511 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3512 * to replenish the iwl->rxq->rx_free.
bb8c093b 3513 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
3514 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3515 * 'processed' and 'read' driver indexes as well)
3516 * + A received packet is processed and handed to the kernel network stack,
3517 * detached from the iwl->rxq. The driver 'processed' index is updated.
3518 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3519 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3520 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3521 * were enough free buffers and RX_STALLED is set it is cleared.
3522 *
3523 *
3524 * Driver sequence:
3525 *
9fbab516
BC
3526 * iwl4965_rx_queue_alloc() Allocates rx_free
3527 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3528 * iwl4965_rx_queue_restock
9fbab516 3529 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
3530 * queue, updates firmware pointers, and updates
3531 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3532 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY
3533 *
3534 * -- enable interrupts --
9fbab516 3535 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY
3536 * READ INDEX, detaching the SKB from the pool.
3537 * Moves the packet buffer from queue to rx_used.
bb8c093b 3538 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY
3539 * slots.
3540 * ...
3541 *
3542 */
3543
3544/**
bb8c093b 3545 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3546 */
bb8c093b 3547static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY
3548{
3549 int s = q->read - q->write;
3550 if (s <= 0)
3551 s += RX_QUEUE_SIZE;
3552 /* keep some buffer to not confuse full and empty queue */
3553 s -= 2;
3554 if (s < 0)
3555 s = 0;
3556 return s;
3557}
3558
3559/**
bb8c093b 3560 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3561 */
c79dd5b5 3562int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY
3563{
3564 u32 reg = 0;
3565 int rc = 0;
3566 unsigned long flags;
3567
3568 spin_lock_irqsave(&q->lock, flags);
3569
3570 if (q->need_update == 0)
3571 goto exit_unlock;
3572
6440adb5 3573 /* If power-saving is in use, make sure device is awake */
b481de9c 3574 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395f6e9 3575 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
3576
3577 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3395f6e9 3578 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
3579 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3580 goto exit_unlock;
3581 }
3582
3395f6e9 3583 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
3584 if (rc)
3585 goto exit_unlock;
3586
6440adb5 3587 /* Device expects a multiple of 8 */
3395f6e9 3588 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3589 q->write & ~0x7);
3395f6e9 3590 iwl_release_nic_access(priv);
6440adb5
CB
3591
3592 /* Else device is assumed to be awake */
b481de9c 3593 } else
6440adb5 3594 /* Device expects a multiple of 8 */
3395f6e9 3595 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY
3596
3597
3598 q->need_update = 0;
3599
3600 exit_unlock:
3601 spin_unlock_irqrestore(&q->lock, flags);
3602 return rc;
3603}
3604
3605/**
9fbab516 3606 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3607 */
c79dd5b5 3608static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY
3609 dma_addr_t dma_addr)
3610{
3611 return cpu_to_le32((u32)(dma_addr >> 8));
3612}
3613
3614
3615/**
bb8c093b 3616 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3617 *
9fbab516 3618 * If there are slots in the RX queue that need to be restocked,
b481de9c 3619 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3620 * as we can, pulling from rx_free.
b481de9c
ZY
3621 *
3622 * This moves the 'write' index forward to catch up with 'processed', and
3623 * also updates the memory address in the firmware to reference the new
3624 * target buffer.
3625 */
c79dd5b5 3626static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3627{
bb8c093b 3628 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3629 struct list_head *element;
bb8c093b 3630 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
3631 unsigned long flags;
3632 int write, rc;
3633
3634 spin_lock_irqsave(&rxq->lock, flags);
3635 write = rxq->write & ~0x7;
bb8c093b 3636 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3637 /* Get next free Rx buffer, remove from free list */
b481de9c 3638 element = rxq->rx_free.next;
bb8c093b 3639 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3640 list_del(element);
6440adb5
CB
3641
3642 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3643 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY
3644 rxq->queue[rxq->write] = rxb;
3645 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3646 rxq->free_count--;
3647 }
3648 spin_unlock_irqrestore(&rxq->lock, flags);
3649 /* If the pre-allocated buffer pool is dropping low, schedule to
3650 * refill it */
3651 if (rxq->free_count <= RX_LOW_WATERMARK)
3652 queue_work(priv->workqueue, &priv->rx_replenish);
3653
3654
6440adb5
CB
3655 /* If we've added more space for the firmware to place data, tell it.
3656 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
3657 if ((write != (rxq->write & ~0x7))
3658 || (abs(rxq->write - rxq->read) > 7)) {
3659 spin_lock_irqsave(&rxq->lock, flags);
3660 rxq->need_update = 1;
3661 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3662 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
3663 if (rc)
3664 return rc;
3665 }
3666
3667 return 0;
3668}
3669
3670/**
bb8c093b 3671 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
3672 *
3673 * When moving to rx_free an SKB is allocated for the slot.
3674 *
bb8c093b 3675 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3676 * This is called as a scheduled work item (except for during initialization)
b481de9c 3677 */
c79dd5b5 3678static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3679{
bb8c093b 3680 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3681 struct list_head *element;
bb8c093b 3682 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
3683 unsigned long flags;
3684 spin_lock_irqsave(&rxq->lock, flags);
3685 while (!list_empty(&rxq->rx_used)) {
3686 element = rxq->rx_used.next;
bb8c093b 3687 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB
3688
3689 /* Alloc a new receive buffer */
b481de9c 3690 rxb->skb =
5425e490 3691 alloc_skb(priv->hw_params.rx_buf_size,
9ee1ba47 3692 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY
3693 if (!rxb->skb) {
3694 if (net_ratelimit())
3695 printk(KERN_CRIT DRV_NAME
3696 ": Can not allocate SKB buffers\n");
3697 /* We don't reschedule replenish work here -- we will
3698 * call the restock method and if it still needs
3699 * more buffers it will schedule replenish */
3700 break;
3701 }
3702 priv->alloc_rxb_skb++;
3703 list_del(element);
6440adb5
CB
3704
3705 /* Get physical address of RB/SKB */
b481de9c
ZY
3706 rxb->dma_addr =
3707 pci_map_single(priv->pci_dev, rxb->skb->data,
5425e490 3708 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY
3709 list_add_tail(&rxb->list, &rxq->rx_free);
3710 rxq->free_count++;
3711 }
3712 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA
3713}
3714
3715/*
3716 * this should be called while priv->lock is locked
3717*/
4fd1f841 3718static void __iwl4965_rx_replenish(void *data)
5c0eef96 3719{
c79dd5b5 3720 struct iwl_priv *priv = data;
5c0eef96
MA
3721
3722 iwl4965_rx_allocate(priv);
3723 iwl4965_rx_queue_restock(priv);
3724}
3725
3726
3727void iwl4965_rx_replenish(void *data)
3728{
c79dd5b5 3729 struct iwl_priv *priv = data;
5c0eef96
MA
3730 unsigned long flags;
3731
3732 iwl4965_rx_allocate(priv);
b481de9c
ZY
3733
3734 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3735 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
3736 spin_unlock_irqrestore(&priv->lock, flags);
3737}
3738
3739/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3740 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY
3741 * This free routine walks the list of POOL entries and if SKB is set to
3742 * non NULL it is unmapped and freed
3743 */
c79dd5b5 3744static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
3745{
3746 int i;
3747 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3748 if (rxq->pool[i].skb != NULL) {
3749 pci_unmap_single(priv->pci_dev,
3750 rxq->pool[i].dma_addr,
5425e490 3751 priv->hw_params.rx_buf_size,
9ee1ba47 3752 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3753 dev_kfree_skb(rxq->pool[i].skb);
3754 }
3755 }
3756
3757 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3758 rxq->dma_addr);
3759 rxq->bd = NULL;
3760}
3761
c79dd5b5 3762int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3763{
bb8c093b 3764 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
3765 struct pci_dev *dev = priv->pci_dev;
3766 int i;
3767
3768 spin_lock_init(&rxq->lock);
3769 INIT_LIST_HEAD(&rxq->rx_free);
3770 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB
3771
3772 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY
3773 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3774 if (!rxq->bd)
3775 return -ENOMEM;
6440adb5 3776
b481de9c
ZY
3777 /* Fill the rx_used queue with _all_ of the Rx buffers */
3778 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3779 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3780
b481de9c
ZY
3781 /* Set us so that we have processed and used all buffers, but have
3782 * not restocked the Rx queue with fresh buffers */
3783 rxq->read = rxq->write = 0;
3784 rxq->free_count = 0;
3785 rxq->need_update = 0;
3786 return 0;
3787}
3788
c79dd5b5 3789void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
3790{
3791 unsigned long flags;
3792 int i;
3793 spin_lock_irqsave(&rxq->lock, flags);
3794 INIT_LIST_HEAD(&rxq->rx_free);
3795 INIT_LIST_HEAD(&rxq->rx_used);
3796 /* Fill the rx_used queue with _all_ of the Rx buffers */
3797 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3798 /* In the reset function, these buffers may have been allocated
3799 * to an SKB, so we need to unmap and free potential storage */
3800 if (rxq->pool[i].skb != NULL) {
3801 pci_unmap_single(priv->pci_dev,
3802 rxq->pool[i].dma_addr,
5425e490 3803 priv->hw_params.rx_buf_size,
9ee1ba47 3804 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3805 priv->alloc_rxb_skb--;
3806 dev_kfree_skb(rxq->pool[i].skb);
3807 rxq->pool[i].skb = NULL;
3808 }
3809 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3810 }
3811
3812 /* Set us so that we have processed and used all buffers, but have
3813 * not restocked the Rx queue with fresh buffers */
3814 rxq->read = rxq->write = 0;
3815 rxq->free_count = 0;
3816 spin_unlock_irqrestore(&rxq->lock, flags);
3817}
3818
3819/* Convert linear signal-to-noise ratio into dB */
3820static u8 ratio2dB[100] = {
3821/* 0 1 2 3 4 5 6 7 8 9 */
3822 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3823 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3824 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3825 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3826 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3827 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3828 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3829 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3830 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3831 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3832};
3833
3834/* Calculates a relative dB value from a ratio of linear
3835 * (i.e. not dB) signal levels.
3836 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 3837int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 3838{
c899a575
AB
3839 /* 1000:1 or higher just report as 60 dB */
3840 if (sig_ratio >= 1000)
b481de9c
ZY
3841 return 60;
3842
c899a575 3843 /* 100:1 or higher, divide by 10 and use table,
b481de9c 3844 * add 20 dB to make up for divide by 10 */
c899a575 3845 if (sig_ratio >= 100)
b481de9c
ZY
3846 return (20 + (int)ratio2dB[sig_ratio/10]);
3847
3848 /* We shouldn't see this */
3849 if (sig_ratio < 1)
3850 return 0;
3851
3852 /* Use table for ratios 1:1 - 99:1 */
3853 return (int)ratio2dB[sig_ratio];
3854}
3855
3856#define PERFECT_RSSI (-20) /* dBm */
3857#define WORST_RSSI (-95) /* dBm */
3858#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3859
3860/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3861 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3862 * about formulas used below. */
bb8c093b 3863int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
3864{
3865 int sig_qual;
3866 int degradation = PERFECT_RSSI - rssi_dbm;
3867
3868 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3869 * as indicator; formula is (signal dbm - noise dbm).
3870 * SNR at or above 40 is a great signal (100%).
3871 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3872 * Weakest usable signal is usually 10 - 15 dB SNR. */
3873 if (noise_dbm) {
3874 if (rssi_dbm - noise_dbm >= 40)
3875 return 100;
3876 else if (rssi_dbm < noise_dbm)
3877 return 0;
3878 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3879
3880 /* Else use just the signal level.
3881 * This formula is a least squares fit of data points collected and
3882 * compared with a reference system that had a percentage (%) display
3883 * for signal quality. */
3884 } else
3885 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3886 (15 * RSSI_RANGE + 62 * degradation)) /
3887 (RSSI_RANGE * RSSI_RANGE);
3888
3889 if (sig_qual > 100)
3890 sig_qual = 100;
3891 else if (sig_qual < 1)
3892 sig_qual = 0;
3893
3894 return sig_qual;
3895}
3896
3897/**
9fbab516 3898 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
3899 *
3900 * Uses the priv->rx_handlers callback function array to invoke
3901 * the appropriate handlers, including command responses,
3902 * frame-received notifications, and other notifications.
3903 */
c79dd5b5 3904static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 3905{
bb8c093b
CH
3906 struct iwl4965_rx_mem_buffer *rxb;
3907 struct iwl4965_rx_packet *pkt;
3908 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
3909 u32 r, i;
3910 int reclaim;
3911 unsigned long flags;
5c0eef96 3912 u8 fill_rx = 0;
d68ab680 3913 u32 count = 8;
b481de9c 3914
6440adb5
CB
3915 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3916 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 3917 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY
3918 i = rxq->read;
3919
3920 /* Rx interrupt, but nothing sent from uCode */
3921 if (i == r)
3922 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3923
5c0eef96
MA
3924 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3925 fill_rx = 1;
3926
b481de9c
ZY
3927 while (i != r) {
3928 rxb = rxq->queue[i];
3929
9fbab516 3930 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
3931 * then a bug has been introduced in the queue refilling
3932 * routines -- catch it here */
3933 BUG_ON(rxb == NULL);
3934
3935 rxq->queue[i] = NULL;
3936
3937 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 3938 priv->hw_params.rx_buf_size,
b481de9c 3939 PCI_DMA_FROMDEVICE);
bb8c093b 3940 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
3941
3942 /* Reclaim a command buffer only if this packet is a response
3943 * to a (driver-originated) command.
3944 * If the packet (e.g. Rx frame) originated from uCode,
3945 * there is no command buffer to reclaim.
3946 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3947 * but apparently a few don't get set; catch them here. */
3948 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3949 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 3950 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 3951 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
3952 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3953 (pkt->hdr.cmd != REPLY_TX);
3954
3955 /* Based on type of command response or notification,
3956 * handle those that need handling via function in
bb8c093b 3957 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY
3958 if (priv->rx_handlers[pkt->hdr.cmd]) {
3959 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3960 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3961 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3962 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3963 } else {
3964 /* No handling needed */
3965 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3966 "r %d i %d No handler needed for %s, 0x%02x\n",
3967 r, i, get_cmd_string(pkt->hdr.cmd),
3968 pkt->hdr.cmd);
3969 }
3970
3971 if (reclaim) {
9fbab516 3972 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 3973 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
3974 * as we reclaim the driver command queue */
3975 if (rxb && rxb->skb)
bb8c093b 3976 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY
3977 else
3978 IWL_WARNING("Claim null rxb?\n");
3979 }
3980
3981 /* For now we just don't re-use anything. We can tweak this
3982 * later to try and re-use notification packets and SKBs that
3983 * fail to Rx correctly */
3984 if (rxb->skb != NULL) {
3985 priv->alloc_rxb_skb--;
3986 dev_kfree_skb_any(rxb->skb);
3987 rxb->skb = NULL;
3988 }
3989
3990 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 3991 priv->hw_params.rx_buf_size,
9ee1ba47 3992 PCI_DMA_FROMDEVICE);
b481de9c
ZY
3993 spin_lock_irqsave(&rxq->lock, flags);
3994 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3995 spin_unlock_irqrestore(&rxq->lock, flags);
3996 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
3997 /* If there are a lot of unused frames,
3998 * restock the Rx queue so ucode wont assert. */
3999 if (fill_rx) {
4000 count++;
4001 if (count >= 8) {
4002 priv->rxq.read = i;
4003 __iwl4965_rx_replenish(priv);
4004 count = 0;
4005 }
4006 }
b481de9c
ZY
4007 }
4008
4009 /* Backtrack one entry */
4010 priv->rxq.read = i;
bb8c093b 4011 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
4012}
4013
6440adb5
CB
4014/**
4015 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4016 */
c79dd5b5 4017static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 4018 struct iwl4965_tx_queue *txq)
b481de9c
ZY
4019{
4020 u32 reg = 0;
4021 int rc = 0;
4022 int txq_id = txq->q.id;
4023
4024 if (txq->need_update == 0)
4025 return rc;
4026
4027 /* if we're trying to save power */
4028 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4029 /* wake up nic if it's powered down ...
4030 * uCode will wake up, and interrupt us again, so next
4031 * time we'll skip this part. */
3395f6e9 4032 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
4033
4034 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4035 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3395f6e9 4036 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
4037 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4038 return rc;
4039 }
4040
4041 /* restore this queue's parameters in nic hardware. */
3395f6e9 4042 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4043 if (rc)
4044 return rc;
3395f6e9 4045 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4046 txq->q.write_ptr | (txq_id << 8));
3395f6e9 4047 iwl_release_nic_access(priv);
b481de9c
ZY
4048
4049 /* else not in power-save mode, uCode will never sleep when we're
4050 * trying to tx (during RFKILL, we're not trying to tx). */
4051 } else
3395f6e9 4052 iwl_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4053 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY
4054
4055 txq->need_update = 0;
4056
4057 return rc;
4058}
4059
0a6857e7 4060#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 4061static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4062{
0795af57
JP
4063 DECLARE_MAC_BUF(mac);
4064
b481de9c 4065 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 4066 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
4067 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4068 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4069 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4070 le32_to_cpu(rxon->filter_flags));
4071 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4072 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4073 rxon->ofdm_basic_rates);
4074 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
4075 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4076 print_mac(mac, rxon->node_addr));
4077 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4078 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
4079 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4080}
4081#endif
4082
c79dd5b5 4083static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
4084{
4085 IWL_DEBUG_ISR("Enabling interrupts\n");
4086 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 4087 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
4088}
4089
0359facc
MA
4090/* call this function to flush any scheduled tasklet */
4091static inline void iwl_synchronize_irq(struct iwl_priv *priv)
4092{
4093 /* wait to make sure we flush pedding tasklet*/
4094 synchronize_irq(priv->pci_dev->irq);
4095 tasklet_kill(&priv->irq_tasklet);
4096}
4097
c79dd5b5 4098static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
4099{
4100 clear_bit(STATUS_INT_ENABLED, &priv->status);
4101
4102 /* disable interrupts from uCode/NIC to host */
3395f6e9 4103 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
4104
4105 /* acknowledge/clear/reset any interrupts still pending
4106 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
4107 iwl_write32(priv, CSR_INT, 0xffffffff);
4108 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
4109 IWL_DEBUG_ISR("Disabled interrupts\n");
4110}
4111
4112static const char *desc_lookup(int i)
4113{
4114 switch (i) {
4115 case 1:
4116 return "FAIL";
4117 case 2:
4118 return "BAD_PARAM";
4119 case 3:
4120 return "BAD_CHECKSUM";
4121 case 4:
4122 return "NMI_INTERRUPT";
4123 case 5:
4124 return "SYSASSERT";
4125 case 6:
4126 return "FATAL_ERROR";
4127 }
4128
4129 return "UNKNOWN";
4130}
4131
4132#define ERROR_START_OFFSET (1 * sizeof(u32))
4133#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4134
c79dd5b5 4135static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY
4136{
4137 u32 data2, line;
4138 u32 desc, time, count, base, data1;
4139 u32 blink1, blink2, ilink1, ilink2;
4140 int rc;
4141
4142 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4143
57aab75a 4144 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY
4145 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4146 return;
4147 }
4148
3395f6e9 4149 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4150 if (rc) {
4151 IWL_WARNING("Can not read from adapter at this time.\n");
4152 return;
4153 }
4154
3395f6e9 4155 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY
4156
4157 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4158 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 4159 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY
4160 }
4161
3395f6e9
TW
4162 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
4163 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
4164 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
4165 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
4166 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
4167 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
4168 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
4169 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
4170 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY
4171
4172 IWL_ERROR("Desc Time "
4173 "data1 data2 line\n");
4174 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4175 desc_lookup(desc), desc, time, data1, data2, line);
4176 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4177 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4178 ilink1, ilink2);
4179
3395f6e9 4180 iwl_release_nic_access(priv);
b481de9c
ZY
4181}
4182
4183#define EVENT_START_OFFSET (4 * sizeof(u32))
4184
4185/**
bb8c093b 4186 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4187 *
3395f6e9 4188 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 4189 */
c79dd5b5 4190static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY
4191 u32 num_events, u32 mode)
4192{
4193 u32 i;
4194 u32 base; /* SRAM byte address of event log header */
4195 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4196 u32 ptr; /* SRAM byte address of log data */
4197 u32 ev, time, data; /* event log data */
4198
4199 if (num_events == 0)
4200 return;
4201
4202 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4203
4204 if (mode == 0)
4205 event_size = 2 * sizeof(u32);
4206 else
4207 event_size = 3 * sizeof(u32);
4208
4209 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4210
4211 /* "time" is actually "data" for mode 0 (no timestamp).
4212 * place event id # at far right for easier visual parsing. */
4213 for (i = 0; i < num_events; i++) {
3395f6e9 4214 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 4215 ptr += sizeof(u32);
3395f6e9 4216 time = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY
4217 ptr += sizeof(u32);
4218 if (mode == 0)
4219 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4220 else {
3395f6e9 4221 data = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY
4222 ptr += sizeof(u32);
4223 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4224 }
4225 }
4226}
4227
c79dd5b5 4228static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY
4229{
4230 int rc;
4231 u32 base; /* SRAM byte address of event log header */
4232 u32 capacity; /* event log capacity in # entries */
4233 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4234 u32 num_wraps; /* # times uCode wrapped to top of log */
4235 u32 next_entry; /* index of next entry to be written by uCode */
4236 u32 size; /* # entries that we'll print */
4237
4238 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
57aab75a 4239 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY
4240 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4241 return;
4242 }
4243
3395f6e9 4244 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4245 if (rc) {
4246 IWL_WARNING("Can not read from adapter at this time.\n");
4247 return;
4248 }
4249
4250 /* event log header */
3395f6e9
TW
4251 capacity = iwl_read_targ_mem(priv, base);
4252 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4253 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4254 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
4255
4256 size = num_wraps ? capacity : next_entry;
4257
4258 /* bail out if nothing in log */
4259 if (size == 0) {
583fab37 4260 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
3395f6e9 4261 iwl_release_nic_access(priv);
b481de9c
ZY
4262 return;
4263 }
4264
583fab37 4265 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
4266 size, num_wraps);
4267
4268 /* if uCode has wrapped back to top of log, start at the oldest entry,
4269 * i.e the next one that uCode would fill. */
4270 if (num_wraps)
bb8c093b 4271 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY
4272 capacity - next_entry, mode);
4273
4274 /* (then/else) start at top of log */
bb8c093b 4275 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4276
3395f6e9 4277 iwl_release_nic_access(priv);
b481de9c
ZY
4278}
4279
4280/**
bb8c093b 4281 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4282 */
c79dd5b5 4283static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4284{
bb8c093b 4285 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
4286 set_bit(STATUS_FW_ERROR, &priv->status);
4287
4288 /* Cancel currently queued command. */
4289 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4290
0a6857e7
TW
4291#ifdef CONFIG_IWLWIFI_DEBUG
4292 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH
4293 iwl4965_dump_nic_error_log(priv);
4294 iwl4965_dump_nic_event_log(priv);
4295 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY
4296 }
4297#endif
4298
4299 wake_up_interruptible(&priv->wait_command_queue);
4300
4301 /* Keep the restart process from trying to send host
4302 * commands by clearing the INIT status bit */
4303 clear_bit(STATUS_READY, &priv->status);
4304
4305 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4306 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4307 "Restarting adapter due to uCode error.\n");
4308
3109ece1 4309 if (iwl_is_associated(priv)) {
b481de9c
ZY
4310 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4311 sizeof(priv->recovery_rxon));
4312 priv->error_recovering = 1;
4313 }
4314 queue_work(priv->workqueue, &priv->restart);
4315 }
4316}
4317
c79dd5b5 4318static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
4319{
4320 unsigned long flags;
4321
4322 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4323 sizeof(priv->staging_rxon));
4324 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4325 iwl4965_commit_rxon(priv);
b481de9c 4326
bb8c093b 4327 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
4328
4329 spin_lock_irqsave(&priv->lock, flags);
4330 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4331 priv->error_recovering = 0;
4332 spin_unlock_irqrestore(&priv->lock, flags);
4333}
4334
c79dd5b5 4335static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
4336{
4337 u32 inta, handled = 0;
4338 u32 inta_fh;
4339 unsigned long flags;
0a6857e7 4340#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
4341 u32 inta_mask;
4342#endif
4343
4344 spin_lock_irqsave(&priv->lock, flags);
4345
4346 /* Ack/clear/reset pending uCode interrupts.
4347 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4348 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
4349 inta = iwl_read32(priv, CSR_INT);
4350 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
4351
4352 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4353 * Any new interrupts that happen after this, either while we're
4354 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
4355 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4356 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4357
0a6857e7
TW
4358#ifdef CONFIG_IWLWIFI_DEBUG
4359 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 4360 /* just for debug */
3395f6e9 4361 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
4362 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4363 inta, inta_mask, inta_fh);
4364 }
4365#endif
4366
4367 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4368 * atomic, make sure that inta covers all the interrupts that
4369 * we've discovered, even if FH interrupt came in just after
4370 * reading CSR_INT. */
6f83eaa1 4371 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4372 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4373 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
4374 inta |= CSR_INT_BIT_FH_TX;
4375
4376 /* Now service all interrupt bits discovered above. */
4377 if (inta & CSR_INT_BIT_HW_ERR) {
4378 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4379
4380 /* Tell the device to stop sending interrupts */
bb8c093b 4381 iwl4965_disable_interrupts(priv);
b481de9c 4382
bb8c093b 4383 iwl4965_irq_handle_error(priv);
b481de9c
ZY
4384
4385 handled |= CSR_INT_BIT_HW_ERR;
4386
4387 spin_unlock_irqrestore(&priv->lock, flags);
4388
4389 return;
4390 }
4391
0a6857e7
TW
4392#ifdef CONFIG_IWLWIFI_DEBUG
4393 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4394 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
4395 if (inta & CSR_INT_BIT_SCD)
4396 IWL_DEBUG_ISR("Scheduler finished to transmit "
4397 "the frame/frames.\n");
b481de9c
ZY
4398
4399 /* Alive notification via Rx interrupt will do the real work */
4400 if (inta & CSR_INT_BIT_ALIVE)
4401 IWL_DEBUG_ISR("Alive interrupt\n");
4402 }
4403#endif
4404 /* Safely ignore these bits for debug checks below */
25c03d8e 4405 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4406
9fbab516 4407 /* HW RF KILL switch toggled */
b481de9c
ZY
4408 if (inta & CSR_INT_BIT_RF_KILL) {
4409 int hw_rf_kill = 0;
3395f6e9 4410 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
4411 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4412 hw_rf_kill = 1;
4413
4414 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4415 "RF_KILL bit toggled to %s.\n",
4416 hw_rf_kill ? "disable radio":"enable radio");
4417
4418 /* Queue restart only if RF_KILL switch was set to "kill"
4419 * when we loaded driver, and is now set to "enable".
4420 * After we're Alive, RF_KILL gets handled by
3230455d 4421 * iwl4965_rx_card_state_notif() */
53e49093
ZY
4422 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4423 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4424 queue_work(priv->workqueue, &priv->restart);
53e49093 4425 }
b481de9c
ZY
4426
4427 handled |= CSR_INT_BIT_RF_KILL;
4428 }
4429
9fbab516 4430 /* Chip got too hot and stopped itself */
b481de9c
ZY
4431 if (inta & CSR_INT_BIT_CT_KILL) {
4432 IWL_ERROR("Microcode CT kill error detected.\n");
4433 handled |= CSR_INT_BIT_CT_KILL;
4434 }
4435
4436 /* Error detected by uCode */
4437 if (inta & CSR_INT_BIT_SW_ERR) {
4438 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4439 inta);
bb8c093b 4440 iwl4965_irq_handle_error(priv);
b481de9c
ZY
4441 handled |= CSR_INT_BIT_SW_ERR;
4442 }
4443
4444 /* uCode wakes up after power-down sleep */
4445 if (inta & CSR_INT_BIT_WAKEUP) {
4446 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH
4447 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4448 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4449 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4450 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4451 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4452 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4453 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
4454
4455 handled |= CSR_INT_BIT_WAKEUP;
4456 }
4457
4458 /* All uCode command responses, including Tx command responses,
4459 * Rx "responses" (frame-received notification), and other
4460 * notifications from uCode come through here*/
4461 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4462 iwl4965_rx_handle(priv);
b481de9c
ZY
4463 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4464 }
4465
4466 if (inta & CSR_INT_BIT_FH_TX) {
4467 IWL_DEBUG_ISR("Tx interrupt\n");
4468 handled |= CSR_INT_BIT_FH_TX;
4469 }
4470
4471 if (inta & ~handled)
4472 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4473
4474 if (inta & ~CSR_INI_SET_MASK) {
4475 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4476 inta & ~CSR_INI_SET_MASK);
4477 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4478 }
4479
4480 /* Re-enable all interrupts */
0359facc
MA
4481 /* only Re-enable if diabled by irq */
4482 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4483 iwl4965_enable_interrupts(priv);
b481de9c 4484
0a6857e7
TW
4485#ifdef CONFIG_IWLWIFI_DEBUG
4486 if (iwl_debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
4487 inta = iwl_read32(priv, CSR_INT);
4488 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4489 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
4490 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4491 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4492 }
4493#endif
4494 spin_unlock_irqrestore(&priv->lock, flags);
4495}
4496
bb8c093b 4497static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4498{
c79dd5b5 4499 struct iwl_priv *priv = data;
b481de9c
ZY
4500 u32 inta, inta_mask;
4501 u32 inta_fh;
4502 if (!priv)
4503 return IRQ_NONE;
4504
4505 spin_lock(&priv->lock);
4506
4507 /* Disable (but don't clear!) interrupts here to avoid
4508 * back-to-back ISRs and sporadic interrupts from our NIC.
4509 * If we have something to service, the tasklet will re-enable ints.
4510 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
4511 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4512 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
4513
4514 /* Discover which interrupts are active/pending */
3395f6e9
TW
4515 inta = iwl_read32(priv, CSR_INT);
4516 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
4517
4518 /* Ignore interrupt if there's nothing in NIC to service.
4519 * This may be due to IRQ shared with another device,
4520 * or due to sporadic interrupts thrown from our NIC. */
4521 if (!inta && !inta_fh) {
4522 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4523 goto none;
4524 }
4525
4526 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
4527 /* Hardware disappeared. It might have already raised
4528 * an interrupt */
b481de9c 4529 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4530 goto unplugged;
b481de9c
ZY
4531 }
4532
4533 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4534 inta, inta_mask, inta_fh);
4535
25c03d8e
JP
4536 inta &= ~CSR_INT_BIT_SCD;
4537
bb8c093b 4538 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
4539 if (likely(inta || inta_fh))
4540 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4541
66fbb541
ON
4542 unplugged:
4543 spin_unlock(&priv->lock);
b481de9c
ZY
4544 return IRQ_HANDLED;
4545
4546 none:
4547 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
4548 /* only Re-enable if diabled by irq */
4549 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4550 iwl4965_enable_interrupts(priv);
b481de9c
ZY
4551 spin_unlock(&priv->lock);
4552 return IRQ_NONE;
4553}
4554
b481de9c
ZY
4555/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4556 * sending probe req. This should be set long enough to hear probe responses
4557 * from more than one AP. */
4558#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4559#define IWL_ACTIVE_DWELL_TIME_52 (10)
4560
4561/* For faster active scanning, scan will move to the next channel if fewer than
4562 * PLCP_QUIET_THRESH packets are heard on this channel within
4563 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4564 * time if it's a quiet channel (nothing responded to our probe, and there's
4565 * no other traffic).
4566 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4567#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4568#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4569
4570/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4571 * Must be set longer than active dwell time.
4572 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4573#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4574#define IWL_PASSIVE_DWELL_TIME_52 (10)
4575#define IWL_PASSIVE_DWELL_BASE (100)
4576#define IWL_CHANNEL_TUNE_TIME 5
4577
c79dd5b5 4578static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4579 enum ieee80211_band band)
b481de9c 4580{
8318d78a 4581 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
4582 return IWL_ACTIVE_DWELL_TIME_52;
4583 else
4584 return IWL_ACTIVE_DWELL_TIME_24;
4585}
4586
c79dd5b5 4587static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4588 enum ieee80211_band band)
b481de9c 4589{
8318d78a
JB
4590 u16 active = iwl4965_get_active_dwell_time(priv, band);
4591 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY
4592 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4593 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4594
3109ece1 4595 if (iwl_is_associated(priv)) {
b481de9c
ZY
4596 /* If we're associated, we clamp the maximum passive
4597 * dwell time to be 98% of the beacon interval (minus
4598 * 2 * channel tune time) */
4599 passive = priv->beacon_int;
4600 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4601 passive = IWL_PASSIVE_DWELL_BASE;
4602 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4603 }
4604
4605 if (passive <= active)
4606 passive = active + 1;
4607
4608 return passive;
4609}
4610
c79dd5b5 4611static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4612 enum ieee80211_band band,
b481de9c 4613 u8 is_active, u8 direct_mask,
bb8c093b 4614 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY
4615{
4616 const struct ieee80211_channel *channels = NULL;
8318d78a 4617 const struct ieee80211_supported_band *sband;
bf85ea4f 4618 const struct iwl_channel_info *ch_info;
b481de9c
ZY
4619 u16 passive_dwell = 0;
4620 u16 active_dwell = 0;
4621 int added, i;
4622
8318d78a
JB
4623 sband = iwl4965_get_hw_mode(priv, band);
4624 if (!sband)
b481de9c
ZY
4625 return 0;
4626
8318d78a 4627 channels = sband->channels;
b481de9c 4628
8318d78a
JB
4629 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4630 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4631
8318d78a 4632 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB
4633 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4634 continue;
4635
8318d78a 4636 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
b481de9c 4637 le16_to_cpu(priv->active_rxon.channel)) {
3109ece1 4638 if (iwl_is_associated(priv)) {
b481de9c
ZY
4639 IWL_DEBUG_SCAN
4640 ("Skipping current channel %d\n",
4641 le16_to_cpu(priv->active_rxon.channel));
4642 continue;
4643 }
4644 } else if (priv->only_active_channel)
4645 continue;
4646
8318d78a 4647 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4648
8622e705 4649 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4650 scan_ch->channel);
b481de9c
ZY
4651 if (!is_channel_valid(ch_info)) {
4652 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4653 scan_ch->channel);
4654 continue;
4655 }
4656
4657 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4658 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY
4659 scan_ch->type = 0; /* passive */
4660 else
4661 scan_ch->type = 1; /* active */
4662
4663 if (scan_ch->type & 1)
4664 scan_ch->type |= (direct_mask << 1);
4665
4666 if (is_channel_narrow(ch_info))
4667 scan_ch->type |= (1 << 7);
4668
4669 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4670 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4671
9fbab516 4672 /* Set txpower levels to defaults */
b481de9c
ZY
4673 scan_ch->tpc.dsp_atten = 110;
4674 /* scan_pwr_info->tpc.dsp_atten; */
4675
4676 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4677 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY
4678 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4679 else {
4680 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4681 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4682 * power level:
8a1b0245 4683 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY
4684 */
4685 }
4686
4687 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4688 scan_ch->channel,
4689 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4690 (scan_ch->type & 1) ?
4691 active_dwell : passive_dwell);
4692
4693 scan_ch++;
4694 added++;
4695 }
4696
4697 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4698 return added;
4699}
4700
c79dd5b5 4701static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY
4702 struct ieee80211_rate *rates)
4703{
4704 int i;
4705
4706 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB
4707 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
4708 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4709 rates[i].hw_value_short = i;
4710 rates[i].flags = 0;
4711 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 4712 /*
8318d78a 4713 * If CCK != 1M then set short preamble rate flag.
b481de9c 4714 */
35cdeaf4
TW
4715 rates[i].flags |=
4716 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4717 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 4718 }
b481de9c 4719 }
b481de9c
ZY
4720}
4721
4722/**
bb8c093b 4723 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 4724 */
bf85ea4f 4725int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 4726{
bf85ea4f 4727 struct iwl_channel_info *ch;
8211ef78 4728 struct ieee80211_supported_band *sband;
b481de9c
ZY
4729 struct ieee80211_channel *channels;
4730 struct ieee80211_channel *geo_ch;
4731 struct ieee80211_rate *rates;
4732 int i = 0;
b481de9c 4733
8318d78a
JB
4734 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4735 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY
4736 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4737 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4738 return 0;
4739 }
4740
b481de9c
ZY
4741 channels = kzalloc(sizeof(struct ieee80211_channel) *
4742 priv->channel_count, GFP_KERNEL);
8318d78a 4743 if (!channels)
b481de9c 4744 return -ENOMEM;
b481de9c 4745
8211ef78 4746 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY
4747 GFP_KERNEL);
4748 if (!rates) {
b481de9c
ZY
4749 kfree(channels);
4750 return -ENOMEM;
4751 }
4752
b481de9c 4753 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78 4754 sband = &priv->bands[IEEE80211_BAND_5GHZ];
bf85ea4f 4755 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
8211ef78
TW
4756 /* just OFDM */
4757 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4758 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 4759
1ea87396 4760 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 4761
8211ef78
TW
4762 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4763 sband->channels = channels;
4764 /* OFDM & CCK */
4765 sband->bitrates = rates;
4766 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 4767
1ea87396 4768 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 4769
b481de9c
ZY
4770 priv->ieee_channels = channels;
4771 priv->ieee_rates = rates;
4772
bb8c093b 4773 iwl4965_init_hw_rates(priv, rates);
b481de9c 4774
8211ef78 4775 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY
4776 ch = &priv->channel_info[i];
4777
8211ef78
TW
4778 /* FIXME: might be removed if scan is OK */
4779 if (!is_channel_valid(ch))
b481de9c 4780 continue;
b481de9c 4781
8211ef78
TW
4782 if (is_channel_a_band(ch))
4783 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4784 else
4785 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 4786
8211ef78
TW
4787 geo_ch = &sband->channels[sband->n_channels++];
4788
4789 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB
4790 geo_ch->max_power = ch->max_power_avg;
4791 geo_ch->max_antenna_gain = 0xff;
7b72304d 4792 geo_ch->hw_value = ch->channel;
b481de9c
ZY
4793
4794 if (is_channel_valid(ch)) {
8318d78a
JB
4795 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4796 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 4797
8318d78a
JB
4798 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4799 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY
4800
4801 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 4802 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY
4803
4804 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4805 priv->max_channel_txpower_limit =
4806 ch->max_power_avg;
8211ef78 4807 } else {
8318d78a 4808 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW
4809 }
4810
4811 /* Save flags for reg domain usage */
4812 geo_ch->orig_flags = geo_ch->flags;
4813
4814 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4815 ch->channel, geo_ch->center_freq,
4816 is_channel_a_band(ch) ? "5.2" : "2.4",
4817 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4818 "restricted" : "valid",
4819 geo_ch->flags);
b481de9c
ZY
4820 }
4821
82b9a121
TW
4822 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4823 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY
4824 printk(KERN_INFO DRV_NAME
4825 ": Incorrectly detected BG card as ABG. Please send "
4826 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4827 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 4828 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY
4829 }
4830
4831 printk(KERN_INFO DRV_NAME
4832 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB
4833 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4834 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 4835
e0e0a67e
JL
4836 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4837 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4838 &priv->bands[IEEE80211_BAND_2GHZ];
4839 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4840 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4841 &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 4842
b481de9c
ZY
4843 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4844
4845 return 0;
4846}
4847
849e0dce
RC
4848/*
4849 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
4850 */
bf85ea4f 4851void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 4852{
849e0dce
RC
4853 kfree(priv->ieee_channels);
4854 kfree(priv->ieee_rates);
4855 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4856}
4857
b481de9c
ZY
4858/******************************************************************************
4859 *
4860 * uCode download functions
4861 *
4862 ******************************************************************************/
4863
c79dd5b5 4864static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 4865{
98c92211
TW
4866 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4867 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4868 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4869 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4870 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4871 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
4872}
4873
4874/**
bb8c093b 4875 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
4876 * looking at all data.
4877 */
c79dd5b5 4878static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 4879 u32 len)
b481de9c
ZY
4880{
4881 u32 val;
4882 u32 save_len = len;
4883 int rc = 0;
4884 u32 errcnt;
4885
4886 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4887
3395f6e9 4888 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4889 if (rc)
4890 return rc;
4891
3395f6e9 4892 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY
4893
4894 errcnt = 0;
4895 for (; len > 0; len -= sizeof(u32), image++) {
4896 /* read data comes through single port, auto-incr addr */
4897 /* NOTE: Use the debugless read so we don't flood kernel log
4898 * if IWL_DL_IO is set */
3395f6e9 4899 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
4900 if (val != le32_to_cpu(*image)) {
4901 IWL_ERROR("uCode INST section is invalid at "
4902 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4903 save_len - len, val, le32_to_cpu(*image));
4904 rc = -EIO;
4905 errcnt++;
4906 if (errcnt >= 20)
4907 break;
4908 }
4909 }
4910
3395f6e9 4911 iwl_release_nic_access(priv);
b481de9c
ZY
4912
4913 if (!errcnt)
4914 IWL_DEBUG_INFO
4915 ("ucode image in INSTRUCTION memory is good\n");
4916
4917 return rc;
4918}
4919
4920
4921/**
bb8c093b 4922 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
4923 * using sample data 100 bytes apart. If these sample points are good,
4924 * it's a pretty good bet that everything between them is good, too.
4925 */
c79dd5b5 4926static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
4927{
4928 u32 val;
4929 int rc = 0;
4930 u32 errcnt = 0;
4931 u32 i;
4932
4933 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4934
3395f6e9 4935 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
4936 if (rc)
4937 return rc;
4938
4939 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4940 /* read data comes through single port, auto-incr addr */
4941 /* NOTE: Use the debugless read so we don't flood kernel log
4942 * if IWL_DL_IO is set */
3395f6e9 4943 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 4944 i + RTC_INST_LOWER_BOUND);
3395f6e9 4945 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
4946 if (val != le32_to_cpu(*image)) {
4947#if 0 /* Enable this if you want to see details */
4948 IWL_ERROR("uCode INST section is invalid at "
4949 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4950 i, val, *image);
4951#endif
4952 rc = -EIO;
4953 errcnt++;
4954 if (errcnt >= 3)
4955 break;
4956 }
4957 }
4958
3395f6e9 4959 iwl_release_nic_access(priv);
b481de9c
ZY
4960
4961 return rc;
4962}
4963
4964
4965/**
bb8c093b 4966 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
4967 * and verify its contents
4968 */
c79dd5b5 4969static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY
4970{
4971 __le32 *image;
4972 u32 len;
4973 int rc = 0;
4974
4975 /* Try bootstrap */
4976 image = (__le32 *)priv->ucode_boot.v_addr;
4977 len = priv->ucode_boot.len;
bb8c093b 4978 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4979 if (rc == 0) {
4980 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4981 return 0;
4982 }
4983
4984 /* Try initialize */
4985 image = (__le32 *)priv->ucode_init.v_addr;
4986 len = priv->ucode_init.len;
bb8c093b 4987 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4988 if (rc == 0) {
4989 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4990 return 0;
4991 }
4992
4993 /* Try runtime/protocol */
4994 image = (__le32 *)priv->ucode_code.v_addr;
4995 len = priv->ucode_code.len;
bb8c093b 4996 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
4997 if (rc == 0) {
4998 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4999 return 0;
5000 }
5001
5002 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5003
9fbab516
BC
5004 /* Since nothing seems to match, show first several data entries in
5005 * instruction SRAM, so maybe visual inspection will give a clue.
5006 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
5007 image = (__le32 *)priv->ucode_boot.v_addr;
5008 len = priv->ucode_boot.len;
bb8c093b 5009 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY
5010
5011 return rc;
5012}
5013
c79dd5b5 5014static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY
5015{
5016 /* Remove all resets to allow NIC to operate */
3395f6e9 5017 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY
5018}
5019
90e759d1 5020
b481de9c 5021/**
bb8c093b 5022 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
5023 *
5024 * Copy into buffers for card to fetch via bus-mastering
5025 */
c79dd5b5 5026static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 5027{
bb8c093b 5028 struct iwl4965_ucode *ucode;
90e759d1 5029 int ret;
b481de9c 5030 const struct firmware *ucode_raw;
4bf775cd 5031 const char *name = priv->cfg->fw_name;
b481de9c
ZY
5032 u8 *src;
5033 size_t len;
5034 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5035
5036 /* Ask kernel firmware_class module to get the boot firmware off disk.
5037 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
5038 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5039 if (ret < 0) {
5040 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5041 name, ret);
b481de9c
ZY
5042 goto error;
5043 }
5044
5045 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5046 name, ucode_raw->size);
5047
5048 /* Make sure that we got at least our header! */
5049 if (ucode_raw->size < sizeof(*ucode)) {
5050 IWL_ERROR("File size way too small!\n");
90e759d1 5051 ret = -EINVAL;
b481de9c
ZY
5052 goto err_release;
5053 }
5054
5055 /* Data from ucode file: header followed by uCode images */
5056 ucode = (void *)ucode_raw->data;
5057
5058 ver = le32_to_cpu(ucode->ver);
5059 inst_size = le32_to_cpu(ucode->inst_size);
5060 data_size = le32_to_cpu(ucode->data_size);
5061 init_size = le32_to_cpu(ucode->init_size);
5062 init_data_size = le32_to_cpu(ucode->init_data_size);
5063 boot_size = le32_to_cpu(ucode->boot_size);
5064
5065 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5066 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
5067 inst_size);
5068 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
5069 data_size);
5070 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
5071 init_size);
5072 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
5073 init_data_size);
5074 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
5075 boot_size);
5076
5077 /* Verify size of file vs. image size info in file's header */
5078 if (ucode_raw->size < sizeof(*ucode) +
5079 inst_size + data_size + init_size +
5080 init_data_size + boot_size) {
5081
5082 IWL_DEBUG_INFO("uCode file size %d too small\n",
5083 (int)ucode_raw->size);
90e759d1 5084 ret = -EINVAL;
b481de9c
ZY
5085 goto err_release;
5086 }
5087
5088 /* Verify that uCode images will fit in card's SRAM */
5089 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW
5090 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5091 inst_size);
5092 ret = -EINVAL;
b481de9c
ZY
5093 goto err_release;
5094 }
5095
5096 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW
5097 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5098 data_size);
5099 ret = -EINVAL;
b481de9c
ZY
5100 goto err_release;
5101 }
5102 if (init_size > IWL_MAX_INST_SIZE) {
5103 IWL_DEBUG_INFO
90e759d1
TW
5104 ("uCode init instr len %d too large to fit in\n",
5105 init_size);
5106 ret = -EINVAL;
b481de9c
ZY
5107 goto err_release;
5108 }
5109 if (init_data_size > IWL_MAX_DATA_SIZE) {
5110 IWL_DEBUG_INFO
90e759d1
TW
5111 ("uCode init data len %d too large to fit in\n",
5112 init_data_size);
5113 ret = -EINVAL;
b481de9c
ZY
5114 goto err_release;
5115 }
5116 if (boot_size > IWL_MAX_BSM_SIZE) {
5117 IWL_DEBUG_INFO
90e759d1
TW
5118 ("uCode boot instr len %d too large to fit in\n",
5119 boot_size);
5120 ret = -EINVAL;
b481de9c
ZY
5121 goto err_release;
5122 }
5123
5124 /* Allocate ucode buffers for card's bus-master loading ... */
5125
5126 /* Runtime instructions and 2 copies of data:
5127 * 1) unmodified from disk
5128 * 2) backup cache for save/restore during power-downs */
5129 priv->ucode_code.len = inst_size;
98c92211 5130 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
5131
5132 priv->ucode_data.len = data_size;
98c92211 5133 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
5134
5135 priv->ucode_data_backup.len = data_size;
98c92211 5136 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
5137
5138 /* Initialization instructions and data */
90e759d1
TW
5139 if (init_size && init_data_size) {
5140 priv->ucode_init.len = init_size;
98c92211 5141 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
5142
5143 priv->ucode_init_data.len = init_data_size;
98c92211 5144 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
5145
5146 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5147 goto err_pci_alloc;
5148 }
b481de9c
ZY
5149
5150 /* Bootstrap (instructions only, no data) */
90e759d1
TW
5151 if (boot_size) {
5152 priv->ucode_boot.len = boot_size;
98c92211 5153 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 5154
90e759d1
TW
5155 if (!priv->ucode_boot.v_addr)
5156 goto err_pci_alloc;
5157 }
b481de9c
ZY
5158
5159 /* Copy images into buffers for card's bus-master reads ... */
5160
5161 /* Runtime instructions (first block of data in file) */
5162 src = &ucode->data[0];
5163 len = priv->ucode_code.len;
90e759d1 5164 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
5165 memcpy(priv->ucode_code.v_addr, src, len);
5166 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5167 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5168
5169 /* Runtime data (2nd block)
bb8c093b 5170 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
5171 src = &ucode->data[inst_size];
5172 len = priv->ucode_data.len;
90e759d1 5173 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
5174 memcpy(priv->ucode_data.v_addr, src, len);
5175 memcpy(priv->ucode_data_backup.v_addr, src, len);
5176
5177 /* Initialization instructions (3rd block) */
5178 if (init_size) {
5179 src = &ucode->data[inst_size + data_size];
5180 len = priv->ucode_init.len;
90e759d1
TW
5181 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5182 len);
b481de9c
ZY
5183 memcpy(priv->ucode_init.v_addr, src, len);
5184 }
5185
5186 /* Initialization data (4th block) */
5187 if (init_data_size) {
5188 src = &ucode->data[inst_size + data_size + init_size];
5189 len = priv->ucode_init_data.len;
90e759d1
TW
5190 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
5191 len);
b481de9c
ZY
5192 memcpy(priv->ucode_init_data.v_addr, src, len);
5193 }
5194
5195 /* Bootstrap instructions (5th block) */
5196 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5197 len = priv->ucode_boot.len;
90e759d1 5198 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
5199 memcpy(priv->ucode_boot.v_addr, src, len);
5200
5201 /* We have our copies now, allow OS release its copies */
5202 release_firmware(ucode_raw);
5203 return 0;
5204
5205 err_pci_alloc:
5206 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 5207 ret = -ENOMEM;
bb8c093b 5208 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
5209
5210 err_release:
5211 release_firmware(ucode_raw);
5212
5213 error:
90e759d1 5214 return ret;
b481de9c
ZY
5215}
5216
5217
5218/**
bb8c093b 5219 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
5220 *
5221 * Tell initialization uCode where to find runtime uCode.
5222 *
5223 * BSM registers initially contain pointers to initialization uCode.
5224 * We need to replace them to load runtime uCode inst and data,
5225 * and to save runtime data when powering down.
5226 */
c79dd5b5 5227static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY
5228{
5229 dma_addr_t pinst;
5230 dma_addr_t pdata;
5231 int rc = 0;
5232 unsigned long flags;
5233
5234 /* bits 35:4 for 4965 */
5235 pinst = priv->ucode_code.p_addr >> 4;
5236 pdata = priv->ucode_data_backup.p_addr >> 4;
5237
5238 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5239 rc = iwl_grab_nic_access(priv);
b481de9c
ZY
5240 if (rc) {
5241 spin_unlock_irqrestore(&priv->lock, flags);
5242 return rc;
5243 }
5244
5245 /* Tell bootstrap uCode where to find image to load */
3395f6e9
TW
5246 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5247 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5248 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
5249 priv->ucode_data.len);
5250
5251 /* Inst bytecount must be last to set up, bit 31 signals uCode
5252 * that all new ptr/size info is in place */
3395f6e9 5253 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
5254 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5255
3395f6e9 5256 iwl_release_nic_access(priv);
b481de9c
ZY
5257
5258 spin_unlock_irqrestore(&priv->lock, flags);
5259
5260 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5261
5262 return rc;
5263}
5264
5265/**
bb8c093b 5266 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
5267 *
5268 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5269 *
5270 * The 4965 "initialize" ALIVE reply contains calibration data for:
5271 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
5272 * (3945 does not contain this data).
5273 *
5274 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5275*/
c79dd5b5 5276static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY
5277{
5278 /* Check alive response for "valid" sign from uCode */
5279 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5280 /* We had an error bringing up the hardware, so take it
5281 * all the way back down so we can try again */
5282 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5283 goto restart;
5284 }
5285
5286 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5287 * This is a paranoid check, because we would not have gotten the
5288 * "initialize" alive if code weren't properly loaded. */
bb8c093b 5289 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
5290 /* Runtime instruction load was bad;
5291 * take it all the way back down so we can try again */
5292 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5293 goto restart;
5294 }
5295
5296 /* Calculate temperature */
5297 priv->temperature = iwl4965_get_temperature(priv);
5298
5299 /* Send pointers to protocol/runtime uCode image ... init code will
5300 * load and launch runtime uCode, which will send us another "Alive"
5301 * notification. */
5302 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 5303 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY
5304 /* Runtime instruction load won't happen;
5305 * take it all the way back down so we can try again */
5306 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5307 goto restart;
5308 }
5309 return;
5310
5311 restart:
5312 queue_work(priv->workqueue, &priv->restart);
5313}
5314
5315
5316/**
bb8c093b 5317 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 5318 * from protocol/runtime uCode (initialization uCode's
bb8c093b 5319 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 5320 */
c79dd5b5 5321static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c 5322{
57aab75a 5323 int ret = 0;
b481de9c
ZY
5324
5325 IWL_DEBUG_INFO("Runtime Alive received.\n");
5326
5327 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5328 /* We had an error bringing up the hardware, so take it
5329 * all the way back down so we can try again */
5330 IWL_DEBUG_INFO("Alive failed.\n");
5331 goto restart;
5332 }
5333
5334 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5335 * This is a paranoid check, because we would not have gotten the
5336 * "runtime" alive if code weren't properly loaded. */
bb8c093b 5337 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
5338 /* Runtime instruction load was bad;
5339 * take it all the way back down so we can try again */
5340 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5341 goto restart;
5342 }
5343
bf85ea4f 5344 iwlcore_clear_stations_table(priv);
b481de9c 5345
57aab75a
TW
5346 ret = priv->cfg->ops->lib->alive_notify(priv);
5347 if (ret) {
b481de9c 5348 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 5349 ret);
b481de9c
ZY
5350 goto restart;
5351 }
5352
9fbab516 5353 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
5354 set_bit(STATUS_ALIVE, &priv->status);
5355
5356 /* Clear out the uCode error bit if it is set */
5357 clear_bit(STATUS_FW_ERROR, &priv->status);
5358
fee1247a 5359 if (iwl_is_rfkill(priv))
b481de9c
ZY
5360 return;
5361
5a66926a 5362 ieee80211_start_queues(priv->hw);
b481de9c
ZY
5363
5364 priv->active_rate = priv->rates_mask;
5365 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5366
bb8c093b 5367 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 5368
3109ece1 5369 if (iwl_is_associated(priv)) {
bb8c093b
CH
5370 struct iwl4965_rxon_cmd *active_rxon =
5371 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY
5372
5373 memcpy(&priv->staging_rxon, &priv->active_rxon,
5374 sizeof(priv->staging_rxon));
5375 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5376 } else {
5377 /* Initialize our rx_config data */
bb8c093b 5378 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
5379 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5380 }
5381
9fbab516 5382 /* Configure Bluetooth device coexistence support */
bb8c093b 5383 iwl4965_send_bt_config(priv);
b481de9c
ZY
5384
5385 /* Configure the adapter for unassociated operation */
bb8c093b 5386 iwl4965_commit_rxon(priv);
b481de9c
ZY
5387
5388 /* At this point, the NIC is initialized and operational */
5389 priv->notif_missed_beacons = 0;
b481de9c
ZY
5390
5391 iwl4965_rf_kill_ct_config(priv);
5a66926a 5392
fe00b5a5
RC
5393 iwl_leds_register(priv);
5394
b481de9c 5395 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 5396 set_bit(STATUS_READY, &priv->status);
5a66926a 5397 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
5398
5399 if (priv->error_recovering)
bb8c093b 5400 iwl4965_error_recovery(priv);
b481de9c 5401
c8381fdc 5402 iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
84363e6e 5403 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY
5404 return;
5405
5406 restart:
5407 queue_work(priv->workqueue, &priv->restart);
5408}
5409
c79dd5b5 5410static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 5411
c79dd5b5 5412static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
5413{
5414 unsigned long flags;
5415 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5416 struct ieee80211_conf *conf = NULL;
5417
5418 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5419
5420 conf = ieee80211_get_hw_conf(priv->hw);
5421
5422 if (!exit_pending)
5423 set_bit(STATUS_EXIT_PENDING, &priv->status);
5424
ab53d8af
MA
5425 iwl_leds_unregister(priv);
5426
c8381fdc
MA
5427 iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
5428
bf85ea4f 5429 iwlcore_clear_stations_table(priv);
b481de9c
ZY
5430
5431 /* Unblock any waiting calls */
5432 wake_up_interruptible_all(&priv->wait_command_queue);
5433
b481de9c
ZY
5434 /* Wipe out the EXIT_PENDING status bit if we are not actually
5435 * exiting the module */
5436 if (!exit_pending)
5437 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5438
5439 /* stop and reset the on-board processor */
3395f6e9 5440 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
5441
5442 /* tell the device to stop sending interrupts */
0359facc 5443 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 5444 iwl4965_disable_interrupts(priv);
0359facc
MA
5445 spin_unlock_irqrestore(&priv->lock, flags);
5446 iwl_synchronize_irq(priv);
b481de9c
ZY
5447
5448 if (priv->mac80211_registered)
5449 ieee80211_stop_queues(priv->hw);
5450
bb8c093b 5451 /* If we have not previously called iwl4965_init() then
b481de9c 5452 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 5453 if (!iwl_is_init(priv)) {
b481de9c
ZY
5454 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5455 STATUS_RF_KILL_HW |
5456 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5457 STATUS_RF_KILL_SW |
9788864e
RC
5458 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5459 STATUS_GEO_CONFIGURED |
b481de9c
ZY
5460 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5461 STATUS_IN_SUSPEND;
5462 goto exit;
5463 }
5464
5465 /* ...otherwise clear out all the status bits but the RF Kill and
5466 * SUSPEND bits and continue taking the NIC down. */
5467 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5468 STATUS_RF_KILL_HW |
5469 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5470 STATUS_RF_KILL_SW |
9788864e
RC
5471 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5472 STATUS_GEO_CONFIGURED |
b481de9c
ZY
5473 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5474 STATUS_IN_SUSPEND |
5475 test_bit(STATUS_FW_ERROR, &priv->status) <<
5476 STATUS_FW_ERROR;
5477
5478 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5479 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 5480 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
5481 spin_unlock_irqrestore(&priv->lock, flags);
5482
bb8c093b
CH
5483 iwl4965_hw_txq_ctx_stop(priv);
5484 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY
5485
5486 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
5487 if (!iwl_grab_nic_access(priv)) {
5488 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 5489 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 5490 iwl_release_nic_access(priv);
b481de9c
ZY
5491 }
5492 spin_unlock_irqrestore(&priv->lock, flags);
5493
5494 udelay(5);
5495
bb8c093b 5496 iwl4965_hw_nic_stop_master(priv);
3395f6e9 5497 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
bb8c093b 5498 iwl4965_hw_nic_reset(priv);
b481de9c
ZY
5499
5500 exit:
bb8c093b 5501 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
5502
5503 if (priv->ibss_beacon)
5504 dev_kfree_skb(priv->ibss_beacon);
5505 priv->ibss_beacon = NULL;
5506
5507 /* clear out any free frames */
bb8c093b 5508 iwl4965_clear_free_frames(priv);
b481de9c
ZY
5509}
5510
c79dd5b5 5511static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
5512{
5513 mutex_lock(&priv->mutex);
bb8c093b 5514 __iwl4965_down(priv);
b481de9c 5515 mutex_unlock(&priv->mutex);
b24d22b1 5516
bb8c093b 5517 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY
5518}
5519
5520#define MAX_HW_RESTARTS 5
5521
c79dd5b5 5522static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 5523{
57aab75a
TW
5524 int i;
5525 int ret;
b481de9c
ZY
5526
5527 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5528 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5529 return -EIO;
5530 }
5531
5532 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5533 IWL_WARNING("Radio disabled by SW RF kill (module "
5534 "parameter)\n");
ad97edd2 5535 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
5536 return -ENODEV;
5537 }
5538
e903fbd4
RC
5539 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5540 IWL_ERROR("ucode not available for device bringup\n");
5541 return -EIO;
5542 }
5543
e655b9f0 5544 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 5545 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
5546 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5547 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5548 else {
5549 set_bit(STATUS_RF_KILL_HW, &priv->status);
5550 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 5551 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY
5552 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5553 return -ENODEV;
5554 }
b481de9c
ZY
5555 }
5556
ad97edd2 5557 iwl_rfkill_set_hw_state(priv);
3395f6e9 5558 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5559
57aab75a
TW
5560 ret = priv->cfg->ops->lib->hw_nic_init(priv);
5561 if (ret) {
5562 IWL_ERROR("Unable to init nic\n");
5563 return ret;
b481de9c
ZY
5564 }
5565
5566 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
5567 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5568 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
5569 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5570
5571 /* clear (again), then enable host interrupts */
3395f6e9 5572 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 5573 iwl4965_enable_interrupts(priv);
b481de9c
ZY
5574
5575 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
5576 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5577 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
5578
5579 /* Copy original ucode data image from disk into backup cache.
5580 * This will be used to initialize the on-board processor's
5581 * data SRAM for a clean start when the runtime program first loads. */
5582 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5583 priv->ucode_data.len);
b481de9c 5584
e655b9f0
ZY
5585 /* We return success when we resume from suspend and rf_kill is on. */
5586 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5587 return 0;
b481de9c
ZY
5588
5589 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5590
bf85ea4f 5591 iwlcore_clear_stations_table(priv);
b481de9c
ZY
5592
5593 /* load bootstrap state machine,
5594 * load bootstrap program into processor's memory,
5595 * prepare to load the "initialize" uCode */
57aab75a 5596 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 5597
57aab75a
TW
5598 if (ret) {
5599 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
5600 continue;
5601 }
5602
5603 /* start card; "initialize" will load runtime ucode */
bb8c093b 5604 iwl4965_nic_start(priv);
b481de9c 5605
b481de9c
ZY
5606 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5607
5608 return 0;
5609 }
5610
5611 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5612 __iwl4965_down(priv);
b481de9c
ZY
5613
5614 /* tried to restart and config the device for as long as our
5615 * patience could withstand */
5616 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5617 return -EIO;
5618}
5619
5620
5621/*****************************************************************************
5622 *
5623 * Workqueue callbacks
5624 *
5625 *****************************************************************************/
5626
bb8c093b 5627static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5628{
c79dd5b5
TW
5629 struct iwl_priv *priv =
5630 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
5631
5632 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5633 return;
5634
5635 mutex_lock(&priv->mutex);
bb8c093b 5636 iwl4965_init_alive_start(priv);
b481de9c
ZY
5637 mutex_unlock(&priv->mutex);
5638}
5639
bb8c093b 5640static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5641{
c79dd5b5
TW
5642 struct iwl_priv *priv =
5643 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
5644
5645 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5646 return;
5647
5648 mutex_lock(&priv->mutex);
bb8c093b 5649 iwl4965_alive_start(priv);
b481de9c
ZY
5650 mutex_unlock(&priv->mutex);
5651}
5652
bb8c093b 5653static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5654{
c79dd5b5 5655 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
5656
5657 wake_up_interruptible(&priv->wait_command_queue);
5658
5659 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5660 return;
5661
5662 mutex_lock(&priv->mutex);
5663
fee1247a 5664 if (!iwl_is_rfkill(priv)) {
b481de9c
ZY
5665 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5666 "HW and/or SW RF Kill no longer active, restarting "
5667 "device\n");
5668 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5669 queue_work(priv->workqueue, &priv->restart);
5670 } else {
ad97edd2
MA
5671 /* make sure mac80211 stop sending Tx frame */
5672 if (priv->mac80211_registered)
5673 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
5674
5675 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5676 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5677 "disabled by SW switch\n");
5678 else
5679 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5680 "Kill switch must be turned off for "
5681 "wireless networking to work.\n");
5682 }
ad97edd2
MA
5683 iwl_rfkill_set_hw_state(priv);
5684
b481de9c
ZY
5685 mutex_unlock(&priv->mutex);
5686}
5687
5688#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5689
bb8c093b 5690static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5691{
c79dd5b5
TW
5692 struct iwl_priv *priv =
5693 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY
5694
5695 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5696 return;
5697
5698 mutex_lock(&priv->mutex);
5699 if (test_bit(STATUS_SCANNING, &priv->status) ||
5700 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5701 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5702 "Scan completion watchdog resetting adapter (%dms)\n",
5703 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 5704
b481de9c 5705 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 5706 iwl4965_send_scan_abort(priv);
b481de9c
ZY
5707 }
5708 mutex_unlock(&priv->mutex);
5709}
5710
bb8c093b 5711static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 5712{
c79dd5b5
TW
5713 struct iwl_priv *priv =
5714 container_of(data, struct iwl_priv, request_scan);
857485c0 5715 struct iwl_host_cmd cmd = {
b481de9c 5716 .id = REPLY_SCAN_CMD,
bb8c093b 5717 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY
5718 .meta.flags = CMD_SIZE_HUGE,
5719 };
bb8c093b 5720 struct iwl4965_scan_cmd *scan;
b481de9c 5721 struct ieee80211_conf *conf = NULL;
78330fdd 5722 u16 cmd_len;
8318d78a 5723 enum ieee80211_band band;
78330fdd 5724 u8 direct_mask;
857485c0 5725 int ret = 0;
b481de9c
ZY
5726
5727 conf = ieee80211_get_hw_conf(priv->hw);
5728
5729 mutex_lock(&priv->mutex);
5730
fee1247a 5731 if (!iwl_is_ready(priv)) {
b481de9c
ZY
5732 IWL_WARNING("request scan called when driver not ready.\n");
5733 goto done;
5734 }
5735
5736 /* Make sure the scan wasn't cancelled before this queued work
5737 * was given the chance to run... */
5738 if (!test_bit(STATUS_SCANNING, &priv->status))
5739 goto done;
5740
5741 /* This should never be called or scheduled if there is currently
5742 * a scan active in the hardware. */
5743 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5744 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5745 "Ignoring second request.\n");
857485c0 5746 ret = -EIO;
b481de9c
ZY
5747 goto done;
5748 }
5749
5750 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5751 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5752 goto done;
5753 }
5754
5755 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5756 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5757 goto done;
5758 }
5759
fee1247a 5760 if (iwl_is_rfkill(priv)) {
b481de9c
ZY
5761 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5762 goto done;
5763 }
5764
5765 if (!test_bit(STATUS_READY, &priv->status)) {
5766 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5767 goto done;
5768 }
5769
5770 if (!priv->scan_bands) {
5771 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5772 goto done;
5773 }
5774
5775 if (!priv->scan) {
bb8c093b 5776 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY
5777 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5778 if (!priv->scan) {
857485c0 5779 ret = -ENOMEM;
b481de9c
ZY
5780 goto done;
5781 }
5782 }
5783 scan = priv->scan;
bb8c093b 5784 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
5785
5786 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5787 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5788
3109ece1 5789 if (iwl_is_associated(priv)) {
b481de9c
ZY
5790 u16 interval = 0;
5791 u32 extra;
5792 u32 suspend_time = 100;
5793 u32 scan_suspend_time = 100;
5794 unsigned long flags;
5795
5796 IWL_DEBUG_INFO("Scanning while associated...\n");
5797
5798 spin_lock_irqsave(&priv->lock, flags);
5799 interval = priv->beacon_int;
5800 spin_unlock_irqrestore(&priv->lock, flags);
5801
5802 scan->suspend_time = 0;
052c4b9f 5803 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
5804 if (!interval)
5805 interval = suspend_time;
5806
5807 extra = (suspend_time / interval) << 22;
5808 scan_suspend_time = (extra |
5809 ((suspend_time % interval) * 1024));
5810 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5811 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5812 scan_suspend_time, interval);
5813 }
5814
5815 /* We should add the ability for user to lock to PASSIVE ONLY */
5816 if (priv->one_direct_scan) {
5817 IWL_DEBUG_SCAN
5818 ("Kicking off one direct scan for '%s'\n",
bb8c093b 5819 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY
5820 priv->direct_ssid_len));
5821 scan->direct_scan[0].id = WLAN_EID_SSID;
5822 scan->direct_scan[0].len = priv->direct_ssid_len;
5823 memcpy(scan->direct_scan[0].ssid,
5824 priv->direct_ssid, priv->direct_ssid_len);
5825 direct_mask = 1;
3109ece1 5826 } else if (!iwl_is_associated(priv) && priv->essid_len) {
b481de9c
ZY
5827 scan->direct_scan[0].id = WLAN_EID_SSID;
5828 scan->direct_scan[0].len = priv->essid_len;
5829 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
5830 direct_mask = 1;
857485c0 5831 } else {
b481de9c 5832 direct_mask = 0;
857485c0 5833 }
b481de9c 5834
b481de9c 5835 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5425e490 5836 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY
5837 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5838
b481de9c
ZY
5839
5840 switch (priv->scan_bands) {
5841 case 2:
5842 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5843 scan->tx_cmd.rate_n_flags =
bb8c093b 5844 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY
5845 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
5846
5847 scan->good_CRC_th = 0;
8318d78a 5848 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY
5849 break;
5850
5851 case 1:
5852 scan->tx_cmd.rate_n_flags =
bb8c093b 5853 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY
5854 RATE_MCS_ANT_B_MSK);
5855 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 5856 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY
5857 break;
5858
5859 default:
5860 IWL_WARNING("Invalid scan band count\n");
5861 goto done;
5862 }
5863
78330fdd
TW
5864 /* We don't build a direct scan probe request; the uCode will do
5865 * that based on the direct_mask added to each channel entry */
5866 cmd_len = iwl4965_fill_probe_req(priv, band,
5867 (struct ieee80211_mgmt *)scan->data,
5868 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
5869
5870 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY
5871 /* select Rx chains */
5872
5873 /* Force use of chains B and C (0x6) for scan Rx.
5874 * Avoid A (0x1) because of its off-channel reception on A-band.
5875 * MIMO is not used here, but value is required to make uCode happy. */
5876 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
5877 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
5878 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
5879 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
5880
5881 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
5882 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5883
26c0f03f 5884 if (direct_mask) {
b481de9c
ZY
5885 IWL_DEBUG_SCAN
5886 ("Initiating direct scan for %s.\n",
bb8c093b 5887 iwl4965_escape_essid(priv->essid, priv->essid_len));
26c0f03f
RC
5888 scan->channel_count =
5889 iwl4965_get_channels_for_scan(
5890 priv, band, 1, /* active */
5891 direct_mask,
5892 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5893 } else {
b481de9c 5894 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
26c0f03f
RC
5895 scan->channel_count =
5896 iwl4965_get_channels_for_scan(
5897 priv, band, 0, /* passive */
5898 direct_mask,
5899 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5900 }
b481de9c
ZY
5901
5902 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 5903 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY
5904 cmd.data = scan;
5905 scan->len = cpu_to_le16(cmd.len);
5906
5907 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW
5908 ret = iwl_send_cmd_sync(priv, &cmd);
5909 if (ret)
b481de9c
ZY
5910 goto done;
5911
5912 queue_delayed_work(priv->workqueue, &priv->scan_check,
5913 IWL_SCAN_CHECK_WATCHDOG);
5914
5915 mutex_unlock(&priv->mutex);
5916 return;
5917
5918 done:
01ebd063 5919 /* inform mac80211 scan aborted */
b481de9c
ZY
5920 queue_work(priv->workqueue, &priv->scan_completed);
5921 mutex_unlock(&priv->mutex);
5922}
5923
bb8c093b 5924static void iwl4965_bg_up(struct work_struct *data)
b481de9c 5925{
c79dd5b5 5926 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
5927
5928 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5929 return;
5930
5931 mutex_lock(&priv->mutex);
bb8c093b 5932 __iwl4965_up(priv);
b481de9c
ZY
5933 mutex_unlock(&priv->mutex);
5934}
5935
bb8c093b 5936static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 5937{
c79dd5b5 5938 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
5939
5940 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5941 return;
5942
bb8c093b 5943 iwl4965_down(priv);
b481de9c
ZY
5944 queue_work(priv->workqueue, &priv->up);
5945}
5946
bb8c093b 5947static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 5948{
c79dd5b5
TW
5949 struct iwl_priv *priv =
5950 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
5951
5952 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5953 return;
5954
5955 mutex_lock(&priv->mutex);
bb8c093b 5956 iwl4965_rx_replenish(priv);
b481de9c
ZY
5957 mutex_unlock(&priv->mutex);
5958}
5959
7878a5a4
MA
5960#define IWL_DELAY_NEXT_SCAN (HZ*2)
5961
508e32e1 5962static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 5963{
b481de9c 5964 struct ieee80211_conf *conf = NULL;
857485c0 5965 int ret = 0;
0795af57 5966 DECLARE_MAC_BUF(mac);
b481de9c
ZY
5967
5968 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
5969 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
5970 return;
5971 }
5972
0795af57
JP
5973 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
5974 priv->assoc_id,
5975 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
5976
5977
5978 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5979 return;
5980
b481de9c 5981
508e32e1 5982 if (!priv->vif || !priv->is_open)
948c171c 5983 return;
508e32e1 5984
bb8c093b 5985 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 5986
b481de9c
ZY
5987 conf = ieee80211_get_hw_conf(priv->hw);
5988
5989 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5990 iwl4965_commit_rxon(priv);
b481de9c 5991
bb8c093b
CH
5992 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5993 iwl4965_setup_rxon_timing(priv);
857485c0 5994 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5995 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5996 if (ret)
b481de9c
ZY
5997 IWL_WARNING("REPLY_RXON_TIMING failed - "
5998 "Attempting to continue.\n");
5999
6000 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6001
c8b0e6e1 6002#ifdef CONFIG_IWL4965_HT
fd105e79
RR
6003 if (priv->current_ht_config.is_ht)
6004 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 6005#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY
6006 iwl4965_set_rxon_chain(priv);
6007 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6008
6009 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6010 priv->assoc_id, priv->beacon_int);
6011
6012 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6013 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6014 else
6015 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6016
6017 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6018 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6019 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6020 else
6021 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6022
6023 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6024 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6025
6026 }
6027
bb8c093b 6028 iwl4965_commit_rxon(priv);
b481de9c
ZY
6029
6030 switch (priv->iw_mode) {
6031 case IEEE80211_IF_TYPE_STA:
bb8c093b 6032 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
6033 break;
6034
6035 case IEEE80211_IF_TYPE_IBSS:
6036
6037 /* clear out the station table */
bf85ea4f 6038 iwlcore_clear_stations_table(priv);
b481de9c 6039
bb8c093b
CH
6040 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
6041 iwl4965_rxon_add_station(priv, priv->bssid, 0);
6042 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
6043 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
6044
6045 break;
6046
6047 default:
6048 IWL_ERROR("%s Should not be called in %d mode\n",
6049 __FUNCTION__, priv->iw_mode);
6050 break;
6051 }
6052
bb8c093b 6053 iwl4965_sequence_reset(priv);
b481de9c 6054
c8b0e6e1 6055#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY
6056 /* Enable Rx differential gain and sensitivity calibrations */
6057 iwl4965_chain_noise_reset(priv);
6058 priv->start_calib = 1;
c8b0e6e1 6059#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY
6060
6061 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6062 priv->assoc_station_added = 1;
6063
bb8c093b 6064 iwl4965_activate_qos(priv, 0);
292ae174 6065
7878a5a4
MA
6066 /* we have just associated, don't start scan too early */
6067 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
6068}
6069
6070
6071static void iwl4965_bg_post_associate(struct work_struct *data)
6072{
6073 struct iwl_priv *priv = container_of(data, struct iwl_priv,
6074 post_associate.work);
6075
6076 mutex_lock(&priv->mutex);
6077 iwl4965_post_associate(priv);
b481de9c 6078 mutex_unlock(&priv->mutex);
508e32e1 6079
b481de9c
ZY
6080}
6081
bb8c093b 6082static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 6083{
c79dd5b5 6084 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 6085
fee1247a 6086 if (!iwl_is_ready(priv))
b481de9c
ZY
6087 return;
6088
6089 mutex_lock(&priv->mutex);
6090
6091 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 6092 iwl4965_send_scan_abort(priv);
b481de9c
ZY
6093
6094 mutex_unlock(&priv->mutex);
6095}
6096
76bb77e0
ZY
6097static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6098
bb8c093b 6099static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 6100{
c79dd5b5
TW
6101 struct iwl_priv *priv =
6102 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY
6103
6104 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6105
6106 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6107 return;
6108
a0646470
ZY
6109 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6110 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 6111
b481de9c
ZY
6112 ieee80211_scan_completed(priv->hw);
6113
6114 /* Since setting the TXPOWER may have been deferred while
6115 * performing the scan, fire one off */
6116 mutex_lock(&priv->mutex);
bb8c093b 6117 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
6118 mutex_unlock(&priv->mutex);
6119}
6120
6121/*****************************************************************************
6122 *
6123 * mac80211 entry point functions
6124 *
6125 *****************************************************************************/
6126
5a66926a
ZY
6127#define UCODE_READY_TIMEOUT (2 * HZ)
6128
bb8c093b 6129static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 6130{
c79dd5b5 6131 struct iwl_priv *priv = hw->priv;
5a66926a 6132 int ret;
b481de9c
ZY
6133
6134 IWL_DEBUG_MAC80211("enter\n");
6135
5a66926a
ZY
6136 if (pci_enable_device(priv->pci_dev)) {
6137 IWL_ERROR("Fail to pci_enable_device\n");
6138 return -ENODEV;
6139 }
6140 pci_restore_state(priv->pci_dev);
6141 pci_enable_msi(priv->pci_dev);
6142
6143 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
6144 DRV_NAME, priv);
6145 if (ret) {
6146 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6147 goto out_disable_msi;
6148 }
6149
b481de9c
ZY
6150 /* we should be verifying the device is ready to be opened */
6151 mutex_lock(&priv->mutex);
6152
5a66926a
ZY
6153 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
6154 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6155 * ucode filename and max sizes are card-specific. */
b481de9c 6156
5a66926a
ZY
6157 if (!priv->ucode_code.len) {
6158 ret = iwl4965_read_ucode(priv);
6159 if (ret) {
6160 IWL_ERROR("Could not read microcode: %d\n", ret);
6161 mutex_unlock(&priv->mutex);
6162 goto out_release_irq;
6163 }
6164 }
b481de9c 6165
e655b9f0 6166 ret = __iwl4965_up(priv);
5a66926a 6167
b481de9c 6168 mutex_unlock(&priv->mutex);
5a66926a 6169
e655b9f0
ZY
6170 if (ret)
6171 goto out_release_irq;
6172
6173 IWL_DEBUG_INFO("Start UP work done.\n");
6174
6175 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6176 return 0;
6177
5a66926a
ZY
6178 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6179 * mac80211 will not be run successfully. */
6180 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6181 test_bit(STATUS_READY, &priv->status),
6182 UCODE_READY_TIMEOUT);
6183 if (!ret) {
6184 if (!test_bit(STATUS_READY, &priv->status)) {
6185 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6186 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6187 ret = -ETIMEDOUT;
6188 goto out_release_irq;
6189 }
6190 }
6191
e655b9f0 6192 priv->is_open = 1;
b481de9c
ZY
6193 IWL_DEBUG_MAC80211("leave\n");
6194 return 0;
5a66926a
ZY
6195
6196out_release_irq:
6197 free_irq(priv->pci_dev->irq, priv);
6198out_disable_msi:
6199 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
6200 pci_disable_device(priv->pci_dev);
6201 priv->is_open = 0;
6202 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 6203 return ret;
b481de9c
ZY
6204}
6205
bb8c093b 6206static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 6207{
c79dd5b5 6208 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6209
6210 IWL_DEBUG_MAC80211("enter\n");
948c171c 6211
e655b9f0
ZY
6212 if (!priv->is_open) {
6213 IWL_DEBUG_MAC80211("leave - skip\n");
6214 return;
6215 }
6216
b481de9c 6217 priv->is_open = 0;
5a66926a 6218
fee1247a 6219 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
6220 /* stop mac, cancel any scan request and clear
6221 * RXON_FILTER_ASSOC_MSK BIT
6222 */
5a66926a
ZY
6223 mutex_lock(&priv->mutex);
6224 iwl4965_scan_cancel_timeout(priv, 100);
6225 cancel_delayed_work(&priv->post_associate);
fde3571f 6226 mutex_unlock(&priv->mutex);
fde3571f
MA
6227 }
6228
5a66926a
ZY
6229 iwl4965_down(priv);
6230
6231 flush_workqueue(priv->workqueue);
6232 free_irq(priv->pci_dev->irq, priv);
6233 pci_disable_msi(priv->pci_dev);
6234 pci_save_state(priv->pci_dev);
6235 pci_disable_device(priv->pci_dev);
948c171c 6236
b481de9c 6237 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6238}
6239
bb8c093b 6240static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
6241 struct ieee80211_tx_control *ctl)
6242{
c79dd5b5 6243 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6244
6245 IWL_DEBUG_MAC80211("enter\n");
6246
6247 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6248 IWL_DEBUG_MAC80211("leave - monitor\n");
6249 return -1;
6250 }
6251
6252 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 6253 ctl->tx_rate->bitrate);
b481de9c 6254
bb8c093b 6255 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY
6256 dev_kfree_skb_any(skb);
6257
6258 IWL_DEBUG_MAC80211("leave\n");
6259 return 0;
6260}
6261
bb8c093b 6262static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
6263 struct ieee80211_if_init_conf *conf)
6264{
c79dd5b5 6265 struct iwl_priv *priv = hw->priv;
b481de9c 6266 unsigned long flags;
0795af57 6267 DECLARE_MAC_BUF(mac);
b481de9c 6268
32bfd35d 6269 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 6270
32bfd35d
JB
6271 if (priv->vif) {
6272 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 6273 return -EOPNOTSUPP;
b481de9c
ZY
6274 }
6275
6276 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 6277 priv->vif = conf->vif;
b481de9c
ZY
6278
6279 spin_unlock_irqrestore(&priv->lock, flags);
6280
6281 mutex_lock(&priv->mutex);
864792e3
TW
6282
6283 if (conf->mac_addr) {
6284 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
6285 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6286 }
b481de9c 6287
fee1247a 6288 if (iwl_is_ready(priv))
5a66926a
ZY
6289 iwl4965_set_mode(priv, conf->type);
6290
b481de9c
ZY
6291 mutex_unlock(&priv->mutex);
6292
5a66926a 6293 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
6294 return 0;
6295}
6296
6297/**
bb8c093b 6298 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
6299 *
6300 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6301 * be set inappropriately and the driver currently sets the hardware up to
6302 * use it whenever needed.
6303 */
bb8c093b 6304static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 6305{
c79dd5b5 6306 struct iwl_priv *priv = hw->priv;
bf85ea4f 6307 const struct iwl_channel_info *ch_info;
b481de9c 6308 unsigned long flags;
76bb77e0 6309 int ret = 0;
b481de9c
ZY
6310
6311 mutex_lock(&priv->mutex);
8318d78a 6312 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 6313
12342c47
ZY
6314 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6315
fee1247a 6316 if (!iwl_is_ready(priv)) {
b481de9c 6317 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
6318 ret = -EIO;
6319 goto out;
b481de9c
ZY
6320 }
6321
1ea87396 6322 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 6323 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
6324 IWL_DEBUG_MAC80211("leave - scanning\n");
6325 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 6326 mutex_unlock(&priv->mutex);
a0646470 6327 return 0;
b481de9c
ZY
6328 }
6329
6330 spin_lock_irqsave(&priv->lock, flags);
6331
8622e705 6332 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 6333 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6334 if (!is_channel_valid(ch_info)) {
b481de9c
ZY
6335 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6336 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY
6337 ret = -EINVAL;
6338 goto out;
b481de9c
ZY
6339 }
6340
c8b0e6e1 6341#ifdef CONFIG_IWL4965_HT
78330fdd 6342 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
6343 * from any ht related info since 2.4 does not
6344 * support ht */
78330fdd 6345 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY
6346#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6347 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
6348#endif
6349 )
6350 priv->staging_rxon.flags = 0;
c8b0e6e1 6351#endif /* CONFIG_IWL4965_HT */
b481de9c 6352
bf85ea4f 6353 iwlcore_set_rxon_channel(priv, conf->channel->band,
8318d78a 6354 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6355
8318d78a 6356 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY
6357
6358 /* The list of supported rates and rate mask can be different
8318d78a 6359 * for each band; since the band may have changed, reset
b481de9c 6360 * the rate mask to what mac80211 lists */
bb8c093b 6361 iwl4965_set_rate(priv);
b481de9c
ZY
6362
6363 spin_unlock_irqrestore(&priv->lock, flags);
6364
6365#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6366 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 6367 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 6368 goto out;
b481de9c
ZY
6369 }
6370#endif
6371
ad97edd2
MA
6372 if (priv->cfg->ops->lib->radio_kill_sw)
6373 priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
6374
6375 if (!conf->radio_enabled) {
6376 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 6377 goto out;
b481de9c
ZY
6378 }
6379
fee1247a 6380 if (iwl_is_rfkill(priv)) {
b481de9c 6381 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
6382 ret = -EIO;
6383 goto out;
b481de9c
ZY
6384 }
6385
bb8c093b 6386 iwl4965_set_rate(priv);
b481de9c
ZY
6387
6388 if (memcmp(&priv->active_rxon,
6389 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 6390 iwl4965_commit_rxon(priv);
b481de9c
ZY
6391 else
6392 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6393
6394 IWL_DEBUG_MAC80211("leave\n");
6395
a0646470
ZY
6396out:
6397 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 6398 mutex_unlock(&priv->mutex);
76bb77e0 6399 return ret;
b481de9c
ZY
6400}
6401
c79dd5b5 6402static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 6403{
857485c0 6404 int ret = 0;
b481de9c 6405
d986bcd1 6406 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
6407 return;
6408
6409 /* The following should be done only at AP bring up */
6410 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6411
6412 /* RXON - unassoc (to set timing command) */
6413 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6414 iwl4965_commit_rxon(priv);
b481de9c
ZY
6415
6416 /* RXON Timing */
bb8c093b
CH
6417 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6418 iwl4965_setup_rxon_timing(priv);
857485c0 6419 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6420 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6421 if (ret)
b481de9c
ZY
6422 IWL_WARNING("REPLY_RXON_TIMING failed - "
6423 "Attempting to continue.\n");
6424
6425 iwl4965_set_rxon_chain(priv);
6426
6427 /* FIXME: what should be the assoc_id for AP? */
6428 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6429 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6430 priv->staging_rxon.flags |=
6431 RXON_FLG_SHORT_PREAMBLE_MSK;
6432 else
6433 priv->staging_rxon.flags &=
6434 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6435
6436 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6437 if (priv->assoc_capability &
6438 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6439 priv->staging_rxon.flags |=
6440 RXON_FLG_SHORT_SLOT_MSK;
6441 else
6442 priv->staging_rxon.flags &=
6443 ~RXON_FLG_SHORT_SLOT_MSK;
6444
6445 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6446 priv->staging_rxon.flags &=
6447 ~RXON_FLG_SHORT_SLOT_MSK;
6448 }
6449 /* restore RXON assoc */
6450 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 6451 iwl4965_commit_rxon(priv);
bb8c093b 6452 iwl4965_activate_qos(priv, 1);
bb8c093b 6453 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 6454 }
bb8c093b 6455 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
6456
6457 /* FIXME - we need to add code here to detect a totally new
6458 * configuration, reset the AP, unassoc, rxon timing, assoc,
6459 * clear sta table, add BCAST sta... */
6460}
6461
32bfd35d
JB
6462static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
6463 struct ieee80211_vif *vif,
b481de9c
ZY
6464 struct ieee80211_if_conf *conf)
6465{
c79dd5b5 6466 struct iwl_priv *priv = hw->priv;
0795af57 6467 DECLARE_MAC_BUF(mac);
b481de9c
ZY
6468 unsigned long flags;
6469 int rc;
6470
6471 if (conf == NULL)
6472 return -EIO;
6473
b716bb91
EG
6474 if (priv->vif != vif) {
6475 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
6476 return 0;
6477 }
6478
b481de9c
ZY
6479 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6480 (!conf->beacon || !conf->ssid_len)) {
6481 IWL_DEBUG_MAC80211
6482 ("Leaving in AP mode because HostAPD is not ready.\n");
6483 return 0;
6484 }
6485
fee1247a 6486 if (!iwl_is_alive(priv))
5a66926a
ZY
6487 return -EAGAIN;
6488
b481de9c
ZY
6489 mutex_lock(&priv->mutex);
6490
b481de9c 6491 if (conf->bssid)
0795af57
JP
6492 IWL_DEBUG_MAC80211("bssid: %s\n",
6493 print_mac(mac, conf->bssid));
b481de9c 6494
4150c572
JB
6495/*
6496 * very dubious code was here; the probe filtering flag is never set:
6497 *
b481de9c
ZY
6498 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6499 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 6500 */
b481de9c
ZY
6501
6502 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6503 if (!conf->bssid) {
6504 conf->bssid = priv->mac_addr;
6505 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
6506 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6507 print_mac(mac, conf->bssid));
b481de9c
ZY
6508 }
6509 if (priv->ibss_beacon)
6510 dev_kfree_skb(priv->ibss_beacon);
6511
6512 priv->ibss_beacon = conf->beacon;
6513 }
6514
fee1247a 6515 if (iwl_is_rfkill(priv))
fde3571f
MA
6516 goto done;
6517
b481de9c
ZY
6518 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6519 !is_multicast_ether_addr(conf->bssid)) {
6520 /* If there is currently a HW scan going on in the background
6521 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6522 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
6523 IWL_WARNING("Aborted scan still in progress "
6524 "after 100ms\n");
6525 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6526 mutex_unlock(&priv->mutex);
6527 return -EAGAIN;
6528 }
6529 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6530
6531 /* TODO: Audit driver for usage of these members and see
6532 * if mac80211 deprecates them (priv->bssid looks like it
6533 * shouldn't be there, but I haven't scanned the IBSS code
6534 * to verify) - jpk */
6535 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6536
6537 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6538 iwl4965_config_ap(priv);
b481de9c 6539 else {
bb8c093b 6540 rc = iwl4965_commit_rxon(priv);
b481de9c 6541 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6542 iwl4965_rxon_add_station(
b481de9c
ZY
6543 priv, priv->active_rxon.bssid_addr, 1);
6544 }
6545
6546 } else {
bb8c093b 6547 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6548 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6549 iwl4965_commit_rxon(priv);
b481de9c
ZY
6550 }
6551
fde3571f 6552 done:
b481de9c
ZY
6553 spin_lock_irqsave(&priv->lock, flags);
6554 if (!conf->ssid_len)
6555 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6556 else
6557 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6558
6559 priv->essid_len = conf->ssid_len;
6560 spin_unlock_irqrestore(&priv->lock, flags);
6561
6562 IWL_DEBUG_MAC80211("leave\n");
6563 mutex_unlock(&priv->mutex);
6564
6565 return 0;
6566}
6567
bb8c093b 6568static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
6569 unsigned int changed_flags,
6570 unsigned int *total_flags,
6571 int mc_count, struct dev_addr_list *mc_list)
6572{
6573 /*
6574 * XXX: dummy
bb8c093b 6575 * see also iwl4965_connection_init_rx_config
4150c572
JB
6576 */
6577 *total_flags = 0;
6578}
6579
bb8c093b 6580static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
6581 struct ieee80211_if_init_conf *conf)
6582{
c79dd5b5 6583 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6584
6585 IWL_DEBUG_MAC80211("enter\n");
6586
6587 mutex_lock(&priv->mutex);
948c171c 6588
fee1247a 6589 if (iwl_is_ready_rf(priv)) {
fde3571f
MA
6590 iwl4965_scan_cancel_timeout(priv, 100);
6591 cancel_delayed_work(&priv->post_associate);
6592 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6593 iwl4965_commit_rxon(priv);
6594 }
32bfd35d
JB
6595 if (priv->vif == conf->vif) {
6596 priv->vif = NULL;
b481de9c
ZY
6597 memset(priv->bssid, 0, ETH_ALEN);
6598 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6599 priv->essid_len = 0;
6600 }
6601 mutex_unlock(&priv->mutex);
6602
6603 IWL_DEBUG_MAC80211("leave\n");
6604
6605}
471b3efd 6606
98952d5d
TW
6607
6608#ifdef CONFIG_IWL4965_HT
6609static void iwl4965_ht_conf(struct iwl_priv *priv,
6610 struct ieee80211_bss_conf *bss_conf)
6611{
6612 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
6613 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
6614 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
6615
6616 IWL_DEBUG_MAC80211("enter: \n");
6617
6618 iwl_conf->is_ht = bss_conf->assoc_ht;
6619
6620 if (!iwl_conf->is_ht)
6621 return;
6622
6623 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
6624
6625 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
6626 iwl_conf->sgf |= 0x1;
6627 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
6628 iwl_conf->sgf |= 0x2;
6629
6630 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
6631 iwl_conf->max_amsdu_size =
6632 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
6633
6634 iwl_conf->supported_chan_width =
6635 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
6636 iwl_conf->extension_chan_offset =
6637 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
6638 /* If no above or below channel supplied disable FAT channel */
6639 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
6640 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
6641 iwl_conf->supported_chan_width = 0;
6642
6643 iwl_conf->tx_mimo_ps_mode =
6644 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
6645 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
6646
6647 iwl_conf->control_channel = ht_bss_conf->primary_channel;
6648 iwl_conf->tx_chan_width =
6649 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
6650 iwl_conf->ht_protection =
6651 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
6652 iwl_conf->non_GF_STA_present =
6653 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
6654
6655 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
6656 IWL_DEBUG_MAC80211("leave\n");
6657}
6658#else
6659static inline void iwl4965_ht_conf(struct iwl_priv *priv,
6660 struct ieee80211_bss_conf *bss_conf)
6661{
6662}
6663#endif
6664
3109ece1 6665#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
6666static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6667 struct ieee80211_vif *vif,
6668 struct ieee80211_bss_conf *bss_conf,
6669 u32 changes)
220173b0 6670{
c79dd5b5 6671 struct iwl_priv *priv = hw->priv;
220173b0 6672
3109ece1
TW
6673 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6674
471b3efd 6675 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
6676 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6677 bss_conf->use_short_preamble);
471b3efd 6678 if (bss_conf->use_short_preamble)
220173b0
TW
6679 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6680 else
6681 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6682 }
6683
471b3efd 6684 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 6685 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 6686 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
6687 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6688 else
6689 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6690 }
6691
98952d5d 6692 if (changes & BSS_CHANGED_HT) {
3109ece1 6693 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d
TW
6694 iwl4965_ht_conf(priv, bss_conf);
6695 iwl4965_set_rxon_chain(priv);
6696 }
6697
471b3efd 6698 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 6699 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
6700 /* This should never happen as this function should
6701 * never be called from interrupt context. */
6702 if (WARN_ON_ONCE(in_interrupt()))
6703 return;
3109ece1
TW
6704 if (bss_conf->assoc) {
6705 priv->assoc_id = bss_conf->aid;
6706 priv->beacon_int = bss_conf->beacon_int;
6707 priv->timestamp = bss_conf->timestamp;
6708 priv->assoc_capability = bss_conf->assoc_capability;
6709 priv->next_scan_jiffies = jiffies +
6710 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
6711 mutex_lock(&priv->mutex);
6712 iwl4965_post_associate(priv);
6713 mutex_unlock(&priv->mutex);
3109ece1
TW
6714 } else {
6715 priv->assoc_id = 0;
6716 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6717 }
6718 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
6719 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 6720 iwl_send_rxon_assoc(priv);
471b3efd
JB
6721 }
6722
220173b0 6723}
b481de9c 6724
bb8c093b 6725static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
6726{
6727 int rc = 0;
6728 unsigned long flags;
c79dd5b5 6729 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6730
6731 IWL_DEBUG_MAC80211("enter\n");
6732
052c4b9f 6733 mutex_lock(&priv->mutex);
b481de9c
ZY
6734 spin_lock_irqsave(&priv->lock, flags);
6735
fee1247a 6736 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6737 rc = -EIO;
6738 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6739 goto out_unlock;
6740 }
6741
6742 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6743 rc = -EIO;
6744 IWL_ERROR("ERROR: APs don't scan\n");
6745 goto out_unlock;
6746 }
6747
7878a5a4
MA
6748 /* we don't schedule scan within next_scan_jiffies period */
6749 if (priv->next_scan_jiffies &&
6750 time_after(priv->next_scan_jiffies, jiffies)) {
6751 rc = -EAGAIN;
6752 goto out_unlock;
6753 }
b481de9c 6754 /* if we just finished scan ask for delay */
7878a5a4
MA
6755 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6756 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
6757 rc = -EAGAIN;
6758 goto out_unlock;
6759 }
6760 if (len) {
7878a5a4 6761 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6762 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY
6763
6764 priv->one_direct_scan = 1;
6765 priv->direct_ssid_len = (u8)
6766 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6767 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
6768 } else
6769 priv->one_direct_scan = 0;
b481de9c 6770
bb8c093b 6771 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY
6772
6773 IWL_DEBUG_MAC80211("leave\n");
6774
6775out_unlock:
6776 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6777 mutex_unlock(&priv->mutex);
b481de9c
ZY
6778
6779 return rc;
6780}
6781
ab885f8c
EG
6782static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6783 struct ieee80211_key_conf *keyconf, const u8 *addr,
6784 u32 iv32, u16 *phase1key)
6785{
6786 struct iwl_priv *priv = hw->priv;
6787 u8 sta_id = IWL_INVALID_STATION;
6788 unsigned long flags;
6789 __le16 key_flags = 0;
6790 int i;
6791 DECLARE_MAC_BUF(mac);
6792
6793 IWL_DEBUG_MAC80211("enter\n");
6794
6795 sta_id = iwl4965_hw_find_station(priv, addr);
6796 if (sta_id == IWL_INVALID_STATION) {
6797 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6798 print_mac(mac, addr));
6799 return;
6800 }
6801
6802 iwl4965_scan_cancel_timeout(priv, 100);
6803
6804 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
6805 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
6806 key_flags &= ~STA_KEY_FLG_INVALID;
6807
5425e490 6808 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
6809 key_flags |= STA_KEY_MULTICAST_MSK;
6810
6811 spin_lock_irqsave(&priv->sta_lock, flags);
6812
ab885f8c
EG
6813 priv->stations[sta_id].sta.key.key_flags = key_flags;
6814 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
6815
6816 for (i = 0; i < 5; i++)
6817 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
6818 cpu_to_le16(phase1key[i]);
6819
6820 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
6821 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
6822
6823 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6824
6825 spin_unlock_irqrestore(&priv->sta_lock, flags);
6826
6827 IWL_DEBUG_MAC80211("leave\n");
6828}
6829
bb8c093b 6830static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
6831 const u8 *local_addr, const u8 *addr,
6832 struct ieee80211_key_conf *key)
6833{
c79dd5b5 6834 struct iwl_priv *priv = hw->priv;
0795af57 6835 DECLARE_MAC_BUF(mac);
deb09c43
EG
6836 int ret = 0;
6837 u8 sta_id = IWL_INVALID_STATION;
6974e363 6838 u8 is_default_wep_key = 0;
b481de9c
ZY
6839
6840 IWL_DEBUG_MAC80211("enter\n");
6841
fcc76c6b 6842 if (priv->cfg->mod_params->sw_crypto) {
b481de9c
ZY
6843 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6844 return -EOPNOTSUPP;
6845 }
6846
6847 if (is_zero_ether_addr(addr))
6848 /* only support pairwise keys */
6849 return -EOPNOTSUPP;
6850
6974e363
EG
6851 sta_id = iwl4965_hw_find_station(priv, addr);
6852 if (sta_id == IWL_INVALID_STATION) {
6853 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6854 print_mac(mac, addr));
6855 return -EINVAL;
b481de9c 6856
deb09c43 6857 }
b481de9c 6858
6974e363 6859 mutex_lock(&priv->mutex);
bb8c093b 6860 iwl4965_scan_cancel_timeout(priv, 100);
6974e363
EG
6861 mutex_unlock(&priv->mutex);
6862
6863 /* If we are getting WEP group key and we didn't receive any key mapping
6864 * so far, we are in legacy wep mode (group key only), otherwise we are
6865 * in 1X mode.
6866 * In legacy wep mode, we use another host command to the uCode */
5425e490 6867 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
6868 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
6869 if (cmd == SET_KEY)
6870 is_default_wep_key = !priv->key_mapping_key;
6871 else
6872 is_default_wep_key = priv->default_wep_key;
6873 }
052c4b9f 6874
b481de9c 6875 switch (cmd) {
deb09c43 6876 case SET_KEY:
6974e363
EG
6877 if (is_default_wep_key)
6878 ret = iwl_set_default_wep_key(priv, key);
deb09c43 6879 else
7480513f 6880 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
6881
6882 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
6883 break;
6884 case DISABLE_KEY:
6974e363
EG
6885 if (is_default_wep_key)
6886 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 6887 else
7480513f 6888 ret = iwl_remove_dynamic_key(priv, sta_id);
deb09c43
EG
6889
6890 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
6891 break;
6892 default:
deb09c43 6893 ret = -EINVAL;
b481de9c
ZY
6894 }
6895
6896 IWL_DEBUG_MAC80211("leave\n");
b481de9c 6897
deb09c43 6898 return ret;
b481de9c
ZY
6899}
6900
bb8c093b 6901static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY
6902 const struct ieee80211_tx_queue_params *params)
6903{
c79dd5b5 6904 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
6905 unsigned long flags;
6906 int q;
b481de9c
ZY
6907
6908 IWL_DEBUG_MAC80211("enter\n");
6909
fee1247a 6910 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6911 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6912 return -EIO;
6913 }
6914
6915 if (queue >= AC_NUM) {
6916 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6917 return 0;
6918 }
6919
b481de9c
ZY
6920 if (!priv->qos_data.qos_enable) {
6921 priv->qos_data.qos_active = 0;
6922 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
6923 return 0;
6924 }
6925 q = AC_NUM - 1 - queue;
6926
6927 spin_lock_irqsave(&priv->lock, flags);
6928
6929 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6930 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6931 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6932 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 6933 cpu_to_le16((params->txop * 32));
b481de9c
ZY
6934
6935 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6936 priv->qos_data.qos_active = 1;
6937
6938 spin_unlock_irqrestore(&priv->lock, flags);
6939
6940 mutex_lock(&priv->mutex);
6941 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6942 iwl4965_activate_qos(priv, 1);
3109ece1 6943 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 6944 iwl4965_activate_qos(priv, 0);
b481de9c
ZY
6945
6946 mutex_unlock(&priv->mutex);
6947
b481de9c
ZY
6948 IWL_DEBUG_MAC80211("leave\n");
6949 return 0;
6950}
6951
bb8c093b 6952static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
6953 struct ieee80211_tx_queue_stats *stats)
6954{
c79dd5b5 6955 struct iwl_priv *priv = hw->priv;
b481de9c 6956 int i, avail;
bb8c093b
CH
6957 struct iwl4965_tx_queue *txq;
6958 struct iwl4965_queue *q;
b481de9c
ZY
6959 unsigned long flags;
6960
6961 IWL_DEBUG_MAC80211("enter\n");
6962
fee1247a 6963 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
6964 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6965 return -EIO;
6966 }
6967
6968 spin_lock_irqsave(&priv->lock, flags);
6969
6970 for (i = 0; i < AC_NUM; i++) {
6971 txq = &priv->txq[i];
6972 q = &txq->q;
bb8c093b 6973 avail = iwl4965_queue_space(q);
b481de9c
ZY
6974
6975 stats->data[i].len = q->n_window - avail;
6976 stats->data[i].limit = q->n_window - q->high_mark;
6977 stats->data[i].count = q->n_window;
6978
6979 }
6980 spin_unlock_irqrestore(&priv->lock, flags);
6981
6982 IWL_DEBUG_MAC80211("leave\n");
6983
6984 return 0;
6985}
6986
bb8c093b 6987static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
6988 struct ieee80211_low_level_stats *stats)
6989{
6990 IWL_DEBUG_MAC80211("enter\n");
6991 IWL_DEBUG_MAC80211("leave\n");
6992
6993 return 0;
6994}
6995
bb8c093b 6996static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY
6997{
6998 IWL_DEBUG_MAC80211("enter\n");
6999 IWL_DEBUG_MAC80211("leave\n");
7000
7001 return 0;
7002}
7003
bb8c093b 7004static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 7005{
c79dd5b5 7006 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
7007 unsigned long flags;
7008
7009 mutex_lock(&priv->mutex);
7010 IWL_DEBUG_MAC80211("enter\n");
7011
7012 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 7013#ifdef CONFIG_IWL4965_HT
b481de9c 7014 spin_lock_irqsave(&priv->lock, flags);
fd105e79 7015 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 7016 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 7017#endif /* CONFIG_IWL4965_HT */
b481de9c 7018
bf85ea4f 7019 iwlcore_reset_qos(priv);
b481de9c
ZY
7020
7021 cancel_delayed_work(&priv->post_associate);
7022
7023 spin_lock_irqsave(&priv->lock, flags);
7024 priv->assoc_id = 0;
7025 priv->assoc_capability = 0;
b481de9c
ZY
7026 priv->assoc_station_added = 0;
7027
7028 /* new association get rid of ibss beacon skb */
7029 if (priv->ibss_beacon)
7030 dev_kfree_skb(priv->ibss_beacon);
7031
7032 priv->ibss_beacon = NULL;
7033
7034 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 7035 priv->timestamp = 0;
b481de9c
ZY
7036 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7037 priv->beacon_int = 0;
7038
7039 spin_unlock_irqrestore(&priv->lock, flags);
7040
fee1247a 7041 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
7042 IWL_DEBUG_MAC80211("leave - not ready\n");
7043 mutex_unlock(&priv->mutex);
7044 return;
7045 }
7046
052c4b9f 7047 /* we are restarting association process
7048 * clear RXON_FILTER_ASSOC_MSK bit
7049 */
7050 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 7051 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7052 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7053 iwl4965_commit_rxon(priv);
052c4b9f 7054 }
7055
b481de9c
ZY
7056 /* Per mac80211.h: This is only used in IBSS mode... */
7057 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 7058
b481de9c
ZY
7059 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7060 mutex_unlock(&priv->mutex);
7061 return;
7062 }
7063
b481de9c
ZY
7064 priv->only_active_channel = 0;
7065
bb8c093b 7066 iwl4965_set_rate(priv);
b481de9c
ZY
7067
7068 mutex_unlock(&priv->mutex);
7069
7070 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
7071}
7072
bb8c093b 7073static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
7074 struct ieee80211_tx_control *control)
7075{
c79dd5b5 7076 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
7077 unsigned long flags;
7078
7079 mutex_lock(&priv->mutex);
7080 IWL_DEBUG_MAC80211("enter\n");
7081
fee1247a 7082 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
7083 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7084 mutex_unlock(&priv->mutex);
7085 return -EIO;
7086 }
7087
7088 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7089 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7090 mutex_unlock(&priv->mutex);
7091 return -EIO;
7092 }
7093
7094 spin_lock_irqsave(&priv->lock, flags);
7095
7096 if (priv->ibss_beacon)
7097 dev_kfree_skb(priv->ibss_beacon);
7098
7099 priv->ibss_beacon = skb;
7100
7101 priv->assoc_id = 0;
7102
7103 IWL_DEBUG_MAC80211("leave\n");
7104 spin_unlock_irqrestore(&priv->lock, flags);
7105
bf85ea4f 7106 iwlcore_reset_qos(priv);
b481de9c
ZY
7107
7108 queue_work(priv->workqueue, &priv->post_associate.work);
7109
7110 mutex_unlock(&priv->mutex);
7111
7112 return 0;
7113}
7114
b481de9c
ZY
7115/*****************************************************************************
7116 *
7117 * sysfs attributes
7118 *
7119 *****************************************************************************/
7120
0a6857e7 7121#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
7122
7123/*
7124 * The following adds a new attribute to the sysfs representation
7125 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7126 * used for controlling the debug level.
7127 *
7128 * See the level definitions in iwl for details.
7129 */
7130
7131static ssize_t show_debug_level(struct device_driver *d, char *buf)
7132{
0a6857e7 7133 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY
7134}
7135static ssize_t store_debug_level(struct device_driver *d,
7136 const char *buf, size_t count)
7137{
7138 char *p = (char *)buf;
7139 u32 val;
7140
7141 val = simple_strtoul(p, &p, 0);
7142 if (p == buf)
7143 printk(KERN_INFO DRV_NAME
7144 ": %s is not in hex or decimal form.\n", buf);
7145 else
0a6857e7 7146 iwl_debug_level = val;
b481de9c
ZY
7147
7148 return strnlen(buf, count);
7149}
7150
7151static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7152 show_debug_level, store_debug_level);
7153
0a6857e7 7154#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 7155
b481de9c
ZY
7156
7157static ssize_t show_temperature(struct device *d,
7158 struct device_attribute *attr, char *buf)
7159{
c79dd5b5 7160 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 7161
fee1247a 7162 if (!iwl_is_alive(priv))
b481de9c
ZY
7163 return -EAGAIN;
7164
bb8c093b 7165 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY
7166}
7167
7168static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7169
7170static ssize_t show_rs_window(struct device *d,
7171 struct device_attribute *attr,
7172 char *buf)
7173{
c79dd5b5 7174 struct iwl_priv *priv = d->driver_data;
bb8c093b 7175 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY
7176}
7177static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7178
7179static ssize_t show_tx_power(struct device *d,
7180 struct device_attribute *attr, char *buf)
7181{
c79dd5b5 7182 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
7183 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7184}
7185
7186static ssize_t store_tx_power(struct device *d,
7187 struct device_attribute *attr,
7188 const char *buf, size_t count)
7189{
c79dd5b5 7190 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
7191 char *p = (char *)buf;
7192 u32 val;
7193
7194 val = simple_strtoul(p, &p, 10);
7195 if (p == buf)
7196 printk(KERN_INFO DRV_NAME
7197 ": %s is not in decimal form.\n", buf);
7198 else
bb8c093b 7199 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY
7200
7201 return count;
7202}
7203
7204static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7205
7206static ssize_t show_flags(struct device *d,
7207 struct device_attribute *attr, char *buf)
7208{
c79dd5b5 7209 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
7210
7211 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7212}
7213
7214static ssize_t store_flags(struct device *d,
7215 struct device_attribute *attr,
7216 const char *buf, size_t count)
7217{
c79dd5b5 7218 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
7219 u32 flags = simple_strtoul(buf, NULL, 0);
7220
7221 mutex_lock(&priv->mutex);
7222 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7223 /* Cancel any currently running scans... */
bb8c093b 7224 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
7225 IWL_WARNING("Could not cancel scan.\n");
7226 else {
7227 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7228 flags);
7229 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 7230 iwl4965_commit_rxon(priv);
b481de9c
ZY
7231 }
7232 }
7233 mutex_unlock(&priv->mutex);
7234
7235 return count;
7236}
7237
7238static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7239
7240static ssize_t show_filter_flags(struct device *d,
7241 struct device_attribute *attr, char *buf)
7242{
c79dd5b5 7243 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
7244
7245 return sprintf(buf, "0x%04X\n",
7246 le32_to_cpu(priv->active_rxon.filter_flags));
7247}
7248
7249static ssize_t store_filter_flags(struct device *d,
7250 struct device_attribute *attr,
7251 const char *buf, size_t count)
7252{
c79dd5b5 7253 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
7254 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7255
7256 mutex_lock(&priv->mutex);
7257 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7258 /* Cancel any currently running scans... */
bb8c093b 7259 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
7260 IWL_WARNING("Could not cancel scan.\n");
7261 else {
7262 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7263 "0x%04X\n", filter_flags);
7264 priv->staging_rxon.filter_flags =
7265 cpu_to_le32(filter_flags);
bb8c093b 7266 iwl4965_commit_rxon(priv);
b481de9c
ZY
7267 }
7268 }
7269 mutex_unlock(&priv->mutex);
7270
7271 return count;
7272}
7273
7274static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7275 store_filter_flags);
7276
c8b0e6e1 7277#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
7278
7279static ssize_t show_measurement(struct device *d,
7280 struct device_attribute *attr, char *buf)
7281{
c79dd5b5 7282 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7283 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY
7284 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7285 u8 *data = (u8 *) & measure_report;
7286 unsigned long flags;
7287
7288 spin_lock_irqsave(&priv->lock, flags);
7289 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7290 spin_unlock_irqrestore(&priv->lock, flags);
7291 return 0;
7292 }
7293 memcpy(&measure_report, &priv->measure_report, size);
7294 priv->measurement_status = 0;
7295 spin_unlock_irqrestore(&priv->lock, flags);
7296
7297 while (size && (PAGE_SIZE - len)) {
7298 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7299 PAGE_SIZE - len, 1);
7300 len = strlen(buf);
7301 if (PAGE_SIZE - len)
7302 buf[len++] = '\n';
7303
7304 ofs += 16;
7305 size -= min(size, 16U);
7306 }
7307
7308 return len;
7309}
7310
7311static ssize_t store_measurement(struct device *d,
7312 struct device_attribute *attr,
7313 const char *buf, size_t count)
7314{
c79dd5b5 7315 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7316 struct ieee80211_measurement_params params = {
7317 .channel = le16_to_cpu(priv->active_rxon.channel),
7318 .start_time = cpu_to_le64(priv->last_tsf),
7319 .duration = cpu_to_le16(1),
7320 };
7321 u8 type = IWL_MEASURE_BASIC;
7322 u8 buffer[32];
7323 u8 channel;
7324
7325 if (count) {
7326 char *p = buffer;
7327 strncpy(buffer, buf, min(sizeof(buffer), count));
7328 channel = simple_strtoul(p, NULL, 0);
7329 if (channel)
7330 params.channel = channel;
7331
7332 p = buffer;
7333 while (*p && *p != ' ')
7334 p++;
7335 if (*p)
7336 type = simple_strtoul(p + 1, NULL, 0);
7337 }
7338
7339 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7340 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 7341 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
7342
7343 return count;
7344}
7345
7346static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7347 show_measurement, store_measurement);
c8b0e6e1 7348#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY
7349
7350static ssize_t store_retry_rate(struct device *d,
7351 struct device_attribute *attr,
7352 const char *buf, size_t count)
7353{
c79dd5b5 7354 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7355
7356 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7357 if (priv->retry_rate <= 0)
7358 priv->retry_rate = 1;
7359
7360 return count;
7361}
7362
7363static ssize_t show_retry_rate(struct device *d,
7364 struct device_attribute *attr, char *buf)
7365{
c79dd5b5 7366 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7367 return sprintf(buf, "%d", priv->retry_rate);
7368}
7369
7370static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7371 store_retry_rate);
7372
7373static ssize_t store_power_level(struct device *d,
7374 struct device_attribute *attr,
7375 const char *buf, size_t count)
7376{
c79dd5b5 7377 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7378 int rc;
7379 int mode;
7380
7381 mode = simple_strtoul(buf, NULL, 0);
7382 mutex_lock(&priv->mutex);
7383
fee1247a 7384 if (!iwl_is_ready(priv)) {
b481de9c
ZY
7385 rc = -EAGAIN;
7386 goto out;
7387 }
7388
7389 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7390 mode = IWL_POWER_AC;
7391 else
7392 mode |= IWL_POWER_ENABLED;
7393
7394 if (mode != priv->power_mode) {
bb8c093b 7395 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY
7396 if (rc) {
7397 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7398 goto out;
7399 }
7400 priv->power_mode = mode;
7401 }
7402
7403 rc = count;
7404
7405 out:
7406 mutex_unlock(&priv->mutex);
7407 return rc;
7408}
7409
7410#define MAX_WX_STRING 80
7411
7412/* Values are in microsecond */
7413static const s32 timeout_duration[] = {
7414 350000,
7415 250000,
7416 75000,
7417 37000,
7418 25000,
7419};
7420static const s32 period_duration[] = {
7421 400000,
7422 700000,
7423 1000000,
7424 1000000,
7425 1000000
7426};
7427
7428static ssize_t show_power_level(struct device *d,
7429 struct device_attribute *attr, char *buf)
7430{
c79dd5b5 7431 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7432 int level = IWL_POWER_LEVEL(priv->power_mode);
7433 char *p = buf;
7434
7435 p += sprintf(p, "%d ", level);
7436 switch (level) {
7437 case IWL_POWER_MODE_CAM:
7438 case IWL_POWER_AC:
7439 p += sprintf(p, "(AC)");
7440 break;
7441 case IWL_POWER_BATTERY:
7442 p += sprintf(p, "(BATTERY)");
7443 break;
7444 default:
7445 p += sprintf(p,
7446 "(Timeout %dms, Period %dms)",
7447 timeout_duration[level - 1] / 1000,
7448 period_duration[level - 1] / 1000);
7449 }
7450
7451 if (!(priv->power_mode & IWL_POWER_ENABLED))
7452 p += sprintf(p, " OFF\n");
7453 else
7454 p += sprintf(p, " \n");
7455
7456 return (p - buf + 1);
7457
7458}
7459
7460static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7461 store_power_level);
7462
7463static ssize_t show_channels(struct device *d,
7464 struct device_attribute *attr, char *buf)
7465{
8318d78a
JB
7466 /* all this shit doesn't belong into sysfs anyway */
7467 return 0;
b481de9c
ZY
7468}
7469
7470static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7471
7472static ssize_t show_statistics(struct device *d,
7473 struct device_attribute *attr, char *buf)
7474{
c79dd5b5 7475 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7476 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY
7477 u32 len = 0, ofs = 0;
7478 u8 *data = (u8 *) & priv->statistics;
7479 int rc = 0;
7480
fee1247a 7481 if (!iwl_is_alive(priv))
b481de9c
ZY
7482 return -EAGAIN;
7483
7484 mutex_lock(&priv->mutex);
49ea8596 7485 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
7486 mutex_unlock(&priv->mutex);
7487
7488 if (rc) {
7489 len = sprintf(buf,
7490 "Error sending statistics request: 0x%08X\n", rc);
7491 return len;
7492 }
7493
7494 while (size && (PAGE_SIZE - len)) {
7495 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7496 PAGE_SIZE - len, 1);
7497 len = strlen(buf);
7498 if (PAGE_SIZE - len)
7499 buf[len++] = '\n';
7500
7501 ofs += 16;
7502 size -= min(size, 16U);
7503 }
7504
7505 return len;
7506}
7507
7508static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7509
7510static ssize_t show_antenna(struct device *d,
7511 struct device_attribute *attr, char *buf)
7512{
c79dd5b5 7513 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 7514
fee1247a 7515 if (!iwl_is_alive(priv))
b481de9c
ZY
7516 return -EAGAIN;
7517
7518 return sprintf(buf, "%d\n", priv->antenna);
7519}
7520
7521static ssize_t store_antenna(struct device *d,
7522 struct device_attribute *attr,
7523 const char *buf, size_t count)
7524{
7525 int ant;
c79dd5b5 7526 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
7527
7528 if (count == 0)
7529 return 0;
7530
7531 if (sscanf(buf, "%1i", &ant) != 1) {
7532 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7533 return count;
7534 }
7535
7536 if ((ant >= 0) && (ant <= 2)) {
7537 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 7538 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY
7539 } else
7540 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7541
7542
7543 return count;
7544}
7545
7546static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7547
7548static ssize_t show_status(struct device *d,
7549 struct device_attribute *attr, char *buf)
7550{
c79dd5b5 7551 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 7552 if (!iwl_is_alive(priv))
b481de9c
ZY
7553 return -EAGAIN;
7554 return sprintf(buf, "0x%08x\n", (int)priv->status);
7555}
7556
7557static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7558
7559static ssize_t dump_error_log(struct device *d,
7560 struct device_attribute *attr,
7561 const char *buf, size_t count)
7562{
7563 char *p = (char *)buf;
7564
7565 if (p[0] == '1')
c79dd5b5 7566 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
7567
7568 return strnlen(buf, count);
7569}
7570
7571static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7572
7573static ssize_t dump_event_log(struct device *d,
7574 struct device_attribute *attr,
7575 const char *buf, size_t count)
7576{
7577 char *p = (char *)buf;
7578
7579 if (p[0] == '1')
c79dd5b5 7580 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY
7581
7582 return strnlen(buf, count);
7583}
7584
7585static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7586
7587/*****************************************************************************
7588 *
7589 * driver setup and teardown
7590 *
7591 *****************************************************************************/
7592
c79dd5b5 7593static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
7594{
7595 priv->workqueue = create_workqueue(DRV_NAME);
7596
7597 init_waitqueue_head(&priv->wait_command_queue);
7598
bb8c093b
CH
7599 INIT_WORK(&priv->up, iwl4965_bg_up);
7600 INIT_WORK(&priv->restart, iwl4965_bg_restart);
7601 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
7602 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
7603 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
7604 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
7605 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
7606 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7607 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7608 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7609 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7610 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7611
7612 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY
7613
7614 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7615 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
7616}
7617
c79dd5b5 7618static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7619{
bb8c093b 7620 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7621
3ae6a054 7622 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
7623 cancel_delayed_work(&priv->scan_check);
7624 cancel_delayed_work(&priv->alive_start);
7625 cancel_delayed_work(&priv->post_associate);
7626 cancel_work_sync(&priv->beacon_update);
7627}
7628
bb8c093b 7629static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY
7630 &dev_attr_antenna.attr,
7631 &dev_attr_channels.attr,
7632 &dev_attr_dump_errors.attr,
7633 &dev_attr_dump_events.attr,
7634 &dev_attr_flags.attr,
7635 &dev_attr_filter_flags.attr,
c8b0e6e1 7636#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
7637 &dev_attr_measurement.attr,
7638#endif
7639 &dev_attr_power_level.attr,
7640 &dev_attr_retry_rate.attr,
b481de9c
ZY
7641 &dev_attr_rs_window.attr,
7642 &dev_attr_statistics.attr,
7643 &dev_attr_status.attr,
7644 &dev_attr_temperature.attr,
b481de9c
ZY
7645 &dev_attr_tx_power.attr,
7646
7647 NULL
7648};
7649
bb8c093b 7650static struct attribute_group iwl4965_attribute_group = {
b481de9c 7651 .name = NULL, /* put in device directory */
bb8c093b 7652 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
7653};
7654
bb8c093b
CH
7655static struct ieee80211_ops iwl4965_hw_ops = {
7656 .tx = iwl4965_mac_tx,
7657 .start = iwl4965_mac_start,
7658 .stop = iwl4965_mac_stop,
7659 .add_interface = iwl4965_mac_add_interface,
7660 .remove_interface = iwl4965_mac_remove_interface,
7661 .config = iwl4965_mac_config,
7662 .config_interface = iwl4965_mac_config_interface,
7663 .configure_filter = iwl4965_configure_filter,
7664 .set_key = iwl4965_mac_set_key,
ab885f8c 7665 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
7666 .get_stats = iwl4965_mac_get_stats,
7667 .get_tx_stats = iwl4965_mac_get_tx_stats,
7668 .conf_tx = iwl4965_mac_conf_tx,
7669 .get_tsf = iwl4965_mac_get_tsf,
7670 .reset_tsf = iwl4965_mac_reset_tsf,
7671 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7672 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7673#ifdef CONFIG_IWL4965_HT
9ab46173 7674 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7675#endif /* CONFIG_IWL4965_HT */
bb8c093b 7676 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
7677};
7678
bb8c093b 7679static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
7680{
7681 int err = 0;
c79dd5b5 7682 struct iwl_priv *priv;
b481de9c 7683 struct ieee80211_hw *hw;
82b9a121 7684 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 7685 unsigned long flags;
5a66926a 7686 DECLARE_MAC_BUF(mac);
b481de9c 7687
316c30d9
AK
7688 /************************
7689 * 1. Allocating HW data
7690 ************************/
7691
6440adb5
CB
7692 /* Disabling hardware scan means that mac80211 will perform scans
7693 * "the hard way", rather than using device's scan. */
1ea87396 7694 if (cfg->mod_params->disable_hw_scan) {
b481de9c 7695 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 7696 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
7697 }
7698
1d0a082d
AK
7699 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
7700 if (!hw) {
b481de9c
ZY
7701 err = -ENOMEM;
7702 goto out;
7703 }
1d0a082d
AK
7704 priv = hw->priv;
7705 /* At this point both hw and priv are allocated. */
7706
b481de9c
ZY
7707 SET_IEEE80211_DEV(hw, &pdev->dev);
7708
7709 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 7710 priv->cfg = cfg;
b481de9c 7711 priv->pci_dev = pdev;
316c30d9 7712
0a6857e7 7713#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 7714 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
7715 atomic_set(&priv->restrict_refcnt, 0);
7716#endif
b481de9c 7717
316c30d9
AK
7718 /**************************
7719 * 2. Initializing PCI bus
7720 **************************/
7721 if (pci_enable_device(pdev)) {
7722 err = -ENODEV;
7723 goto out_ieee80211_free_hw;
7724 }
7725
7726 pci_set_master(pdev);
7727
7728 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7729 if (!err)
7730 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7731 if (err) {
7732 printk(KERN_WARNING DRV_NAME
7733 ": No suitable DMA available.\n");
7734 goto out_pci_disable_device;
7735 }
7736
7737 err = pci_request_regions(pdev, DRV_NAME);
7738 if (err)
7739 goto out_pci_disable_device;
7740
7741 pci_set_drvdata(pdev, priv);
7742
7743 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7744 * PCI Tx retries from interfering with C3 CPU state */
7745 pci_write_config_byte(pdev, 0x41, 0x00);
7746
7747 /***********************
7748 * 3. Read REV register
7749 ***********************/
7750 priv->hw_base = pci_iomap(pdev, 0, 0);
7751 if (!priv->hw_base) {
7752 err = -ENODEV;
7753 goto out_pci_release_regions;
7754 }
7755
7756 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7757 (unsigned long long) pci_resource_len(pdev, 0));
7758 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7759
7760 printk(KERN_INFO DRV_NAME
7761 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7762
7763 /*****************
7764 * 4. Read EEPROM
7765 *****************/
7766 /* nic init */
3395f6e9 7767 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
316c30d9
AK
7768 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7769
3395f6e9
TW
7770 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7771 err = iwl_poll_bit(priv, CSR_GP_CNTRL,
316c30d9
AK
7772 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
7773 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7774 if (err < 0) {
7775 IWL_DEBUG_INFO("Failed to init the card\n");
7776 goto out_iounmap;
7777 }
7778 /* Read the EEPROM */
7779 err = iwl_eeprom_init(priv);
7780 if (err) {
7781 IWL_ERROR("Unable to init EEPROM\n");
7782 goto out_iounmap;
7783 }
7784 /* MAC Address location in EEPROM same for 3945/4965 */
7785 iwl_eeprom_get_mac(priv, priv->mac_addr);
7786 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
7787 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7788
7789 /************************
7790 * 5. Setup HW constants
7791 ************************/
7792 /* Device-specific setup */
5425e490
TW
7793 if (priv->cfg->ops->lib->set_hw_params(priv)) {
7794 IWL_ERROR("failed to set hw parameters\n");
316c30d9
AK
7795 goto out_iounmap;
7796 }
7797
7798 /*******************
7799 * 6. Setup hw/priv
7800 *******************/
b481de9c 7801
bf85ea4f
AK
7802 err = iwl_setup(priv);
7803 if (err)
5425e490 7804 goto out_unset_hw_params;
bf85ea4f 7805 /* At this point both hw and priv are initialized. */
316c30d9
AK
7806
7807 /**********************************
7808 * 7. Initialize module parameters
7809 **********************************/
7810
7811 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 7812 if (priv->cfg->mod_params->disable) {
316c30d9
AK
7813 set_bit(STATUS_RF_KILL_SW, &priv->status);
7814 IWL_DEBUG_INFO("Radio disabled.\n");
7815 }
7816
1ea87396 7817 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK
7818 priv->qos_data.qos_enable = 1;
7819
7820 /********************
7821 * 8. Setup services
7822 ********************/
0359facc 7823 spin_lock_irqsave(&priv->lock, flags);
316c30d9 7824 iwl4965_disable_interrupts(priv);
0359facc 7825 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
7826
7827 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
7828 if (err) {
7829 IWL_ERROR("failed to create sysfs device attributes\n");
5425e490 7830 goto out_unset_hw_params;
316c30d9
AK
7831 }
7832
7833 err = iwl_dbgfs_register(priv, DRV_NAME);
7834 if (err) {
7835 IWL_ERROR("failed to create debugfs files\n");
7836 goto out_remove_sysfs;
7837 }
7838
7839 iwl4965_setup_deferred_work(priv);
7840 iwl4965_setup_rx_handlers(priv);
7841
7842 /********************
7843 * 9. Conclude
7844 ********************/
5a66926a
ZY
7845 pci_save_state(pdev);
7846 pci_disable_device(pdev);
b481de9c 7847
c8381fdc
MA
7848 /* notify iwlcore to init */
7849 iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
b481de9c
ZY
7850 return 0;
7851
316c30d9
AK
7852 out_remove_sysfs:
7853 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
5425e490
TW
7854 out_unset_hw_params:
7855 iwl4965_unset_hw_params(priv);
b481de9c
ZY
7856 out_iounmap:
7857 pci_iounmap(pdev, priv->hw_base);
7858 out_pci_release_regions:
7859 pci_release_regions(pdev);
316c30d9 7860 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
7861 out_pci_disable_device:
7862 pci_disable_device(pdev);
b481de9c
ZY
7863 out_ieee80211_free_hw:
7864 ieee80211_free_hw(priv->hw);
7865 out:
7866 return err;
7867}
7868
c83dbf68 7869static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 7870{
c79dd5b5 7871 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY
7872 struct list_head *p, *q;
7873 int i;
0359facc 7874 unsigned long flags;
b481de9c
ZY
7875
7876 if (!priv)
7877 return;
7878
7879 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7880
c4f55232
RR
7881 if (priv->mac80211_registered) {
7882 ieee80211_unregister_hw(priv->hw);
7883 priv->mac80211_registered = 0;
7884 }
7885
b481de9c 7886 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 7887
bb8c093b 7888 iwl4965_down(priv);
b481de9c 7889
0359facc
MA
7890 /* make sure we flush any pending irq or
7891 * tasklet for the driver
7892 */
7893 spin_lock_irqsave(&priv->lock, flags);
7894 iwl4965_disable_interrupts(priv);
7895 spin_unlock_irqrestore(&priv->lock, flags);
7896
7897 iwl_synchronize_irq(priv);
7898
b481de9c
ZY
7899 /* Free MAC hash list for ADHOC */
7900 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
7901 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
7902 list_del(p);
bb8c093b 7903 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY
7904 }
7905 }
7906
c8381fdc 7907 iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
712b6cf5 7908 iwl_dbgfs_unregister(priv);
bb8c093b 7909 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 7910
bb8c093b 7911 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
7912
7913 if (priv->rxq.bd)
bb8c093b
CH
7914 iwl4965_rx_queue_free(priv, &priv->rxq);
7915 iwl4965_hw_txq_ctx_free(priv);
b481de9c 7916
5425e490 7917 iwl4965_unset_hw_params(priv);
bf85ea4f 7918 iwlcore_clear_stations_table(priv);
b481de9c 7919
b481de9c 7920
948c171c
MA
7921 /*netif_stop_queue(dev); */
7922 flush_workqueue(priv->workqueue);
7923
bb8c093b 7924 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
7925 * priv->workqueue... so we can't take down the workqueue
7926 * until now... */
7927 destroy_workqueue(priv->workqueue);
7928 priv->workqueue = NULL;
7929
b481de9c
ZY
7930 pci_iounmap(pdev, priv->hw_base);
7931 pci_release_regions(pdev);
7932 pci_disable_device(pdev);
7933 pci_set_drvdata(pdev, NULL);
7934
bf85ea4f 7935 iwl_free_channel_map(priv);
849e0dce 7936 iwl4965_free_geos(priv);
b481de9c
ZY
7937
7938 if (priv->ibss_beacon)
7939 dev_kfree_skb(priv->ibss_beacon);
7940
7941 ieee80211_free_hw(priv->hw);
7942}
7943
7944#ifdef CONFIG_PM
7945
bb8c093b 7946static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 7947{
c79dd5b5 7948 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7949
e655b9f0
ZY
7950 if (priv->is_open) {
7951 set_bit(STATUS_IN_SUSPEND, &priv->status);
7952 iwl4965_mac_stop(priv->hw);
7953 priv->is_open = 1;
7954 }
b481de9c 7955
b481de9c
ZY
7956 pci_set_power_state(pdev, PCI_D3hot);
7957
b481de9c
ZY
7958 return 0;
7959}
7960
bb8c093b 7961static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 7962{
c79dd5b5 7963 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7964
b481de9c 7965 pci_set_power_state(pdev, PCI_D0);
b481de9c 7966
e655b9f0
ZY
7967 if (priv->is_open)
7968 iwl4965_mac_start(priv->hw);
b481de9c 7969
e655b9f0 7970 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
7971 return 0;
7972}
7973
7974#endif /* CONFIG_PM */
7975
7976/*****************************************************************************
7977 *
7978 * driver and module entry point
7979 *
7980 *****************************************************************************/
7981
fed9017e
RR
7982/* Hardware specific file defines the PCI IDs table for that hardware module */
7983static struct pci_device_id iwl_hw_card_ids[] = {
7984 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
7985 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
7986 {0}
7987};
7988MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
7989
7990static struct pci_driver iwl_driver = {
b481de9c 7991 .name = DRV_NAME,
fed9017e 7992 .id_table = iwl_hw_card_ids,
bb8c093b
CH
7993 .probe = iwl4965_pci_probe,
7994 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 7995#ifdef CONFIG_PM
bb8c093b
CH
7996 .suspend = iwl4965_pci_suspend,
7997 .resume = iwl4965_pci_resume,
b481de9c
ZY
7998#endif
7999};
8000
bb8c093b 8001static int __init iwl4965_init(void)
b481de9c
ZY
8002{
8003
8004 int ret;
8005 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8006 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
8007
8008 ret = iwl4965_rate_control_register();
8009 if (ret) {
8010 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8011 return ret;
8012 }
8013
fed9017e 8014 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
8015 if (ret) {
8016 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 8017 goto error_register;
b481de9c 8018 }
0a6857e7 8019#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 8020 ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c
ZY
8021 if (ret) {
8022 IWL_ERROR("Unable to create driver sysfs file\n");
897e1cf2 8023 goto error_debug;
b481de9c
ZY
8024 }
8025#endif
8026
8027 return ret;
897e1cf2
RC
8028
8029#ifdef CONFIG_IWLWIFI_DEBUG
8030error_debug:
fed9017e 8031 pci_unregister_driver(&iwl_driver);
897e1cf2
RC
8032#endif
8033error_register:
8034 iwl4965_rate_control_unregister();
8035 return ret;
b481de9c
ZY
8036}
8037
bb8c093b 8038static void __exit iwl4965_exit(void)
b481de9c 8039{
0a6857e7 8040#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 8041 driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c 8042#endif
fed9017e 8043 pci_unregister_driver(&iwl_driver);
897e1cf2 8044 iwl4965_rate_control_unregister();
b481de9c
ZY
8045}
8046
bb8c093b
CH
8047module_exit(iwl4965_exit);
8048module_init(iwl4965_init);
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