iwlwifi: blocking mac_start until uCode is complete
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
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1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
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4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
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44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
3e0d4cb1 49#include "iwl-dev.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
416e1438 56
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57/******************************************************************************
58 *
59 * module boiler plate
60 *
61 ******************************************************************************/
62
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63/*
64 * module name, copyright, version, etc.
65 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
66 */
67
68#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
69
0a6857e7 70#ifdef CONFIG_IWLWIFI_DEBUG
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71#define VD "d"
72#else
73#define VD
74#endif
75
c8b0e6e1 76#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
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77#define VS "s"
78#else
79#define VS
80#endif
81
df48c323 82#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 83
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84
85MODULE_DESCRIPTION(DRV_DESCRIPTION);
86MODULE_VERSION(DRV_VERSION);
87MODULE_AUTHOR(DRV_COPYRIGHT);
88MODULE_LICENSE("GPL");
89
b481de9c 90/*************** STATION TABLE MANAGEMENT ****
9fbab516 91 * mac80211 should be examined to determine if sta_info is duplicating
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92 * the functionality provided here
93 */
94
95/**************************************************************/
96
b481de9c 97
b481de9c 98
deb09c43
EG
99static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
100{
c1adf9fb 101 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
deb09c43
EG
102
103 if (hw_decrypt)
104 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
105 else
106 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
107
108}
109
b481de9c 110/**
bb8c093b 111 * iwl4965_check_rxon_cmd - validate RXON structure is valid
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112 *
113 * NOTE: This is really only useful during development and can eventually
114 * be #ifdef'd out once the driver is stable and folks aren't actively
115 * making changes
116 */
c1adf9fb 117static int iwl4965_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
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118{
119 int error = 0;
120 int counter = 1;
121
122 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
123 error |= le32_to_cpu(rxon->flags &
124 (RXON_FLG_TGJ_NARROW_BAND_MSK |
125 RXON_FLG_RADAR_DETECT_MSK));
126 if (error)
127 IWL_WARNING("check 24G fields %d | %d\n",
128 counter++, error);
129 } else {
130 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
131 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
132 if (error)
133 IWL_WARNING("check 52 fields %d | %d\n",
134 counter++, error);
135 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
136 if (error)
137 IWL_WARNING("check 52 CCK %d | %d\n",
138 counter++, error);
139 }
140 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
141 if (error)
142 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
143
144 /* make sure basic rates 6Mbps and 1Mbps are supported */
145 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
146 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
147 if (error)
148 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
149
150 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
151 if (error)
152 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
153
154 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
155 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
156 if (error)
157 IWL_WARNING("check CCK and short slot %d | %d\n",
158 counter++, error);
159
160 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
161 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
162 if (error)
163 IWL_WARNING("check CCK & auto detect %d | %d\n",
164 counter++, error);
165
166 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
167 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
168 if (error)
169 IWL_WARNING("check TGG and auto detect %d | %d\n",
170 counter++, error);
171
172 if (error)
173 IWL_WARNING("Tuning to channel %d\n",
174 le16_to_cpu(rxon->channel));
175
176 if (error) {
bb8c093b 177 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
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178 return -1;
179 }
180 return 0;
181}
182
183/**
9fbab516 184 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 185 * @priv: staging_rxon is compared to active_rxon
b481de9c 186 *
9fbab516
BC
187 * If the RXON structure is changing enough to require a new tune,
188 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
189 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 190 */
c79dd5b5 191static int iwl4965_full_rxon_required(struct iwl_priv *priv)
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192{
193
194 /* These items are only settable from the full RXON command */
5d1e2325 195 if (!(iwl_is_associated(priv)) ||
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196 compare_ether_addr(priv->staging_rxon.bssid_addr,
197 priv->active_rxon.bssid_addr) ||
198 compare_ether_addr(priv->staging_rxon.node_addr,
199 priv->active_rxon.node_addr) ||
200 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
201 priv->active_rxon.wlap_bssid_addr) ||
202 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
203 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
204 (priv->staging_rxon.air_propagation !=
205 priv->active_rxon.air_propagation) ||
206 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
207 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
208 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
209 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
210 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
211 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
212 return 1;
213
214 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
215 * be updated with the RXON_ASSOC command -- however only some
216 * flag transitions are allowed using RXON_ASSOC */
217
218 /* Check if we are not switching bands */
219 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
220 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
221 return 1;
222
223 /* Check if we are switching association toggle */
224 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
225 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
226 return 1;
227
228 return 0;
229}
230
b481de9c 231/**
bb8c093b 232 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 233 *
01ebd063 234 * The RXON command in staging_rxon is committed to the hardware and
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235 * the active_rxon structure is updated with the new data. This
236 * function correctly transitions out of the RXON_ASSOC_MSK state if
237 * a HW tune is required based on the RXON structure changes.
238 */
c79dd5b5 239static int iwl4965_commit_rxon(struct iwl_priv *priv)
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240{
241 /* cast away the const for active_rxon in this function */
c1adf9fb 242 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 243 DECLARE_MAC_BUF(mac);
43d59b32
EG
244 int ret;
245 bool new_assoc =
246 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
b481de9c 247
fee1247a 248 if (!iwl_is_alive(priv))
43d59b32 249 return -EBUSY;
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250
251 /* always get timestamp with Rx frame */
252 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
253
43d59b32
EG
254 ret = iwl4965_check_rxon_cmd(&priv->staging_rxon);
255 if (ret) {
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256 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
257 return -EINVAL;
258 }
259
260 /* If we don't need to send a full RXON, we can use
bb8c093b 261 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 262 * and other flags for the current radio configuration. */
bb8c093b 263 if (!iwl4965_full_rxon_required(priv)) {
43d59b32
EG
264 ret = iwl_send_rxon_assoc(priv);
265 if (ret) {
266 IWL_ERROR("Error setting RXON_ASSOC (%d)\n", ret);
267 return ret;
b481de9c
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268 }
269
270 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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271 return 0;
272 }
273
274 /* station table will be cleared */
275 priv->assoc_station_added = 0;
276
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277 /* If we are currently associated and the new config requires
278 * an RXON_ASSOC and the new config wants the associated mask enabled,
279 * we must clear the associated from the active configuration
280 * before we apply the new config */
43d59b32 281 if (iwl_is_associated(priv) && new_assoc) {
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282 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
283 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
284
43d59b32 285 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 286 sizeof(struct iwl_rxon_cmd),
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287 &priv->active_rxon);
288
289 /* If the mask clearing failed then we set
290 * active_rxon back to what it was previously */
43d59b32 291 if (ret) {
b481de9c 292 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
43d59b32
EG
293 IWL_ERROR("Error clearing ASSOC_MSK (%d)\n", ret);
294 return ret;
b481de9c 295 }
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296 }
297
298 IWL_DEBUG_INFO("Sending RXON\n"
299 "* with%s RXON_FILTER_ASSOC_MSK\n"
300 "* channel = %d\n"
0795af57 301 "* bssid = %s\n",
43d59b32 302 (new_assoc ? "" : "out"),
b481de9c 303 le16_to_cpu(priv->staging_rxon.channel),
0795af57 304 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 305
099b40b7 306 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
43d59b32
EG
307
308 /* Apply the new configuration
309 * RXON unassoc clears the station table in uCode, send it before
310 * we add the bcast station. If assoc bit is set, we will send RXON
311 * after having added the bcast and bssid station.
312 */
313 if (!new_assoc) {
314 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
c1adf9fb 315 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
43d59b32
EG
316 if (ret) {
317 IWL_ERROR("Error setting new RXON (%d)\n", ret);
318 return ret;
319 }
320 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
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321 }
322
37deb2a0 323 iwl_clear_stations_table(priv);
556f8db7 324
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325 if (!priv->error_recovering)
326 priv->start_calib = 0;
327
f0832f13 328 iwl_init_sensitivity(priv);
b481de9c 329
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330 /* If we issue a new RXON command which required a tune then we must
331 * send a new TXPOWER command or we won't be able to Tx any frames */
43d59b32
EG
332 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
333 if (ret) {
334 IWL_ERROR("Error sending TX power (%d)\n", ret);
335 return ret;
b481de9c
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336 }
337
338 /* Add the broadcast address so we can send broadcast frames */
4f40e4d9 339 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
43d59b32 340 IWL_INVALID_STATION) {
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341 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
342 return -EIO;
343 }
344
345 /* If we have set the ASSOC_MSK and we are in BSS mode then
346 * add the IWL_AP_ID to the station rate table */
9185159d
TW
347 if (new_assoc) {
348 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
349 ret = iwl_rxon_add_station(priv,
350 priv->active_rxon.bssid_addr, 1);
351 if (ret == IWL_INVALID_STATION) {
352 IWL_ERROR("Error adding AP address for TX.\n");
353 return -EIO;
354 }
355 priv->assoc_station_added = 1;
356 if (priv->default_wep_key &&
357 iwl_send_static_wepkey_cmd(priv, 0))
358 IWL_ERROR("Could not send WEP static key.\n");
b481de9c 359 }
43d59b32
EG
360
361 /* Apply the new configuration
362 * RXON assoc doesn't clear the station table in uCode,
363 */
364 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
365 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
366 if (ret) {
367 IWL_ERROR("Error setting new RXON (%d)\n", ret);
368 return ret;
369 }
370 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
b481de9c
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371 }
372
373 return 0;
374}
375
5da4b55f
MA
376void iwl4965_update_chain_flags(struct iwl_priv *priv)
377{
378
c7de35cd 379 iwl_set_rxon_chain(priv);
5da4b55f
MA
380 iwl4965_commit_rxon(priv);
381}
382
c79dd5b5 383static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 384{
bb8c093b 385 struct iwl4965_bt_cmd bt_cmd = {
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386 .flags = 3,
387 .lead_time = 0xAA,
388 .max_kill = 1,
389 .kill_ack_mask = 0,
390 .kill_cts_mask = 0,
391 };
392
857485c0 393 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 394 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
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395}
396
fcab423d 397static void iwl_clear_free_frames(struct iwl_priv *priv)
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398{
399 struct list_head *element;
400
401 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
402 priv->frames_count);
403
404 while (!list_empty(&priv->free_frames)) {
405 element = priv->free_frames.next;
406 list_del(element);
fcab423d 407 kfree(list_entry(element, struct iwl_frame, list));
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408 priv->frames_count--;
409 }
410
411 if (priv->frames_count) {
412 IWL_WARNING("%d frames still in use. Did we lose one?\n",
413 priv->frames_count);
414 priv->frames_count = 0;
415 }
416}
417
fcab423d 418static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
b481de9c 419{
fcab423d 420 struct iwl_frame *frame;
b481de9c
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421 struct list_head *element;
422 if (list_empty(&priv->free_frames)) {
423 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
424 if (!frame) {
425 IWL_ERROR("Could not allocate frame!\n");
426 return NULL;
427 }
428
429 priv->frames_count++;
430 return frame;
431 }
432
433 element = priv->free_frames.next;
434 list_del(element);
fcab423d 435 return list_entry(element, struct iwl_frame, list);
b481de9c
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436}
437
fcab423d 438static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
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439{
440 memset(frame, 0, sizeof(*frame));
441 list_add(&frame->list, &priv->free_frames);
442}
443
c79dd5b5 444unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
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445 struct ieee80211_hdr *hdr,
446 const u8 *dest, int left)
447{
448
3109ece1 449 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
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450 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
451 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
452 return 0;
453
454 if (priv->ibss_beacon->len > left)
455 return 0;
456
457 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
458
459 return priv->ibss_beacon->len;
460}
461
39e88504 462static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 463{
39e88504
GC
464 int i;
465 int rate_mask;
466
467 /* Set rate mask*/
468 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
469 rate_mask = priv->active_rate_basic & 0xF;
470 else
471 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 472
39e88504 473 /* Find lowest valid rate */
b481de9c 474 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1826dcc0 475 i = iwl_rates[i].next_ieee) {
b481de9c 476 if (rate_mask & (1 << i))
1826dcc0 477 return iwl_rates[i].plcp;
b481de9c
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478 }
479
39e88504
GC
480 /* No valid rate was found. Assign the lowest one */
481 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
482 return IWL_RATE_1M_PLCP;
483 else
484 return IWL_RATE_6M_PLCP;
b481de9c
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485}
486
c79dd5b5 487static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 488{
fcab423d 489 struct iwl_frame *frame;
b481de9c
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490 unsigned int frame_size;
491 int rc;
492 u8 rate;
493
fcab423d 494 frame = iwl_get_free_frame(priv);
b481de9c
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495
496 if (!frame) {
497 IWL_ERROR("Could not obtain free frame buffer for beacon "
498 "command.\n");
499 return -ENOMEM;
500 }
501
39e88504 502 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 503
bb8c093b 504 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 505
857485c0 506 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
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507 &frame->u.cmd[0]);
508
fcab423d 509 iwl_free_frame(priv, frame);
b481de9c
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510
511 return rc;
512}
513
b481de9c
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514/******************************************************************************
515 *
516 * Misc. internal state and helper functions
517 *
518 ******************************************************************************/
b481de9c 519
d1141dfb
EG
520static void iwl4965_ht_conf(struct iwl_priv *priv,
521 struct ieee80211_bss_conf *bss_conf)
522{
523 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
524 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
525 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
526
527 IWL_DEBUG_MAC80211("enter: \n");
528
529 iwl_conf->is_ht = bss_conf->assoc_ht;
530
531 if (!iwl_conf->is_ht)
532 return;
533
534 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
535
536 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
a9841013 537 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
d1141dfb 538 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
a9841013 539 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
d1141dfb
EG
540
541 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
542 iwl_conf->max_amsdu_size =
543 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
544
545 iwl_conf->supported_chan_width =
546 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
547 iwl_conf->extension_chan_offset =
548 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
549 /* If no above or below channel supplied disable FAT channel */
963f5517
EG
550 if (iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_ABOVE &&
551 iwl_conf->extension_chan_offset != IEEE80211_HT_IE_CHA_SEC_BELOW) {
552 iwl_conf->extension_chan_offset = IEEE80211_HT_IE_CHA_SEC_NONE;
d1141dfb 553 iwl_conf->supported_chan_width = 0;
963f5517 554 }
d1141dfb
EG
555
556 iwl_conf->tx_mimo_ps_mode =
557 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
558 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
559
560 iwl_conf->control_channel = ht_bss_conf->primary_channel;
561 iwl_conf->tx_chan_width =
562 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
563 iwl_conf->ht_protection =
564 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
565 iwl_conf->non_GF_STA_present =
566 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
567
568 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
569 IWL_DEBUG_MAC80211("leave\n");
570}
571
b481de9c
ZY
572/*
573 * QoS support
574*/
c79dd5b5 575static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 576 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY
577{
578
857485c0 579 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 580 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY
581}
582
c79dd5b5 583static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY
584{
585 unsigned long flags;
586
b481de9c
ZY
587 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
588 return;
589
590 if (!priv->qos_data.qos_enable)
591 return;
592
593 spin_lock_irqsave(&priv->lock, flags);
594 priv->qos_data.def_qos_parm.qos_flags = 0;
595
596 if (priv->qos_data.qos_cap.q_AP.queue_request &&
597 !priv->qos_data.qos_cap.q_AP.txop_request)
598 priv->qos_data.def_qos_parm.qos_flags |=
599 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
600 if (priv->qos_data.qos_active)
601 priv->qos_data.def_qos_parm.qos_flags |=
602 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
603
fd105e79 604 if (priv->current_ht_config.is_ht)
f1f1f5c7 605 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
f1f1f5c7 606
b481de9c
ZY
607 spin_unlock_irqrestore(&priv->lock, flags);
608
3109ece1 609 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW
610 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
611 priv->qos_data.qos_active,
612 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 613
bb8c093b 614 iwl4965_send_qos_params_command(priv,
b481de9c
ZY
615 &(priv->qos_data.def_qos_parm));
616 }
617}
618
b481de9c
ZY
619#define MAX_UCODE_BEACON_INTERVAL 4096
620#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
621
bb8c093b 622static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
623{
624 u16 new_val = 0;
625 u16 beacon_factor = 0;
626
627 beacon_factor =
628 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
629 / MAX_UCODE_BEACON_INTERVAL;
630 new_val = beacon_val / beacon_factor;
631
632 return cpu_to_le16(new_val);
633}
634
c79dd5b5 635static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY
636{
637 u64 interval_tm_unit;
638 u64 tsf, result;
639 unsigned long flags;
640 struct ieee80211_conf *conf = NULL;
641 u16 beacon_int = 0;
642
643 conf = ieee80211_get_hw_conf(priv->hw);
644
645 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW
646 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
647 priv->rxon_timing.timestamp.dw[0] =
648 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY
649
650 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
651
3109ece1 652 tsf = priv->timestamp;
b481de9c
ZY
653
654 beacon_int = priv->beacon_int;
655 spin_unlock_irqrestore(&priv->lock, flags);
656
657 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
658 if (beacon_int == 0) {
659 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
660 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
661 } else {
662 priv->rxon_timing.beacon_interval =
663 cpu_to_le16(beacon_int);
664 priv->rxon_timing.beacon_interval =
bb8c093b 665 iwl4965_adjust_beacon_interval(
b481de9c
ZY
666 le16_to_cpu(priv->rxon_timing.beacon_interval));
667 }
668
669 priv->rxon_timing.atim_window = 0;
670 } else {
671 priv->rxon_timing.beacon_interval =
bb8c093b 672 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
673 /* TODO: we need to get atim_window from upper stack
674 * for now we set to 0 */
675 priv->rxon_timing.atim_window = 0;
676 }
677
678 interval_tm_unit =
679 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
680 result = do_div(tsf, interval_tm_unit);
681 priv->rxon_timing.beacon_init_val =
682 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
683
684 IWL_DEBUG_ASSOC
685 ("beacon interval %d beacon timer %d beacon tim %d\n",
686 le16_to_cpu(priv->rxon_timing.beacon_interval),
687 le32_to_cpu(priv->rxon_timing.beacon_init_val),
688 le16_to_cpu(priv->rxon_timing.atim_window));
689}
690
82a66bbb
TW
691static void iwl_set_flags_for_band(struct iwl_priv *priv,
692 enum ieee80211_band band)
b481de9c 693{
8318d78a 694 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY
695 priv->staging_rxon.flags &=
696 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
697 | RXON_FLG_CCK_MSK);
698 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
699 } else {
508e32e1 700 /* Copied from iwl4965_post_associate() */
b481de9c
ZY
701 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
702 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
703 else
704 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
705
706 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
707 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
708
709 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
710 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
711 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
712 }
713}
714
715/*
01ebd063 716 * initialize rxon structure with default values from eeprom
b481de9c 717 */
c79dd5b5 718static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 719{
bf85ea4f 720 const struct iwl_channel_info *ch_info;
b481de9c
ZY
721
722 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
723
724 switch (priv->iw_mode) {
725 case IEEE80211_IF_TYPE_AP:
726 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
727 break;
728
729 case IEEE80211_IF_TYPE_STA:
730 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
731 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
732 break;
733
734 case IEEE80211_IF_TYPE_IBSS:
735 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
736 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
737 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
738 RXON_FILTER_ACCEPT_GRP_MSK;
739 break;
740
741 case IEEE80211_IF_TYPE_MNTR:
742 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
743 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
744 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
745 break;
69dc5d9d
TW
746 default:
747 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
748 break;
b481de9c
ZY
749 }
750
751#if 0
752 /* TODO: Figure out when short_preamble would be set and cache from
753 * that */
754 if (!hw_to_local(priv->hw)->short_preamble)
755 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
756 else
757 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
758#endif
759
8622e705 760 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY
761 le16_to_cpu(priv->staging_rxon.channel));
762
763 if (!ch_info)
764 ch_info = &priv->channel_info[0];
765
766 /*
767 * in some case A channels are all non IBSS
768 * in this case force B/G channel
769 */
770 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
771 !(is_channel_ibss(ch_info)))
772 ch_info = &priv->channel_info[0];
773
774 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 775 priv->band = ch_info->band;
b481de9c 776
82a66bbb 777 iwl_set_flags_for_band(priv, priv->band);
b481de9c
ZY
778
779 priv->staging_rxon.ofdm_basic_rates =
780 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
781 priv->staging_rxon.cck_basic_rates =
782 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
783
784 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
785 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
786 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
787 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
788 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
789 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 790 iwl_set_rxon_chain(priv);
b481de9c
ZY
791}
792
c79dd5b5 793static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 794{
b481de9c
ZY
795 priv->iw_mode = mode;
796
398f9e76
AK
797 /* init channel/phymode to values given at driver init */
798 iwl_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
799
bb8c093b 800 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
801 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
802
37deb2a0 803 iwl_clear_stations_table(priv);
b481de9c 804
fde3571f 805 /* dont commit rxon if rf-kill is on*/
fee1247a 806 if (!iwl_is_ready_rf(priv))
fde3571f
MA
807 return -EAGAIN;
808
809 cancel_delayed_work(&priv->scan_check);
2a421b91 810 if (iwl_scan_cancel_timeout(priv, 100)) {
fde3571f
MA
811 IWL_WARNING("Aborted scan still in progress after 100ms\n");
812 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
813 return -EAGAIN;
814 }
815
bb8c093b 816 iwl4965_commit_rxon(priv);
b481de9c
ZY
817
818 return 0;
819}
820
c79dd5b5 821static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 822{
8318d78a 823 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY
824 struct ieee80211_rate *rate;
825 int i;
826
d1141dfb 827 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA
828 if (!hw) {
829 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
830 return;
831 }
b481de9c
ZY
832
833 priv->active_rate = 0;
834 priv->active_rate_basic = 0;
835
8318d78a
JB
836 for (i = 0; i < hw->n_bitrates; i++) {
837 rate = &(hw->bitrates[i]);
838 if (rate->hw_value < IWL_RATE_COUNT)
839 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY
840 }
841
842 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
843 priv->active_rate, priv->active_rate_basic);
844
845 /*
846 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
847 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
848 * OFDM
849 */
850 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
851 priv->staging_rxon.cck_basic_rates =
852 ((priv->active_rate_basic &
853 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
854 else
855 priv->staging_rxon.cck_basic_rates =
856 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
857
858 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
859 priv->staging_rxon.ofdm_basic_rates =
860 ((priv->active_rate_basic &
861 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
862 IWL_FIRST_OFDM_RATE) & 0xFF;
863 else
864 priv->staging_rxon.ofdm_basic_rates =
865 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
866}
867
c8b0e6e1 868#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
869
870#include "iwl-spectrum.h"
871
872#define BEACON_TIME_MASK_LOW 0x00FFFFFF
873#define BEACON_TIME_MASK_HIGH 0xFF000000
874#define TIME_UNIT 1024
875
876/*
877 * extended beacon time format
878 * time in usec will be changed into a 32-bit value in 8:24 format
879 * the high 1 byte is the beacon counts
880 * the lower 3 bytes is the time in usec within one beacon interval
881 */
882
bb8c093b 883static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
884{
885 u32 quot;
886 u32 rem;
887 u32 interval = beacon_interval * 1024;
888
889 if (!interval || !usec)
890 return 0;
891
892 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
893 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
894
895 return (quot << 24) + rem;
896}
897
898/* base is usually what we get from ucode with each received frame,
899 * the same as HW timer counter counting down
900 */
901
bb8c093b 902static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
903{
904 u32 base_low = base & BEACON_TIME_MASK_LOW;
905 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
906 u32 interval = beacon_interval * TIME_UNIT;
907 u32 res = (base & BEACON_TIME_MASK_HIGH) +
908 (addon & BEACON_TIME_MASK_HIGH);
909
910 if (base_low > addon_low)
911 res += base_low - addon_low;
912 else if (base_low < addon_low) {
913 res += interval + base_low - addon_low;
914 res += (1 << 24);
915 } else
916 res += (1 << 24);
917
918 return cpu_to_le32(res);
919}
920
c79dd5b5 921static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY
922 struct ieee80211_measurement_params *params,
923 u8 type)
924{
bb8c093b 925 struct iwl4965_spectrum_cmd spectrum;
db11d634 926 struct iwl_rx_packet *res;
857485c0 927 struct iwl_host_cmd cmd = {
b481de9c
ZY
928 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
929 .data = (void *)&spectrum,
930 .meta.flags = CMD_WANT_SKB,
931 };
932 u32 add_time = le64_to_cpu(params->start_time);
933 int rc;
934 int spectrum_resp_status;
935 int duration = le16_to_cpu(params->duration);
936
3109ece1 937 if (iwl_is_associated(priv))
b481de9c 938 add_time =
bb8c093b 939 iwl4965_usecs_to_beacons(
b481de9c
ZY
940 le64_to_cpu(params->start_time) - priv->last_tsf,
941 le16_to_cpu(priv->rxon_timing.beacon_interval));
942
943 memset(&spectrum, 0, sizeof(spectrum));
944
945 spectrum.channel_count = cpu_to_le16(1);
946 spectrum.flags =
947 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
948 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
949 cmd.len = sizeof(spectrum);
950 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
951
3109ece1 952 if (iwl_is_associated(priv))
b481de9c 953 spectrum.start_time =
bb8c093b 954 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
955 add_time,
956 le16_to_cpu(priv->rxon_timing.beacon_interval));
957 else
958 spectrum.start_time = 0;
959
960 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
961 spectrum.channels[0].channel = params->channel;
962 spectrum.channels[0].type = type;
963 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
964 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
965 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
966
857485c0 967 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY
968 if (rc)
969 return rc;
970
db11d634 971 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
972 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
973 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
974 rc = -EIO;
975 }
976
977 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
978 switch (spectrum_resp_status) {
979 case 0: /* Command will be handled */
980 if (res->u.spectrum.id != 0xff) {
981 IWL_DEBUG_INFO
982 ("Replaced existing measurement: %d\n",
983 res->u.spectrum.id);
984 priv->measurement_status &= ~MEASUREMENT_READY;
985 }
986 priv->measurement_status |= MEASUREMENT_ACTIVE;
987 rc = 0;
988 break;
989
990 case 1: /* Command will not be handled */
991 rc = -EAGAIN;
992 break;
993 }
994
995 dev_kfree_skb_any(cmd.meta.u.skb);
996
997 return rc;
998}
999#endif
1000
b481de9c
ZY
1001/******************************************************************************
1002 *
1003 * Generic RX handler implementations
1004 *
1005 ******************************************************************************/
885ba202
TW
1006static void iwl_rx_reply_alive(struct iwl_priv *priv,
1007 struct iwl_rx_mem_buffer *rxb)
b481de9c 1008{
db11d634 1009 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
885ba202 1010 struct iwl_alive_resp *palive;
b481de9c
ZY
1011 struct delayed_work *pwork;
1012
1013 palive = &pkt->u.alive_frame;
1014
1015 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
1016 "0x%01X 0x%01X\n",
1017 palive->is_valid, palive->ver_type,
1018 palive->ver_subtype);
1019
1020 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1021 IWL_DEBUG_INFO("Initialization Alive received.\n");
1022 memcpy(&priv->card_alive_init,
1023 &pkt->u.alive_frame,
885ba202 1024 sizeof(struct iwl_init_alive_resp));
b481de9c
ZY
1025 pwork = &priv->init_alive_start;
1026 } else {
1027 IWL_DEBUG_INFO("Runtime Alive received.\n");
1028 memcpy(&priv->card_alive, &pkt->u.alive_frame,
885ba202 1029 sizeof(struct iwl_alive_resp));
b481de9c
ZY
1030 pwork = &priv->alive_start;
1031 }
1032
1033 /* We delay the ALIVE response by 5ms to
1034 * give the HW RF Kill time to activate... */
1035 if (palive->is_valid == UCODE_VALID_OK)
1036 queue_delayed_work(priv->workqueue, pwork,
1037 msecs_to_jiffies(5));
1038 else
1039 IWL_WARNING("uCode did not respond OK.\n");
1040}
1041
c79dd5b5 1042static void iwl4965_rx_reply_error(struct iwl_priv *priv,
a55360e4 1043 struct iwl_rx_mem_buffer *rxb)
b481de9c 1044{
db11d634 1045 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1046
1047 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
1048 "seq 0x%04X ser 0x%08X\n",
1049 le32_to_cpu(pkt->u.err_resp.error_type),
1050 get_cmd_string(pkt->u.err_resp.cmd_id),
1051 pkt->u.err_resp.cmd_id,
1052 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1053 le32_to_cpu(pkt->u.err_resp.error_info));
1054}
1055
1056#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1057
a55360e4 1058static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
b481de9c 1059{
db11d634 1060 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
c1adf9fb 1061 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
bb8c093b 1062 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
1063 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
1064 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1065 rxon->channel = csa->channel;
1066 priv->staging_rxon.channel = csa->channel;
1067}
1068
c79dd5b5 1069static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
a55360e4 1070 struct iwl_rx_mem_buffer *rxb)
b481de9c 1071{
c8b0e6e1 1072#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
db11d634 1073 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1074 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
1075
1076 if (!report->state) {
f3d67999
EK
1077 IWL_DEBUG(IWL_DL_11H,
1078 "Spectrum Measure Notification: Start\n");
b481de9c
ZY
1079 return;
1080 }
1081
1082 memcpy(&priv->measure_report, report, sizeof(*report));
1083 priv->measurement_status |= MEASUREMENT_READY;
1084#endif
1085}
1086
c79dd5b5 1087static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
a55360e4 1088 struct iwl_rx_mem_buffer *rxb)
b481de9c 1089{
0a6857e7 1090#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1091 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1092 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
1093 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
1094 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1095#endif
1096}
1097
c79dd5b5 1098static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
a55360e4 1099 struct iwl_rx_mem_buffer *rxb)
b481de9c 1100{
db11d634 1101 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1102 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
1103 "notification for %s:\n",
1104 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bf403db8 1105 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
1106}
1107
bb8c093b 1108static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 1109{
c79dd5b5
TW
1110 struct iwl_priv *priv =
1111 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY
1112 struct sk_buff *beacon;
1113
1114 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
e039fa4a 1115 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
b481de9c
ZY
1116
1117 if (!beacon) {
1118 IWL_ERROR("update beacon failed\n");
1119 return;
1120 }
1121
1122 mutex_lock(&priv->mutex);
1123 /* new beacon skb is allocated every time; dispose previous.*/
1124 if (priv->ibss_beacon)
1125 dev_kfree_skb(priv->ibss_beacon);
1126
1127 priv->ibss_beacon = beacon;
1128 mutex_unlock(&priv->mutex);
1129
bb8c093b 1130 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
1131}
1132
4e39317d
EG
1133/**
1134 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
1135 *
1136 * This callback is provided in order to send a statistics request.
1137 *
1138 * This timer function is continually reset to execute within
1139 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
1140 * was received. We need to ensure we receive the statistics in order
1141 * to update the temperature used for calibrating the TXPOWER.
1142 */
1143static void iwl4965_bg_statistics_periodic(unsigned long data)
1144{
1145 struct iwl_priv *priv = (struct iwl_priv *)data;
1146
1147 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1148 return;
1149
1150 iwl_send_statistics_request(priv, CMD_ASYNC);
1151}
1152
c79dd5b5 1153static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
a55360e4 1154 struct iwl_rx_mem_buffer *rxb)
b481de9c 1155{
0a6857e7 1156#ifdef CONFIG_IWLWIFI_DEBUG
db11d634 1157 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
bb8c093b 1158 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
e7d326ac 1159 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
1160
1161 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
1162 "tsf %d %d rate %d\n",
25a6572c 1163 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
b481de9c
ZY
1164 beacon->beacon_notify_hdr.failure_frame,
1165 le32_to_cpu(beacon->ibss_mgr_status),
1166 le32_to_cpu(beacon->high_tsf),
1167 le32_to_cpu(beacon->low_tsf), rate);
1168#endif
1169
1170 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
1171 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1172 queue_work(priv->workqueue, &priv->beacon_update);
1173}
1174
b481de9c
ZY
1175/* Handle notification from uCode that card's power state is changing
1176 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 1177static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
a55360e4 1178 struct iwl_rx_mem_buffer *rxb)
b481de9c 1179{
db11d634 1180 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1181 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1182 unsigned long status = priv->status;
1183
1184 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
1185 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1186 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1187
1188 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
1189 RF_CARD_DISABLED)) {
1190
3395f6e9 1191 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
1192 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1193
3395f6e9
TW
1194 if (!iwl_grab_nic_access(priv)) {
1195 iwl_write_direct32(
b481de9c
ZY
1196 priv, HBUS_TARG_MBX_C,
1197 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1198
3395f6e9 1199 iwl_release_nic_access(priv);
b481de9c
ZY
1200 }
1201
1202 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 1203 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 1204 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW
1205 if (!iwl_grab_nic_access(priv)) {
1206 iwl_write_direct32(
b481de9c
ZY
1207 priv, HBUS_TARG_MBX_C,
1208 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
1209
3395f6e9 1210 iwl_release_nic_access(priv);
b481de9c
ZY
1211 }
1212 }
1213
1214 if (flags & RF_CARD_DISABLED) {
3395f6e9 1215 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 1216 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW
1217 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1218 if (!iwl_grab_nic_access(priv))
1219 iwl_release_nic_access(priv);
b481de9c
ZY
1220 }
1221 }
1222
1223 if (flags & HW_CARD_DISABLED)
1224 set_bit(STATUS_RF_KILL_HW, &priv->status);
1225 else
1226 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1227
1228
1229 if (flags & SW_CARD_DISABLED)
1230 set_bit(STATUS_RF_KILL_SW, &priv->status);
1231 else
1232 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1233
1234 if (!(flags & RXON_CARD_DISABLED))
2a421b91 1235 iwl_scan_cancel(priv);
b481de9c
ZY
1236
1237 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1238 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1239 (test_bit(STATUS_RF_KILL_SW, &status) !=
1240 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1241 queue_work(priv->workqueue, &priv->rf_kill);
1242 else
1243 wake_up_interruptible(&priv->wait_command_queue);
1244}
1245
1246/**
bb8c093b 1247 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
1248 *
1249 * Setup the RX handlers for each of the reply types sent from the uCode
1250 * to the host.
1251 *
1252 * This function chains into the hardware specific files for them to setup
1253 * any hardware specific handlers as well.
1254 */
653fa4a0 1255static void iwl_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 1256{
885ba202 1257 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
bb8c093b
CH
1258 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
1259 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 1260 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
1261 iwl4965_rx_spectrum_measure_notif;
1262 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 1263 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
1264 iwl4965_rx_pm_debug_statistics_notif;
1265 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 1266
9fbab516
BC
1267 /*
1268 * The same handler is used for both the REPLY to a discrete
1269 * statistics request from the host as well as for the periodic
1270 * statistics notifications (after received beacons) from the uCode.
b481de9c 1271 */
8f91aecb
EG
1272 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
1273 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
2a421b91
TW
1274
1275 iwl_setup_rx_scan_handlers(priv);
1276
37a44211 1277 /* status change handler */
bb8c093b 1278 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
b481de9c 1279
c1354754
TW
1280 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
1281 iwl_rx_missed_beacon_notif;
37a44211 1282 /* Rx handlers */
1781a07f
EG
1283 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
1284 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
653fa4a0
EG
1285 /* block ack */
1286 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
9fbab516 1287 /* Set up hardware specific Rx handlers */
d4789efe 1288 priv->cfg->ops->lib->rx_handler_setup(priv);
b481de9c
ZY
1289}
1290
5c0eef96
MA
1291/*
1292 * this should be called while priv->lock is locked
1293*/
a55360e4 1294static void __iwl_rx_replenish(struct iwl_priv *priv)
b481de9c 1295{
a55360e4
TW
1296 iwl_rx_allocate(priv);
1297 iwl_rx_queue_restock(priv);
b481de9c
ZY
1298}
1299
b481de9c
ZY
1300
1301/**
a55360e4 1302 * iwl_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
1303 *
1304 * Uses the priv->rx_handlers callback function array to invoke
1305 * the appropriate handlers, including command responses,
1306 * frame-received notifications, and other notifications.
1307 */
a55360e4 1308void iwl_rx_handle(struct iwl_priv *priv)
b481de9c 1309{
a55360e4 1310 struct iwl_rx_mem_buffer *rxb;
db11d634 1311 struct iwl_rx_packet *pkt;
a55360e4 1312 struct iwl_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
1313 u32 r, i;
1314 int reclaim;
1315 unsigned long flags;
5c0eef96 1316 u8 fill_rx = 0;
d68ab680 1317 u32 count = 8;
b481de9c 1318
6440adb5
CB
1319 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1320 * buffer that the driver may process (last buffer filled by ucode). */
d67f5489 1321 r = priv->cfg->ops->lib->shared_mem_rx_idx(priv);
b481de9c
ZY
1322 i = rxq->read;
1323
1324 /* Rx interrupt, but nothing sent from uCode */
1325 if (i == r)
f3d67999 1326 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d\n", r, i);
b481de9c 1327
a55360e4 1328 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
5c0eef96
MA
1329 fill_rx = 1;
1330
b481de9c
ZY
1331 while (i != r) {
1332 rxb = rxq->queue[i];
1333
9fbab516 1334 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
1335 * then a bug has been introduced in the queue refilling
1336 * routines -- catch it here */
1337 BUG_ON(rxb == NULL);
1338
1339 rxq->queue[i] = NULL;
1340
1341 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 1342 priv->hw_params.rx_buf_size,
b481de9c 1343 PCI_DMA_FROMDEVICE);
db11d634 1344 pkt = (struct iwl_rx_packet *)rxb->skb->data;
b481de9c
ZY
1345
1346 /* Reclaim a command buffer only if this packet is a response
1347 * to a (driver-originated) command.
1348 * If the packet (e.g. Rx frame) originated from uCode,
1349 * there is no command buffer to reclaim.
1350 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1351 * but apparently a few don't get set; catch them here. */
1352 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1353 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 1354 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 1355 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
1356 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1357 (pkt->hdr.cmd != REPLY_TX);
1358
1359 /* Based on type of command response or notification,
1360 * handle those that need handling via function in
bb8c093b 1361 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c 1362 if (priv->rx_handlers[pkt->hdr.cmd]) {
f3d67999
EK
1363 IWL_DEBUG(IWL_DL_RX, "r = %d, i = %d, %s, 0x%02x\n", r,
1364 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
b481de9c
ZY
1365 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1366 } else {
1367 /* No handling needed */
f3d67999 1368 IWL_DEBUG(IWL_DL_RX,
b481de9c
ZY
1369 "r %d i %d No handler needed for %s, 0x%02x\n",
1370 r, i, get_cmd_string(pkt->hdr.cmd),
1371 pkt->hdr.cmd);
1372 }
1373
1374 if (reclaim) {
9fbab516 1375 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 1376 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY
1377 * as we reclaim the driver command queue */
1378 if (rxb && rxb->skb)
17b88929 1379 iwl_tx_cmd_complete(priv, rxb);
b481de9c
ZY
1380 else
1381 IWL_WARNING("Claim null rxb?\n");
1382 }
1383
1384 /* For now we just don't re-use anything. We can tweak this
1385 * later to try and re-use notification packets and SKBs that
1386 * fail to Rx correctly */
1387 if (rxb->skb != NULL) {
1388 priv->alloc_rxb_skb--;
1389 dev_kfree_skb_any(rxb->skb);
1390 rxb->skb = NULL;
1391 }
1392
1393 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 1394 priv->hw_params.rx_buf_size,
9ee1ba47 1395 PCI_DMA_FROMDEVICE);
b481de9c
ZY
1396 spin_lock_irqsave(&rxq->lock, flags);
1397 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1398 spin_unlock_irqrestore(&rxq->lock, flags);
1399 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA
1400 /* If there are a lot of unused frames,
1401 * restock the Rx queue so ucode wont assert. */
1402 if (fill_rx) {
1403 count++;
1404 if (count >= 8) {
1405 priv->rxq.read = i;
a55360e4 1406 __iwl_rx_replenish(priv);
5c0eef96
MA
1407 count = 0;
1408 }
1409 }
b481de9c
ZY
1410 }
1411
1412 /* Backtrack one entry */
1413 priv->rxq.read = i;
a55360e4
TW
1414 iwl_rx_queue_restock(priv);
1415}
a55360e4 1416
0a6857e7 1417#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1418static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv)
b481de9c 1419{
c1adf9fb 1420 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
0795af57
JP
1421 DECLARE_MAC_BUF(mac);
1422
b481de9c 1423 IWL_DEBUG_RADIO("RX CONFIG:\n");
bf403db8 1424 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
1425 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1426 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1427 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
1428 le32_to_cpu(rxon->filter_flags));
1429 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
1430 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
1431 rxon->ofdm_basic_rates);
1432 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
1433 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
1434 print_mac(mac, rxon->node_addr));
1435 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
1436 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
1437 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1438}
1439#endif
1440
c79dd5b5 1441static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1442{
1443 IWL_DEBUG_ISR("Enabling interrupts\n");
1444 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 1445 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
1446}
1447
0359facc
MA
1448/* call this function to flush any scheduled tasklet */
1449static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1450{
1451 /* wait to make sure we flush pedding tasklet*/
1452 synchronize_irq(priv->pci_dev->irq);
1453 tasklet_kill(&priv->irq_tasklet);
1454}
1455
c79dd5b5 1456static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY
1457{
1458 clear_bit(STATUS_INT_ENABLED, &priv->status);
1459
1460 /* disable interrupts from uCode/NIC to host */
3395f6e9 1461 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1462
1463 /* acknowledge/clear/reset any interrupts still pending
1464 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW
1465 iwl_write32(priv, CSR_INT, 0xffffffff);
1466 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
1467 IWL_DEBUG_ISR("Disabled interrupts\n");
1468}
1469
b481de9c 1470
b481de9c 1471/**
bb8c093b 1472 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 1473 */
c79dd5b5 1474static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 1475{
bb8c093b 1476 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
1477 set_bit(STATUS_FW_ERROR, &priv->status);
1478
1479 /* Cancel currently queued command. */
1480 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1481
0a6857e7 1482#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1483 if (priv->debug_level & IWL_DL_FW_ERRORS) {
ede0cba4 1484 iwl_dump_nic_error_log(priv);
189a2b59 1485 iwl_dump_nic_event_log(priv);
bf403db8 1486 iwl4965_print_rx_config_cmd(priv);
b481de9c
ZY
1487 }
1488#endif
1489
1490 wake_up_interruptible(&priv->wait_command_queue);
1491
1492 /* Keep the restart process from trying to send host
1493 * commands by clearing the INIT status bit */
1494 clear_bit(STATUS_READY, &priv->status);
1495
1496 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
f3d67999 1497 IWL_DEBUG(IWL_DL_FW_ERRORS,
b481de9c
ZY
1498 "Restarting adapter due to uCode error.\n");
1499
3109ece1 1500 if (iwl_is_associated(priv)) {
b481de9c
ZY
1501 memcpy(&priv->recovery_rxon, &priv->active_rxon,
1502 sizeof(priv->recovery_rxon));
1503 priv->error_recovering = 1;
1504 }
3a1081e8
EK
1505 if (priv->cfg->mod_params->restart_fw)
1506 queue_work(priv->workqueue, &priv->restart);
b481de9c
ZY
1507 }
1508}
1509
c79dd5b5 1510static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY
1511{
1512 unsigned long flags;
1513
1514 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1515 sizeof(priv->staging_rxon));
1516 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 1517 iwl4965_commit_rxon(priv);
b481de9c 1518
4f40e4d9 1519 iwl_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
1520
1521 spin_lock_irqsave(&priv->lock, flags);
1522 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1523 priv->error_recovering = 0;
1524 spin_unlock_irqrestore(&priv->lock, flags);
1525}
1526
c79dd5b5 1527static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY
1528{
1529 u32 inta, handled = 0;
1530 u32 inta_fh;
1531 unsigned long flags;
0a6857e7 1532#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
1533 u32 inta_mask;
1534#endif
1535
1536 spin_lock_irqsave(&priv->lock, flags);
1537
1538 /* Ack/clear/reset pending uCode interrupts.
1539 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1540 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW
1541 inta = iwl_read32(priv, CSR_INT);
1542 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY
1543
1544 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1545 * Any new interrupts that happen after this, either while we're
1546 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW
1547 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1548 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 1549
0a6857e7 1550#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1551 if (priv->debug_level & IWL_DL_ISR) {
9fbab516 1552 /* just for debug */
3395f6e9 1553 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY
1554 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1555 inta, inta_mask, inta_fh);
1556 }
1557#endif
1558
1559 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1560 * atomic, make sure that inta covers all the interrupts that
1561 * we've discovered, even if FH interrupt came in just after
1562 * reading CSR_INT. */
6f83eaa1 1563 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 1564 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 1565 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY
1566 inta |= CSR_INT_BIT_FH_TX;
1567
1568 /* Now service all interrupt bits discovered above. */
1569 if (inta & CSR_INT_BIT_HW_ERR) {
1570 IWL_ERROR("Microcode HW error detected. Restarting.\n");
1571
1572 /* Tell the device to stop sending interrupts */
bb8c093b 1573 iwl4965_disable_interrupts(priv);
b481de9c 1574
bb8c093b 1575 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1576
1577 handled |= CSR_INT_BIT_HW_ERR;
1578
1579 spin_unlock_irqrestore(&priv->lock, flags);
1580
1581 return;
1582 }
1583
0a6857e7 1584#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1585 if (priv->debug_level & (IWL_DL_ISR)) {
b481de9c 1586 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP
1587 if (inta & CSR_INT_BIT_SCD)
1588 IWL_DEBUG_ISR("Scheduler finished to transmit "
1589 "the frame/frames.\n");
b481de9c
ZY
1590
1591 /* Alive notification via Rx interrupt will do the real work */
1592 if (inta & CSR_INT_BIT_ALIVE)
1593 IWL_DEBUG_ISR("Alive interrupt\n");
1594 }
1595#endif
1596 /* Safely ignore these bits for debug checks below */
25c03d8e 1597 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 1598
9fbab516 1599 /* HW RF KILL switch toggled */
b481de9c
ZY
1600 if (inta & CSR_INT_BIT_RF_KILL) {
1601 int hw_rf_kill = 0;
3395f6e9 1602 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
1603 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1604 hw_rf_kill = 1;
1605
f3d67999 1606 IWL_DEBUG(IWL_DL_RF_KILL, "RF_KILL bit toggled to %s.\n",
b481de9c
ZY
1607 hw_rf_kill ? "disable radio":"enable radio");
1608
1609 /* Queue restart only if RF_KILL switch was set to "kill"
1610 * when we loaded driver, and is now set to "enable".
1611 * After we're Alive, RF_KILL gets handled by
3230455d 1612 * iwl4965_rx_card_state_notif() */
53e49093
ZY
1613 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
1614 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 1615 queue_work(priv->workqueue, &priv->restart);
53e49093 1616 }
b481de9c
ZY
1617
1618 handled |= CSR_INT_BIT_RF_KILL;
1619 }
1620
9fbab516 1621 /* Chip got too hot and stopped itself */
b481de9c
ZY
1622 if (inta & CSR_INT_BIT_CT_KILL) {
1623 IWL_ERROR("Microcode CT kill error detected.\n");
1624 handled |= CSR_INT_BIT_CT_KILL;
1625 }
1626
1627 /* Error detected by uCode */
1628 if (inta & CSR_INT_BIT_SW_ERR) {
1629 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
1630 inta);
bb8c093b 1631 iwl4965_irq_handle_error(priv);
b481de9c
ZY
1632 handled |= CSR_INT_BIT_SW_ERR;
1633 }
1634
1635 /* uCode wakes up after power-down sleep */
1636 if (inta & CSR_INT_BIT_WAKEUP) {
1637 IWL_DEBUG_ISR("Wakeup interrupt\n");
a55360e4 1638 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
babcebfa
TW
1639 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1640 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1641 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1642 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1643 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1644 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
1645
1646 handled |= CSR_INT_BIT_WAKEUP;
1647 }
1648
1649 /* All uCode command responses, including Tx command responses,
1650 * Rx "responses" (frame-received notification), and other
1651 * notifications from uCode come through here*/
1652 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
a55360e4 1653 iwl_rx_handle(priv);
b481de9c
ZY
1654 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1655 }
1656
1657 if (inta & CSR_INT_BIT_FH_TX) {
1658 IWL_DEBUG_ISR("Tx interrupt\n");
1659 handled |= CSR_INT_BIT_FH_TX;
dbb983b7
RR
1660 /* FH finished to write, send event */
1661 priv->ucode_write_complete = 1;
1662 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
1663 }
1664
1665 if (inta & ~handled)
1666 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1667
1668 if (inta & ~CSR_INI_SET_MASK) {
1669 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
1670 inta & ~CSR_INI_SET_MASK);
1671 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
1672 }
1673
1674 /* Re-enable all interrupts */
0359facc
MA
1675 /* only Re-enable if diabled by irq */
1676 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1677 iwl4965_enable_interrupts(priv);
b481de9c 1678
0a6857e7 1679#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 1680 if (priv->debug_level & (IWL_DL_ISR)) {
3395f6e9
TW
1681 inta = iwl_read32(priv, CSR_INT);
1682 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1683 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1684 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1685 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1686 }
1687#endif
1688 spin_unlock_irqrestore(&priv->lock, flags);
1689}
1690
bb8c093b 1691static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 1692{
c79dd5b5 1693 struct iwl_priv *priv = data;
b481de9c
ZY
1694 u32 inta, inta_mask;
1695 u32 inta_fh;
1696 if (!priv)
1697 return IRQ_NONE;
1698
1699 spin_lock(&priv->lock);
1700
1701 /* Disable (but don't clear!) interrupts here to avoid
1702 * back-to-back ISRs and sporadic interrupts from our NIC.
1703 * If we have something to service, the tasklet will re-enable ints.
1704 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW
1705 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1706 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
1707
1708 /* Discover which interrupts are active/pending */
3395f6e9
TW
1709 inta = iwl_read32(priv, CSR_INT);
1710 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
1711
1712 /* Ignore interrupt if there's nothing in NIC to service.
1713 * This may be due to IRQ shared with another device,
1714 * or due to sporadic interrupts thrown from our NIC. */
1715 if (!inta && !inta_fh) {
1716 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
1717 goto none;
1718 }
1719
1720 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
1721 /* Hardware disappeared. It might have already raised
1722 * an interrupt */
b481de9c 1723 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 1724 goto unplugged;
b481de9c
ZY
1725 }
1726
1727 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1728 inta, inta_mask, inta_fh);
1729
25c03d8e
JP
1730 inta &= ~CSR_INT_BIT_SCD;
1731
bb8c093b 1732 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP
1733 if (likely(inta || inta_fh))
1734 tasklet_schedule(&priv->irq_tasklet);
b481de9c 1735
66fbb541
ON
1736 unplugged:
1737 spin_unlock(&priv->lock);
b481de9c
ZY
1738 return IRQ_HANDLED;
1739
1740 none:
1741 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA
1742 /* only Re-enable if diabled by irq */
1743 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1744 iwl4965_enable_interrupts(priv);
b481de9c
ZY
1745 spin_unlock(&priv->lock);
1746 return IRQ_NONE;
1747}
1748
b481de9c
ZY
1749/******************************************************************************
1750 *
1751 * uCode download functions
1752 *
1753 ******************************************************************************/
1754
c79dd5b5 1755static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 1756{
98c92211
TW
1757 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1758 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1759 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1760 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1761 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1762 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY
1763}
1764
edcdf8b2
RR
1765static void iwl4965_nic_start(struct iwl_priv *priv)
1766{
1767 /* Remove all resets to allow NIC to operate */
1768 iwl_write32(priv, CSR_RESET, 0);
1769}
1770
1771
b481de9c 1772/**
bb8c093b 1773 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
1774 *
1775 * Copy into buffers for card to fetch via bus-mastering
1776 */
c79dd5b5 1777static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 1778{
14b3d338 1779 struct iwl_ucode *ucode;
90e759d1 1780 int ret;
b481de9c 1781 const struct firmware *ucode_raw;
4bf775cd 1782 const char *name = priv->cfg->fw_name;
b481de9c
ZY
1783 u8 *src;
1784 size_t len;
1785 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
1786
1787 /* Ask kernel firmware_class module to get the boot firmware off disk.
1788 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
1789 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
1790 if (ret < 0) {
1791 IWL_ERROR("%s firmware file req failed: Reason %d\n",
1792 name, ret);
b481de9c
ZY
1793 goto error;
1794 }
1795
1796 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
1797 name, ucode_raw->size);
1798
1799 /* Make sure that we got at least our header! */
1800 if (ucode_raw->size < sizeof(*ucode)) {
1801 IWL_ERROR("File size way too small!\n");
90e759d1 1802 ret = -EINVAL;
b481de9c
ZY
1803 goto err_release;
1804 }
1805
1806 /* Data from ucode file: header followed by uCode images */
1807 ucode = (void *)ucode_raw->data;
1808
1809 ver = le32_to_cpu(ucode->ver);
1810 inst_size = le32_to_cpu(ucode->inst_size);
1811 data_size = le32_to_cpu(ucode->data_size);
1812 init_size = le32_to_cpu(ucode->init_size);
1813 init_data_size = le32_to_cpu(ucode->init_data_size);
1814 boot_size = le32_to_cpu(ucode->boot_size);
1815
1816 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
1817 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
1818 inst_size);
1819 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
1820 data_size);
1821 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
1822 init_size);
1823 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
1824 init_data_size);
1825 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
1826 boot_size);
1827
1828 /* Verify size of file vs. image size info in file's header */
1829 if (ucode_raw->size < sizeof(*ucode) +
1830 inst_size + data_size + init_size +
1831 init_data_size + boot_size) {
1832
1833 IWL_DEBUG_INFO("uCode file size %d too small\n",
1834 (int)ucode_raw->size);
90e759d1 1835 ret = -EINVAL;
b481de9c
ZY
1836 goto err_release;
1837 }
1838
1839 /* Verify that uCode images will fit in card's SRAM */
099b40b7 1840 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW
1841 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
1842 inst_size);
1843 ret = -EINVAL;
b481de9c
ZY
1844 goto err_release;
1845 }
1846
099b40b7 1847 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW
1848 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
1849 data_size);
1850 ret = -EINVAL;
b481de9c
ZY
1851 goto err_release;
1852 }
099b40b7 1853 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 1854 IWL_DEBUG_INFO
90e759d1
TW
1855 ("uCode init instr len %d too large to fit in\n",
1856 init_size);
1857 ret = -EINVAL;
b481de9c
ZY
1858 goto err_release;
1859 }
099b40b7 1860 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 1861 IWL_DEBUG_INFO
90e759d1
TW
1862 ("uCode init data len %d too large to fit in\n",
1863 init_data_size);
1864 ret = -EINVAL;
b481de9c
ZY
1865 goto err_release;
1866 }
099b40b7 1867 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 1868 IWL_DEBUG_INFO
90e759d1
TW
1869 ("uCode boot instr len %d too large to fit in\n",
1870 boot_size);
1871 ret = -EINVAL;
b481de9c
ZY
1872 goto err_release;
1873 }
1874
1875 /* Allocate ucode buffers for card's bus-master loading ... */
1876
1877 /* Runtime instructions and 2 copies of data:
1878 * 1) unmodified from disk
1879 * 2) backup cache for save/restore during power-downs */
1880 priv->ucode_code.len = inst_size;
98c92211 1881 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
1882
1883 priv->ucode_data.len = data_size;
98c92211 1884 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
1885
1886 priv->ucode_data_backup.len = data_size;
98c92211 1887 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
1888
1889 /* Initialization instructions and data */
90e759d1
TW
1890 if (init_size && init_data_size) {
1891 priv->ucode_init.len = init_size;
98c92211 1892 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW
1893
1894 priv->ucode_init_data.len = init_data_size;
98c92211 1895 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW
1896
1897 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1898 goto err_pci_alloc;
1899 }
b481de9c
ZY
1900
1901 /* Bootstrap (instructions only, no data) */
90e759d1
TW
1902 if (boot_size) {
1903 priv->ucode_boot.len = boot_size;
98c92211 1904 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 1905
90e759d1
TW
1906 if (!priv->ucode_boot.v_addr)
1907 goto err_pci_alloc;
1908 }
b481de9c
ZY
1909
1910 /* Copy images into buffers for card's bus-master reads ... */
1911
1912 /* Runtime instructions (first block of data in file) */
1913 src = &ucode->data[0];
1914 len = priv->ucode_code.len;
90e759d1 1915 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
1916 memcpy(priv->ucode_code.v_addr, src, len);
1917 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1918 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1919
1920 /* Runtime data (2nd block)
bb8c093b 1921 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
1922 src = &ucode->data[inst_size];
1923 len = priv->ucode_data.len;
90e759d1 1924 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
1925 memcpy(priv->ucode_data.v_addr, src, len);
1926 memcpy(priv->ucode_data_backup.v_addr, src, len);
1927
1928 /* Initialization instructions (3rd block) */
1929 if (init_size) {
1930 src = &ucode->data[inst_size + data_size];
1931 len = priv->ucode_init.len;
90e759d1
TW
1932 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
1933 len);
b481de9c
ZY
1934 memcpy(priv->ucode_init.v_addr, src, len);
1935 }
1936
1937 /* Initialization data (4th block) */
1938 if (init_data_size) {
1939 src = &ucode->data[inst_size + data_size + init_size];
1940 len = priv->ucode_init_data.len;
90e759d1
TW
1941 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
1942 len);
b481de9c
ZY
1943 memcpy(priv->ucode_init_data.v_addr, src, len);
1944 }
1945
1946 /* Bootstrap instructions (5th block) */
1947 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1948 len = priv->ucode_boot.len;
90e759d1 1949 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
1950 memcpy(priv->ucode_boot.v_addr, src, len);
1951
1952 /* We have our copies now, allow OS release its copies */
1953 release_firmware(ucode_raw);
1954 return 0;
1955
1956 err_pci_alloc:
1957 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 1958 ret = -ENOMEM;
bb8c093b 1959 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
1960
1961 err_release:
1962 release_firmware(ucode_raw);
1963
1964 error:
90e759d1 1965 return ret;
b481de9c
ZY
1966}
1967
b481de9c 1968/**
4a4a9e81 1969 * iwl_alive_start - called after REPLY_ALIVE notification received
b481de9c 1970 * from protocol/runtime uCode (initialization uCode's
4a4a9e81 1971 * Alive gets handled by iwl_init_alive_start()).
b481de9c 1972 */
4a4a9e81 1973static void iwl_alive_start(struct iwl_priv *priv)
b481de9c 1974{
57aab75a 1975 int ret = 0;
b481de9c
ZY
1976
1977 IWL_DEBUG_INFO("Runtime Alive received.\n");
1978
1979 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1980 /* We had an error bringing up the hardware, so take it
1981 * all the way back down so we can try again */
1982 IWL_DEBUG_INFO("Alive failed.\n");
1983 goto restart;
1984 }
1985
1986 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1987 * This is a paranoid check, because we would not have gotten the
1988 * "runtime" alive if code weren't properly loaded. */
b0692f2f 1989 if (iwl_verify_ucode(priv)) {
b481de9c
ZY
1990 /* Runtime instruction load was bad;
1991 * take it all the way back down so we can try again */
1992 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
1993 goto restart;
1994 }
1995
37deb2a0 1996 iwl_clear_stations_table(priv);
57aab75a
TW
1997 ret = priv->cfg->ops->lib->alive_notify(priv);
1998 if (ret) {
b481de9c 1999 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 2000 ret);
b481de9c
ZY
2001 goto restart;
2002 }
2003
9fbab516 2004 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
2005 set_bit(STATUS_ALIVE, &priv->status);
2006
fee1247a 2007 if (iwl_is_rfkill(priv))
b481de9c
ZY
2008 return;
2009
36d6825b 2010 ieee80211_wake_queues(priv->hw);
b481de9c
ZY
2011
2012 priv->active_rate = priv->rates_mask;
2013 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2014
3109ece1 2015 if (iwl_is_associated(priv)) {
c1adf9fb
GG
2016 struct iwl_rxon_cmd *active_rxon =
2017 (struct iwl_rxon_cmd *)&priv->active_rxon;
b481de9c
ZY
2018
2019 memcpy(&priv->staging_rxon, &priv->active_rxon,
2020 sizeof(priv->staging_rxon));
2021 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2022 } else {
2023 /* Initialize our rx_config data */
bb8c093b 2024 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2025 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2026 }
2027
9fbab516 2028 /* Configure Bluetooth device coexistence support */
bb8c093b 2029 iwl4965_send_bt_config(priv);
b481de9c 2030
4a4a9e81
TW
2031 iwl_reset_run_time_calib(priv);
2032
b481de9c 2033 /* Configure the adapter for unassociated operation */
bb8c093b 2034 iwl4965_commit_rxon(priv);
b481de9c
ZY
2035
2036 /* At this point, the NIC is initialized and operational */
47f4a587 2037 iwl_rf_kill_ct_config(priv);
5a66926a 2038
fe00b5a5
RC
2039 iwl_leds_register(priv);
2040
b481de9c 2041 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 2042 set_bit(STATUS_READY, &priv->status);
5a66926a 2043 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY
2044
2045 if (priv->error_recovering)
bb8c093b 2046 iwl4965_error_recovery(priv);
b481de9c 2047
58d0f361 2048 iwl_power_update_mode(priv, 1);
84363e6e 2049 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
c46fbefa
AK
2050
2051 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2052 iwl4965_set_mode(priv, priv->iw_mode);
2053
b481de9c
ZY
2054 return;
2055
2056 restart:
2057 queue_work(priv->workqueue, &priv->restart);
2058}
2059
4e39317d 2060static void iwl_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 2061
c79dd5b5 2062static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2063{
2064 unsigned long flags;
2065 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2066
2067 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
2068
b481de9c
ZY
2069 if (!exit_pending)
2070 set_bit(STATUS_EXIT_PENDING, &priv->status);
2071
ab53d8af
MA
2072 iwl_leds_unregister(priv);
2073
37deb2a0 2074 iwl_clear_stations_table(priv);
b481de9c
ZY
2075
2076 /* Unblock any waiting calls */
2077 wake_up_interruptible_all(&priv->wait_command_queue);
2078
b481de9c
ZY
2079 /* Wipe out the EXIT_PENDING status bit if we are not actually
2080 * exiting the module */
2081 if (!exit_pending)
2082 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2083
2084 /* stop and reset the on-board processor */
3395f6e9 2085 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
2086
2087 /* tell the device to stop sending interrupts */
0359facc 2088 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2089 iwl4965_disable_interrupts(priv);
0359facc
MA
2090 spin_unlock_irqrestore(&priv->lock, flags);
2091 iwl_synchronize_irq(priv);
b481de9c
ZY
2092
2093 if (priv->mac80211_registered)
2094 ieee80211_stop_queues(priv->hw);
2095
bb8c093b 2096 /* If we have not previously called iwl4965_init() then
b481de9c 2097 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 2098 if (!iwl_is_init(priv)) {
b481de9c
ZY
2099 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2100 STATUS_RF_KILL_HW |
2101 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2102 STATUS_RF_KILL_SW |
9788864e
RC
2103 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2104 STATUS_GEO_CONFIGURED |
b481de9c 2105 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
052ec3f1
MA
2106 STATUS_IN_SUSPEND |
2107 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2108 STATUS_EXIT_PENDING;
b481de9c
ZY
2109 goto exit;
2110 }
2111
2112 /* ...otherwise clear out all the status bits but the RF Kill and
2113 * SUSPEND bits and continue taking the NIC down. */
2114 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2115 STATUS_RF_KILL_HW |
2116 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2117 STATUS_RF_KILL_SW |
9788864e
RC
2118 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2119 STATUS_GEO_CONFIGURED |
b481de9c
ZY
2120 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
2121 STATUS_IN_SUSPEND |
2122 test_bit(STATUS_FW_ERROR, &priv->status) <<
052ec3f1
MA
2123 STATUS_FW_ERROR |
2124 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2125 STATUS_EXIT_PENDING;
b481de9c
ZY
2126
2127 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2128 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 2129 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
2130 spin_unlock_irqrestore(&priv->lock, flags);
2131
da1bc453 2132 iwl_txq_ctx_stop(priv);
b3bbacb7 2133 iwl_rxq_stop(priv);
b481de9c
ZY
2134
2135 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW
2136 if (!iwl_grab_nic_access(priv)) {
2137 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 2138 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 2139 iwl_release_nic_access(priv);
b481de9c
ZY
2140 }
2141 spin_unlock_irqrestore(&priv->lock, flags);
2142
2143 udelay(5);
2144
7f066108
TW
2145 /* FIXME: apm_ops.suspend(priv) */
2146 priv->cfg->ops->lib->apm_ops.reset(priv);
399f4900 2147 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY
2148
2149 exit:
885ba202 2150 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
b481de9c
ZY
2151
2152 if (priv->ibss_beacon)
2153 dev_kfree_skb(priv->ibss_beacon);
2154 priv->ibss_beacon = NULL;
2155
2156 /* clear out any free frames */
fcab423d 2157 iwl_clear_free_frames(priv);
b481de9c
ZY
2158}
2159
c79dd5b5 2160static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY
2161{
2162 mutex_lock(&priv->mutex);
bb8c093b 2163 __iwl4965_down(priv);
b481de9c 2164 mutex_unlock(&priv->mutex);
b24d22b1 2165
4e39317d 2166 iwl_cancel_deferred_work(priv);
b481de9c
ZY
2167}
2168
2169#define MAX_HW_RESTARTS 5
2170
c79dd5b5 2171static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 2172{
57aab75a
TW
2173 int i;
2174 int ret;
b481de9c
ZY
2175
2176 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2177 IWL_WARNING("Exit pending; will not bring the NIC up\n");
2178 return -EIO;
2179 }
2180
e903fbd4
RC
2181 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2182 IWL_ERROR("ucode not available for device bringup\n");
2183 return -EIO;
2184 }
2185
e655b9f0 2186 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 2187 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY
2188 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2189 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2 2190 else
e655b9f0 2191 set_bit(STATUS_RF_KILL_HW, &priv->status);
3bff19c2
EG
2192
2193 if (!test_bit(STATUS_IN_SUSPEND, &priv->status) &&
2194 iwl_is_rfkill(priv)) {
2195 iwl_rfkill_set_hw_state(priv);
2196 IWL_WARNING("Radio disabled by %s RF Kill switch\n",
2197 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
2198 return -ENODEV;
b481de9c
ZY
2199 }
2200
ad97edd2 2201 iwl_rfkill_set_hw_state(priv);
3395f6e9 2202 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 2203
399f4900
RR
2204 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
2205 if (ret) {
2206 IWL_ERROR("Unable to allocate shared memory\n");
2207 return ret;
2208 }
2209
1053d35f 2210 ret = iwl_hw_nic_init(priv);
57aab75a
TW
2211 if (ret) {
2212 IWL_ERROR("Unable to init nic\n");
2213 return ret;
b481de9c
ZY
2214 }
2215
2216 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW
2217 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2218 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
2219 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2220
2221 /* clear (again), then enable host interrupts */
3395f6e9 2222 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 2223 iwl4965_enable_interrupts(priv);
b481de9c
ZY
2224
2225 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW
2226 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2227 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
2228
2229 /* Copy original ucode data image from disk into backup cache.
2230 * This will be used to initialize the on-board processor's
2231 * data SRAM for a clean start when the runtime program first loads. */
2232 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 2233 priv->ucode_data.len);
b481de9c 2234
e655b9f0 2235 /* We return success when we resume from suspend and rf_kill is on. */
64e72c3e
MA
2236 if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
2237 test_bit(STATUS_RF_KILL_SW, &priv->status))
b481de9c 2238 return 0;
b481de9c
ZY
2239
2240 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2241
37deb2a0 2242 iwl_clear_stations_table(priv);
b481de9c
ZY
2243
2244 /* load bootstrap state machine,
2245 * load bootstrap program into processor's memory,
2246 * prepare to load the "initialize" uCode */
57aab75a 2247 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 2248
57aab75a
TW
2249 if (ret) {
2250 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY
2251 continue;
2252 }
2253
f3d5b45b
EG
2254 /* Clear out the uCode error bit if it is set */
2255 clear_bit(STATUS_FW_ERROR, &priv->status);
2256
b481de9c 2257 /* start card; "initialize" will load runtime ucode */
edcdf8b2 2258 iwl4965_nic_start(priv);
b481de9c 2259
b481de9c
ZY
2260 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
2261
2262 return 0;
2263 }
2264
2265 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 2266 __iwl4965_down(priv);
64e72c3e 2267 clear_bit(STATUS_EXIT_PENDING, &priv->status);
b481de9c
ZY
2268
2269 /* tried to restart and config the device for as long as our
2270 * patience could withstand */
2271 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
2272 return -EIO;
2273}
2274
2275
2276/*****************************************************************************
2277 *
2278 * Workqueue callbacks
2279 *
2280 *****************************************************************************/
2281
4a4a9e81 2282static void iwl_bg_init_alive_start(struct work_struct *data)
b481de9c 2283{
c79dd5b5
TW
2284 struct iwl_priv *priv =
2285 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY
2286
2287 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2288 return;
2289
2290 mutex_lock(&priv->mutex);
f3ccc08c 2291 priv->cfg->ops->lib->init_alive_start(priv);
b481de9c
ZY
2292 mutex_unlock(&priv->mutex);
2293}
2294
4a4a9e81 2295static void iwl_bg_alive_start(struct work_struct *data)
b481de9c 2296{
c79dd5b5
TW
2297 struct iwl_priv *priv =
2298 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY
2299
2300 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2301 return;
2302
2303 mutex_lock(&priv->mutex);
4a4a9e81 2304 iwl_alive_start(priv);
b481de9c
ZY
2305 mutex_unlock(&priv->mutex);
2306}
2307
bb8c093b 2308static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 2309{
c79dd5b5 2310 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY
2311
2312 wake_up_interruptible(&priv->wait_command_queue);
2313
2314 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2315 return;
2316
2317 mutex_lock(&priv->mutex);
2318
fee1247a 2319 if (!iwl_is_rfkill(priv)) {
f3d67999 2320 IWL_DEBUG(IWL_DL_RF_KILL,
b481de9c
ZY
2321 "HW and/or SW RF Kill no longer active, restarting "
2322 "device\n");
2323 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
2324 queue_work(priv->workqueue, &priv->restart);
2325 } else {
ad97edd2
MA
2326 /* make sure mac80211 stop sending Tx frame */
2327 if (priv->mac80211_registered)
2328 ieee80211_stop_queues(priv->hw);
b481de9c
ZY
2329
2330 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2331 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2332 "disabled by SW switch\n");
2333 else
2334 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
2335 "Kill switch must be turned off for "
2336 "wireless networking to work.\n");
2337 }
ad97edd2
MA
2338 iwl_rfkill_set_hw_state(priv);
2339
b481de9c
ZY
2340 mutex_unlock(&priv->mutex);
2341}
2342
4419e39b
AK
2343static void iwl4965_bg_set_monitor(struct work_struct *work)
2344{
2345 struct iwl_priv *priv = container_of(work,
2346 struct iwl_priv, set_monitor);
c46fbefa 2347 int ret;
4419e39b
AK
2348
2349 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
2350
2351 mutex_lock(&priv->mutex);
2352
c46fbefa
AK
2353 ret = iwl4965_set_mode(priv, IEEE80211_IF_TYPE_MNTR);
2354
2355 if (ret) {
2356 if (ret == -EAGAIN)
2357 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
2358 else
2359 IWL_ERROR("iwl4965_set_mode() failed ret = %d\n", ret);
2360 }
4419e39b
AK
2361
2362 mutex_unlock(&priv->mutex);
2363}
2364
16e727e8
EG
2365static void iwl_bg_run_time_calib_work(struct work_struct *work)
2366{
2367 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2368 run_time_calib_work);
2369
2370 mutex_lock(&priv->mutex);
2371
2372 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2373 test_bit(STATUS_SCANNING, &priv->status)) {
2374 mutex_unlock(&priv->mutex);
2375 return;
2376 }
2377
2378 if (priv->start_calib) {
2379 iwl_chain_noise_calibration(priv, &priv->statistics);
2380
2381 iwl_sensitivity_calibration(priv, &priv->statistics);
2382 }
2383
2384 mutex_unlock(&priv->mutex);
2385 return;
2386}
2387
bb8c093b 2388static void iwl4965_bg_up(struct work_struct *data)
b481de9c 2389{
c79dd5b5 2390 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY
2391
2392 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2393 return;
2394
2395 mutex_lock(&priv->mutex);
bb8c093b 2396 __iwl4965_up(priv);
b481de9c
ZY
2397 mutex_unlock(&priv->mutex);
2398}
2399
bb8c093b 2400static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 2401{
c79dd5b5 2402 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY
2403
2404 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2405 return;
2406
bb8c093b 2407 iwl4965_down(priv);
b481de9c
ZY
2408 queue_work(priv->workqueue, &priv->up);
2409}
2410
bb8c093b 2411static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 2412{
c79dd5b5
TW
2413 struct iwl_priv *priv =
2414 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY
2415
2416 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2417 return;
2418
2419 mutex_lock(&priv->mutex);
a55360e4 2420 iwl_rx_replenish(priv);
b481de9c
ZY
2421 mutex_unlock(&priv->mutex);
2422}
2423
7878a5a4
MA
2424#define IWL_DELAY_NEXT_SCAN (HZ*2)
2425
508e32e1 2426static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 2427{
b481de9c 2428 struct ieee80211_conf *conf = NULL;
857485c0 2429 int ret = 0;
0795af57 2430 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2431
2432 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2433 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
2434 return;
2435 }
2436
0795af57
JP
2437 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
2438 priv->assoc_id,
2439 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
2440
2441
2442 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2443 return;
2444
b481de9c 2445
508e32e1 2446 if (!priv->vif || !priv->is_open)
948c171c 2447 return;
508e32e1 2448
2a421b91 2449 iwl_scan_cancel_timeout(priv, 200);
052c4b9f 2450
b481de9c
ZY
2451 conf = ieee80211_get_hw_conf(priv->hw);
2452
2453 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2454 iwl4965_commit_rxon(priv);
b481de9c 2455
bb8c093b
CH
2456 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2457 iwl4965_setup_rxon_timing(priv);
857485c0 2458 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2459 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2460 if (ret)
b481de9c
ZY
2461 IWL_WARNING("REPLY_RXON_TIMING failed - "
2462 "Attempting to continue.\n");
2463
2464 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2465
fd105e79 2466 if (priv->current_ht_config.is_ht)
47c5196e 2467 iwl_set_rxon_ht(priv, &priv->current_ht_config);
4f85f5b3 2468
c7de35cd 2469 iwl_set_rxon_chain(priv);
b481de9c
ZY
2470 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2471
2472 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
2473 priv->assoc_id, priv->beacon_int);
2474
2475 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2476 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2477 else
2478 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2479
2480 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2481 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2482 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2483 else
2484 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2485
2486 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2487 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2488
2489 }
2490
bb8c093b 2491 iwl4965_commit_rxon(priv);
b481de9c
ZY
2492
2493 switch (priv->iw_mode) {
2494 case IEEE80211_IF_TYPE_STA:
b481de9c
ZY
2495 break;
2496
2497 case IEEE80211_IF_TYPE_IBSS:
2498
c46fbefa
AK
2499 /* assume default assoc id */
2500 priv->assoc_id = 1;
b481de9c 2501
4f40e4d9 2502 iwl_rxon_add_station(priv, priv->bssid, 0);
bb8c093b 2503 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2504
2505 break;
2506
2507 default:
2508 IWL_ERROR("%s Should not be called in %d mode\n",
2509 __FUNCTION__, priv->iw_mode);
2510 break;
2511 }
2512
b481de9c 2513 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 2514 iwl_chain_noise_reset(priv);
b481de9c 2515 priv->start_calib = 1;
b481de9c
ZY
2516
2517 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2518 priv->assoc_station_added = 1;
2519
bb8c093b 2520 iwl4965_activate_qos(priv, 0);
292ae174 2521
5da4b55f 2522 iwl_power_update_mode(priv, 0);
7878a5a4
MA
2523 /* we have just associated, don't start scan too early */
2524 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC
2525}
2526
2527
2528static void iwl4965_bg_post_associate(struct work_struct *data)
2529{
2530 struct iwl_priv *priv = container_of(data, struct iwl_priv,
2531 post_associate.work);
2532
2533 mutex_lock(&priv->mutex);
2534 iwl4965_post_associate(priv);
b481de9c 2535 mutex_unlock(&priv->mutex);
508e32e1 2536
b481de9c
ZY
2537}
2538
76bb77e0
ZY
2539static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
2540
2a421b91 2541static void iwl_bg_scan_completed(struct work_struct *work)
b481de9c 2542{
c79dd5b5
TW
2543 struct iwl_priv *priv =
2544 container_of(work, struct iwl_priv, scan_completed);
b481de9c 2545
630fe9b6 2546 IWL_DEBUG_SCAN("SCAN complete scan\n");
b481de9c
ZY
2547
2548 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2549 return;
2550
a0646470
ZY
2551 if (test_bit(STATUS_CONF_PENDING, &priv->status))
2552 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 2553
b481de9c
ZY
2554 ieee80211_scan_completed(priv->hw);
2555
2556 /* Since setting the TXPOWER may have been deferred while
2557 * performing the scan, fire one off */
2558 mutex_lock(&priv->mutex);
630fe9b6 2559 iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
b481de9c
ZY
2560 mutex_unlock(&priv->mutex);
2561}
2562
2563/*****************************************************************************
2564 *
2565 * mac80211 entry point functions
2566 *
2567 *****************************************************************************/
2568
154b25ce 2569#define UCODE_READY_TIMEOUT (4 * HZ)
5a66926a 2570
bb8c093b 2571static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 2572{
c79dd5b5 2573 struct iwl_priv *priv = hw->priv;
5a66926a 2574 int ret;
b481de9c
ZY
2575
2576 IWL_DEBUG_MAC80211("enter\n");
2577
5a66926a
ZY
2578 if (pci_enable_device(priv->pci_dev)) {
2579 IWL_ERROR("Fail to pci_enable_device\n");
2580 return -ENODEV;
2581 }
2582 pci_restore_state(priv->pci_dev);
2583 pci_enable_msi(priv->pci_dev);
2584
2585 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
2586 DRV_NAME, priv);
2587 if (ret) {
2588 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
2589 goto out_disable_msi;
2590 }
2591
b481de9c
ZY
2592 /* we should be verifying the device is ready to be opened */
2593 mutex_lock(&priv->mutex);
2594
c1adf9fb 2595 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
5a66926a
ZY
2596 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2597 * ucode filename and max sizes are card-specific. */
b481de9c 2598
5a66926a
ZY
2599 if (!priv->ucode_code.len) {
2600 ret = iwl4965_read_ucode(priv);
2601 if (ret) {
2602 IWL_ERROR("Could not read microcode: %d\n", ret);
2603 mutex_unlock(&priv->mutex);
2604 goto out_release_irq;
2605 }
2606 }
b481de9c 2607
e655b9f0 2608 ret = __iwl4965_up(priv);
5a66926a 2609
b481de9c 2610 mutex_unlock(&priv->mutex);
5a66926a 2611
e655b9f0
ZY
2612 if (ret)
2613 goto out_release_irq;
2614
2615 IWL_DEBUG_INFO("Start UP work done.\n");
2616
2617 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
2618 return 0;
2619
fe9b6b72 2620 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5a66926a 2621 * mac80211 will not be run successfully. */
154b25ce
EG
2622 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2623 test_bit(STATUS_READY, &priv->status),
2624 UCODE_READY_TIMEOUT);
2625 if (!ret) {
2626 if (!test_bit(STATUS_READY, &priv->status)) {
2627 IWL_ERROR("START_ALIVE timeout after %dms.\n",
2628 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2629 ret = -ETIMEDOUT;
2630 goto out_release_irq;
5a66926a 2631 }
5a66926a 2632
fe9b6b72
RR
2633 priv->is_open = 1;
2634 }
b481de9c
ZY
2635 IWL_DEBUG_MAC80211("leave\n");
2636 return 0;
5a66926a
ZY
2637
2638out_release_irq:
2639 free_irq(priv->pci_dev->irq, priv);
2640out_disable_msi:
2641 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY
2642 pci_disable_device(priv->pci_dev);
2643 priv->is_open = 0;
2644 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 2645 return ret;
b481de9c
ZY
2646}
2647
bb8c093b 2648static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 2649{
c79dd5b5 2650 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2651
2652 IWL_DEBUG_MAC80211("enter\n");
948c171c 2653
e655b9f0
ZY
2654 if (!priv->is_open) {
2655 IWL_DEBUG_MAC80211("leave - skip\n");
2656 return;
2657 }
2658
b481de9c 2659 priv->is_open = 0;
5a66926a 2660
fee1247a 2661 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY
2662 /* stop mac, cancel any scan request and clear
2663 * RXON_FILTER_ASSOC_MSK BIT
2664 */
5a66926a 2665 mutex_lock(&priv->mutex);
2a421b91 2666 iwl_scan_cancel_timeout(priv, 100);
5a66926a 2667 cancel_delayed_work(&priv->post_associate);
fde3571f 2668 mutex_unlock(&priv->mutex);
fde3571f
MA
2669 }
2670
5a66926a
ZY
2671 iwl4965_down(priv);
2672
2673 flush_workqueue(priv->workqueue);
2674 free_irq(priv->pci_dev->irq, priv);
2675 pci_disable_msi(priv->pci_dev);
2676 pci_save_state(priv->pci_dev);
2677 pci_disable_device(priv->pci_dev);
948c171c 2678
b481de9c 2679 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2680}
2681
e039fa4a 2682static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 2683{
c79dd5b5 2684 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
2685
2686 IWL_DEBUG_MAC80211("enter\n");
2687
2688 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2689 IWL_DEBUG_MAC80211("leave - monitor\n");
2690 return -1;
2691 }
2692
2693 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
e039fa4a 2694 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
b481de9c 2695
e039fa4a 2696 if (iwl_tx_skb(priv, skb))
b481de9c
ZY
2697 dev_kfree_skb_any(skb);
2698
2699 IWL_DEBUG_MAC80211("leave\n");
2700 return 0;
2701}
2702
bb8c093b 2703static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
2704 struct ieee80211_if_init_conf *conf)
2705{
c79dd5b5 2706 struct iwl_priv *priv = hw->priv;
b481de9c 2707 unsigned long flags;
0795af57 2708 DECLARE_MAC_BUF(mac);
b481de9c 2709
32bfd35d 2710 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 2711
32bfd35d
JB
2712 if (priv->vif) {
2713 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 2714 return -EOPNOTSUPP;
b481de9c
ZY
2715 }
2716
2717 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 2718 priv->vif = conf->vif;
b481de9c
ZY
2719
2720 spin_unlock_irqrestore(&priv->lock, flags);
2721
2722 mutex_lock(&priv->mutex);
864792e3
TW
2723
2724 if (conf->mac_addr) {
2725 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
2726 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2727 }
b481de9c 2728
c46fbefa
AK
2729 if (iwl4965_set_mode(priv, conf->type) == -EAGAIN)
2730 /* we are not ready, will run again when ready */
2731 set_bit(STATUS_MODE_PENDING, &priv->status);
5a66926a 2732
b481de9c
ZY
2733 mutex_unlock(&priv->mutex);
2734
5a66926a 2735 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
2736 return 0;
2737}
2738
2739/**
bb8c093b 2740 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
2741 *
2742 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2743 * be set inappropriately and the driver currently sets the hardware up to
2744 * use it whenever needed.
2745 */
bb8c093b 2746static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 2747{
c79dd5b5 2748 struct iwl_priv *priv = hw->priv;
bf85ea4f 2749 const struct iwl_channel_info *ch_info;
b481de9c 2750 unsigned long flags;
76bb77e0 2751 int ret = 0;
82a66bbb 2752 u16 channel;
b481de9c
ZY
2753
2754 mutex_lock(&priv->mutex);
8318d78a 2755 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 2756
12342c47
ZY
2757 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2758
14a08a7f 2759 if (conf->radio_enabled && iwl_radio_kill_sw_enable_radio(priv)) {
64e72c3e 2760 IWL_DEBUG_MAC80211("leave - RF-KILL - waiting for uCode\n");
14a08a7f 2761 goto out;
64e72c3e
MA
2762 }
2763
14a08a7f
EG
2764 if (!conf->radio_enabled)
2765 iwl_radio_kill_sw_disable_radio(priv);
2766
fee1247a 2767 if (!iwl_is_ready(priv)) {
b481de9c 2768 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY
2769 ret = -EIO;
2770 goto out;
b481de9c
ZY
2771 }
2772
1ea87396 2773 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 2774 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY
2775 IWL_DEBUG_MAC80211("leave - scanning\n");
2776 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 2777 mutex_unlock(&priv->mutex);
a0646470 2778 return 0;
b481de9c
ZY
2779 }
2780
82a66bbb
TW
2781 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
2782 ch_info = iwl_get_channel_info(priv, conf->channel->band, channel);
b481de9c 2783 if (!is_channel_valid(ch_info)) {
b481de9c 2784 IWL_DEBUG_MAC80211("leave - invalid channel\n");
76bb77e0
ZY
2785 ret = -EINVAL;
2786 goto out;
b481de9c
ZY
2787 }
2788
398f9e76
AK
2789 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
2790 !is_channel_ibss(ch_info)) {
2791 IWL_ERROR("channel %d in band %d not IBSS channel\n",
2792 conf->channel->hw_value, conf->channel->band);
2793 ret = -EINVAL;
2794 goto out;
2795 }
2796
82a66bbb
TW
2797 spin_lock_irqsave(&priv->lock, flags);
2798
78330fdd 2799 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY
2800 * from any ht related info since 2.4 does not
2801 * support ht */
82a66bbb 2802 if ((le16_to_cpu(priv->staging_rxon.channel) != channel)
b481de9c
ZY
2803#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2804 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
2805#endif
2806 )
2807 priv->staging_rxon.flags = 0;
b481de9c 2808
82a66bbb 2809 iwl_set_rxon_channel(priv, conf->channel->band, channel);
b481de9c 2810
82a66bbb 2811 iwl_set_flags_for_band(priv, conf->channel->band);
b481de9c
ZY
2812
2813 /* The list of supported rates and rate mask can be different
8318d78a 2814 * for each band; since the band may have changed, reset
b481de9c 2815 * the rate mask to what mac80211 lists */
bb8c093b 2816 iwl4965_set_rate(priv);
b481de9c
ZY
2817
2818 spin_unlock_irqrestore(&priv->lock, flags);
2819
2820#ifdef IEEE80211_CONF_CHANNEL_SWITCH
2821 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 2822 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 2823 goto out;
b481de9c
ZY
2824 }
2825#endif
2826
b481de9c
ZY
2827 if (!conf->radio_enabled) {
2828 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 2829 goto out;
b481de9c
ZY
2830 }
2831
fee1247a 2832 if (iwl_is_rfkill(priv)) {
b481de9c 2833 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY
2834 ret = -EIO;
2835 goto out;
b481de9c
ZY
2836 }
2837
630fe9b6
TW
2838 IWL_DEBUG_MAC80211("TX Power old=%d new=%d\n",
2839 priv->tx_power_user_lmt, conf->power_level);
2840
2841 iwl_set_tx_power(priv, conf->power_level, false);
2842
bb8c093b 2843 iwl4965_set_rate(priv);
b481de9c
ZY
2844
2845 if (memcmp(&priv->active_rxon,
2846 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 2847 iwl4965_commit_rxon(priv);
b481de9c
ZY
2848 else
2849 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
2850
2851 IWL_DEBUG_MAC80211("leave\n");
2852
a0646470
ZY
2853out:
2854 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 2855 mutex_unlock(&priv->mutex);
76bb77e0 2856 return ret;
b481de9c
ZY
2857}
2858
c79dd5b5 2859static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 2860{
857485c0 2861 int ret = 0;
b481de9c 2862
d986bcd1 2863 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY
2864 return;
2865
2866 /* The following should be done only at AP bring up */
5d1e2325 2867 if (!(iwl_is_associated(priv))) {
b481de9c
ZY
2868
2869 /* RXON - unassoc (to set timing command) */
2870 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 2871 iwl4965_commit_rxon(priv);
b481de9c
ZY
2872
2873 /* RXON Timing */
bb8c093b
CH
2874 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
2875 iwl4965_setup_rxon_timing(priv);
857485c0 2876 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 2877 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 2878 if (ret)
b481de9c
ZY
2879 IWL_WARNING("REPLY_RXON_TIMING failed - "
2880 "Attempting to continue.\n");
2881
c7de35cd 2882 iwl_set_rxon_chain(priv);
b481de9c
ZY
2883
2884 /* FIXME: what should be the assoc_id for AP? */
2885 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2886 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2887 priv->staging_rxon.flags |=
2888 RXON_FLG_SHORT_PREAMBLE_MSK;
2889 else
2890 priv->staging_rxon.flags &=
2891 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2892
2893 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2894 if (priv->assoc_capability &
2895 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2896 priv->staging_rxon.flags |=
2897 RXON_FLG_SHORT_SLOT_MSK;
2898 else
2899 priv->staging_rxon.flags &=
2900 ~RXON_FLG_SHORT_SLOT_MSK;
2901
2902 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2903 priv->staging_rxon.flags &=
2904 ~RXON_FLG_SHORT_SLOT_MSK;
2905 }
2906 /* restore RXON assoc */
2907 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 2908 iwl4965_commit_rxon(priv);
bb8c093b 2909 iwl4965_activate_qos(priv, 1);
4f40e4d9 2910 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
e1493deb 2911 }
bb8c093b 2912 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
2913
2914 /* FIXME - we need to add code here to detect a totally new
2915 * configuration, reset the AP, unassoc, rxon timing, assoc,
2916 * clear sta table, add BCAST sta... */
2917}
2918
32bfd35d
JB
2919static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
2920 struct ieee80211_vif *vif,
b481de9c
ZY
2921 struct ieee80211_if_conf *conf)
2922{
c79dd5b5 2923 struct iwl_priv *priv = hw->priv;
0795af57 2924 DECLARE_MAC_BUF(mac);
b481de9c
ZY
2925 unsigned long flags;
2926 int rc;
2927
2928 if (conf == NULL)
2929 return -EIO;
2930
b716bb91
EG
2931 if (priv->vif != vif) {
2932 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG
2933 return 0;
2934 }
2935
b481de9c
ZY
2936 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
2937 (!conf->beacon || !conf->ssid_len)) {
2938 IWL_DEBUG_MAC80211
2939 ("Leaving in AP mode because HostAPD is not ready.\n");
2940 return 0;
2941 }
2942
fee1247a 2943 if (!iwl_is_alive(priv))
5a66926a
ZY
2944 return -EAGAIN;
2945
b481de9c
ZY
2946 mutex_lock(&priv->mutex);
2947
b481de9c 2948 if (conf->bssid)
0795af57
JP
2949 IWL_DEBUG_MAC80211("bssid: %s\n",
2950 print_mac(mac, conf->bssid));
b481de9c 2951
4150c572
JB
2952/*
2953 * very dubious code was here; the probe filtering flag is never set:
2954 *
b481de9c
ZY
2955 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
2956 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 2957 */
b481de9c
ZY
2958
2959 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2960 if (!conf->bssid) {
2961 conf->bssid = priv->mac_addr;
2962 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
2963 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
2964 print_mac(mac, conf->bssid));
b481de9c
ZY
2965 }
2966 if (priv->ibss_beacon)
2967 dev_kfree_skb(priv->ibss_beacon);
2968
2969 priv->ibss_beacon = conf->beacon;
2970 }
2971
fee1247a 2972 if (iwl_is_rfkill(priv))
fde3571f
MA
2973 goto done;
2974
b481de9c
ZY
2975 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
2976 !is_multicast_ether_addr(conf->bssid)) {
2977 /* If there is currently a HW scan going on in the background
2978 * then we need to cancel it else the RXON below will fail. */
2a421b91 2979 if (iwl_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
2980 IWL_WARNING("Aborted scan still in progress "
2981 "after 100ms\n");
2982 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2983 mutex_unlock(&priv->mutex);
2984 return -EAGAIN;
2985 }
2986 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
2987
2988 /* TODO: Audit driver for usage of these members and see
2989 * if mac80211 deprecates them (priv->bssid looks like it
2990 * shouldn't be there, but I haven't scanned the IBSS code
2991 * to verify) - jpk */
2992 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
2993
2994 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 2995 iwl4965_config_ap(priv);
b481de9c 2996 else {
bb8c093b 2997 rc = iwl4965_commit_rxon(priv);
b481de9c 2998 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
4f40e4d9 2999 iwl_rxon_add_station(
b481de9c
ZY
3000 priv, priv->active_rxon.bssid_addr, 1);
3001 }
3002
3003 } else {
2a421b91 3004 iwl_scan_cancel_timeout(priv, 100);
b481de9c 3005 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3006 iwl4965_commit_rxon(priv);
b481de9c
ZY
3007 }
3008
fde3571f 3009 done:
b481de9c
ZY
3010 spin_lock_irqsave(&priv->lock, flags);
3011 if (!conf->ssid_len)
3012 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3013 else
3014 memcpy(priv->essid, conf->ssid, conf->ssid_len);
3015
3016 priv->essid_len = conf->ssid_len;
3017 spin_unlock_irqrestore(&priv->lock, flags);
3018
3019 IWL_DEBUG_MAC80211("leave\n");
3020 mutex_unlock(&priv->mutex);
3021
3022 return 0;
3023}
3024
bb8c093b 3025static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
3026 unsigned int changed_flags,
3027 unsigned int *total_flags,
3028 int mc_count, struct dev_addr_list *mc_list)
3029{
3030 /*
3031 * XXX: dummy
bb8c093b 3032 * see also iwl4965_connection_init_rx_config
4150c572 3033 */
4419e39b
AK
3034 struct iwl_priv *priv = hw->priv;
3035 int new_flags = 0;
3036 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
3037 if (*total_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
3038 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
3039 IEEE80211_IF_TYPE_MNTR,
3040 changed_flags, *total_flags);
3041 /* queue work 'cuz mac80211 is holding a lock which
3042 * prevents us from issuing (synchronous) f/w cmds */
3043 queue_work(priv->workqueue, &priv->set_monitor);
3044 new_flags &= FIF_PROMISC_IN_BSS |
3045 FIF_OTHER_BSS |
3046 FIF_ALLMULTI;
3047 }
3048 }
3049 *total_flags = new_flags;
4150c572
JB
3050}
3051
bb8c093b 3052static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
3053 struct ieee80211_if_init_conf *conf)
3054{
c79dd5b5 3055 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3056
3057 IWL_DEBUG_MAC80211("enter\n");
3058
3059 mutex_lock(&priv->mutex);
948c171c 3060
fee1247a 3061 if (iwl_is_ready_rf(priv)) {
2a421b91 3062 iwl_scan_cancel_timeout(priv, 100);
fde3571f
MA
3063 cancel_delayed_work(&priv->post_associate);
3064 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3065 iwl4965_commit_rxon(priv);
3066 }
32bfd35d
JB
3067 if (priv->vif == conf->vif) {
3068 priv->vif = NULL;
b481de9c
ZY
3069 memset(priv->bssid, 0, ETH_ALEN);
3070 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
3071 priv->essid_len = 0;
3072 }
3073 mutex_unlock(&priv->mutex);
3074
3075 IWL_DEBUG_MAC80211("leave\n");
3076
3077}
471b3efd 3078
3109ece1 3079#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB
3080static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
3081 struct ieee80211_vif *vif,
3082 struct ieee80211_bss_conf *bss_conf,
3083 u32 changes)
220173b0 3084{
c79dd5b5 3085 struct iwl_priv *priv = hw->priv;
220173b0 3086
3109ece1
TW
3087 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
3088
471b3efd 3089 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW
3090 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
3091 bss_conf->use_short_preamble);
471b3efd 3092 if (bss_conf->use_short_preamble)
220173b0
TW
3093 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3094 else
3095 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3096 }
3097
471b3efd 3098 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 3099 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 3100 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW
3101 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
3102 else
3103 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
3104 }
3105
98952d5d 3106 if (changes & BSS_CHANGED_HT) {
3109ece1 3107 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 3108 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 3109 iwl_set_rxon_chain(priv);
98952d5d
TW
3110 }
3111
471b3efd 3112 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 3113 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC
3114 /* This should never happen as this function should
3115 * never be called from interrupt context. */
3116 if (WARN_ON_ONCE(in_interrupt()))
3117 return;
3109ece1
TW
3118 if (bss_conf->assoc) {
3119 priv->assoc_id = bss_conf->aid;
3120 priv->beacon_int = bss_conf->beacon_int;
3121 priv->timestamp = bss_conf->timestamp;
3122 priv->assoc_capability = bss_conf->assoc_capability;
3123 priv->next_scan_jiffies = jiffies +
3124 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC
3125 mutex_lock(&priv->mutex);
3126 iwl4965_post_associate(priv);
3127 mutex_unlock(&priv->mutex);
3109ece1
TW
3128 } else {
3129 priv->assoc_id = 0;
3130 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
3131 }
3132 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
3133 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 3134 iwl_send_rxon_assoc(priv);
471b3efd
JB
3135 }
3136
220173b0 3137}
b481de9c 3138
bb8c093b 3139static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
3140{
3141 int rc = 0;
3142 unsigned long flags;
c79dd5b5 3143 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3144
3145 IWL_DEBUG_MAC80211("enter\n");
3146
052c4b9f 3147 mutex_lock(&priv->mutex);
b481de9c
ZY
3148 spin_lock_irqsave(&priv->lock, flags);
3149
fee1247a 3150 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3151 rc = -EIO;
3152 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
3153 goto out_unlock;
3154 }
3155
3156 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
3157 rc = -EIO;
3158 IWL_ERROR("ERROR: APs don't scan\n");
3159 goto out_unlock;
3160 }
3161
7878a5a4
MA
3162 /* we don't schedule scan within next_scan_jiffies period */
3163 if (priv->next_scan_jiffies &&
3164 time_after(priv->next_scan_jiffies, jiffies)) {
3165 rc = -EAGAIN;
3166 goto out_unlock;
3167 }
b481de9c 3168 /* if we just finished scan ask for delay */
7878a5a4
MA
3169 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
3170 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY
3171 rc = -EAGAIN;
3172 goto out_unlock;
3173 }
3174 if (len) {
7878a5a4 3175 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
2a421b91 3176 iwl_escape_essid(ssid, len), (int)len);
b481de9c
ZY
3177
3178 priv->one_direct_scan = 1;
3179 priv->direct_ssid_len = (u8)
3180 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
3181 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
3182 } else
3183 priv->one_direct_scan = 0;
b481de9c 3184
2a421b91 3185 rc = iwl_scan_initiate(priv);
b481de9c
ZY
3186
3187 IWL_DEBUG_MAC80211("leave\n");
3188
3189out_unlock:
3190 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 3191 mutex_unlock(&priv->mutex);
b481de9c
ZY
3192
3193 return rc;
3194}
3195
ab885f8c
EG
3196static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
3197 struct ieee80211_key_conf *keyconf, const u8 *addr,
3198 u32 iv32, u16 *phase1key)
3199{
3200 struct iwl_priv *priv = hw->priv;
3201 u8 sta_id = IWL_INVALID_STATION;
3202 unsigned long flags;
3203 __le16 key_flags = 0;
3204 int i;
3205 DECLARE_MAC_BUF(mac);
3206
3207 IWL_DEBUG_MAC80211("enter\n");
3208
947b13a7 3209 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG
3210 if (sta_id == IWL_INVALID_STATION) {
3211 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3212 print_mac(mac, addr));
3213 return;
3214 }
3215
2a421b91 3216 iwl_scan_cancel_timeout(priv, 100);
ab885f8c
EG
3217
3218 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3219 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3220 key_flags &= ~STA_KEY_FLG_INVALID;
3221
5425e490 3222 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG
3223 key_flags |= STA_KEY_MULTICAST_MSK;
3224
3225 spin_lock_irqsave(&priv->sta_lock, flags);
3226
ab885f8c
EG
3227 priv->stations[sta_id].sta.key.key_flags = key_flags;
3228 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3229
3230 for (i = 0; i < 5; i++)
3231 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3232 cpu_to_le16(phase1key[i]);
3233
3234 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3235 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3236
133636de 3237 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
ab885f8c
EG
3238
3239 spin_unlock_irqrestore(&priv->sta_lock, flags);
3240
3241 IWL_DEBUG_MAC80211("leave\n");
3242}
3243
bb8c093b 3244static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
3245 const u8 *local_addr, const u8 *addr,
3246 struct ieee80211_key_conf *key)
3247{
c79dd5b5 3248 struct iwl_priv *priv = hw->priv;
0795af57 3249 DECLARE_MAC_BUF(mac);
deb09c43
EG
3250 int ret = 0;
3251 u8 sta_id = IWL_INVALID_STATION;
6974e363 3252 u8 is_default_wep_key = 0;
b481de9c
ZY
3253
3254 IWL_DEBUG_MAC80211("enter\n");
3255
099b40b7 3256 if (priv->hw_params.sw_crypto) {
b481de9c
ZY
3257 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
3258 return -EOPNOTSUPP;
3259 }
3260
3261 if (is_zero_ether_addr(addr))
3262 /* only support pairwise keys */
3263 return -EOPNOTSUPP;
3264
947b13a7 3265 sta_id = iwl_find_station(priv, addr);
6974e363
EG
3266 if (sta_id == IWL_INVALID_STATION) {
3267 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
3268 print_mac(mac, addr));
3269 return -EINVAL;
b481de9c 3270
deb09c43 3271 }
b481de9c 3272
6974e363 3273 mutex_lock(&priv->mutex);
2a421b91 3274 iwl_scan_cancel_timeout(priv, 100);
6974e363
EG
3275 mutex_unlock(&priv->mutex);
3276
3277 /* If we are getting WEP group key and we didn't receive any key mapping
3278 * so far, we are in legacy wep mode (group key only), otherwise we are
3279 * in 1X mode.
3280 * In legacy wep mode, we use another host command to the uCode */
5425e490 3281 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG
3282 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3283 if (cmd == SET_KEY)
3284 is_default_wep_key = !priv->key_mapping_key;
3285 else
ccc038ab
EG
3286 is_default_wep_key =
3287 (key->hw_key_idx == HW_KEY_DEFAULT);
6974e363 3288 }
052c4b9f 3289
b481de9c 3290 switch (cmd) {
deb09c43 3291 case SET_KEY:
6974e363
EG
3292 if (is_default_wep_key)
3293 ret = iwl_set_default_wep_key(priv, key);
deb09c43 3294 else
7480513f 3295 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG
3296
3297 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY
3298 break;
3299 case DISABLE_KEY:
6974e363
EG
3300 if (is_default_wep_key)
3301 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 3302 else
3ec47732 3303 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG
3304
3305 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY
3306 break;
3307 default:
deb09c43 3308 ret = -EINVAL;
b481de9c
ZY
3309 }
3310
3311 IWL_DEBUG_MAC80211("leave\n");
b481de9c 3312
deb09c43 3313 return ret;
b481de9c
ZY
3314}
3315
e100bb64 3316static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
b481de9c
ZY
3317 const struct ieee80211_tx_queue_params *params)
3318{
c79dd5b5 3319 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3320 unsigned long flags;
3321 int q;
b481de9c
ZY
3322
3323 IWL_DEBUG_MAC80211("enter\n");
3324
fee1247a 3325 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3326 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3327 return -EIO;
3328 }
3329
3330 if (queue >= AC_NUM) {
3331 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
3332 return 0;
3333 }
3334
b481de9c
ZY
3335 if (!priv->qos_data.qos_enable) {
3336 priv->qos_data.qos_active = 0;
3337 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
3338 return 0;
3339 }
3340 q = AC_NUM - 1 - queue;
3341
3342 spin_lock_irqsave(&priv->lock, flags);
3343
3344 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
3345 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
3346 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
3347 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 3348 cpu_to_le16((params->txop * 32));
b481de9c
ZY
3349
3350 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
3351 priv->qos_data.qos_active = 1;
3352
3353 spin_unlock_irqrestore(&priv->lock, flags);
3354
3355 mutex_lock(&priv->mutex);
3356 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 3357 iwl4965_activate_qos(priv, 1);
3109ece1 3358 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 3359 iwl4965_activate_qos(priv, 0);
b481de9c
ZY
3360
3361 mutex_unlock(&priv->mutex);
3362
b481de9c
ZY
3363 IWL_DEBUG_MAC80211("leave\n");
3364 return 0;
3365}
3366
bb8c093b 3367static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3368 struct ieee80211_tx_queue_stats *stats)
3369{
c79dd5b5 3370 struct iwl_priv *priv = hw->priv;
b481de9c 3371 int i, avail;
16466903 3372 struct iwl_tx_queue *txq;
443cfd45 3373 struct iwl_queue *q;
b481de9c
ZY
3374 unsigned long flags;
3375
3376 IWL_DEBUG_MAC80211("enter\n");
3377
fee1247a 3378 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3379 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3380 return -EIO;
3381 }
3382
3383 spin_lock_irqsave(&priv->lock, flags);
3384
3385 for (i = 0; i < AC_NUM; i++) {
3386 txq = &priv->txq[i];
3387 q = &txq->q;
443cfd45 3388 avail = iwl_queue_space(q);
b481de9c 3389
57ffc589
JB
3390 stats[i].len = q->n_window - avail;
3391 stats[i].limit = q->n_window - q->high_mark;
3392 stats[i].count = q->n_window;
b481de9c
ZY
3393
3394 }
3395 spin_unlock_irqrestore(&priv->lock, flags);
3396
3397 IWL_DEBUG_MAC80211("leave\n");
3398
3399 return 0;
3400}
3401
bb8c093b 3402static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
3403 struct ieee80211_low_level_stats *stats)
3404{
bf403db8
EK
3405 struct iwl_priv *priv = hw->priv;
3406
3407 priv = hw->priv;
b481de9c
ZY
3408 IWL_DEBUG_MAC80211("enter\n");
3409 IWL_DEBUG_MAC80211("leave\n");
3410
3411 return 0;
3412}
3413
bb8c093b 3414static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 3415{
c79dd5b5 3416 struct iwl_priv *priv = hw->priv;
b481de9c
ZY
3417 unsigned long flags;
3418
3419 mutex_lock(&priv->mutex);
3420 IWL_DEBUG_MAC80211("enter\n");
3421
b481de9c 3422 spin_lock_irqsave(&priv->lock, flags);
fd105e79 3423 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 3424 spin_unlock_irqrestore(&priv->lock, flags);
b481de9c 3425
c7de35cd 3426 iwl_reset_qos(priv);
b481de9c
ZY
3427
3428 cancel_delayed_work(&priv->post_associate);
3429
3430 spin_lock_irqsave(&priv->lock, flags);
3431 priv->assoc_id = 0;
3432 priv->assoc_capability = 0;
b481de9c
ZY
3433 priv->assoc_station_added = 0;
3434
3435 /* new association get rid of ibss beacon skb */
3436 if (priv->ibss_beacon)
3437 dev_kfree_skb(priv->ibss_beacon);
3438
3439 priv->ibss_beacon = NULL;
3440
3441 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 3442 priv->timestamp = 0;
b481de9c
ZY
3443 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
3444 priv->beacon_int = 0;
3445
3446 spin_unlock_irqrestore(&priv->lock, flags);
3447
fee1247a 3448 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA
3449 IWL_DEBUG_MAC80211("leave - not ready\n");
3450 mutex_unlock(&priv->mutex);
3451 return;
3452 }
3453
052c4b9f 3454 /* we are restarting association process
3455 * clear RXON_FILTER_ASSOC_MSK bit
3456 */
3457 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2a421b91 3458 iwl_scan_cancel_timeout(priv, 100);
052c4b9f 3459 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 3460 iwl4965_commit_rxon(priv);
052c4b9f 3461 }
3462
5da4b55f
MA
3463 iwl_power_update_mode(priv, 0);
3464
b481de9c
ZY
3465 /* Per mac80211.h: This is only used in IBSS mode... */
3466 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 3467
b481de9c
ZY
3468 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
3469 mutex_unlock(&priv->mutex);
3470 return;
3471 }
3472
bb8c093b 3473 iwl4965_set_rate(priv);
b481de9c
ZY
3474
3475 mutex_unlock(&priv->mutex);
3476
3477 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
3478}
3479
e039fa4a 3480static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
b481de9c 3481{
c79dd5b5 3482 struct iwl_priv *priv = hw->priv;
b481de9c 3483 unsigned long flags;
2ff75b78 3484 __le64 timestamp;
b481de9c
ZY
3485
3486 mutex_lock(&priv->mutex);
3487 IWL_DEBUG_MAC80211("enter\n");
3488
fee1247a 3489 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY
3490 IWL_DEBUG_MAC80211("leave - RF not ready\n");
3491 mutex_unlock(&priv->mutex);
3492 return -EIO;
3493 }
3494
3495 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
3496 IWL_DEBUG_MAC80211("leave - not IBSS\n");
3497 mutex_unlock(&priv->mutex);
3498 return -EIO;
3499 }
3500
3501 spin_lock_irqsave(&priv->lock, flags);
3502
3503 if (priv->ibss_beacon)
3504 dev_kfree_skb(priv->ibss_beacon);
3505
3506 priv->ibss_beacon = skb;
3507
3508 priv->assoc_id = 0;
2ff75b78
AK
3509 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
3510 priv->timestamp = le64_to_cpu(timestamp) + (priv->beacon_int * 1000);
b481de9c
ZY
3511
3512 IWL_DEBUG_MAC80211("leave\n");
3513 spin_unlock_irqrestore(&priv->lock, flags);
3514
c7de35cd 3515 iwl_reset_qos(priv);
b481de9c 3516
c46fbefa 3517 iwl4965_post_associate(priv);
b481de9c
ZY
3518
3519 mutex_unlock(&priv->mutex);
3520
3521 return 0;
3522}
3523
b481de9c
ZY
3524/*****************************************************************************
3525 *
3526 * sysfs attributes
3527 *
3528 *****************************************************************************/
3529
0a6857e7 3530#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY
3531
3532/*
3533 * The following adds a new attribute to the sysfs representation
3534 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3535 * used for controlling the debug level.
3536 *
3537 * See the level definitions in iwl for details.
3538 */
3539
8cf769c6
EK
3540static ssize_t show_debug_level(struct device *d,
3541 struct device_attribute *attr, char *buf)
b481de9c 3542{
8cf769c6
EK
3543 struct iwl_priv *priv = d->driver_data;
3544
3545 return sprintf(buf, "0x%08X\n", priv->debug_level);
b481de9c 3546}
8cf769c6
EK
3547static ssize_t store_debug_level(struct device *d,
3548 struct device_attribute *attr,
b481de9c
ZY
3549 const char *buf, size_t count)
3550{
8cf769c6 3551 struct iwl_priv *priv = d->driver_data;
b481de9c
ZY
3552 char *p = (char *)buf;
3553 u32 val;
3554
3555 val = simple_strtoul(p, &p, 0);
3556 if (p == buf)
3557 printk(KERN_INFO DRV_NAME
3558 ": %s is not in hex or decimal form.\n", buf);
3559 else
8cf769c6 3560 priv->debug_level = val;
b481de9c
ZY
3561
3562 return strnlen(buf, count);
3563}
3564
8cf769c6
EK
3565static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3566 show_debug_level, store_debug_level);
3567
b481de9c 3568
0a6857e7 3569#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 3570
b481de9c 3571
bc6f59bc
TW
3572static ssize_t show_version(struct device *d,
3573 struct device_attribute *attr, char *buf)
3574{
3575 struct iwl_priv *priv = d->driver_data;
885ba202 3576 struct iwl_alive_resp *palive = &priv->card_alive;
f236a265
TW
3577 ssize_t pos = 0;
3578 u16 eeprom_ver;
bc6f59bc
TW
3579
3580 if (palive->is_valid)
f236a265
TW
3581 pos += sprintf(buf + pos,
3582 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
3583 "fw type: 0x%01X 0x%01X\n",
bc6f59bc
TW
3584 palive->ucode_major, palive->ucode_minor,
3585 palive->sw_rev[0], palive->sw_rev[1],
3586 palive->ver_type, palive->ver_subtype);
bc6f59bc 3587 else
f236a265
TW
3588 pos += sprintf(buf + pos, "fw not loaded\n");
3589
3590 if (priv->eeprom) {
3591 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
3592 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
3593 eeprom_ver);
3594 } else {
3595 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
3596 }
3597
3598 return pos;
bc6f59bc
TW
3599}
3600
3601static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
3602
b481de9c
ZY
3603static ssize_t show_temperature(struct device *d,
3604 struct device_attribute *attr, char *buf)
3605{
c79dd5b5 3606 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 3607
fee1247a 3608 if (!iwl_is_alive(priv))
b481de9c
ZY
3609 return -EAGAIN;
3610
91dbc5bd 3611 return sprintf(buf, "%d\n", priv->temperature);
b481de9c
ZY
3612}
3613
3614static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3615
3616static ssize_t show_rs_window(struct device *d,
3617 struct device_attribute *attr,
3618 char *buf)
3619{
c79dd5b5 3620 struct iwl_priv *priv = d->driver_data;
bb8c093b 3621 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY
3622}
3623static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
3624
3625static ssize_t show_tx_power(struct device *d,
3626 struct device_attribute *attr, char *buf)
3627{
c79dd5b5 3628 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
630fe9b6 3629 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
b481de9c
ZY
3630}
3631
3632static ssize_t store_tx_power(struct device *d,
3633 struct device_attribute *attr,
3634 const char *buf, size_t count)
3635{
c79dd5b5 3636 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3637 char *p = (char *)buf;
3638 u32 val;
3639
3640 val = simple_strtoul(p, &p, 10);
3641 if (p == buf)
3642 printk(KERN_INFO DRV_NAME
3643 ": %s is not in decimal form.\n", buf);
3644 else
630fe9b6 3645 iwl_set_tx_power(priv, val, false);
b481de9c
ZY
3646
3647 return count;
3648}
3649
3650static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3651
3652static ssize_t show_flags(struct device *d,
3653 struct device_attribute *attr, char *buf)
3654{
c79dd5b5 3655 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3656
3657 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3658}
3659
3660static ssize_t store_flags(struct device *d,
3661 struct device_attribute *attr,
3662 const char *buf, size_t count)
3663{
c79dd5b5 3664 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3665 u32 flags = simple_strtoul(buf, NULL, 0);
3666
3667 mutex_lock(&priv->mutex);
3668 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3669 /* Cancel any currently running scans... */
2a421b91 3670 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3671 IWL_WARNING("Could not cancel scan.\n");
3672 else {
3673 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
3674 flags);
3675 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 3676 iwl4965_commit_rxon(priv);
b481de9c
ZY
3677 }
3678 }
3679 mutex_unlock(&priv->mutex);
3680
3681 return count;
3682}
3683
3684static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3685
3686static ssize_t show_filter_flags(struct device *d,
3687 struct device_attribute *attr, char *buf)
3688{
c79dd5b5 3689 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3690
3691 return sprintf(buf, "0x%04X\n",
3692 le32_to_cpu(priv->active_rxon.filter_flags));
3693}
3694
3695static ssize_t store_filter_flags(struct device *d,
3696 struct device_attribute *attr,
3697 const char *buf, size_t count)
3698{
c79dd5b5 3699 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY
3700 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3701
3702 mutex_lock(&priv->mutex);
3703 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3704 /* Cancel any currently running scans... */
2a421b91 3705 if (iwl_scan_cancel_timeout(priv, 100))
b481de9c
ZY
3706 IWL_WARNING("Could not cancel scan.\n");
3707 else {
3708 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
3709 "0x%04X\n", filter_flags);
3710 priv->staging_rxon.filter_flags =
3711 cpu_to_le32(filter_flags);
bb8c093b 3712 iwl4965_commit_rxon(priv);
b481de9c
ZY
3713 }
3714 }
3715 mutex_unlock(&priv->mutex);
3716
3717 return count;
3718}
3719
3720static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3721 store_filter_flags);
3722
c8b0e6e1 3723#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
3724
3725static ssize_t show_measurement(struct device *d,
3726 struct device_attribute *attr, char *buf)
3727{
c79dd5b5 3728 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 3729 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY
3730 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3731 u8 *data = (u8 *) & measure_report;
3732 unsigned long flags;
3733
3734 spin_lock_irqsave(&priv->lock, flags);
3735 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3736 spin_unlock_irqrestore(&priv->lock, flags);
3737 return 0;
3738 }
3739 memcpy(&measure_report, &priv->measure_report, size);
3740 priv->measurement_status = 0;
3741 spin_unlock_irqrestore(&priv->lock, flags);
3742
3743 while (size && (PAGE_SIZE - len)) {
3744 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3745 PAGE_SIZE - len, 1);
3746 len = strlen(buf);
3747 if (PAGE_SIZE - len)
3748 buf[len++] = '\n';
3749
3750 ofs += 16;
3751 size -= min(size, 16U);
3752 }
3753
3754 return len;
3755}
3756
3757static ssize_t store_measurement(struct device *d,
3758 struct device_attribute *attr,
3759 const char *buf, size_t count)
3760{
c79dd5b5 3761 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3762 struct ieee80211_measurement_params params = {
3763 .channel = le16_to_cpu(priv->active_rxon.channel),
3764 .start_time = cpu_to_le64(priv->last_tsf),
3765 .duration = cpu_to_le16(1),
3766 };
3767 u8 type = IWL_MEASURE_BASIC;
3768 u8 buffer[32];
3769 u8 channel;
3770
3771 if (count) {
3772 char *p = buffer;
3773 strncpy(buffer, buf, min(sizeof(buffer), count));
3774 channel = simple_strtoul(p, NULL, 0);
3775 if (channel)
3776 params.channel = channel;
3777
3778 p = buffer;
3779 while (*p && *p != ' ')
3780 p++;
3781 if (*p)
3782 type = simple_strtoul(p + 1, NULL, 0);
3783 }
3784
3785 IWL_DEBUG_INFO("Invoking measurement of type %d on "
3786 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 3787 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
3788
3789 return count;
3790}
3791
3792static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3793 show_measurement, store_measurement);
c8b0e6e1 3794#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY
3795
3796static ssize_t store_retry_rate(struct device *d,
3797 struct device_attribute *attr,
3798 const char *buf, size_t count)
3799{
c79dd5b5 3800 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3801
3802 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3803 if (priv->retry_rate <= 0)
3804 priv->retry_rate = 1;
3805
3806 return count;
3807}
3808
3809static ssize_t show_retry_rate(struct device *d,
3810 struct device_attribute *attr, char *buf)
3811{
c79dd5b5 3812 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3813 return sprintf(buf, "%d", priv->retry_rate);
3814}
3815
3816static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3817 store_retry_rate);
3818
3819static ssize_t store_power_level(struct device *d,
3820 struct device_attribute *attr,
3821 const char *buf, size_t count)
3822{
c79dd5b5 3823 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
3824 int rc;
3825 int mode;
3826
3827 mode = simple_strtoul(buf, NULL, 0);
3828 mutex_lock(&priv->mutex);
3829
fee1247a 3830 if (!iwl_is_ready(priv)) {
b481de9c
ZY
3831 rc = -EAGAIN;
3832 goto out;
3833 }
3834
5da4b55f
MA
3835 rc = iwl_power_set_user_mode(priv, mode);
3836 if (rc) {
3837 IWL_DEBUG_MAC80211("failed setting power mode.\n");
3838 goto out;
b481de9c 3839 }
b481de9c
ZY
3840 rc = count;
3841
3842 out:
3843 mutex_unlock(&priv->mutex);
3844 return rc;
3845}
3846
3847#define MAX_WX_STRING 80
3848
3849/* Values are in microsecond */
3850static const s32 timeout_duration[] = {
3851 350000,
3852 250000,
3853 75000,
3854 37000,
3855 25000,
3856};
3857static const s32 period_duration[] = {
3858 400000,
3859 700000,
3860 1000000,
3861 1000000,
3862 1000000
3863};
3864
3865static ssize_t show_power_level(struct device *d,
3866 struct device_attribute *attr, char *buf)
3867{
c79dd5b5 3868 struct iwl_priv *priv = dev_get_drvdata(d);
5da4b55f 3869 int level = priv->power_data.power_mode;
b481de9c
ZY
3870 char *p = buf;
3871
3872 p += sprintf(p, "%d ", level);
3873 switch (level) {
3874 case IWL_POWER_MODE_CAM:
3875 case IWL_POWER_AC:
3876 p += sprintf(p, "(AC)");
3877 break;
3878 case IWL_POWER_BATTERY:
3879 p += sprintf(p, "(BATTERY)");
3880 break;
3881 default:
3882 p += sprintf(p,
3883 "(Timeout %dms, Period %dms)",
3884 timeout_duration[level - 1] / 1000,
3885 period_duration[level - 1] / 1000);
3886 }
5da4b55f 3887/*
b481de9c
ZY
3888 if (!(priv->power_mode & IWL_POWER_ENABLED))
3889 p += sprintf(p, " OFF\n");
3890 else
3891 p += sprintf(p, " \n");
5da4b55f
MA
3892*/
3893 p += sprintf(p, " \n");
b481de9c 3894 return (p - buf + 1);
b481de9c
ZY
3895}
3896
3897static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
3898 store_power_level);
3899
3900static ssize_t show_channels(struct device *d,
3901 struct device_attribute *attr, char *buf)
3902{
5d72a1f5
EK
3903
3904 struct iwl_priv *priv = dev_get_drvdata(d);
3905 struct ieee80211_channel *channels = NULL;
3906 const struct ieee80211_supported_band *supp_band = NULL;
3907 int len = 0, i;
3908 int count = 0;
3909
3910 if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
3911 return -EAGAIN;
3912
3913 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
3914 channels = supp_band->channels;
3915 count = supp_band->n_channels;
3916
3917 len += sprintf(&buf[len],
3918 "Displaying %d channels in 2.4GHz band "
3919 "(802.11bg):\n", count);
3920
3921 for (i = 0; i < count; i++)
3922 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3923 ieee80211_frequency_to_channel(
3924 channels[i].center_freq),
3925 channels[i].max_power,
3926 channels[i].flags & IEEE80211_CHAN_RADAR ?
3927 " (IEEE 802.11h required)" : "",
3928 (!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3929 || (channels[i].flags &
3930 IEEE80211_CHAN_RADAR)) ? "" :
3931 ", IBSS",
3932 channels[i].flags &
3933 IEEE80211_CHAN_PASSIVE_SCAN ?
3934 "passive only" : "active/passive");
3935
3936 supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3937 channels = supp_band->channels;
3938 count = supp_band->n_channels;
3939
3940 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
3941 "(802.11a):\n", count);
3942
3943 for (i = 0; i < count; i++)
3944 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
3945 ieee80211_frequency_to_channel(
3946 channels[i].center_freq),
3947 channels[i].max_power,
3948 channels[i].flags & IEEE80211_CHAN_RADAR ?
3949 " (IEEE 802.11h required)" : "",
3950 ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3951 || (channels[i].flags &
3952 IEEE80211_CHAN_RADAR)) ? "" :
3953 ", IBSS",
3954 channels[i].flags &
3955 IEEE80211_CHAN_PASSIVE_SCAN ?
3956 "passive only" : "active/passive");
3957
3958 return len;
b481de9c
ZY
3959}
3960
3961static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3962
3963static ssize_t show_statistics(struct device *d,
3964 struct device_attribute *attr, char *buf)
3965{
c79dd5b5 3966 struct iwl_priv *priv = dev_get_drvdata(d);
8f91aecb 3967 u32 size = sizeof(struct iwl_notif_statistics);
b481de9c
ZY
3968 u32 len = 0, ofs = 0;
3969 u8 *data = (u8 *) & priv->statistics;
3970 int rc = 0;
3971
fee1247a 3972 if (!iwl_is_alive(priv))
b481de9c
ZY
3973 return -EAGAIN;
3974
3975 mutex_lock(&priv->mutex);
49ea8596 3976 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY
3977 mutex_unlock(&priv->mutex);
3978
3979 if (rc) {
3980 len = sprintf(buf,
3981 "Error sending statistics request: 0x%08X\n", rc);
3982 return len;
3983 }
3984
3985 while (size && (PAGE_SIZE - len)) {
3986 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3987 PAGE_SIZE - len, 1);
3988 len = strlen(buf);
3989 if (PAGE_SIZE - len)
3990 buf[len++] = '\n';
3991
3992 ofs += 16;
3993 size -= min(size, 16U);
3994 }
3995
3996 return len;
3997}
3998
3999static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
4000
b481de9c
ZY
4001static ssize_t show_status(struct device *d,
4002 struct device_attribute *attr, char *buf)
4003{
c79dd5b5 4004 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 4005 if (!iwl_is_alive(priv))
b481de9c
ZY
4006 return -EAGAIN;
4007 return sprintf(buf, "0x%08x\n", (int)priv->status);
4008}
4009
4010static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4011
b481de9c
ZY
4012/*****************************************************************************
4013 *
4014 * driver setup and teardown
4015 *
4016 *****************************************************************************/
4017
4e39317d 4018static void iwl_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY
4019{
4020 priv->workqueue = create_workqueue(DRV_NAME);
4021
4022 init_waitqueue_head(&priv->wait_command_queue);
4023
bb8c093b
CH
4024 INIT_WORK(&priv->up, iwl4965_bg_up);
4025 INIT_WORK(&priv->restart, iwl4965_bg_restart);
4026 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
bb8c093b
CH
4027 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
4028 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
4419e39b 4029 INIT_WORK(&priv->set_monitor, iwl4965_bg_set_monitor);
16e727e8 4030 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
bb8c093b 4031 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
4a4a9e81
TW
4032 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4033 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2a421b91
TW
4034
4035 /* FIXME : remove when resolved PENDING */
4036 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4037 iwl_setup_scan_deferred_work(priv);
bb8c093b 4038
4e39317d
EG
4039 if (priv->cfg->ops->lib->setup_deferred_work)
4040 priv->cfg->ops->lib->setup_deferred_work(priv);
4041
4042 init_timer(&priv->statistics_periodic);
4043 priv->statistics_periodic.data = (unsigned long)priv;
4044 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
b481de9c
ZY
4045
4046 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 4047 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
4048}
4049
4e39317d 4050static void iwl_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 4051{
4e39317d
EG
4052 if (priv->cfg->ops->lib->cancel_deferred_work)
4053 priv->cfg->ops->lib->cancel_deferred_work(priv);
b481de9c 4054
3ae6a054 4055 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
4056 cancel_delayed_work(&priv->scan_check);
4057 cancel_delayed_work(&priv->alive_start);
4058 cancel_delayed_work(&priv->post_associate);
4059 cancel_work_sync(&priv->beacon_update);
4e39317d 4060 del_timer_sync(&priv->statistics_periodic);
b481de9c
ZY
4061}
4062
bb8c093b 4063static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c 4064 &dev_attr_channels.attr,
b481de9c
ZY
4065 &dev_attr_flags.attr,
4066 &dev_attr_filter_flags.attr,
c8b0e6e1 4067#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
4068 &dev_attr_measurement.attr,
4069#endif
4070 &dev_attr_power_level.attr,
4071 &dev_attr_retry_rate.attr,
b481de9c
ZY
4072 &dev_attr_rs_window.attr,
4073 &dev_attr_statistics.attr,
4074 &dev_attr_status.attr,
4075 &dev_attr_temperature.attr,
b481de9c 4076 &dev_attr_tx_power.attr,
8cf769c6
EK
4077#ifdef CONFIG_IWLWIFI_DEBUG
4078 &dev_attr_debug_level.attr,
4079#endif
bc6f59bc 4080 &dev_attr_version.attr,
b481de9c
ZY
4081
4082 NULL
4083};
4084
bb8c093b 4085static struct attribute_group iwl4965_attribute_group = {
b481de9c 4086 .name = NULL, /* put in device directory */
bb8c093b 4087 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
4088};
4089
bb8c093b
CH
4090static struct ieee80211_ops iwl4965_hw_ops = {
4091 .tx = iwl4965_mac_tx,
4092 .start = iwl4965_mac_start,
4093 .stop = iwl4965_mac_stop,
4094 .add_interface = iwl4965_mac_add_interface,
4095 .remove_interface = iwl4965_mac_remove_interface,
4096 .config = iwl4965_mac_config,
4097 .config_interface = iwl4965_mac_config_interface,
4098 .configure_filter = iwl4965_configure_filter,
4099 .set_key = iwl4965_mac_set_key,
ab885f8c 4100 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH
4101 .get_stats = iwl4965_mac_get_stats,
4102 .get_tx_stats = iwl4965_mac_get_tx_stats,
4103 .conf_tx = iwl4965_mac_conf_tx,
bb8c093b
CH
4104 .reset_tsf = iwl4965_mac_reset_tsf,
4105 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 4106 .bss_info_changed = iwl4965_bss_info_changed,
9ab46173 4107 .ampdu_action = iwl4965_mac_ampdu_action,
bb8c093b 4108 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
4109};
4110
bb8c093b 4111static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
4112{
4113 int err = 0;
c79dd5b5 4114 struct iwl_priv *priv;
b481de9c 4115 struct ieee80211_hw *hw;
82b9a121 4116 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 4117 unsigned long flags;
5a66926a 4118 DECLARE_MAC_BUF(mac);
b481de9c 4119
316c30d9
AK
4120 /************************
4121 * 1. Allocating HW data
4122 ************************/
4123
6440adb5
CB
4124 /* Disabling hardware scan means that mac80211 will perform scans
4125 * "the hard way", rather than using device's scan. */
1ea87396 4126 if (cfg->mod_params->disable_hw_scan) {
bf403db8
EK
4127 if (cfg->mod_params->debug & IWL_DL_INFO)
4128 dev_printk(KERN_DEBUG, &(pdev->dev),
4129 "Disabling hw_scan\n");
bb8c093b 4130 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
4131 }
4132
1d0a082d
AK
4133 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
4134 if (!hw) {
b481de9c
ZY
4135 err = -ENOMEM;
4136 goto out;
4137 }
1d0a082d
AK
4138 priv = hw->priv;
4139 /* At this point both hw and priv are allocated. */
4140
b481de9c
ZY
4141 SET_IEEE80211_DEV(hw, &pdev->dev);
4142
4143 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 4144 priv->cfg = cfg;
b481de9c 4145 priv->pci_dev = pdev;
316c30d9 4146
0a6857e7 4147#ifdef CONFIG_IWLWIFI_DEBUG
bf403db8 4148 priv->debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY
4149 atomic_set(&priv->restrict_refcnt, 0);
4150#endif
b481de9c 4151
316c30d9
AK
4152 /**************************
4153 * 2. Initializing PCI bus
4154 **************************/
4155 if (pci_enable_device(pdev)) {
4156 err = -ENODEV;
4157 goto out_ieee80211_free_hw;
4158 }
4159
4160 pci_set_master(pdev);
4161
cc2a8ea8 4162 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 4163 if (!err)
cc2a8ea8
RR
4164 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4165 if (err) {
4166 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4167 if (!err)
4168 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4169 /* both attempts failed: */
316c30d9 4170 if (err) {
cc2a8ea8
RR
4171 printk(KERN_WARNING "%s: No suitable DMA available.\n",
4172 DRV_NAME);
316c30d9 4173 goto out_pci_disable_device;
cc2a8ea8 4174 }
316c30d9
AK
4175 }
4176
4177 err = pci_request_regions(pdev, DRV_NAME);
4178 if (err)
4179 goto out_pci_disable_device;
4180
4181 pci_set_drvdata(pdev, priv);
4182
4183 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4184 * PCI Tx retries from interfering with C3 CPU state */
4185 pci_write_config_byte(pdev, 0x41, 0x00);
4186
4187 /***********************
4188 * 3. Read REV register
4189 ***********************/
4190 priv->hw_base = pci_iomap(pdev, 0, 0);
4191 if (!priv->hw_base) {
4192 err = -ENODEV;
4193 goto out_pci_release_regions;
4194 }
4195
4196 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
4197 (unsigned long long) pci_resource_len(pdev, 0));
4198 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
4199
b661c819 4200 iwl_hw_detect(priv);
316c30d9 4201 printk(KERN_INFO DRV_NAME
b661c819
TW
4202 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
4203 priv->cfg->name, priv->hw_rev);
316c30d9 4204
91238714
TW
4205 /* amp init */
4206 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 4207 if (err < 0) {
91238714 4208 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK
4209 goto out_iounmap;
4210 }
91238714
TW
4211 /*****************
4212 * 4. Read EEPROM
4213 *****************/
316c30d9
AK
4214 /* Read the EEPROM */
4215 err = iwl_eeprom_init(priv);
4216 if (err) {
4217 IWL_ERROR("Unable to init EEPROM\n");
4218 goto out_iounmap;
4219 }
8614f360
TW
4220 err = iwl_eeprom_check_version(priv);
4221 if (err)
4222 goto out_iounmap;
4223
02883017 4224 /* extract MAC Address */
316c30d9
AK
4225 iwl_eeprom_get_mac(priv, priv->mac_addr);
4226 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
4227 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4228
4229 /************************
4230 * 5. Setup HW constants
4231 ************************/
da154e30 4232 if (iwl_set_hw_params(priv)) {
5425e490 4233 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 4234 goto out_free_eeprom;
316c30d9
AK
4235 }
4236
4237 /*******************
6ba87956 4238 * 6. Setup priv
316c30d9 4239 *******************/
b481de9c 4240
6ba87956 4241 err = iwl_init_drv(priv);
bf85ea4f 4242 if (err)
399f4900 4243 goto out_free_eeprom;
bf85ea4f 4244 /* At this point both hw and priv are initialized. */
316c30d9
AK
4245
4246 /**********************************
4247 * 7. Initialize module parameters
4248 **********************************/
4249
4250 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 4251 if (priv->cfg->mod_params->disable) {
316c30d9
AK
4252 set_bit(STATUS_RF_KILL_SW, &priv->status);
4253 IWL_DEBUG_INFO("Radio disabled.\n");
4254 }
4255
316c30d9
AK
4256 /********************
4257 * 8. Setup services
4258 ********************/
0359facc 4259 spin_lock_irqsave(&priv->lock, flags);
316c30d9 4260 iwl4965_disable_interrupts(priv);
0359facc 4261 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK
4262
4263 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4264 if (err) {
4265 IWL_ERROR("failed to create sysfs device attributes\n");
6ba87956 4266 goto out_uninit_drv;
316c30d9
AK
4267 }
4268
316c30d9 4269
4e39317d 4270 iwl_setup_deferred_work(priv);
653fa4a0 4271 iwl_setup_rx_handlers(priv);
316c30d9
AK
4272
4273 /********************
4274 * 9. Conclude
4275 ********************/
5a66926a
ZY
4276 pci_save_state(pdev);
4277 pci_disable_device(pdev);
b481de9c 4278
6ba87956
TW
4279 /**********************************
4280 * 10. Setup and register mac80211
4281 **********************************/
4282
4283 err = iwl_setup_mac(priv);
4284 if (err)
4285 goto out_remove_sysfs;
4286
4287 err = iwl_dbgfs_register(priv, DRV_NAME);
4288 if (err)
4289 IWL_ERROR("failed to create debugfs files\n");
4290
58d0f361
EG
4291 err = iwl_rfkill_init(priv);
4292 if (err)
4293 IWL_ERROR("Unable to initialize RFKILL system. "
4294 "Ignoring error: %d\n", err);
4295 iwl_power_initialize(priv);
b481de9c
ZY
4296 return 0;
4297
316c30d9
AK
4298 out_remove_sysfs:
4299 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
6ba87956
TW
4300 out_uninit_drv:
4301 iwl_uninit_drv(priv);
073d3f5f
TW
4302 out_free_eeprom:
4303 iwl_eeprom_free(priv);
b481de9c
ZY
4304 out_iounmap:
4305 pci_iounmap(pdev, priv->hw_base);
4306 out_pci_release_regions:
4307 pci_release_regions(pdev);
316c30d9 4308 pci_set_drvdata(pdev, NULL);
b481de9c
ZY
4309 out_pci_disable_device:
4310 pci_disable_device(pdev);
b481de9c
ZY
4311 out_ieee80211_free_hw:
4312 ieee80211_free_hw(priv->hw);
4313 out:
4314 return err;
4315}
4316
c83dbf68 4317static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 4318{
c79dd5b5 4319 struct iwl_priv *priv = pci_get_drvdata(pdev);
0359facc 4320 unsigned long flags;
b481de9c
ZY
4321
4322 if (!priv)
4323 return;
4324
4325 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
4326
67249625
EG
4327 iwl_dbgfs_unregister(priv);
4328 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
4329
c4f55232
RR
4330 if (priv->mac80211_registered) {
4331 ieee80211_unregister_hw(priv->hw);
4332 priv->mac80211_registered = 0;
4333 }
4334
b481de9c 4335 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 4336
bb8c093b 4337 iwl4965_down(priv);
b481de9c 4338
0359facc
MA
4339 /* make sure we flush any pending irq or
4340 * tasklet for the driver
4341 */
4342 spin_lock_irqsave(&priv->lock, flags);
4343 iwl4965_disable_interrupts(priv);
4344 spin_unlock_irqrestore(&priv->lock, flags);
4345
4346 iwl_synchronize_irq(priv);
4347
58d0f361 4348 iwl_rfkill_unregister(priv);
bb8c093b 4349 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
4350
4351 if (priv->rxq.bd)
a55360e4 4352 iwl_rx_queue_free(priv, &priv->rxq);
1053d35f 4353 iwl_hw_txq_ctx_free(priv);
b481de9c 4354
37deb2a0 4355 iwl_clear_stations_table(priv);
073d3f5f 4356 iwl_eeprom_free(priv);
b481de9c 4357
b481de9c 4358
948c171c
MA
4359 /*netif_stop_queue(dev); */
4360 flush_workqueue(priv->workqueue);
4361
bb8c093b 4362 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
4363 * priv->workqueue... so we can't take down the workqueue
4364 * until now... */
4365 destroy_workqueue(priv->workqueue);
4366 priv->workqueue = NULL;
4367
b481de9c
ZY
4368 pci_iounmap(pdev, priv->hw_base);
4369 pci_release_regions(pdev);
4370 pci_disable_device(pdev);
4371 pci_set_drvdata(pdev, NULL);
4372
6ba87956 4373 iwl_uninit_drv(priv);
b481de9c
ZY
4374
4375 if (priv->ibss_beacon)
4376 dev_kfree_skb(priv->ibss_beacon);
4377
4378 ieee80211_free_hw(priv->hw);
4379}
4380
4381#ifdef CONFIG_PM
4382
bb8c093b 4383static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 4384{
c79dd5b5 4385 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4386
e655b9f0
ZY
4387 if (priv->is_open) {
4388 set_bit(STATUS_IN_SUSPEND, &priv->status);
4389 iwl4965_mac_stop(priv->hw);
4390 priv->is_open = 1;
4391 }
b481de9c 4392
b481de9c
ZY
4393 pci_set_power_state(pdev, PCI_D3hot);
4394
b481de9c
ZY
4395 return 0;
4396}
4397
bb8c093b 4398static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 4399{
c79dd5b5 4400 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 4401
b481de9c 4402 pci_set_power_state(pdev, PCI_D0);
b481de9c 4403
e655b9f0
ZY
4404 if (priv->is_open)
4405 iwl4965_mac_start(priv->hw);
b481de9c 4406
e655b9f0 4407 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY
4408 return 0;
4409}
4410
4411#endif /* CONFIG_PM */
4412
4413/*****************************************************************************
4414 *
4415 * driver and module entry point
4416 *
4417 *****************************************************************************/
4418
fed9017e
RR
4419/* Hardware specific file defines the PCI IDs table for that hardware module */
4420static struct pci_device_id iwl_hw_card_ids[] = {
4421 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4422 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
5a6a256e
TW
4423#ifdef CONFIG_IWL5000
4424 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
4425 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
4426 {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)},
4427#endif /* CONFIG_IWL5000 */
fed9017e
RR
4428 {0}
4429};
4430MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4431
4432static struct pci_driver iwl_driver = {
b481de9c 4433 .name = DRV_NAME,
fed9017e 4434 .id_table = iwl_hw_card_ids,
bb8c093b
CH
4435 .probe = iwl4965_pci_probe,
4436 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 4437#ifdef CONFIG_PM
bb8c093b
CH
4438 .suspend = iwl4965_pci_suspend,
4439 .resume = iwl4965_pci_resume,
b481de9c
ZY
4440#endif
4441};
4442
bb8c093b 4443static int __init iwl4965_init(void)
b481de9c
ZY
4444{
4445
4446 int ret;
4447 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4448 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC
4449
4450 ret = iwl4965_rate_control_register();
4451 if (ret) {
4452 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
4453 return ret;
4454 }
4455
fed9017e 4456 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY
4457 if (ret) {
4458 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 4459 goto error_register;
b481de9c 4460 }
b481de9c
ZY
4461
4462 return ret;
897e1cf2 4463
897e1cf2
RC
4464error_register:
4465 iwl4965_rate_control_unregister();
4466 return ret;
b481de9c
ZY
4467}
4468
bb8c093b 4469static void __exit iwl4965_exit(void)
b481de9c 4470{
fed9017e 4471 pci_unregister_driver(&iwl_driver);
897e1cf2 4472 iwl4965_rate_control_unregister();
b481de9c
ZY
4473}
4474
bb8c093b
CH
4475module_exit(iwl4965_exit);
4476module_init(iwl4965_init);
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