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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
3e0d4cb1 | 49 | #include "iwl-dev.h" |
fee1247a | 50 | #include "iwl-core.h" |
3395f6e9 | 51 | #include "iwl-io.h" |
b481de9c | 52 | #include "iwl-helpers.h" |
6974e363 | 53 | #include "iwl-sta.h" |
f0832f13 | 54 | #include "iwl-calib.h" |
b481de9c | 55 | |
c79dd5b5 | 56 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 57 | struct iwl4965_tx_queue *txq); |
416e1438 | 58 | |
b481de9c ZY |
59 | /****************************************************************************** |
60 | * | |
61 | * module boiler plate | |
62 | * | |
63 | ******************************************************************************/ | |
64 | ||
b481de9c ZY |
65 | /* |
66 | * module name, copyright, version, etc. | |
67 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
68 | */ | |
69 | ||
70 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
71 | ||
0a6857e7 | 72 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
73 | #define VD "d" |
74 | #else | |
75 | #define VD | |
76 | #endif | |
77 | ||
c8b0e6e1 | 78 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
79 | #define VS "s" |
80 | #else | |
81 | #define VS | |
82 | #endif | |
83 | ||
df48c323 | 84 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 85 | |
b481de9c ZY |
86 | |
87 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
88 | MODULE_VERSION(DRV_VERSION); | |
89 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
90 | MODULE_LICENSE("GPL"); | |
91 | ||
92 | __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr) | |
93 | { | |
94 | u16 fc = le16_to_cpu(hdr->frame_control); | |
95 | int hdr_len = ieee80211_get_hdrlen(fc); | |
96 | ||
97 | if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA)) | |
98 | return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN); | |
99 | return NULL; | |
100 | } | |
101 | ||
d1141dfb | 102 | static const struct ieee80211_supported_band *iwl_get_hw_mode( |
c79dd5b5 | 103 | struct iwl_priv *priv, enum ieee80211_band band) |
b481de9c | 104 | { |
8318d78a | 105 | return priv->hw->wiphy->bands[band]; |
b481de9c ZY |
106 | } |
107 | ||
bb8c093b | 108 | static int iwl4965_is_empty_essid(const char *essid, int essid_len) |
b481de9c ZY |
109 | { |
110 | /* Single white space is for Linksys APs */ | |
111 | if (essid_len == 1 && essid[0] == ' ') | |
112 | return 1; | |
113 | ||
114 | /* Otherwise, if the entire essid is 0, we assume it is hidden */ | |
115 | while (essid_len) { | |
116 | essid_len--; | |
117 | if (essid[essid_len] != '\0') | |
118 | return 0; | |
119 | } | |
120 | ||
121 | return 1; | |
122 | } | |
123 | ||
bb8c093b | 124 | static const char *iwl4965_escape_essid(const char *essid, u8 essid_len) |
b481de9c ZY |
125 | { |
126 | static char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
127 | const char *s = essid; | |
128 | char *d = escaped; | |
129 | ||
bb8c093b | 130 | if (iwl4965_is_empty_essid(essid, essid_len)) { |
b481de9c ZY |
131 | memcpy(escaped, "<hidden>", sizeof("<hidden>")); |
132 | return escaped; | |
133 | } | |
134 | ||
135 | essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE); | |
136 | while (essid_len--) { | |
137 | if (*s == '\0') { | |
138 | *d++ = '\\'; | |
139 | *d++ = '0'; | |
140 | s++; | |
141 | } else | |
142 | *d++ = *s++; | |
143 | } | |
144 | *d = '\0'; | |
145 | return escaped; | |
146 | } | |
147 | ||
bf403db8 | 148 | |
b481de9c ZY |
149 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
150 | * DMA services | |
151 | * | |
152 | * Theory of operation | |
153 | * | |
6440adb5 CB |
154 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer |
155 | * of buffer descriptors, each of which points to one or more data buffers for | |
156 | * the device to read from or fill. Driver and device exchange status of each | |
157 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty | |
158 | * entries in each circular buffer, to protect against confusing empty and full | |
159 | * queue states. | |
160 | * | |
161 | * The device reads or writes the data in the queues via the device's several | |
162 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. | |
b481de9c ZY |
163 | * |
164 | * For Tx queue, there are low mark and high mark limits. If, after queuing | |
165 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | |
166 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | |
167 | * Tx queue resumed. | |
168 | * | |
6440adb5 CB |
169 | * The 4965 operates with up to 17 queues: One receive queue, one transmit |
170 | * queue (#4) for sending commands to the device firmware, and 15 other | |
171 | * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels. | |
e3851447 BC |
172 | * |
173 | * See more detailed info in iwl-4965-hw.h. | |
b481de9c ZY |
174 | ***************************************************/ |
175 | ||
fe01b477 | 176 | int iwl4965_queue_space(const struct iwl4965_queue *q) |
b481de9c | 177 | { |
fc4b6853 | 178 | int s = q->read_ptr - q->write_ptr; |
b481de9c | 179 | |
fc4b6853 | 180 | if (q->read_ptr > q->write_ptr) |
b481de9c ZY |
181 | s -= q->n_bd; |
182 | ||
183 | if (s <= 0) | |
184 | s += q->n_window; | |
185 | /* keep some reserve to not confuse empty and full situations */ | |
186 | s -= 2; | |
187 | if (s < 0) | |
188 | s = 0; | |
189 | return s; | |
190 | } | |
191 | ||
b481de9c | 192 | |
bb8c093b | 193 | static inline int x2_queue_used(const struct iwl4965_queue *q, int i) |
b481de9c | 194 | { |
fc4b6853 TW |
195 | return q->write_ptr > q->read_ptr ? |
196 | (i >= q->read_ptr && i < q->write_ptr) : | |
197 | !(i < q->read_ptr && i >= q->write_ptr); | |
b481de9c ZY |
198 | } |
199 | ||
bb8c093b | 200 | static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge) |
b481de9c | 201 | { |
6440adb5 | 202 | /* This is for scan command, the big buffer at end of command array */ |
b481de9c | 203 | if (is_huge) |
6440adb5 | 204 | return q->n_window; /* must be power of 2 */ |
b481de9c | 205 | |
6440adb5 | 206 | /* Otherwise, use normal size buffers */ |
b481de9c ZY |
207 | return index & (q->n_window - 1); |
208 | } | |
209 | ||
bb8c093b | 210 | const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
b481de9c ZY |
211 | |
212 | /*************** STATION TABLE MANAGEMENT **** | |
9fbab516 | 213 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
214 | * the functionality provided here |
215 | */ | |
216 | ||
217 | /**************************************************************/ | |
218 | ||
01ebd063 | 219 | #if 0 /* temporary disable till we add real remove station */ |
6440adb5 CB |
220 | /** |
221 | * iwl4965_remove_station - Remove driver's knowledge of station. | |
222 | * | |
223 | * NOTE: This does not remove station from device's station table. | |
224 | */ | |
c79dd5b5 | 225 | static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
b481de9c ZY |
226 | { |
227 | int index = IWL_INVALID_STATION; | |
228 | int i; | |
229 | unsigned long flags; | |
230 | ||
231 | spin_lock_irqsave(&priv->sta_lock, flags); | |
232 | ||
233 | if (is_ap) | |
234 | index = IWL_AP_ID; | |
235 | else if (is_broadcast_ether_addr(addr)) | |
5425e490 | 236 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 237 | else |
5425e490 | 238 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) |
b481de9c ZY |
239 | if (priv->stations[i].used && |
240 | !compare_ether_addr(priv->stations[i].sta.sta.addr, | |
241 | addr)) { | |
242 | index = i; | |
243 | break; | |
244 | } | |
245 | ||
246 | if (unlikely(index == IWL_INVALID_STATION)) | |
247 | goto out; | |
248 | ||
249 | if (priv->stations[index].used) { | |
250 | priv->stations[index].used = 0; | |
251 | priv->num_stations--; | |
252 | } | |
253 | ||
254 | BUG_ON(priv->num_stations < 0); | |
255 | ||
256 | out: | |
257 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
258 | return 0; | |
259 | } | |
556f8db7 | 260 | #endif |
b481de9c | 261 | |
6440adb5 CB |
262 | /** |
263 | * iwl4965_add_station_flags - Add station to tables in driver and device | |
264 | */ | |
c79dd5b5 | 265 | u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr, |
67d62035 | 266 | int is_ap, u8 flags, void *ht_data) |
b481de9c ZY |
267 | { |
268 | int i; | |
269 | int index = IWL_INVALID_STATION; | |
6def9761 | 270 | struct iwl_station_entry *station; |
b481de9c | 271 | unsigned long flags_spin; |
0795af57 | 272 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
273 | |
274 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | |
275 | if (is_ap) | |
276 | index = IWL_AP_ID; | |
277 | else if (is_broadcast_ether_addr(addr)) | |
5425e490 | 278 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 279 | else |
5425e490 | 280 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) { |
b481de9c ZY |
281 | if (!compare_ether_addr(priv->stations[i].sta.sta.addr, |
282 | addr)) { | |
283 | index = i; | |
284 | break; | |
285 | } | |
286 | ||
287 | if (!priv->stations[i].used && | |
288 | index == IWL_INVALID_STATION) | |
289 | index = i; | |
290 | } | |
291 | ||
292 | ||
9fbab516 BC |
293 | /* These two conditions have the same outcome, but keep them separate |
294 | since they have different meanings */ | |
b481de9c ZY |
295 | if (unlikely(index == IWL_INVALID_STATION)) { |
296 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
297 | return index; | |
298 | } | |
299 | ||
300 | if (priv->stations[index].used && | |
301 | !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) { | |
302 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
303 | return index; | |
304 | } | |
305 | ||
306 | ||
0795af57 | 307 | IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr)); |
b481de9c ZY |
308 | station = &priv->stations[index]; |
309 | station->used = 1; | |
310 | priv->num_stations++; | |
311 | ||
6440adb5 | 312 | /* Set up the REPLY_ADD_STA command to send to device */ |
133636de | 313 | memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd)); |
b481de9c ZY |
314 | memcpy(station->sta.sta.addr, addr, ETH_ALEN); |
315 | station->sta.mode = 0; | |
316 | station->sta.sta.sta_id = index; | |
317 | station->sta.station_flags = 0; | |
318 | ||
c8b0e6e1 | 319 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 320 | /* BCAST station and IBSS stations do not work in HT mode */ |
5425e490 | 321 | if (index != priv->hw_params.bcast_sta_id && |
b481de9c | 322 | priv->iw_mode != IEEE80211_IF_TYPE_IBSS) |
67d62035 RR |
323 | iwl4965_set_ht_add_station(priv, index, |
324 | (struct ieee80211_ht_info *) ht_data); | |
c8b0e6e1 | 325 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
326 | |
327 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
6440adb5 CB |
328 | |
329 | /* Add station to device's station table */ | |
133636de | 330 | iwl_send_add_sta(priv, &station->sta, flags); |
b481de9c ZY |
331 | return index; |
332 | ||
333 | } | |
334 | ||
b481de9c | 335 | |
b481de9c ZY |
336 | |
337 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | |
338 | ||
b481de9c | 339 | /** |
bb8c093b | 340 | * iwl4965_enqueue_hcmd - enqueue a uCode command |
b481de9c ZY |
341 | * @priv: device private data point |
342 | * @cmd: a point to the ucode command structure | |
343 | * | |
344 | * The function returns < 0 values to indicate the operation is | |
345 | * failed. On success, it turns the index (> 0) of command in the | |
346 | * command queue. | |
347 | */ | |
857485c0 | 348 | int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) |
b481de9c | 349 | { |
bb8c093b CH |
350 | struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; |
351 | struct iwl4965_queue *q = &txq->q; | |
1053d35f | 352 | struct iwl_tfd_frame *tfd; |
b481de9c | 353 | u32 *control_flags; |
857485c0 | 354 | struct iwl_cmd *out_cmd; |
b481de9c ZY |
355 | u32 idx; |
356 | u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | |
357 | dma_addr_t phys_addr; | |
358 | int ret; | |
359 | unsigned long flags; | |
360 | ||
361 | /* If any of the command structures end up being larger than | |
362 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | |
363 | * we will need to increase the size of the TFD entries */ | |
364 | BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && | |
365 | !(cmd->meta.flags & CMD_SIZE_HUGE)); | |
366 | ||
fee1247a | 367 | if (iwl_is_rfkill(priv)) { |
c342a1b9 GG |
368 | IWL_DEBUG_INFO("Not sending command - RF KILL"); |
369 | return -EIO; | |
370 | } | |
371 | ||
bb8c093b | 372 | if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { |
b481de9c ZY |
373 | IWL_ERROR("No space for Tx\n"); |
374 | return -ENOSPC; | |
375 | } | |
376 | ||
377 | spin_lock_irqsave(&priv->hcmd_lock, flags); | |
378 | ||
fc4b6853 | 379 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
380 | memset(tfd, 0, sizeof(*tfd)); |
381 | ||
382 | control_flags = (u32 *) tfd; | |
383 | ||
fc4b6853 | 384 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
b481de9c ZY |
385 | out_cmd = &txq->cmd[idx]; |
386 | ||
387 | out_cmd->hdr.cmd = cmd->id; | |
388 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | |
389 | memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); | |
390 | ||
391 | /* At this point, the out_cmd now has all of the incoming cmd | |
392 | * information */ | |
393 | ||
394 | out_cmd->hdr.flags = 0; | |
395 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) | | |
fc4b6853 | 396 | INDEX_TO_SEQ(q->write_ptr)); |
b481de9c ZY |
397 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) |
398 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | |
399 | ||
400 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | |
857485c0 | 401 | offsetof(struct iwl_cmd, hdr); |
bb8c093b | 402 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); |
b481de9c ZY |
403 | |
404 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | |
405 | "%d bytes at %d[%d]:%d\n", | |
406 | get_cmd_string(out_cmd->hdr.cmd), | |
407 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), | |
fc4b6853 | 408 | fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM); |
b481de9c ZY |
409 | |
410 | txq->need_update = 1; | |
6440adb5 CB |
411 | |
412 | /* Set up entry in queue's byte count circular buffer */ | |
e2a722eb | 413 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0); |
6440adb5 CB |
414 | |
415 | /* Increment and update queue's write index */ | |
c54b679d | 416 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
e2a722eb | 417 | ret = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
418 | |
419 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | |
420 | return ret ? ret : idx; | |
421 | } | |
422 | ||
deb09c43 EG |
423 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
424 | { | |
425 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; | |
426 | ||
427 | if (hw_decrypt) | |
428 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
429 | else | |
430 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
431 | ||
432 | } | |
433 | ||
b481de9c | 434 | /** |
bb8c093b | 435 | * iwl4965_rxon_add_station - add station into station table. |
b481de9c ZY |
436 | * |
437 | * there is only one AP station with id= IWL_AP_ID | |
9fbab516 BC |
438 | * NOTE: mutex must be held before calling this fnction |
439 | */ | |
c79dd5b5 | 440 | static int iwl4965_rxon_add_station(struct iwl_priv *priv, |
b481de9c ZY |
441 | const u8 *addr, int is_ap) |
442 | { | |
556f8db7 | 443 | u8 sta_id; |
b481de9c | 444 | |
6440adb5 | 445 | /* Add station to device's station table */ |
67d62035 RR |
446 | #ifdef CONFIG_IWL4965_HT |
447 | struct ieee80211_conf *conf = &priv->hw->conf; | |
448 | struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf; | |
449 | ||
450 | if ((is_ap) && | |
451 | (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && | |
452 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) | |
453 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
454 | 0, cur_ht_config); | |
455 | else | |
456 | #endif /* CONFIG_IWL4965_HT */ | |
457 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
458 | 0, NULL); | |
6440adb5 CB |
459 | |
460 | /* Set up default rate scaling table in device's station table */ | |
b481de9c ZY |
461 | iwl4965_add_station(priv, addr, is_ap); |
462 | ||
556f8db7 | 463 | return sta_id; |
b481de9c ZY |
464 | } |
465 | ||
b481de9c | 466 | /** |
bb8c093b | 467 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
468 | * |
469 | * NOTE: This is really only useful during development and can eventually | |
470 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
471 | * making changes | |
472 | */ | |
bb8c093b | 473 | static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c ZY |
474 | { |
475 | int error = 0; | |
476 | int counter = 1; | |
477 | ||
478 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
479 | error |= le32_to_cpu(rxon->flags & | |
480 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
481 | RXON_FLG_RADAR_DETECT_MSK)); | |
482 | if (error) | |
483 | IWL_WARNING("check 24G fields %d | %d\n", | |
484 | counter++, error); | |
485 | } else { | |
486 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
487 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
488 | if (error) | |
489 | IWL_WARNING("check 52 fields %d | %d\n", | |
490 | counter++, error); | |
491 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
492 | if (error) | |
493 | IWL_WARNING("check 52 CCK %d | %d\n", | |
494 | counter++, error); | |
495 | } | |
496 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
497 | if (error) | |
498 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
499 | ||
500 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
501 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
502 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
503 | if (error) | |
504 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
505 | ||
506 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
507 | if (error) | |
508 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
509 | ||
510 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
511 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
512 | if (error) | |
513 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
514 | counter++, error); | |
515 | ||
516 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
517 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
518 | if (error) | |
519 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
520 | counter++, error); | |
521 | ||
522 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
523 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
524 | if (error) | |
525 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
526 | counter++, error); | |
527 | ||
528 | if (error) | |
529 | IWL_WARNING("Tuning to channel %d\n", | |
530 | le16_to_cpu(rxon->channel)); | |
531 | ||
532 | if (error) { | |
bb8c093b | 533 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
534 | return -1; |
535 | } | |
536 | return 0; | |
537 | } | |
538 | ||
539 | /** | |
9fbab516 | 540 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 541 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 542 | * |
9fbab516 BC |
543 | * If the RXON structure is changing enough to require a new tune, |
544 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
545 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 546 | */ |
c79dd5b5 | 547 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
548 | { |
549 | ||
550 | /* These items are only settable from the full RXON command */ | |
551 | if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) || | |
552 | compare_ether_addr(priv->staging_rxon.bssid_addr, | |
553 | priv->active_rxon.bssid_addr) || | |
554 | compare_ether_addr(priv->staging_rxon.node_addr, | |
555 | priv->active_rxon.node_addr) || | |
556 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
557 | priv->active_rxon.wlap_bssid_addr) || | |
558 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
559 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
560 | (priv->staging_rxon.air_propagation != | |
561 | priv->active_rxon.air_propagation) || | |
562 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
563 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
564 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
565 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
566 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
567 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
568 | return 1; | |
569 | ||
570 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
571 | * be updated with the RXON_ASSOC command -- however only some | |
572 | * flag transitions are allowed using RXON_ASSOC */ | |
573 | ||
574 | /* Check if we are not switching bands */ | |
575 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
576 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
577 | return 1; | |
578 | ||
579 | /* Check if we are switching association toggle */ | |
580 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
581 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
582 | return 1; | |
583 | ||
584 | return 0; | |
585 | } | |
586 | ||
b481de9c | 587 | /** |
bb8c093b | 588 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 589 | * |
01ebd063 | 590 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
591 | * the active_rxon structure is updated with the new data. This |
592 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
593 | * a HW tune is required based on the RXON structure changes. | |
594 | */ | |
c79dd5b5 | 595 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
596 | { |
597 | /* cast away the const for active_rxon in this function */ | |
bb8c093b | 598 | struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 599 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
600 | int rc = 0; |
601 | ||
fee1247a | 602 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
603 | return -1; |
604 | ||
605 | /* always get timestamp with Rx frame */ | |
606 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
607 | ||
bb8c093b | 608 | rc = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
b481de9c ZY |
609 | if (rc) { |
610 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | |
611 | return -EINVAL; | |
612 | } | |
613 | ||
614 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 615 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 616 | * and other flags for the current radio configuration. */ |
bb8c093b | 617 | if (!iwl4965_full_rxon_required(priv)) { |
7e8c519e | 618 | rc = iwl_send_rxon_assoc(priv); |
b481de9c ZY |
619 | if (rc) { |
620 | IWL_ERROR("Error setting RXON_ASSOC " | |
621 | "configuration (%d).\n", rc); | |
622 | return rc; | |
623 | } | |
624 | ||
625 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
626 | ||
627 | return 0; | |
628 | } | |
629 | ||
630 | /* station table will be cleared */ | |
631 | priv->assoc_station_added = 0; | |
632 | ||
b481de9c ZY |
633 | /* If we are currently associated and the new config requires |
634 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
635 | * we must clear the associated from the active configuration | |
636 | * before we apply the new config */ | |
3109ece1 | 637 | if (iwl_is_associated(priv) && |
b481de9c ZY |
638 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
639 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | |
640 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
641 | ||
857485c0 | 642 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 643 | sizeof(struct iwl4965_rxon_cmd), |
b481de9c ZY |
644 | &priv->active_rxon); |
645 | ||
646 | /* If the mask clearing failed then we set | |
647 | * active_rxon back to what it was previously */ | |
648 | if (rc) { | |
649 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
650 | IWL_ERROR("Error clearing ASSOC_MSK on current " | |
651 | "configuration (%d).\n", rc); | |
652 | return rc; | |
653 | } | |
b481de9c ZY |
654 | } |
655 | ||
656 | IWL_DEBUG_INFO("Sending RXON\n" | |
657 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
658 | "* channel = %d\n" | |
0795af57 | 659 | "* bssid = %s\n", |
b481de9c ZY |
660 | ((priv->staging_rxon.filter_flags & |
661 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | |
662 | le16_to_cpu(priv->staging_rxon.channel), | |
0795af57 | 663 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 664 | |
099b40b7 | 665 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
b481de9c | 666 | /* Apply the new configuration */ |
857485c0 | 667 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 668 | sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon); |
b481de9c ZY |
669 | if (rc) { |
670 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | |
671 | return rc; | |
672 | } | |
673 | ||
bf85ea4f | 674 | iwlcore_clear_stations_table(priv); |
556f8db7 | 675 | |
b481de9c ZY |
676 | if (!priv->error_recovering) |
677 | priv->start_calib = 0; | |
678 | ||
f0832f13 | 679 | iwl_init_sensitivity(priv); |
b481de9c ZY |
680 | |
681 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
682 | ||
683 | /* If we issue a new RXON command which required a tune then we must | |
684 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
bb8c093b | 685 | rc = iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
686 | if (rc) { |
687 | IWL_ERROR("Error setting Tx power (%d).\n", rc); | |
688 | return rc; | |
689 | } | |
690 | ||
691 | /* Add the broadcast address so we can send broadcast frames */ | |
bb8c093b | 692 | if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) == |
b481de9c ZY |
693 | IWL_INVALID_STATION) { |
694 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | |
695 | return -EIO; | |
696 | } | |
697 | ||
698 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
699 | * add the IWL_AP_ID to the station rate table */ | |
3109ece1 | 700 | if (iwl_is_associated(priv) && |
b481de9c | 701 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
bb8c093b | 702 | if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
703 | == IWL_INVALID_STATION) { |
704 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
705 | return -EIO; | |
706 | } | |
707 | priv->assoc_station_added = 1; | |
6974e363 EG |
708 | if (priv->default_wep_key && |
709 | iwl_send_static_wepkey_cmd(priv, 0)) | |
710 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c ZY |
711 | } |
712 | ||
713 | return 0; | |
714 | } | |
715 | ||
5da4b55f MA |
716 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
717 | { | |
718 | ||
c7de35cd | 719 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
720 | iwl4965_commit_rxon(priv); |
721 | } | |
722 | ||
c79dd5b5 | 723 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 724 | { |
bb8c093b | 725 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
726 | .flags = 3, |
727 | .lead_time = 0xAA, | |
728 | .max_kill = 1, | |
729 | .kill_ack_mask = 0, | |
730 | .kill_cts_mask = 0, | |
731 | }; | |
732 | ||
857485c0 | 733 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 734 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
735 | } |
736 | ||
c79dd5b5 | 737 | static int iwl4965_send_scan_abort(struct iwl_priv *priv) |
b481de9c | 738 | { |
db11d634 TW |
739 | int ret = 0; |
740 | struct iwl_rx_packet *res; | |
857485c0 | 741 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
742 | .id = REPLY_SCAN_ABORT_CMD, |
743 | .meta.flags = CMD_WANT_SKB, | |
744 | }; | |
745 | ||
746 | /* If there isn't a scan actively going on in the hardware | |
747 | * then we are in between scan bands and not actually | |
748 | * actively scanning, so don't send the abort command */ | |
749 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
750 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
751 | return 0; | |
752 | } | |
753 | ||
db11d634 TW |
754 | ret = iwl_send_cmd_sync(priv, &cmd); |
755 | if (ret) { | |
b481de9c | 756 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); |
db11d634 | 757 | return ret; |
b481de9c ZY |
758 | } |
759 | ||
db11d634 | 760 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
761 | if (res->u.status != CAN_ABORT_STATUS) { |
762 | /* The scan abort will return 1 for success or | |
763 | * 2 for "failure". A failure condition can be | |
764 | * due to simply not being in an active scan which | |
765 | * can occur if we send the scan abort before we | |
766 | * the microcode has notified us that a scan is | |
767 | * completed. */ | |
768 | IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status); | |
769 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
770 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
771 | } | |
772 | ||
773 | dev_kfree_skb_any(cmd.meta.u.skb); | |
774 | ||
db11d634 | 775 | return ret; |
b481de9c ZY |
776 | } |
777 | ||
b481de9c ZY |
778 | /* |
779 | * CARD_STATE_CMD | |
780 | * | |
9fbab516 | 781 | * Use: Sets the device's internal card state to enable, disable, or halt |
b481de9c ZY |
782 | * |
783 | * When in the 'enable' state the card operates as normal. | |
784 | * When in the 'disable' state, the card enters into a low power mode. | |
785 | * When in the 'halt' state, the card is shut down and must be fully | |
786 | * restarted to come back on. | |
787 | */ | |
c79dd5b5 | 788 | static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
b481de9c | 789 | { |
857485c0 | 790 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
791 | .id = REPLY_CARD_STATE_CMD, |
792 | .len = sizeof(u32), | |
793 | .data = &flags, | |
794 | .meta.flags = meta_flag, | |
795 | }; | |
796 | ||
857485c0 | 797 | return iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
798 | } |
799 | ||
c79dd5b5 | 800 | static void iwl4965_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
801 | { |
802 | struct list_head *element; | |
803 | ||
804 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
805 | priv->frames_count); | |
806 | ||
807 | while (!list_empty(&priv->free_frames)) { | |
808 | element = priv->free_frames.next; | |
809 | list_del(element); | |
bb8c093b | 810 | kfree(list_entry(element, struct iwl4965_frame, list)); |
b481de9c ZY |
811 | priv->frames_count--; |
812 | } | |
813 | ||
814 | if (priv->frames_count) { | |
815 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
816 | priv->frames_count); | |
817 | priv->frames_count = 0; | |
818 | } | |
819 | } | |
820 | ||
c79dd5b5 | 821 | static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv) |
b481de9c | 822 | { |
bb8c093b | 823 | struct iwl4965_frame *frame; |
b481de9c ZY |
824 | struct list_head *element; |
825 | if (list_empty(&priv->free_frames)) { | |
826 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
827 | if (!frame) { | |
828 | IWL_ERROR("Could not allocate frame!\n"); | |
829 | return NULL; | |
830 | } | |
831 | ||
832 | priv->frames_count++; | |
833 | return frame; | |
834 | } | |
835 | ||
836 | element = priv->free_frames.next; | |
837 | list_del(element); | |
bb8c093b | 838 | return list_entry(element, struct iwl4965_frame, list); |
b481de9c ZY |
839 | } |
840 | ||
c79dd5b5 | 841 | static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame) |
b481de9c ZY |
842 | { |
843 | memset(frame, 0, sizeof(*frame)); | |
844 | list_add(&frame->list, &priv->free_frames); | |
845 | } | |
846 | ||
c79dd5b5 | 847 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c ZY |
848 | struct ieee80211_hdr *hdr, |
849 | const u8 *dest, int left) | |
850 | { | |
851 | ||
3109ece1 | 852 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
853 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
854 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
855 | return 0; | |
856 | ||
857 | if (priv->ibss_beacon->len > left) | |
858 | return 0; | |
859 | ||
860 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
861 | ||
862 | return priv->ibss_beacon->len; | |
863 | } | |
864 | ||
39e88504 | 865 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 866 | { |
39e88504 GC |
867 | int i; |
868 | int rate_mask; | |
869 | ||
870 | /* Set rate mask*/ | |
871 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
872 | rate_mask = priv->active_rate_basic & 0xF; | |
873 | else | |
874 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 875 | |
39e88504 | 876 | /* Find lowest valid rate */ |
b481de9c | 877 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
39e88504 | 878 | i = iwl4965_rates[i].next_ieee) { |
b481de9c | 879 | if (rate_mask & (1 << i)) |
bb8c093b | 880 | return iwl4965_rates[i].plcp; |
b481de9c ZY |
881 | } |
882 | ||
39e88504 GC |
883 | /* No valid rate was found. Assign the lowest one */ |
884 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
885 | return IWL_RATE_1M_PLCP; | |
886 | else | |
887 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
888 | } |
889 | ||
c79dd5b5 | 890 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 891 | { |
bb8c093b | 892 | struct iwl4965_frame *frame; |
b481de9c ZY |
893 | unsigned int frame_size; |
894 | int rc; | |
895 | u8 rate; | |
896 | ||
bb8c093b | 897 | frame = iwl4965_get_free_frame(priv); |
b481de9c ZY |
898 | |
899 | if (!frame) { | |
900 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
901 | "command.\n"); | |
902 | return -ENOMEM; | |
903 | } | |
904 | ||
39e88504 | 905 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 906 | |
bb8c093b | 907 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 908 | |
857485c0 | 909 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
910 | &frame->u.cmd[0]); |
911 | ||
bb8c093b | 912 | iwl4965_free_frame(priv, frame); |
b481de9c ZY |
913 | |
914 | return rc; | |
915 | } | |
916 | ||
b481de9c ZY |
917 | /****************************************************************************** |
918 | * | |
919 | * Misc. internal state and helper functions | |
920 | * | |
921 | ******************************************************************************/ | |
b481de9c | 922 | |
b481de9c | 923 | /** |
bb8c093b | 924 | * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field |
b481de9c ZY |
925 | * |
926 | * return : set the bit for each supported rate insert in ie | |
927 | */ | |
bb8c093b | 928 | static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate, |
c7c46676 | 929 | u16 basic_rate, int *left) |
b481de9c ZY |
930 | { |
931 | u16 ret_rates = 0, bit; | |
932 | int i; | |
c7c46676 TW |
933 | u8 *cnt = ie; |
934 | u8 *rates = ie + 1; | |
b481de9c ZY |
935 | |
936 | for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) { | |
937 | if (bit & supported_rate) { | |
938 | ret_rates |= bit; | |
bb8c093b | 939 | rates[*cnt] = iwl4965_rates[i].ieee | |
c7c46676 TW |
940 | ((bit & basic_rate) ? 0x80 : 0x00); |
941 | (*cnt)++; | |
942 | (*left)--; | |
943 | if ((*left <= 0) || | |
944 | (*cnt >= IWL_SUPPORTED_RATES_IE_LEN)) | |
b481de9c ZY |
945 | break; |
946 | } | |
947 | } | |
948 | ||
949 | return ret_rates; | |
950 | } | |
951 | ||
d1141dfb EG |
952 | #ifdef CONFIG_IWL4965_HT |
953 | static void iwl4965_ht_conf(struct iwl_priv *priv, | |
954 | struct ieee80211_bss_conf *bss_conf) | |
955 | { | |
956 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
957 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
958 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
959 | ||
960 | IWL_DEBUG_MAC80211("enter: \n"); | |
961 | ||
962 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
963 | ||
964 | if (!iwl_conf->is_ht) | |
965 | return; | |
966 | ||
967 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
968 | ||
969 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
970 | iwl_conf->sgf |= 0x1; | |
971 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) | |
972 | iwl_conf->sgf |= 0x2; | |
973 | ||
974 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
975 | iwl_conf->max_amsdu_size = | |
976 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
977 | ||
978 | iwl_conf->supported_chan_width = | |
979 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
980 | iwl_conf->extension_chan_offset = | |
981 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
982 | /* If no above or below channel supplied disable FAT channel */ | |
983 | if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE && | |
984 | iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW) | |
985 | iwl_conf->supported_chan_width = 0; | |
986 | ||
987 | iwl_conf->tx_mimo_ps_mode = | |
988 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
989 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
990 | ||
991 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
992 | iwl_conf->tx_chan_width = | |
993 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
994 | iwl_conf->ht_protection = | |
995 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
996 | iwl_conf->non_GF_STA_present = | |
997 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
998 | ||
999 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
1000 | IWL_DEBUG_MAC80211("leave\n"); | |
1001 | } | |
1002 | ||
1003 | static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband, | |
1004 | u8 *pos, int *left) | |
1005 | { | |
1006 | struct ieee80211_ht_cap *ht_cap; | |
1007 | ||
1008 | if (!sband || !sband->ht_info.ht_supported) | |
1009 | return; | |
1010 | ||
1011 | if (*left < sizeof(struct ieee80211_ht_cap)) | |
1012 | return; | |
1013 | ||
1014 | *pos++ = sizeof(struct ieee80211_ht_cap); | |
1015 | ht_cap = (struct ieee80211_ht_cap *) pos; | |
1016 | ||
1017 | ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap); | |
1018 | memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16); | |
1019 | ht_cap->ampdu_params_info = | |
1020 | (sband->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) | | |
1021 | ((sband->ht_info.ampdu_density << 2) & | |
1022 | IEEE80211_HT_CAP_AMPDU_DENSITY); | |
1023 | *left -= sizeof(struct ieee80211_ht_cap); | |
1024 | } | |
1025 | #else | |
1026 | static inline void iwl4965_ht_conf(struct iwl_priv *priv, | |
1027 | struct ieee80211_bss_conf *bss_conf) | |
1028 | { | |
1029 | } | |
1030 | static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband, | |
1031 | u8 *pos, int *left) | |
1032 | { | |
1033 | } | |
1034 | #endif | |
1035 | ||
1036 | ||
b481de9c | 1037 | /** |
bb8c093b | 1038 | * iwl4965_fill_probe_req - fill in all required fields and IE for probe request |
b481de9c | 1039 | */ |
c79dd5b5 | 1040 | static u16 iwl4965_fill_probe_req(struct iwl_priv *priv, |
78330fdd TW |
1041 | enum ieee80211_band band, |
1042 | struct ieee80211_mgmt *frame, | |
1043 | int left, int is_direct) | |
b481de9c ZY |
1044 | { |
1045 | int len = 0; | |
1046 | u8 *pos = NULL; | |
bee488db | 1047 | u16 active_rates, ret_rates, cck_rates, active_rate_basic; |
78330fdd | 1048 | const struct ieee80211_supported_band *sband = |
d1141dfb | 1049 | iwl_get_hw_mode(priv, band); |
b481de9c ZY |
1050 | |
1051 | /* Make sure there is enough space for the probe request, | |
1052 | * two mandatory IEs and the data */ | |
1053 | left -= 24; | |
1054 | if (left < 0) | |
1055 | return 0; | |
1056 | len += 24; | |
1057 | ||
1058 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | |
bb8c093b | 1059 | memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c | 1060 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); |
bb8c093b | 1061 | memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c ZY |
1062 | frame->seq_ctrl = 0; |
1063 | ||
1064 | /* fill in our indirect SSID IE */ | |
1065 | /* ...next IE... */ | |
1066 | ||
1067 | left -= 2; | |
1068 | if (left < 0) | |
1069 | return 0; | |
1070 | len += 2; | |
1071 | pos = &(frame->u.probe_req.variable[0]); | |
1072 | *pos++ = WLAN_EID_SSID; | |
1073 | *pos++ = 0; | |
1074 | ||
1075 | /* fill in our direct SSID IE... */ | |
1076 | if (is_direct) { | |
1077 | /* ...next IE... */ | |
1078 | left -= 2 + priv->essid_len; | |
1079 | if (left < 0) | |
1080 | return 0; | |
1081 | /* ... fill it in... */ | |
1082 | *pos++ = WLAN_EID_SSID; | |
1083 | *pos++ = priv->essid_len; | |
1084 | memcpy(pos, priv->essid, priv->essid_len); | |
1085 | pos += priv->essid_len; | |
1086 | len += 2 + priv->essid_len; | |
1087 | } | |
1088 | ||
1089 | /* fill in supported rate */ | |
1090 | /* ...next IE... */ | |
1091 | left -= 2; | |
1092 | if (left < 0) | |
1093 | return 0; | |
c7c46676 | 1094 | |
b481de9c ZY |
1095 | /* ... fill it in... */ |
1096 | *pos++ = WLAN_EID_SUPP_RATES; | |
1097 | *pos = 0; | |
c7c46676 | 1098 | |
bee488db | 1099 | /* exclude 60M rate */ |
1100 | active_rates = priv->rates_mask; | |
1101 | active_rates &= ~IWL_RATE_60M_MASK; | |
1102 | ||
1103 | active_rate_basic = active_rates & IWL_BASIC_RATES_MASK; | |
b481de9c | 1104 | |
c7c46676 | 1105 | cck_rates = IWL_CCK_RATES_MASK & active_rates; |
bb8c093b | 1106 | ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates, |
bee488db | 1107 | active_rate_basic, &left); |
c7c46676 TW |
1108 | active_rates &= ~ret_rates; |
1109 | ||
bb8c093b | 1110 | ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1111 | active_rate_basic, &left); |
c7c46676 TW |
1112 | active_rates &= ~ret_rates; |
1113 | ||
b481de9c ZY |
1114 | len += 2 + *pos; |
1115 | pos += (*pos) + 1; | |
c7c46676 | 1116 | if (active_rates == 0) |
b481de9c ZY |
1117 | goto fill_end; |
1118 | ||
1119 | /* fill in supported extended rate */ | |
1120 | /* ...next IE... */ | |
1121 | left -= 2; | |
1122 | if (left < 0) | |
1123 | return 0; | |
1124 | /* ... fill it in... */ | |
1125 | *pos++ = WLAN_EID_EXT_SUPP_RATES; | |
1126 | *pos = 0; | |
bb8c093b | 1127 | iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1128 | active_rate_basic, &left); |
b481de9c ZY |
1129 | if (*pos > 0) |
1130 | len += 2 + *pos; | |
1131 | ||
b481de9c | 1132 | fill_end: |
d1141dfb EG |
1133 | /* fill in HT IE */ |
1134 | left -= 2; | |
1135 | if (left < 0) | |
1136 | return 0; | |
1137 | ||
1138 | *pos++ = WLAN_EID_HT_CAPABILITY; | |
1139 | *pos = 0; | |
1140 | ||
1141 | iwl_ht_cap_to_ie(sband, pos, &left); | |
1142 | ||
1143 | if (*pos > 0) | |
1144 | len += 2 + *pos; | |
b481de9c ZY |
1145 | return (u16)len; |
1146 | } | |
1147 | ||
1148 | /* | |
1149 | * QoS support | |
1150 | */ | |
c79dd5b5 | 1151 | static int iwl4965_send_qos_params_command(struct iwl_priv *priv, |
bb8c093b | 1152 | struct iwl4965_qosparam_cmd *qos) |
b481de9c ZY |
1153 | { |
1154 | ||
857485c0 | 1155 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
bb8c093b | 1156 | sizeof(struct iwl4965_qosparam_cmd), qos); |
b481de9c ZY |
1157 | } |
1158 | ||
c79dd5b5 | 1159 | static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c ZY |
1160 | { |
1161 | unsigned long flags; | |
1162 | ||
b481de9c ZY |
1163 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
1164 | return; | |
1165 | ||
1166 | if (!priv->qos_data.qos_enable) | |
1167 | return; | |
1168 | ||
1169 | spin_lock_irqsave(&priv->lock, flags); | |
1170 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
1171 | ||
1172 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
1173 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
1174 | priv->qos_data.def_qos_parm.qos_flags |= | |
1175 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
1176 | if (priv->qos_data.qos_active) |
1177 | priv->qos_data.def_qos_parm.qos_flags |= | |
1178 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
1179 | ||
c8b0e6e1 | 1180 | #ifdef CONFIG_IWL4965_HT |
fd105e79 | 1181 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 1182 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
c8b0e6e1 | 1183 | #endif /* CONFIG_IWL4965_HT */ |
f1f1f5c7 | 1184 | |
b481de9c ZY |
1185 | spin_unlock_irqrestore(&priv->lock, flags); |
1186 | ||
3109ece1 | 1187 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
1188 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
1189 | priv->qos_data.qos_active, | |
1190 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 1191 | |
bb8c093b | 1192 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
1193 | &(priv->qos_data.def_qos_parm)); |
1194 | } | |
1195 | } | |
1196 | ||
c79dd5b5 | 1197 | int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
1198 | { |
1199 | /* Filter incoming packets to determine if they are targeted toward | |
1200 | * this network, discarding packets coming from ourselves */ | |
1201 | switch (priv->iw_mode) { | |
1202 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
1203 | /* packets from our adapter are dropped (echo) */ | |
1204 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
1205 | return 0; | |
1206 | /* {broad,multi}cast packets to our IBSS go through */ | |
1207 | if (is_multicast_ether_addr(header->addr1)) | |
1208 | return !compare_ether_addr(header->addr3, priv->bssid); | |
1209 | /* packets to our adapter go through */ | |
1210 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
1211 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
1212 | /* packets from our adapter are dropped (echo) */ | |
1213 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
1214 | return 0; | |
1215 | /* {broad,multi}cast packets to our BSS go through */ | |
1216 | if (is_multicast_ether_addr(header->addr1)) | |
1217 | return !compare_ether_addr(header->addr2, priv->bssid); | |
1218 | /* packets to our adapter go through */ | |
1219 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
69dc5d9d TW |
1220 | default: |
1221 | break; | |
b481de9c ZY |
1222 | } |
1223 | ||
1224 | return 1; | |
1225 | } | |
1226 | ||
1227 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1228 | ||
bb8c093b | 1229 | static const char *iwl4965_get_tx_fail_reason(u32 status) |
b481de9c ZY |
1230 | { |
1231 | switch (status & TX_STATUS_MSK) { | |
1232 | case TX_STATUS_SUCCESS: | |
1233 | return "SUCCESS"; | |
1234 | TX_STATUS_ENTRY(SHORT_LIMIT); | |
1235 | TX_STATUS_ENTRY(LONG_LIMIT); | |
1236 | TX_STATUS_ENTRY(FIFO_UNDERRUN); | |
1237 | TX_STATUS_ENTRY(MGMNT_ABORT); | |
1238 | TX_STATUS_ENTRY(NEXT_FRAG); | |
1239 | TX_STATUS_ENTRY(LIFE_EXPIRE); | |
1240 | TX_STATUS_ENTRY(DEST_PS); | |
1241 | TX_STATUS_ENTRY(ABORTED); | |
1242 | TX_STATUS_ENTRY(BT_RETRY); | |
1243 | TX_STATUS_ENTRY(STA_INVALID); | |
1244 | TX_STATUS_ENTRY(FRAG_DROPPED); | |
1245 | TX_STATUS_ENTRY(TID_DISABLE); | |
1246 | TX_STATUS_ENTRY(FRAME_FLUSHED); | |
1247 | TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL); | |
1248 | TX_STATUS_ENTRY(TX_LOCKED); | |
1249 | TX_STATUS_ENTRY(NO_BEACON_ON_RADAR); | |
1250 | } | |
1251 | ||
1252 | return "UNKNOWN"; | |
1253 | } | |
1254 | ||
1255 | /** | |
bb8c093b | 1256 | * iwl4965_scan_cancel - Cancel any currently executing HW scan |
b481de9c ZY |
1257 | * |
1258 | * NOTE: priv->mutex is not required before calling this function | |
1259 | */ | |
c79dd5b5 | 1260 | static int iwl4965_scan_cancel(struct iwl_priv *priv) |
b481de9c ZY |
1261 | { |
1262 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
1263 | clear_bit(STATUS_SCANNING, &priv->status); | |
1264 | return 0; | |
1265 | } | |
1266 | ||
1267 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1268 | if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1269 | IWL_DEBUG_SCAN("Queuing scan abort.\n"); | |
1270 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1271 | queue_work(priv->workqueue, &priv->abort_scan); | |
1272 | ||
1273 | } else | |
1274 | IWL_DEBUG_SCAN("Scan abort already in progress.\n"); | |
1275 | ||
1276 | return test_bit(STATUS_SCANNING, &priv->status); | |
1277 | } | |
1278 | ||
1279 | return 0; | |
1280 | } | |
1281 | ||
1282 | /** | |
bb8c093b | 1283 | * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan |
b481de9c ZY |
1284 | * @ms: amount of time to wait (in milliseconds) for scan to abort |
1285 | * | |
1286 | * NOTE: priv->mutex must be held before calling this function | |
1287 | */ | |
c79dd5b5 | 1288 | static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms) |
b481de9c ZY |
1289 | { |
1290 | unsigned long now = jiffies; | |
1291 | int ret; | |
1292 | ||
bb8c093b | 1293 | ret = iwl4965_scan_cancel(priv); |
b481de9c ZY |
1294 | if (ret && ms) { |
1295 | mutex_unlock(&priv->mutex); | |
1296 | while (!time_after(jiffies, now + msecs_to_jiffies(ms)) && | |
1297 | test_bit(STATUS_SCANNING, &priv->status)) | |
1298 | msleep(1); | |
1299 | mutex_lock(&priv->mutex); | |
1300 | ||
1301 | return test_bit(STATUS_SCANNING, &priv->status); | |
1302 | } | |
1303 | ||
1304 | return ret; | |
1305 | } | |
1306 | ||
c79dd5b5 | 1307 | static void iwl4965_sequence_reset(struct iwl_priv *priv) |
b481de9c ZY |
1308 | { |
1309 | /* Reset ieee stats */ | |
1310 | ||
1311 | /* We don't reset the net_device_stats (ieee->stats) on | |
1312 | * re-association */ | |
1313 | ||
1314 | priv->last_seq_num = -1; | |
1315 | priv->last_frag_num = -1; | |
1316 | priv->last_packet_time = 0; | |
1317 | ||
bb8c093b | 1318 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
1319 | } |
1320 | ||
1321 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
1322 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
1323 | ||
bb8c093b | 1324 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
1325 | { |
1326 | u16 new_val = 0; | |
1327 | u16 beacon_factor = 0; | |
1328 | ||
1329 | beacon_factor = | |
1330 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
1331 | / MAX_UCODE_BEACON_INTERVAL; | |
1332 | new_val = beacon_val / beacon_factor; | |
1333 | ||
1334 | return cpu_to_le16(new_val); | |
1335 | } | |
1336 | ||
c79dd5b5 | 1337 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
1338 | { |
1339 | u64 interval_tm_unit; | |
1340 | u64 tsf, result; | |
1341 | unsigned long flags; | |
1342 | struct ieee80211_conf *conf = NULL; | |
1343 | u16 beacon_int = 0; | |
1344 | ||
1345 | conf = ieee80211_get_hw_conf(priv->hw); | |
1346 | ||
1347 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
1348 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
1349 | priv->rxon_timing.timestamp.dw[0] = | |
1350 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c ZY |
1351 | |
1352 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
1353 | ||
3109ece1 | 1354 | tsf = priv->timestamp; |
b481de9c ZY |
1355 | |
1356 | beacon_int = priv->beacon_int; | |
1357 | spin_unlock_irqrestore(&priv->lock, flags); | |
1358 | ||
1359 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
1360 | if (beacon_int == 0) { | |
1361 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
1362 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
1363 | } else { | |
1364 | priv->rxon_timing.beacon_interval = | |
1365 | cpu_to_le16(beacon_int); | |
1366 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1367 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
1368 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
1369 | } | |
1370 | ||
1371 | priv->rxon_timing.atim_window = 0; | |
1372 | } else { | |
1373 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1374 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
1375 | /* TODO: we need to get atim_window from upper stack |
1376 | * for now we set to 0 */ | |
1377 | priv->rxon_timing.atim_window = 0; | |
1378 | } | |
1379 | ||
1380 | interval_tm_unit = | |
1381 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
1382 | result = do_div(tsf, interval_tm_unit); | |
1383 | priv->rxon_timing.beacon_init_val = | |
1384 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
1385 | ||
1386 | IWL_DEBUG_ASSOC | |
1387 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
1388 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
1389 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
1390 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
1391 | } | |
1392 | ||
c79dd5b5 | 1393 | static int iwl4965_scan_initiate(struct iwl_priv *priv) |
b481de9c ZY |
1394 | { |
1395 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
1396 | IWL_ERROR("APs don't scan.\n"); | |
1397 | return 0; | |
1398 | } | |
1399 | ||
fee1247a | 1400 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
1401 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); |
1402 | return -EIO; | |
1403 | } | |
1404 | ||
1405 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1406 | IWL_DEBUG_SCAN("Scan already in progress.\n"); | |
1407 | return -EAGAIN; | |
1408 | } | |
1409 | ||
1410 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1411 | IWL_DEBUG_SCAN("Scan request while abort pending. " | |
1412 | "Queuing.\n"); | |
1413 | return -EAGAIN; | |
1414 | } | |
1415 | ||
1416 | IWL_DEBUG_INFO("Starting scan...\n"); | |
1417 | priv->scan_bands = 2; | |
1418 | set_bit(STATUS_SCANNING, &priv->status); | |
1419 | priv->scan_start = jiffies; | |
1420 | priv->scan_pass_start = priv->scan_start; | |
1421 | ||
1422 | queue_work(priv->workqueue, &priv->request_scan); | |
1423 | ||
1424 | return 0; | |
1425 | } | |
1426 | ||
b481de9c | 1427 | |
c79dd5b5 | 1428 | static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv, |
8318d78a | 1429 | enum ieee80211_band band) |
b481de9c | 1430 | { |
8318d78a | 1431 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
1432 | priv->staging_rxon.flags &= |
1433 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
1434 | | RXON_FLG_CCK_MSK); | |
1435 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1436 | } else { | |
508e32e1 | 1437 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
1438 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
1439 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1440 | else | |
1441 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1442 | ||
1443 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
1444 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1445 | ||
1446 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
1447 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
1448 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
1449 | } | |
1450 | } | |
1451 | ||
1452 | /* | |
01ebd063 | 1453 | * initialize rxon structure with default values from eeprom |
b481de9c | 1454 | */ |
c79dd5b5 | 1455 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 1456 | { |
bf85ea4f | 1457 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
1458 | |
1459 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
1460 | ||
1461 | switch (priv->iw_mode) { | |
1462 | case IEEE80211_IF_TYPE_AP: | |
1463 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
1464 | break; | |
1465 | ||
1466 | case IEEE80211_IF_TYPE_STA: | |
1467 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
1468 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
1469 | break; | |
1470 | ||
1471 | case IEEE80211_IF_TYPE_IBSS: | |
1472 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
1473 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
1474 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
1475 | RXON_FILTER_ACCEPT_GRP_MSK; | |
1476 | break; | |
1477 | ||
1478 | case IEEE80211_IF_TYPE_MNTR: | |
1479 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
1480 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
1481 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
1482 | break; | |
69dc5d9d TW |
1483 | default: |
1484 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
1485 | break; | |
b481de9c ZY |
1486 | } |
1487 | ||
1488 | #if 0 | |
1489 | /* TODO: Figure out when short_preamble would be set and cache from | |
1490 | * that */ | |
1491 | if (!hw_to_local(priv->hw)->short_preamble) | |
1492 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
1493 | else | |
1494 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
1495 | #endif | |
1496 | ||
8622e705 | 1497 | ch_info = iwl_get_channel_info(priv, priv->band, |
b481de9c ZY |
1498 | le16_to_cpu(priv->staging_rxon.channel)); |
1499 | ||
1500 | if (!ch_info) | |
1501 | ch_info = &priv->channel_info[0]; | |
1502 | ||
1503 | /* | |
1504 | * in some case A channels are all non IBSS | |
1505 | * in this case force B/G channel | |
1506 | */ | |
1507 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
1508 | !(is_channel_ibss(ch_info))) | |
1509 | ch_info = &priv->channel_info[0]; | |
1510 | ||
1511 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 1512 | priv->band = ch_info->band; |
b481de9c | 1513 | |
8318d78a | 1514 | iwl4965_set_flags_for_phymode(priv, priv->band); |
b481de9c ZY |
1515 | |
1516 | priv->staging_rxon.ofdm_basic_rates = | |
1517 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
1518 | priv->staging_rxon.cck_basic_rates = | |
1519 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
1520 | ||
1521 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
1522 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
1523 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
1524 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
1525 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
1526 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 1527 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
1528 | } |
1529 | ||
c79dd5b5 | 1530 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 1531 | { |
b481de9c | 1532 | if (mode == IEEE80211_IF_TYPE_IBSS) { |
bf85ea4f | 1533 | const struct iwl_channel_info *ch_info; |
b481de9c | 1534 | |
8622e705 | 1535 | ch_info = iwl_get_channel_info(priv, |
8318d78a | 1536 | priv->band, |
b481de9c ZY |
1537 | le16_to_cpu(priv->staging_rxon.channel)); |
1538 | ||
1539 | if (!ch_info || !is_channel_ibss(ch_info)) { | |
1540 | IWL_ERROR("channel %d not IBSS channel\n", | |
1541 | le16_to_cpu(priv->staging_rxon.channel)); | |
1542 | return -EINVAL; | |
1543 | } | |
1544 | } | |
1545 | ||
b481de9c ZY |
1546 | priv->iw_mode = mode; |
1547 | ||
bb8c093b | 1548 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
1549 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
1550 | ||
bf85ea4f | 1551 | iwlcore_clear_stations_table(priv); |
b481de9c | 1552 | |
fde3571f | 1553 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 1554 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
1555 | return -EAGAIN; |
1556 | ||
1557 | cancel_delayed_work(&priv->scan_check); | |
1558 | if (iwl4965_scan_cancel_timeout(priv, 100)) { | |
1559 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); | |
1560 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
1561 | return -EAGAIN; | |
1562 | } | |
1563 | ||
bb8c093b | 1564 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
1565 | |
1566 | return 0; | |
1567 | } | |
1568 | ||
c79dd5b5 | 1569 | static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv, |
b481de9c | 1570 | struct ieee80211_tx_control *ctl, |
857485c0 | 1571 | struct iwl_cmd *cmd, |
b481de9c | 1572 | struct sk_buff *skb_frag, |
deb09c43 | 1573 | int sta_id) |
b481de9c | 1574 | { |
6def9761 | 1575 | struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo; |
6974e363 EG |
1576 | struct iwl_wep_key *wepkey; |
1577 | int keyidx = 0; | |
1578 | ||
1c014420 | 1579 | BUG_ON(ctl->hw_key->hw_key_idx > 3); |
b481de9c ZY |
1580 | |
1581 | switch (keyinfo->alg) { | |
1582 | case ALG_CCMP: | |
1583 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM; | |
1584 | memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen); | |
8236e183 MS |
1585 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
1586 | cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK; | |
b481de9c ZY |
1587 | IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n"); |
1588 | break; | |
1589 | ||
1590 | case ALG_TKIP: | |
b481de9c | 1591 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP; |
2bc75089 EG |
1592 | ieee80211_get_tkip_key(keyinfo->conf, skb_frag, |
1593 | IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key); | |
1594 | IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n"); | |
b481de9c ZY |
1595 | break; |
1596 | ||
1597 | case ALG_WEP: | |
1c014420 | 1598 | wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx]; |
6974e363 EG |
1599 | cmd->cmd.tx.sec_ctl = 0; |
1600 | if (priv->default_wep_key) { | |
1601 | /* the WEP key was sent as static */ | |
1c014420 | 1602 | keyidx = ctl->hw_key->hw_key_idx; |
6974e363 EG |
1603 | memcpy(&cmd->cmd.tx.key[3], wepkey->key, |
1604 | wepkey->key_size); | |
1605 | if (wepkey->key_size == WEP_KEY_LEN_128) | |
1606 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
1607 | } else { | |
0211ddda EG |
1608 | /* the WEP key was sent as dynamic */ |
1609 | keyidx = keyinfo->keyidx; | |
1610 | memcpy(&cmd->cmd.tx.key[3], keyinfo->key, | |
1611 | keyinfo->keylen); | |
1612 | if (keyinfo->keylen == WEP_KEY_LEN_128) | |
1613 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
6974e363 | 1614 | } |
b481de9c | 1615 | |
6974e363 EG |
1616 | cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP | |
1617 | (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT); | |
b481de9c ZY |
1618 | |
1619 | IWL_DEBUG_TX("Configuring packet for WEP encryption " | |
6974e363 | 1620 | "with key %d\n", keyidx); |
b481de9c ZY |
1621 | break; |
1622 | ||
b481de9c ZY |
1623 | default: |
1624 | printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg); | |
1625 | break; | |
1626 | } | |
1627 | } | |
1628 | ||
1629 | /* | |
1630 | * handle build REPLY_TX command notification. | |
1631 | */ | |
c79dd5b5 | 1632 | static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv, |
857485c0 | 1633 | struct iwl_cmd *cmd, |
b481de9c ZY |
1634 | struct ieee80211_tx_control *ctrl, |
1635 | struct ieee80211_hdr *hdr, | |
1636 | int is_unicast, u8 std_id) | |
1637 | { | |
1638 | __le16 *qc; | |
1639 | u16 fc = le16_to_cpu(hdr->frame_control); | |
1640 | __le32 tx_flags = cmd->cmd.tx.tx_flags; | |
1641 | ||
1642 | cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
1643 | if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) { | |
1644 | tx_flags |= TX_CMD_FLG_ACK_MSK; | |
1645 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
1646 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1647 | if (ieee80211_is_probe_response(fc) && | |
1648 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) | |
1649 | tx_flags |= TX_CMD_FLG_TSF_MSK; | |
1650 | } else { | |
1651 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | |
1652 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1653 | } | |
1654 | ||
87e4f7df TW |
1655 | if (ieee80211_is_back_request(fc)) |
1656 | tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK; | |
1657 | ||
1658 | ||
b481de9c ZY |
1659 | cmd->cmd.tx.sta_id = std_id; |
1660 | if (ieee80211_get_morefrag(hdr)) | |
1661 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | |
1662 | ||
1663 | qc = ieee80211_get_qos_ctrl(hdr); | |
1664 | if (qc) { | |
1665 | cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf); | |
1666 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | |
1667 | } else | |
1668 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1669 | ||
1670 | if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
1671 | tx_flags |= TX_CMD_FLG_RTS_MSK; | |
1672 | tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
1673 | } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) { | |
1674 | tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
1675 | tx_flags |= TX_CMD_FLG_CTS_MSK; | |
1676 | } | |
1677 | ||
1678 | if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) | |
1679 | tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | |
1680 | ||
1681 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | |
1682 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { | |
1683 | if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ || | |
1684 | (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ) | |
bc434dd2 | 1685 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); |
b481de9c | 1686 | else |
bc434dd2 | 1687 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); |
ab53d8af | 1688 | } else { |
b481de9c | 1689 | cmd->cmd.tx.timeout.pm_frame_timeout = 0; |
ab53d8af | 1690 | } |
b481de9c ZY |
1691 | |
1692 | cmd->cmd.tx.driver_txop = 0; | |
1693 | cmd->cmd.tx.tx_flags = tx_flags; | |
1694 | cmd->cmd.tx.next_frame_len = 0; | |
1695 | } | |
19758bef TW |
1696 | static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len) |
1697 | { | |
1698 | /* 0 - mgmt, 1 - cnt, 2 - data */ | |
1699 | int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2; | |
1700 | priv->tx_stats[idx].cnt++; | |
1701 | priv->tx_stats[idx].bytes += len; | |
1702 | } | |
6440adb5 CB |
1703 | /** |
1704 | * iwl4965_get_sta_id - Find station's index within station table | |
1705 | * | |
1706 | * If new IBSS station, create new entry in station table | |
1707 | */ | |
c79dd5b5 | 1708 | static int iwl4965_get_sta_id(struct iwl_priv *priv, |
9fbab516 | 1709 | struct ieee80211_hdr *hdr) |
b481de9c ZY |
1710 | { |
1711 | int sta_id; | |
1712 | u16 fc = le16_to_cpu(hdr->frame_control); | |
0795af57 | 1713 | DECLARE_MAC_BUF(mac); |
b481de9c | 1714 | |
6440adb5 | 1715 | /* If this frame is broadcast or management, use broadcast station id */ |
b481de9c ZY |
1716 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || |
1717 | is_multicast_ether_addr(hdr->addr1)) | |
5425e490 | 1718 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1719 | |
1720 | switch (priv->iw_mode) { | |
1721 | ||
6440adb5 CB |
1722 | /* If we are a client station in a BSS network, use the special |
1723 | * AP station entry (that's the only station we communicate with) */ | |
b481de9c ZY |
1724 | case IEEE80211_IF_TYPE_STA: |
1725 | return IWL_AP_ID; | |
1726 | ||
1727 | /* If we are an AP, then find the station, or use BCAST */ | |
1728 | case IEEE80211_IF_TYPE_AP: | |
947b13a7 | 1729 | sta_id = iwl_find_station(priv, hdr->addr1); |
b481de9c ZY |
1730 | if (sta_id != IWL_INVALID_STATION) |
1731 | return sta_id; | |
5425e490 | 1732 | return priv->hw_params.bcast_sta_id; |
b481de9c | 1733 | |
6440adb5 CB |
1734 | /* If this frame is going out to an IBSS network, find the station, |
1735 | * or create a new station table entry */ | |
b481de9c | 1736 | case IEEE80211_IF_TYPE_IBSS: |
947b13a7 | 1737 | sta_id = iwl_find_station(priv, hdr->addr1); |
b481de9c ZY |
1738 | if (sta_id != IWL_INVALID_STATION) |
1739 | return sta_id; | |
1740 | ||
6440adb5 | 1741 | /* Create new station table entry */ |
67d62035 RR |
1742 | sta_id = iwl4965_add_station_flags(priv, hdr->addr1, |
1743 | 0, CMD_ASYNC, NULL); | |
b481de9c ZY |
1744 | |
1745 | if (sta_id != IWL_INVALID_STATION) | |
1746 | return sta_id; | |
1747 | ||
0795af57 | 1748 | IWL_DEBUG_DROP("Station %s not in station map. " |
b481de9c | 1749 | "Defaulting to broadcast...\n", |
0795af57 | 1750 | print_mac(mac, hdr->addr1)); |
bf403db8 | 1751 | iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
5425e490 | 1752 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1753 | |
1754 | default: | |
01ebd063 | 1755 | IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode); |
5425e490 | 1756 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1757 | } |
1758 | } | |
1759 | ||
1760 | /* | |
1761 | * start REPLY_TX command process | |
1762 | */ | |
c79dd5b5 | 1763 | static int iwl4965_tx_skb(struct iwl_priv *priv, |
b481de9c ZY |
1764 | struct sk_buff *skb, struct ieee80211_tx_control *ctl) |
1765 | { | |
1766 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
1053d35f | 1767 | struct iwl_tfd_frame *tfd; |
b481de9c ZY |
1768 | u32 *control_flags; |
1769 | int txq_id = ctl->queue; | |
bb8c093b CH |
1770 | struct iwl4965_tx_queue *txq = NULL; |
1771 | struct iwl4965_queue *q = NULL; | |
b481de9c ZY |
1772 | dma_addr_t phys_addr; |
1773 | dma_addr_t txcmd_phys; | |
87e4f7df | 1774 | dma_addr_t scratch_phys; |
857485c0 | 1775 | struct iwl_cmd *out_cmd = NULL; |
b481de9c ZY |
1776 | u16 len, idx, len_org; |
1777 | u8 id, hdr_len, unicast; | |
1778 | u8 sta_id; | |
1779 | u16 seq_number = 0; | |
1780 | u16 fc; | |
1781 | __le16 *qc; | |
1782 | u8 wait_write_ptr = 0; | |
1783 | unsigned long flags; | |
1784 | int rc; | |
1785 | ||
1786 | spin_lock_irqsave(&priv->lock, flags); | |
fee1247a | 1787 | if (iwl_is_rfkill(priv)) { |
b481de9c ZY |
1788 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); |
1789 | goto drop_unlock; | |
1790 | } | |
1791 | ||
32bfd35d JB |
1792 | if (!priv->vif) { |
1793 | IWL_DEBUG_DROP("Dropping - !priv->vif\n"); | |
b481de9c ZY |
1794 | goto drop_unlock; |
1795 | } | |
1796 | ||
8318d78a | 1797 | if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) { |
b481de9c ZY |
1798 | IWL_ERROR("ERROR: No TX rate available.\n"); |
1799 | goto drop_unlock; | |
1800 | } | |
1801 | ||
1802 | unicast = !is_multicast_ether_addr(hdr->addr1); | |
1803 | id = 0; | |
1804 | ||
1805 | fc = le16_to_cpu(hdr->frame_control); | |
1806 | ||
0a6857e7 | 1807 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1808 | if (ieee80211_is_auth(fc)) |
1809 | IWL_DEBUG_TX("Sending AUTH frame\n"); | |
1810 | else if (ieee80211_is_assoc_request(fc)) | |
1811 | IWL_DEBUG_TX("Sending ASSOC frame\n"); | |
1812 | else if (ieee80211_is_reassoc_request(fc)) | |
1813 | IWL_DEBUG_TX("Sending REASSOC frame\n"); | |
1814 | #endif | |
1815 | ||
7878a5a4 | 1816 | /* drop all data frame if we are not associated */ |
76f3915b | 1817 | if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) && |
3109ece1 | 1818 | (!iwl_is_associated(priv) || |
a6477249 | 1819 | ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) || |
76f3915b | 1820 | !priv->assoc_station_added)) { |
3109ece1 | 1821 | IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n"); |
b481de9c ZY |
1822 | goto drop_unlock; |
1823 | } | |
1824 | ||
1825 | spin_unlock_irqrestore(&priv->lock, flags); | |
1826 | ||
1827 | hdr_len = ieee80211_get_hdrlen(fc); | |
6440adb5 CB |
1828 | |
1829 | /* Find (or create) index into station table for destination station */ | |
bb8c093b | 1830 | sta_id = iwl4965_get_sta_id(priv, hdr); |
b481de9c | 1831 | if (sta_id == IWL_INVALID_STATION) { |
0795af57 JP |
1832 | DECLARE_MAC_BUF(mac); |
1833 | ||
1834 | IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n", | |
1835 | print_mac(mac, hdr->addr1)); | |
b481de9c ZY |
1836 | goto drop; |
1837 | } | |
1838 | ||
07bc28ed | 1839 | IWL_DEBUG_TX("station Id %d\n", sta_id); |
b481de9c ZY |
1840 | |
1841 | qc = ieee80211_get_qos_ctrl(hdr); | |
1842 | if (qc) { | |
1843 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
1844 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | |
1845 | IEEE80211_SCTL_SEQ; | |
1846 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | |
1847 | (hdr->seq_ctrl & | |
1848 | __constant_cpu_to_le16(IEEE80211_SCTL_FRAG)); | |
1849 | seq_number += 0x10; | |
c8b0e6e1 | 1850 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 1851 | /* aggregation is on for this <sta,tid> */ |
fe01b477 | 1852 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
b481de9c | 1853 | txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; |
fe01b477 | 1854 | priv->stations[sta_id].tid[tid].tfds_in_queue++; |
c8b0e6e1 | 1855 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 1856 | } |
6440adb5 CB |
1857 | |
1858 | /* Descriptor for chosen Tx queue */ | |
b481de9c ZY |
1859 | txq = &priv->txq[txq_id]; |
1860 | q = &txq->q; | |
1861 | ||
1862 | spin_lock_irqsave(&priv->lock, flags); | |
1863 | ||
6440adb5 | 1864 | /* Set up first empty TFD within this queue's circular TFD buffer */ |
fc4b6853 | 1865 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
1866 | memset(tfd, 0, sizeof(*tfd)); |
1867 | control_flags = (u32 *) tfd; | |
fc4b6853 | 1868 | idx = get_cmd_index(q, q->write_ptr, 0); |
b481de9c | 1869 | |
6440adb5 | 1870 | /* Set up driver data for this TFD */ |
bb8c093b | 1871 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info)); |
fc4b6853 TW |
1872 | txq->txb[q->write_ptr].skb[0] = skb; |
1873 | memcpy(&(txq->txb[q->write_ptr].status.control), | |
b481de9c | 1874 | ctl, sizeof(struct ieee80211_tx_control)); |
6440adb5 CB |
1875 | |
1876 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ | |
b481de9c ZY |
1877 | out_cmd = &txq->cmd[idx]; |
1878 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | |
1879 | memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx)); | |
6440adb5 CB |
1880 | |
1881 | /* | |
1882 | * Set up the Tx-command (not MAC!) header. | |
1883 | * Store the chosen Tx queue and TFD index within the sequence field; | |
1884 | * after Tx, uCode's Tx response will return this value so driver can | |
1885 | * locate the frame within the tx queue and do post-tx processing. | |
1886 | */ | |
b481de9c ZY |
1887 | out_cmd->hdr.cmd = REPLY_TX; |
1888 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | |
fc4b6853 | 1889 | INDEX_TO_SEQ(q->write_ptr))); |
6440adb5 CB |
1890 | |
1891 | /* Copy MAC header from skb into command buffer */ | |
b481de9c ZY |
1892 | memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len); |
1893 | ||
6440adb5 CB |
1894 | /* |
1895 | * Use the first empty entry in this queue's command buffer array | |
1896 | * to contain the Tx command and MAC header concatenated together | |
1897 | * (payload data will be in another buffer). | |
1898 | * Size of this varies, due to varying MAC header length. | |
1899 | * If end is not dword aligned, we'll have 2 extra bytes at the end | |
1900 | * of the MAC header (device reads on dword boundaries). | |
1901 | * We'll tell device about this padding later. | |
1902 | */ | |
5425e490 | 1903 | len = priv->hw_params.tx_cmd_len + |
857485c0 | 1904 | sizeof(struct iwl_cmd_header) + hdr_len; |
b481de9c ZY |
1905 | |
1906 | len_org = len; | |
1907 | len = (len + 3) & ~3; | |
1908 | ||
1909 | if (len_org != len) | |
1910 | len_org = 1; | |
1911 | else | |
1912 | len_org = 0; | |
1913 | ||
6440adb5 CB |
1914 | /* Physical address of this Tx command's header (not MAC header!), |
1915 | * within command buffer array. */ | |
857485c0 TW |
1916 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx + |
1917 | offsetof(struct iwl_cmd, hdr); | |
b481de9c | 1918 | |
6440adb5 CB |
1919 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
1920 | * first entry */ | |
bb8c093b | 1921 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
b481de9c ZY |
1922 | |
1923 | if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT)) | |
deb09c43 | 1924 | iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id); |
b481de9c | 1925 | |
6440adb5 CB |
1926 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
1927 | * if any (802.11 null frames have no payload). */ | |
b481de9c ZY |
1928 | len = skb->len - hdr_len; |
1929 | if (len) { | |
1930 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | |
1931 | len, PCI_DMA_TODEVICE); | |
bb8c093b | 1932 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); |
b481de9c ZY |
1933 | } |
1934 | ||
6440adb5 | 1935 | /* Tell 4965 about any 2-byte padding after MAC header */ |
b481de9c ZY |
1936 | if (len_org) |
1937 | out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK; | |
1938 | ||
6440adb5 | 1939 | /* Total # bytes to be transmitted */ |
b481de9c ZY |
1940 | len = (u16)skb->len; |
1941 | out_cmd->cmd.tx.len = cpu_to_le16(len); | |
1942 | ||
1943 | /* TODO need this for burst mode later on */ | |
bb8c093b | 1944 | iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id); |
b481de9c ZY |
1945 | |
1946 | /* set is_hcca to 0; it probably will never be implemented */ | |
bb8c093b | 1947 | iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0); |
b481de9c | 1948 | |
19758bef TW |
1949 | iwl_update_tx_stats(priv, fc, len); |
1950 | ||
857485c0 | 1951 | scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + |
87e4f7df TW |
1952 | offsetof(struct iwl4965_tx_cmd, scratch); |
1953 | out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys); | |
1954 | out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys); | |
1955 | ||
b481de9c ZY |
1956 | if (!ieee80211_get_morefrag(hdr)) { |
1957 | txq->need_update = 1; | |
1958 | if (qc) { | |
1959 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
1960 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | |
1961 | } | |
1962 | } else { | |
1963 | wait_write_ptr = 1; | |
1964 | txq->need_update = 0; | |
1965 | } | |
1966 | ||
bf403db8 | 1967 | iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload, |
b481de9c ZY |
1968 | sizeof(out_cmd->cmd.tx)); |
1969 | ||
bf403db8 | 1970 | iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr, |
b481de9c ZY |
1971 | ieee80211_get_hdrlen(fc)); |
1972 | ||
6440adb5 | 1973 | /* Set up entry for this TFD in Tx byte-count array */ |
e2a722eb | 1974 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len); |
b481de9c | 1975 | |
6440adb5 | 1976 | /* Tell device the write index *just past* this latest filled TFD */ |
c54b679d | 1977 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
bb8c093b | 1978 | rc = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
1979 | spin_unlock_irqrestore(&priv->lock, flags); |
1980 | ||
1981 | if (rc) | |
1982 | return rc; | |
1983 | ||
bb8c093b | 1984 | if ((iwl4965_queue_space(q) < q->high_mark) |
b481de9c ZY |
1985 | && priv->mac80211_registered) { |
1986 | if (wait_write_ptr) { | |
1987 | spin_lock_irqsave(&priv->lock, flags); | |
1988 | txq->need_update = 1; | |
bb8c093b | 1989 | iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
1990 | spin_unlock_irqrestore(&priv->lock, flags); |
1991 | } | |
1992 | ||
1993 | ieee80211_stop_queue(priv->hw, ctl->queue); | |
1994 | } | |
1995 | ||
1996 | return 0; | |
1997 | ||
1998 | drop_unlock: | |
1999 | spin_unlock_irqrestore(&priv->lock, flags); | |
2000 | drop: | |
2001 | return -1; | |
2002 | } | |
2003 | ||
c79dd5b5 | 2004 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 2005 | { |
8318d78a | 2006 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
2007 | struct ieee80211_rate *rate; |
2008 | int i; | |
2009 | ||
d1141dfb | 2010 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
2011 | if (!hw) { |
2012 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
2013 | return; | |
2014 | } | |
b481de9c ZY |
2015 | |
2016 | priv->active_rate = 0; | |
2017 | priv->active_rate_basic = 0; | |
2018 | ||
8318d78a JB |
2019 | for (i = 0; i < hw->n_bitrates; i++) { |
2020 | rate = &(hw->bitrates[i]); | |
2021 | if (rate->hw_value < IWL_RATE_COUNT) | |
2022 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
2023 | } |
2024 | ||
2025 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
2026 | priv->active_rate, priv->active_rate_basic); | |
2027 | ||
2028 | /* | |
2029 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
2030 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
2031 | * OFDM | |
2032 | */ | |
2033 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
2034 | priv->staging_rxon.cck_basic_rates = | |
2035 | ((priv->active_rate_basic & | |
2036 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
2037 | else | |
2038 | priv->staging_rxon.cck_basic_rates = | |
2039 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
2040 | ||
2041 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
2042 | priv->staging_rxon.ofdm_basic_rates = | |
2043 | ((priv->active_rate_basic & | |
2044 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
2045 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
2046 | else | |
2047 | priv->staging_rxon.ofdm_basic_rates = | |
2048 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
2049 | } | |
2050 | ||
ad97edd2 | 2051 | void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio) |
b481de9c ZY |
2052 | { |
2053 | unsigned long flags; | |
2054 | ||
2055 | if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
2056 | return; | |
2057 | ||
2058 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n", | |
2059 | disable_radio ? "OFF" : "ON"); | |
2060 | ||
2061 | if (disable_radio) { | |
bb8c093b | 2062 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
2063 | /* FIXME: This is a workaround for AP */ |
2064 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2065 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2066 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
2067 | CSR_UCODE_SW_BIT_RFKILL); |
2068 | spin_unlock_irqrestore(&priv->lock, flags); | |
ad97edd2 | 2069 | /* call the host command only if no hw rf-kill set */ |
59003835 MA |
2070 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status) && |
2071 | iwl_is_ready(priv)) | |
ad97edd2 MA |
2072 | iwl4965_send_card_state(priv, |
2073 | CARD_STATE_CMD_DISABLE, | |
2074 | 0); | |
b481de9c | 2075 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
ad97edd2 MA |
2076 | |
2077 | /* make sure mac80211 stop sending Tx frame */ | |
2078 | if (priv->mac80211_registered) | |
2079 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2080 | } |
2081 | return; | |
2082 | } | |
2083 | ||
2084 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2085 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
b481de9c ZY |
2086 | |
2087 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
2088 | spin_unlock_irqrestore(&priv->lock, flags); | |
2089 | ||
2090 | /* wake up ucode */ | |
2091 | msleep(10); | |
2092 | ||
2093 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2094 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
2095 | if (!iwl_grab_nic_access(priv)) | |
2096 | iwl_release_nic_access(priv); | |
b481de9c ZY |
2097 | spin_unlock_irqrestore(&priv->lock, flags); |
2098 | ||
2099 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
2100 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2101 | "disabled by HW switch\n"); | |
2102 | return; | |
2103 | } | |
2104 | ||
2105 | queue_work(priv->workqueue, &priv->restart); | |
2106 | return; | |
2107 | } | |
2108 | ||
b481de9c ZY |
2109 | #define IWL_PACKET_RETRY_TIME HZ |
2110 | ||
c79dd5b5 | 2111 | int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
2112 | { |
2113 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
2114 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
2115 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
2116 | u16 *last_seq, *last_frag; | |
2117 | unsigned long *last_time; | |
2118 | ||
2119 | switch (priv->iw_mode) { | |
2120 | case IEEE80211_IF_TYPE_IBSS:{ | |
2121 | struct list_head *p; | |
bb8c093b | 2122 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
2123 | u8 *mac = header->addr2; |
2124 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
2125 | ||
2126 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 2127 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
2128 | if (!compare_ether_addr(entry->mac, mac)) |
2129 | break; | |
2130 | } | |
2131 | if (p == &priv->ibss_mac_hash[index]) { | |
2132 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
2133 | if (!entry) { | |
bc434dd2 | 2134 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
2135 | return 0; |
2136 | } | |
2137 | memcpy(entry->mac, mac, ETH_ALEN); | |
2138 | entry->seq_num = seq; | |
2139 | entry->frag_num = frag; | |
2140 | entry->packet_time = jiffies; | |
bc434dd2 | 2141 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
2142 | return 0; |
2143 | } | |
2144 | last_seq = &entry->seq_num; | |
2145 | last_frag = &entry->frag_num; | |
2146 | last_time = &entry->packet_time; | |
2147 | break; | |
2148 | } | |
2149 | case IEEE80211_IF_TYPE_STA: | |
2150 | last_seq = &priv->last_seq_num; | |
2151 | last_frag = &priv->last_frag_num; | |
2152 | last_time = &priv->last_packet_time; | |
2153 | break; | |
2154 | default: | |
2155 | return 0; | |
2156 | } | |
2157 | if ((*last_seq == seq) && | |
2158 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
2159 | if (*last_frag == frag) | |
2160 | goto drop; | |
2161 | if (*last_frag + 1 != frag) | |
2162 | /* out-of-order fragment */ | |
2163 | goto drop; | |
2164 | } else | |
2165 | *last_seq = seq; | |
2166 | ||
2167 | *last_frag = frag; | |
2168 | *last_time = jiffies; | |
2169 | return 0; | |
2170 | ||
2171 | drop: | |
2172 | return 1; | |
2173 | } | |
2174 | ||
c8b0e6e1 | 2175 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
2176 | |
2177 | #include "iwl-spectrum.h" | |
2178 | ||
2179 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
2180 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
2181 | #define TIME_UNIT 1024 | |
2182 | ||
2183 | /* | |
2184 | * extended beacon time format | |
2185 | * time in usec will be changed into a 32-bit value in 8:24 format | |
2186 | * the high 1 byte is the beacon counts | |
2187 | * the lower 3 bytes is the time in usec within one beacon interval | |
2188 | */ | |
2189 | ||
bb8c093b | 2190 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
2191 | { |
2192 | u32 quot; | |
2193 | u32 rem; | |
2194 | u32 interval = beacon_interval * 1024; | |
2195 | ||
2196 | if (!interval || !usec) | |
2197 | return 0; | |
2198 | ||
2199 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
2200 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
2201 | ||
2202 | return (quot << 24) + rem; | |
2203 | } | |
2204 | ||
2205 | /* base is usually what we get from ucode with each received frame, | |
2206 | * the same as HW timer counter counting down | |
2207 | */ | |
2208 | ||
bb8c093b | 2209 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
2210 | { |
2211 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
2212 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
2213 | u32 interval = beacon_interval * TIME_UNIT; | |
2214 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
2215 | (addon & BEACON_TIME_MASK_HIGH); | |
2216 | ||
2217 | if (base_low > addon_low) | |
2218 | res += base_low - addon_low; | |
2219 | else if (base_low < addon_low) { | |
2220 | res += interval + base_low - addon_low; | |
2221 | res += (1 << 24); | |
2222 | } else | |
2223 | res += (1 << 24); | |
2224 | ||
2225 | return cpu_to_le32(res); | |
2226 | } | |
2227 | ||
c79dd5b5 | 2228 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
2229 | struct ieee80211_measurement_params *params, |
2230 | u8 type) | |
2231 | { | |
bb8c093b | 2232 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 2233 | struct iwl_rx_packet *res; |
857485c0 | 2234 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
2235 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
2236 | .data = (void *)&spectrum, | |
2237 | .meta.flags = CMD_WANT_SKB, | |
2238 | }; | |
2239 | u32 add_time = le64_to_cpu(params->start_time); | |
2240 | int rc; | |
2241 | int spectrum_resp_status; | |
2242 | int duration = le16_to_cpu(params->duration); | |
2243 | ||
3109ece1 | 2244 | if (iwl_is_associated(priv)) |
b481de9c | 2245 | add_time = |
bb8c093b | 2246 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
2247 | le64_to_cpu(params->start_time) - priv->last_tsf, |
2248 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2249 | ||
2250 | memset(&spectrum, 0, sizeof(spectrum)); | |
2251 | ||
2252 | spectrum.channel_count = cpu_to_le16(1); | |
2253 | spectrum.flags = | |
2254 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
2255 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
2256 | cmd.len = sizeof(spectrum); | |
2257 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
2258 | ||
3109ece1 | 2259 | if (iwl_is_associated(priv)) |
b481de9c | 2260 | spectrum.start_time = |
bb8c093b | 2261 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
2262 | add_time, |
2263 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2264 | else | |
2265 | spectrum.start_time = 0; | |
2266 | ||
2267 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
2268 | spectrum.channels[0].channel = params->channel; | |
2269 | spectrum.channels[0].type = type; | |
2270 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
2271 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
2272 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
2273 | ||
857485c0 | 2274 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
2275 | if (rc) |
2276 | return rc; | |
2277 | ||
db11d634 | 2278 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
2279 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
2280 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
2281 | rc = -EIO; | |
2282 | } | |
2283 | ||
2284 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
2285 | switch (spectrum_resp_status) { | |
2286 | case 0: /* Command will be handled */ | |
2287 | if (res->u.spectrum.id != 0xff) { | |
2288 | IWL_DEBUG_INFO | |
2289 | ("Replaced existing measurement: %d\n", | |
2290 | res->u.spectrum.id); | |
2291 | priv->measurement_status &= ~MEASUREMENT_READY; | |
2292 | } | |
2293 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
2294 | rc = 0; | |
2295 | break; | |
2296 | ||
2297 | case 1: /* Command will not be handled */ | |
2298 | rc = -EAGAIN; | |
2299 | break; | |
2300 | } | |
2301 | ||
2302 | dev_kfree_skb_any(cmd.meta.u.skb); | |
2303 | ||
2304 | return rc; | |
2305 | } | |
2306 | #endif | |
2307 | ||
c79dd5b5 | 2308 | static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv, |
bb8c093b | 2309 | struct iwl4965_tx_info *tx_sta) |
b481de9c ZY |
2310 | { |
2311 | ||
2312 | tx_sta->status.ack_signal = 0; | |
2313 | tx_sta->status.excessive_retries = 0; | |
b481de9c ZY |
2314 | |
2315 | if (in_interrupt()) | |
2316 | ieee80211_tx_status_irqsafe(priv->hw, | |
2317 | tx_sta->skb[0], &(tx_sta->status)); | |
2318 | else | |
2319 | ieee80211_tx_status(priv->hw, | |
2320 | tx_sta->skb[0], &(tx_sta->status)); | |
2321 | ||
2322 | tx_sta->skb[0] = NULL; | |
2323 | } | |
2324 | ||
2325 | /** | |
6440adb5 | 2326 | * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd |
b481de9c | 2327 | * |
6440adb5 CB |
2328 | * When FW advances 'R' index, all entries between old and new 'R' index |
2329 | * need to be reclaimed. As result, some free space forms. If there is | |
2330 | * enough free space (> low mark), wake the stack that feeds us. | |
b481de9c | 2331 | */ |
c79dd5b5 | 2332 | int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) |
b481de9c | 2333 | { |
bb8c093b CH |
2334 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
2335 | struct iwl4965_queue *q = &txq->q; | |
b481de9c ZY |
2336 | int nfreed = 0; |
2337 | ||
2338 | if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) { | |
2339 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | |
2340 | "is out of range [0-%d] %d %d.\n", txq_id, | |
fc4b6853 | 2341 | index, q->n_bd, q->write_ptr, q->read_ptr); |
b481de9c ZY |
2342 | return 0; |
2343 | } | |
2344 | ||
c54b679d | 2345 | for (index = iwl_queue_inc_wrap(index, q->n_bd); |
fc4b6853 | 2346 | q->read_ptr != index; |
c54b679d | 2347 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
b481de9c | 2348 | if (txq_id != IWL_CMD_QUEUE_NUM) { |
bb8c093b | 2349 | iwl4965_txstatus_to_ieee(priv, |
fc4b6853 | 2350 | &(txq->txb[txq->q.read_ptr])); |
1053d35f | 2351 | iwl_hw_txq_free_tfd(priv, txq); |
b481de9c ZY |
2352 | } else if (nfreed > 1) { |
2353 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index, | |
fc4b6853 | 2354 | q->write_ptr, q->read_ptr); |
b481de9c ZY |
2355 | queue_work(priv->workqueue, &priv->restart); |
2356 | } | |
2357 | nfreed++; | |
2358 | } | |
2359 | ||
b481de9c ZY |
2360 | return nfreed; |
2361 | } | |
2362 | ||
bb8c093b | 2363 | static int iwl4965_is_tx_success(u32 status) |
b481de9c ZY |
2364 | { |
2365 | status &= TX_STATUS_MSK; | |
2366 | return (status == TX_STATUS_SUCCESS) | |
2367 | || (status == TX_STATUS_DIRECT_DONE); | |
2368 | } | |
2369 | ||
2370 | /****************************************************************************** | |
2371 | * | |
2372 | * Generic RX handler implementations | |
2373 | * | |
2374 | ******************************************************************************/ | |
c8b0e6e1 | 2375 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2376 | |
c79dd5b5 | 2377 | static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv, |
b481de9c ZY |
2378 | struct ieee80211_hdr *hdr) |
2379 | { | |
2380 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) | |
2381 | return IWL_AP_ID; | |
2382 | else { | |
2383 | u8 *da = ieee80211_get_DA(hdr); | |
947b13a7 | 2384 | return iwl_find_station(priv, da); |
b481de9c ZY |
2385 | } |
2386 | } | |
2387 | ||
bb8c093b | 2388 | static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr( |
c79dd5b5 | 2389 | struct iwl_priv *priv, int txq_id, int idx) |
b481de9c ZY |
2390 | { |
2391 | if (priv->txq[txq_id].txb[idx].skb[0]) | |
2392 | return (struct ieee80211_hdr *)priv->txq[txq_id]. | |
2393 | txb[idx].skb[0]->data; | |
2394 | return NULL; | |
2395 | } | |
2396 | ||
bb8c093b | 2397 | static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp) |
b481de9c ZY |
2398 | { |
2399 | __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status + | |
2400 | tx_resp->frame_count); | |
2401 | return le32_to_cpu(*scd_ssn) & MAX_SN; | |
2402 | ||
2403 | } | |
6440adb5 CB |
2404 | |
2405 | /** | |
2406 | * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue | |
2407 | */ | |
c79dd5b5 | 2408 | static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, |
6def9761 | 2409 | struct iwl_ht_agg *agg, |
fe01b477 | 2410 | struct iwl4965_tx_resp_agg *tx_resp, |
b481de9c ZY |
2411 | u16 start_idx) |
2412 | { | |
fe01b477 RR |
2413 | u16 status; |
2414 | struct agg_tx_status *frame_status = &tx_resp->status; | |
b481de9c ZY |
2415 | struct ieee80211_tx_status *tx_status = NULL; |
2416 | struct ieee80211_hdr *hdr = NULL; | |
2417 | int i, sh; | |
2418 | int txq_id, idx; | |
2419 | u16 seq; | |
2420 | ||
2421 | if (agg->wait_for_ba) | |
6440adb5 | 2422 | IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n"); |
b481de9c ZY |
2423 | |
2424 | agg->frame_count = tx_resp->frame_count; | |
2425 | agg->start_idx = start_idx; | |
2426 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 2427 | agg->bitmap = 0; |
b481de9c | 2428 | |
6440adb5 | 2429 | /* # frames attempted by Tx command */ |
b481de9c | 2430 | if (agg->frame_count == 1) { |
6440adb5 | 2431 | /* Only one frame was attempted; no block-ack will arrive */ |
fe01b477 RR |
2432 | status = le16_to_cpu(frame_status[0].status); |
2433 | seq = le16_to_cpu(frame_status[0].sequence); | |
2434 | idx = SEQ_TO_INDEX(seq); | |
2435 | txq_id = SEQ_TO_QUEUE(seq); | |
b481de9c | 2436 | |
b481de9c | 2437 | /* FIXME: code repetition */ |
fe01b477 RR |
2438 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", |
2439 | agg->frame_count, agg->start_idx, idx); | |
b481de9c | 2440 | |
fe01b477 | 2441 | tx_status = &(priv->txq[txq_id].txb[idx].status); |
b481de9c | 2442 | tx_status->retry_count = tx_resp->failure_frame; |
fe01b477 | 2443 | tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU; |
bb8c093b | 2444 | tx_status->flags = iwl4965_is_tx_success(status)? |
b481de9c | 2445 | IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
2446 | iwl4965_hwrate_to_tx_control(priv, |
2447 | le32_to_cpu(tx_resp->rate_n_flags), | |
2448 | &tx_status->control); | |
b481de9c ZY |
2449 | /* FIXME: code repetition end */ |
2450 | ||
2451 | IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n", | |
2452 | status & 0xff, tx_resp->failure_frame); | |
2453 | IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", | |
bb8c093b | 2454 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags)); |
b481de9c ZY |
2455 | |
2456 | agg->wait_for_ba = 0; | |
2457 | } else { | |
6440adb5 | 2458 | /* Two or more frames were attempted; expect block-ack */ |
b481de9c ZY |
2459 | u64 bitmap = 0; |
2460 | int start = agg->start_idx; | |
2461 | ||
6440adb5 | 2462 | /* Construct bit-map of pending frames within Tx window */ |
b481de9c ZY |
2463 | for (i = 0; i < agg->frame_count; i++) { |
2464 | u16 sc; | |
fe01b477 RR |
2465 | status = le16_to_cpu(frame_status[i].status); |
2466 | seq = le16_to_cpu(frame_status[i].sequence); | |
b481de9c ZY |
2467 | idx = SEQ_TO_INDEX(seq); |
2468 | txq_id = SEQ_TO_QUEUE(seq); | |
2469 | ||
2470 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
2471 | AGG_TX_STATE_ABORT_MSK)) | |
2472 | continue; | |
2473 | ||
2474 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", | |
2475 | agg->frame_count, txq_id, idx); | |
2476 | ||
bb8c093b | 2477 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx); |
b481de9c ZY |
2478 | |
2479 | sc = le16_to_cpu(hdr->seq_ctrl); | |
2480 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
2481 | IWL_ERROR("BUG_ON idx doesn't match seq control" | |
2482 | " idx=%d, seq_idx=%d, seq=%d\n", | |
2483 | idx, SEQ_TO_SN(sc), | |
2484 | hdr->seq_ctrl); | |
2485 | return -1; | |
2486 | } | |
2487 | ||
2488 | IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", | |
2489 | i, idx, SEQ_TO_SN(sc)); | |
2490 | ||
2491 | sh = idx - start; | |
2492 | if (sh > 64) { | |
2493 | sh = (start - idx) + 0xff; | |
2494 | bitmap = bitmap << sh; | |
2495 | sh = 0; | |
2496 | start = idx; | |
2497 | } else if (sh < -64) | |
2498 | sh = 0xff - (start - idx); | |
2499 | else if (sh < 0) { | |
2500 | sh = start - idx; | |
2501 | start = idx; | |
2502 | bitmap = bitmap << sh; | |
2503 | sh = 0; | |
2504 | } | |
2505 | bitmap |= (1 << sh); | |
2506 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | |
2507 | start, (u32)(bitmap & 0xFFFFFFFF)); | |
2508 | } | |
2509 | ||
fe01b477 | 2510 | agg->bitmap = bitmap; |
b481de9c ZY |
2511 | agg->start_idx = start; |
2512 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 2513 | IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", |
b481de9c | 2514 | agg->frame_count, agg->start_idx, |
06501d29 | 2515 | (unsigned long long)agg->bitmap); |
b481de9c ZY |
2516 | |
2517 | if (bitmap) | |
2518 | agg->wait_for_ba = 1; | |
2519 | } | |
2520 | return 0; | |
2521 | } | |
2522 | #endif | |
b481de9c | 2523 | |
6440adb5 CB |
2524 | /** |
2525 | * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response | |
2526 | */ | |
c79dd5b5 | 2527 | static void iwl4965_rx_reply_tx(struct iwl_priv *priv, |
a55360e4 | 2528 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2529 | { |
db11d634 | 2530 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2531 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
2532 | int txq_id = SEQ_TO_QUEUE(sequence); | |
2533 | int index = SEQ_TO_INDEX(sequence); | |
bb8c093b | 2534 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
b481de9c | 2535 | struct ieee80211_tx_status *tx_status; |
bb8c093b | 2536 | struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
b481de9c | 2537 | u32 status = le32_to_cpu(tx_resp->status); |
c8b0e6e1 | 2538 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2539 | int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION; |
2540 | struct ieee80211_hdr *hdr; | |
2541 | __le16 *qc; | |
b481de9c ZY |
2542 | #endif |
2543 | ||
2544 | if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) { | |
2545 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | |
2546 | "is out of range [0-%d] %d %d\n", txq_id, | |
fc4b6853 TW |
2547 | index, txq->q.n_bd, txq->q.write_ptr, |
2548 | txq->q.read_ptr); | |
b481de9c ZY |
2549 | return; |
2550 | } | |
2551 | ||
c8b0e6e1 | 2552 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2553 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index); |
2554 | qc = ieee80211_get_qos_ctrl(hdr); | |
2555 | ||
2556 | if (qc) | |
2557 | tid = le16_to_cpu(*qc) & 0xf; | |
2558 | ||
2559 | sta_id = iwl4965_get_ra_sta_id(priv, hdr); | |
2560 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { | |
2561 | IWL_ERROR("Station not known\n"); | |
2562 | return; | |
2563 | } | |
2564 | ||
b481de9c | 2565 | if (txq->sched_retry) { |
bb8c093b | 2566 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); |
6def9761 | 2567 | struct iwl_ht_agg *agg = NULL; |
b481de9c | 2568 | |
fe01b477 | 2569 | if (!qc) |
b481de9c | 2570 | return; |
b481de9c ZY |
2571 | |
2572 | agg = &priv->stations[sta_id].tid[tid].agg; | |
2573 | ||
fe01b477 RR |
2574 | iwl4965_tx_status_reply_tx(priv, agg, |
2575 | (struct iwl4965_tx_resp_agg *)tx_resp, index); | |
b481de9c ZY |
2576 | |
2577 | if ((tx_resp->frame_count == 1) && | |
bb8c093b | 2578 | !iwl4965_is_tx_success(status)) { |
b481de9c ZY |
2579 | /* TODO: send BAR */ |
2580 | } | |
2581 | ||
fe01b477 | 2582 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { |
0d0b2c1c | 2583 | int freed, ampdu_q; |
c54b679d | 2584 | index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd); |
b481de9c ZY |
2585 | IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn " |
2586 | "%d index %d\n", scd_ssn , index); | |
fe01b477 RR |
2587 | freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); |
2588 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
2589 | ||
2590 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
2591 | txq_id >= 0 && priv->mac80211_registered && | |
0d0b2c1c RR |
2592 | agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) { |
2593 | /* calculate mac80211 ampdu sw queue to wake */ | |
2594 | ampdu_q = txq_id - IWL_BACK_QUEUE_FIRST_ID + | |
2595 | priv->hw->queues; | |
2596 | if (agg->state == IWL_AGG_OFF) | |
2597 | ieee80211_wake_queue(priv->hw, txq_id); | |
2598 | else | |
2599 | ieee80211_wake_queue(priv->hw, ampdu_q); | |
2600 | } | |
fe01b477 | 2601 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); |
b481de9c ZY |
2602 | } |
2603 | } else { | |
c8b0e6e1 | 2604 | #endif /* CONFIG_IWL4965_HT */ |
fc4b6853 | 2605 | tx_status = &(txq->txb[txq->q.read_ptr].status); |
b481de9c ZY |
2606 | |
2607 | tx_status->retry_count = tx_resp->failure_frame; | |
b481de9c | 2608 | tx_status->flags = |
bb8c093b | 2609 | iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
2610 | iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags), |
2611 | &tx_status->control); | |
b481de9c | 2612 | |
b481de9c | 2613 | IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x " |
bb8c093b | 2614 | "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status), |
b481de9c ZY |
2615 | status, le32_to_cpu(tx_resp->rate_n_flags), |
2616 | tx_resp->failure_frame); | |
2617 | ||
2618 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); | |
47c5196e | 2619 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2620 | if (index != -1) { |
2621 | int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); | |
fe01b477 RR |
2622 | if (tid != MAX_TID_COUNT) |
2623 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
2624 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
0d0b2c1c | 2625 | (txq_id >= 0) && priv->mac80211_registered) |
fe01b477 RR |
2626 | ieee80211_wake_queue(priv->hw, txq_id); |
2627 | if (tid != MAX_TID_COUNT) | |
2628 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); | |
fe01b477 | 2629 | } |
b481de9c | 2630 | } |
c8b0e6e1 | 2631 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c ZY |
2632 | |
2633 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | |
2634 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | |
2635 | } | |
2636 | ||
2637 | ||
c79dd5b5 | 2638 | static void iwl4965_rx_reply_alive(struct iwl_priv *priv, |
a55360e4 | 2639 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2640 | { |
db11d634 | 2641 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2642 | struct iwl4965_alive_resp *palive; |
b481de9c ZY |
2643 | struct delayed_work *pwork; |
2644 | ||
2645 | palive = &pkt->u.alive_frame; | |
2646 | ||
2647 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
2648 | "0x%01X 0x%01X\n", | |
2649 | palive->is_valid, palive->ver_type, | |
2650 | palive->ver_subtype); | |
2651 | ||
2652 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
2653 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
2654 | memcpy(&priv->card_alive_init, | |
2655 | &pkt->u.alive_frame, | |
bb8c093b | 2656 | sizeof(struct iwl4965_init_alive_resp)); |
b481de9c ZY |
2657 | pwork = &priv->init_alive_start; |
2658 | } else { | |
2659 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2660 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
bb8c093b | 2661 | sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
2662 | pwork = &priv->alive_start; |
2663 | } | |
2664 | ||
2665 | /* We delay the ALIVE response by 5ms to | |
2666 | * give the HW RF Kill time to activate... */ | |
2667 | if (palive->is_valid == UCODE_VALID_OK) | |
2668 | queue_delayed_work(priv->workqueue, pwork, | |
2669 | msecs_to_jiffies(5)); | |
2670 | else | |
2671 | IWL_WARNING("uCode did not respond OK.\n"); | |
2672 | } | |
2673 | ||
c79dd5b5 | 2674 | static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv, |
a55360e4 | 2675 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2676 | { |
db11d634 | 2677 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2678 | |
2679 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | |
2680 | return; | |
2681 | } | |
2682 | ||
c79dd5b5 | 2683 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 2684 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2685 | { |
db11d634 | 2686 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2687 | |
2688 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
2689 | "seq 0x%04X ser 0x%08X\n", | |
2690 | le32_to_cpu(pkt->u.err_resp.error_type), | |
2691 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
2692 | pkt->u.err_resp.cmd_id, | |
2693 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
2694 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
2695 | } | |
2696 | ||
2697 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
2698 | ||
a55360e4 | 2699 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2700 | { |
db11d634 | 2701 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2702 | struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon; |
2703 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); | |
b481de9c ZY |
2704 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
2705 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
2706 | rxon->channel = csa->channel; | |
2707 | priv->staging_rxon.channel = csa->channel; | |
2708 | } | |
2709 | ||
c79dd5b5 | 2710 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 2711 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2712 | { |
c8b0e6e1 | 2713 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
db11d634 | 2714 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2715 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
2716 | |
2717 | if (!report->state) { | |
2718 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, | |
2719 | "Spectrum Measure Notification: Start\n"); | |
2720 | return; | |
2721 | } | |
2722 | ||
2723 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
2724 | priv->measurement_status |= MEASUREMENT_READY; | |
2725 | #endif | |
2726 | } | |
2727 | ||
c79dd5b5 | 2728 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 2729 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2730 | { |
0a6857e7 | 2731 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 2732 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2733 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
2734 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
2735 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
2736 | #endif | |
2737 | } | |
2738 | ||
c79dd5b5 | 2739 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 2740 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2741 | { |
db11d634 | 2742 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2743 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
2744 | "notification for %s:\n", | |
2745 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 2746 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
2747 | } |
2748 | ||
bb8c093b | 2749 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 2750 | { |
c79dd5b5 TW |
2751 | struct iwl_priv *priv = |
2752 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
2753 | struct sk_buff *beacon; |
2754 | ||
2755 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
32bfd35d | 2756 | beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL); |
b481de9c ZY |
2757 | |
2758 | if (!beacon) { | |
2759 | IWL_ERROR("update beacon failed\n"); | |
2760 | return; | |
2761 | } | |
2762 | ||
2763 | mutex_lock(&priv->mutex); | |
2764 | /* new beacon skb is allocated every time; dispose previous.*/ | |
2765 | if (priv->ibss_beacon) | |
2766 | dev_kfree_skb(priv->ibss_beacon); | |
2767 | ||
2768 | priv->ibss_beacon = beacon; | |
2769 | mutex_unlock(&priv->mutex); | |
2770 | ||
bb8c093b | 2771 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2772 | } |
2773 | ||
c79dd5b5 | 2774 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 2775 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2776 | { |
0a6857e7 | 2777 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 2778 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2779 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
2780 | u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | |
b481de9c ZY |
2781 | |
2782 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
2783 | "tsf %d %d rate %d\n", | |
2784 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | |
2785 | beacon->beacon_notify_hdr.failure_frame, | |
2786 | le32_to_cpu(beacon->ibss_mgr_status), | |
2787 | le32_to_cpu(beacon->high_tsf), | |
2788 | le32_to_cpu(beacon->low_tsf), rate); | |
2789 | #endif | |
2790 | ||
2791 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
2792 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
2793 | queue_work(priv->workqueue, &priv->beacon_update); | |
2794 | } | |
2795 | ||
2796 | /* Service response to REPLY_SCAN_CMD (0x80) */ | |
c79dd5b5 | 2797 | static void iwl4965_rx_reply_scan(struct iwl_priv *priv, |
a55360e4 | 2798 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2799 | { |
0a6857e7 | 2800 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 2801 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2802 | struct iwl4965_scanreq_notification *notif = |
2803 | (struct iwl4965_scanreq_notification *)pkt->u.raw; | |
b481de9c ZY |
2804 | |
2805 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); | |
2806 | #endif | |
2807 | } | |
2808 | ||
2809 | /* Service SCAN_START_NOTIFICATION (0x82) */ | |
c79dd5b5 | 2810 | static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv, |
a55360e4 | 2811 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2812 | { |
db11d634 | 2813 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2814 | struct iwl4965_scanstart_notification *notif = |
2815 | (struct iwl4965_scanstart_notification *)pkt->u.raw; | |
b481de9c ZY |
2816 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
2817 | IWL_DEBUG_SCAN("Scan start: " | |
2818 | "%d [802.11%s] " | |
2819 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", | |
2820 | notif->channel, | |
2821 | notif->band ? "bg" : "a", | |
2822 | notif->tsf_high, | |
2823 | notif->tsf_low, notif->status, notif->beacon_timer); | |
2824 | } | |
2825 | ||
2826 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ | |
c79dd5b5 | 2827 | static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv, |
a55360e4 | 2828 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2829 | { |
db11d634 | 2830 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2831 | struct iwl4965_scanresults_notification *notif = |
2832 | (struct iwl4965_scanresults_notification *)pkt->u.raw; | |
b481de9c ZY |
2833 | |
2834 | IWL_DEBUG_SCAN("Scan ch.res: " | |
2835 | "%d [802.11%s] " | |
2836 | "(TSF: 0x%08X:%08X) - %d " | |
2837 | "elapsed=%lu usec (%dms since last)\n", | |
2838 | notif->channel, | |
2839 | notif->band ? "bg" : "a", | |
2840 | le32_to_cpu(notif->tsf_high), | |
2841 | le32_to_cpu(notif->tsf_low), | |
2842 | le32_to_cpu(notif->statistics[0]), | |
2843 | le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf, | |
2844 | jiffies_to_msecs(elapsed_jiffies | |
2845 | (priv->last_scan_jiffies, jiffies))); | |
2846 | ||
2847 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 2848 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
2849 | } |
2850 | ||
2851 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ | |
c79dd5b5 | 2852 | static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv, |
a55360e4 | 2853 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2854 | { |
db11d634 | 2855 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2856 | struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw; |
b481de9c ZY |
2857 | |
2858 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | |
2859 | scan_notif->scanned_channels, | |
2860 | scan_notif->tsf_low, | |
2861 | scan_notif->tsf_high, scan_notif->status); | |
2862 | ||
2863 | /* The HW is no longer scanning */ | |
2864 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
2865 | ||
2866 | /* The scan completion notification came in, so kill that timer... */ | |
2867 | cancel_delayed_work(&priv->scan_check); | |
2868 | ||
2869 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | |
2870 | (priv->scan_bands == 2) ? "2.4" : "5.2", | |
2871 | jiffies_to_msecs(elapsed_jiffies | |
2872 | (priv->scan_pass_start, jiffies))); | |
2873 | ||
2874 | /* Remove this scanned band from the list | |
2875 | * of pending bands to scan */ | |
2876 | priv->scan_bands--; | |
2877 | ||
2878 | /* If a request to abort was given, or the scan did not succeed | |
2879 | * then we reset the scan state machine and terminate, | |
2880 | * re-queuing another scan if one has been requested */ | |
2881 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
2882 | IWL_DEBUG_INFO("Aborted scan completed.\n"); | |
2883 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
2884 | } else { | |
2885 | /* If there are more bands on this scan pass reschedule */ | |
2886 | if (priv->scan_bands > 0) | |
2887 | goto reschedule; | |
2888 | } | |
2889 | ||
2890 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 2891 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
2892 | IWL_DEBUG_INFO("Setting scan to off\n"); |
2893 | ||
2894 | clear_bit(STATUS_SCANNING, &priv->status); | |
2895 | ||
2896 | IWL_DEBUG_INFO("Scan took %dms\n", | |
2897 | jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies))); | |
2898 | ||
2899 | queue_work(priv->workqueue, &priv->scan_completed); | |
2900 | ||
2901 | return; | |
2902 | ||
2903 | reschedule: | |
2904 | priv->scan_pass_start = jiffies; | |
2905 | queue_work(priv->workqueue, &priv->request_scan); | |
2906 | } | |
2907 | ||
2908 | /* Handle notification from uCode that card's power state is changing | |
2909 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 2910 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 2911 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2912 | { |
db11d634 | 2913 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2914 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
2915 | unsigned long status = priv->status; | |
2916 | ||
2917 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
2918 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
2919 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
2920 | ||
2921 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
2922 | RF_CARD_DISABLED)) { | |
2923 | ||
3395f6e9 | 2924 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
2925 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2926 | ||
3395f6e9 TW |
2927 | if (!iwl_grab_nic_access(priv)) { |
2928 | iwl_write_direct32( | |
b481de9c ZY |
2929 | priv, HBUS_TARG_MBX_C, |
2930 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
2931 | ||
3395f6e9 | 2932 | iwl_release_nic_access(priv); |
b481de9c ZY |
2933 | } |
2934 | ||
2935 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 2936 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 2937 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
2938 | if (!iwl_grab_nic_access(priv)) { |
2939 | iwl_write_direct32( | |
b481de9c ZY |
2940 | priv, HBUS_TARG_MBX_C, |
2941 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
2942 | ||
3395f6e9 | 2943 | iwl_release_nic_access(priv); |
b481de9c ZY |
2944 | } |
2945 | } | |
2946 | ||
2947 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 2948 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 2949 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
2950 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
2951 | if (!iwl_grab_nic_access(priv)) | |
2952 | iwl_release_nic_access(priv); | |
b481de9c ZY |
2953 | } |
2954 | } | |
2955 | ||
2956 | if (flags & HW_CARD_DISABLED) | |
2957 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
2958 | else | |
2959 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
2960 | ||
2961 | ||
2962 | if (flags & SW_CARD_DISABLED) | |
2963 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
2964 | else | |
2965 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
2966 | ||
2967 | if (!(flags & RXON_CARD_DISABLED)) | |
bb8c093b | 2968 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
2969 | |
2970 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
2971 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
2972 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
2973 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
2974 | queue_work(priv->workqueue, &priv->rf_kill); | |
2975 | else | |
2976 | wake_up_interruptible(&priv->wait_command_queue); | |
2977 | } | |
2978 | ||
2979 | /** | |
bb8c093b | 2980 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
2981 | * |
2982 | * Setup the RX handlers for each of the reply types sent from the uCode | |
2983 | * to the host. | |
2984 | * | |
2985 | * This function chains into the hardware specific files for them to setup | |
2986 | * any hardware specific handlers as well. | |
2987 | */ | |
c79dd5b5 | 2988 | static void iwl4965_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 2989 | { |
bb8c093b CH |
2990 | priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive; |
2991 | priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta; | |
2992 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; | |
2993 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 2994 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
2995 | iwl4965_rx_spectrum_measure_notif; |
2996 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 2997 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
2998 | iwl4965_rx_pm_debug_statistics_notif; |
2999 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 3000 | |
9fbab516 BC |
3001 | /* |
3002 | * The same handler is used for both the REPLY to a discrete | |
3003 | * statistics request from the host as well as for the periodic | |
3004 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 3005 | */ |
bb8c093b CH |
3006 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
3007 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
b481de9c | 3008 | |
bb8c093b CH |
3009 | priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan; |
3010 | priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif; | |
b481de9c | 3011 | priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] = |
bb8c093b | 3012 | iwl4965_rx_scan_results_notif; |
b481de9c | 3013 | priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] = |
bb8c093b CH |
3014 | iwl4965_rx_scan_complete_notif; |
3015 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; | |
3016 | priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx; | |
b481de9c | 3017 | |
9fbab516 | 3018 | /* Set up hardware specific Rx handlers */ |
d4789efe | 3019 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
3020 | } |
3021 | ||
3022 | /** | |
bb8c093b | 3023 | * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them |
b481de9c ZY |
3024 | * @rxb: Rx buffer to reclaim |
3025 | * | |
3026 | * If an Rx buffer has an async callback associated with it the callback | |
3027 | * will be executed. The attached skb (if present) will only be freed | |
3028 | * if the callback returns 1 | |
3029 | */ | |
c79dd5b5 | 3030 | static void iwl4965_tx_cmd_complete(struct iwl_priv *priv, |
a55360e4 | 3031 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 3032 | { |
db11d634 | 3033 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3034 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3035 | int txq_id = SEQ_TO_QUEUE(sequence); | |
3036 | int index = SEQ_TO_INDEX(sequence); | |
3037 | int huge = sequence & SEQ_HUGE_FRAME; | |
3038 | int cmd_index; | |
857485c0 | 3039 | struct iwl_cmd *cmd; |
b481de9c ZY |
3040 | |
3041 | /* If a Tx command is being handled and it isn't in the actual | |
3042 | * command queue then there a command routing bug has been introduced | |
3043 | * in the queue management code. */ | |
3044 | if (txq_id != IWL_CMD_QUEUE_NUM) | |
3045 | IWL_ERROR("Error wrong command queue %d command id 0x%X\n", | |
3046 | txq_id, pkt->hdr.cmd); | |
3047 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | |
3048 | ||
3049 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | |
3050 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | |
3051 | ||
3052 | /* Input error checking is done when commands are added to queue. */ | |
3053 | if (cmd->meta.flags & CMD_WANT_SKB) { | |
3054 | cmd->meta.source->u.skb = rxb->skb; | |
3055 | rxb->skb = NULL; | |
3056 | } else if (cmd->meta.u.callback && | |
3057 | !cmd->meta.u.callback(priv, cmd, rxb->skb)) | |
3058 | rxb->skb = NULL; | |
3059 | ||
bb8c093b | 3060 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
b481de9c ZY |
3061 | |
3062 | if (!(cmd->meta.flags & CMD_ASYNC)) { | |
3063 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
3064 | wake_up_interruptible(&priv->wait_command_queue); | |
3065 | } | |
3066 | } | |
3067 | ||
5c0eef96 MA |
3068 | /* |
3069 | * this should be called while priv->lock is locked | |
3070 | */ | |
a55360e4 | 3071 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 3072 | { |
a55360e4 TW |
3073 | iwl_rx_allocate(priv); |
3074 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
3075 | } |
3076 | ||
b481de9c ZY |
3077 | |
3078 | /** | |
a55360e4 | 3079 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
3080 | * |
3081 | * Uses the priv->rx_handlers callback function array to invoke | |
3082 | * the appropriate handlers, including command responses, | |
3083 | * frame-received notifications, and other notifications. | |
3084 | */ | |
a55360e4 | 3085 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 3086 | { |
a55360e4 | 3087 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 3088 | struct iwl_rx_packet *pkt; |
a55360e4 | 3089 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
3090 | u32 r, i; |
3091 | int reclaim; | |
3092 | unsigned long flags; | |
5c0eef96 | 3093 | u8 fill_rx = 0; |
d68ab680 | 3094 | u32 count = 8; |
b481de9c | 3095 | |
6440adb5 CB |
3096 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
3097 | * buffer that the driver may process (last buffer filled by ucode). */ | |
bb8c093b | 3098 | r = iwl4965_hw_get_rx_read(priv); |
b481de9c ZY |
3099 | i = rxq->read; |
3100 | ||
3101 | /* Rx interrupt, but nothing sent from uCode */ | |
3102 | if (i == r) | |
3103 | IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i); | |
3104 | ||
a55360e4 | 3105 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
3106 | fill_rx = 1; |
3107 | ||
b481de9c ZY |
3108 | while (i != r) { |
3109 | rxb = rxq->queue[i]; | |
3110 | ||
9fbab516 | 3111 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
3112 | * then a bug has been introduced in the queue refilling |
3113 | * routines -- catch it here */ | |
3114 | BUG_ON(rxb == NULL); | |
3115 | ||
3116 | rxq->queue[i] = NULL; | |
3117 | ||
3118 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 3119 | priv->hw_params.rx_buf_size, |
b481de9c | 3120 | PCI_DMA_FROMDEVICE); |
db11d634 | 3121 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3122 | |
3123 | /* Reclaim a command buffer only if this packet is a response | |
3124 | * to a (driver-originated) command. | |
3125 | * If the packet (e.g. Rx frame) originated from uCode, | |
3126 | * there is no command buffer to reclaim. | |
3127 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
3128 | * but apparently a few don't get set; catch them here. */ | |
3129 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
3130 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 3131 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 3132 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
3133 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
3134 | (pkt->hdr.cmd != REPLY_TX); | |
3135 | ||
3136 | /* Based on type of command response or notification, | |
3137 | * handle those that need handling via function in | |
bb8c093b | 3138 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c ZY |
3139 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
3140 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
3141 | "r = %d, i = %d, %s, 0x%02x\n", r, i, | |
3142 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
3143 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | |
3144 | } else { | |
3145 | /* No handling needed */ | |
3146 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
3147 | "r %d i %d No handler needed for %s, 0x%02x\n", | |
3148 | r, i, get_cmd_string(pkt->hdr.cmd), | |
3149 | pkt->hdr.cmd); | |
3150 | } | |
3151 | ||
3152 | if (reclaim) { | |
9fbab516 | 3153 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 3154 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
3155 | * as we reclaim the driver command queue */ |
3156 | if (rxb && rxb->skb) | |
bb8c093b | 3157 | iwl4965_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
3158 | else |
3159 | IWL_WARNING("Claim null rxb?\n"); | |
3160 | } | |
3161 | ||
3162 | /* For now we just don't re-use anything. We can tweak this | |
3163 | * later to try and re-use notification packets and SKBs that | |
3164 | * fail to Rx correctly */ | |
3165 | if (rxb->skb != NULL) { | |
3166 | priv->alloc_rxb_skb--; | |
3167 | dev_kfree_skb_any(rxb->skb); | |
3168 | rxb->skb = NULL; | |
3169 | } | |
3170 | ||
3171 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 3172 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 3173 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3174 | spin_lock_irqsave(&rxq->lock, flags); |
3175 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
3176 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3177 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
3178 | /* If there are a lot of unused frames, |
3179 | * restock the Rx queue so ucode wont assert. */ | |
3180 | if (fill_rx) { | |
3181 | count++; | |
3182 | if (count >= 8) { | |
3183 | priv->rxq.read = i; | |
a55360e4 | 3184 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
3185 | count = 0; |
3186 | } | |
3187 | } | |
b481de9c ZY |
3188 | } |
3189 | ||
3190 | /* Backtrack one entry */ | |
3191 | priv->rxq.read = i; | |
a55360e4 TW |
3192 | iwl_rx_queue_restock(priv); |
3193 | } | |
3194 | /* Convert linear signal-to-noise ratio into dB */ | |
3195 | static u8 ratio2dB[100] = { | |
3196 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
3197 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
3198 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
3199 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
3200 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
3201 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
3202 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
3203 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
3204 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
3205 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
3206 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
3207 | }; | |
3208 | ||
3209 | /* Calculates a relative dB value from a ratio of linear | |
3210 | * (i.e. not dB) signal levels. | |
3211 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
3212 | int iwl4965_calc_db_from_ratio(int sig_ratio) | |
3213 | { | |
3214 | /* 1000:1 or higher just report as 60 dB */ | |
3215 | if (sig_ratio >= 1000) | |
3216 | return 60; | |
3217 | ||
3218 | /* 100:1 or higher, divide by 10 and use table, | |
3219 | * add 20 dB to make up for divide by 10 */ | |
3220 | if (sig_ratio >= 100) | |
3221 | return (20 + (int)ratio2dB[sig_ratio/10]); | |
3222 | ||
3223 | /* We shouldn't see this */ | |
3224 | if (sig_ratio < 1) | |
3225 | return 0; | |
3226 | ||
3227 | /* Use table for ratios 1:1 - 99:1 */ | |
3228 | return (int)ratio2dB[sig_ratio]; | |
3229 | } | |
3230 | ||
3231 | #define PERFECT_RSSI (-20) /* dBm */ | |
3232 | #define WORST_RSSI (-95) /* dBm */ | |
3233 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
3234 | ||
3235 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
3236 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
3237 | * about formulas used below. */ | |
3238 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) | |
3239 | { | |
3240 | int sig_qual; | |
3241 | int degradation = PERFECT_RSSI - rssi_dbm; | |
3242 | ||
3243 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
3244 | * as indicator; formula is (signal dbm - noise dbm). | |
3245 | * SNR at or above 40 is a great signal (100%). | |
3246 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
3247 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
3248 | if (noise_dbm) { | |
3249 | if (rssi_dbm - noise_dbm >= 40) | |
3250 | return 100; | |
3251 | else if (rssi_dbm < noise_dbm) | |
3252 | return 0; | |
3253 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
3254 | ||
3255 | /* Else use just the signal level. | |
3256 | * This formula is a least squares fit of data points collected and | |
3257 | * compared with a reference system that had a percentage (%) display | |
3258 | * for signal quality. */ | |
3259 | } else | |
3260 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
3261 | (15 * RSSI_RANGE + 62 * degradation)) / | |
3262 | (RSSI_RANGE * RSSI_RANGE); | |
3263 | ||
3264 | if (sig_qual > 100) | |
3265 | sig_qual = 100; | |
3266 | else if (sig_qual < 1) | |
3267 | sig_qual = 0; | |
3268 | ||
3269 | return sig_qual; | |
b481de9c ZY |
3270 | } |
3271 | ||
6440adb5 CB |
3272 | /** |
3273 | * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware | |
3274 | */ | |
c79dd5b5 | 3275 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 3276 | struct iwl4965_tx_queue *txq) |
b481de9c ZY |
3277 | { |
3278 | u32 reg = 0; | |
3279 | int rc = 0; | |
3280 | int txq_id = txq->q.id; | |
3281 | ||
3282 | if (txq->need_update == 0) | |
3283 | return rc; | |
3284 | ||
3285 | /* if we're trying to save power */ | |
3286 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | |
3287 | /* wake up nic if it's powered down ... | |
3288 | * uCode will wake up, and interrupt us again, so next | |
3289 | * time we'll skip this part. */ | |
3395f6e9 | 3290 | reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
3291 | |
3292 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
3293 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | |
3395f6e9 | 3294 | iwl_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
3295 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
3296 | return rc; | |
3297 | } | |
3298 | ||
3299 | /* restore this queue's parameters in nic hardware. */ | |
3395f6e9 | 3300 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3301 | if (rc) |
3302 | return rc; | |
3395f6e9 | 3303 | iwl_write_direct32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 3304 | txq->q.write_ptr | (txq_id << 8)); |
3395f6e9 | 3305 | iwl_release_nic_access(priv); |
b481de9c ZY |
3306 | |
3307 | /* else not in power-save mode, uCode will never sleep when we're | |
3308 | * trying to tx (during RFKILL, we're not trying to tx). */ | |
3309 | } else | |
3395f6e9 | 3310 | iwl_write32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 3311 | txq->q.write_ptr | (txq_id << 8)); |
b481de9c ZY |
3312 | |
3313 | txq->need_update = 0; | |
3314 | ||
3315 | return rc; | |
3316 | } | |
3317 | ||
0a6857e7 | 3318 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3319 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 3320 | { |
bf403db8 | 3321 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 JP |
3322 | DECLARE_MAC_BUF(mac); |
3323 | ||
b481de9c | 3324 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 3325 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
3326 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
3327 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
3328 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
3329 | le32_to_cpu(rxon->filter_flags)); | |
3330 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
3331 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
3332 | rxon->ofdm_basic_rates); | |
3333 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
3334 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
3335 | print_mac(mac, rxon->node_addr)); | |
3336 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
3337 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
3338 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
3339 | } | |
3340 | #endif | |
3341 | ||
c79dd5b5 | 3342 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
3343 | { |
3344 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
3345 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 3346 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
3347 | } |
3348 | ||
0359facc MA |
3349 | /* call this function to flush any scheduled tasklet */ |
3350 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
3351 | { | |
3352 | /* wait to make sure we flush pedding tasklet*/ | |
3353 | synchronize_irq(priv->pci_dev->irq); | |
3354 | tasklet_kill(&priv->irq_tasklet); | |
3355 | } | |
3356 | ||
c79dd5b5 | 3357 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
3358 | { |
3359 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
3360 | ||
3361 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 3362 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
3363 | |
3364 | /* acknowledge/clear/reset any interrupts still pending | |
3365 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
3366 | iwl_write32(priv, CSR_INT, 0xffffffff); |
3367 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
3368 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
3369 | } | |
3370 | ||
3371 | static const char *desc_lookup(int i) | |
3372 | { | |
3373 | switch (i) { | |
3374 | case 1: | |
3375 | return "FAIL"; | |
3376 | case 2: | |
3377 | return "BAD_PARAM"; | |
3378 | case 3: | |
3379 | return "BAD_CHECKSUM"; | |
3380 | case 4: | |
3381 | return "NMI_INTERRUPT"; | |
3382 | case 5: | |
3383 | return "SYSASSERT"; | |
3384 | case 6: | |
3385 | return "FATAL_ERROR"; | |
3386 | } | |
3387 | ||
3388 | return "UNKNOWN"; | |
3389 | } | |
3390 | ||
3391 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
3392 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
3393 | ||
c79dd5b5 | 3394 | static void iwl4965_dump_nic_error_log(struct iwl_priv *priv) |
b481de9c ZY |
3395 | { |
3396 | u32 data2, line; | |
3397 | u32 desc, time, count, base, data1; | |
3398 | u32 blink1, blink2, ilink1, ilink2; | |
3399 | int rc; | |
3400 | ||
3401 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | |
3402 | ||
57aab75a | 3403 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
b481de9c ZY |
3404 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); |
3405 | return; | |
3406 | } | |
3407 | ||
3395f6e9 | 3408 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3409 | if (rc) { |
3410 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
3411 | return; | |
3412 | } | |
3413 | ||
3395f6e9 | 3414 | count = iwl_read_targ_mem(priv, base); |
b481de9c ZY |
3415 | |
3416 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | |
3417 | IWL_ERROR("Start IWL Error Log Dump:\n"); | |
2acae16e | 3418 | IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); |
b481de9c ZY |
3419 | } |
3420 | ||
3395f6e9 TW |
3421 | desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); |
3422 | blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32)); | |
3423 | blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32)); | |
3424 | ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32)); | |
3425 | ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32)); | |
3426 | data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32)); | |
3427 | data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32)); | |
3428 | line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); | |
3429 | time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); | |
b481de9c ZY |
3430 | |
3431 | IWL_ERROR("Desc Time " | |
3432 | "data1 data2 line\n"); | |
3433 | IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n", | |
3434 | desc_lookup(desc), desc, time, data1, data2, line); | |
3435 | IWL_ERROR("blink1 blink2 ilink1 ilink2\n"); | |
3436 | IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, | |
3437 | ilink1, ilink2); | |
3438 | ||
3395f6e9 | 3439 | iwl_release_nic_access(priv); |
b481de9c ZY |
3440 | } |
3441 | ||
3442 | #define EVENT_START_OFFSET (4 * sizeof(u32)) | |
3443 | ||
3444 | /** | |
bb8c093b | 3445 | * iwl4965_print_event_log - Dump error event log to syslog |
b481de9c | 3446 | * |
3395f6e9 | 3447 | * NOTE: Must be called with iwl_grab_nic_access() already obtained! |
b481de9c | 3448 | */ |
c79dd5b5 | 3449 | static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx, |
b481de9c ZY |
3450 | u32 num_events, u32 mode) |
3451 | { | |
3452 | u32 i; | |
3453 | u32 base; /* SRAM byte address of event log header */ | |
3454 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
3455 | u32 ptr; /* SRAM byte address of log data */ | |
3456 | u32 ev, time, data; /* event log data */ | |
3457 | ||
3458 | if (num_events == 0) | |
3459 | return; | |
3460 | ||
3461 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
3462 | ||
3463 | if (mode == 0) | |
3464 | event_size = 2 * sizeof(u32); | |
3465 | else | |
3466 | event_size = 3 * sizeof(u32); | |
3467 | ||
3468 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
3469 | ||
3470 | /* "time" is actually "data" for mode 0 (no timestamp). | |
3471 | * place event id # at far right for easier visual parsing. */ | |
3472 | for (i = 0; i < num_events; i++) { | |
3395f6e9 | 3473 | ev = iwl_read_targ_mem(priv, ptr); |
b481de9c | 3474 | ptr += sizeof(u32); |
3395f6e9 | 3475 | time = iwl_read_targ_mem(priv, ptr); |
b481de9c ZY |
3476 | ptr += sizeof(u32); |
3477 | if (mode == 0) | |
3478 | IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ | |
3479 | else { | |
3395f6e9 | 3480 | data = iwl_read_targ_mem(priv, ptr); |
b481de9c ZY |
3481 | ptr += sizeof(u32); |
3482 | IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); | |
3483 | } | |
3484 | } | |
3485 | } | |
3486 | ||
c79dd5b5 | 3487 | static void iwl4965_dump_nic_event_log(struct iwl_priv *priv) |
b481de9c ZY |
3488 | { |
3489 | int rc; | |
3490 | u32 base; /* SRAM byte address of event log header */ | |
3491 | u32 capacity; /* event log capacity in # entries */ | |
3492 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
3493 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
3494 | u32 next_entry; /* index of next entry to be written by uCode */ | |
3495 | u32 size; /* # entries that we'll print */ | |
3496 | ||
3497 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
57aab75a | 3498 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
b481de9c ZY |
3499 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); |
3500 | return; | |
3501 | } | |
3502 | ||
3395f6e9 | 3503 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3504 | if (rc) { |
3505 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
3506 | return; | |
3507 | } | |
3508 | ||
3509 | /* event log header */ | |
3395f6e9 TW |
3510 | capacity = iwl_read_targ_mem(priv, base); |
3511 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); | |
3512 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | |
3513 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); | |
b481de9c ZY |
3514 | |
3515 | size = num_wraps ? capacity : next_entry; | |
3516 | ||
3517 | /* bail out if nothing in log */ | |
3518 | if (size == 0) { | |
583fab37 | 3519 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); |
3395f6e9 | 3520 | iwl_release_nic_access(priv); |
b481de9c ZY |
3521 | return; |
3522 | } | |
3523 | ||
583fab37 | 3524 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", |
b481de9c ZY |
3525 | size, num_wraps); |
3526 | ||
3527 | /* if uCode has wrapped back to top of log, start at the oldest entry, | |
3528 | * i.e the next one that uCode would fill. */ | |
3529 | if (num_wraps) | |
bb8c093b | 3530 | iwl4965_print_event_log(priv, next_entry, |
b481de9c ZY |
3531 | capacity - next_entry, mode); |
3532 | ||
3533 | /* (then/else) start at top of log */ | |
bb8c093b | 3534 | iwl4965_print_event_log(priv, 0, next_entry, mode); |
b481de9c | 3535 | |
3395f6e9 | 3536 | iwl_release_nic_access(priv); |
b481de9c ZY |
3537 | } |
3538 | ||
3539 | /** | |
bb8c093b | 3540 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 3541 | */ |
c79dd5b5 | 3542 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 3543 | { |
bb8c093b | 3544 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
3545 | set_bit(STATUS_FW_ERROR, &priv->status); |
3546 | ||
3547 | /* Cancel currently queued command. */ | |
3548 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
3549 | ||
0a6857e7 | 3550 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3551 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
bb8c093b CH |
3552 | iwl4965_dump_nic_error_log(priv); |
3553 | iwl4965_dump_nic_event_log(priv); | |
bf403db8 | 3554 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
3555 | } |
3556 | #endif | |
3557 | ||
3558 | wake_up_interruptible(&priv->wait_command_queue); | |
3559 | ||
3560 | /* Keep the restart process from trying to send host | |
3561 | * commands by clearing the INIT status bit */ | |
3562 | clear_bit(STATUS_READY, &priv->status); | |
3563 | ||
3564 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
3565 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS, | |
3566 | "Restarting adapter due to uCode error.\n"); | |
3567 | ||
3109ece1 | 3568 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
3569 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
3570 | sizeof(priv->recovery_rxon)); | |
3571 | priv->error_recovering = 1; | |
3572 | } | |
3573 | queue_work(priv->workqueue, &priv->restart); | |
3574 | } | |
3575 | } | |
3576 | ||
c79dd5b5 | 3577 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
3578 | { |
3579 | unsigned long flags; | |
3580 | ||
3581 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
3582 | sizeof(priv->staging_rxon)); | |
3583 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 3584 | iwl4965_commit_rxon(priv); |
b481de9c | 3585 | |
bb8c093b | 3586 | iwl4965_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
3587 | |
3588 | spin_lock_irqsave(&priv->lock, flags); | |
3589 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
3590 | priv->error_recovering = 0; | |
3591 | spin_unlock_irqrestore(&priv->lock, flags); | |
3592 | } | |
3593 | ||
c79dd5b5 | 3594 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
3595 | { |
3596 | u32 inta, handled = 0; | |
3597 | u32 inta_fh; | |
3598 | unsigned long flags; | |
0a6857e7 | 3599 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3600 | u32 inta_mask; |
3601 | #endif | |
3602 | ||
3603 | spin_lock_irqsave(&priv->lock, flags); | |
3604 | ||
3605 | /* Ack/clear/reset pending uCode interrupts. | |
3606 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
3607 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
3608 | inta = iwl_read32(priv, CSR_INT); |
3609 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
3610 | |
3611 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
3612 | * Any new interrupts that happen after this, either while we're | |
3613 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
3614 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
3615 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 3616 | |
0a6857e7 | 3617 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3618 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 3619 | /* just for debug */ |
3395f6e9 | 3620 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
3621 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
3622 | inta, inta_mask, inta_fh); | |
3623 | } | |
3624 | #endif | |
3625 | ||
3626 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
3627 | * atomic, make sure that inta covers all the interrupts that | |
3628 | * we've discovered, even if FH interrupt came in just after | |
3629 | * reading CSR_INT. */ | |
6f83eaa1 | 3630 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 3631 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 3632 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
3633 | inta |= CSR_INT_BIT_FH_TX; |
3634 | ||
3635 | /* Now service all interrupt bits discovered above. */ | |
3636 | if (inta & CSR_INT_BIT_HW_ERR) { | |
3637 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
3638 | ||
3639 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 3640 | iwl4965_disable_interrupts(priv); |
b481de9c | 3641 | |
bb8c093b | 3642 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
3643 | |
3644 | handled |= CSR_INT_BIT_HW_ERR; | |
3645 | ||
3646 | spin_unlock_irqrestore(&priv->lock, flags); | |
3647 | ||
3648 | return; | |
3649 | } | |
3650 | ||
0a6857e7 | 3651 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3652 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 3653 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
3654 | if (inta & CSR_INT_BIT_SCD) |
3655 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
3656 | "the frame/frames.\n"); | |
b481de9c ZY |
3657 | |
3658 | /* Alive notification via Rx interrupt will do the real work */ | |
3659 | if (inta & CSR_INT_BIT_ALIVE) | |
3660 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
3661 | } | |
3662 | #endif | |
3663 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 3664 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 3665 | |
9fbab516 | 3666 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
3667 | if (inta & CSR_INT_BIT_RF_KILL) { |
3668 | int hw_rf_kill = 0; | |
3395f6e9 | 3669 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
3670 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
3671 | hw_rf_kill = 1; | |
3672 | ||
3673 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR, | |
3674 | "RF_KILL bit toggled to %s.\n", | |
3675 | hw_rf_kill ? "disable radio":"enable radio"); | |
3676 | ||
3677 | /* Queue restart only if RF_KILL switch was set to "kill" | |
3678 | * when we loaded driver, and is now set to "enable". | |
3679 | * After we're Alive, RF_KILL gets handled by | |
3230455d | 3680 | * iwl4965_rx_card_state_notif() */ |
53e49093 ZY |
3681 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
3682 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 3683 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 3684 | } |
b481de9c ZY |
3685 | |
3686 | handled |= CSR_INT_BIT_RF_KILL; | |
3687 | } | |
3688 | ||
9fbab516 | 3689 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
3690 | if (inta & CSR_INT_BIT_CT_KILL) { |
3691 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
3692 | handled |= CSR_INT_BIT_CT_KILL; | |
3693 | } | |
3694 | ||
3695 | /* Error detected by uCode */ | |
3696 | if (inta & CSR_INT_BIT_SW_ERR) { | |
3697 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
3698 | inta); | |
bb8c093b | 3699 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
3700 | handled |= CSR_INT_BIT_SW_ERR; |
3701 | } | |
3702 | ||
3703 | /* uCode wakes up after power-down sleep */ | |
3704 | if (inta & CSR_INT_BIT_WAKEUP) { | |
3705 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 3706 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
bb8c093b CH |
3707 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]); |
3708 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]); | |
3709 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]); | |
3710 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]); | |
3711 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]); | |
3712 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
3713 | |
3714 | handled |= CSR_INT_BIT_WAKEUP; | |
3715 | } | |
3716 | ||
3717 | /* All uCode command responses, including Tx command responses, | |
3718 | * Rx "responses" (frame-received notification), and other | |
3719 | * notifications from uCode come through here*/ | |
3720 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 3721 | iwl_rx_handle(priv); |
b481de9c ZY |
3722 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
3723 | } | |
3724 | ||
3725 | if (inta & CSR_INT_BIT_FH_TX) { | |
3726 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
3727 | handled |= CSR_INT_BIT_FH_TX; | |
3728 | } | |
3729 | ||
3730 | if (inta & ~handled) | |
3731 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
3732 | ||
3733 | if (inta & ~CSR_INI_SET_MASK) { | |
3734 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
3735 | inta & ~CSR_INI_SET_MASK); | |
3736 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
3737 | } | |
3738 | ||
3739 | /* Re-enable all interrupts */ | |
0359facc MA |
3740 | /* only Re-enable if diabled by irq */ |
3741 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
3742 | iwl4965_enable_interrupts(priv); | |
b481de9c | 3743 | |
0a6857e7 | 3744 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3745 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
3746 | inta = iwl_read32(priv, CSR_INT); |
3747 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
3748 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
3749 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
3750 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
3751 | } | |
3752 | #endif | |
3753 | spin_unlock_irqrestore(&priv->lock, flags); | |
3754 | } | |
3755 | ||
bb8c093b | 3756 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 3757 | { |
c79dd5b5 | 3758 | struct iwl_priv *priv = data; |
b481de9c ZY |
3759 | u32 inta, inta_mask; |
3760 | u32 inta_fh; | |
3761 | if (!priv) | |
3762 | return IRQ_NONE; | |
3763 | ||
3764 | spin_lock(&priv->lock); | |
3765 | ||
3766 | /* Disable (but don't clear!) interrupts here to avoid | |
3767 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
3768 | * If we have something to service, the tasklet will re-enable ints. | |
3769 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
3770 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
3771 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
3772 | |
3773 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
3774 | inta = iwl_read32(priv, CSR_INT); |
3775 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
3776 | |
3777 | /* Ignore interrupt if there's nothing in NIC to service. | |
3778 | * This may be due to IRQ shared with another device, | |
3779 | * or due to sporadic interrupts thrown from our NIC. */ | |
3780 | if (!inta && !inta_fh) { | |
3781 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
3782 | goto none; | |
3783 | } | |
3784 | ||
3785 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
3786 | /* Hardware disappeared. It might have already raised |
3787 | * an interrupt */ | |
b481de9c | 3788 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 3789 | goto unplugged; |
b481de9c ZY |
3790 | } |
3791 | ||
3792 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
3793 | inta, inta_mask, inta_fh); | |
3794 | ||
25c03d8e JP |
3795 | inta &= ~CSR_INT_BIT_SCD; |
3796 | ||
bb8c093b | 3797 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
3798 | if (likely(inta || inta_fh)) |
3799 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 3800 | |
66fbb541 ON |
3801 | unplugged: |
3802 | spin_unlock(&priv->lock); | |
b481de9c ZY |
3803 | return IRQ_HANDLED; |
3804 | ||
3805 | none: | |
3806 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
3807 | /* only Re-enable if diabled by irq */ |
3808 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
3809 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
3810 | spin_unlock(&priv->lock); |
3811 | return IRQ_NONE; | |
3812 | } | |
3813 | ||
b481de9c ZY |
3814 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after |
3815 | * sending probe req. This should be set long enough to hear probe responses | |
3816 | * from more than one AP. */ | |
3817 | #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
3818 | #define IWL_ACTIVE_DWELL_TIME_52 (10) | |
3819 | ||
3820 | /* For faster active scanning, scan will move to the next channel if fewer than | |
3821 | * PLCP_QUIET_THRESH packets are heard on this channel within | |
3822 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | |
3823 | * time if it's a quiet channel (nothing responded to our probe, and there's | |
3824 | * no other traffic). | |
3825 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | |
3826 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | |
3827 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */ | |
3828 | ||
3829 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | |
3830 | * Must be set longer than active dwell time. | |
3831 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | |
3832 | #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
3833 | #define IWL_PASSIVE_DWELL_TIME_52 (10) | |
3834 | #define IWL_PASSIVE_DWELL_BASE (100) | |
3835 | #define IWL_CHANNEL_TUNE_TIME 5 | |
3836 | ||
c79dd5b5 | 3837 | static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv, |
8318d78a | 3838 | enum ieee80211_band band) |
b481de9c | 3839 | { |
8318d78a | 3840 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
3841 | return IWL_ACTIVE_DWELL_TIME_52; |
3842 | else | |
3843 | return IWL_ACTIVE_DWELL_TIME_24; | |
3844 | } | |
3845 | ||
c79dd5b5 | 3846 | static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv, |
8318d78a | 3847 | enum ieee80211_band band) |
b481de9c | 3848 | { |
8318d78a JB |
3849 | u16 active = iwl4965_get_active_dwell_time(priv, band); |
3850 | u16 passive = (band != IEEE80211_BAND_5GHZ) ? | |
b481de9c ZY |
3851 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : |
3852 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; | |
3853 | ||
3109ece1 | 3854 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
3855 | /* If we're associated, we clamp the maximum passive |
3856 | * dwell time to be 98% of the beacon interval (minus | |
3857 | * 2 * channel tune time) */ | |
3858 | passive = priv->beacon_int; | |
3859 | if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive) | |
3860 | passive = IWL_PASSIVE_DWELL_BASE; | |
3861 | passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; | |
3862 | } | |
3863 | ||
3864 | if (passive <= active) | |
3865 | passive = active + 1; | |
3866 | ||
3867 | return passive; | |
3868 | } | |
3869 | ||
c79dd5b5 | 3870 | static int iwl4965_get_channels_for_scan(struct iwl_priv *priv, |
8318d78a | 3871 | enum ieee80211_band band, |
b481de9c | 3872 | u8 is_active, u8 direct_mask, |
bb8c093b | 3873 | struct iwl4965_scan_channel *scan_ch) |
b481de9c ZY |
3874 | { |
3875 | const struct ieee80211_channel *channels = NULL; | |
8318d78a | 3876 | const struct ieee80211_supported_band *sband; |
bf85ea4f | 3877 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
3878 | u16 passive_dwell = 0; |
3879 | u16 active_dwell = 0; | |
3880 | int added, i; | |
3881 | ||
d1141dfb | 3882 | sband = iwl_get_hw_mode(priv, band); |
8318d78a | 3883 | if (!sband) |
b481de9c ZY |
3884 | return 0; |
3885 | ||
8318d78a | 3886 | channels = sband->channels; |
b481de9c | 3887 | |
8318d78a JB |
3888 | active_dwell = iwl4965_get_active_dwell_time(priv, band); |
3889 | passive_dwell = iwl4965_get_passive_dwell_time(priv, band); | |
b481de9c | 3890 | |
8318d78a | 3891 | for (i = 0, added = 0; i < sband->n_channels; i++) { |
182e2e66 JB |
3892 | if (channels[i].flags & IEEE80211_CHAN_DISABLED) |
3893 | continue; | |
3894 | ||
8318d78a | 3895 | scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq); |
b481de9c | 3896 | |
8622e705 | 3897 | ch_info = iwl_get_channel_info(priv, band, |
9fbab516 | 3898 | scan_ch->channel); |
b481de9c ZY |
3899 | if (!is_channel_valid(ch_info)) { |
3900 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | |
3901 | scan_ch->channel); | |
3902 | continue; | |
3903 | } | |
3904 | ||
3905 | if (!is_active || is_channel_passive(ch_info) || | |
8318d78a | 3906 | (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) |
b481de9c ZY |
3907 | scan_ch->type = 0; /* passive */ |
3908 | else | |
3909 | scan_ch->type = 1; /* active */ | |
3910 | ||
3911 | if (scan_ch->type & 1) | |
3912 | scan_ch->type |= (direct_mask << 1); | |
3913 | ||
b481de9c ZY |
3914 | scan_ch->active_dwell = cpu_to_le16(active_dwell); |
3915 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | |
3916 | ||
9fbab516 | 3917 | /* Set txpower levels to defaults */ |
b481de9c ZY |
3918 | scan_ch->tpc.dsp_atten = 110; |
3919 | /* scan_pwr_info->tpc.dsp_atten; */ | |
3920 | ||
3921 | /*scan_pwr_info->tpc.tx_gain; */ | |
8318d78a | 3922 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
3923 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; |
3924 | else { | |
3925 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | |
3926 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | |
9fbab516 | 3927 | * power level: |
8a1b0245 | 3928 | * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; |
b481de9c ZY |
3929 | */ |
3930 | } | |
3931 | ||
3932 | IWL_DEBUG_SCAN("Scanning %d [%s %d]\n", | |
3933 | scan_ch->channel, | |
3934 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | |
3935 | (scan_ch->type & 1) ? | |
3936 | active_dwell : passive_dwell); | |
3937 | ||
3938 | scan_ch++; | |
3939 | added++; | |
3940 | } | |
3941 | ||
3942 | IWL_DEBUG_SCAN("total channels to scan %d \n", added); | |
3943 | return added; | |
3944 | } | |
3945 | ||
b481de9c ZY |
3946 | /****************************************************************************** |
3947 | * | |
3948 | * uCode download functions | |
3949 | * | |
3950 | ******************************************************************************/ | |
3951 | ||
c79dd5b5 | 3952 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 3953 | { |
98c92211 TW |
3954 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
3955 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
3956 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
3957 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
3958 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
3959 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
3960 | } |
3961 | ||
c79dd5b5 | 3962 | static void iwl4965_nic_start(struct iwl_priv *priv) |
b481de9c ZY |
3963 | { |
3964 | /* Remove all resets to allow NIC to operate */ | |
3395f6e9 | 3965 | iwl_write32(priv, CSR_RESET, 0); |
b481de9c ZY |
3966 | } |
3967 | ||
90e759d1 | 3968 | |
b481de9c | 3969 | /** |
bb8c093b | 3970 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
3971 | * |
3972 | * Copy into buffers for card to fetch via bus-mastering | |
3973 | */ | |
c79dd5b5 | 3974 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 3975 | { |
bb8c093b | 3976 | struct iwl4965_ucode *ucode; |
90e759d1 | 3977 | int ret; |
b481de9c | 3978 | const struct firmware *ucode_raw; |
4bf775cd | 3979 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
3980 | u8 *src; |
3981 | size_t len; | |
3982 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
3983 | ||
3984 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
3985 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
3986 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
3987 | if (ret < 0) { | |
3988 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
3989 | name, ret); | |
b481de9c ZY |
3990 | goto error; |
3991 | } | |
3992 | ||
3993 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
3994 | name, ucode_raw->size); | |
3995 | ||
3996 | /* Make sure that we got at least our header! */ | |
3997 | if (ucode_raw->size < sizeof(*ucode)) { | |
3998 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 3999 | ret = -EINVAL; |
b481de9c ZY |
4000 | goto err_release; |
4001 | } | |
4002 | ||
4003 | /* Data from ucode file: header followed by uCode images */ | |
4004 | ucode = (void *)ucode_raw->data; | |
4005 | ||
4006 | ver = le32_to_cpu(ucode->ver); | |
4007 | inst_size = le32_to_cpu(ucode->inst_size); | |
4008 | data_size = le32_to_cpu(ucode->data_size); | |
4009 | init_size = le32_to_cpu(ucode->init_size); | |
4010 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
4011 | boot_size = le32_to_cpu(ucode->boot_size); | |
4012 | ||
4013 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
4014 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
4015 | inst_size); | |
4016 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
4017 | data_size); | |
4018 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
4019 | init_size); | |
4020 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
4021 | init_data_size); | |
4022 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
4023 | boot_size); | |
4024 | ||
4025 | /* Verify size of file vs. image size info in file's header */ | |
4026 | if (ucode_raw->size < sizeof(*ucode) + | |
4027 | inst_size + data_size + init_size + | |
4028 | init_data_size + boot_size) { | |
4029 | ||
4030 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
4031 | (int)ucode_raw->size); | |
90e759d1 | 4032 | ret = -EINVAL; |
b481de9c ZY |
4033 | goto err_release; |
4034 | } | |
4035 | ||
4036 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 4037 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
4038 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
4039 | inst_size); | |
4040 | ret = -EINVAL; | |
b481de9c ZY |
4041 | goto err_release; |
4042 | } | |
4043 | ||
099b40b7 | 4044 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
4045 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
4046 | data_size); | |
4047 | ret = -EINVAL; | |
b481de9c ZY |
4048 | goto err_release; |
4049 | } | |
099b40b7 | 4050 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 4051 | IWL_DEBUG_INFO |
90e759d1 TW |
4052 | ("uCode init instr len %d too large to fit in\n", |
4053 | init_size); | |
4054 | ret = -EINVAL; | |
b481de9c ZY |
4055 | goto err_release; |
4056 | } | |
099b40b7 | 4057 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 4058 | IWL_DEBUG_INFO |
90e759d1 TW |
4059 | ("uCode init data len %d too large to fit in\n", |
4060 | init_data_size); | |
4061 | ret = -EINVAL; | |
b481de9c ZY |
4062 | goto err_release; |
4063 | } | |
099b40b7 | 4064 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 4065 | IWL_DEBUG_INFO |
90e759d1 TW |
4066 | ("uCode boot instr len %d too large to fit in\n", |
4067 | boot_size); | |
4068 | ret = -EINVAL; | |
b481de9c ZY |
4069 | goto err_release; |
4070 | } | |
4071 | ||
4072 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
4073 | ||
4074 | /* Runtime instructions and 2 copies of data: | |
4075 | * 1) unmodified from disk | |
4076 | * 2) backup cache for save/restore during power-downs */ | |
4077 | priv->ucode_code.len = inst_size; | |
98c92211 | 4078 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
4079 | |
4080 | priv->ucode_data.len = data_size; | |
98c92211 | 4081 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
4082 | |
4083 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 4084 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
4085 | |
4086 | /* Initialization instructions and data */ | |
90e759d1 TW |
4087 | if (init_size && init_data_size) { |
4088 | priv->ucode_init.len = init_size; | |
98c92211 | 4089 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
4090 | |
4091 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 4092 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
4093 | |
4094 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
4095 | goto err_pci_alloc; | |
4096 | } | |
b481de9c ZY |
4097 | |
4098 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
4099 | if (boot_size) { |
4100 | priv->ucode_boot.len = boot_size; | |
98c92211 | 4101 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 4102 | |
90e759d1 TW |
4103 | if (!priv->ucode_boot.v_addr) |
4104 | goto err_pci_alloc; | |
4105 | } | |
b481de9c ZY |
4106 | |
4107 | /* Copy images into buffers for card's bus-master reads ... */ | |
4108 | ||
4109 | /* Runtime instructions (first block of data in file) */ | |
4110 | src = &ucode->data[0]; | |
4111 | len = priv->ucode_code.len; | |
90e759d1 | 4112 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
4113 | memcpy(priv->ucode_code.v_addr, src, len); |
4114 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
4115 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
4116 | ||
4117 | /* Runtime data (2nd block) | |
bb8c093b | 4118 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
4119 | src = &ucode->data[inst_size]; |
4120 | len = priv->ucode_data.len; | |
90e759d1 | 4121 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
4122 | memcpy(priv->ucode_data.v_addr, src, len); |
4123 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
4124 | ||
4125 | /* Initialization instructions (3rd block) */ | |
4126 | if (init_size) { | |
4127 | src = &ucode->data[inst_size + data_size]; | |
4128 | len = priv->ucode_init.len; | |
90e759d1 TW |
4129 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
4130 | len); | |
b481de9c ZY |
4131 | memcpy(priv->ucode_init.v_addr, src, len); |
4132 | } | |
4133 | ||
4134 | /* Initialization data (4th block) */ | |
4135 | if (init_data_size) { | |
4136 | src = &ucode->data[inst_size + data_size + init_size]; | |
4137 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
4138 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
4139 | len); | |
b481de9c ZY |
4140 | memcpy(priv->ucode_init_data.v_addr, src, len); |
4141 | } | |
4142 | ||
4143 | /* Bootstrap instructions (5th block) */ | |
4144 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
4145 | len = priv->ucode_boot.len; | |
90e759d1 | 4146 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
4147 | memcpy(priv->ucode_boot.v_addr, src, len); |
4148 | ||
4149 | /* We have our copies now, allow OS release its copies */ | |
4150 | release_firmware(ucode_raw); | |
4151 | return 0; | |
4152 | ||
4153 | err_pci_alloc: | |
4154 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 4155 | ret = -ENOMEM; |
bb8c093b | 4156 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4157 | |
4158 | err_release: | |
4159 | release_firmware(ucode_raw); | |
4160 | ||
4161 | error: | |
90e759d1 | 4162 | return ret; |
b481de9c ZY |
4163 | } |
4164 | ||
4165 | ||
4166 | /** | |
bb8c093b | 4167 | * iwl4965_set_ucode_ptrs - Set uCode address location |
b481de9c ZY |
4168 | * |
4169 | * Tell initialization uCode where to find runtime uCode. | |
4170 | * | |
4171 | * BSM registers initially contain pointers to initialization uCode. | |
4172 | * We need to replace them to load runtime uCode inst and data, | |
4173 | * and to save runtime data when powering down. | |
4174 | */ | |
c79dd5b5 | 4175 | static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) |
b481de9c ZY |
4176 | { |
4177 | dma_addr_t pinst; | |
4178 | dma_addr_t pdata; | |
4179 | int rc = 0; | |
4180 | unsigned long flags; | |
4181 | ||
4182 | /* bits 35:4 for 4965 */ | |
4183 | pinst = priv->ucode_code.p_addr >> 4; | |
4184 | pdata = priv->ucode_data_backup.p_addr >> 4; | |
4185 | ||
4186 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 4187 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
4188 | if (rc) { |
4189 | spin_unlock_irqrestore(&priv->lock, flags); | |
4190 | return rc; | |
4191 | } | |
4192 | ||
4193 | /* Tell bootstrap uCode where to find image to load */ | |
3395f6e9 TW |
4194 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
4195 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
4196 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
b481de9c ZY |
4197 | priv->ucode_data.len); |
4198 | ||
4199 | /* Inst bytecount must be last to set up, bit 31 signals uCode | |
4200 | * that all new ptr/size info is in place */ | |
3395f6e9 | 4201 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
b481de9c ZY |
4202 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
4203 | ||
3395f6e9 | 4204 | iwl_release_nic_access(priv); |
b481de9c ZY |
4205 | |
4206 | spin_unlock_irqrestore(&priv->lock, flags); | |
4207 | ||
4208 | IWL_DEBUG_INFO("Runtime uCode pointers are set.\n"); | |
4209 | ||
4210 | return rc; | |
4211 | } | |
4212 | ||
4213 | /** | |
bb8c093b | 4214 | * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received |
b481de9c ZY |
4215 | * |
4216 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
4217 | * | |
4218 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
4219 | * Voltage, temperature, and MIMO tx gain correction, now stored in priv | |
4220 | * (3945 does not contain this data). | |
4221 | * | |
4222 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
4223 | */ | |
c79dd5b5 | 4224 | static void iwl4965_init_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
4225 | { |
4226 | /* Check alive response for "valid" sign from uCode */ | |
4227 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | |
4228 | /* We had an error bringing up the hardware, so take it | |
4229 | * all the way back down so we can try again */ | |
4230 | IWL_DEBUG_INFO("Initialize Alive failed.\n"); | |
4231 | goto restart; | |
4232 | } | |
4233 | ||
4234 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
4235 | * This is a paranoid check, because we would not have gotten the | |
4236 | * "initialize" alive if code weren't properly loaded. */ | |
b0692f2f | 4237 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
4238 | /* Runtime instruction load was bad; |
4239 | * take it all the way back down so we can try again */ | |
4240 | IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n"); | |
4241 | goto restart; | |
4242 | } | |
4243 | ||
4244 | /* Calculate temperature */ | |
4245 | priv->temperature = iwl4965_get_temperature(priv); | |
4246 | ||
4247 | /* Send pointers to protocol/runtime uCode image ... init code will | |
4248 | * load and launch runtime uCode, which will send us another "Alive" | |
4249 | * notification. */ | |
4250 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
bb8c093b | 4251 | if (iwl4965_set_ucode_ptrs(priv)) { |
b481de9c ZY |
4252 | /* Runtime instruction load won't happen; |
4253 | * take it all the way back down so we can try again */ | |
4254 | IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n"); | |
4255 | goto restart; | |
4256 | } | |
4257 | return; | |
4258 | ||
4259 | restart: | |
4260 | queue_work(priv->workqueue, &priv->restart); | |
4261 | } | |
4262 | ||
4263 | ||
4264 | /** | |
bb8c093b | 4265 | * iwl4965_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 4266 | * from protocol/runtime uCode (initialization uCode's |
bb8c093b | 4267 | * Alive gets handled by iwl4965_init_alive_start()). |
b481de9c | 4268 | */ |
c79dd5b5 | 4269 | static void iwl4965_alive_start(struct iwl_priv *priv) |
b481de9c | 4270 | { |
57aab75a | 4271 | int ret = 0; |
b481de9c ZY |
4272 | |
4273 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
4274 | ||
4275 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
4276 | /* We had an error bringing up the hardware, so take it | |
4277 | * all the way back down so we can try again */ | |
4278 | IWL_DEBUG_INFO("Alive failed.\n"); | |
4279 | goto restart; | |
4280 | } | |
4281 | ||
4282 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
4283 | * This is a paranoid check, because we would not have gotten the | |
4284 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 4285 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
4286 | /* Runtime instruction load was bad; |
4287 | * take it all the way back down so we can try again */ | |
4288 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
4289 | goto restart; | |
4290 | } | |
4291 | ||
bf85ea4f | 4292 | iwlcore_clear_stations_table(priv); |
b481de9c | 4293 | |
57aab75a TW |
4294 | ret = priv->cfg->ops->lib->alive_notify(priv); |
4295 | if (ret) { | |
b481de9c | 4296 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 4297 | ret); |
b481de9c ZY |
4298 | goto restart; |
4299 | } | |
4300 | ||
9fbab516 | 4301 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
4302 | set_bit(STATUS_ALIVE, &priv->status); |
4303 | ||
4304 | /* Clear out the uCode error bit if it is set */ | |
4305 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
4306 | ||
fee1247a | 4307 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
4308 | return; |
4309 | ||
5a66926a | 4310 | ieee80211_start_queues(priv->hw); |
b481de9c ZY |
4311 | |
4312 | priv->active_rate = priv->rates_mask; | |
4313 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
4314 | ||
3109ece1 | 4315 | if (iwl_is_associated(priv)) { |
bb8c093b CH |
4316 | struct iwl4965_rxon_cmd *active_rxon = |
4317 | (struct iwl4965_rxon_cmd *)(&priv->active_rxon); | |
b481de9c ZY |
4318 | |
4319 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
4320 | sizeof(priv->staging_rxon)); | |
4321 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
4322 | } else { | |
4323 | /* Initialize our rx_config data */ | |
bb8c093b | 4324 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
4325 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
4326 | } | |
4327 | ||
9fbab516 | 4328 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 4329 | iwl4965_send_bt_config(priv); |
b481de9c ZY |
4330 | |
4331 | /* Configure the adapter for unassociated operation */ | |
bb8c093b | 4332 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
4333 | |
4334 | /* At this point, the NIC is initialized and operational */ | |
4335 | priv->notif_missed_beacons = 0; | |
b481de9c ZY |
4336 | |
4337 | iwl4965_rf_kill_ct_config(priv); | |
5a66926a | 4338 | |
fe00b5a5 RC |
4339 | iwl_leds_register(priv); |
4340 | ||
b481de9c | 4341 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 4342 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 4343 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
4344 | |
4345 | if (priv->error_recovering) | |
bb8c093b | 4346 | iwl4965_error_recovery(priv); |
b481de9c | 4347 | |
c8381fdc | 4348 | iwlcore_low_level_notify(priv, IWLCORE_START_EVT); |
84363e6e | 4349 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
b481de9c ZY |
4350 | return; |
4351 | ||
4352 | restart: | |
4353 | queue_work(priv->workqueue, &priv->restart); | |
4354 | } | |
4355 | ||
c79dd5b5 | 4356 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 4357 | |
c79dd5b5 | 4358 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
4359 | { |
4360 | unsigned long flags; | |
4361 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
4362 | struct ieee80211_conf *conf = NULL; | |
4363 | ||
4364 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
4365 | ||
4366 | conf = ieee80211_get_hw_conf(priv->hw); | |
4367 | ||
4368 | if (!exit_pending) | |
4369 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
4370 | ||
ab53d8af MA |
4371 | iwl_leds_unregister(priv); |
4372 | ||
c8381fdc MA |
4373 | iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT); |
4374 | ||
bf85ea4f | 4375 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
4376 | |
4377 | /* Unblock any waiting calls */ | |
4378 | wake_up_interruptible_all(&priv->wait_command_queue); | |
4379 | ||
b481de9c ZY |
4380 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
4381 | * exiting the module */ | |
4382 | if (!exit_pending) | |
4383 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
4384 | ||
4385 | /* stop and reset the on-board processor */ | |
3395f6e9 | 4386 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
4387 | |
4388 | /* tell the device to stop sending interrupts */ | |
0359facc | 4389 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 4390 | iwl4965_disable_interrupts(priv); |
0359facc MA |
4391 | spin_unlock_irqrestore(&priv->lock, flags); |
4392 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
4393 | |
4394 | if (priv->mac80211_registered) | |
4395 | ieee80211_stop_queues(priv->hw); | |
4396 | ||
bb8c093b | 4397 | /* If we have not previously called iwl4965_init() then |
b481de9c | 4398 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 4399 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
4400 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
4401 | STATUS_RF_KILL_HW | | |
4402 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
4403 | STATUS_RF_KILL_SW | | |
9788864e RC |
4404 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
4405 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
4406 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
4407 | STATUS_IN_SUSPEND; | |
4408 | goto exit; | |
4409 | } | |
4410 | ||
4411 | /* ...otherwise clear out all the status bits but the RF Kill and | |
4412 | * SUSPEND bits and continue taking the NIC down. */ | |
4413 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
4414 | STATUS_RF_KILL_HW | | |
4415 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
4416 | STATUS_RF_KILL_SW | | |
9788864e RC |
4417 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
4418 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
4419 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
4420 | STATUS_IN_SUSPEND | | |
4421 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
4422 | STATUS_FW_ERROR; | |
4423 | ||
4424 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 4425 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 4426 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
4427 | spin_unlock_irqrestore(&priv->lock, flags); |
4428 | ||
bb8c093b CH |
4429 | iwl4965_hw_txq_ctx_stop(priv); |
4430 | iwl4965_hw_rxq_stop(priv); | |
b481de9c ZY |
4431 | |
4432 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
4433 | if (!iwl_grab_nic_access(priv)) { |
4434 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 4435 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 4436 | iwl_release_nic_access(priv); |
b481de9c ZY |
4437 | } |
4438 | spin_unlock_irqrestore(&priv->lock, flags); | |
4439 | ||
4440 | udelay(5); | |
4441 | ||
bb8c093b | 4442 | iwl4965_hw_nic_stop_master(priv); |
3395f6e9 | 4443 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
bb8c093b | 4444 | iwl4965_hw_nic_reset(priv); |
399f4900 | 4445 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
4446 | |
4447 | exit: | |
bb8c093b | 4448 | memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
4449 | |
4450 | if (priv->ibss_beacon) | |
4451 | dev_kfree_skb(priv->ibss_beacon); | |
4452 | priv->ibss_beacon = NULL; | |
4453 | ||
4454 | /* clear out any free frames */ | |
bb8c093b | 4455 | iwl4965_clear_free_frames(priv); |
b481de9c ZY |
4456 | } |
4457 | ||
c79dd5b5 | 4458 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
4459 | { |
4460 | mutex_lock(&priv->mutex); | |
bb8c093b | 4461 | __iwl4965_down(priv); |
b481de9c | 4462 | mutex_unlock(&priv->mutex); |
b24d22b1 | 4463 | |
bb8c093b | 4464 | iwl4965_cancel_deferred_work(priv); |
b481de9c ZY |
4465 | } |
4466 | ||
4467 | #define MAX_HW_RESTARTS 5 | |
4468 | ||
c79dd5b5 | 4469 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 4470 | { |
57aab75a TW |
4471 | int i; |
4472 | int ret; | |
b481de9c ZY |
4473 | |
4474 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4475 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
4476 | return -EIO; | |
4477 | } | |
4478 | ||
4479 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | |
4480 | IWL_WARNING("Radio disabled by SW RF kill (module " | |
4481 | "parameter)\n"); | |
ad97edd2 | 4482 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
4483 | return -ENODEV; |
4484 | } | |
4485 | ||
e903fbd4 RC |
4486 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
4487 | IWL_ERROR("ucode not available for device bringup\n"); | |
4488 | return -EIO; | |
4489 | } | |
4490 | ||
e655b9f0 | 4491 | /* If platform's RF_KILL switch is NOT set to KILL */ |
3395f6e9 | 4492 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
4493 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
4494 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
4495 | else { | |
4496 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
4497 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
ad97edd2 | 4498 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
4499 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); |
4500 | return -ENODEV; | |
4501 | } | |
b481de9c ZY |
4502 | } |
4503 | ||
ad97edd2 | 4504 | iwl_rfkill_set_hw_state(priv); |
3395f6e9 | 4505 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 4506 | |
399f4900 RR |
4507 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
4508 | if (ret) { | |
4509 | IWL_ERROR("Unable to allocate shared memory\n"); | |
4510 | return ret; | |
4511 | } | |
4512 | ||
1053d35f | 4513 | ret = iwl_hw_nic_init(priv); |
57aab75a TW |
4514 | if (ret) { |
4515 | IWL_ERROR("Unable to init nic\n"); | |
4516 | return ret; | |
b481de9c ZY |
4517 | } |
4518 | ||
4519 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
4520 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
4521 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
4522 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
4523 | ||
4524 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 4525 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 4526 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
4527 | |
4528 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
4529 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
4530 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
4531 | |
4532 | /* Copy original ucode data image from disk into backup cache. | |
4533 | * This will be used to initialize the on-board processor's | |
4534 | * data SRAM for a clean start when the runtime program first loads. */ | |
4535 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 4536 | priv->ucode_data.len); |
b481de9c | 4537 | |
e655b9f0 ZY |
4538 | /* We return success when we resume from suspend and rf_kill is on. */ |
4539 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
b481de9c | 4540 | return 0; |
b481de9c ZY |
4541 | |
4542 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
4543 | ||
bf85ea4f | 4544 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
4545 | |
4546 | /* load bootstrap state machine, | |
4547 | * load bootstrap program into processor's memory, | |
4548 | * prepare to load the "initialize" uCode */ | |
57aab75a | 4549 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 4550 | |
57aab75a TW |
4551 | if (ret) { |
4552 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
4553 | continue; |
4554 | } | |
4555 | ||
4556 | /* start card; "initialize" will load runtime ucode */ | |
bb8c093b | 4557 | iwl4965_nic_start(priv); |
b481de9c | 4558 | |
b481de9c ZY |
4559 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
4560 | ||
4561 | return 0; | |
4562 | } | |
4563 | ||
4564 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 4565 | __iwl4965_down(priv); |
b481de9c ZY |
4566 | |
4567 | /* tried to restart and config the device for as long as our | |
4568 | * patience could withstand */ | |
4569 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
4570 | return -EIO; | |
4571 | } | |
4572 | ||
4573 | ||
4574 | /***************************************************************************** | |
4575 | * | |
4576 | * Workqueue callbacks | |
4577 | * | |
4578 | *****************************************************************************/ | |
4579 | ||
bb8c093b | 4580 | static void iwl4965_bg_init_alive_start(struct work_struct *data) |
b481de9c | 4581 | { |
c79dd5b5 TW |
4582 | struct iwl_priv *priv = |
4583 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
4584 | |
4585 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4586 | return; | |
4587 | ||
4588 | mutex_lock(&priv->mutex); | |
bb8c093b | 4589 | iwl4965_init_alive_start(priv); |
b481de9c ZY |
4590 | mutex_unlock(&priv->mutex); |
4591 | } | |
4592 | ||
bb8c093b | 4593 | static void iwl4965_bg_alive_start(struct work_struct *data) |
b481de9c | 4594 | { |
c79dd5b5 TW |
4595 | struct iwl_priv *priv = |
4596 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
4597 | |
4598 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4599 | return; | |
4600 | ||
4601 | mutex_lock(&priv->mutex); | |
bb8c093b | 4602 | iwl4965_alive_start(priv); |
b481de9c ZY |
4603 | mutex_unlock(&priv->mutex); |
4604 | } | |
4605 | ||
bb8c093b | 4606 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 4607 | { |
c79dd5b5 | 4608 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
4609 | |
4610 | wake_up_interruptible(&priv->wait_command_queue); | |
4611 | ||
4612 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4613 | return; | |
4614 | ||
4615 | mutex_lock(&priv->mutex); | |
4616 | ||
fee1247a | 4617 | if (!iwl_is_rfkill(priv)) { |
b481de9c ZY |
4618 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL, |
4619 | "HW and/or SW RF Kill no longer active, restarting " | |
4620 | "device\n"); | |
4621 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4622 | queue_work(priv->workqueue, &priv->restart); | |
4623 | } else { | |
ad97edd2 MA |
4624 | /* make sure mac80211 stop sending Tx frame */ |
4625 | if (priv->mac80211_registered) | |
4626 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
4627 | |
4628 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
4629 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
4630 | "disabled by SW switch\n"); | |
4631 | else | |
4632 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
4633 | "Kill switch must be turned off for " | |
4634 | "wireless networking to work.\n"); | |
4635 | } | |
ad97edd2 MA |
4636 | iwl_rfkill_set_hw_state(priv); |
4637 | ||
b481de9c ZY |
4638 | mutex_unlock(&priv->mutex); |
4639 | } | |
4640 | ||
4641 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | |
4642 | ||
bb8c093b | 4643 | static void iwl4965_bg_scan_check(struct work_struct *data) |
b481de9c | 4644 | { |
c79dd5b5 TW |
4645 | struct iwl_priv *priv = |
4646 | container_of(data, struct iwl_priv, scan_check.work); | |
b481de9c ZY |
4647 | |
4648 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4649 | return; | |
4650 | ||
4651 | mutex_lock(&priv->mutex); | |
4652 | if (test_bit(STATUS_SCANNING, &priv->status) || | |
4653 | test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
4654 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, | |
4655 | "Scan completion watchdog resetting adapter (%dms)\n", | |
4656 | jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG)); | |
052c4b9f | 4657 | |
b481de9c | 4658 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) |
bb8c093b | 4659 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
4660 | } |
4661 | mutex_unlock(&priv->mutex); | |
4662 | } | |
4663 | ||
bb8c093b | 4664 | static void iwl4965_bg_request_scan(struct work_struct *data) |
b481de9c | 4665 | { |
c79dd5b5 TW |
4666 | struct iwl_priv *priv = |
4667 | container_of(data, struct iwl_priv, request_scan); | |
857485c0 | 4668 | struct iwl_host_cmd cmd = { |
b481de9c | 4669 | .id = REPLY_SCAN_CMD, |
bb8c093b | 4670 | .len = sizeof(struct iwl4965_scan_cmd), |
b481de9c ZY |
4671 | .meta.flags = CMD_SIZE_HUGE, |
4672 | }; | |
bb8c093b | 4673 | struct iwl4965_scan_cmd *scan; |
b481de9c | 4674 | struct ieee80211_conf *conf = NULL; |
78330fdd | 4675 | u16 cmd_len; |
8318d78a | 4676 | enum ieee80211_band band; |
78330fdd | 4677 | u8 direct_mask; |
857485c0 | 4678 | int ret = 0; |
b481de9c ZY |
4679 | |
4680 | conf = ieee80211_get_hw_conf(priv->hw); | |
4681 | ||
4682 | mutex_lock(&priv->mutex); | |
4683 | ||
fee1247a | 4684 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
4685 | IWL_WARNING("request scan called when driver not ready.\n"); |
4686 | goto done; | |
4687 | } | |
4688 | ||
4689 | /* Make sure the scan wasn't cancelled before this queued work | |
4690 | * was given the chance to run... */ | |
4691 | if (!test_bit(STATUS_SCANNING, &priv->status)) | |
4692 | goto done; | |
4693 | ||
4694 | /* This should never be called or scheduled if there is currently | |
4695 | * a scan active in the hardware. */ | |
4696 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | |
4697 | IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. " | |
4698 | "Ignoring second request.\n"); | |
857485c0 | 4699 | ret = -EIO; |
b481de9c ZY |
4700 | goto done; |
4701 | } | |
4702 | ||
4703 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4704 | IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n"); | |
4705 | goto done; | |
4706 | } | |
4707 | ||
4708 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
4709 | IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n"); | |
4710 | goto done; | |
4711 | } | |
4712 | ||
fee1247a | 4713 | if (iwl_is_rfkill(priv)) { |
b481de9c ZY |
4714 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); |
4715 | goto done; | |
4716 | } | |
4717 | ||
4718 | if (!test_bit(STATUS_READY, &priv->status)) { | |
4719 | IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n"); | |
4720 | goto done; | |
4721 | } | |
4722 | ||
4723 | if (!priv->scan_bands) { | |
4724 | IWL_DEBUG_HC("Aborting scan due to no requested bands\n"); | |
4725 | goto done; | |
4726 | } | |
4727 | ||
4728 | if (!priv->scan) { | |
bb8c093b | 4729 | priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) + |
b481de9c ZY |
4730 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); |
4731 | if (!priv->scan) { | |
857485c0 | 4732 | ret = -ENOMEM; |
b481de9c ZY |
4733 | goto done; |
4734 | } | |
4735 | } | |
4736 | scan = priv->scan; | |
bb8c093b | 4737 | memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE); |
b481de9c ZY |
4738 | |
4739 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | |
4740 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | |
4741 | ||
3109ece1 | 4742 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
4743 | u16 interval = 0; |
4744 | u32 extra; | |
4745 | u32 suspend_time = 100; | |
4746 | u32 scan_suspend_time = 100; | |
4747 | unsigned long flags; | |
4748 | ||
4749 | IWL_DEBUG_INFO("Scanning while associated...\n"); | |
4750 | ||
4751 | spin_lock_irqsave(&priv->lock, flags); | |
4752 | interval = priv->beacon_int; | |
4753 | spin_unlock_irqrestore(&priv->lock, flags); | |
4754 | ||
4755 | scan->suspend_time = 0; | |
052c4b9f | 4756 | scan->max_out_time = cpu_to_le32(200 * 1024); |
b481de9c ZY |
4757 | if (!interval) |
4758 | interval = suspend_time; | |
4759 | ||
4760 | extra = (suspend_time / interval) << 22; | |
4761 | scan_suspend_time = (extra | | |
4762 | ((suspend_time % interval) * 1024)); | |
4763 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | |
4764 | IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n", | |
4765 | scan_suspend_time, interval); | |
4766 | } | |
4767 | ||
4768 | /* We should add the ability for user to lock to PASSIVE ONLY */ | |
4769 | if (priv->one_direct_scan) { | |
4770 | IWL_DEBUG_SCAN | |
4771 | ("Kicking off one direct scan for '%s'\n", | |
bb8c093b | 4772 | iwl4965_escape_essid(priv->direct_ssid, |
b481de9c ZY |
4773 | priv->direct_ssid_len)); |
4774 | scan->direct_scan[0].id = WLAN_EID_SSID; | |
4775 | scan->direct_scan[0].len = priv->direct_ssid_len; | |
4776 | memcpy(scan->direct_scan[0].ssid, | |
4777 | priv->direct_ssid, priv->direct_ssid_len); | |
4778 | direct_mask = 1; | |
3109ece1 | 4779 | } else if (!iwl_is_associated(priv) && priv->essid_len) { |
786b4557 BM |
4780 | IWL_DEBUG_SCAN |
4781 | ("Kicking off one direct scan for '%s' when not associated\n", | |
4782 | iwl4965_escape_essid(priv->essid, priv->essid_len)); | |
b481de9c ZY |
4783 | scan->direct_scan[0].id = WLAN_EID_SSID; |
4784 | scan->direct_scan[0].len = priv->essid_len; | |
4785 | memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len); | |
4786 | direct_mask = 1; | |
857485c0 | 4787 | } else { |
786b4557 | 4788 | IWL_DEBUG_SCAN("Kicking off one indirect scan.\n"); |
b481de9c | 4789 | direct_mask = 0; |
857485c0 | 4790 | } |
b481de9c | 4791 | |
b481de9c | 4792 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; |
5425e490 | 4793 | scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; |
b481de9c ZY |
4794 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
4795 | ||
b481de9c ZY |
4796 | |
4797 | switch (priv->scan_bands) { | |
4798 | case 2: | |
4799 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | |
4800 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 4801 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, |
b481de9c ZY |
4802 | RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK); |
4803 | ||
4804 | scan->good_CRC_th = 0; | |
8318d78a | 4805 | band = IEEE80211_BAND_2GHZ; |
b481de9c ZY |
4806 | break; |
4807 | ||
4808 | case 1: | |
4809 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 4810 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, |
b481de9c ZY |
4811 | RATE_MCS_ANT_B_MSK); |
4812 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | |
8318d78a | 4813 | band = IEEE80211_BAND_5GHZ; |
b481de9c ZY |
4814 | break; |
4815 | ||
4816 | default: | |
4817 | IWL_WARNING("Invalid scan band count\n"); | |
4818 | goto done; | |
4819 | } | |
4820 | ||
78330fdd TW |
4821 | /* We don't build a direct scan probe request; the uCode will do |
4822 | * that based on the direct_mask added to each channel entry */ | |
4823 | cmd_len = iwl4965_fill_probe_req(priv, band, | |
4824 | (struct ieee80211_mgmt *)scan->data, | |
4825 | IWL_MAX_SCAN_SIZE - sizeof(*scan), 0); | |
4826 | ||
4827 | scan->tx_cmd.len = cpu_to_le16(cmd_len); | |
b481de9c ZY |
4828 | /* select Rx chains */ |
4829 | ||
4830 | /* Force use of chains B and C (0x6) for scan Rx. | |
4831 | * Avoid A (0x1) because of its off-channel reception on A-band. | |
4832 | * MIMO is not used here, but value is required to make uCode happy. */ | |
4833 | scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK | | |
4834 | cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) | | |
4835 | (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) | | |
4836 | (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS)); | |
4837 | ||
4838 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) | |
4839 | scan->filter_flags = RXON_FILTER_PROMISC_MSK; | |
4840 | ||
786b4557 | 4841 | if (direct_mask) |
26c0f03f RC |
4842 | scan->channel_count = |
4843 | iwl4965_get_channels_for_scan( | |
4844 | priv, band, 1, /* active */ | |
4845 | direct_mask, | |
4846 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
786b4557 | 4847 | else |
26c0f03f RC |
4848 | scan->channel_count = |
4849 | iwl4965_get_channels_for_scan( | |
4850 | priv, band, 0, /* passive */ | |
4851 | direct_mask, | |
4852 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
b481de9c | 4853 | |
5da4b55f MA |
4854 | scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | |
4855 | RXON_FILTER_BCON_AWARE_MSK); | |
b481de9c | 4856 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + |
bb8c093b | 4857 | scan->channel_count * sizeof(struct iwl4965_scan_channel); |
b481de9c ZY |
4858 | cmd.data = scan; |
4859 | scan->len = cpu_to_le16(cmd.len); | |
4860 | ||
4861 | set_bit(STATUS_SCAN_HW, &priv->status); | |
857485c0 TW |
4862 | ret = iwl_send_cmd_sync(priv, &cmd); |
4863 | if (ret) | |
b481de9c ZY |
4864 | goto done; |
4865 | ||
4866 | queue_delayed_work(priv->workqueue, &priv->scan_check, | |
4867 | IWL_SCAN_CHECK_WATCHDOG); | |
4868 | ||
4869 | mutex_unlock(&priv->mutex); | |
4870 | return; | |
4871 | ||
4872 | done: | |
01ebd063 | 4873 | /* inform mac80211 scan aborted */ |
b481de9c ZY |
4874 | queue_work(priv->workqueue, &priv->scan_completed); |
4875 | mutex_unlock(&priv->mutex); | |
4876 | } | |
4877 | ||
bb8c093b | 4878 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 4879 | { |
c79dd5b5 | 4880 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
4881 | |
4882 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4883 | return; | |
4884 | ||
4885 | mutex_lock(&priv->mutex); | |
bb8c093b | 4886 | __iwl4965_up(priv); |
b481de9c ZY |
4887 | mutex_unlock(&priv->mutex); |
4888 | } | |
4889 | ||
bb8c093b | 4890 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 4891 | { |
c79dd5b5 | 4892 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
4893 | |
4894 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4895 | return; | |
4896 | ||
bb8c093b | 4897 | iwl4965_down(priv); |
b481de9c ZY |
4898 | queue_work(priv->workqueue, &priv->up); |
4899 | } | |
4900 | ||
bb8c093b | 4901 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 4902 | { |
c79dd5b5 TW |
4903 | struct iwl_priv *priv = |
4904 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
4905 | |
4906 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4907 | return; | |
4908 | ||
4909 | mutex_lock(&priv->mutex); | |
a55360e4 | 4910 | iwl_rx_replenish(priv); |
b481de9c ZY |
4911 | mutex_unlock(&priv->mutex); |
4912 | } | |
4913 | ||
7878a5a4 MA |
4914 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
4915 | ||
508e32e1 | 4916 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 4917 | { |
b481de9c | 4918 | struct ieee80211_conf *conf = NULL; |
857485c0 | 4919 | int ret = 0; |
0795af57 | 4920 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
4921 | |
4922 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
4923 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
4924 | return; | |
4925 | } | |
4926 | ||
0795af57 JP |
4927 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
4928 | priv->assoc_id, | |
4929 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
4930 | |
4931 | ||
4932 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4933 | return; | |
4934 | ||
b481de9c | 4935 | |
508e32e1 | 4936 | if (!priv->vif || !priv->is_open) |
948c171c | 4937 | return; |
508e32e1 | 4938 | |
bb8c093b | 4939 | iwl4965_scan_cancel_timeout(priv, 200); |
052c4b9f | 4940 | |
b481de9c ZY |
4941 | conf = ieee80211_get_hw_conf(priv->hw); |
4942 | ||
4943 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 4944 | iwl4965_commit_rxon(priv); |
b481de9c | 4945 | |
bb8c093b CH |
4946 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
4947 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 4948 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 4949 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 4950 | if (ret) |
b481de9c ZY |
4951 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
4952 | "Attempting to continue.\n"); | |
4953 | ||
4954 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
4955 | ||
c8b0e6e1 | 4956 | #ifdef CONFIG_IWL4965_HT |
fd105e79 | 4957 | if (priv->current_ht_config.is_ht) |
47c5196e | 4958 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
c8b0e6e1 | 4959 | #endif /* CONFIG_IWL4965_HT*/ |
c7de35cd | 4960 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
4961 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
4962 | ||
4963 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
4964 | priv->assoc_id, priv->beacon_int); | |
4965 | ||
4966 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
4967 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
4968 | else | |
4969 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
4970 | ||
4971 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
4972 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
4973 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
4974 | else | |
4975 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
4976 | ||
4977 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
4978 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
4979 | ||
4980 | } | |
4981 | ||
bb8c093b | 4982 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
4983 | |
4984 | switch (priv->iw_mode) { | |
4985 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 4986 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
4987 | break; |
4988 | ||
4989 | case IEEE80211_IF_TYPE_IBSS: | |
4990 | ||
4991 | /* clear out the station table */ | |
bf85ea4f | 4992 | iwlcore_clear_stations_table(priv); |
b481de9c | 4993 | |
bb8c093b CH |
4994 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
4995 | iwl4965_rxon_add_station(priv, priv->bssid, 0); | |
4996 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); | |
4997 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
4998 | |
4999 | break; | |
5000 | ||
5001 | default: | |
5002 | IWL_ERROR("%s Should not be called in %d mode\n", | |
5003 | __FUNCTION__, priv->iw_mode); | |
5004 | break; | |
5005 | } | |
5006 | ||
bb8c093b | 5007 | iwl4965_sequence_reset(priv); |
b481de9c | 5008 | |
b481de9c | 5009 | /* Enable Rx differential gain and sensitivity calibrations */ |
f0832f13 | 5010 | iwl_chain_noise_reset(priv); |
b481de9c | 5011 | priv->start_calib = 1; |
b481de9c ZY |
5012 | |
5013 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5014 | priv->assoc_station_added = 1; | |
5015 | ||
bb8c093b | 5016 | iwl4965_activate_qos(priv, 0); |
292ae174 | 5017 | |
5da4b55f | 5018 | iwl_power_update_mode(priv, 0); |
7878a5a4 MA |
5019 | /* we have just associated, don't start scan too early */ |
5020 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
5021 | } |
5022 | ||
5023 | ||
5024 | static void iwl4965_bg_post_associate(struct work_struct *data) | |
5025 | { | |
5026 | struct iwl_priv *priv = container_of(data, struct iwl_priv, | |
5027 | post_associate.work); | |
5028 | ||
5029 | mutex_lock(&priv->mutex); | |
5030 | iwl4965_post_associate(priv); | |
b481de9c | 5031 | mutex_unlock(&priv->mutex); |
508e32e1 | 5032 | |
b481de9c ZY |
5033 | } |
5034 | ||
bb8c093b | 5035 | static void iwl4965_bg_abort_scan(struct work_struct *work) |
b481de9c | 5036 | { |
c79dd5b5 | 5037 | struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); |
b481de9c | 5038 | |
fee1247a | 5039 | if (!iwl_is_ready(priv)) |
b481de9c ZY |
5040 | return; |
5041 | ||
5042 | mutex_lock(&priv->mutex); | |
5043 | ||
5044 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
bb8c093b | 5045 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
5046 | |
5047 | mutex_unlock(&priv->mutex); | |
5048 | } | |
5049 | ||
76bb77e0 ZY |
5050 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
5051 | ||
bb8c093b | 5052 | static void iwl4965_bg_scan_completed(struct work_struct *work) |
b481de9c | 5053 | { |
c79dd5b5 TW |
5054 | struct iwl_priv *priv = |
5055 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c ZY |
5056 | |
5057 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n"); | |
5058 | ||
5059 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5060 | return; | |
5061 | ||
a0646470 ZY |
5062 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
5063 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 5064 | |
b481de9c ZY |
5065 | ieee80211_scan_completed(priv->hw); |
5066 | ||
5067 | /* Since setting the TXPOWER may have been deferred while | |
5068 | * performing the scan, fire one off */ | |
5069 | mutex_lock(&priv->mutex); | |
bb8c093b | 5070 | iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
5071 | mutex_unlock(&priv->mutex); |
5072 | } | |
5073 | ||
5074 | /***************************************************************************** | |
5075 | * | |
5076 | * mac80211 entry point functions | |
5077 | * | |
5078 | *****************************************************************************/ | |
5079 | ||
5a66926a ZY |
5080 | #define UCODE_READY_TIMEOUT (2 * HZ) |
5081 | ||
bb8c093b | 5082 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 5083 | { |
c79dd5b5 | 5084 | struct iwl_priv *priv = hw->priv; |
5a66926a | 5085 | int ret; |
b481de9c ZY |
5086 | |
5087 | IWL_DEBUG_MAC80211("enter\n"); | |
5088 | ||
5a66926a ZY |
5089 | if (pci_enable_device(priv->pci_dev)) { |
5090 | IWL_ERROR("Fail to pci_enable_device\n"); | |
5091 | return -ENODEV; | |
5092 | } | |
5093 | pci_restore_state(priv->pci_dev); | |
5094 | pci_enable_msi(priv->pci_dev); | |
5095 | ||
5096 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
5097 | DRV_NAME, priv); | |
5098 | if (ret) { | |
5099 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
5100 | goto out_disable_msi; | |
5101 | } | |
5102 | ||
b481de9c ZY |
5103 | /* we should be verifying the device is ready to be opened */ |
5104 | mutex_lock(&priv->mutex); | |
5105 | ||
5a66926a ZY |
5106 | memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd)); |
5107 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | |
5108 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 5109 | |
5a66926a ZY |
5110 | if (!priv->ucode_code.len) { |
5111 | ret = iwl4965_read_ucode(priv); | |
5112 | if (ret) { | |
5113 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
5114 | mutex_unlock(&priv->mutex); | |
5115 | goto out_release_irq; | |
5116 | } | |
5117 | } | |
b481de9c | 5118 | |
e655b9f0 | 5119 | ret = __iwl4965_up(priv); |
5a66926a | 5120 | |
b481de9c | 5121 | mutex_unlock(&priv->mutex); |
5a66926a | 5122 | |
e655b9f0 ZY |
5123 | if (ret) |
5124 | goto out_release_irq; | |
5125 | ||
5126 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
5127 | ||
5128 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
5129 | return 0; | |
5130 | ||
5a66926a ZY |
5131 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from |
5132 | * mac80211 will not be run successfully. */ | |
5133 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
5134 | test_bit(STATUS_READY, &priv->status), | |
5135 | UCODE_READY_TIMEOUT); | |
5136 | if (!ret) { | |
5137 | if (!test_bit(STATUS_READY, &priv->status)) { | |
5138 | IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n", | |
5139 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
5140 | ret = -ETIMEDOUT; | |
5141 | goto out_release_irq; | |
5142 | } | |
5143 | } | |
5144 | ||
e655b9f0 | 5145 | priv->is_open = 1; |
b481de9c ZY |
5146 | IWL_DEBUG_MAC80211("leave\n"); |
5147 | return 0; | |
5a66926a ZY |
5148 | |
5149 | out_release_irq: | |
5150 | free_irq(priv->pci_dev->irq, priv); | |
5151 | out_disable_msi: | |
5152 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
5153 | pci_disable_device(priv->pci_dev); |
5154 | priv->is_open = 0; | |
5155 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 5156 | return ret; |
b481de9c ZY |
5157 | } |
5158 | ||
bb8c093b | 5159 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 5160 | { |
c79dd5b5 | 5161 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5162 | |
5163 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 5164 | |
e655b9f0 ZY |
5165 | if (!priv->is_open) { |
5166 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
5167 | return; | |
5168 | } | |
5169 | ||
b481de9c | 5170 | priv->is_open = 0; |
5a66926a | 5171 | |
fee1247a | 5172 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
5173 | /* stop mac, cancel any scan request and clear |
5174 | * RXON_FILTER_ASSOC_MSK BIT | |
5175 | */ | |
5a66926a ZY |
5176 | mutex_lock(&priv->mutex); |
5177 | iwl4965_scan_cancel_timeout(priv, 100); | |
5178 | cancel_delayed_work(&priv->post_associate); | |
fde3571f | 5179 | mutex_unlock(&priv->mutex); |
fde3571f MA |
5180 | } |
5181 | ||
5a66926a ZY |
5182 | iwl4965_down(priv); |
5183 | ||
5184 | flush_workqueue(priv->workqueue); | |
5185 | free_irq(priv->pci_dev->irq, priv); | |
5186 | pci_disable_msi(priv->pci_dev); | |
5187 | pci_save_state(priv->pci_dev); | |
5188 | pci_disable_device(priv->pci_dev); | |
948c171c | 5189 | |
b481de9c | 5190 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
5191 | } |
5192 | ||
bb8c093b | 5193 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
5194 | struct ieee80211_tx_control *ctl) |
5195 | { | |
c79dd5b5 | 5196 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5197 | |
5198 | IWL_DEBUG_MAC80211("enter\n"); | |
5199 | ||
5200 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
5201 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
5202 | return -1; | |
5203 | } | |
5204 | ||
5205 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
8318d78a | 5206 | ctl->tx_rate->bitrate); |
b481de9c | 5207 | |
bb8c093b | 5208 | if (iwl4965_tx_skb(priv, skb, ctl)) |
b481de9c ZY |
5209 | dev_kfree_skb_any(skb); |
5210 | ||
5211 | IWL_DEBUG_MAC80211("leave\n"); | |
5212 | return 0; | |
5213 | } | |
5214 | ||
bb8c093b | 5215 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
5216 | struct ieee80211_if_init_conf *conf) |
5217 | { | |
c79dd5b5 | 5218 | struct iwl_priv *priv = hw->priv; |
b481de9c | 5219 | unsigned long flags; |
0795af57 | 5220 | DECLARE_MAC_BUF(mac); |
b481de9c | 5221 | |
32bfd35d | 5222 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 5223 | |
32bfd35d JB |
5224 | if (priv->vif) { |
5225 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 5226 | return -EOPNOTSUPP; |
b481de9c ZY |
5227 | } |
5228 | ||
5229 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 5230 | priv->vif = conf->vif; |
b481de9c ZY |
5231 | |
5232 | spin_unlock_irqrestore(&priv->lock, flags); | |
5233 | ||
5234 | mutex_lock(&priv->mutex); | |
864792e3 TW |
5235 | |
5236 | if (conf->mac_addr) { | |
5237 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
5238 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
5239 | } | |
b481de9c | 5240 | |
fee1247a | 5241 | if (iwl_is_ready(priv)) |
5a66926a ZY |
5242 | iwl4965_set_mode(priv, conf->type); |
5243 | ||
b481de9c ZY |
5244 | mutex_unlock(&priv->mutex); |
5245 | ||
5a66926a | 5246 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
5247 | return 0; |
5248 | } | |
5249 | ||
5250 | /** | |
bb8c093b | 5251 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
5252 | * |
5253 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
5254 | * be set inappropriately and the driver currently sets the hardware up to | |
5255 | * use it whenever needed. | |
5256 | */ | |
bb8c093b | 5257 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 5258 | { |
c79dd5b5 | 5259 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 5260 | const struct iwl_channel_info *ch_info; |
b481de9c | 5261 | unsigned long flags; |
76bb77e0 | 5262 | int ret = 0; |
b481de9c ZY |
5263 | |
5264 | mutex_lock(&priv->mutex); | |
8318d78a | 5265 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 5266 | |
12342c47 ZY |
5267 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
5268 | ||
fee1247a | 5269 | if (!iwl_is_ready(priv)) { |
b481de9c | 5270 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
5271 | ret = -EIO; |
5272 | goto out; | |
b481de9c ZY |
5273 | } |
5274 | ||
1ea87396 | 5275 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 5276 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
5277 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
5278 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 5279 | mutex_unlock(&priv->mutex); |
a0646470 | 5280 | return 0; |
b481de9c ZY |
5281 | } |
5282 | ||
5283 | spin_lock_irqsave(&priv->lock, flags); | |
5284 | ||
8622e705 | 5285 | ch_info = iwl_get_channel_info(priv, conf->channel->band, |
8318d78a | 5286 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 5287 | if (!is_channel_valid(ch_info)) { |
b481de9c ZY |
5288 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
5289 | spin_unlock_irqrestore(&priv->lock, flags); | |
76bb77e0 ZY |
5290 | ret = -EINVAL; |
5291 | goto out; | |
b481de9c ZY |
5292 | } |
5293 | ||
c8b0e6e1 | 5294 | #ifdef CONFIG_IWL4965_HT |
78330fdd | 5295 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
5296 | * from any ht related info since 2.4 does not |
5297 | * support ht */ | |
78330fdd | 5298 | if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value) |
b481de9c ZY |
5299 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
5300 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
5301 | #endif | |
5302 | ) | |
5303 | priv->staging_rxon.flags = 0; | |
c8b0e6e1 | 5304 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 5305 | |
c7de35cd | 5306 | iwl_set_rxon_channel(priv, conf->channel->band, |
8318d78a | 5307 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 5308 | |
8318d78a | 5309 | iwl4965_set_flags_for_phymode(priv, conf->channel->band); |
b481de9c ZY |
5310 | |
5311 | /* The list of supported rates and rate mask can be different | |
8318d78a | 5312 | * for each band; since the band may have changed, reset |
b481de9c | 5313 | * the rate mask to what mac80211 lists */ |
bb8c093b | 5314 | iwl4965_set_rate(priv); |
b481de9c ZY |
5315 | |
5316 | spin_unlock_irqrestore(&priv->lock, flags); | |
5317 | ||
5318 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
5319 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 5320 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 5321 | goto out; |
b481de9c ZY |
5322 | } |
5323 | #endif | |
5324 | ||
ad97edd2 MA |
5325 | if (priv->cfg->ops->lib->radio_kill_sw) |
5326 | priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled); | |
b481de9c ZY |
5327 | |
5328 | if (!conf->radio_enabled) { | |
5329 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 5330 | goto out; |
b481de9c ZY |
5331 | } |
5332 | ||
fee1247a | 5333 | if (iwl_is_rfkill(priv)) { |
b481de9c | 5334 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
5335 | ret = -EIO; |
5336 | goto out; | |
b481de9c ZY |
5337 | } |
5338 | ||
bb8c093b | 5339 | iwl4965_set_rate(priv); |
b481de9c ZY |
5340 | |
5341 | if (memcmp(&priv->active_rxon, | |
5342 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 5343 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5344 | else |
5345 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
5346 | ||
5347 | IWL_DEBUG_MAC80211("leave\n"); | |
5348 | ||
a0646470 ZY |
5349 | out: |
5350 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 5351 | mutex_unlock(&priv->mutex); |
76bb77e0 | 5352 | return ret; |
b481de9c ZY |
5353 | } |
5354 | ||
c79dd5b5 | 5355 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 5356 | { |
857485c0 | 5357 | int ret = 0; |
b481de9c | 5358 | |
d986bcd1 | 5359 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
5360 | return; |
5361 | ||
5362 | /* The following should be done only at AP bring up */ | |
5363 | if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) { | |
5364 | ||
5365 | /* RXON - unassoc (to set timing command) */ | |
5366 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 5367 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5368 | |
5369 | /* RXON Timing */ | |
bb8c093b CH |
5370 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
5371 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 5372 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 5373 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 5374 | if (ret) |
b481de9c ZY |
5375 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
5376 | "Attempting to continue.\n"); | |
5377 | ||
c7de35cd | 5378 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
5379 | |
5380 | /* FIXME: what should be the assoc_id for AP? */ | |
5381 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
5382 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
5383 | priv->staging_rxon.flags |= | |
5384 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
5385 | else | |
5386 | priv->staging_rxon.flags &= | |
5387 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
5388 | ||
5389 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
5390 | if (priv->assoc_capability & | |
5391 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
5392 | priv->staging_rxon.flags |= | |
5393 | RXON_FLG_SHORT_SLOT_MSK; | |
5394 | else | |
5395 | priv->staging_rxon.flags &= | |
5396 | ~RXON_FLG_SHORT_SLOT_MSK; | |
5397 | ||
5398 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5399 | priv->staging_rxon.flags &= | |
5400 | ~RXON_FLG_SHORT_SLOT_MSK; | |
5401 | } | |
5402 | /* restore RXON assoc */ | |
5403 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 5404 | iwl4965_commit_rxon(priv); |
bb8c093b | 5405 | iwl4965_activate_qos(priv, 1); |
bb8c093b | 5406 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
e1493deb | 5407 | } |
bb8c093b | 5408 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
5409 | |
5410 | /* FIXME - we need to add code here to detect a totally new | |
5411 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
5412 | * clear sta table, add BCAST sta... */ | |
5413 | } | |
5414 | ||
32bfd35d JB |
5415 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
5416 | struct ieee80211_vif *vif, | |
b481de9c ZY |
5417 | struct ieee80211_if_conf *conf) |
5418 | { | |
c79dd5b5 | 5419 | struct iwl_priv *priv = hw->priv; |
0795af57 | 5420 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
5421 | unsigned long flags; |
5422 | int rc; | |
5423 | ||
5424 | if (conf == NULL) | |
5425 | return -EIO; | |
5426 | ||
b716bb91 EG |
5427 | if (priv->vif != vif) { |
5428 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
5429 | return 0; |
5430 | } | |
5431 | ||
b481de9c ZY |
5432 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
5433 | (!conf->beacon || !conf->ssid_len)) { | |
5434 | IWL_DEBUG_MAC80211 | |
5435 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
5436 | return 0; | |
5437 | } | |
5438 | ||
fee1247a | 5439 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
5440 | return -EAGAIN; |
5441 | ||
b481de9c ZY |
5442 | mutex_lock(&priv->mutex); |
5443 | ||
b481de9c | 5444 | if (conf->bssid) |
0795af57 JP |
5445 | IWL_DEBUG_MAC80211("bssid: %s\n", |
5446 | print_mac(mac, conf->bssid)); | |
b481de9c | 5447 | |
4150c572 JB |
5448 | /* |
5449 | * very dubious code was here; the probe filtering flag is never set: | |
5450 | * | |
b481de9c ZY |
5451 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
5452 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 5453 | */ |
b481de9c ZY |
5454 | |
5455 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
5456 | if (!conf->bssid) { | |
5457 | conf->bssid = priv->mac_addr; | |
5458 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
5459 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
5460 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
5461 | } |
5462 | if (priv->ibss_beacon) | |
5463 | dev_kfree_skb(priv->ibss_beacon); | |
5464 | ||
5465 | priv->ibss_beacon = conf->beacon; | |
5466 | } | |
5467 | ||
fee1247a | 5468 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
5469 | goto done; |
5470 | ||
b481de9c ZY |
5471 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
5472 | !is_multicast_ether_addr(conf->bssid)) { | |
5473 | /* If there is currently a HW scan going on in the background | |
5474 | * then we need to cancel it else the RXON below will fail. */ | |
bb8c093b | 5475 | if (iwl4965_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
5476 | IWL_WARNING("Aborted scan still in progress " |
5477 | "after 100ms\n"); | |
5478 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
5479 | mutex_unlock(&priv->mutex); | |
5480 | return -EAGAIN; | |
5481 | } | |
5482 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
5483 | ||
5484 | /* TODO: Audit driver for usage of these members and see | |
5485 | * if mac80211 deprecates them (priv->bssid looks like it | |
5486 | * shouldn't be there, but I haven't scanned the IBSS code | |
5487 | * to verify) - jpk */ | |
5488 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
5489 | ||
5490 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 5491 | iwl4965_config_ap(priv); |
b481de9c | 5492 | else { |
bb8c093b | 5493 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 5494 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
bb8c093b | 5495 | iwl4965_rxon_add_station( |
b481de9c ZY |
5496 | priv, priv->active_rxon.bssid_addr, 1); |
5497 | } | |
5498 | ||
5499 | } else { | |
bb8c093b | 5500 | iwl4965_scan_cancel_timeout(priv, 100); |
b481de9c | 5501 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 5502 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5503 | } |
5504 | ||
fde3571f | 5505 | done: |
b481de9c ZY |
5506 | spin_lock_irqsave(&priv->lock, flags); |
5507 | if (!conf->ssid_len) | |
5508 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
5509 | else | |
5510 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
5511 | ||
5512 | priv->essid_len = conf->ssid_len; | |
5513 | spin_unlock_irqrestore(&priv->lock, flags); | |
5514 | ||
5515 | IWL_DEBUG_MAC80211("leave\n"); | |
5516 | mutex_unlock(&priv->mutex); | |
5517 | ||
5518 | return 0; | |
5519 | } | |
5520 | ||
bb8c093b | 5521 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
5522 | unsigned int changed_flags, |
5523 | unsigned int *total_flags, | |
5524 | int mc_count, struct dev_addr_list *mc_list) | |
5525 | { | |
5526 | /* | |
5527 | * XXX: dummy | |
bb8c093b | 5528 | * see also iwl4965_connection_init_rx_config |
4150c572 JB |
5529 | */ |
5530 | *total_flags = 0; | |
5531 | } | |
5532 | ||
bb8c093b | 5533 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
5534 | struct ieee80211_if_init_conf *conf) |
5535 | { | |
c79dd5b5 | 5536 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5537 | |
5538 | IWL_DEBUG_MAC80211("enter\n"); | |
5539 | ||
5540 | mutex_lock(&priv->mutex); | |
948c171c | 5541 | |
fee1247a | 5542 | if (iwl_is_ready_rf(priv)) { |
fde3571f MA |
5543 | iwl4965_scan_cancel_timeout(priv, 100); |
5544 | cancel_delayed_work(&priv->post_associate); | |
5545 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5546 | iwl4965_commit_rxon(priv); | |
5547 | } | |
32bfd35d JB |
5548 | if (priv->vif == conf->vif) { |
5549 | priv->vif = NULL; | |
b481de9c ZY |
5550 | memset(priv->bssid, 0, ETH_ALEN); |
5551 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
5552 | priv->essid_len = 0; | |
5553 | } | |
5554 | mutex_unlock(&priv->mutex); | |
5555 | ||
5556 | IWL_DEBUG_MAC80211("leave\n"); | |
5557 | ||
5558 | } | |
471b3efd | 5559 | |
3109ece1 | 5560 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
5561 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
5562 | struct ieee80211_vif *vif, | |
5563 | struct ieee80211_bss_conf *bss_conf, | |
5564 | u32 changes) | |
220173b0 | 5565 | { |
c79dd5b5 | 5566 | struct iwl_priv *priv = hw->priv; |
220173b0 | 5567 | |
3109ece1 TW |
5568 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
5569 | ||
471b3efd | 5570 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
5571 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
5572 | bss_conf->use_short_preamble); | |
471b3efd | 5573 | if (bss_conf->use_short_preamble) |
220173b0 TW |
5574 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
5575 | else | |
5576 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
5577 | } | |
5578 | ||
471b3efd | 5579 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 5580 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 5581 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
5582 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
5583 | else | |
5584 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
5585 | } | |
5586 | ||
98952d5d | 5587 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 5588 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 5589 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 5590 | iwl_set_rxon_chain(priv); |
98952d5d TW |
5591 | } |
5592 | ||
471b3efd | 5593 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 5594 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
5595 | /* This should never happen as this function should |
5596 | * never be called from interrupt context. */ | |
5597 | if (WARN_ON_ONCE(in_interrupt())) | |
5598 | return; | |
3109ece1 TW |
5599 | if (bss_conf->assoc) { |
5600 | priv->assoc_id = bss_conf->aid; | |
5601 | priv->beacon_int = bss_conf->beacon_int; | |
5602 | priv->timestamp = bss_conf->timestamp; | |
5603 | priv->assoc_capability = bss_conf->assoc_capability; | |
5604 | priv->next_scan_jiffies = jiffies + | |
5605 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
5606 | mutex_lock(&priv->mutex); |
5607 | iwl4965_post_associate(priv); | |
5608 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
5609 | } else { |
5610 | priv->assoc_id = 0; | |
5611 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
5612 | } | |
5613 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
5614 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 5615 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
5616 | } |
5617 | ||
220173b0 | 5618 | } |
b481de9c | 5619 | |
bb8c093b | 5620 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
5621 | { |
5622 | int rc = 0; | |
5623 | unsigned long flags; | |
c79dd5b5 | 5624 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5625 | |
5626 | IWL_DEBUG_MAC80211("enter\n"); | |
5627 | ||
052c4b9f | 5628 | mutex_lock(&priv->mutex); |
b481de9c ZY |
5629 | spin_lock_irqsave(&priv->lock, flags); |
5630 | ||
fee1247a | 5631 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
5632 | rc = -EIO; |
5633 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
5634 | goto out_unlock; | |
5635 | } | |
5636 | ||
5637 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
5638 | rc = -EIO; | |
5639 | IWL_ERROR("ERROR: APs don't scan\n"); | |
5640 | goto out_unlock; | |
5641 | } | |
5642 | ||
7878a5a4 MA |
5643 | /* we don't schedule scan within next_scan_jiffies period */ |
5644 | if (priv->next_scan_jiffies && | |
5645 | time_after(priv->next_scan_jiffies, jiffies)) { | |
5646 | rc = -EAGAIN; | |
5647 | goto out_unlock; | |
5648 | } | |
b481de9c | 5649 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
5650 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
5651 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
5652 | rc = -EAGAIN; |
5653 | goto out_unlock; | |
5654 | } | |
5655 | if (len) { | |
7878a5a4 | 5656 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
bb8c093b | 5657 | iwl4965_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
5658 | |
5659 | priv->one_direct_scan = 1; | |
5660 | priv->direct_ssid_len = (u8) | |
5661 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
5662 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
5663 | } else |
5664 | priv->one_direct_scan = 0; | |
b481de9c | 5665 | |
bb8c093b | 5666 | rc = iwl4965_scan_initiate(priv); |
b481de9c ZY |
5667 | |
5668 | IWL_DEBUG_MAC80211("leave\n"); | |
5669 | ||
5670 | out_unlock: | |
5671 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 5672 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
5673 | |
5674 | return rc; | |
5675 | } | |
5676 | ||
ab885f8c EG |
5677 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
5678 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
5679 | u32 iv32, u16 *phase1key) | |
5680 | { | |
5681 | struct iwl_priv *priv = hw->priv; | |
5682 | u8 sta_id = IWL_INVALID_STATION; | |
5683 | unsigned long flags; | |
5684 | __le16 key_flags = 0; | |
5685 | int i; | |
5686 | DECLARE_MAC_BUF(mac); | |
5687 | ||
5688 | IWL_DEBUG_MAC80211("enter\n"); | |
5689 | ||
947b13a7 | 5690 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
5691 | if (sta_id == IWL_INVALID_STATION) { |
5692 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
5693 | print_mac(mac, addr)); | |
5694 | return; | |
5695 | } | |
5696 | ||
5697 | iwl4965_scan_cancel_timeout(priv, 100); | |
5698 | ||
5699 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
5700 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
5701 | key_flags &= ~STA_KEY_FLG_INVALID; | |
5702 | ||
5425e490 | 5703 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
5704 | key_flags |= STA_KEY_MULTICAST_MSK; |
5705 | ||
5706 | spin_lock_irqsave(&priv->sta_lock, flags); | |
5707 | ||
ab885f8c EG |
5708 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
5709 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
5710 | ||
5711 | for (i = 0; i < 5; i++) | |
5712 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
5713 | cpu_to_le16(phase1key[i]); | |
5714 | ||
5715 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
5716 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
5717 | ||
133636de | 5718 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
5719 | |
5720 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
5721 | ||
5722 | IWL_DEBUG_MAC80211("leave\n"); | |
5723 | } | |
5724 | ||
bb8c093b | 5725 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
5726 | const u8 *local_addr, const u8 *addr, |
5727 | struct ieee80211_key_conf *key) | |
5728 | { | |
c79dd5b5 | 5729 | struct iwl_priv *priv = hw->priv; |
0795af57 | 5730 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
5731 | int ret = 0; |
5732 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 5733 | u8 is_default_wep_key = 0; |
b481de9c ZY |
5734 | |
5735 | IWL_DEBUG_MAC80211("enter\n"); | |
5736 | ||
099b40b7 | 5737 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
5738 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
5739 | return -EOPNOTSUPP; | |
5740 | } | |
5741 | ||
5742 | if (is_zero_ether_addr(addr)) | |
5743 | /* only support pairwise keys */ | |
5744 | return -EOPNOTSUPP; | |
5745 | ||
947b13a7 | 5746 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
5747 | if (sta_id == IWL_INVALID_STATION) { |
5748 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
5749 | print_mac(mac, addr)); | |
5750 | return -EINVAL; | |
b481de9c | 5751 | |
deb09c43 | 5752 | } |
b481de9c | 5753 | |
6974e363 | 5754 | mutex_lock(&priv->mutex); |
bb8c093b | 5755 | iwl4965_scan_cancel_timeout(priv, 100); |
6974e363 EG |
5756 | mutex_unlock(&priv->mutex); |
5757 | ||
5758 | /* If we are getting WEP group key and we didn't receive any key mapping | |
5759 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
5760 | * in 1X mode. | |
5761 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 5762 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
5763 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
5764 | if (cmd == SET_KEY) | |
5765 | is_default_wep_key = !priv->key_mapping_key; | |
5766 | else | |
5767 | is_default_wep_key = priv->default_wep_key; | |
5768 | } | |
052c4b9f | 5769 | |
b481de9c | 5770 | switch (cmd) { |
deb09c43 | 5771 | case SET_KEY: |
6974e363 EG |
5772 | if (is_default_wep_key) |
5773 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 5774 | else |
7480513f | 5775 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
5776 | |
5777 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
5778 | break; |
5779 | case DISABLE_KEY: | |
6974e363 EG |
5780 | if (is_default_wep_key) |
5781 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 5782 | else |
3ec47732 | 5783 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
5784 | |
5785 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
5786 | break; |
5787 | default: | |
deb09c43 | 5788 | ret = -EINVAL; |
b481de9c ZY |
5789 | } |
5790 | ||
5791 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 5792 | |
deb09c43 | 5793 | return ret; |
b481de9c ZY |
5794 | } |
5795 | ||
e100bb64 | 5796 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
5797 | const struct ieee80211_tx_queue_params *params) |
5798 | { | |
c79dd5b5 | 5799 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5800 | unsigned long flags; |
5801 | int q; | |
b481de9c ZY |
5802 | |
5803 | IWL_DEBUG_MAC80211("enter\n"); | |
5804 | ||
fee1247a | 5805 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
5806 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
5807 | return -EIO; | |
5808 | } | |
5809 | ||
5810 | if (queue >= AC_NUM) { | |
5811 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
5812 | return 0; | |
5813 | } | |
5814 | ||
b481de9c ZY |
5815 | if (!priv->qos_data.qos_enable) { |
5816 | priv->qos_data.qos_active = 0; | |
5817 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
5818 | return 0; | |
5819 | } | |
5820 | q = AC_NUM - 1 - queue; | |
5821 | ||
5822 | spin_lock_irqsave(&priv->lock, flags); | |
5823 | ||
5824 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
5825 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
5826 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
5827 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 5828 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
5829 | |
5830 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
5831 | priv->qos_data.qos_active = 1; | |
5832 | ||
5833 | spin_unlock_irqrestore(&priv->lock, flags); | |
5834 | ||
5835 | mutex_lock(&priv->mutex); | |
5836 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 5837 | iwl4965_activate_qos(priv, 1); |
3109ece1 | 5838 | else if (priv->assoc_id && iwl_is_associated(priv)) |
bb8c093b | 5839 | iwl4965_activate_qos(priv, 0); |
b481de9c ZY |
5840 | |
5841 | mutex_unlock(&priv->mutex); | |
5842 | ||
b481de9c ZY |
5843 | IWL_DEBUG_MAC80211("leave\n"); |
5844 | return 0; | |
5845 | } | |
5846 | ||
bb8c093b | 5847 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
5848 | struct ieee80211_tx_queue_stats *stats) |
5849 | { | |
c79dd5b5 | 5850 | struct iwl_priv *priv = hw->priv; |
b481de9c | 5851 | int i, avail; |
bb8c093b CH |
5852 | struct iwl4965_tx_queue *txq; |
5853 | struct iwl4965_queue *q; | |
b481de9c ZY |
5854 | unsigned long flags; |
5855 | ||
5856 | IWL_DEBUG_MAC80211("enter\n"); | |
5857 | ||
fee1247a | 5858 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
5859 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
5860 | return -EIO; | |
5861 | } | |
5862 | ||
5863 | spin_lock_irqsave(&priv->lock, flags); | |
5864 | ||
5865 | for (i = 0; i < AC_NUM; i++) { | |
5866 | txq = &priv->txq[i]; | |
5867 | q = &txq->q; | |
bb8c093b | 5868 | avail = iwl4965_queue_space(q); |
b481de9c | 5869 | |
57ffc589 JB |
5870 | stats[i].len = q->n_window - avail; |
5871 | stats[i].limit = q->n_window - q->high_mark; | |
5872 | stats[i].count = q->n_window; | |
b481de9c ZY |
5873 | |
5874 | } | |
5875 | spin_unlock_irqrestore(&priv->lock, flags); | |
5876 | ||
5877 | IWL_DEBUG_MAC80211("leave\n"); | |
5878 | ||
5879 | return 0; | |
5880 | } | |
5881 | ||
bb8c093b | 5882 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
5883 | struct ieee80211_low_level_stats *stats) |
5884 | { | |
bf403db8 EK |
5885 | struct iwl_priv *priv = hw->priv; |
5886 | ||
5887 | priv = hw->priv; | |
b481de9c ZY |
5888 | IWL_DEBUG_MAC80211("enter\n"); |
5889 | IWL_DEBUG_MAC80211("leave\n"); | |
5890 | ||
5891 | return 0; | |
5892 | } | |
5893 | ||
bb8c093b | 5894 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c | 5895 | { |
bf403db8 EK |
5896 | struct iwl_priv *priv; |
5897 | ||
5898 | priv = hw->priv; | |
b481de9c ZY |
5899 | IWL_DEBUG_MAC80211("enter\n"); |
5900 | IWL_DEBUG_MAC80211("leave\n"); | |
5901 | ||
5902 | return 0; | |
5903 | } | |
5904 | ||
bb8c093b | 5905 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 5906 | { |
c79dd5b5 | 5907 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5908 | unsigned long flags; |
5909 | ||
5910 | mutex_lock(&priv->mutex); | |
5911 | IWL_DEBUG_MAC80211("enter\n"); | |
5912 | ||
5913 | priv->lq_mngr.lq_ready = 0; | |
c8b0e6e1 | 5914 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 5915 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 5916 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 5917 | spin_unlock_irqrestore(&priv->lock, flags); |
c8b0e6e1 | 5918 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 5919 | |
c7de35cd | 5920 | iwl_reset_qos(priv); |
b481de9c ZY |
5921 | |
5922 | cancel_delayed_work(&priv->post_associate); | |
5923 | ||
5924 | spin_lock_irqsave(&priv->lock, flags); | |
5925 | priv->assoc_id = 0; | |
5926 | priv->assoc_capability = 0; | |
b481de9c ZY |
5927 | priv->assoc_station_added = 0; |
5928 | ||
5929 | /* new association get rid of ibss beacon skb */ | |
5930 | if (priv->ibss_beacon) | |
5931 | dev_kfree_skb(priv->ibss_beacon); | |
5932 | ||
5933 | priv->ibss_beacon = NULL; | |
5934 | ||
5935 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 5936 | priv->timestamp = 0; |
b481de9c ZY |
5937 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
5938 | priv->beacon_int = 0; | |
5939 | ||
5940 | spin_unlock_irqrestore(&priv->lock, flags); | |
5941 | ||
fee1247a | 5942 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
5943 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
5944 | mutex_unlock(&priv->mutex); | |
5945 | return; | |
5946 | } | |
5947 | ||
052c4b9f | 5948 | /* we are restarting association process |
5949 | * clear RXON_FILTER_ASSOC_MSK bit | |
5950 | */ | |
5951 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
bb8c093b | 5952 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 5953 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 5954 | iwl4965_commit_rxon(priv); |
052c4b9f | 5955 | } |
5956 | ||
5da4b55f MA |
5957 | iwl_power_update_mode(priv, 0); |
5958 | ||
b481de9c ZY |
5959 | /* Per mac80211.h: This is only used in IBSS mode... */ |
5960 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 5961 | |
b481de9c ZY |
5962 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
5963 | mutex_unlock(&priv->mutex); | |
5964 | return; | |
5965 | } | |
5966 | ||
bb8c093b | 5967 | iwl4965_set_rate(priv); |
b481de9c ZY |
5968 | |
5969 | mutex_unlock(&priv->mutex); | |
5970 | ||
5971 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
5972 | } |
5973 | ||
bb8c093b | 5974 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
5975 | struct ieee80211_tx_control *control) |
5976 | { | |
c79dd5b5 | 5977 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5978 | unsigned long flags; |
5979 | ||
5980 | mutex_lock(&priv->mutex); | |
5981 | IWL_DEBUG_MAC80211("enter\n"); | |
5982 | ||
fee1247a | 5983 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
5984 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
5985 | mutex_unlock(&priv->mutex); | |
5986 | return -EIO; | |
5987 | } | |
5988 | ||
5989 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
5990 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
5991 | mutex_unlock(&priv->mutex); | |
5992 | return -EIO; | |
5993 | } | |
5994 | ||
5995 | spin_lock_irqsave(&priv->lock, flags); | |
5996 | ||
5997 | if (priv->ibss_beacon) | |
5998 | dev_kfree_skb(priv->ibss_beacon); | |
5999 | ||
6000 | priv->ibss_beacon = skb; | |
6001 | ||
6002 | priv->assoc_id = 0; | |
6003 | ||
6004 | IWL_DEBUG_MAC80211("leave\n"); | |
6005 | spin_unlock_irqrestore(&priv->lock, flags); | |
6006 | ||
c7de35cd | 6007 | iwl_reset_qos(priv); |
b481de9c ZY |
6008 | |
6009 | queue_work(priv->workqueue, &priv->post_associate.work); | |
6010 | ||
6011 | mutex_unlock(&priv->mutex); | |
6012 | ||
6013 | return 0; | |
6014 | } | |
6015 | ||
b481de9c ZY |
6016 | /***************************************************************************** |
6017 | * | |
6018 | * sysfs attributes | |
6019 | * | |
6020 | *****************************************************************************/ | |
6021 | ||
0a6857e7 | 6022 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
6023 | |
6024 | /* | |
6025 | * The following adds a new attribute to the sysfs representation | |
6026 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
6027 | * used for controlling the debug level. | |
6028 | * | |
6029 | * See the level definitions in iwl for details. | |
6030 | */ | |
6031 | ||
6032 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | |
6033 | { | |
0a6857e7 | 6034 | return sprintf(buf, "0x%08X\n", iwl_debug_level); |
b481de9c ZY |
6035 | } |
6036 | static ssize_t store_debug_level(struct device_driver *d, | |
6037 | const char *buf, size_t count) | |
6038 | { | |
6039 | char *p = (char *)buf; | |
6040 | u32 val; | |
6041 | ||
6042 | val = simple_strtoul(p, &p, 0); | |
6043 | if (p == buf) | |
6044 | printk(KERN_INFO DRV_NAME | |
6045 | ": %s is not in hex or decimal form.\n", buf); | |
6046 | else | |
0a6857e7 | 6047 | iwl_debug_level = val; |
b481de9c ZY |
6048 | |
6049 | return strnlen(buf, count); | |
6050 | } | |
6051 | ||
6052 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | |
6053 | show_debug_level, store_debug_level); | |
6054 | ||
0a6857e7 | 6055 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 6056 | |
b481de9c ZY |
6057 | |
6058 | static ssize_t show_temperature(struct device *d, | |
6059 | struct device_attribute *attr, char *buf) | |
6060 | { | |
c79dd5b5 | 6061 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 6062 | |
fee1247a | 6063 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6064 | return -EAGAIN; |
6065 | ||
bb8c093b | 6066 | return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv)); |
b481de9c ZY |
6067 | } |
6068 | ||
6069 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
6070 | ||
6071 | static ssize_t show_rs_window(struct device *d, | |
6072 | struct device_attribute *attr, | |
6073 | char *buf) | |
6074 | { | |
c79dd5b5 | 6075 | struct iwl_priv *priv = d->driver_data; |
bb8c093b | 6076 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); |
b481de9c ZY |
6077 | } |
6078 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
6079 | ||
6080 | static ssize_t show_tx_power(struct device *d, | |
6081 | struct device_attribute *attr, char *buf) | |
6082 | { | |
c79dd5b5 | 6083 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6084 | return sprintf(buf, "%d\n", priv->user_txpower_limit); |
6085 | } | |
6086 | ||
6087 | static ssize_t store_tx_power(struct device *d, | |
6088 | struct device_attribute *attr, | |
6089 | const char *buf, size_t count) | |
6090 | { | |
c79dd5b5 | 6091 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6092 | char *p = (char *)buf; |
6093 | u32 val; | |
6094 | ||
6095 | val = simple_strtoul(p, &p, 10); | |
6096 | if (p == buf) | |
6097 | printk(KERN_INFO DRV_NAME | |
6098 | ": %s is not in decimal form.\n", buf); | |
6099 | else | |
bb8c093b | 6100 | iwl4965_hw_reg_set_txpower(priv, val); |
b481de9c ZY |
6101 | |
6102 | return count; | |
6103 | } | |
6104 | ||
6105 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
6106 | ||
6107 | static ssize_t show_flags(struct device *d, | |
6108 | struct device_attribute *attr, char *buf) | |
6109 | { | |
c79dd5b5 | 6110 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6111 | |
6112 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
6113 | } | |
6114 | ||
6115 | static ssize_t store_flags(struct device *d, | |
6116 | struct device_attribute *attr, | |
6117 | const char *buf, size_t count) | |
6118 | { | |
c79dd5b5 | 6119 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6120 | u32 flags = simple_strtoul(buf, NULL, 0); |
6121 | ||
6122 | mutex_lock(&priv->mutex); | |
6123 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
6124 | /* Cancel any currently running scans... */ | |
bb8c093b | 6125 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
6126 | IWL_WARNING("Could not cancel scan.\n"); |
6127 | else { | |
6128 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
6129 | flags); | |
6130 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 6131 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6132 | } |
6133 | } | |
6134 | mutex_unlock(&priv->mutex); | |
6135 | ||
6136 | return count; | |
6137 | } | |
6138 | ||
6139 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
6140 | ||
6141 | static ssize_t show_filter_flags(struct device *d, | |
6142 | struct device_attribute *attr, char *buf) | |
6143 | { | |
c79dd5b5 | 6144 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6145 | |
6146 | return sprintf(buf, "0x%04X\n", | |
6147 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
6148 | } | |
6149 | ||
6150 | static ssize_t store_filter_flags(struct device *d, | |
6151 | struct device_attribute *attr, | |
6152 | const char *buf, size_t count) | |
6153 | { | |
c79dd5b5 | 6154 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6155 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
6156 | ||
6157 | mutex_lock(&priv->mutex); | |
6158 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
6159 | /* Cancel any currently running scans... */ | |
bb8c093b | 6160 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
6161 | IWL_WARNING("Could not cancel scan.\n"); |
6162 | else { | |
6163 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
6164 | "0x%04X\n", filter_flags); | |
6165 | priv->staging_rxon.filter_flags = | |
6166 | cpu_to_le32(filter_flags); | |
bb8c093b | 6167 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6168 | } |
6169 | } | |
6170 | mutex_unlock(&priv->mutex); | |
6171 | ||
6172 | return count; | |
6173 | } | |
6174 | ||
6175 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
6176 | store_filter_flags); | |
6177 | ||
c8b0e6e1 | 6178 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
6179 | |
6180 | static ssize_t show_measurement(struct device *d, | |
6181 | struct device_attribute *attr, char *buf) | |
6182 | { | |
c79dd5b5 | 6183 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 6184 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
6185 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
6186 | u8 *data = (u8 *) & measure_report; | |
6187 | unsigned long flags; | |
6188 | ||
6189 | spin_lock_irqsave(&priv->lock, flags); | |
6190 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
6191 | spin_unlock_irqrestore(&priv->lock, flags); | |
6192 | return 0; | |
6193 | } | |
6194 | memcpy(&measure_report, &priv->measure_report, size); | |
6195 | priv->measurement_status = 0; | |
6196 | spin_unlock_irqrestore(&priv->lock, flags); | |
6197 | ||
6198 | while (size && (PAGE_SIZE - len)) { | |
6199 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
6200 | PAGE_SIZE - len, 1); | |
6201 | len = strlen(buf); | |
6202 | if (PAGE_SIZE - len) | |
6203 | buf[len++] = '\n'; | |
6204 | ||
6205 | ofs += 16; | |
6206 | size -= min(size, 16U); | |
6207 | } | |
6208 | ||
6209 | return len; | |
6210 | } | |
6211 | ||
6212 | static ssize_t store_measurement(struct device *d, | |
6213 | struct device_attribute *attr, | |
6214 | const char *buf, size_t count) | |
6215 | { | |
c79dd5b5 | 6216 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6217 | struct ieee80211_measurement_params params = { |
6218 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
6219 | .start_time = cpu_to_le64(priv->last_tsf), | |
6220 | .duration = cpu_to_le16(1), | |
6221 | }; | |
6222 | u8 type = IWL_MEASURE_BASIC; | |
6223 | u8 buffer[32]; | |
6224 | u8 channel; | |
6225 | ||
6226 | if (count) { | |
6227 | char *p = buffer; | |
6228 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
6229 | channel = simple_strtoul(p, NULL, 0); | |
6230 | if (channel) | |
6231 | params.channel = channel; | |
6232 | ||
6233 | p = buffer; | |
6234 | while (*p && *p != ' ') | |
6235 | p++; | |
6236 | if (*p) | |
6237 | type = simple_strtoul(p + 1, NULL, 0); | |
6238 | } | |
6239 | ||
6240 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
6241 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 6242 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
6243 | |
6244 | return count; | |
6245 | } | |
6246 | ||
6247 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
6248 | show_measurement, store_measurement); | |
c8b0e6e1 | 6249 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
6250 | |
6251 | static ssize_t store_retry_rate(struct device *d, | |
6252 | struct device_attribute *attr, | |
6253 | const char *buf, size_t count) | |
6254 | { | |
c79dd5b5 | 6255 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6256 | |
6257 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
6258 | if (priv->retry_rate <= 0) | |
6259 | priv->retry_rate = 1; | |
6260 | ||
6261 | return count; | |
6262 | } | |
6263 | ||
6264 | static ssize_t show_retry_rate(struct device *d, | |
6265 | struct device_attribute *attr, char *buf) | |
6266 | { | |
c79dd5b5 | 6267 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6268 | return sprintf(buf, "%d", priv->retry_rate); |
6269 | } | |
6270 | ||
6271 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
6272 | store_retry_rate); | |
6273 | ||
6274 | static ssize_t store_power_level(struct device *d, | |
6275 | struct device_attribute *attr, | |
6276 | const char *buf, size_t count) | |
6277 | { | |
c79dd5b5 | 6278 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6279 | int rc; |
6280 | int mode; | |
6281 | ||
6282 | mode = simple_strtoul(buf, NULL, 0); | |
6283 | mutex_lock(&priv->mutex); | |
6284 | ||
fee1247a | 6285 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
6286 | rc = -EAGAIN; |
6287 | goto out; | |
6288 | } | |
6289 | ||
5da4b55f MA |
6290 | rc = iwl_power_set_user_mode(priv, mode); |
6291 | if (rc) { | |
6292 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
6293 | goto out; | |
b481de9c | 6294 | } |
b481de9c ZY |
6295 | rc = count; |
6296 | ||
6297 | out: | |
6298 | mutex_unlock(&priv->mutex); | |
6299 | return rc; | |
6300 | } | |
6301 | ||
6302 | #define MAX_WX_STRING 80 | |
6303 | ||
6304 | /* Values are in microsecond */ | |
6305 | static const s32 timeout_duration[] = { | |
6306 | 350000, | |
6307 | 250000, | |
6308 | 75000, | |
6309 | 37000, | |
6310 | 25000, | |
6311 | }; | |
6312 | static const s32 period_duration[] = { | |
6313 | 400000, | |
6314 | 700000, | |
6315 | 1000000, | |
6316 | 1000000, | |
6317 | 1000000 | |
6318 | }; | |
6319 | ||
6320 | static ssize_t show_power_level(struct device *d, | |
6321 | struct device_attribute *attr, char *buf) | |
6322 | { | |
c79dd5b5 | 6323 | struct iwl_priv *priv = dev_get_drvdata(d); |
5da4b55f | 6324 | int level = priv->power_data.power_mode; |
b481de9c ZY |
6325 | char *p = buf; |
6326 | ||
6327 | p += sprintf(p, "%d ", level); | |
6328 | switch (level) { | |
6329 | case IWL_POWER_MODE_CAM: | |
6330 | case IWL_POWER_AC: | |
6331 | p += sprintf(p, "(AC)"); | |
6332 | break; | |
6333 | case IWL_POWER_BATTERY: | |
6334 | p += sprintf(p, "(BATTERY)"); | |
6335 | break; | |
6336 | default: | |
6337 | p += sprintf(p, | |
6338 | "(Timeout %dms, Period %dms)", | |
6339 | timeout_duration[level - 1] / 1000, | |
6340 | period_duration[level - 1] / 1000); | |
6341 | } | |
5da4b55f | 6342 | /* |
b481de9c ZY |
6343 | if (!(priv->power_mode & IWL_POWER_ENABLED)) |
6344 | p += sprintf(p, " OFF\n"); | |
6345 | else | |
6346 | p += sprintf(p, " \n"); | |
5da4b55f MA |
6347 | */ |
6348 | p += sprintf(p, " \n"); | |
b481de9c | 6349 | return (p - buf + 1); |
b481de9c ZY |
6350 | } |
6351 | ||
6352 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
6353 | store_power_level); | |
6354 | ||
6355 | static ssize_t show_channels(struct device *d, | |
6356 | struct device_attribute *attr, char *buf) | |
6357 | { | |
8318d78a JB |
6358 | /* all this shit doesn't belong into sysfs anyway */ |
6359 | return 0; | |
b481de9c ZY |
6360 | } |
6361 | ||
6362 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
6363 | ||
6364 | static ssize_t show_statistics(struct device *d, | |
6365 | struct device_attribute *attr, char *buf) | |
6366 | { | |
c79dd5b5 | 6367 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 6368 | u32 size = sizeof(struct iwl4965_notif_statistics); |
b481de9c ZY |
6369 | u32 len = 0, ofs = 0; |
6370 | u8 *data = (u8 *) & priv->statistics; | |
6371 | int rc = 0; | |
6372 | ||
fee1247a | 6373 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6374 | return -EAGAIN; |
6375 | ||
6376 | mutex_lock(&priv->mutex); | |
49ea8596 | 6377 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
6378 | mutex_unlock(&priv->mutex); |
6379 | ||
6380 | if (rc) { | |
6381 | len = sprintf(buf, | |
6382 | "Error sending statistics request: 0x%08X\n", rc); | |
6383 | return len; | |
6384 | } | |
6385 | ||
6386 | while (size && (PAGE_SIZE - len)) { | |
6387 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
6388 | PAGE_SIZE - len, 1); | |
6389 | len = strlen(buf); | |
6390 | if (PAGE_SIZE - len) | |
6391 | buf[len++] = '\n'; | |
6392 | ||
6393 | ofs += 16; | |
6394 | size -= min(size, 16U); | |
6395 | } | |
6396 | ||
6397 | return len; | |
6398 | } | |
6399 | ||
6400 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
6401 | ||
b481de9c ZY |
6402 | static ssize_t show_status(struct device *d, |
6403 | struct device_attribute *attr, char *buf) | |
6404 | { | |
c79dd5b5 | 6405 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 6406 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6407 | return -EAGAIN; |
6408 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
6409 | } | |
6410 | ||
6411 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
6412 | ||
6413 | static ssize_t dump_error_log(struct device *d, | |
6414 | struct device_attribute *attr, | |
6415 | const char *buf, size_t count) | |
6416 | { | |
6417 | char *p = (char *)buf; | |
6418 | ||
6419 | if (p[0] == '1') | |
c79dd5b5 | 6420 | iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
6421 | |
6422 | return strnlen(buf, count); | |
6423 | } | |
6424 | ||
6425 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | |
6426 | ||
6427 | static ssize_t dump_event_log(struct device *d, | |
6428 | struct device_attribute *attr, | |
6429 | const char *buf, size_t count) | |
6430 | { | |
6431 | char *p = (char *)buf; | |
6432 | ||
6433 | if (p[0] == '1') | |
c79dd5b5 | 6434 | iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
6435 | |
6436 | return strnlen(buf, count); | |
6437 | } | |
6438 | ||
6439 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |
6440 | ||
6441 | /***************************************************************************** | |
6442 | * | |
6443 | * driver setup and teardown | |
6444 | * | |
6445 | *****************************************************************************/ | |
6446 | ||
c79dd5b5 | 6447 | static void iwl4965_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
6448 | { |
6449 | priv->workqueue = create_workqueue(DRV_NAME); | |
6450 | ||
6451 | init_waitqueue_head(&priv->wait_command_queue); | |
6452 | ||
bb8c093b CH |
6453 | INIT_WORK(&priv->up, iwl4965_bg_up); |
6454 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
6455 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
6456 | INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed); | |
6457 | INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan); | |
6458 | INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan); | |
6459 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); | |
6460 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
6461 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); | |
6462 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start); | |
6463 | INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start); | |
6464 | INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check); | |
6465 | ||
6466 | iwl4965_hw_setup_deferred_work(priv); | |
b481de9c ZY |
6467 | |
6468 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 6469 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
6470 | } |
6471 | ||
c79dd5b5 | 6472 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 6473 | { |
bb8c093b | 6474 | iwl4965_hw_cancel_deferred_work(priv); |
b481de9c | 6475 | |
3ae6a054 | 6476 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
6477 | cancel_delayed_work(&priv->scan_check); |
6478 | cancel_delayed_work(&priv->alive_start); | |
6479 | cancel_delayed_work(&priv->post_associate); | |
6480 | cancel_work_sync(&priv->beacon_update); | |
6481 | } | |
6482 | ||
bb8c093b | 6483 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c ZY |
6484 | &dev_attr_channels.attr, |
6485 | &dev_attr_dump_errors.attr, | |
6486 | &dev_attr_dump_events.attr, | |
6487 | &dev_attr_flags.attr, | |
6488 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 6489 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
6490 | &dev_attr_measurement.attr, |
6491 | #endif | |
6492 | &dev_attr_power_level.attr, | |
6493 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
6494 | &dev_attr_rs_window.attr, |
6495 | &dev_attr_statistics.attr, | |
6496 | &dev_attr_status.attr, | |
6497 | &dev_attr_temperature.attr, | |
b481de9c ZY |
6498 | &dev_attr_tx_power.attr, |
6499 | ||
6500 | NULL | |
6501 | }; | |
6502 | ||
bb8c093b | 6503 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 6504 | .name = NULL, /* put in device directory */ |
bb8c093b | 6505 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
6506 | }; |
6507 | ||
bb8c093b CH |
6508 | static struct ieee80211_ops iwl4965_hw_ops = { |
6509 | .tx = iwl4965_mac_tx, | |
6510 | .start = iwl4965_mac_start, | |
6511 | .stop = iwl4965_mac_stop, | |
6512 | .add_interface = iwl4965_mac_add_interface, | |
6513 | .remove_interface = iwl4965_mac_remove_interface, | |
6514 | .config = iwl4965_mac_config, | |
6515 | .config_interface = iwl4965_mac_config_interface, | |
6516 | .configure_filter = iwl4965_configure_filter, | |
6517 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 6518 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
6519 | .get_stats = iwl4965_mac_get_stats, |
6520 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
6521 | .conf_tx = iwl4965_mac_conf_tx, | |
6522 | .get_tsf = iwl4965_mac_get_tsf, | |
6523 | .reset_tsf = iwl4965_mac_reset_tsf, | |
6524 | .beacon_update = iwl4965_mac_beacon_update, | |
471b3efd | 6525 | .bss_info_changed = iwl4965_bss_info_changed, |
c8b0e6e1 | 6526 | #ifdef CONFIG_IWL4965_HT |
9ab46173 | 6527 | .ampdu_action = iwl4965_mac_ampdu_action, |
c8b0e6e1 | 6528 | #endif /* CONFIG_IWL4965_HT */ |
bb8c093b | 6529 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
6530 | }; |
6531 | ||
bb8c093b | 6532 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
6533 | { |
6534 | int err = 0; | |
c79dd5b5 | 6535 | struct iwl_priv *priv; |
b481de9c | 6536 | struct ieee80211_hw *hw; |
82b9a121 | 6537 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 6538 | unsigned long flags; |
5a66926a | 6539 | DECLARE_MAC_BUF(mac); |
b481de9c | 6540 | |
316c30d9 AK |
6541 | /************************ |
6542 | * 1. Allocating HW data | |
6543 | ************************/ | |
6544 | ||
6440adb5 CB |
6545 | /* Disabling hardware scan means that mac80211 will perform scans |
6546 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 6547 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
6548 | if (cfg->mod_params->debug & IWL_DL_INFO) |
6549 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
6550 | "Disabling hw_scan\n"); | |
bb8c093b | 6551 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
6552 | } |
6553 | ||
1d0a082d AK |
6554 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
6555 | if (!hw) { | |
b481de9c ZY |
6556 | err = -ENOMEM; |
6557 | goto out; | |
6558 | } | |
1d0a082d AK |
6559 | priv = hw->priv; |
6560 | /* At this point both hw and priv are allocated. */ | |
6561 | ||
b481de9c ZY |
6562 | SET_IEEE80211_DEV(hw, &pdev->dev); |
6563 | ||
6564 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 6565 | priv->cfg = cfg; |
b481de9c | 6566 | priv->pci_dev = pdev; |
316c30d9 | 6567 | |
0a6857e7 | 6568 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 6569 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
6570 | atomic_set(&priv->restrict_refcnt, 0); |
6571 | #endif | |
b481de9c | 6572 | |
316c30d9 AK |
6573 | /************************** |
6574 | * 2. Initializing PCI bus | |
6575 | **************************/ | |
6576 | if (pci_enable_device(pdev)) { | |
6577 | err = -ENODEV; | |
6578 | goto out_ieee80211_free_hw; | |
6579 | } | |
6580 | ||
6581 | pci_set_master(pdev); | |
6582 | ||
cc2a8ea8 | 6583 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
316c30d9 | 6584 | if (!err) |
cc2a8ea8 RR |
6585 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
6586 | if (err) { | |
6587 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
6588 | if (!err) | |
6589 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
6590 | /* both attempts failed: */ | |
316c30d9 | 6591 | if (err) { |
cc2a8ea8 RR |
6592 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
6593 | DRV_NAME); | |
316c30d9 | 6594 | goto out_pci_disable_device; |
cc2a8ea8 | 6595 | } |
316c30d9 AK |
6596 | } |
6597 | ||
6598 | err = pci_request_regions(pdev, DRV_NAME); | |
6599 | if (err) | |
6600 | goto out_pci_disable_device; | |
6601 | ||
6602 | pci_set_drvdata(pdev, priv); | |
6603 | ||
6604 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
6605 | * PCI Tx retries from interfering with C3 CPU state */ | |
6606 | pci_write_config_byte(pdev, 0x41, 0x00); | |
6607 | ||
6608 | /*********************** | |
6609 | * 3. Read REV register | |
6610 | ***********************/ | |
6611 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
6612 | if (!priv->hw_base) { | |
6613 | err = -ENODEV; | |
6614 | goto out_pci_release_regions; | |
6615 | } | |
6616 | ||
6617 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
6618 | (unsigned long long) pci_resource_len(pdev, 0)); | |
6619 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
6620 | ||
b661c819 | 6621 | iwl_hw_detect(priv); |
316c30d9 | 6622 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
6623 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
6624 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 6625 | |
91238714 TW |
6626 | /* amp init */ |
6627 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 6628 | if (err < 0) { |
91238714 | 6629 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
6630 | goto out_iounmap; |
6631 | } | |
91238714 TW |
6632 | /***************** |
6633 | * 4. Read EEPROM | |
6634 | *****************/ | |
316c30d9 AK |
6635 | /* Read the EEPROM */ |
6636 | err = iwl_eeprom_init(priv); | |
6637 | if (err) { | |
6638 | IWL_ERROR("Unable to init EEPROM\n"); | |
6639 | goto out_iounmap; | |
6640 | } | |
8614f360 TW |
6641 | err = iwl_eeprom_check_version(priv); |
6642 | if (err) | |
6643 | goto out_iounmap; | |
6644 | ||
316c30d9 AK |
6645 | /* MAC Address location in EEPROM same for 3945/4965 */ |
6646 | iwl_eeprom_get_mac(priv, priv->mac_addr); | |
6647 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
6648 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
6649 | ||
6650 | /************************ | |
6651 | * 5. Setup HW constants | |
6652 | ************************/ | |
6653 | /* Device-specific setup */ | |
5425e490 TW |
6654 | if (priv->cfg->ops->lib->set_hw_params(priv)) { |
6655 | IWL_ERROR("failed to set hw parameters\n"); | |
073d3f5f | 6656 | goto out_free_eeprom; |
316c30d9 AK |
6657 | } |
6658 | ||
6659 | /******************* | |
6660 | * 6. Setup hw/priv | |
6661 | *******************/ | |
b481de9c | 6662 | |
bf85ea4f AK |
6663 | err = iwl_setup(priv); |
6664 | if (err) | |
399f4900 | 6665 | goto out_free_eeprom; |
bf85ea4f | 6666 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
6667 | |
6668 | /********************************** | |
6669 | * 7. Initialize module parameters | |
6670 | **********************************/ | |
6671 | ||
6672 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 6673 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
6674 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
6675 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
6676 | } | |
6677 | ||
1ea87396 | 6678 | if (priv->cfg->mod_params->enable_qos) |
316c30d9 AK |
6679 | priv->qos_data.qos_enable = 1; |
6680 | ||
6681 | /******************** | |
6682 | * 8. Setup services | |
6683 | ********************/ | |
0359facc | 6684 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 6685 | iwl4965_disable_interrupts(priv); |
0359facc | 6686 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
6687 | |
6688 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6689 | if (err) { | |
6690 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
399f4900 | 6691 | goto out_free_eeprom; |
316c30d9 AK |
6692 | } |
6693 | ||
6694 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
6695 | if (err) { | |
6696 | IWL_ERROR("failed to create debugfs files\n"); | |
6697 | goto out_remove_sysfs; | |
6698 | } | |
6699 | ||
6700 | iwl4965_setup_deferred_work(priv); | |
6701 | iwl4965_setup_rx_handlers(priv); | |
6702 | ||
6703 | /******************** | |
6704 | * 9. Conclude | |
6705 | ********************/ | |
5a66926a ZY |
6706 | pci_save_state(pdev); |
6707 | pci_disable_device(pdev); | |
b481de9c | 6708 | |
c8381fdc MA |
6709 | /* notify iwlcore to init */ |
6710 | iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT); | |
b481de9c ZY |
6711 | return 0; |
6712 | ||
316c30d9 AK |
6713 | out_remove_sysfs: |
6714 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
073d3f5f TW |
6715 | out_free_eeprom: |
6716 | iwl_eeprom_free(priv); | |
b481de9c ZY |
6717 | out_iounmap: |
6718 | pci_iounmap(pdev, priv->hw_base); | |
6719 | out_pci_release_regions: | |
6720 | pci_release_regions(pdev); | |
316c30d9 | 6721 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
6722 | out_pci_disable_device: |
6723 | pci_disable_device(pdev); | |
b481de9c ZY |
6724 | out_ieee80211_free_hw: |
6725 | ieee80211_free_hw(priv->hw); | |
6726 | out: | |
6727 | return err; | |
6728 | } | |
6729 | ||
c83dbf68 | 6730 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 6731 | { |
c79dd5b5 | 6732 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
6733 | struct list_head *p, *q; |
6734 | int i; | |
0359facc | 6735 | unsigned long flags; |
b481de9c ZY |
6736 | |
6737 | if (!priv) | |
6738 | return; | |
6739 | ||
6740 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
6741 | ||
c4f55232 RR |
6742 | if (priv->mac80211_registered) { |
6743 | ieee80211_unregister_hw(priv->hw); | |
6744 | priv->mac80211_registered = 0; | |
6745 | } | |
6746 | ||
b481de9c | 6747 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 6748 | |
bb8c093b | 6749 | iwl4965_down(priv); |
b481de9c | 6750 | |
0359facc MA |
6751 | /* make sure we flush any pending irq or |
6752 | * tasklet for the driver | |
6753 | */ | |
6754 | spin_lock_irqsave(&priv->lock, flags); | |
6755 | iwl4965_disable_interrupts(priv); | |
6756 | spin_unlock_irqrestore(&priv->lock, flags); | |
6757 | ||
6758 | iwl_synchronize_irq(priv); | |
6759 | ||
b481de9c ZY |
6760 | /* Free MAC hash list for ADHOC */ |
6761 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
6762 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
6763 | list_del(p); | |
bb8c093b | 6764 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
6765 | } |
6766 | } | |
6767 | ||
c8381fdc | 6768 | iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT); |
712b6cf5 | 6769 | iwl_dbgfs_unregister(priv); |
bb8c093b | 6770 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c | 6771 | |
bb8c093b | 6772 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
6773 | |
6774 | if (priv->rxq.bd) | |
a55360e4 | 6775 | iwl_rx_queue_free(priv, &priv->rxq); |
1053d35f | 6776 | iwl_hw_txq_ctx_free(priv); |
b481de9c | 6777 | |
bf85ea4f | 6778 | iwlcore_clear_stations_table(priv); |
073d3f5f | 6779 | iwl_eeprom_free(priv); |
b481de9c | 6780 | |
b481de9c | 6781 | |
948c171c MA |
6782 | /*netif_stop_queue(dev); */ |
6783 | flush_workqueue(priv->workqueue); | |
6784 | ||
bb8c093b | 6785 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
6786 | * priv->workqueue... so we can't take down the workqueue |
6787 | * until now... */ | |
6788 | destroy_workqueue(priv->workqueue); | |
6789 | priv->workqueue = NULL; | |
6790 | ||
b481de9c ZY |
6791 | pci_iounmap(pdev, priv->hw_base); |
6792 | pci_release_regions(pdev); | |
6793 | pci_disable_device(pdev); | |
6794 | pci_set_drvdata(pdev, NULL); | |
6795 | ||
bf85ea4f | 6796 | iwl_free_channel_map(priv); |
c7de35cd | 6797 | iwlcore_free_geos(priv); |
b481de9c ZY |
6798 | |
6799 | if (priv->ibss_beacon) | |
6800 | dev_kfree_skb(priv->ibss_beacon); | |
6801 | ||
6802 | ieee80211_free_hw(priv->hw); | |
6803 | } | |
6804 | ||
6805 | #ifdef CONFIG_PM | |
6806 | ||
bb8c093b | 6807 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 6808 | { |
c79dd5b5 | 6809 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 6810 | |
e655b9f0 ZY |
6811 | if (priv->is_open) { |
6812 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
6813 | iwl4965_mac_stop(priv->hw); | |
6814 | priv->is_open = 1; | |
6815 | } | |
b481de9c | 6816 | |
b481de9c ZY |
6817 | pci_set_power_state(pdev, PCI_D3hot); |
6818 | ||
b481de9c ZY |
6819 | return 0; |
6820 | } | |
6821 | ||
bb8c093b | 6822 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 6823 | { |
c79dd5b5 | 6824 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 6825 | |
b481de9c | 6826 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 6827 | |
e655b9f0 ZY |
6828 | if (priv->is_open) |
6829 | iwl4965_mac_start(priv->hw); | |
b481de9c | 6830 | |
e655b9f0 | 6831 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
6832 | return 0; |
6833 | } | |
6834 | ||
6835 | #endif /* CONFIG_PM */ | |
6836 | ||
6837 | /***************************************************************************** | |
6838 | * | |
6839 | * driver and module entry point | |
6840 | * | |
6841 | *****************************************************************************/ | |
6842 | ||
fed9017e RR |
6843 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
6844 | static struct pci_device_id iwl_hw_card_ids[] = { | |
6845 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
6846 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
5a6a256e TW |
6847 | #ifdef CONFIG_IWL5000 |
6848 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
6849 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
6850 | {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)}, | |
6851 | #endif /* CONFIG_IWL5000 */ | |
fed9017e RR |
6852 | {0} |
6853 | }; | |
6854 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
6855 | ||
6856 | static struct pci_driver iwl_driver = { | |
b481de9c | 6857 | .name = DRV_NAME, |
fed9017e | 6858 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
6859 | .probe = iwl4965_pci_probe, |
6860 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 6861 | #ifdef CONFIG_PM |
bb8c093b CH |
6862 | .suspend = iwl4965_pci_suspend, |
6863 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
6864 | #endif |
6865 | }; | |
6866 | ||
bb8c093b | 6867 | static int __init iwl4965_init(void) |
b481de9c ZY |
6868 | { |
6869 | ||
6870 | int ret; | |
6871 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
6872 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 RC |
6873 | |
6874 | ret = iwl4965_rate_control_register(); | |
6875 | if (ret) { | |
6876 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
6877 | return ret; | |
6878 | } | |
6879 | ||
fed9017e | 6880 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
6881 | if (ret) { |
6882 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 6883 | goto error_register; |
b481de9c | 6884 | } |
0a6857e7 | 6885 | #ifdef CONFIG_IWLWIFI_DEBUG |
fed9017e | 6886 | ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level); |
b481de9c ZY |
6887 | if (ret) { |
6888 | IWL_ERROR("Unable to create driver sysfs file\n"); | |
897e1cf2 | 6889 | goto error_debug; |
b481de9c ZY |
6890 | } |
6891 | #endif | |
6892 | ||
6893 | return ret; | |
897e1cf2 RC |
6894 | |
6895 | #ifdef CONFIG_IWLWIFI_DEBUG | |
6896 | error_debug: | |
fed9017e | 6897 | pci_unregister_driver(&iwl_driver); |
897e1cf2 RC |
6898 | #endif |
6899 | error_register: | |
6900 | iwl4965_rate_control_unregister(); | |
6901 | return ret; | |
b481de9c ZY |
6902 | } |
6903 | ||
bb8c093b | 6904 | static void __exit iwl4965_exit(void) |
b481de9c | 6905 | { |
0a6857e7 | 6906 | #ifdef CONFIG_IWLWIFI_DEBUG |
fed9017e | 6907 | driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level); |
b481de9c | 6908 | #endif |
fed9017e | 6909 | pci_unregister_driver(&iwl_driver); |
897e1cf2 | 6910 | iwl4965_rate_control_unregister(); |
b481de9c ZY |
6911 | } |
6912 | ||
bb8c093b CH |
6913 | module_exit(iwl4965_exit); |
6914 | module_init(iwl4965_init); |