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iwlwifi: fix compliation warnings
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
b481de9c
ZY		 49#include "iwl-4965.h"
50#include "iwl-helpers.h"
51
c8b0e6e1 52#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 53u32 iwl4965_debug_level;
b481de9c
ZY		 54#endif
55
bb8c093b
CH		 56static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
57 struct iwl4965_tx_queue *txq);
416e1438 58
b481de9c
ZY		 59/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65/* module parameters */
6440adb5
CB		 66static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
67static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
9fbab516
BC		 68static int iwl4965_param_disable; /* def: enable radio */
69static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
70int iwl4965_param_hwcrypto; /* def: using software encryption */
6440adb5
CB		 71static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
72int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
9ee1ba47 73int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
b481de9c
ZY		 74
75/*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
81
c8b0e6e1 82#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 83#define VD "d"
84#else
85#define VD
86#endif
87
c8b0e6e1 88#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 89#define VS "s"
90#else
91#define VS
92#endif
93
d1283948 94#define IWLWIFI_VERSION "1.2.22k" VD VS
b481de9c
ZY		 95#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96#define DRV_VERSION IWLWIFI_VERSION
97
98/* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102#define IWL4965_UCODE_API "-1"
103
104MODULE_DESCRIPTION(DRV_DESCRIPTION);
105MODULE_VERSION(DRV_VERSION);
106MODULE_AUTHOR(DRV_COPYRIGHT);
107MODULE_LICENSE("GPL");
108
109__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
110{
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117}
118
bb8c093b
CH		 119static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
120 struct iwl4965_priv *priv, int mode)
b481de9c
ZY		 121{
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129}
130
bb8c093b 131static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 132{
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145}
146
bb8c093b 147static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 148{
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
bb8c093b 153 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169}
170
bb8c093b 171static void iwl4965_print_hex_dump(int level, void *p, u32 len)
b481de9c 172{
c8b0e6e1 173#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 174 if (!(iwl4965_debug_level & level))
b481de9c
ZY		 175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179#endif
180}
181
182/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
6440adb5
CB		 187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
6440adb5
CB		 202 * The 4965 operates with up to 17 queues: One receive queue, one transmit
203 * queue (#4) for sending commands to the device firmware, and 15 other
204 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 205 *
206 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 207 ***************************************************/
208
bb8c093b 209static int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 210{
fc4b6853 211 int s = q->read_ptr - q->write_ptr;
b481de9c 212
fc4b6853 213 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 214 s -= q->n_bd;
215
216 if (s <= 0)
217 s += q->n_window;
218 /* keep some reserve to not confuse empty and full situations */
219 s -= 2;
220 if (s < 0)
221 s = 0;
222 return s;
223}
224
6440adb5
CB		 225/**
226 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
227 * @index -- current index
228 * @n_bd -- total number of entries in queue (must be power of 2)
229 */
bb8c093b 230static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
b481de9c
ZY		 231{
232 return ++index & (n_bd - 1);
233}
234
6440adb5
CB		 235/**
236 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
237 * @index -- current index
238 * @n_bd -- total number of entries in queue (must be power of 2)
239 */
bb8c093b 240static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
b481de9c
ZY		 241{
242 return --index & (n_bd - 1);
243}
244
bb8c093b 245static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 246{
fc4b6853
TW		 247 return q->write_ptr > q->read_ptr ?
248 (i >= q->read_ptr && i < q->write_ptr) :
249 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 250}
251
bb8c093b 252static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 253{
6440adb5 254 /* This is for scan command, the big buffer at end of command array */
b481de9c 255 if (is_huge)
6440adb5 256 return q->n_window; /* must be power of 2 */
b481de9c 257
6440adb5 258 /* Otherwise, use normal size buffers */
b481de9c
ZY		 259 return index & (q->n_window - 1);
260}
261
6440adb5
CB		 262/**
263 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
264 */
bb8c093b 265static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 266 int count, int slots_num, u32 id)
267{
268 q->n_bd = count;
269 q->n_window = slots_num;
270 q->id = id;
271
bb8c093b
CH		 272 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
273 * and iwl4965_queue_dec_wrap are broken. */
b481de9c
ZY		 274 BUG_ON(!is_power_of_2(count));
275
276 /* slots_num must be power-of-two size, otherwise
277 * get_cmd_index is broken. */
278 BUG_ON(!is_power_of_2(slots_num));
279
280 q->low_mark = q->n_window / 4;
281 if (q->low_mark < 4)
282 q->low_mark = 4;
283
284 q->high_mark = q->n_window / 8;
285 if (q->high_mark < 2)
286 q->high_mark = 2;
287
fc4b6853 288 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 289
290 return 0;
291}
292
6440adb5
CB		 293/**
294 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
295 */
bb8c093b
CH		 296static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
297 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 298{
299 struct pci_dev *dev = priv->pci_dev;
300
6440adb5
CB		 301 /* Driver private data, only for Tx (not command) queues,
302 * not shared with device. */
b481de9c
ZY		 303 if (id != IWL_CMD_QUEUE_NUM) {
304 txq->txb = kmalloc(sizeof(txq->txb[0]) *
305 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
306 if (!txq->txb) {
01ebd063 307 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 308 "structures failed\n");
309 goto error;
310 }
311 } else
312 txq->txb = NULL;
313
6440adb5
CB		 314 /* Circular buffer of transmit frame descriptors (TFDs),
315 * shared with device */
b481de9c
ZY		 316 txq->bd = pci_alloc_consistent(dev,
317 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
318 &txq->q.dma_addr);
319
320 if (!txq->bd) {
321 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
322 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
323 goto error;
324 }
325 txq->q.id = id;
326
327 return 0;
328
329 error:
330 if (txq->txb) {
331 kfree(txq->txb);
332 txq->txb = NULL;
333 }
334
335 return -ENOMEM;
336}
337
8b6eaea8
CB		 338/**
339 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
340 */
bb8c093b
CH		 341int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
342 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 343{
344 struct pci_dev *dev = priv->pci_dev;
345 int len;
346 int rc = 0;
347
8b6eaea8
CB		 348 /*
349 * Alloc buffer array for commands (Tx or other types of commands).
350 * For the command queue (#4), allocate command space + one big
351 * command for scan, since scan command is very huge; the system will
352 * not have two scans at the same time, so only one is needed.
6440adb5 353 * For data Tx queues (all other queues), no super-size command
8b6eaea8
CB		 354 * space is needed.
355 */
bb8c093b 356 len = sizeof(struct iwl4965_cmd) * slots_num;
b481de9c
ZY		 357 if (txq_id == IWL_CMD_QUEUE_NUM)
358 len += IWL_MAX_SCAN_SIZE;
359 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
360 if (!txq->cmd)
361 return -ENOMEM;
362
8b6eaea8 363 /* Alloc driver data array and TFD circular buffer */
bb8c093b 364 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 365 if (rc) {
366 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
367
368 return -ENOMEM;
369 }
370 txq->need_update = 0;
371
372 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
bb8c093b 373 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
b481de9c 374 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB		 375
376 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 377 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 378
8b6eaea8 379 /* Tell device where to find queue */
bb8c093b 380 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 381
382 return 0;
383}
384
385/**
bb8c093b 386 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 387 * @txq: Transmit queue to deallocate.
388 *
389 * Empty queue by removing and destroying all BD's.
6440adb5
CB		 390 * Free all buffers.
391 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 392 */
bb8c093b 393void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 394{
bb8c093b 395 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 396 struct pci_dev *dev = priv->pci_dev;
397 int len;
398
399 if (q->n_bd == 0)
400 return;
401
402 /* first, empty all BD's */
fc4b6853 403 for (; q->write_ptr != q->read_ptr;
bb8c093b
CH		 404 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
405 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 406
bb8c093b 407 len = sizeof(struct iwl4965_cmd) * q->n_window;
b481de9c
ZY		 408 if (q->id == IWL_CMD_QUEUE_NUM)
409 len += IWL_MAX_SCAN_SIZE;
410
6440adb5 411 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 412 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
413
6440adb5 414 /* De-alloc circular buffer of TFDs */
b481de9c 415 if (txq->q.n_bd)
bb8c093b 416 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 417 txq->q.n_bd, txq->bd, txq->q.dma_addr);
418
6440adb5 419 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 420 if (txq->txb) {
421 kfree(txq->txb);
422 txq->txb = NULL;
423 }
424
6440adb5 425 /* 0-fill queue descriptor structure */
b481de9c
ZY		 426 memset(txq, 0, sizeof(*txq));
427}
428
bb8c093b 429const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 430
431/*************** STATION TABLE MANAGEMENT ****
9fbab516 432 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 433 * the functionality provided here
434 */
435
436/**************************************************************/
437
01ebd063 438#if 0 /* temporary disable till we add real remove station */
6440adb5
CB		 439/**
440 * iwl4965_remove_station - Remove driver's knowledge of station.
441 *
442 * NOTE: This does not remove station from device's station table.
443 */
bb8c093b 444static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 445{
446 int index = IWL_INVALID_STATION;
447 int i;
448 unsigned long flags;
449
450 spin_lock_irqsave(&priv->sta_lock, flags);
451
452 if (is_ap)
453 index = IWL_AP_ID;
454 else if (is_broadcast_ether_addr(addr))
455 index = priv->hw_setting.bcast_sta_id;
456 else
457 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
458 if (priv->stations[i].used &&
459 !compare_ether_addr(priv->stations[i].sta.sta.addr,
460 addr)) {
461 index = i;
462 break;
463 }
464
465 if (unlikely(index == IWL_INVALID_STATION))
466 goto out;
467
468 if (priv->stations[index].used) {
469 priv->stations[index].used = 0;
470 priv->num_stations--;
471 }
472
473 BUG_ON(priv->num_stations < 0);
474
475out:
476 spin_unlock_irqrestore(&priv->sta_lock, flags);
477 return 0;
478}
556f8db7 479#endif
b481de9c 480
6440adb5
CB		 481/**
482 * iwl4965_clear_stations_table - Clear the driver's station table
483 *
484 * NOTE: This does not clear or otherwise alter the device's station table.
485 */
bb8c093b 486static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
b481de9c
ZY		 487{
488 unsigned long flags;
489
490 spin_lock_irqsave(&priv->sta_lock, flags);
491
492 priv->num_stations = 0;
493 memset(priv->stations, 0, sizeof(priv->stations));
494
495 spin_unlock_irqrestore(&priv->sta_lock, flags);
496}
497
6440adb5
CB		 498/**
499 * iwl4965_add_station_flags - Add station to tables in driver and device
500 */
67d62035
RR		 501u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
502 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 503{
504 int i;
505 int index = IWL_INVALID_STATION;
bb8c093b 506 struct iwl4965_station_entry *station;
b481de9c 507 unsigned long flags_spin;
0795af57 508 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 509
510 spin_lock_irqsave(&priv->sta_lock, flags_spin);
511 if (is_ap)
512 index = IWL_AP_ID;
513 else if (is_broadcast_ether_addr(addr))
514 index = priv->hw_setting.bcast_sta_id;
515 else
516 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
517 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
518 addr)) {
519 index = i;
520 break;
521 }
522
523 if (!priv->stations[i].used &&
524 index == IWL_INVALID_STATION)
525 index = i;
526 }
527
528
9fbab516
BC		 529 /* These two conditions have the same outcome, but keep them separate
530 since they have different meanings */
b481de9c
ZY		 531 if (unlikely(index == IWL_INVALID_STATION)) {
532 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
533 return index;
534 }
535
536 if (priv->stations[index].used &&
537 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
538 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
539 return index;
540 }
541
542
0795af57 543 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 544 station = &priv->stations[index];
545 station->used = 1;
546 priv->num_stations++;
547
6440adb5 548 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 549 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 550 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
551 station->sta.mode = 0;
552 station->sta.sta.sta_id = index;
553 station->sta.station_flags = 0;
554
c8b0e6e1 555#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 556 /* BCAST station and IBSS stations do not work in HT mode */
557 if (index != priv->hw_setting.bcast_sta_id &&
558 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 559 iwl4965_set_ht_add_station(priv, index,
560 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 561#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 562
563 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB		 564
565 /* Add station to device's station table */
bb8c093b 566 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 567 return index;
568
569}
570
571/*************** DRIVER STATUS FUNCTIONS *****/
572
bb8c093b 573static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
b481de9c
ZY		 574{
575 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
576 * set but EXIT_PENDING is not */
577 return test_bit(STATUS_READY, &priv->status) &&
578 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
579 !test_bit(STATUS_EXIT_PENDING, &priv->status);
580}
581
bb8c093b 582static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
b481de9c
ZY		 583{
584 return test_bit(STATUS_ALIVE, &priv->status);
585}
586
bb8c093b 587static inline int iwl4965_is_init(struct iwl4965_priv *priv)
b481de9c
ZY		 588{
589 return test_bit(STATUS_INIT, &priv->status);
590}
591
bb8c093b 592static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
b481de9c
ZY		 593{
594 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
595 test_bit(STATUS_RF_KILL_SW, &priv->status);
596}
597
bb8c093b 598static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
b481de9c
ZY		 599{
600
bb8c093b 601 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 602 return 0;
603
bb8c093b 604 return iwl4965_is_ready(priv);
b481de9c
ZY		 605}
606
607/*************** HOST COMMAND QUEUE FUNCTIONS *****/
608
609#define IWL_CMD(x) case x : return #x
610
611static const char *get_cmd_string(u8 cmd)
612{
613 switch (cmd) {
614 IWL_CMD(REPLY_ALIVE);
615 IWL_CMD(REPLY_ERROR);
616 IWL_CMD(REPLY_RXON);
617 IWL_CMD(REPLY_RXON_ASSOC);
618 IWL_CMD(REPLY_QOS_PARAM);
619 IWL_CMD(REPLY_RXON_TIMING);
620 IWL_CMD(REPLY_ADD_STA);
621 IWL_CMD(REPLY_REMOVE_STA);
622 IWL_CMD(REPLY_REMOVE_ALL_STA);
623 IWL_CMD(REPLY_TX);
624 IWL_CMD(REPLY_RATE_SCALE);
625 IWL_CMD(REPLY_LEDS_CMD);
626 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
627 IWL_CMD(RADAR_NOTIFICATION);
628 IWL_CMD(REPLY_QUIET_CMD);
629 IWL_CMD(REPLY_CHANNEL_SWITCH);
630 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
631 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
632 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
633 IWL_CMD(POWER_TABLE_CMD);
634 IWL_CMD(PM_SLEEP_NOTIFICATION);
635 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
636 IWL_CMD(REPLY_SCAN_CMD);
637 IWL_CMD(REPLY_SCAN_ABORT_CMD);
638 IWL_CMD(SCAN_START_NOTIFICATION);
639 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
640 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
641 IWL_CMD(BEACON_NOTIFICATION);
642 IWL_CMD(REPLY_TX_BEACON);
643 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
644 IWL_CMD(QUIET_NOTIFICATION);
645 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
646 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
647 IWL_CMD(REPLY_BT_CONFIG);
648 IWL_CMD(REPLY_STATISTICS_CMD);
649 IWL_CMD(STATISTICS_NOTIFICATION);
650 IWL_CMD(REPLY_CARD_STATE_CMD);
651 IWL_CMD(CARD_STATE_NOTIFICATION);
652 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
653 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
654 IWL_CMD(SENSITIVITY_CMD);
655 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
656 IWL_CMD(REPLY_RX_PHY_CMD);
657 IWL_CMD(REPLY_RX_MPDU_CMD);
658 IWL_CMD(REPLY_4965_RX);
659 IWL_CMD(REPLY_COMPRESSED_BA);
660 default:
661 return "UNKNOWN";
662
663 }
664}
665
666#define HOST_COMPLETE_TIMEOUT (HZ / 2)
667
668/**
bb8c093b 669 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 670 * @priv: device private data point
671 * @cmd: a point to the ucode command structure
672 *
673 * The function returns < 0 values to indicate the operation is
674 * failed. On success, it turns the index (> 0) of command in the
675 * command queue.
676 */
bb8c093b 677static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 678{
bb8c093b
CH		 679 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
680 struct iwl4965_queue *q = &txq->q;
681 struct iwl4965_tfd_frame *tfd;
b481de9c 682 u32 *control_flags;
bb8c093b 683 struct iwl4965_cmd *out_cmd;
b481de9c
ZY		 684 u32 idx;
685 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
686 dma_addr_t phys_addr;
687 int ret;
688 unsigned long flags;
689
690 /* If any of the command structures end up being larger than
691 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
692 * we will need to increase the size of the TFD entries */
693 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
694 !(cmd->meta.flags & CMD_SIZE_HUGE));
695
bb8c093b 696 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 697 IWL_ERROR("No space for Tx\n");
698 return -ENOSPC;
699 }
700
701 spin_lock_irqsave(&priv->hcmd_lock, flags);
702
fc4b6853 703 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 704 memset(tfd, 0, sizeof(*tfd));
705
706 control_flags = (u32 *) tfd;
707
fc4b6853 708 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 709 out_cmd = &txq->cmd[idx];
710
711 out_cmd->hdr.cmd = cmd->id;
712 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
713 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
714
715 /* At this point, the out_cmd now has all of the incoming cmd
716 * information */
717
718 out_cmd->hdr.flags = 0;
719 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 720 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 721 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
722 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
723
724 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
bb8c093b
CH		 725 offsetof(struct iwl4965_cmd, hdr);
726 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 727
728 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
729 "%d bytes at %d[%d]:%d\n",
730 get_cmd_string(out_cmd->hdr.cmd),
731 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 732 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 733
734 txq->need_update = 1;
6440adb5
CB		 735
736 /* Set up entry in queue's byte count circular buffer */
b481de9c 737 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
CB		 738
739 /* Increment and update queue's write index */
bb8c093b
CH		 740 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
741 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 742
743 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
744 return ret ? ret : idx;
745}
746
bb8c093b 747static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 748{
749 int ret;
750
751 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
752
753 /* An asynchronous command can not expect an SKB to be set. */
754 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
755
756 /* An asynchronous command MUST have a callback. */
757 BUG_ON(!cmd->meta.u.callback);
758
759 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
760 return -EBUSY;
761
bb8c093b 762 ret = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c 763 if (ret < 0) {
bb8c093b 764 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 765 get_cmd_string(cmd->id), ret);
766 return ret;
767 }
768 return 0;
769}
770
bb8c093b 771static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 772{
773 int cmd_idx;
774 int ret;
775 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
776
777 BUG_ON(cmd->meta.flags & CMD_ASYNC);
778
779 /* A synchronous command can not have a callback set. */
780 BUG_ON(cmd->meta.u.callback != NULL);
781
782 if (atomic_xchg(&entry, 1)) {
783 IWL_ERROR("Error sending %s: Already sending a host command\n",
784 get_cmd_string(cmd->id));
785 return -EBUSY;
786 }
787
788 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
789
790 if (cmd->meta.flags & CMD_WANT_SKB)
791 cmd->meta.source = &cmd->meta;
792
bb8c093b 793 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c
ZY		 794 if (cmd_idx < 0) {
795 ret = cmd_idx;
bb8c093b 796 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 797 get_cmd_string(cmd->id), ret);
798 goto out;
799 }
800
801 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
802 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
803 HOST_COMPLETE_TIMEOUT);
804 if (!ret) {
805 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
806 IWL_ERROR("Error sending %s: time out after %dms.\n",
807 get_cmd_string(cmd->id),
808 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
809
810 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
811 ret = -ETIMEDOUT;
812 goto cancel;
813 }
814 }
815
816 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
817 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
818 get_cmd_string(cmd->id));
819 ret = -ECANCELED;
820 goto fail;
821 }
822 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
823 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
824 get_cmd_string(cmd->id));
825 ret = -EIO;
826 goto fail;
827 }
828 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
829 IWL_ERROR("Error: Response NULL in '%s'\n",
830 get_cmd_string(cmd->id));
831 ret = -EIO;
832 goto out;
833 }
834
835 ret = 0;
836 goto out;
837
838cancel:
839 if (cmd->meta.flags & CMD_WANT_SKB) {
bb8c093b 840 struct iwl4965_cmd *qcmd;
b481de9c
ZY		 841
842 /* Cancel the CMD_WANT_SKB flag for the cmd in the
843 * TX cmd queue. Otherwise in case the cmd comes
844 * in later, it will possibly set an invalid
845 * address (cmd->meta.source). */
846 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
847 qcmd->meta.flags &= ~CMD_WANT_SKB;
848 }
849fail:
850 if (cmd->meta.u.skb) {
851 dev_kfree_skb_any(cmd->meta.u.skb);
852 cmd->meta.u.skb = NULL;
853 }
854out:
855 atomic_set(&entry, 0);
856 return ret;
857}
858
bb8c093b 859int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 860{
b481de9c 861 if (cmd->meta.flags & CMD_ASYNC)
bb8c093b 862 return iwl4965_send_cmd_async(priv, cmd);
b481de9c 863
bb8c093b 864 return iwl4965_send_cmd_sync(priv, cmd);
b481de9c
ZY		 865}
866
bb8c093b 867int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
b481de9c 868{
bb8c093b 869 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 870 .id = id,
871 .len = len,
872 .data = data,
873 };
874
bb8c093b 875 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 876}
877
bb8c093b 878static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
b481de9c 879{
bb8c093b 880 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 881 .id = id,
882 .len = sizeof(val),
883 .data = &val,
884 };
885
bb8c093b 886 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 887}
888
bb8c093b 889int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
b481de9c 890{
bb8c093b 891 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
b481de9c
ZY		 892}
893
894/**
bb8c093b 895 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 896 *
897 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 898 * NOTE: mutex must be held before calling this fnction
899 */
bb8c093b 900static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
b481de9c
ZY		 901 const u8 *addr, int is_ap)
902{
556f8db7 903 u8 sta_id;
b481de9c 904
6440adb5 905 /* Add station to device's station table */
67d62035
RR		 906#ifdef CONFIG_IWL4965_HT
907 struct ieee80211_conf *conf = &priv->hw->conf;
908 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
909
910 if ((is_ap) &&
911 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
912 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
913 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
914 0, cur_ht_config);
915 else
916#endif /* CONFIG_IWL4965_HT */
917 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
918 0, NULL);
6440adb5
CB		 919
920 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 921 iwl4965_add_station(priv, addr, is_ap);
922
556f8db7 923 return sta_id;
b481de9c
ZY		 924}
925
926/**
bb8c093b 927 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
b481de9c
ZY		 928 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
929 * @channel: Any channel valid for the requested phymode
930
931 * In addition to setting the staging RXON, priv->phymode is also set.
932 *
933 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
934 * in the staging RXON flag structure based on the phymode
935 */
9fbab516
BC		 936static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
937 u16 channel)
b481de9c 938{
bb8c093b 939 if (!iwl4965_get_channel_info(priv, phymode, channel)) {
b481de9c
ZY		 940 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
941 channel, phymode);
942 return -EINVAL;
943 }
944
945 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
946 (priv->phymode == phymode))
947 return 0;
948
949 priv->staging_rxon.channel = cpu_to_le16(channel);
950 if (phymode == MODE_IEEE80211A)
951 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
952 else
953 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
954
955 priv->phymode = phymode;
956
957 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
958
959 return 0;
960}
961
962/**
bb8c093b 963 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 964 *
965 * NOTE: This is really only useful during development and can eventually
966 * be #ifdef'd out once the driver is stable and folks aren't actively
967 * making changes
968 */
bb8c093b 969static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 970{
971 int error = 0;
972 int counter = 1;
973
974 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
975 error |= le32_to_cpu(rxon->flags &
976 (RXON_FLG_TGJ_NARROW_BAND_MSK |
977 RXON_FLG_RADAR_DETECT_MSK));
978 if (error)
979 IWL_WARNING("check 24G fields %d | %d\n",
980 counter++, error);
981 } else {
982 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
983 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
984 if (error)
985 IWL_WARNING("check 52 fields %d | %d\n",
986 counter++, error);
987 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
988 if (error)
989 IWL_WARNING("check 52 CCK %d | %d\n",
990 counter++, error);
991 }
992 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
993 if (error)
994 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
995
996 /* make sure basic rates 6Mbps and 1Mbps are supported */
997 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
998 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
999 if (error)
1000 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1001
1002 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1003 if (error)
1004 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1005
1006 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1007 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1008 if (error)
1009 IWL_WARNING("check CCK and short slot %d | %d\n",
1010 counter++, error);
1011
1012 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1013 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1014 if (error)
1015 IWL_WARNING("check CCK & auto detect %d | %d\n",
1016 counter++, error);
1017
1018 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1019 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1020 if (error)
1021 IWL_WARNING("check TGG and auto detect %d | %d\n",
1022 counter++, error);
1023
1024 if (error)
1025 IWL_WARNING("Tuning to channel %d\n",
1026 le16_to_cpu(rxon->channel));
1027
1028 if (error) {
bb8c093b 1029 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 1030 return -1;
1031 }
1032 return 0;
1033}
1034
1035/**
9fbab516 1036 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 1037 * @priv: staging_rxon is compared to active_rxon
b481de9c 1038 *
9fbab516
BC		 1039 * If the RXON structure is changing enough to require a new tune,
1040 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1041 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 1042 */
bb8c093b 1043static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
b481de9c
ZY		 1044{
1045
1046 /* These items are only settable from the full RXON command */
1047 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1048 compare_ether_addr(priv->staging_rxon.bssid_addr,
1049 priv->active_rxon.bssid_addr) ||
1050 compare_ether_addr(priv->staging_rxon.node_addr,
1051 priv->active_rxon.node_addr) ||
1052 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1053 priv->active_rxon.wlap_bssid_addr) ||
1054 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1055 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1056 (priv->staging_rxon.air_propagation !=
1057 priv->active_rxon.air_propagation) ||
1058 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1059 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1060 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1061 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1062 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1063 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1064 return 1;
1065
1066 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1067 * be updated with the RXON_ASSOC command -- however only some
1068 * flag transitions are allowed using RXON_ASSOC */
1069
1070 /* Check if we are not switching bands */
1071 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1072 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1073 return 1;
1074
1075 /* Check if we are switching association toggle */
1076 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1077 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1078 return 1;
1079
1080 return 0;
1081}
1082
bb8c093b 1083static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
b481de9c
ZY		 1084{
1085 int rc = 0;
bb8c093b
CH		 1086 struct iwl4965_rx_packet *res = NULL;
1087 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1088 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1089 .id = REPLY_RXON_ASSOC,
1090 .len = sizeof(rxon_assoc),
1091 .meta.flags = CMD_WANT_SKB,
1092 .data = &rxon_assoc,
1093 };
bb8c093b
CH		 1094 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1095 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY		 1096
1097 if ((rxon1->flags == rxon2->flags) &&
1098 (rxon1->filter_flags == rxon2->filter_flags) &&
1099 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1100 (rxon1->ofdm_ht_single_stream_basic_rates ==
1101 rxon2->ofdm_ht_single_stream_basic_rates) &&
1102 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1103 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1104 (rxon1->rx_chain == rxon2->rx_chain) &&
1105 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1106 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1107 return 0;
1108 }
1109
1110 rxon_assoc.flags = priv->staging_rxon.flags;
1111 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1112 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1113 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1114 rxon_assoc.reserved = 0;
1115 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1116 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1117 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1118 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1119 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1120
bb8c093b 1121 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1122 if (rc)
1123 return rc;
1124
bb8c093b 1125 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1126 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1127 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1128 rc = -EIO;
1129 }
1130
1131 priv->alloc_rxb_skb--;
1132 dev_kfree_skb_any(cmd.meta.u.skb);
1133
1134 return rc;
1135}
1136
1137/**
bb8c093b 1138 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 1139 *
01ebd063 1140 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 1141 * the active_rxon structure is updated with the new data. This
1142 * function correctly transitions out of the RXON_ASSOC_MSK state if
1143 * a HW tune is required based on the RXON structure changes.
1144 */
bb8c093b 1145static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
b481de9c
ZY		 1146{
1147 /* cast away the const for active_rxon in this function */
bb8c093b 1148 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 1149 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 1150 int rc = 0;
1151
bb8c093b 1152 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 1153 return -1;
1154
1155 /* always get timestamp with Rx frame */
1156 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1157
bb8c093b 1158 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 1159 if (rc) {
1160 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1161 return -EINVAL;
1162 }
1163
1164 /* If we don't need to send a full RXON, we can use
bb8c093b 1165 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 1166 * and other flags for the current radio configuration. */
bb8c093b
CH		 1167 if (!iwl4965_full_rxon_required(priv)) {
1168 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY		 1169 if (rc) {
1170 IWL_ERROR("Error setting RXON_ASSOC "
1171 "configuration (%d).\n", rc);
1172 return rc;
1173 }
1174
1175 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1176
1177 return 0;
1178 }
1179
1180 /* station table will be cleared */
1181 priv->assoc_station_added = 0;
1182
c8b0e6e1 1183#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1184 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1185 if (!priv->error_recovering)
1186 priv->start_calib = 0;
1187
1188 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1189#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1190
1191 /* If we are currently associated and the new config requires
1192 * an RXON_ASSOC and the new config wants the associated mask enabled,
1193 * we must clear the associated from the active configuration
1194 * before we apply the new config */
bb8c093b 1195 if (iwl4965_is_associated(priv) &&
b481de9c
ZY		 1196 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1197 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1198 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1199
bb8c093b
CH		 1200 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1201 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 1202 &priv->active_rxon);
1203
1204 /* If the mask clearing failed then we set
1205 * active_rxon back to what it was previously */
1206 if (rc) {
1207 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1208 IWL_ERROR("Error clearing ASSOC_MSK on current "
1209 "configuration (%d).\n", rc);
1210 return rc;
1211 }
b481de9c
ZY		 1212 }
1213
1214 IWL_DEBUG_INFO("Sending RXON\n"
1215 "* with%s RXON_FILTER_ASSOC_MSK\n"
1216 "* channel = %d\n"
0795af57 1217 "* bssid = %s\n",
b481de9c
ZY		 1218 ((priv->staging_rxon.filter_flags &
1219 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1220 le16_to_cpu(priv->staging_rxon.channel),
0795af57 1221 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c
ZY		 1222
1223 /* Apply the new configuration */
bb8c093b
CH		 1224 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1225 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 1226 if (rc) {
1227 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1228 return rc;
1229 }
1230
bb8c093b 1231 iwl4965_clear_stations_table(priv);
556f8db7 1232
c8b0e6e1 1233#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1234 if (!priv->error_recovering)
1235 priv->start_calib = 0;
1236
1237 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1238 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1239#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1240
1241 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1242
1243 /* If we issue a new RXON command which required a tune then we must
1244 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 1245 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 1246 if (rc) {
1247 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1248 return rc;
1249 }
1250
1251 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 1252 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 1253 IWL_INVALID_STATION) {
1254 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1255 return -EIO;
1256 }
1257
1258 /* If we have set the ASSOC_MSK and we are in BSS mode then
1259 * add the IWL_AP_ID to the station rate table */
bb8c093b 1260 if (iwl4965_is_associated(priv) &&
b481de9c 1261 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 1262 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 1263 == IWL_INVALID_STATION) {
1264 IWL_ERROR("Error adding AP address for transmit.\n");
1265 return -EIO;
1266 }
1267 priv->assoc_station_added = 1;
1268 }
1269
1270 return 0;
1271}
1272
bb8c093b 1273static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
b481de9c 1274{
bb8c093b 1275 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 1276 .flags = 3,
1277 .lead_time = 0xAA,
1278 .max_kill = 1,
1279 .kill_ack_mask = 0,
1280 .kill_cts_mask = 0,
1281 };
1282
bb8c093b
CH		 1283 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1284 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 1285}
1286
bb8c093b 1287static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
b481de9c
ZY		 1288{
1289 int rc = 0;
bb8c093b
CH		 1290 struct iwl4965_rx_packet *res;
1291 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1292 .id = REPLY_SCAN_ABORT_CMD,
1293 .meta.flags = CMD_WANT_SKB,
1294 };
1295
1296 /* If there isn't a scan actively going on in the hardware
1297 * then we are in between scan bands and not actually
1298 * actively scanning, so don't send the abort command */
1299 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1300 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1301 return 0;
1302 }
1303
bb8c093b 1304 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1305 if (rc) {
1306 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1307 return rc;
1308 }
1309
bb8c093b 1310 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1311 if (res->u.status != CAN_ABORT_STATUS) {
1312 /* The scan abort will return 1 for success or
1313 * 2 for "failure". A failure condition can be
1314 * due to simply not being in an active scan which
1315 * can occur if we send the scan abort before we
1316 * the microcode has notified us that a scan is
1317 * completed. */
1318 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1319 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1320 clear_bit(STATUS_SCAN_HW, &priv->status);
1321 }
1322
1323 dev_kfree_skb_any(cmd.meta.u.skb);
1324
1325 return rc;
1326}
1327
bb8c093b
CH		 1328static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1329 struct iwl4965_cmd *cmd,
b481de9c
ZY		 1330 struct sk_buff *skb)
1331{
1332 return 1;
1333}
1334
1335/*
1336 * CARD_STATE_CMD
1337 *
9fbab516 1338 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 1339 *
1340 * When in the 'enable' state the card operates as normal.
1341 * When in the 'disable' state, the card enters into a low power mode.
1342 * When in the 'halt' state, the card is shut down and must be fully
1343 * restarted to come back on.
1344 */
bb8c093b 1345static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1346{
bb8c093b 1347 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1348 .id = REPLY_CARD_STATE_CMD,
1349 .len = sizeof(u32),
1350 .data = &flags,
1351 .meta.flags = meta_flag,
1352 };
1353
1354 if (meta_flag & CMD_ASYNC)
bb8c093b 1355 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1356
bb8c093b 1357 return iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1358}
1359
bb8c093b
CH		 1360static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1361 struct iwl4965_cmd *cmd, struct sk_buff *skb)
b481de9c 1362{
bb8c093b 1363 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY		 1364
1365 if (!skb) {
1366 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1367 return 1;
1368 }
1369
bb8c093b 1370 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY		 1371 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1372 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1373 res->hdr.flags);
1374 return 1;
1375 }
1376
1377 switch (res->u.add_sta.status) {
1378 case ADD_STA_SUCCESS_MSK:
1379 break;
1380 default:
1381 break;
1382 }
1383
1384 /* We didn't cache the SKB; let the caller free it */
1385 return 1;
1386}
1387
bb8c093b
CH		 1388int iwl4965_send_add_station(struct iwl4965_priv *priv,
1389 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1390{
bb8c093b 1391 struct iwl4965_rx_packet *res = NULL;
b481de9c 1392 int rc = 0;
bb8c093b 1393 struct iwl4965_host_cmd cmd = {
b481de9c 1394 .id = REPLY_ADD_STA,
bb8c093b 1395 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 1396 .meta.flags = flags,
1397 .data = sta,
1398 };
1399
1400 if (flags & CMD_ASYNC)
bb8c093b 1401 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY		 1402 else
1403 cmd.meta.flags |= CMD_WANT_SKB;
1404
bb8c093b 1405 rc = iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1406
1407 if (rc || (flags & CMD_ASYNC))
1408 return rc;
1409
bb8c093b 1410 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1411 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1412 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1413 res->hdr.flags);
1414 rc = -EIO;
1415 }
1416
1417 if (rc == 0) {
1418 switch (res->u.add_sta.status) {
1419 case ADD_STA_SUCCESS_MSK:
1420 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1421 break;
1422 default:
1423 rc = -EIO;
1424 IWL_WARNING("REPLY_ADD_STA failed\n");
1425 break;
1426 }
1427 }
1428
1429 priv->alloc_rxb_skb--;
1430 dev_kfree_skb_any(cmd.meta.u.skb);
1431
1432 return rc;
1433}
1434
bb8c093b 1435static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
b481de9c
ZY		 1436 struct ieee80211_key_conf *keyconf,
1437 u8 sta_id)
1438{
1439 unsigned long flags;
1440 __le16 key_flags = 0;
1441
1442 switch (keyconf->alg) {
1443 case ALG_CCMP:
1444 key_flags |= STA_KEY_FLG_CCMP;
1445 key_flags |= cpu_to_le16(
1446 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1447 key_flags &= ~STA_KEY_FLG_INVALID;
1448 break;
1449 case ALG_TKIP:
1450 case ALG_WEP:
b481de9c
ZY		 1451 default:
1452 return -EINVAL;
1453 }
1454 spin_lock_irqsave(&priv->sta_lock, flags);
1455 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1456 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1457 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1458 keyconf->keylen);
1459
1460 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1461 keyconf->keylen);
1462 priv->stations[sta_id].sta.key.key_flags = key_flags;
1463 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1464 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1465
1466 spin_unlock_irqrestore(&priv->sta_lock, flags);
1467
1468 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
bb8c093b 1469 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1470 return 0;
1471}
1472
bb8c093b 1473static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
b481de9c
ZY		 1474{
1475 unsigned long flags;
1476
1477 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH		 1478 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1479 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY		 1480 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1481 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1482 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1483 spin_unlock_irqrestore(&priv->sta_lock, flags);
1484
1485 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1486 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1487 return 0;
1488}
1489
bb8c093b 1490static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
b481de9c
ZY		 1491{
1492 struct list_head *element;
1493
1494 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1495 priv->frames_count);
1496
1497 while (!list_empty(&priv->free_frames)) {
1498 element = priv->free_frames.next;
1499 list_del(element);
bb8c093b 1500 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1501 priv->frames_count--;
1502 }
1503
1504 if (priv->frames_count) {
1505 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1506 priv->frames_count);
1507 priv->frames_count = 0;
1508 }
1509}
1510
bb8c093b 1511static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
b481de9c 1512{
bb8c093b 1513 struct iwl4965_frame *frame;
b481de9c
ZY		 1514 struct list_head *element;
1515 if (list_empty(&priv->free_frames)) {
1516 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1517 if (!frame) {
1518 IWL_ERROR("Could not allocate frame!\n");
1519 return NULL;
1520 }
1521
1522 priv->frames_count++;
1523 return frame;
1524 }
1525
1526 element = priv->free_frames.next;
1527 list_del(element);
bb8c093b 1528 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1529}
1530
bb8c093b 1531static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1532{
1533 memset(frame, 0, sizeof(*frame));
1534 list_add(&frame->list, &priv->free_frames);
1535}
1536
bb8c093b 1537unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
b481de9c
ZY		 1538 struct ieee80211_hdr *hdr,
1539 const u8 *dest, int left)
1540{
1541
bb8c093b 1542 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1543 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1544 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1545 return 0;
1546
1547 if (priv->ibss_beacon->len > left)
1548 return 0;
1549
1550 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1551
1552 return priv->ibss_beacon->len;
1553}
1554
bb8c093b 1555int iwl4965_rate_index_from_plcp(int plcp)
b481de9c
ZY		 1556{
1557 int i = 0;
1558
77626355 1559 /* 4965 HT rate format */
b481de9c
ZY		 1560 if (plcp & RATE_MCS_HT_MSK) {
1561 i = (plcp & 0xff);
1562
1563 if (i >= IWL_RATE_MIMO_6M_PLCP)
1564 i = i - IWL_RATE_MIMO_6M_PLCP;
1565
1566 i += IWL_FIRST_OFDM_RATE;
1567 /* skip 9M not supported in ht*/
1568 if (i >= IWL_RATE_9M_INDEX)
1569 i += 1;
1570 if ((i >= IWL_FIRST_OFDM_RATE) &&
1571 (i <= IWL_LAST_OFDM_RATE))
1572 return i;
77626355
BC		 1573
1574 /* 4965 legacy rate format, search for match in table */
b481de9c 1575 } else {
bb8c093b
CH		 1576 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1577 if (iwl4965_rates[i].plcp == (plcp &0xFF))
b481de9c
ZY		 1578 return i;
1579 }
1580 return -1;
1581}
1582
bb8c093b 1583static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY		 1584{
1585 u8 i;
1586
1587 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1588 i = iwl4965_rates[i].next_ieee) {
b481de9c 1589 if (rate_mask & (1 << i))
bb8c093b 1590 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1591 }
1592
1593 return IWL_RATE_INVALID;
1594}
1595
bb8c093b 1596static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
b481de9c 1597{
bb8c093b 1598 struct iwl4965_frame *frame;
b481de9c
ZY		 1599 unsigned int frame_size;
1600 int rc;
1601 u8 rate;
1602
bb8c093b 1603 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1604
1605 if (!frame) {
1606 IWL_ERROR("Could not obtain free frame buffer for beacon "
1607 "command.\n");
1608 return -ENOMEM;
1609 }
1610
1611 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1612 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY		 1613 0xFF0);
1614 if (rate == IWL_INVALID_RATE)
1615 rate = IWL_RATE_6M_PLCP;
1616 } else {
bb8c093b 1617 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY		 1618 if (rate == IWL_INVALID_RATE)
1619 rate = IWL_RATE_1M_PLCP;
1620 }
1621
bb8c093b 1622 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1623
bb8c093b 1624 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1625 &frame->u.cmd[0]);
1626
bb8c093b 1627 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1628
1629 return rc;
1630}
1631
1632/******************************************************************************
1633 *
1634 * EEPROM related functions
1635 *
1636 ******************************************************************************/
1637
bb8c093b 1638static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
b481de9c
ZY		 1639{
1640 memcpy(mac, priv->eeprom.mac_address, 6);
1641}
1642
1643/**
bb8c093b 1644 * iwl4965_eeprom_init - read EEPROM contents
b481de9c 1645 *
6440adb5 1646 * Load the EEPROM contents from adapter into priv->eeprom
b481de9c
ZY		 1647 *
1648 * NOTE: This routine uses the non-debug IO access functions.
1649 */
bb8c093b 1650int iwl4965_eeprom_init(struct iwl4965_priv *priv)
b481de9c
ZY		 1651{
1652 u16 *e = (u16 *)&priv->eeprom;
bb8c093b 1653 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
b481de9c
ZY		 1654 u32 r;
1655 int sz = sizeof(priv->eeprom);
1656 int rc;
1657 int i;
1658 u16 addr;
1659
1660 /* The EEPROM structure has several padding buffers within it
1661 * and when adding new EEPROM maps is subject to programmer errors
1662 * which may be very difficult to identify without explicitly
1663 * checking the resulting size of the eeprom map. */
1664 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1665
1666 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1667 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1668 return -ENOENT;
1669 }
1670
6440adb5 1671 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
bb8c093b 1672 rc = iwl4965_eeprom_acquire_semaphore(priv);
b481de9c 1673 if (rc < 0) {
91e17473 1674 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
b481de9c
ZY		 1675 return -ENOENT;
1676 }
1677
1678 /* eeprom is an array of 16bit values */
1679 for (addr = 0; addr < sz; addr += sizeof(u16)) {
bb8c093b
CH		 1680 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1681 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
b481de9c
ZY		 1682
1683 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1684 i += IWL_EEPROM_ACCESS_DELAY) {
bb8c093b 1685 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
b481de9c
ZY		 1686 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1687 break;
1688 udelay(IWL_EEPROM_ACCESS_DELAY);
1689 }
1690
1691 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1692 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1693 rc = -ETIMEDOUT;
1694 goto done;
1695 }
1696 e[addr / 2] = le16_to_cpu(r >> 16);
1697 }
1698 rc = 0;
1699
1700done:
bb8c093b 1701 iwl4965_eeprom_release_semaphore(priv);
b481de9c
ZY		 1702 return rc;
1703}
1704
1705/******************************************************************************
1706 *
1707 * Misc. internal state and helper functions
1708 *
1709 ******************************************************************************/
c8b0e6e1 1710#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 1711
1712/**
bb8c093b 1713 * iwl4965_report_frame - dump frame to syslog during debug sessions
b481de9c 1714 *
9fbab516 1715 * You may hack this function to show different aspects of received frames,
b481de9c
ZY		 1716 * including selective frame dumps.
1717 * group100 parameter selects whether to show 1 out of 100 good frames.
1718 *
9fbab516
BC		 1719 * TODO: This was originally written for 3945, need to audit for
1720 * proper operation with 4965.
b481de9c 1721 */
bb8c093b
CH		 1722void iwl4965_report_frame(struct iwl4965_priv *priv,
1723 struct iwl4965_rx_packet *pkt,
b481de9c
ZY		 1724 struct ieee80211_hdr *header, int group100)
1725{
1726 u32 to_us;
1727 u32 print_summary = 0;
1728 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1729 u32 hundred = 0;
1730 u32 dataframe = 0;
1731 u16 fc;
1732 u16 seq_ctl;
1733 u16 channel;
1734 u16 phy_flags;
1735 int rate_sym;
1736 u16 length;
1737 u16 status;
1738 u16 bcn_tmr;
1739 u32 tsf_low;
1740 u64 tsf;
1741 u8 rssi;
1742 u8 agc;
1743 u16 sig_avg;
1744 u16 noise_diff;
bb8c093b
CH		 1745 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1746 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1747 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
b481de9c
ZY		 1748 u8 *data = IWL_RX_DATA(pkt);
1749
1750 /* MAC header */
1751 fc = le16_to_cpu(header->frame_control);
1752 seq_ctl = le16_to_cpu(header->seq_ctrl);
1753
1754 /* metadata */
1755 channel = le16_to_cpu(rx_hdr->channel);
1756 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1757 rate_sym = rx_hdr->rate;
1758 length = le16_to_cpu(rx_hdr->len);
1759
1760 /* end-of-frame status and timestamp */
1761 status = le32_to_cpu(rx_end->status);
1762 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1763 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1764 tsf = le64_to_cpu(rx_end->timestamp);
1765
1766 /* signal statistics */
1767 rssi = rx_stats->rssi;
1768 agc = rx_stats->agc;
1769 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1770 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1771
1772 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1773
1774 /* if data frame is to us and all is good,
1775 * (optionally) print summary for only 1 out of every 100 */
1776 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1777 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1778 dataframe = 1;
1779 if (!group100)
1780 print_summary = 1; /* print each frame */
1781 else if (priv->framecnt_to_us < 100) {
1782 priv->framecnt_to_us++;
1783 print_summary = 0;
1784 } else {
1785 priv->framecnt_to_us = 0;
1786 print_summary = 1;
1787 hundred = 1;
1788 }
1789 } else {
1790 /* print summary for all other frames */
1791 print_summary = 1;
1792 }
1793
1794 if (print_summary) {
1795 char *title;
1796 u32 rate;
1797
1798 if (hundred)
1799 title = "100Frames";
1800 else if (fc & IEEE80211_FCTL_RETRY)
1801 title = "Retry";
1802 else if (ieee80211_is_assoc_response(fc))
1803 title = "AscRsp";
1804 else if (ieee80211_is_reassoc_response(fc))
1805 title = "RasRsp";
1806 else if (ieee80211_is_probe_response(fc)) {
1807 title = "PrbRsp";
1808 print_dump = 1; /* dump frame contents */
1809 } else if (ieee80211_is_beacon(fc)) {
1810 title = "Beacon";
1811 print_dump = 1; /* dump frame contents */
1812 } else if (ieee80211_is_atim(fc))
1813 title = "ATIM";
1814 else if (ieee80211_is_auth(fc))
1815 title = "Auth";
1816 else if (ieee80211_is_deauth(fc))
1817 title = "DeAuth";
1818 else if (ieee80211_is_disassoc(fc))
1819 title = "DisAssoc";
1820 else
1821 title = "Frame";
1822
bb8c093b 1823 rate = iwl4965_rate_index_from_plcp(rate_sym);
b481de9c
ZY		 1824 if (rate == -1)
1825 rate = 0;
1826 else
bb8c093b 1827 rate = iwl4965_rates[rate].ieee / 2;
b481de9c
ZY		 1828
1829 /* print frame summary.
1830 * MAC addresses show just the last byte (for brevity),
1831 * but you can hack it to show more, if you'd like to. */
1832 if (dataframe)
1833 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1834 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1835 title, fc, header->addr1[5],
1836 length, rssi, channel, rate);
1837 else {
1838 /* src/dst addresses assume managed mode */
1839 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1840 "src=0x%02x, rssi=%u, tim=%lu usec, "
1841 "phy=0x%02x, chnl=%d\n",
1842 title, fc, header->addr1[5],
1843 header->addr3[5], rssi,
1844 tsf_low - priv->scan_start_tsf,
1845 phy_flags, channel);
1846 }
1847 }
1848 if (print_dump)
bb8c093b 1849 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
b481de9c
ZY		 1850}
1851#endif
1852
bb8c093b 1853static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
b481de9c
ZY		 1854{
1855 if (priv->hw_setting.shared_virt)
1856 pci_free_consistent(priv->pci_dev,
bb8c093b 1857 sizeof(struct iwl4965_shared),
b481de9c
ZY		 1858 priv->hw_setting.shared_virt,
1859 priv->hw_setting.shared_phys);
1860}
1861
1862/**
bb8c093b 1863 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1864 *
1865 * return : set the bit for each supported rate insert in ie
1866 */
bb8c093b 1867static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1868 u16 basic_rate, int *left)
b481de9c
ZY		 1869{
1870 u16 ret_rates = 0, bit;
1871 int i;
c7c46676
TW		 1872 u8 *cnt = ie;
1873 u8 *rates = ie + 1;
b481de9c
ZY		 1874
1875 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1876 if (bit & supported_rate) {
1877 ret_rates |= bit;
bb8c093b 1878 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1879 ((bit & basic_rate) ? 0x80 : 0x00);
1880 (*cnt)++;
1881 (*left)--;
1882 if ((*left <= 0) ||
1883 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1884 break;
1885 }
1886 }
1887
1888 return ret_rates;
1889}
1890
c8b0e6e1 1891#ifdef CONFIG_IWL4965_HT
bb8c093b 1892void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
8fb88032
RR		 1893 struct ieee80211_ht_cap *ht_cap,
1894 u8 use_current_config);
b481de9c
ZY		 1895#endif
1896
1897/**
bb8c093b 1898 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1899 */
bb8c093b 1900static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
b481de9c
ZY		 1901 struct ieee80211_mgmt *frame,
1902 int left, int is_direct)
1903{
1904 int len = 0;
1905 u8 *pos = NULL;
bee488db 1906 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032
RR		 1907#ifdef CONFIG_IWL4965_HT
1908 struct ieee80211_hw_mode *mode;
1909#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 1910
1911 /* Make sure there is enough space for the probe request,
1912 * two mandatory IEs and the data */
1913 left -= 24;
1914 if (left < 0)
1915 return 0;
1916 len += 24;
1917
1918 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1919 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1920 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1921 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1922 frame->seq_ctrl = 0;
1923
1924 /* fill in our indirect SSID IE */
1925 /* ...next IE... */
1926
1927 left -= 2;
1928 if (left < 0)
1929 return 0;
1930 len += 2;
1931 pos = &(frame->u.probe_req.variable[0]);
1932 *pos++ = WLAN_EID_SSID;
1933 *pos++ = 0;
1934
1935 /* fill in our direct SSID IE... */
1936 if (is_direct) {
1937 /* ...next IE... */
1938 left -= 2 + priv->essid_len;
1939 if (left < 0)
1940 return 0;
1941 /* ... fill it in... */
1942 *pos++ = WLAN_EID_SSID;
1943 *pos++ = priv->essid_len;
1944 memcpy(pos, priv->essid, priv->essid_len);
1945 pos += priv->essid_len;
1946 len += 2 + priv->essid_len;
1947 }
1948
1949 /* fill in supported rate */
1950 /* ...next IE... */
1951 left -= 2;
1952 if (left < 0)
1953 return 0;
c7c46676 1954
b481de9c
ZY		 1955 /* ... fill it in... */
1956 *pos++ = WLAN_EID_SUPP_RATES;
1957 *pos = 0;
c7c46676 1958
bee488db 1959 /* exclude 60M rate */
1960 active_rates = priv->rates_mask;
1961 active_rates &= ~IWL_RATE_60M_MASK;
1962
1963 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1964
c7c46676 1965 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1966 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1967 active_rate_basic, &left);
c7c46676
TW		 1968 active_rates &= ~ret_rates;
1969
bb8c093b 1970 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1971 active_rate_basic, &left);
c7c46676
TW		 1972 active_rates &= ~ret_rates;
1973
b481de9c
ZY		 1974 len += 2 + *pos;
1975 pos += (*pos) + 1;
c7c46676 1976 if (active_rates == 0)
b481de9c
ZY		 1977 goto fill_end;
1978
1979 /* fill in supported extended rate */
1980 /* ...next IE... */
1981 left -= 2;
1982 if (left < 0)
1983 return 0;
1984 /* ... fill it in... */
1985 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1986 *pos = 0;
bb8c093b 1987 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1988 active_rate_basic, &left);
b481de9c
ZY		 1989 if (*pos > 0)
1990 len += 2 + *pos;
1991
c8b0e6e1 1992#ifdef CONFIG_IWL4965_HT
8fb88032
RR		 1993 mode = priv->hw->conf.mode;
1994 if (mode->ht_info.ht_supported) {
b481de9c
ZY		 1995 pos += (*pos) + 1;
1996 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032
RR		 1997 *pos++ = sizeof(struct ieee80211_ht_cap);
1998 iwl4965_set_ht_capab(priv->hw,
1999 (struct ieee80211_ht_cap *)pos, 0);
2000 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 2001 }
c8b0e6e1 2002#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 2003
2004 fill_end:
2005 return (u16)len;
2006}
2007
2008/*
2009 * QoS support
2010*/
c8b0e6e1 2011#ifdef CONFIG_IWL4965_QOS
bb8c093b
CH		 2012static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
2013 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 2014{
2015
bb8c093b
CH		 2016 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2017 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 2018}
2019
bb8c093b 2020static void iwl4965_reset_qos(struct iwl4965_priv *priv)
b481de9c
ZY		 2021{
2022 u16 cw_min = 15;
2023 u16 cw_max = 1023;
2024 u8 aifs = 2;
2025 u8 is_legacy = 0;
2026 unsigned long flags;
2027 int i;
2028
2029 spin_lock_irqsave(&priv->lock, flags);
2030 priv->qos_data.qos_active = 0;
2031
2032 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2033 if (priv->qos_data.qos_enable)
2034 priv->qos_data.qos_active = 1;
2035 if (!(priv->active_rate & 0xfff0)) {
2036 cw_min = 31;
2037 is_legacy = 1;
2038 }
2039 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2040 if (priv->qos_data.qos_enable)
2041 priv->qos_data.qos_active = 1;
2042 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2043 cw_min = 31;
2044 is_legacy = 1;
2045 }
2046
2047 if (priv->qos_data.qos_active)
2048 aifs = 3;
2049
2050 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2051 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2052 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2053 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2054 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2055
2056 if (priv->qos_data.qos_active) {
2057 i = 1;
2058 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2059 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2060 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2061 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2062 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2063
2064 i = 2;
2065 priv->qos_data.def_qos_parm.ac[i].cw_min =
2066 cpu_to_le16((cw_min + 1) / 2 - 1);
2067 priv->qos_data.def_qos_parm.ac[i].cw_max =
2068 cpu_to_le16(cw_max);
2069 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2070 if (is_legacy)
2071 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2072 cpu_to_le16(6016);
2073 else
2074 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2075 cpu_to_le16(3008);
2076 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2077
2078 i = 3;
2079 priv->qos_data.def_qos_parm.ac[i].cw_min =
2080 cpu_to_le16((cw_min + 1) / 4 - 1);
2081 priv->qos_data.def_qos_parm.ac[i].cw_max =
2082 cpu_to_le16((cw_max + 1) / 2 - 1);
2083 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2084 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2085 if (is_legacy)
2086 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2087 cpu_to_le16(3264);
2088 else
2089 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2090 cpu_to_le16(1504);
2091 } else {
2092 for (i = 1; i < 4; i++) {
2093 priv->qos_data.def_qos_parm.ac[i].cw_min =
2094 cpu_to_le16(cw_min);
2095 priv->qos_data.def_qos_parm.ac[i].cw_max =
2096 cpu_to_le16(cw_max);
2097 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2098 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2099 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2100 }
2101 }
2102 IWL_DEBUG_QOS("set QoS to default \n");
2103
2104 spin_unlock_irqrestore(&priv->lock, flags);
2105}
2106
bb8c093b 2107static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
b481de9c
ZY		 2108{
2109 unsigned long flags;
2110
b481de9c
ZY		 2111 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2112 return;
2113
2114 if (!priv->qos_data.qos_enable)
2115 return;
2116
2117 spin_lock_irqsave(&priv->lock, flags);
2118 priv->qos_data.def_qos_parm.qos_flags = 0;
2119
2120 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2121 !priv->qos_data.qos_cap.q_AP.txop_request)
2122 priv->qos_data.def_qos_parm.qos_flags |=
2123 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 2124 if (priv->qos_data.qos_active)
2125 priv->qos_data.def_qos_parm.qos_flags |=
2126 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2127
c8b0e6e1 2128#ifdef CONFIG_IWL4965_HT
fd105e79 2129 if (priv->current_ht_config.is_ht)
f1f1f5c7 2130 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 2131#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 2132
b481de9c
ZY		 2133 spin_unlock_irqrestore(&priv->lock, flags);
2134
bb8c093b 2135 if (force || iwl4965_is_associated(priv)) {
f1f1f5c7
TW		 2136 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2137 priv->qos_data.qos_active,
2138 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 2139
bb8c093b 2140 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 2141 &(priv->qos_data.def_qos_parm));
2142 }
2143}
2144
c8b0e6e1 2145#endif /* CONFIG_IWL4965_QOS */
b481de9c
ZY		 2146/*
2147 * Power management (not Tx power!) functions
2148 */
2149#define MSEC_TO_USEC 1024
2150
2151#define NOSLP __constant_cpu_to_le16(0), 0, 0
2152#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2153#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2154#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2155 __constant_cpu_to_le32(X1), \
2156 __constant_cpu_to_le32(X2), \
2157 __constant_cpu_to_le32(X3), \
2158 __constant_cpu_to_le32(X4)}
2159
2160
2161/* default power management (not Tx power) table values */
2162/* for tim 0-10 */
bb8c093b 2163static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY		 2164 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2165 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2166 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2167 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2168 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2169 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2170};
2171
2172/* for tim > 10 */
bb8c093b 2173static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY		 2174 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2175 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2176 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2177 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2178 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2179 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2180 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2181 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2182 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2183 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2184};
2185
bb8c093b 2186int iwl4965_power_init_handle(struct iwl4965_priv *priv)
b481de9c
ZY		 2187{
2188 int rc = 0, i;
bb8c093b
CH		 2189 struct iwl4965_power_mgr *pow_data;
2190 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY		 2191 u16 pci_pm;
2192
2193 IWL_DEBUG_POWER("Initialize power \n");
2194
2195 pow_data = &(priv->power_data);
2196
2197 memset(pow_data, 0, sizeof(*pow_data));
2198
2199 pow_data->active_index = IWL_POWER_RANGE_0;
2200 pow_data->dtim_val = 0xffff;
2201
2202 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2203 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2204
2205 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2206 if (rc != 0)
2207 return 0;
2208 else {
bb8c093b 2209 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY		 2210
2211 IWL_DEBUG_POWER("adjust power command flags\n");
2212
2213 for (i = 0; i < IWL_POWER_AC; i++) {
2214 cmd = &pow_data->pwr_range_0[i].cmd;
2215
2216 if (pci_pm & 0x1)
2217 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2218 else
2219 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2220 }
2221 }
2222 return rc;
2223}
2224
bb8c093b
CH		 2225static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2226 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY		 2227{
2228 int rc = 0, i;
2229 u8 skip;
2230 u32 max_sleep = 0;
bb8c093b 2231 struct iwl4965_power_vec_entry *range;
b481de9c 2232 u8 period = 0;
bb8c093b 2233 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY		 2234
2235 if (mode > IWL_POWER_INDEX_5) {
2236 IWL_DEBUG_POWER("Error invalid power mode \n");
2237 return -1;
2238 }
2239 pow_data = &(priv->power_data);
2240
2241 if (pow_data->active_index == IWL_POWER_RANGE_0)
2242 range = &pow_data->pwr_range_0[0];
2243 else
2244 range = &pow_data->pwr_range_1[1];
2245
bb8c093b 2246 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY		 2247
2248#ifdef IWL_MAC80211_DISABLE
2249 if (priv->assoc_network != NULL) {
2250 unsigned long flags;
2251
2252 period = priv->assoc_network->tim.tim_period;
2253 }
2254#endif /*IWL_MAC80211_DISABLE */
2255 skip = range[mode].no_dtim;
2256
2257 if (period == 0) {
2258 period = 1;
2259 skip = 0;
2260 }
2261
2262 if (skip == 0) {
2263 max_sleep = period;
2264 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2265 } else {
2266 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2267 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2268 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2269 }
2270
2271 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2272 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2273 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2274 }
2275
2276 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2277 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2278 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2279 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2280 le32_to_cpu(cmd->sleep_interval[0]),
2281 le32_to_cpu(cmd->sleep_interval[1]),
2282 le32_to_cpu(cmd->sleep_interval[2]),
2283 le32_to_cpu(cmd->sleep_interval[3]),
2284 le32_to_cpu(cmd->sleep_interval[4]));
2285
2286 return rc;
2287}
2288
bb8c093b 2289static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
b481de9c 2290{
9a62f73b 2291 u32 uninitialized_var(final_mode);
b481de9c 2292 int rc;
bb8c093b 2293 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY		 2294
2295 /* If on battery, set to 3,
01ebd063 2296 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY		 2297 * else user level */
2298 switch (mode) {
2299 case IWL_POWER_BATTERY:
2300 final_mode = IWL_POWER_INDEX_3;
2301 break;
2302 case IWL_POWER_AC:
2303 final_mode = IWL_POWER_MODE_CAM;
2304 break;
2305 default:
2306 final_mode = mode;
2307 break;
2308 }
2309
2310 cmd.keep_alive_beacons = 0;
2311
bb8c093b 2312 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 2313
bb8c093b 2314 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY		 2315
2316 if (final_mode == IWL_POWER_MODE_CAM)
2317 clear_bit(STATUS_POWER_PMI, &priv->status);
2318 else
2319 set_bit(STATUS_POWER_PMI, &priv->status);
2320
2321 return rc;
2322}
2323
bb8c093b 2324int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2325{
2326 /* Filter incoming packets to determine if they are targeted toward
2327 * this network, discarding packets coming from ourselves */
2328 switch (priv->iw_mode) {
2329 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2330 /* packets from our adapter are dropped (echo) */
2331 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2332 return 0;
2333 /* {broad,multi}cast packets to our IBSS go through */
2334 if (is_multicast_ether_addr(header->addr1))
2335 return !compare_ether_addr(header->addr3, priv->bssid);
2336 /* packets to our adapter go through */
2337 return !compare_ether_addr(header->addr1, priv->mac_addr);
2338 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2339 /* packets from our adapter are dropped (echo) */
2340 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2341 return 0;
2342 /* {broad,multi}cast packets to our BSS go through */
2343 if (is_multicast_ether_addr(header->addr1))
2344 return !compare_ether_addr(header->addr2, priv->bssid);
2345 /* packets to our adapter go through */
2346 return !compare_ether_addr(header->addr1, priv->mac_addr);
2347 }
2348
2349 return 1;
2350}
2351
2352#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2353
bb8c093b 2354static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 2355{
2356 switch (status & TX_STATUS_MSK) {
2357 case TX_STATUS_SUCCESS:
2358 return "SUCCESS";
2359 TX_STATUS_ENTRY(SHORT_LIMIT);
2360 TX_STATUS_ENTRY(LONG_LIMIT);
2361 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2362 TX_STATUS_ENTRY(MGMNT_ABORT);
2363 TX_STATUS_ENTRY(NEXT_FRAG);
2364 TX_STATUS_ENTRY(LIFE_EXPIRE);
2365 TX_STATUS_ENTRY(DEST_PS);
2366 TX_STATUS_ENTRY(ABORTED);
2367 TX_STATUS_ENTRY(BT_RETRY);
2368 TX_STATUS_ENTRY(STA_INVALID);
2369 TX_STATUS_ENTRY(FRAG_DROPPED);
2370 TX_STATUS_ENTRY(TID_DISABLE);
2371 TX_STATUS_ENTRY(FRAME_FLUSHED);
2372 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2373 TX_STATUS_ENTRY(TX_LOCKED);
2374 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2375 }
2376
2377 return "UNKNOWN";
2378}
2379
2380/**
bb8c093b 2381 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 2382 *
2383 * NOTE: priv->mutex is not required before calling this function
2384 */
bb8c093b 2385static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
b481de9c
ZY		 2386{
2387 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2388 clear_bit(STATUS_SCANNING, &priv->status);
2389 return 0;
2390 }
2391
2392 if (test_bit(STATUS_SCANNING, &priv->status)) {
2393 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2394 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2395 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2396 queue_work(priv->workqueue, &priv->abort_scan);
2397
2398 } else
2399 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2400
2401 return test_bit(STATUS_SCANNING, &priv->status);
2402 }
2403
2404 return 0;
2405}
2406
2407/**
bb8c093b 2408 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 2409 * @ms: amount of time to wait (in milliseconds) for scan to abort
2410 *
2411 * NOTE: priv->mutex must be held before calling this function
2412 */
bb8c093b 2413static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
b481de9c
ZY		 2414{
2415 unsigned long now = jiffies;
2416 int ret;
2417
bb8c093b 2418 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 2419 if (ret && ms) {
2420 mutex_unlock(&priv->mutex);
2421 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2422 test_bit(STATUS_SCANNING, &priv->status))
2423 msleep(1);
2424 mutex_lock(&priv->mutex);
2425
2426 return test_bit(STATUS_SCANNING, &priv->status);
2427 }
2428
2429 return ret;
2430}
2431
bb8c093b 2432static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
b481de9c
ZY		 2433{
2434 /* Reset ieee stats */
2435
2436 /* We don't reset the net_device_stats (ieee->stats) on
2437 * re-association */
2438
2439 priv->last_seq_num = -1;
2440 priv->last_frag_num = -1;
2441 priv->last_packet_time = 0;
2442
bb8c093b 2443 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2444}
2445
2446#define MAX_UCODE_BEACON_INTERVAL 4096
2447#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2448
bb8c093b 2449static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 2450{
2451 u16 new_val = 0;
2452 u16 beacon_factor = 0;
2453
2454 beacon_factor =
2455 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2456 / MAX_UCODE_BEACON_INTERVAL;
2457 new_val = beacon_val / beacon_factor;
2458
2459 return cpu_to_le16(new_val);
2460}
2461
bb8c093b 2462static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
b481de9c
ZY		 2463{
2464 u64 interval_tm_unit;
2465 u64 tsf, result;
2466 unsigned long flags;
2467 struct ieee80211_conf *conf = NULL;
2468 u16 beacon_int = 0;
2469
2470 conf = ieee80211_get_hw_conf(priv->hw);
2471
2472 spin_lock_irqsave(&priv->lock, flags);
2473 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2474 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2475
2476 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2477
2478 tsf = priv->timestamp1;
2479 tsf = ((tsf << 32) | priv->timestamp0);
2480
2481 beacon_int = priv->beacon_int;
2482 spin_unlock_irqrestore(&priv->lock, flags);
2483
2484 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2485 if (beacon_int == 0) {
2486 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2487 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2488 } else {
2489 priv->rxon_timing.beacon_interval =
2490 cpu_to_le16(beacon_int);
2491 priv->rxon_timing.beacon_interval =
bb8c093b 2492 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 2493 le16_to_cpu(priv->rxon_timing.beacon_interval));
2494 }
2495
2496 priv->rxon_timing.atim_window = 0;
2497 } else {
2498 priv->rxon_timing.beacon_interval =
bb8c093b 2499 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 2500 /* TODO: we need to get atim_window from upper stack
2501 * for now we set to 0 */
2502 priv->rxon_timing.atim_window = 0;
2503 }
2504
2505 interval_tm_unit =
2506 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2507 result = do_div(tsf, interval_tm_unit);
2508 priv->rxon_timing.beacon_init_val =
2509 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2510
2511 IWL_DEBUG_ASSOC
2512 ("beacon interval %d beacon timer %d beacon tim %d\n",
2513 le16_to_cpu(priv->rxon_timing.beacon_interval),
2514 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2515 le16_to_cpu(priv->rxon_timing.atim_window));
2516}
2517
bb8c093b 2518static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
b481de9c
ZY		 2519{
2520 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2521 IWL_ERROR("APs don't scan.\n");
2522 return 0;
2523 }
2524
bb8c093b 2525 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 2526 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2527 return -EIO;
2528 }
2529
2530 if (test_bit(STATUS_SCANNING, &priv->status)) {
2531 IWL_DEBUG_SCAN("Scan already in progress.\n");
2532 return -EAGAIN;
2533 }
2534
2535 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2536 IWL_DEBUG_SCAN("Scan request while abort pending. "
2537 "Queuing.\n");
2538 return -EAGAIN;
2539 }
2540
2541 IWL_DEBUG_INFO("Starting scan...\n");
2542 priv->scan_bands = 2;
2543 set_bit(STATUS_SCANNING, &priv->status);
2544 priv->scan_start = jiffies;
2545 priv->scan_pass_start = priv->scan_start;
2546
2547 queue_work(priv->workqueue, &priv->request_scan);
2548
2549 return 0;
2550}
2551
bb8c093b 2552static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
b481de9c 2553{
bb8c093b 2554 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
b481de9c
ZY		 2555
2556 if (hw_decrypt)
2557 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2558 else
2559 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2560
2561 return 0;
2562}
2563
bb8c093b 2564static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
b481de9c
ZY		 2565{
2566 if (phymode == MODE_IEEE80211A) {
2567 priv->staging_rxon.flags &=
2568 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2569 | RXON_FLG_CCK_MSK);
2570 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2571 } else {
bb8c093b 2572 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY		 2573 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2574 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2575 else
2576 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2577
2578 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2579 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2580
2581 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2582 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2583 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2584 }
2585}
2586
2587/*
01ebd063 2588 * initialize rxon structure with default values from eeprom
b481de9c 2589 */
bb8c093b 2590static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
b481de9c 2591{
bb8c093b 2592 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 2593
2594 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2595
2596 switch (priv->iw_mode) {
2597 case IEEE80211_IF_TYPE_AP:
2598 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2599 break;
2600
2601 case IEEE80211_IF_TYPE_STA:
2602 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2603 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2604 break;
2605
2606 case IEEE80211_IF_TYPE_IBSS:
2607 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2608 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2609 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2610 RXON_FILTER_ACCEPT_GRP_MSK;
2611 break;
2612
2613 case IEEE80211_IF_TYPE_MNTR:
2614 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2615 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2616 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2617 break;
2618 }
2619
2620#if 0
2621 /* TODO: Figure out when short_preamble would be set and cache from
2622 * that */
2623 if (!hw_to_local(priv->hw)->short_preamble)
2624 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2625 else
2626 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2627#endif
2628
bb8c093b 2629 ch_info = iwl4965_get_channel_info(priv, priv->phymode,
b481de9c
ZY		 2630 le16_to_cpu(priv->staging_rxon.channel));
2631
2632 if (!ch_info)
2633 ch_info = &priv->channel_info[0];
2634
2635 /*
2636 * in some case A channels are all non IBSS
2637 * in this case force B/G channel
2638 */
2639 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2640 !(is_channel_ibss(ch_info)))
2641 ch_info = &priv->channel_info[0];
2642
2643 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2644 if (is_channel_a_band(ch_info))
2645 priv->phymode = MODE_IEEE80211A;
2646 else
2647 priv->phymode = MODE_IEEE80211G;
2648
bb8c093b 2649 iwl4965_set_flags_for_phymode(priv, priv->phymode);
b481de9c
ZY		 2650
2651 priv->staging_rxon.ofdm_basic_rates =
2652 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2653 priv->staging_rxon.cck_basic_rates =
2654 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2655
2656 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2657 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2658 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2659 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2660 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2661 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2662 iwl4965_set_rxon_chain(priv);
2663}
2664
bb8c093b 2665static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
b481de9c 2666{
b481de9c 2667 if (mode == IEEE80211_IF_TYPE_IBSS) {
bb8c093b 2668 const struct iwl4965_channel_info *ch_info;
b481de9c 2669
bb8c093b 2670 ch_info = iwl4965_get_channel_info(priv,
b481de9c
ZY		 2671 priv->phymode,
2672 le16_to_cpu(priv->staging_rxon.channel));
2673
2674 if (!ch_info || !is_channel_ibss(ch_info)) {
2675 IWL_ERROR("channel %d not IBSS channel\n",
2676 le16_to_cpu(priv->staging_rxon.channel));
2677 return -EINVAL;
2678 }
2679 }
2680
b481de9c
ZY		 2681 priv->iw_mode = mode;
2682
bb8c093b 2683 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 2684 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2685
bb8c093b 2686 iwl4965_clear_stations_table(priv);
b481de9c 2687
fde3571f
MA		 2688 /* dont commit rxon if rf-kill is on*/
2689 if (!iwl4965_is_ready_rf(priv))
2690 return -EAGAIN;
2691
2692 cancel_delayed_work(&priv->scan_check);
2693 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2694 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2695 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2696 return -EAGAIN;
2697 }
2698
bb8c093b 2699 iwl4965_commit_rxon(priv);
b481de9c
ZY		 2700
2701 return 0;
2702}
2703
bb8c093b 2704static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
b481de9c 2705 struct ieee80211_tx_control *ctl,
bb8c093b 2706 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2707 struct sk_buff *skb_frag,
2708 int last_frag)
2709{
bb8c093b 2710 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
b481de9c
ZY		 2711
2712 switch (keyinfo->alg) {
2713 case ALG_CCMP:
2714 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2715 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2716 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2717 break;
2718
2719 case ALG_TKIP:
2720#if 0
2721 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2722
2723 if (last_frag)
2724 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2725 8);
2726 else
2727 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2728#endif
2729 break;
2730
2731 case ALG_WEP:
2732 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2733 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2734
2735 if (keyinfo->keylen == 13)
2736 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2737
2738 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2739
2740 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2741 "with key %d\n", ctl->key_idx);
2742 break;
2743
b481de9c
ZY		 2744 default:
2745 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2746 break;
2747 }
2748}
2749
2750/*
2751 * handle build REPLY_TX command notification.
2752 */
bb8c093b
CH		 2753static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2754 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2755 struct ieee80211_tx_control *ctrl,
2756 struct ieee80211_hdr *hdr,
2757 int is_unicast, u8 std_id)
2758{
2759 __le16 *qc;
2760 u16 fc = le16_to_cpu(hdr->frame_control);
2761 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2762
2763 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2764 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2765 tx_flags |= TX_CMD_FLG_ACK_MSK;
2766 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2767 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2768 if (ieee80211_is_probe_response(fc) &&
2769 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2770 tx_flags |= TX_CMD_FLG_TSF_MSK;
2771 } else {
2772 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2773 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2774 }
2775
2776 cmd->cmd.tx.sta_id = std_id;
2777 if (ieee80211_get_morefrag(hdr))
2778 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2779
2780 qc = ieee80211_get_qos_ctrl(hdr);
2781 if (qc) {
2782 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2783 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2784 } else
2785 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2786
2787 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2788 tx_flags |= TX_CMD_FLG_RTS_MSK;
2789 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2790 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2791 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2792 tx_flags |= TX_CMD_FLG_CTS_MSK;
2793 }
2794
2795 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2796 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2797
2798 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2799 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2800 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2801 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2802 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2803 else
bc434dd2 2804 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
b481de9c
ZY		 2805 } else
2806 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2807
2808 cmd->cmd.tx.driver_txop = 0;
2809 cmd->cmd.tx.tx_flags = tx_flags;
2810 cmd->cmd.tx.next_frame_len = 0;
2811}
2812
6440adb5
CB		 2813/**
2814 * iwl4965_get_sta_id - Find station's index within station table
2815 *
2816 * If new IBSS station, create new entry in station table
2817 */
9fbab516
BC		 2818static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2819 struct ieee80211_hdr *hdr)
b481de9c
ZY		 2820{
2821 int sta_id;
2822 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2823 DECLARE_MAC_BUF(mac);
b481de9c 2824
6440adb5 2825 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 2826 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2827 is_multicast_ether_addr(hdr->addr1))
2828 return priv->hw_setting.bcast_sta_id;
2829
2830 switch (priv->iw_mode) {
2831
6440adb5
CB		 2832 /* If we are a client station in a BSS network, use the special
2833 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 2834 case IEEE80211_IF_TYPE_STA:
2835 return IWL_AP_ID;
2836
2837 /* If we are an AP, then find the station, or use BCAST */
2838 case IEEE80211_IF_TYPE_AP:
bb8c093b 2839 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2840 if (sta_id != IWL_INVALID_STATION)
2841 return sta_id;
2842 return priv->hw_setting.bcast_sta_id;
2843
6440adb5
CB		 2844 /* If this frame is going out to an IBSS network, find the station,
2845 * or create a new station table entry */
b481de9c 2846 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2847 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2848 if (sta_id != IWL_INVALID_STATION)
2849 return sta_id;
2850
6440adb5 2851 /* Create new station table entry */
67d62035
RR		 2852 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2853 0, CMD_ASYNC, NULL);
b481de9c
ZY		 2854
2855 if (sta_id != IWL_INVALID_STATION)
2856 return sta_id;
2857
0795af57 2858 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2859 "Defaulting to broadcast...\n",
0795af57 2860 print_mac(mac, hdr->addr1));
bb8c093b 2861 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY		 2862 return priv->hw_setting.bcast_sta_id;
2863
2864 default:
01ebd063 2865 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY		 2866 return priv->hw_setting.bcast_sta_id;
2867 }
2868}
2869
2870/*
2871 * start REPLY_TX command process
2872 */
bb8c093b 2873static int iwl4965_tx_skb(struct iwl4965_priv *priv,
b481de9c
ZY		 2874 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2875{
2876 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2877 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 2878 u32 *control_flags;
2879 int txq_id = ctl->queue;
bb8c093b
CH		 2880 struct iwl4965_tx_queue *txq = NULL;
2881 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 2882 dma_addr_t phys_addr;
2883 dma_addr_t txcmd_phys;
bb8c093b 2884 struct iwl4965_cmd *out_cmd = NULL;
b481de9c
ZY		 2885 u16 len, idx, len_org;
2886 u8 id, hdr_len, unicast;
2887 u8 sta_id;
2888 u16 seq_number = 0;
2889 u16 fc;
2890 __le16 *qc;
2891 u8 wait_write_ptr = 0;
2892 unsigned long flags;
2893 int rc;
2894
2895 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2896 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 2897 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2898 goto drop_unlock;
2899 }
2900
2901 if (!priv->interface_id) {
2902 IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
2903 goto drop_unlock;
2904 }
2905
2906 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2907 IWL_ERROR("ERROR: No TX rate available.\n");
2908 goto drop_unlock;
2909 }
2910
2911 unicast = !is_multicast_ether_addr(hdr->addr1);
2912 id = 0;
2913
2914 fc = le16_to_cpu(hdr->frame_control);
2915
c8b0e6e1 2916#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 2917 if (ieee80211_is_auth(fc))
2918 IWL_DEBUG_TX("Sending AUTH frame\n");
2919 else if (ieee80211_is_assoc_request(fc))
2920 IWL_DEBUG_TX("Sending ASSOC frame\n");
2921 else if (ieee80211_is_reassoc_request(fc))
2922 IWL_DEBUG_TX("Sending REASSOC frame\n");
2923#endif
2924
7878a5a4
MA		 2925 /* drop all data frame if we are not associated */
2926 if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
b481de9c 2927 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
bb8c093b 2928 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
b481de9c
ZY		 2929 goto drop_unlock;
2930 }
2931
2932 spin_unlock_irqrestore(&priv->lock, flags);
2933
2934 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB		 2935
2936 /* Find (or create) index into station table for destination station */
bb8c093b 2937 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2938 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2939 DECLARE_MAC_BUF(mac);
2940
2941 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2942 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2943 goto drop;
2944 }
2945
2946 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2947
2948 qc = ieee80211_get_qos_ctrl(hdr);
2949 if (qc) {
2950 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2951 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2952 IEEE80211_SCTL_SEQ;
2953 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2954 (hdr->seq_ctrl &
2955 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2956 seq_number += 0x10;
c8b0e6e1
CH		 2957#ifdef CONFIG_IWL4965_HT
2958#ifdef CONFIG_IWL4965_HT_AGG
b481de9c
ZY		 2959 /* aggregation is on for this <sta,tid> */
2960 if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
2961 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
c8b0e6e1
CH		 2962#endif /* CONFIG_IWL4965_HT_AGG */
2963#endif /* CONFIG_IWL4965_HT */
b481de9c 2964 }
6440adb5
CB		 2965
2966 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2967 txq = &priv->txq[txq_id];
2968 q = &txq->q;
2969
2970 spin_lock_irqsave(&priv->lock, flags);
2971
6440adb5 2972 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2973 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2974 memset(tfd, 0, sizeof(*tfd));
2975 control_flags = (u32 *) tfd;
fc4b6853 2976 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2977
6440adb5 2978 /* Set up driver data for this TFD */
bb8c093b 2979 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2980 txq->txb[q->write_ptr].skb[0] = skb;
2981 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2982 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB		 2983
2984 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2985 out_cmd = &txq->cmd[idx];
2986 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2987 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB		 2988
2989 /*
2990 * Set up the Tx-command (not MAC!) header.
2991 * Store the chosen Tx queue and TFD index within the sequence field;
2992 * after Tx, uCode's Tx response will return this value so driver can
2993 * locate the frame within the tx queue and do post-tx processing.
2994 */
b481de9c
ZY		 2995 out_cmd->hdr.cmd = REPLY_TX;
2996 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2997 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB		 2998
2999 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 3000 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
3001
6440adb5
CB		 3002 /*
3003 * Use the first empty entry in this queue's command buffer array
3004 * to contain the Tx command and MAC header concatenated together
3005 * (payload data will be in another buffer).
3006 * Size of this varies, due to varying MAC header length.
3007 * If end is not dword aligned, we'll have 2 extra bytes at the end
3008 * of the MAC header (device reads on dword boundaries).
3009 * We'll tell device about this padding later.
3010 */
b481de9c 3011 len = priv->hw_setting.tx_cmd_len +
bb8c093b 3012 sizeof(struct iwl4965_cmd_header) + hdr_len;
b481de9c
ZY		 3013
3014 len_org = len;
3015 len = (len + 3) & ~3;
3016
3017 if (len_org != len)
3018 len_org = 1;
3019 else
3020 len_org = 0;
3021
6440adb5
CB		 3022 /* Physical address of this Tx command's header (not MAC header!),
3023 * within command buffer array. */
bb8c093b
CH		 3024 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3025 offsetof(struct iwl4965_cmd, hdr);
b481de9c 3026
6440adb5
CB		 3027 /* Add buffer containing Tx command and MAC(!) header to TFD's
3028 * first entry */
bb8c093b 3029 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 3030
3031 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
bb8c093b 3032 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
b481de9c 3033
6440adb5
CB		 3034 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3035 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 3036 len = skb->len - hdr_len;
3037 if (len) {
3038 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3039 len, PCI_DMA_TODEVICE);
bb8c093b 3040 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 3041 }
3042
6440adb5 3043 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 3044 if (len_org)
3045 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3046
6440adb5 3047 /* Total # bytes to be transmitted */
b481de9c
ZY		 3048 len = (u16)skb->len;
3049 out_cmd->cmd.tx.len = cpu_to_le16(len);
3050
3051 /* TODO need this for burst mode later on */
bb8c093b 3052 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 3053
3054 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 3055 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c
ZY		 3056
3057 iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
3058 hdr, hdr_len, ctl, NULL);
3059
3060 if (!ieee80211_get_morefrag(hdr)) {
3061 txq->need_update = 1;
3062 if (qc) {
3063 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3064 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3065 }
3066 } else {
3067 wait_write_ptr = 1;
3068 txq->need_update = 0;
3069 }
3070
bb8c093b 3071 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 3072 sizeof(out_cmd->cmd.tx));
3073
bb8c093b 3074 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 3075 ieee80211_get_hdrlen(fc));
3076
6440adb5 3077 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY		 3078 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3079
6440adb5 3080 /* Tell device the write index *just past* this latest filled TFD */
bb8c093b
CH		 3081 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3082 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 3083 spin_unlock_irqrestore(&priv->lock, flags);
3084
3085 if (rc)
3086 return rc;
3087
bb8c093b 3088 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 3089 && priv->mac80211_registered) {
3090 if (wait_write_ptr) {
3091 spin_lock_irqsave(&priv->lock, flags);
3092 txq->need_update = 1;
bb8c093b 3093 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 3094 spin_unlock_irqrestore(&priv->lock, flags);
3095 }
3096
3097 ieee80211_stop_queue(priv->hw, ctl->queue);
3098 }
3099
3100 return 0;
3101
3102drop_unlock:
3103 spin_unlock_irqrestore(&priv->lock, flags);
3104drop:
3105 return -1;
3106}
3107
bb8c093b 3108static void iwl4965_set_rate(struct iwl4965_priv *priv)
b481de9c
ZY		 3109{
3110 const struct ieee80211_hw_mode *hw = NULL;
3111 struct ieee80211_rate *rate;
3112 int i;
3113
bb8c093b 3114 hw = iwl4965_get_hw_mode(priv, priv->phymode);
c4ba9621
SA		 3115 if (!hw) {
3116 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3117 return;
3118 }
b481de9c
ZY		 3119
3120 priv->active_rate = 0;
3121 priv->active_rate_basic = 0;
3122
3123 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3124 hw->mode == MODE_IEEE80211A ?
3125 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3126
3127 for (i = 0; i < hw->num_rates; i++) {
3128 rate = &(hw->rates[i]);
3129 if ((rate->val < IWL_RATE_COUNT) &&
3130 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3131 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
bb8c093b 3132 rate->val, iwl4965_rates[rate->val].plcp,
b481de9c
ZY		 3133 (rate->flags & IEEE80211_RATE_BASIC) ?
3134 "*" : "");
3135 priv->active_rate |= (1 << rate->val);
3136 if (rate->flags & IEEE80211_RATE_BASIC)
3137 priv->active_rate_basic |= (1 << rate->val);
3138 } else
3139 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
bb8c093b 3140 rate->val, iwl4965_rates[rate->val].plcp);
b481de9c
ZY		 3141 }
3142
3143 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3144 priv->active_rate, priv->active_rate_basic);
3145
3146 /*
3147 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3148 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3149 * OFDM
3150 */
3151 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3152 priv->staging_rxon.cck_basic_rates =
3153 ((priv->active_rate_basic &
3154 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3155 else
3156 priv->staging_rxon.cck_basic_rates =
3157 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3158
3159 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3160 priv->staging_rxon.ofdm_basic_rates =
3161 ((priv->active_rate_basic &
3162 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3163 IWL_FIRST_OFDM_RATE) & 0xFF;
3164 else
3165 priv->staging_rxon.ofdm_basic_rates =
3166 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3167}
3168
bb8c093b 3169static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
b481de9c
ZY		 3170{
3171 unsigned long flags;
3172
3173 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3174 return;
3175
3176 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3177 disable_radio ? "OFF" : "ON");
3178
3179 if (disable_radio) {
bb8c093b 3180 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3181 /* FIXME: This is a workaround for AP */
3182 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3183 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3184 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3185 CSR_UCODE_SW_BIT_RFKILL);
3186 spin_unlock_irqrestore(&priv->lock, flags);
bb8c093b 3187 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY		 3188 set_bit(STATUS_RF_KILL_SW, &priv->status);
3189 }
3190 return;
3191 }
3192
3193 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3194 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 3195
3196 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3197 spin_unlock_irqrestore(&priv->lock, flags);
3198
3199 /* wake up ucode */
3200 msleep(10);
3201
3202 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 3203 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3204 if (!iwl4965_grab_nic_access(priv))
3205 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3206 spin_unlock_irqrestore(&priv->lock, flags);
3207
3208 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3209 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3210 "disabled by HW switch\n");
3211 return;
3212 }
3213
3214 queue_work(priv->workqueue, &priv->restart);
3215 return;
3216}
3217
bb8c093b 3218void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
b481de9c
ZY		 3219 u32 decrypt_res, struct ieee80211_rx_status *stats)
3220{
3221 u16 fc =
3222 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3223
3224 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3225 return;
3226
3227 if (!(fc & IEEE80211_FCTL_PROTECTED))
3228 return;
3229
3230 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3231 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3232 case RX_RES_STATUS_SEC_TYPE_TKIP:
3233 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3234 RX_RES_STATUS_BAD_ICV_MIC)
3235 stats->flag |= RX_FLAG_MMIC_ERROR;
3236 case RX_RES_STATUS_SEC_TYPE_WEP:
3237 case RX_RES_STATUS_SEC_TYPE_CCMP:
3238 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3239 RX_RES_STATUS_DECRYPT_OK) {
3240 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3241 stats->flag |= RX_FLAG_DECRYPTED;
3242 }
3243 break;
3244
3245 default:
3246 break;
3247 }
3248}
3249
bb8c093b
CH		 3250void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
3251 struct iwl4965_rx_mem_buffer *rxb,
b481de9c
ZY		 3252 void *data, short len,
3253 struct ieee80211_rx_status *stats,
3254 u16 phy_flags)
3255{
bb8c093b 3256 struct iwl4965_rt_rx_hdr *iwl4965_rt;
b481de9c
ZY		 3257
3258 /* First cache any information we need before we overwrite
3259 * the information provided in the skb from the hardware */
3260 s8 signal = stats->ssi;
3261 s8 noise = 0;
3262 int rate = stats->rate;
3263 u64 tsf = stats->mactime;
3264 __le16 phy_flags_hw = cpu_to_le16(phy_flags);
3265
3266 /* We received data from the HW, so stop the watchdog */
9ee1ba47 3267 if (len > priv->hw_setting.rx_buf_size - sizeof(*iwl4965_rt)) {
b481de9c
ZY		 3268 IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
3269 return;
3270 }
3271
3272 /* copy the frame data to write after where the radiotap header goes */
bb8c093b
CH		 3273 iwl4965_rt = (void *)rxb->skb->data;
3274 memmove(iwl4965_rt->payload, data, len);
b481de9c 3275
bb8c093b
CH		 3276 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3277 iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */
b481de9c
ZY		 3278
3279 /* total header + data */
bb8c093b 3280 iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt));
b481de9c
ZY		 3281
3282 /* Set the size of the skb to the size of the frame */
bb8c093b 3283 skb_put(rxb->skb, sizeof(*iwl4965_rt) + len);
b481de9c
ZY		 3284
3285 /* Big bitfield of all the fields we provide in radiotap */
bb8c093b 3286 iwl4965_rt->rt_hdr.it_present =
b481de9c
ZY		 3287 cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3288 (1 << IEEE80211_RADIOTAP_FLAGS) |
3289 (1 << IEEE80211_RADIOTAP_RATE) |
3290 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3291 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3292 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3293 (1 << IEEE80211_RADIOTAP_ANTENNA));
3294
3295 /* Zero the flags, we'll add to them as we go */
bb8c093b 3296 iwl4965_rt->rt_flags = 0;
b481de9c 3297
bb8c093b 3298 iwl4965_rt->rt_tsf = cpu_to_le64(tsf);
b481de9c
ZY		 3299
3300 /* Convert to dBm */
bb8c093b
CH		 3301 iwl4965_rt->rt_dbmsignal = signal;
3302 iwl4965_rt->rt_dbmnoise = noise;
b481de9c
ZY		 3303
3304 /* Convert the channel frequency and set the flags */
bb8c093b 3305 iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq);
b481de9c 3306 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
bb8c093b 3307 iwl4965_rt->rt_chbitmask =
b481de9c
ZY		 3308 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
3309 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
bb8c093b 3310 iwl4965_rt->rt_chbitmask =
b481de9c
ZY		 3311 cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
3312 else /* 802.11g */
bb8c093b 3313 iwl4965_rt->rt_chbitmask =
b481de9c
ZY		 3314 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
3315
bb8c093b 3316 rate = iwl4965_rate_index_from_plcp(rate);
b481de9c 3317 if (rate == -1)
bb8c093b 3318 iwl4965_rt->rt_rate = 0;
b481de9c 3319 else
bb8c093b 3320 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
b481de9c
ZY		 3321
3322 /* antenna number */
bb8c093b 3323 iwl4965_rt->rt_antenna =
b481de9c
ZY		 3324 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3325
3326 /* set the preamble flag if we have it */
3327 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
bb8c093b 3328 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
b481de9c
ZY		 3329
3330 IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
3331
3332 stats->flag |= RX_FLAG_RADIOTAP;
3333 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3334 rxb->skb = NULL;
3335}
3336
3337
3338#define IWL_PACKET_RETRY_TIME HZ
3339
bb8c093b 3340int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 3341{
3342 u16 sc = le16_to_cpu(header->seq_ctrl);
3343 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3344 u16 frag = sc & IEEE80211_SCTL_FRAG;
3345 u16 *last_seq, *last_frag;
3346 unsigned long *last_time;
3347
3348 switch (priv->iw_mode) {
3349 case IEEE80211_IF_TYPE_IBSS:{
3350 struct list_head *p;
bb8c093b 3351 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 3352 u8 *mac = header->addr2;
3353 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3354
3355 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 3356 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 3357 if (!compare_ether_addr(entry->mac, mac))
3358 break;
3359 }
3360 if (p == &priv->ibss_mac_hash[index]) {
3361 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3362 if (!entry) {
bc434dd2 3363 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 3364 return 0;
3365 }
3366 memcpy(entry->mac, mac, ETH_ALEN);
3367 entry->seq_num = seq;
3368 entry->frag_num = frag;
3369 entry->packet_time = jiffies;
bc434dd2 3370 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 3371 return 0;
3372 }
3373 last_seq = &entry->seq_num;
3374 last_frag = &entry->frag_num;
3375 last_time = &entry->packet_time;
3376 break;
3377 }
3378 case IEEE80211_IF_TYPE_STA:
3379 last_seq = &priv->last_seq_num;
3380 last_frag = &priv->last_frag_num;
3381 last_time = &priv->last_packet_time;
3382 break;
3383 default:
3384 return 0;
3385 }
3386 if ((*last_seq == seq) &&
3387 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3388 if (*last_frag == frag)
3389 goto drop;
3390 if (*last_frag + 1 != frag)
3391 /* out-of-order fragment */
3392 goto drop;
3393 } else
3394 *last_seq = seq;
3395
3396 *last_frag = frag;
3397 *last_time = jiffies;
3398 return 0;
3399
3400 drop:
3401 return 1;
3402}
3403
c8b0e6e1 3404#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 3405
3406#include "iwl-spectrum.h"
3407
3408#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3409#define BEACON_TIME_MASK_HIGH 0xFF000000
3410#define TIME_UNIT 1024
3411
3412/*
3413 * extended beacon time format
3414 * time in usec will be changed into a 32-bit value in 8:24 format
3415 * the high 1 byte is the beacon counts
3416 * the lower 3 bytes is the time in usec within one beacon interval
3417 */
3418
bb8c093b 3419static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 3420{
3421 u32 quot;
3422 u32 rem;
3423 u32 interval = beacon_interval * 1024;
3424
3425 if (!interval || !usec)
3426 return 0;
3427
3428 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3429 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3430
3431 return (quot << 24) + rem;
3432}
3433
3434/* base is usually what we get from ucode with each received frame,
3435 * the same as HW timer counter counting down
3436 */
3437
bb8c093b 3438static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 3439{
3440 u32 base_low = base & BEACON_TIME_MASK_LOW;
3441 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3442 u32 interval = beacon_interval * TIME_UNIT;
3443 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3444 (addon & BEACON_TIME_MASK_HIGH);
3445
3446 if (base_low > addon_low)
3447 res += base_low - addon_low;
3448 else if (base_low < addon_low) {
3449 res += interval + base_low - addon_low;
3450 res += (1 << 24);
3451 } else
3452 res += (1 << 24);
3453
3454 return cpu_to_le32(res);
3455}
3456
bb8c093b 3457static int iwl4965_get_measurement(struct iwl4965_priv *priv,
b481de9c
ZY		 3458 struct ieee80211_measurement_params *params,
3459 u8 type)
3460{
bb8c093b
CH		 3461 struct iwl4965_spectrum_cmd spectrum;
3462 struct iwl4965_rx_packet *res;
3463 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 3464 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3465 .data = (void *)&spectrum,
3466 .meta.flags = CMD_WANT_SKB,
3467 };
3468 u32 add_time = le64_to_cpu(params->start_time);
3469 int rc;
3470 int spectrum_resp_status;
3471 int duration = le16_to_cpu(params->duration);
3472
bb8c093b 3473 if (iwl4965_is_associated(priv))
b481de9c 3474 add_time =
bb8c093b 3475 iwl4965_usecs_to_beacons(
b481de9c
ZY		 3476 le64_to_cpu(params->start_time) - priv->last_tsf,
3477 le16_to_cpu(priv->rxon_timing.beacon_interval));
3478
3479 memset(&spectrum, 0, sizeof(spectrum));
3480
3481 spectrum.channel_count = cpu_to_le16(1);
3482 spectrum.flags =
3483 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3484 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3485 cmd.len = sizeof(spectrum);
3486 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3487
bb8c093b 3488 if (iwl4965_is_associated(priv))
b481de9c 3489 spectrum.start_time =
bb8c093b 3490 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 3491 add_time,
3492 le16_to_cpu(priv->rxon_timing.beacon_interval));
3493 else
3494 spectrum.start_time = 0;
3495
3496 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3497 spectrum.channels[0].channel = params->channel;
3498 spectrum.channels[0].type = type;
3499 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3500 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3501 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3502
bb8c093b 3503 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 3504 if (rc)
3505 return rc;
3506
bb8c093b 3507 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 3508 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3509 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3510 rc = -EIO;
3511 }
3512
3513 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3514 switch (spectrum_resp_status) {
3515 case 0: /* Command will be handled */
3516 if (res->u.spectrum.id != 0xff) {
3517 IWL_DEBUG_INFO
3518 ("Replaced existing measurement: %d\n",
3519 res->u.spectrum.id);
3520 priv->measurement_status &= ~MEASUREMENT_READY;
3521 }
3522 priv->measurement_status |= MEASUREMENT_ACTIVE;
3523 rc = 0;
3524 break;
3525
3526 case 1: /* Command will not be handled */
3527 rc = -EAGAIN;
3528 break;
3529 }
3530
3531 dev_kfree_skb_any(cmd.meta.u.skb);
3532
3533 return rc;
3534}
3535#endif
3536
bb8c093b
CH		 3537static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3538 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 3539{
3540
3541 tx_sta->status.ack_signal = 0;
3542 tx_sta->status.excessive_retries = 0;
3543 tx_sta->status.queue_length = 0;
3544 tx_sta->status.queue_number = 0;
3545
3546 if (in_interrupt())
3547 ieee80211_tx_status_irqsafe(priv->hw,
3548 tx_sta->skb[0], &(tx_sta->status));
3549 else
3550 ieee80211_tx_status(priv->hw,
3551 tx_sta->skb[0], &(tx_sta->status));
3552
3553 tx_sta->skb[0] = NULL;
3554}
3555
3556/**
6440adb5 3557 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 3558 *
6440adb5
CB		 3559 * When FW advances 'R' index, all entries between old and new 'R' index
3560 * need to be reclaimed. As result, some free space forms. If there is
3561 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 3562 */
bb8c093b 3563int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
b481de9c 3564{
bb8c093b
CH		 3565 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3566 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 3567 int nfreed = 0;
3568
3569 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3570 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3571 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 3572 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 3573 return 0;
3574 }
3575
bb8c093b 3576 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
fc4b6853 3577 q->read_ptr != index;
bb8c093b 3578 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 3579 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 3580 iwl4965_txstatus_to_ieee(priv,
fc4b6853 3581 &(txq->txb[txq->q.read_ptr]));
bb8c093b 3582 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 3583 } else if (nfreed > 1) {
3584 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 3585 q->write_ptr, q->read_ptr);
b481de9c
ZY		 3586 queue_work(priv->workqueue, &priv->restart);
3587 }
3588 nfreed++;
3589 }
3590
bb8c093b 3591 if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 3592 (txq_id != IWL_CMD_QUEUE_NUM) &&
3593 priv->mac80211_registered)
3594 ieee80211_wake_queue(priv->hw, txq_id);
3595
3596
3597 return nfreed;
3598}
3599
bb8c093b 3600static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 3601{
3602 status &= TX_STATUS_MSK;
3603 return (status == TX_STATUS_SUCCESS)
3604 || (status == TX_STATUS_DIRECT_DONE);
3605}
3606
3607/******************************************************************************
3608 *
3609 * Generic RX handler implementations
3610 *
3611 ******************************************************************************/
c8b0e6e1
CH		 3612#ifdef CONFIG_IWL4965_HT
3613#ifdef CONFIG_IWL4965_HT_AGG
b481de9c 3614
bb8c093b 3615static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
b481de9c
ZY		 3616 struct ieee80211_hdr *hdr)
3617{
3618 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3619 return IWL_AP_ID;
3620 else {
3621 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 3622 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY		 3623 }
3624}
3625
bb8c093b
CH		 3626static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3627 struct iwl4965_priv *priv, int txq_id, int idx)
b481de9c
ZY		 3628{
3629 if (priv->txq[txq_id].txb[idx].skb[0])
3630 return (struct ieee80211_hdr *)priv->txq[txq_id].
3631 txb[idx].skb[0]->data;
3632 return NULL;
3633}
3634
bb8c093b 3635static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 3636{
3637 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3638 tx_resp->frame_count);
3639 return le32_to_cpu(*scd_ssn) & MAX_SN;
3640
3641}
6440adb5
CB		 3642
3643/**
3644 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3645 */
bb8c093b
CH		 3646static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3647 struct iwl4965_ht_agg *agg,
3648 struct iwl4965_tx_resp *tx_resp,
b481de9c
ZY		 3649 u16 start_idx)
3650{
3651 u32 status;
3652 __le32 *frame_status = &tx_resp->status;
3653 struct ieee80211_tx_status *tx_status = NULL;
3654 struct ieee80211_hdr *hdr = NULL;
3655 int i, sh;
3656 int txq_id, idx;
3657 u16 seq;
3658
3659 if (agg->wait_for_ba)
6440adb5 3660 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 3661
3662 agg->frame_count = tx_resp->frame_count;
3663 agg->start_idx = start_idx;
3664 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3665 agg->bitmap0 = agg->bitmap1 = 0;
3666
6440adb5 3667 /* # frames attempted by Tx command */
b481de9c 3668 if (agg->frame_count == 1) {
6440adb5 3669 /* Only one frame was attempted; no block-ack will arrive */
bb8c093b 3670 struct iwl4965_tx_queue *txq ;
b481de9c
ZY		 3671 status = le32_to_cpu(frame_status[0]);
3672
3673 txq_id = agg->txq_id;
3674 txq = &priv->txq[txq_id];
3675 /* FIXME: code repetition */
3676 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
3677 agg->frame_count, agg->start_idx);
3678
fc4b6853 3679 tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
b481de9c
ZY		 3680 tx_status->retry_count = tx_resp->failure_frame;
3681 tx_status->queue_number = status & 0xff;
3682 tx_status->queue_length = tx_resp->bt_kill_count;
3683 tx_status->queue_length |= tx_resp->failure_rts;
3684
bb8c093b 3685 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c
ZY		 3686 IEEE80211_TX_STATUS_ACK : 0;
3687 tx_status->control.tx_rate =
bb8c093b 3688 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
b481de9c
ZY		 3689 /* FIXME: code repetition end */
3690
3691 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3692 status & 0xff, tx_resp->failure_frame);
3693 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3694 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 3695
3696 agg->wait_for_ba = 0;
3697 } else {
6440adb5 3698 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 3699 u64 bitmap = 0;
3700 int start = agg->start_idx;
3701
6440adb5 3702 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 3703 for (i = 0; i < agg->frame_count; i++) {
3704 u16 sc;
3705 status = le32_to_cpu(frame_status[i]);
3706 seq = status >> 16;
3707 idx = SEQ_TO_INDEX(seq);
3708 txq_id = SEQ_TO_QUEUE(seq);
3709
3710 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3711 AGG_TX_STATE_ABORT_MSK))
3712 continue;
3713
3714 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3715 agg->frame_count, txq_id, idx);
3716
bb8c093b 3717 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 3718
3719 sc = le16_to_cpu(hdr->seq_ctrl);
3720 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3721 IWL_ERROR("BUG_ON idx doesn't match seq control"
3722 " idx=%d, seq_idx=%d, seq=%d\n",
3723 idx, SEQ_TO_SN(sc),
3724 hdr->seq_ctrl);
3725 return -1;
3726 }
3727
3728 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3729 i, idx, SEQ_TO_SN(sc));
3730
3731 sh = idx - start;
3732 if (sh > 64) {
3733 sh = (start - idx) + 0xff;
3734 bitmap = bitmap << sh;
3735 sh = 0;
3736 start = idx;
3737 } else if (sh < -64)
3738 sh = 0xff - (start - idx);
3739 else if (sh < 0) {
3740 sh = start - idx;
3741 start = idx;
3742 bitmap = bitmap << sh;
3743 sh = 0;
3744 }
3745 bitmap |= (1 << sh);
3746 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3747 start, (u32)(bitmap & 0xFFFFFFFF));
3748 }
3749
3750 agg->bitmap0 = bitmap & 0xFFFFFFFF;
3751 agg->bitmap1 = bitmap >> 32;
3752 agg->start_idx = start;
3753 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3754 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
3755 agg->frame_count, agg->start_idx,
3756 agg->bitmap0);
3757
3758 if (bitmap)
3759 agg->wait_for_ba = 1;
3760 }
3761 return 0;
3762}
3763#endif
3764#endif
3765
6440adb5
CB		 3766/**
3767 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3768 */
bb8c093b
CH		 3769static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3770 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3771{
bb8c093b 3772 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3773 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3774 int txq_id = SEQ_TO_QUEUE(sequence);
3775 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3776 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3777 struct ieee80211_tx_status *tx_status;
bb8c093b 3778 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3779 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1
CH		 3780#ifdef CONFIG_IWL4965_HT
3781#ifdef CONFIG_IWL4965_HT_AGG
b481de9c
ZY		 3782 int tid, sta_id;
3783#endif
3784#endif
3785
3786 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3787 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3788 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 3789 index, txq->q.n_bd, txq->q.write_ptr,
3790 txq->q.read_ptr);
b481de9c
ZY		 3791 return;
3792 }
3793
c8b0e6e1
CH		 3794#ifdef CONFIG_IWL4965_HT
3795#ifdef CONFIG_IWL4965_HT_AGG
b481de9c 3796 if (txq->sched_retry) {
bb8c093b 3797 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
b481de9c 3798 struct ieee80211_hdr *hdr =
bb8c093b
CH		 3799 iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3800 struct iwl4965_ht_agg *agg = NULL;
b481de9c
ZY		 3801 __le16 *qc = ieee80211_get_qos_ctrl(hdr);
3802
3803 if (qc == NULL) {
3804 IWL_ERROR("BUG_ON qc is null!!!!\n");
3805 return;
3806 }
3807
3808 tid = le16_to_cpu(*qc) & 0xf;
3809
bb8c093b 3810 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
b481de9c
ZY		 3811 if (unlikely(sta_id == IWL_INVALID_STATION)) {
3812 IWL_ERROR("Station not known for\n");
3813 return;
3814 }
3815
3816 agg = &priv->stations[sta_id].tid[tid].agg;
3817
3818 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
3819
3820 if ((tx_resp->frame_count == 1) &&
bb8c093b 3821 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 3822 /* TODO: send BAR */
3823 }
3824
fc4b6853 3825 if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
bb8c093b 3826 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 3827 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3828 "%d index %d\n", scd_ssn , index);
bb8c093b 3829 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3830 }
3831 } else {
c8b0e6e1
CH		 3832#endif /* CONFIG_IWL4965_HT_AGG */
3833#endif /* CONFIG_IWL4965_HT */
fc4b6853 3834 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 3835
3836 tx_status->retry_count = tx_resp->failure_frame;
3837 tx_status->queue_number = status;
3838 tx_status->queue_length = tx_resp->bt_kill_count;
3839 tx_status->queue_length |= tx_resp->failure_rts;
3840
3841 tx_status->flags =
bb8c093b 3842 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
b481de9c
ZY		 3843
3844 tx_status->control.tx_rate =
bb8c093b 3845 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
b481de9c
ZY		 3846
3847 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3848 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 3849 status, le32_to_cpu(tx_resp->rate_n_flags),
3850 tx_resp->failure_frame);
3851
3852 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3853 if (index != -1)
bb8c093b 3854 iwl4965_tx_queue_reclaim(priv, txq_id, index);
c8b0e6e1
CH		 3855#ifdef CONFIG_IWL4965_HT
3856#ifdef CONFIG_IWL4965_HT_AGG
b481de9c 3857 }
c8b0e6e1
CH		 3858#endif /* CONFIG_IWL4965_HT_AGG */
3859#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 3860
3861 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3862 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3863}
3864
3865
bb8c093b
CH		 3866static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3867 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3868{
bb8c093b
CH		 3869 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3870 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 3871 struct delayed_work *pwork;
3872
3873 palive = &pkt->u.alive_frame;
3874
3875 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3876 "0x%01X 0x%01X\n",
3877 palive->is_valid, palive->ver_type,
3878 palive->ver_subtype);
3879
3880 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3881 IWL_DEBUG_INFO("Initialization Alive received.\n");
3882 memcpy(&priv->card_alive_init,
3883 &pkt->u.alive_frame,
bb8c093b 3884 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 3885 pwork = &priv->init_alive_start;
3886 } else {
3887 IWL_DEBUG_INFO("Runtime Alive received.\n");
3888 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3889 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 3890 pwork = &priv->alive_start;
3891 }
3892
3893 /* We delay the ALIVE response by 5ms to
3894 * give the HW RF Kill time to activate... */
3895 if (palive->is_valid == UCODE_VALID_OK)
3896 queue_delayed_work(priv->workqueue, pwork,
3897 msecs_to_jiffies(5));
3898 else
3899 IWL_WARNING("uCode did not respond OK.\n");
3900}
3901
bb8c093b
CH		 3902static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3903 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3904{
bb8c093b 3905 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3906
3907 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3908 return;
3909}
3910
bb8c093b
CH		 3911static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3912 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3913{
bb8c093b 3914 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3915
3916 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3917 "seq 0x%04X ser 0x%08X\n",
3918 le32_to_cpu(pkt->u.err_resp.error_type),
3919 get_cmd_string(pkt->u.err_resp.cmd_id),
3920 pkt->u.err_resp.cmd_id,
3921 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3922 le32_to_cpu(pkt->u.err_resp.error_info));
3923}
3924
3925#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3926
bb8c093b 3927static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3928{
bb8c093b
CH		 3929 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3930 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3931 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 3932 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3933 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3934 rxon->channel = csa->channel;
3935 priv->staging_rxon.channel = csa->channel;
3936}
3937
bb8c093b
CH		 3938static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3939 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3940{
c8b0e6e1 3941#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 3942 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3943 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 3944
3945 if (!report->state) {
3946 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3947 "Spectrum Measure Notification: Start\n");
3948 return;
3949 }
3950
3951 memcpy(&priv->measure_report, report, sizeof(*report));
3952 priv->measurement_status |= MEASUREMENT_READY;
3953#endif
3954}
3955
bb8c093b
CH		 3956static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3957 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3958{
c8b0e6e1 3959#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 3960 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3961 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 3962 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3963 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3964#endif
3965}
3966
bb8c093b
CH		 3967static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3968 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3969{
bb8c093b 3970 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3971 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3972 "notification for %s:\n",
3973 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bb8c093b 3974 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 3975}
3976
bb8c093b 3977static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3978{
bb8c093b
CH		 3979 struct iwl4965_priv *priv =
3980 container_of(work, struct iwl4965_priv, beacon_update);
b481de9c
ZY		 3981 struct sk_buff *beacon;
3982
3983 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3984 beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
3985
3986 if (!beacon) {
3987 IWL_ERROR("update beacon failed\n");
3988 return;
3989 }
3990
3991 mutex_lock(&priv->mutex);
3992 /* new beacon skb is allocated every time; dispose previous.*/
3993 if (priv->ibss_beacon)
3994 dev_kfree_skb(priv->ibss_beacon);
3995
3996 priv->ibss_beacon = beacon;
3997 mutex_unlock(&priv->mutex);
3998
bb8c093b 3999 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 4000}
4001
bb8c093b
CH		 4002static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
4003 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4004{
c8b0e6e1 4005#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 4006 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4007 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
4008 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 4009
4010 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
4011 "tsf %d %d rate %d\n",
4012 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
4013 beacon->beacon_notify_hdr.failure_frame,
4014 le32_to_cpu(beacon->ibss_mgr_status),
4015 le32_to_cpu(beacon->high_tsf),
4016 le32_to_cpu(beacon->low_tsf), rate);
4017#endif
4018
4019 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
4020 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
4021 queue_work(priv->workqueue, &priv->beacon_update);
4022}
4023
4024/* Service response to REPLY_SCAN_CMD (0x80) */
bb8c093b
CH		 4025static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
4026 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4027{
c8b0e6e1 4028#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 4029 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4030 struct iwl4965_scanreq_notification *notif =
4031 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 4032
4033 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
4034#endif
4035}
4036
4037/* Service SCAN_START_NOTIFICATION (0x82) */
bb8c093b
CH		 4038static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
4039 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4040{
bb8c093b
CH		 4041 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4042 struct iwl4965_scanstart_notification *notif =
4043 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 4044 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
4045 IWL_DEBUG_SCAN("Scan start: "
4046 "%d [802.11%s] "
4047 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
4048 notif->channel,
4049 notif->band ? "bg" : "a",
4050 notif->tsf_high,
4051 notif->tsf_low, notif->status, notif->beacon_timer);
4052}
4053
4054/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
bb8c093b
CH		 4055static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
4056 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4057{
bb8c093b
CH		 4058 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4059 struct iwl4965_scanresults_notification *notif =
4060 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 4061
4062 IWL_DEBUG_SCAN("Scan ch.res: "
4063 "%d [802.11%s] "
4064 "(TSF: 0x%08X:%08X) - %d "
4065 "elapsed=%lu usec (%dms since last)\n",
4066 notif->channel,
4067 notif->band ? "bg" : "a",
4068 le32_to_cpu(notif->tsf_high),
4069 le32_to_cpu(notif->tsf_low),
4070 le32_to_cpu(notif->statistics[0]),
4071 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
4072 jiffies_to_msecs(elapsed_jiffies
4073 (priv->last_scan_jiffies, jiffies)));
4074
4075 priv->last_scan_jiffies = jiffies;
7878a5a4 4076 priv->next_scan_jiffies = 0;
b481de9c
ZY		 4077}
4078
4079/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
bb8c093b
CH		 4080static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4081 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4082{
bb8c093b
CH		 4083 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4084 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 4085
4086 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4087 scan_notif->scanned_channels,
4088 scan_notif->tsf_low,
4089 scan_notif->tsf_high, scan_notif->status);
4090
4091 /* The HW is no longer scanning */
4092 clear_bit(STATUS_SCAN_HW, &priv->status);
4093
4094 /* The scan completion notification came in, so kill that timer... */
4095 cancel_delayed_work(&priv->scan_check);
4096
4097 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4098 (priv->scan_bands == 2) ? "2.4" : "5.2",
4099 jiffies_to_msecs(elapsed_jiffies
4100 (priv->scan_pass_start, jiffies)));
4101
4102 /* Remove this scanned band from the list
4103 * of pending bands to scan */
4104 priv->scan_bands--;
4105
4106 /* If a request to abort was given, or the scan did not succeed
4107 * then we reset the scan state machine and terminate,
4108 * re-queuing another scan if one has been requested */
4109 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4110 IWL_DEBUG_INFO("Aborted scan completed.\n");
4111 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4112 } else {
4113 /* If there are more bands on this scan pass reschedule */
4114 if (priv->scan_bands > 0)
4115 goto reschedule;
4116 }
4117
4118 priv->last_scan_jiffies = jiffies;
7878a5a4 4119 priv->next_scan_jiffies = 0;
b481de9c
ZY		 4120 IWL_DEBUG_INFO("Setting scan to off\n");
4121
4122 clear_bit(STATUS_SCANNING, &priv->status);
4123
4124 IWL_DEBUG_INFO("Scan took %dms\n",
4125 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4126
4127 queue_work(priv->workqueue, &priv->scan_completed);
4128
4129 return;
4130
4131reschedule:
4132 priv->scan_pass_start = jiffies;
4133 queue_work(priv->workqueue, &priv->request_scan);
4134}
4135
4136/* Handle notification from uCode that card's power state is changing
4137 * due to software, hardware, or critical temperature RFKILL */
bb8c093b
CH		 4138static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4139 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4140{
bb8c093b 4141 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 4142 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4143 unsigned long status = priv->status;
4144
4145 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4146 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4147 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4148
4149 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4150 RF_CARD_DISABLED)) {
4151
bb8c093b 4152 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 4153 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4154
bb8c093b
CH		 4155 if (!iwl4965_grab_nic_access(priv)) {
4156 iwl4965_write_direct32(
b481de9c
ZY		 4157 priv, HBUS_TARG_MBX_C,
4158 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4159
bb8c093b 4160 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4161 }
4162
4163 if (!(flags & RXON_CARD_DISABLED)) {
bb8c093b 4164 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 4165 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH		 4166 if (!iwl4965_grab_nic_access(priv)) {
4167 iwl4965_write_direct32(
b481de9c
ZY		 4168 priv, HBUS_TARG_MBX_C,
4169 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4170
bb8c093b 4171 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4172 }
4173 }
4174
4175 if (flags & RF_CARD_DISABLED) {
bb8c093b 4176 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 4177 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
bb8c093b
CH		 4178 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4179 if (!iwl4965_grab_nic_access(priv))
4180 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4181 }
4182 }
4183
4184 if (flags & HW_CARD_DISABLED)
4185 set_bit(STATUS_RF_KILL_HW, &priv->status);
4186 else
4187 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4188
4189
4190 if (flags & SW_CARD_DISABLED)
4191 set_bit(STATUS_RF_KILL_SW, &priv->status);
4192 else
4193 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4194
4195 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 4196 iwl4965_scan_cancel(priv);
b481de9c
ZY		 4197
4198 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4199 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4200 (test_bit(STATUS_RF_KILL_SW, &status) !=
4201 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4202 queue_work(priv->workqueue, &priv->rf_kill);
4203 else
4204 wake_up_interruptible(&priv->wait_command_queue);
4205}
4206
4207/**
bb8c093b 4208 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 4209 *
4210 * Setup the RX handlers for each of the reply types sent from the uCode
4211 * to the host.
4212 *
4213 * This function chains into the hardware specific files for them to setup
4214 * any hardware specific handlers as well.
4215 */
bb8c093b 4216static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
b481de9c 4217{
bb8c093b
CH		 4218 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4219 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4220 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4221 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 4222 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 4223 iwl4965_rx_spectrum_measure_notif;
4224 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 4225 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 4226 iwl4965_rx_pm_debug_statistics_notif;
4227 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 4228
9fbab516
BC		 4229 /*
4230 * The same handler is used for both the REPLY to a discrete
4231 * statistics request from the host as well as for the periodic
4232 * statistics notifications (after received beacons) from the uCode.
b481de9c 4233 */
bb8c093b
CH		 4234 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4235 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 4236
bb8c093b
CH		 4237 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4238 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 4239 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 4240 iwl4965_rx_scan_results_notif;
b481de9c 4241 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 4242 iwl4965_rx_scan_complete_notif;
4243 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4244 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 4245
9fbab516 4246 /* Set up hardware specific Rx handlers */
bb8c093b 4247 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 4248}
4249
4250/**
bb8c093b 4251 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 4252 * @rxb: Rx buffer to reclaim
4253 *
4254 * If an Rx buffer has an async callback associated with it the callback
4255 * will be executed. The attached skb (if present) will only be freed
4256 * if the callback returns 1
4257 */
bb8c093b
CH		 4258static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4259 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4260{
bb8c093b 4261 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4262 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4263 int txq_id = SEQ_TO_QUEUE(sequence);
4264 int index = SEQ_TO_INDEX(sequence);
4265 int huge = sequence & SEQ_HUGE_FRAME;
4266 int cmd_index;
bb8c093b 4267 struct iwl4965_cmd *cmd;
b481de9c
ZY		 4268
4269 /* If a Tx command is being handled and it isn't in the actual
4270 * command queue then there a command routing bug has been introduced
4271 * in the queue management code. */
4272 if (txq_id != IWL_CMD_QUEUE_NUM)
4273 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4274 txq_id, pkt->hdr.cmd);
4275 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4276
4277 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4278 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4279
4280 /* Input error checking is done when commands are added to queue. */
4281 if (cmd->meta.flags & CMD_WANT_SKB) {
4282 cmd->meta.source->u.skb = rxb->skb;
4283 rxb->skb = NULL;
4284 } else if (cmd->meta.u.callback &&
4285 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4286 rxb->skb = NULL;
4287
bb8c093b 4288 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 4289
4290 if (!(cmd->meta.flags & CMD_ASYNC)) {
4291 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4292 wake_up_interruptible(&priv->wait_command_queue);
4293 }
4294}
4295
4296/************************** RX-FUNCTIONS ****************************/
4297/*
4298 * Rx theory of operation
4299 *
9fbab516
BC		 4300 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4301 * each of which point to Receive Buffers to be filled by 4965. These get
4302 * used not only for Rx frames, but for any command response or notification
4303 * from the 4965. The driver and 4965 manage the Rx buffers by means
4304 * of indexes into the circular buffer.
b481de9c
ZY		 4305 *
4306 * Rx Queue Indexes
4307 * The host/firmware share two index registers for managing the Rx buffers.
4308 *
4309 * The READ index maps to the first position that the firmware may be writing
4310 * to -- the driver can read up to (but not including) this position and get
4311 * good data.
4312 * The READ index is managed by the firmware once the card is enabled.
4313 *
4314 * The WRITE index maps to the last position the driver has read from -- the
4315 * position preceding WRITE is the last slot the firmware can place a packet.
4316 *
4317 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4318 * WRITE = READ.
4319 *
9fbab516 4320 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 4321 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4322 *
9fbab516 4323 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 4324 * and fire the RX interrupt. The driver can then query the READ index and
4325 * process as many packets as possible, moving the WRITE index forward as it
4326 * resets the Rx queue buffers with new memory.
4327 *
4328 * The management in the driver is as follows:
4329 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4330 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 4331 * to replenish the iwl->rxq->rx_free.
bb8c093b 4332 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 4333 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4334 * 'processed' and 'read' driver indexes as well)
4335 * + A received packet is processed and handed to the kernel network stack,
4336 * detached from the iwl->rxq. The driver 'processed' index is updated.
4337 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4338 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4339 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4340 * were enough free buffers and RX_STALLED is set it is cleared.
4341 *
4342 *
4343 * Driver sequence:
4344 *
9fbab516
BC		 4345 * iwl4965_rx_queue_alloc() Allocates rx_free
4346 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 4347 * iwl4965_rx_queue_restock
9fbab516 4348 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 4349 * queue, updates firmware pointers, and updates
4350 * the WRITE index. If insufficient rx_free buffers
bb8c093b 4351 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 4352 *
4353 * -- enable interrupts --
9fbab516 4354 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 4355 * READ INDEX, detaching the SKB from the pool.
4356 * Moves the packet buffer from queue to rx_used.
bb8c093b 4357 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 4358 * slots.
4359 * ...
4360 *
4361 */
4362
4363/**
bb8c093b 4364 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 4365 */
bb8c093b 4366static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 4367{
4368 int s = q->read - q->write;
4369 if (s <= 0)
4370 s += RX_QUEUE_SIZE;
4371 /* keep some buffer to not confuse full and empty queue */
4372 s -= 2;
4373 if (s < 0)
4374 s = 0;
4375 return s;
4376}
4377
4378/**
bb8c093b 4379 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 4380 */
bb8c093b 4381int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 4382{
4383 u32 reg = 0;
4384 int rc = 0;
4385 unsigned long flags;
4386
4387 spin_lock_irqsave(&q->lock, flags);
4388
4389 if (q->need_update == 0)
4390 goto exit_unlock;
4391
6440adb5 4392 /* If power-saving is in use, make sure device is awake */
b481de9c 4393 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
bb8c093b 4394 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4395
4396 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
bb8c093b 4397 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4398 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4399 goto exit_unlock;
4400 }
4401
bb8c093b 4402 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4403 if (rc)
4404 goto exit_unlock;
4405
6440adb5 4406 /* Device expects a multiple of 8 */
bb8c093b 4407 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 4408 q->write & ~0x7);
bb8c093b 4409 iwl4965_release_nic_access(priv);
6440adb5
CB		 4410
4411 /* Else device is assumed to be awake */
b481de9c 4412 } else
6440adb5 4413 /* Device expects a multiple of 8 */
bb8c093b 4414 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 4415
4416
4417 q->need_update = 0;
4418
4419 exit_unlock:
4420 spin_unlock_irqrestore(&q->lock, flags);
4421 return rc;
4422}
4423
4424/**
9fbab516 4425 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 4426 */
bb8c093b 4427static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
b481de9c
ZY		 4428 dma_addr_t dma_addr)
4429{
4430 return cpu_to_le32((u32)(dma_addr >> 8));
4431}
4432
4433
4434/**
bb8c093b 4435 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 4436 *
9fbab516 4437 * If there are slots in the RX queue that need to be restocked,
b481de9c 4438 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 4439 * as we can, pulling from rx_free.
b481de9c
ZY		 4440 *
4441 * This moves the 'write' index forward to catch up with 'processed', and
4442 * also updates the memory address in the firmware to reference the new
4443 * target buffer.
4444 */
bb8c093b 4445static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
b481de9c 4446{
bb8c093b 4447 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4448 struct list_head *element;
bb8c093b 4449 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4450 unsigned long flags;
4451 int write, rc;
4452
4453 spin_lock_irqsave(&rxq->lock, flags);
4454 write = rxq->write & ~0x7;
bb8c093b 4455 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 4456 /* Get next free Rx buffer, remove from free list */
b481de9c 4457 element = rxq->rx_free.next;
bb8c093b 4458 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 4459 list_del(element);
6440adb5
CB		 4460
4461 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 4462 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 4463 rxq->queue[rxq->write] = rxb;
4464 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4465 rxq->free_count--;
4466 }
4467 spin_unlock_irqrestore(&rxq->lock, flags);
4468 /* If the pre-allocated buffer pool is dropping low, schedule to
4469 * refill it */
4470 if (rxq->free_count <= RX_LOW_WATERMARK)
4471 queue_work(priv->workqueue, &priv->rx_replenish);
4472
4473
6440adb5
CB		 4474 /* If we've added more space for the firmware to place data, tell it.
4475 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 4476 if ((write != (rxq->write & ~0x7))
4477 || (abs(rxq->write - rxq->read) > 7)) {
4478 spin_lock_irqsave(&rxq->lock, flags);
4479 rxq->need_update = 1;
4480 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 4481 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 4482 if (rc)
4483 return rc;
4484 }
4485
4486 return 0;
4487}
4488
4489/**
bb8c093b 4490 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 4491 *
4492 * When moving to rx_free an SKB is allocated for the slot.
4493 *
bb8c093b 4494 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 4495 * This is called as a scheduled work item (except for during initialization)
b481de9c 4496 */
5c0eef96 4497static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
b481de9c 4498{
bb8c093b 4499 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4500 struct list_head *element;
bb8c093b 4501 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4502 unsigned long flags;
4503 spin_lock_irqsave(&rxq->lock, flags);
4504 while (!list_empty(&rxq->rx_used)) {
4505 element = rxq->rx_used.next;
bb8c093b 4506 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB		 4507
4508 /* Alloc a new receive buffer */
b481de9c 4509 rxb->skb =
9ee1ba47
RR		 4510 alloc_skb(priv->hw_setting.rx_buf_size,
4511 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 4512 if (!rxb->skb) {
4513 if (net_ratelimit())
4514 printk(KERN_CRIT DRV_NAME
4515 ": Can not allocate SKB buffers\n");
4516 /* We don't reschedule replenish work here -- we will
4517 * call the restock method and if it still needs
4518 * more buffers it will schedule replenish */
4519 break;
4520 }
4521 priv->alloc_rxb_skb++;
4522 list_del(element);
6440adb5
CB		 4523
4524 /* Get physical address of RB/SKB */
b481de9c
ZY		 4525 rxb->dma_addr =
4526 pci_map_single(priv->pci_dev, rxb->skb->data,
9ee1ba47 4527 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4528 list_add_tail(&rxb->list, &rxq->rx_free);
4529 rxq->free_count++;
4530 }
4531 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 4532}
4533
4534/*
4535 * this should be called while priv->lock is locked
4536*/
4fd1f841 4537static void __iwl4965_rx_replenish(void *data)
5c0eef96
MA		 4538{
4539 struct iwl4965_priv *priv = data;
4540
4541 iwl4965_rx_allocate(priv);
4542 iwl4965_rx_queue_restock(priv);
4543}
4544
4545
4546void iwl4965_rx_replenish(void *data)
4547{
4548 struct iwl4965_priv *priv = data;
4549 unsigned long flags;
4550
4551 iwl4965_rx_allocate(priv);
b481de9c
ZY		 4552
4553 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4554 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4555 spin_unlock_irqrestore(&priv->lock, flags);
4556}
4557
4558/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 4559 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 4560 * This free routine walks the list of POOL entries and if SKB is set to
4561 * non NULL it is unmapped and freed
4562 */
bb8c093b 4563static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4564{
4565 int i;
4566 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4567 if (rxq->pool[i].skb != NULL) {
4568 pci_unmap_single(priv->pci_dev,
4569 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4570 priv->hw_setting.rx_buf_size,
4571 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4572 dev_kfree_skb(rxq->pool[i].skb);
4573 }
4574 }
4575
4576 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4577 rxq->dma_addr);
4578 rxq->bd = NULL;
4579}
4580
bb8c093b 4581int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
b481de9c 4582{
bb8c093b 4583 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4584 struct pci_dev *dev = priv->pci_dev;
4585 int i;
4586
4587 spin_lock_init(&rxq->lock);
4588 INIT_LIST_HEAD(&rxq->rx_free);
4589 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB		 4590
4591 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 4592 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4593 if (!rxq->bd)
4594 return -ENOMEM;
6440adb5 4595
b481de9c
ZY		 4596 /* Fill the rx_used queue with _all_ of the Rx buffers */
4597 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4598 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 4599
b481de9c
ZY		 4600 /* Set us so that we have processed and used all buffers, but have
4601 * not restocked the Rx queue with fresh buffers */
4602 rxq->read = rxq->write = 0;
4603 rxq->free_count = 0;
4604 rxq->need_update = 0;
4605 return 0;
4606}
4607
bb8c093b 4608void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4609{
4610 unsigned long flags;
4611 int i;
4612 spin_lock_irqsave(&rxq->lock, flags);
4613 INIT_LIST_HEAD(&rxq->rx_free);
4614 INIT_LIST_HEAD(&rxq->rx_used);
4615 /* Fill the rx_used queue with _all_ of the Rx buffers */
4616 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4617 /* In the reset function, these buffers may have been allocated
4618 * to an SKB, so we need to unmap and free potential storage */
4619 if (rxq->pool[i].skb != NULL) {
4620 pci_unmap_single(priv->pci_dev,
4621 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4622 priv->hw_setting.rx_buf_size,
4623 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4624 priv->alloc_rxb_skb--;
4625 dev_kfree_skb(rxq->pool[i].skb);
4626 rxq->pool[i].skb = NULL;
4627 }
4628 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4629 }
4630
4631 /* Set us so that we have processed and used all buffers, but have
4632 * not restocked the Rx queue with fresh buffers */
4633 rxq->read = rxq->write = 0;
4634 rxq->free_count = 0;
4635 spin_unlock_irqrestore(&rxq->lock, flags);
4636}
4637
4638/* Convert linear signal-to-noise ratio into dB */
4639static u8 ratio2dB[100] = {
4640/* 0 1 2 3 4 5 6 7 8 9 */
4641 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4642 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4643 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4644 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4645 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4646 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4647 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4648 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4649 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4650 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4651};
4652
4653/* Calculates a relative dB value from a ratio of linear
4654 * (i.e. not dB) signal levels.
4655 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4656int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4657{
c899a575
AB		 4658 /* 1000:1 or higher just report as 60 dB */
4659 if (sig_ratio >= 1000)
b481de9c
ZY		 4660 return 60;
4661
c899a575 4662 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4663 * add 20 dB to make up for divide by 10 */
c899a575 4664 if (sig_ratio >= 100)
b481de9c
ZY		 4665 return (20 + (int)ratio2dB[sig_ratio/10]);
4666
4667 /* We shouldn't see this */
4668 if (sig_ratio < 1)
4669 return 0;
4670
4671 /* Use table for ratios 1:1 - 99:1 */
4672 return (int)ratio2dB[sig_ratio];
4673}
4674
4675#define PERFECT_RSSI (-20) /* dBm */
4676#define WORST_RSSI (-95) /* dBm */
4677#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4678
4679/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4680 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4681 * about formulas used below. */
bb8c093b 4682int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 4683{
4684 int sig_qual;
4685 int degradation = PERFECT_RSSI - rssi_dbm;
4686
4687 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4688 * as indicator; formula is (signal dbm - noise dbm).
4689 * SNR at or above 40 is a great signal (100%).
4690 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4691 * Weakest usable signal is usually 10 - 15 dB SNR. */
4692 if (noise_dbm) {
4693 if (rssi_dbm - noise_dbm >= 40)
4694 return 100;
4695 else if (rssi_dbm < noise_dbm)
4696 return 0;
4697 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4698
4699 /* Else use just the signal level.
4700 * This formula is a least squares fit of data points collected and
4701 * compared with a reference system that had a percentage (%) display
4702 * for signal quality. */
4703 } else
4704 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4705 (15 * RSSI_RANGE + 62 * degradation)) /
4706 (RSSI_RANGE * RSSI_RANGE);
4707
4708 if (sig_qual > 100)
4709 sig_qual = 100;
4710 else if (sig_qual < 1)
4711 sig_qual = 0;
4712
4713 return sig_qual;
4714}
4715
4716/**
9fbab516 4717 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 4718 *
4719 * Uses the priv->rx_handlers callback function array to invoke
4720 * the appropriate handlers, including command responses,
4721 * frame-received notifications, and other notifications.
4722 */
bb8c093b 4723static void iwl4965_rx_handle(struct iwl4965_priv *priv)
b481de9c 4724{
bb8c093b
CH		 4725 struct iwl4965_rx_mem_buffer *rxb;
4726 struct iwl4965_rx_packet *pkt;
4727 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4728 u32 r, i;
4729 int reclaim;
4730 unsigned long flags;
5c0eef96
MA		 4731 u8 fill_rx = 0;
4732 u32 count = 0;
b481de9c 4733
6440adb5
CB		 4734 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4735 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4736 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 4737 i = rxq->read;
4738
4739 /* Rx interrupt, but nothing sent from uCode */
4740 if (i == r)
4741 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4742
5c0eef96
MA		 4743 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4744 fill_rx = 1;
4745
b481de9c
ZY		 4746 while (i != r) {
4747 rxb = rxq->queue[i];
4748
9fbab516 4749 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 4750 * then a bug has been introduced in the queue refilling
4751 * routines -- catch it here */
4752 BUG_ON(rxb == NULL);
4753
4754 rxq->queue[i] = NULL;
4755
4756 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
9ee1ba47 4757 priv->hw_setting.rx_buf_size,
b481de9c 4758 PCI_DMA_FROMDEVICE);
bb8c093b 4759 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4760
4761 /* Reclaim a command buffer only if this packet is a response
4762 * to a (driver-originated) command.
4763 * If the packet (e.g. Rx frame) originated from uCode,
4764 * there is no command buffer to reclaim.
4765 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4766 * but apparently a few don't get set; catch them here. */
4767 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4768 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4769 (pkt->hdr.cmd != REPLY_4965_RX) &&
cfe01709 4770 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 4771 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4772 (pkt->hdr.cmd != REPLY_TX);
4773
4774 /* Based on type of command response or notification,
4775 * handle those that need handling via function in
bb8c093b 4776 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 4777 if (priv->rx_handlers[pkt->hdr.cmd]) {
4778 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4779 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4780 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4781 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4782 } else {
4783 /* No handling needed */
4784 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4785 "r %d i %d No handler needed for %s, 0x%02x\n",
4786 r, i, get_cmd_string(pkt->hdr.cmd),
4787 pkt->hdr.cmd);
4788 }
4789
4790 if (reclaim) {
9fbab516
BC		 4791 /* Invoke any callbacks, transfer the skb to caller, and
4792 * fire off the (possibly) blocking iwl4965_send_cmd()
b481de9c
ZY		 4793 * as we reclaim the driver command queue */
4794 if (rxb && rxb->skb)
bb8c093b 4795 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 4796 else
4797 IWL_WARNING("Claim null rxb?\n");
4798 }
4799
4800 /* For now we just don't re-use anything. We can tweak this
4801 * later to try and re-use notification packets and SKBs that
4802 * fail to Rx correctly */
4803 if (rxb->skb != NULL) {
4804 priv->alloc_rxb_skb--;
4805 dev_kfree_skb_any(rxb->skb);
4806 rxb->skb = NULL;
4807 }
4808
4809 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
9ee1ba47
RR		 4810 priv->hw_setting.rx_buf_size,
4811 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4812 spin_lock_irqsave(&rxq->lock, flags);
4813 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4814 spin_unlock_irqrestore(&rxq->lock, flags);
4815 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 4816 /* If there are a lot of unused frames,
4817 * restock the Rx queue so ucode wont assert. */
4818 if (fill_rx) {
4819 count++;
4820 if (count >= 8) {
4821 priv->rxq.read = i;
4822 __iwl4965_rx_replenish(priv);
4823 count = 0;
4824 }
4825 }
b481de9c
ZY		 4826 }
4827
4828 /* Backtrack one entry */
4829 priv->rxq.read = i;
bb8c093b 4830 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4831}
4832
6440adb5
CB		 4833/**
4834 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4835 */
bb8c093b
CH		 4836static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4837 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 4838{
4839 u32 reg = 0;
4840 int rc = 0;
4841 int txq_id = txq->q.id;
4842
4843 if (txq->need_update == 0)
4844 return rc;
4845
4846 /* if we're trying to save power */
4847 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4848 /* wake up nic if it's powered down ...
4849 * uCode will wake up, and interrupt us again, so next
4850 * time we'll skip this part. */
bb8c093b 4851 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4852
4853 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4854 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
bb8c093b 4855 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4856 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4857 return rc;
4858 }
4859
4860 /* restore this queue's parameters in nic hardware. */
bb8c093b 4861 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4862 if (rc)
4863 return rc;
bb8c093b 4864 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4865 txq->q.write_ptr | (txq_id << 8));
bb8c093b 4866 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4867
4868 /* else not in power-save mode, uCode will never sleep when we're
4869 * trying to tx (during RFKILL, we're not trying to tx). */
4870 } else
bb8c093b 4871 iwl4965_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4872 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 4873
4874 txq->need_update = 0;
4875
4876 return rc;
4877}
4878
c8b0e6e1 4879#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 4880static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4881{
0795af57
JP		 4882 DECLARE_MAC_BUF(mac);
4883
b481de9c 4884 IWL_DEBUG_RADIO("RX CONFIG:\n");
bb8c093b 4885 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 4886 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4887 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4888 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4889 le32_to_cpu(rxon->filter_flags));
4890 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4891 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4892 rxon->ofdm_basic_rates);
4893 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 4894 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4895 print_mac(mac, rxon->node_addr));
4896 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4897 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 4898 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4899}
4900#endif
4901
bb8c093b 4902static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
b481de9c
ZY		 4903{
4904 IWL_DEBUG_ISR("Enabling interrupts\n");
4905 set_bit(STATUS_INT_ENABLED, &priv->status);
bb8c093b 4906 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 4907}
4908
bb8c093b 4909static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
b481de9c
ZY		 4910{
4911 clear_bit(STATUS_INT_ENABLED, &priv->status);
4912
4913 /* disable interrupts from uCode/NIC to host */
bb8c093b 4914 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4915
4916 /* acknowledge/clear/reset any interrupts still pending
4917 * from uCode or flow handler (Rx/Tx DMA) */
bb8c093b
CH		 4918 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4919 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 4920 IWL_DEBUG_ISR("Disabled interrupts\n");
4921}
4922
4923static const char *desc_lookup(int i)
4924{
4925 switch (i) {
4926 case 1:
4927 return "FAIL";
4928 case 2:
4929 return "BAD_PARAM";
4930 case 3:
4931 return "BAD_CHECKSUM";
4932 case 4:
4933 return "NMI_INTERRUPT";
4934 case 5:
4935 return "SYSASSERT";
4936 case 6:
4937 return "FATAL_ERROR";
4938 }
4939
4940 return "UNKNOWN";
4941}
4942
4943#define ERROR_START_OFFSET (1 * sizeof(u32))
4944#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4945
bb8c093b 4946static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
b481de9c
ZY		 4947{
4948 u32 data2, line;
4949 u32 desc, time, count, base, data1;
4950 u32 blink1, blink2, ilink1, ilink2;
4951 int rc;
4952
4953 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4954
bb8c093b 4955 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4956 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4957 return;
4958 }
4959
bb8c093b 4960 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4961 if (rc) {
4962 IWL_WARNING("Can not read from adapter at this time.\n");
4963 return;
4964 }
4965
bb8c093b 4966 count = iwl4965_read_targ_mem(priv, base);
b481de9c
ZY		 4967
4968 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4969 IWL_ERROR("Start IWL Error Log Dump:\n");
4970 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4971 priv->status, priv->config, count);
4972 }
4973
bb8c093b
CH		 4974 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4975 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4976 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4977 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4978 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4979 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4980 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4981 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4982 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 4983
4984 IWL_ERROR("Desc Time "
4985 "data1 data2 line\n");
4986 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4987 desc_lookup(desc), desc, time, data1, data2, line);
4988 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4989 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4990 ilink1, ilink2);
4991
bb8c093b 4992 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4993}
4994
4995#define EVENT_START_OFFSET (4 * sizeof(u32))
4996
4997/**
bb8c093b 4998 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4999 *
bb8c093b 5000 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
b481de9c 5001 */
bb8c093b 5002static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
b481de9c
ZY		 5003 u32 num_events, u32 mode)
5004{
5005 u32 i;
5006 u32 base; /* SRAM byte address of event log header */
5007 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
5008 u32 ptr; /* SRAM byte address of log data */
5009 u32 ev, time, data; /* event log data */
5010
5011 if (num_events == 0)
5012 return;
5013
5014 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
5015
5016 if (mode == 0)
5017 event_size = 2 * sizeof(u32);
5018 else
5019 event_size = 3 * sizeof(u32);
5020
5021 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
5022
5023 /* "time" is actually "data" for mode 0 (no timestamp).
5024 * place event id # at far right for easier visual parsing. */
5025 for (i = 0; i < num_events; i++) {
bb8c093b 5026 ev = iwl4965_read_targ_mem(priv, ptr);
b481de9c 5027 ptr += sizeof(u32);
bb8c093b 5028 time = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 5029 ptr += sizeof(u32);
5030 if (mode == 0)
5031 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
5032 else {
bb8c093b 5033 data = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 5034 ptr += sizeof(u32);
5035 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
5036 }
5037 }
5038}
5039
bb8c093b 5040static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
b481de9c
ZY		 5041{
5042 int rc;
5043 u32 base; /* SRAM byte address of event log header */
5044 u32 capacity; /* event log capacity in # entries */
5045 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
5046 u32 num_wraps; /* # times uCode wrapped to top of log */
5047 u32 next_entry; /* index of next entry to be written by uCode */
5048 u32 size; /* # entries that we'll print */
5049
5050 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 5051 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 5052 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
5053 return;
5054 }
5055
bb8c093b 5056 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5057 if (rc) {
5058 IWL_WARNING("Can not read from adapter at this time.\n");
5059 return;
5060 }
5061
5062 /* event log header */
bb8c093b
CH		 5063 capacity = iwl4965_read_targ_mem(priv, base);
5064 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
5065 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
5066 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 5067
5068 size = num_wraps ? capacity : next_entry;
5069
5070 /* bail out if nothing in log */
5071 if (size == 0) {
583fab37 5072 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
bb8c093b 5073 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5074 return;
5075 }
5076
583fab37 5077 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 5078 size, num_wraps);
5079
5080 /* if uCode has wrapped back to top of log, start at the oldest entry,
5081 * i.e the next one that uCode would fill. */
5082 if (num_wraps)
bb8c093b 5083 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 5084 capacity - next_entry, mode);
5085
5086 /* (then/else) start at top of log */
bb8c093b 5087 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 5088
bb8c093b 5089 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5090}
5091
5092/**
bb8c093b 5093 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 5094 */
bb8c093b 5095static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
b481de9c 5096{
bb8c093b 5097 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 5098 set_bit(STATUS_FW_ERROR, &priv->status);
5099
5100 /* Cancel currently queued command. */
5101 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5102
c8b0e6e1 5103#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 5104 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5105 iwl4965_dump_nic_error_log(priv);
5106 iwl4965_dump_nic_event_log(priv);
5107 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 5108 }
5109#endif
5110
5111 wake_up_interruptible(&priv->wait_command_queue);
5112
5113 /* Keep the restart process from trying to send host
5114 * commands by clearing the INIT status bit */
5115 clear_bit(STATUS_READY, &priv->status);
5116
5117 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5118 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5119 "Restarting adapter due to uCode error.\n");
5120
bb8c093b 5121 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5122 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5123 sizeof(priv->recovery_rxon));
5124 priv->error_recovering = 1;
5125 }
5126 queue_work(priv->workqueue, &priv->restart);
5127 }
5128}
5129
bb8c093b 5130static void iwl4965_error_recovery(struct iwl4965_priv *priv)
b481de9c
ZY		 5131{
5132 unsigned long flags;
5133
5134 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5135 sizeof(priv->staging_rxon));
5136 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5137 iwl4965_commit_rxon(priv);
b481de9c 5138
bb8c093b 5139 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 5140
5141 spin_lock_irqsave(&priv->lock, flags);
5142 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5143 priv->error_recovering = 0;
5144 spin_unlock_irqrestore(&priv->lock, flags);
5145}
5146
bb8c093b 5147static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
b481de9c
ZY		 5148{
5149 u32 inta, handled = 0;
5150 u32 inta_fh;
5151 unsigned long flags;
c8b0e6e1 5152#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 5153 u32 inta_mask;
5154#endif
5155
5156 spin_lock_irqsave(&priv->lock, flags);
5157
5158 /* Ack/clear/reset pending uCode interrupts.
5159 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5160 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
bb8c093b
CH		 5161 inta = iwl4965_read32(priv, CSR_INT);
5162 iwl4965_write32(priv, CSR_INT, inta);
b481de9c
ZY		 5163
5164 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5165 * Any new interrupts that happen after this, either while we're
5166 * in this tasklet, or later, will show up in next ISR/tasklet. */
bb8c093b
CH		 5167 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5168 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 5169
c8b0e6e1 5170#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 5171 if (iwl4965_debug_level & IWL_DL_ISR) {
9fbab516
BC		 5172 /* just for debug */
5173 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 5174 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5175 inta, inta_mask, inta_fh);
5176 }
5177#endif
5178
5179 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5180 * atomic, make sure that inta covers all the interrupts that
5181 * we've discovered, even if FH interrupt came in just after
5182 * reading CSR_INT. */
5183 if (inta_fh & CSR_FH_INT_RX_MASK)
5184 inta |= CSR_INT_BIT_FH_RX;
5185 if (inta_fh & CSR_FH_INT_TX_MASK)
5186 inta |= CSR_INT_BIT_FH_TX;
5187
5188 /* Now service all interrupt bits discovered above. */
5189 if (inta & CSR_INT_BIT_HW_ERR) {
5190 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5191
5192 /* Tell the device to stop sending interrupts */
bb8c093b 5193 iwl4965_disable_interrupts(priv);
b481de9c 5194
bb8c093b 5195 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 5196
5197 handled |= CSR_INT_BIT_HW_ERR;
5198
5199 spin_unlock_irqrestore(&priv->lock, flags);
5200
5201 return;
5202 }
5203
c8b0e6e1 5204#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 5205 if (iwl4965_debug_level & (IWL_DL_ISR)) {
b481de9c
ZY		 5206 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5207 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
5208 IWL_DEBUG_ISR("Microcode started or stopped.\n");
5209
5210 /* Alive notification via Rx interrupt will do the real work */
5211 if (inta & CSR_INT_BIT_ALIVE)
5212 IWL_DEBUG_ISR("Alive interrupt\n");
5213 }
5214#endif
5215 /* Safely ignore these bits for debug checks below */
5216 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
5217
9fbab516 5218 /* HW RF KILL switch toggled */
b481de9c
ZY		 5219 if (inta & CSR_INT_BIT_RF_KILL) {
5220 int hw_rf_kill = 0;
bb8c093b 5221 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 5222 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5223 hw_rf_kill = 1;
5224
5225 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5226 "RF_KILL bit toggled to %s.\n",
5227 hw_rf_kill ? "disable radio":"enable radio");
5228
5229 /* Queue restart only if RF_KILL switch was set to "kill"
5230 * when we loaded driver, and is now set to "enable".
5231 * After we're Alive, RF_KILL gets handled by
5232 * iwl_rx_card_state_notif() */
53e49093
ZY		 5233 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5234 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 5235 queue_work(priv->workqueue, &priv->restart);
53e49093 5236 }
b481de9c
ZY		 5237
5238 handled |= CSR_INT_BIT_RF_KILL;
5239 }
5240
9fbab516 5241 /* Chip got too hot and stopped itself */
b481de9c
ZY		 5242 if (inta & CSR_INT_BIT_CT_KILL) {
5243 IWL_ERROR("Microcode CT kill error detected.\n");
5244 handled |= CSR_INT_BIT_CT_KILL;
5245 }
5246
5247 /* Error detected by uCode */
5248 if (inta & CSR_INT_BIT_SW_ERR) {
5249 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5250 inta);
bb8c093b 5251 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 5252 handled |= CSR_INT_BIT_SW_ERR;
5253 }
5254
5255 /* uCode wakes up after power-down sleep */
5256 if (inta & CSR_INT_BIT_WAKEUP) {
5257 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 5258 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5259 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5260 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5261 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5262 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5263 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5264 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 5265
5266 handled |= CSR_INT_BIT_WAKEUP;
5267 }
5268
5269 /* All uCode command responses, including Tx command responses,
5270 * Rx "responses" (frame-received notification), and other
5271 * notifications from uCode come through here*/
5272 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 5273 iwl4965_rx_handle(priv);
b481de9c
ZY		 5274 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5275 }
5276
5277 if (inta & CSR_INT_BIT_FH_TX) {
5278 IWL_DEBUG_ISR("Tx interrupt\n");
5279 handled |= CSR_INT_BIT_FH_TX;
5280 }
5281
5282 if (inta & ~handled)
5283 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5284
5285 if (inta & ~CSR_INI_SET_MASK) {
5286 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5287 inta & ~CSR_INI_SET_MASK);
5288 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5289 }
5290
5291 /* Re-enable all interrupts */
bb8c093b 5292 iwl4965_enable_interrupts(priv);
b481de9c 5293
c8b0e6e1 5294#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH		 5295 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5296 inta = iwl4965_read32(priv, CSR_INT);
5297 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5298 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 5299 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5300 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5301 }
5302#endif
5303 spin_unlock_irqrestore(&priv->lock, flags);
5304}
5305
bb8c093b 5306static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 5307{
bb8c093b 5308 struct iwl4965_priv *priv = data;
b481de9c
ZY		 5309 u32 inta, inta_mask;
5310 u32 inta_fh;
5311 if (!priv)
5312 return IRQ_NONE;
5313
5314 spin_lock(&priv->lock);
5315
5316 /* Disable (but don't clear!) interrupts here to avoid
5317 * back-to-back ISRs and sporadic interrupts from our NIC.
5318 * If we have something to service, the tasklet will re-enable ints.
5319 * If we *don't* have something, we'll re-enable before leaving here. */
bb8c093b
CH		 5320 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5321 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 5322
5323 /* Discover which interrupts are active/pending */
bb8c093b
CH		 5324 inta = iwl4965_read32(priv, CSR_INT);
5325 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 5326
5327 /* Ignore interrupt if there's nothing in NIC to service.
5328 * This may be due to IRQ shared with another device,
5329 * or due to sporadic interrupts thrown from our NIC. */
5330 if (!inta && !inta_fh) {
5331 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5332 goto none;
5333 }
5334
5335 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 5336 /* Hardware disappeared. It might have already raised
5337 * an interrupt */
b481de9c 5338 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 5339 goto unplugged;
b481de9c
ZY		 5340 }
5341
5342 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5343 inta, inta_mask, inta_fh);
5344
bb8c093b 5345 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
b481de9c 5346 tasklet_schedule(&priv->irq_tasklet);
b481de9c 5347
66fbb541
ON		 5348 unplugged:
5349 spin_unlock(&priv->lock);
b481de9c
ZY		 5350 return IRQ_HANDLED;
5351
5352 none:
5353 /* re-enable interrupts here since we don't have anything to service. */
bb8c093b 5354 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5355 spin_unlock(&priv->lock);
5356 return IRQ_NONE;
5357}
5358
5359/************************** EEPROM BANDS ****************************
5360 *
bb8c093b 5361 * The iwl4965_eeprom_band definitions below provide the mapping from the
b481de9c
ZY		 5362 * EEPROM contents to the specific channel number supported for each
5363 * band.
5364 *
bb8c093b 5365 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
b481de9c
ZY		 5366 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5367 * The specific geography and calibration information for that channel
5368 * is contained in the eeprom map itself.
5369 *
5370 * During init, we copy the eeprom information and channel map
5371 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5372 *
5373 * channel_map_24/52 provides the index in the channel_info array for a
5374 * given channel. We have to have two separate maps as there is channel
5375 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5376 * band_2
5377 *
5378 * A value of 0xff stored in the channel_map indicates that the channel
5379 * is not supported by the hardware at all.
5380 *
5381 * A value of 0xfe in the channel_map indicates that the channel is not
5382 * valid for Tx with the current hardware. This means that
5383 * while the system can tune and receive on a given channel, it may not
5384 * be able to associate or transmit any frames on that
5385 * channel. There is no corresponding channel information for that
5386 * entry.
5387 *
5388 *********************************************************************/
5389
5390/* 2.4 GHz */
bb8c093b 5391static const u8 iwl4965_eeprom_band_1[14] = {
b481de9c
ZY		 5392 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5393};
5394
5395/* 5.2 GHz bands */
9fbab516 5396static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
b481de9c
ZY		 5397 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5398};
5399
9fbab516 5400static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
b481de9c
ZY		 5401 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5402};
5403
bb8c093b 5404static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
b481de9c
ZY		 5405 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5406};
5407
bb8c093b 5408static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
b481de9c
ZY		 5409 145, 149, 153, 157, 161, 165
5410};
5411
bb8c093b 5412static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
b481de9c
ZY		 5413 1, 2, 3, 4, 5, 6, 7
5414};
5415
bb8c093b 5416static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
b481de9c
ZY		 5417 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5418};
5419
9fbab516
BC		 5420static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5421 int band,
b481de9c 5422 int *eeprom_ch_count,
bb8c093b 5423 const struct iwl4965_eeprom_channel
b481de9c
ZY		 5424 **eeprom_ch_info,
5425 const u8 **eeprom_ch_index)
5426{
5427 switch (band) {
5428 case 1: /* 2.4GHz band */
bb8c093b 5429 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
b481de9c 5430 *eeprom_ch_info = priv->eeprom.band_1_channels;
bb8c093b 5431 *eeprom_ch_index = iwl4965_eeprom_band_1;
b481de9c 5432 break;
9fbab516 5433 case 2: /* 4.9GHz band */
bb8c093b 5434 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
b481de9c 5435 *eeprom_ch_info = priv->eeprom.band_2_channels;
bb8c093b 5436 *eeprom_ch_index = iwl4965_eeprom_band_2;
b481de9c
ZY		 5437 break;
5438 case 3: /* 5.2GHz band */
bb8c093b 5439 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
b481de9c 5440 *eeprom_ch_info = priv->eeprom.band_3_channels;
bb8c093b 5441 *eeprom_ch_index = iwl4965_eeprom_band_3;
b481de9c 5442 break;
9fbab516 5443 case 4: /* 5.5GHz band */
bb8c093b 5444 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
b481de9c 5445 *eeprom_ch_info = priv->eeprom.band_4_channels;
bb8c093b 5446 *eeprom_ch_index = iwl4965_eeprom_band_4;
b481de9c 5447 break;
9fbab516 5448 case 5: /* 5.7GHz band */
bb8c093b 5449 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c 5450 *eeprom_ch_info = priv->eeprom.band_5_channels;
bb8c093b 5451 *eeprom_ch_index = iwl4965_eeprom_band_5;
b481de9c 5452 break;
9fbab516 5453 case 6: /* 2.4GHz FAT channels */
bb8c093b 5454 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
b481de9c 5455 *eeprom_ch_info = priv->eeprom.band_24_channels;
bb8c093b 5456 *eeprom_ch_index = iwl4965_eeprom_band_6;
b481de9c 5457 break;
9fbab516 5458 case 7: /* 5 GHz FAT channels */
bb8c093b 5459 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
b481de9c 5460 *eeprom_ch_info = priv->eeprom.band_52_channels;
bb8c093b 5461 *eeprom_ch_index = iwl4965_eeprom_band_7;
b481de9c
ZY		 5462 break;
5463 default:
5464 BUG();
5465 return;
5466 }
5467}
5468
6440adb5
CB		 5469/**
5470 * iwl4965_get_channel_info - Find driver's private channel info
5471 *
5472 * Based on band and channel number.
5473 */
bb8c093b 5474const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
b481de9c
ZY		 5475 int phymode, u16 channel)
5476{
5477 int i;
5478
5479 switch (phymode) {
5480 case MODE_IEEE80211A:
5481 for (i = 14; i < priv->channel_count; i++) {
5482 if (priv->channel_info[i].channel == channel)
5483 return &priv->channel_info[i];
5484 }
5485 break;
5486
5487 case MODE_IEEE80211B:
5488 case MODE_IEEE80211G:
5489 if (channel >= 1 && channel <= 14)
5490 return &priv->channel_info[channel - 1];
5491 break;
5492
5493 }
5494
5495 return NULL;
5496}
5497
5498#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5499 ? # x " " : "")
5500
6440adb5
CB		 5501/**
5502 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5503 */
bb8c093b 5504static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
b481de9c
ZY		 5505{
5506 int eeprom_ch_count = 0;
5507 const u8 *eeprom_ch_index = NULL;
bb8c093b 5508 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
b481de9c 5509 int band, ch;
bb8c093b 5510 struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5511
5512 if (priv->channel_count) {
5513 IWL_DEBUG_INFO("Channel map already initialized.\n");
5514 return 0;
5515 }
5516
5517 if (priv->eeprom.version < 0x2f) {
5518 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5519 priv->eeprom.version);
5520 return -EINVAL;
5521 }
5522
5523 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5524
5525 priv->channel_count =
bb8c093b
CH		 5526 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5527 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5528 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5529 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5530 ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c
ZY		 5531
5532 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5533
bb8c093b 5534 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
b481de9c
ZY		 5535 priv->channel_count, GFP_KERNEL);
5536 if (!priv->channel_info) {
5537 IWL_ERROR("Could not allocate channel_info\n");
5538 priv->channel_count = 0;
5539 return -ENOMEM;
5540 }
5541
5542 ch_info = priv->channel_info;
5543
5544 /* Loop through the 5 EEPROM bands adding them in order to the
5545 * channel map we maintain (that contains additional information than
5546 * what just in the EEPROM) */
5547 for (band = 1; band <= 5; band++) {
5548
bb8c093b 5549 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5550 &eeprom_ch_info, &eeprom_ch_index);
5551
5552 /* Loop through each band adding each of the channels */
5553 for (ch = 0; ch < eeprom_ch_count; ch++) {
5554 ch_info->channel = eeprom_ch_index[ch];
5555 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5556 MODE_IEEE80211A;
5557
5558 /* permanently store EEPROM's channel regulatory flags
5559 * and max power in channel info database. */
5560 ch_info->eeprom = eeprom_ch_info[ch];
5561
5562 /* Copy the run-time flags so they are there even on
5563 * invalid channels */
5564 ch_info->flags = eeprom_ch_info[ch].flags;
5565
5566 if (!(is_channel_valid(ch_info))) {
5567 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5568 "No traffic\n",
5569 ch_info->channel,
5570 ch_info->flags,
5571 is_channel_a_band(ch_info) ?
5572 "5.2" : "2.4");
5573 ch_info++;
5574 continue;
5575 }
5576
5577 /* Initialize regulatory-based run-time data */
5578 ch_info->max_power_avg = ch_info->curr_txpow =
5579 eeprom_ch_info[ch].max_power_avg;
5580 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5581 ch_info->min_power = 0;
5582
5583 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5584 " %ddBm): Ad-Hoc %ssupported\n",
5585 ch_info->channel,
5586 is_channel_a_band(ch_info) ?
5587 "5.2" : "2.4",
5588 CHECK_AND_PRINT(IBSS),
5589 CHECK_AND_PRINT(ACTIVE),
5590 CHECK_AND_PRINT(RADAR),
5591 CHECK_AND_PRINT(WIDE),
5592 CHECK_AND_PRINT(NARROW),
5593 CHECK_AND_PRINT(DFS),
5594 eeprom_ch_info[ch].flags,
5595 eeprom_ch_info[ch].max_power_avg,
5596 ((eeprom_ch_info[ch].
5597 flags & EEPROM_CHANNEL_IBSS)
5598 && !(eeprom_ch_info[ch].
5599 flags & EEPROM_CHANNEL_RADAR))
5600 ? "" : "not ");
5601
5602 /* Set the user_txpower_limit to the highest power
5603 * supported by any channel */
5604 if (eeprom_ch_info[ch].max_power_avg >
5605 priv->user_txpower_limit)
5606 priv->user_txpower_limit =
5607 eeprom_ch_info[ch].max_power_avg;
5608
5609 ch_info++;
5610 }
5611 }
5612
6440adb5 5613 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
b481de9c
ZY		 5614 for (band = 6; band <= 7; band++) {
5615 int phymode;
5616 u8 fat_extension_chan;
5617
bb8c093b 5618 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5619 &eeprom_ch_info, &eeprom_ch_index);
5620
6440adb5 5621 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
b481de9c 5622 phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
6440adb5 5623
b481de9c
ZY		 5624 /* Loop through each band adding each of the channels */
5625 for (ch = 0; ch < eeprom_ch_count; ch++) {
5626
5627 if ((band == 6) &&
5628 ((eeprom_ch_index[ch] == 5) ||
5629 (eeprom_ch_index[ch] == 6) ||
5630 (eeprom_ch_index[ch] == 7)))
5631 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5632 else
5633 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5634
6440adb5 5635 /* Set up driver's info for lower half */
b481de9c
ZY		 5636 iwl4965_set_fat_chan_info(priv, phymode,
5637 eeprom_ch_index[ch],
5638 &(eeprom_ch_info[ch]),
5639 fat_extension_chan);
5640
6440adb5 5641 /* Set up driver's info for upper half */
b481de9c
ZY		 5642 iwl4965_set_fat_chan_info(priv, phymode,
5643 (eeprom_ch_index[ch] + 4),
5644 &(eeprom_ch_info[ch]),
5645 HT_IE_EXT_CHANNEL_BELOW);
5646 }
5647 }
5648
5649 return 0;
5650}
5651
5652/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5653 * sending probe req. This should be set long enough to hear probe responses
5654 * from more than one AP. */
5655#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5656#define IWL_ACTIVE_DWELL_TIME_52 (10)
5657
5658/* For faster active scanning, scan will move to the next channel if fewer than
5659 * PLCP_QUIET_THRESH packets are heard on this channel within
5660 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5661 * time if it's a quiet channel (nothing responded to our probe, and there's
5662 * no other traffic).
5663 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5664#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5665#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5666
5667/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5668 * Must be set longer than active dwell time.
5669 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5670#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5671#define IWL_PASSIVE_DWELL_TIME_52 (10)
5672#define IWL_PASSIVE_DWELL_BASE (100)
5673#define IWL_CHANNEL_TUNE_TIME 5
5674
bb8c093b 5675static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
b481de9c
ZY		 5676{
5677 if (phymode == MODE_IEEE80211A)
5678 return IWL_ACTIVE_DWELL_TIME_52;
5679 else
5680 return IWL_ACTIVE_DWELL_TIME_24;
5681}
5682
bb8c093b 5683static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
b481de9c 5684{
bb8c093b 5685 u16 active = iwl4965_get_active_dwell_time(priv, phymode);
b481de9c
ZY		 5686 u16 passive = (phymode != MODE_IEEE80211A) ?
5687 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5688 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5689
bb8c093b 5690 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5691 /* If we're associated, we clamp the maximum passive
5692 * dwell time to be 98% of the beacon interval (minus
5693 * 2 * channel tune time) */
5694 passive = priv->beacon_int;
5695 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5696 passive = IWL_PASSIVE_DWELL_BASE;
5697 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5698 }
5699
5700 if (passive <= active)
5701 passive = active + 1;
5702
5703 return passive;
5704}
5705
bb8c093b 5706static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
b481de9c 5707 u8 is_active, u8 direct_mask,
bb8c093b 5708 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 5709{
5710 const struct ieee80211_channel *channels = NULL;
5711 const struct ieee80211_hw_mode *hw_mode;
bb8c093b 5712 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5713 u16 passive_dwell = 0;
5714 u16 active_dwell = 0;
5715 int added, i;
5716
bb8c093b 5717 hw_mode = iwl4965_get_hw_mode(priv, phymode);
b481de9c
ZY		 5718 if (!hw_mode)
5719 return 0;
5720
5721 channels = hw_mode->channels;
5722
bb8c093b
CH		 5723 active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
5724 passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
b481de9c
ZY		 5725
5726 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5727 if (channels[i].chan ==
5728 le16_to_cpu(priv->active_rxon.channel)) {
bb8c093b 5729 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5730 IWL_DEBUG_SCAN
5731 ("Skipping current channel %d\n",
5732 le16_to_cpu(priv->active_rxon.channel));
5733 continue;
5734 }
5735 } else if (priv->only_active_channel)
5736 continue;
5737
5738 scan_ch->channel = channels[i].chan;
5739
9fbab516
BC		 5740 ch_info = iwl4965_get_channel_info(priv, phymode,
5741 scan_ch->channel);
b481de9c
ZY		 5742 if (!is_channel_valid(ch_info)) {
5743 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5744 scan_ch->channel);
5745 continue;
5746 }
5747
5748 if (!is_active || is_channel_passive(ch_info) ||
5749 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5750 scan_ch->type = 0; /* passive */
5751 else
5752 scan_ch->type = 1; /* active */
5753
5754 if (scan_ch->type & 1)
5755 scan_ch->type |= (direct_mask << 1);
5756
5757 if (is_channel_narrow(ch_info))
5758 scan_ch->type |= (1 << 7);
5759
5760 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5761 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5762
9fbab516 5763 /* Set txpower levels to defaults */
b481de9c
ZY		 5764 scan_ch->tpc.dsp_atten = 110;
5765 /* scan_pwr_info->tpc.dsp_atten; */
5766
5767 /*scan_pwr_info->tpc.tx_gain; */
5768 if (phymode == MODE_IEEE80211A)
5769 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5770 else {
5771 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5772 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516
BC		 5773 * power level:
5774 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
b481de9c
ZY		 5775 */
5776 }
5777
5778 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5779 scan_ch->channel,
5780 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5781 (scan_ch->type & 1) ?
5782 active_dwell : passive_dwell);
5783
5784 scan_ch++;
5785 added++;
5786 }
5787
5788 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5789 return added;
5790}
5791
bb8c093b 5792static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
b481de9c
ZY		 5793{
5794 int i, j;
5795 for (i = 0; i < 3; i++) {
5796 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5797 for (j = 0; j < hw_mode->num_channels; j++)
5798 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5799 }
5800}
5801
bb8c093b 5802static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
b481de9c
ZY		 5803 struct ieee80211_rate *rates)
5804{
5805 int i;
5806
5807 for (i = 0; i < IWL_RATE_COUNT; i++) {
bb8c093b 5808 rates[i].rate = iwl4965_rates[i].ieee * 5;
b481de9c
ZY		 5809 rates[i].val = i; /* Rate scaling will work on indexes */
5810 rates[i].val2 = i;
5811 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5812 /* Only OFDM have the bits-per-symbol set */
5813 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5814 rates[i].flags |= IEEE80211_RATE_OFDM;
5815 else {
5816 /*
5817 * If CCK 1M then set rate flag to CCK else CCK_2
5818 * which is CCK | PREAMBLE2
5819 */
bb8c093b 5820 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
b481de9c
ZY		 5821 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5822 }
5823
5824 /* Set up which ones are basic rates... */
5825 if (IWL_BASIC_RATES_MASK & (1 << i))
5826 rates[i].flags |= IEEE80211_RATE_BASIC;
5827 }
b481de9c
ZY		 5828}
5829
5830/**
bb8c093b 5831 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 5832 */
bb8c093b 5833static int iwl4965_init_geos(struct iwl4965_priv *priv)
b481de9c 5834{
bb8c093b 5835 struct iwl4965_channel_info *ch;
b481de9c
ZY		 5836 struct ieee80211_hw_mode *modes;
5837 struct ieee80211_channel *channels;
5838 struct ieee80211_channel *geo_ch;
5839 struct ieee80211_rate *rates;
5840 int i = 0;
5841 enum {
5842 A = 0,
5843 B = 1,
5844 G = 2,
b481de9c 5845 };
326eeee8 5846 int mode_count = 3;
b481de9c
ZY		 5847
5848 if (priv->modes) {
5849 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5850 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5851 return 0;
5852 }
5853
5854 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5855 GFP_KERNEL);
5856 if (!modes)
5857 return -ENOMEM;
5858
5859 channels = kzalloc(sizeof(struct ieee80211_channel) *
5860 priv->channel_count, GFP_KERNEL);
5861 if (!channels) {
5862 kfree(modes);
5863 return -ENOMEM;
5864 }
5865
5866 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5867 GFP_KERNEL);
5868 if (!rates) {
5869 kfree(modes);
5870 kfree(channels);
5871 return -ENOMEM;
5872 }
5873
5874 /* 0 = 802.11a
5875 * 1 = 802.11b
5876 * 2 = 802.11g
5877 */
5878
5879 /* 5.2GHz channels start after the 2.4GHz channels */
5880 modes[A].mode = MODE_IEEE80211A;
bb8c093b 5881 modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
b481de9c
ZY		 5882 modes[A].rates = rates;
5883 modes[A].num_rates = 8; /* just OFDM */
5884 modes[A].rates = &rates[4];
5885 modes[A].num_channels = 0;
326eeee8
RR		 5886#ifdef CONFIG_IWL4965_HT
5887 iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
5888#endif
b481de9c
ZY		 5889
5890 modes[B].mode = MODE_IEEE80211B;
5891 modes[B].channels = channels;
5892 modes[B].rates = rates;
5893 modes[B].num_rates = 4; /* just CCK */
5894 modes[B].num_channels = 0;
5895
5896 modes[G].mode = MODE_IEEE80211G;
5897 modes[G].channels = channels;
5898 modes[G].rates = rates;
5899 modes[G].num_rates = 12; /* OFDM & CCK */
5900 modes[G].num_channels = 0;
326eeee8
RR		 5901#ifdef CONFIG_IWL4965_HT
5902 iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
5903#endif
b481de9c
ZY		 5904
5905 priv->ieee_channels = channels;
5906 priv->ieee_rates = rates;
5907
bb8c093b 5908 iwl4965_init_hw_rates(priv, rates);
b481de9c
ZY		 5909
5910 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5911 ch = &priv->channel_info[i];
5912
5913 if (!is_channel_valid(ch)) {
5914 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5915 "skipping.\n",
5916 ch->channel, is_channel_a_band(ch) ?
5917 "5.2" : "2.4");
5918 continue;
5919 }
5920
5921 if (is_channel_a_band(ch)) {
5922 geo_ch = &modes[A].channels[modes[A].num_channels++];
b481de9c
ZY		 5923 } else {
5924 geo_ch = &modes[B].channels[modes[B].num_channels++];
5925 modes[G].num_channels++;
b481de9c
ZY		 5926 }
5927
5928 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5929 geo_ch->chan = ch->channel;
5930 geo_ch->power_level = ch->max_power_avg;
5931 geo_ch->antenna_max = 0xff;
5932
5933 if (is_channel_valid(ch)) {
5934 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5935 if (ch->flags & EEPROM_CHANNEL_IBSS)
5936 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5937
5938 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5939 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5940
5941 if (ch->flags & EEPROM_CHANNEL_RADAR)
5942 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5943
5944 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5945 priv->max_channel_txpower_limit =
5946 ch->max_power_avg;
5947 }
5948
5949 geo_ch->val = geo_ch->flag;
5950 }
5951
5952 if ((modes[A].num_channels == 0) && priv->is_abg) {
5953 printk(KERN_INFO DRV_NAME
5954 ": Incorrectly detected BG card as ABG. Please send "
5955 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5956 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5957 priv->is_abg = 0;
5958 }
5959
5960 printk(KERN_INFO DRV_NAME
5961 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5962 modes[G].num_channels, modes[A].num_channels);
5963
5964 /*
5965 * NOTE: We register these in preference of order -- the
5966 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5967 * a phymode based on rates or AP capabilities but seems to
5968 * configure it purely on if the channel being configured
5969 * is supported by a mode -- and the first match is taken
5970 */
5971
5972 if (modes[G].num_channels)
5973 ieee80211_register_hwmode(priv->hw, &modes[G]);
5974 if (modes[B].num_channels)
5975 ieee80211_register_hwmode(priv->hw, &modes[B]);
5976 if (modes[A].num_channels)
5977 ieee80211_register_hwmode(priv->hw, &modes[A]);
5978
5979 priv->modes = modes;
5980 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5981
5982 return 0;
5983}
5984
5985/******************************************************************************
5986 *
5987 * uCode download functions
5988 *
5989 ******************************************************************************/
5990
bb8c093b 5991static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
b481de9c
ZY		 5992{
5993 if (priv->ucode_code.v_addr != NULL) {
5994 pci_free_consistent(priv->pci_dev,
5995 priv->ucode_code.len,
5996 priv->ucode_code.v_addr,
5997 priv->ucode_code.p_addr);
5998 priv->ucode_code.v_addr = NULL;
5999 }
6000 if (priv->ucode_data.v_addr != NULL) {
6001 pci_free_consistent(priv->pci_dev,
6002 priv->ucode_data.len,
6003 priv->ucode_data.v_addr,
6004 priv->ucode_data.p_addr);
6005 priv->ucode_data.v_addr = NULL;
6006 }
6007 if (priv->ucode_data_backup.v_addr != NULL) {
6008 pci_free_consistent(priv->pci_dev,
6009 priv->ucode_data_backup.len,
6010 priv->ucode_data_backup.v_addr,
6011 priv->ucode_data_backup.p_addr);
6012 priv->ucode_data_backup.v_addr = NULL;
6013 }
6014 if (priv->ucode_init.v_addr != NULL) {
6015 pci_free_consistent(priv->pci_dev,
6016 priv->ucode_init.len,
6017 priv->ucode_init.v_addr,
6018 priv->ucode_init.p_addr);
6019 priv->ucode_init.v_addr = NULL;
6020 }
6021 if (priv->ucode_init_data.v_addr != NULL) {
6022 pci_free_consistent(priv->pci_dev,
6023 priv->ucode_init_data.len,
6024 priv->ucode_init_data.v_addr,
6025 priv->ucode_init_data.p_addr);
6026 priv->ucode_init_data.v_addr = NULL;
6027 }
6028 if (priv->ucode_boot.v_addr != NULL) {
6029 pci_free_consistent(priv->pci_dev,
6030 priv->ucode_boot.len,
6031 priv->ucode_boot.v_addr,
6032 priv->ucode_boot.p_addr);
6033 priv->ucode_boot.v_addr = NULL;
6034 }
6035}
6036
6037/**
bb8c093b 6038 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY		 6039 * looking at all data.
6040 */
4fd1f841 6041static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
9fbab516 6042 u32 len)
b481de9c
ZY		 6043{
6044 u32 val;
6045 u32 save_len = len;
6046 int rc = 0;
6047 u32 errcnt;
6048
6049 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6050
bb8c093b 6051 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6052 if (rc)
6053 return rc;
6054
bb8c093b 6055 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY		 6056
6057 errcnt = 0;
6058 for (; len > 0; len -= sizeof(u32), image++) {
6059 /* read data comes through single port, auto-incr addr */
6060 /* NOTE: Use the debugless read so we don't flood kernel log
6061 * if IWL_DL_IO is set */
bb8c093b 6062 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 6063 if (val != le32_to_cpu(*image)) {
6064 IWL_ERROR("uCode INST section is invalid at "
6065 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6066 save_len - len, val, le32_to_cpu(*image));
6067 rc = -EIO;
6068 errcnt++;
6069 if (errcnt >= 20)
6070 break;
6071 }
6072 }
6073
bb8c093b 6074 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6075
6076 if (!errcnt)
6077 IWL_DEBUG_INFO
6078 ("ucode image in INSTRUCTION memory is good\n");
6079
6080 return rc;
6081}
6082
6083
6084/**
bb8c093b 6085 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY		 6086 * using sample data 100 bytes apart. If these sample points are good,
6087 * it's a pretty good bet that everything between them is good, too.
6088 */
bb8c093b 6089static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
b481de9c
ZY		 6090{
6091 u32 val;
6092 int rc = 0;
6093 u32 errcnt = 0;
6094 u32 i;
6095
6096 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6097
bb8c093b 6098 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6099 if (rc)
6100 return rc;
6101
6102 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
6103 /* read data comes through single port, auto-incr addr */
6104 /* NOTE: Use the debugless read so we don't flood kernel log
6105 * if IWL_DL_IO is set */
bb8c093b 6106 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 6107 i + RTC_INST_LOWER_BOUND);
bb8c093b 6108 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 6109 if (val != le32_to_cpu(*image)) {
6110#if 0 /* Enable this if you want to see details */
6111 IWL_ERROR("uCode INST section is invalid at "
6112 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6113 i, val, *image);
6114#endif
6115 rc = -EIO;
6116 errcnt++;
6117 if (errcnt >= 3)
6118 break;
6119 }
6120 }
6121
bb8c093b 6122 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6123
6124 return rc;
6125}
6126
6127
6128/**
bb8c093b 6129 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY		 6130 * and verify its contents
6131 */
bb8c093b 6132static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
b481de9c
ZY		 6133{
6134 __le32 *image;
6135 u32 len;
6136 int rc = 0;
6137
6138 /* Try bootstrap */
6139 image = (__le32 *)priv->ucode_boot.v_addr;
6140 len = priv->ucode_boot.len;
bb8c093b 6141 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 6142 if (rc == 0) {
6143 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
6144 return 0;
6145 }
6146
6147 /* Try initialize */
6148 image = (__le32 *)priv->ucode_init.v_addr;
6149 len = priv->ucode_init.len;
bb8c093b 6150 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 6151 if (rc == 0) {
6152 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6153 return 0;
6154 }
6155
6156 /* Try runtime/protocol */
6157 image = (__le32 *)priv->ucode_code.v_addr;
6158 len = priv->ucode_code.len;
bb8c093b 6159 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 6160 if (rc == 0) {
6161 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6162 return 0;
6163 }
6164
6165 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6166
9fbab516
BC		 6167 /* Since nothing seems to match, show first several data entries in
6168 * instruction SRAM, so maybe visual inspection will give a clue.
6169 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY		 6170 image = (__le32 *)priv->ucode_boot.v_addr;
6171 len = priv->ucode_boot.len;
bb8c093b 6172 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY		 6173
6174 return rc;
6175}
6176
6177
6178/* check contents of special bootstrap uCode SRAM */
bb8c093b 6179static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
b481de9c
ZY		 6180{
6181 __le32 *image = priv->ucode_boot.v_addr;
6182 u32 len = priv->ucode_boot.len;
6183 u32 reg;
6184 u32 val;
6185
6186 IWL_DEBUG_INFO("Begin verify bsm\n");
6187
6188 /* verify BSM SRAM contents */
bb8c093b 6189 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
b481de9c
ZY		 6190 for (reg = BSM_SRAM_LOWER_BOUND;
6191 reg < BSM_SRAM_LOWER_BOUND + len;
6192 reg += sizeof(u32), image ++) {
bb8c093b 6193 val = iwl4965_read_prph(priv, reg);
b481de9c
ZY		 6194 if (val != le32_to_cpu(*image)) {
6195 IWL_ERROR("BSM uCode verification failed at "
6196 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6197 BSM_SRAM_LOWER_BOUND,
6198 reg - BSM_SRAM_LOWER_BOUND, len,
6199 val, le32_to_cpu(*image));
6200 return -EIO;
6201 }
6202 }
6203
6204 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6205
6206 return 0;
6207}
6208
6209/**
bb8c093b 6210 * iwl4965_load_bsm - Load bootstrap instructions
b481de9c
ZY		 6211 *
6212 * BSM operation:
6213 *
6214 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6215 * in special SRAM that does not power down during RFKILL. When powering back
6216 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6217 * the bootstrap program into the on-board processor, and starts it.
6218 *
6219 * The bootstrap program loads (via DMA) instructions and data for a new
6220 * program from host DRAM locations indicated by the host driver in the
6221 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6222 * automatically.
6223 *
6224 * When initializing the NIC, the host driver points the BSM to the
6225 * "initialize" uCode image. This uCode sets up some internal data, then
6226 * notifies host via "initialize alive" that it is complete.
6227 *
6228 * The host then replaces the BSM_DRAM_* pointer values to point to the
6229 * normal runtime uCode instructions and a backup uCode data cache buffer
6230 * (filled initially with starting data values for the on-board processor),
6231 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6232 * which begins normal operation.
6233 *
6234 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6235 * the backup data cache in DRAM before SRAM is powered down.
6236 *
6237 * When powering back up, the BSM loads the bootstrap program. This reloads
6238 * the runtime uCode instructions and the backup data cache into SRAM,
6239 * and re-launches the runtime uCode from where it left off.
6240 */
bb8c093b 6241static int iwl4965_load_bsm(struct iwl4965_priv *priv)
b481de9c
ZY		 6242{
6243 __le32 *image = priv->ucode_boot.v_addr;
6244 u32 len = priv->ucode_boot.len;
6245 dma_addr_t pinst;
6246 dma_addr_t pdata;
6247 u32 inst_len;
6248 u32 data_len;
6249 int rc;
6250 int i;
6251 u32 done;
6252 u32 reg_offset;
6253
6254 IWL_DEBUG_INFO("Begin load bsm\n");
6255
6256 /* make sure bootstrap program is no larger than BSM's SRAM size */
6257 if (len > IWL_MAX_BSM_SIZE)
6258 return -EINVAL;
6259
6260 /* Tell bootstrap uCode where to find the "Initialize" uCode
9fbab516 6261 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
bb8c093b 6262 * NOTE: iwl4965_initialize_alive_start() will replace these values,
b481de9c
ZY		 6263 * after the "initialize" uCode has run, to point to
6264 * runtime/protocol instructions and backup data cache. */
6265 pinst = priv->ucode_init.p_addr >> 4;
6266 pdata = priv->ucode_init_data.p_addr >> 4;
6267 inst_len = priv->ucode_init.len;
6268 data_len = priv->ucode_init_data.len;
6269
bb8c093b 6270 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6271 if (rc)
6272 return rc;
6273
bb8c093b
CH		 6274 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6275 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6276 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6277 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
b481de9c
ZY		 6278
6279 /* Fill BSM memory with bootstrap instructions */
6280 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6281 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6282 reg_offset += sizeof(u32), image++)
bb8c093b 6283 _iwl4965_write_prph(priv, reg_offset,
b481de9c
ZY		 6284 le32_to_cpu(*image));
6285
bb8c093b 6286 rc = iwl4965_verify_bsm(priv);
b481de9c 6287 if (rc) {
bb8c093b 6288 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6289 return rc;
6290 }
6291
6292 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
bb8c093b
CH		 6293 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6294 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
b481de9c 6295 RTC_INST_LOWER_BOUND);
bb8c093b 6296 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
b481de9c
ZY		 6297
6298 /* Load bootstrap code into instruction SRAM now,
6299 * to prepare to load "initialize" uCode */
bb8c093b 6300 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 6301 BSM_WR_CTRL_REG_BIT_START);
6302
6303 /* Wait for load of bootstrap uCode to finish */
6304 for (i = 0; i < 100; i++) {
bb8c093b 6305 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
b481de9c
ZY		 6306 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6307 break;
6308 udelay(10);
6309 }
6310 if (i < 100)
6311 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6312 else {
6313 IWL_ERROR("BSM write did not complete!\n");
6314 return -EIO;
6315 }
6316
6317 /* Enable future boot loads whenever power management unit triggers it
6318 * (e.g. when powering back up after power-save shutdown) */
bb8c093b 6319 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 6320 BSM_WR_CTRL_REG_BIT_START_EN);
6321
bb8c093b 6322 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6323
6324 return 0;
6325}
6326
bb8c093b 6327static void iwl4965_nic_start(struct iwl4965_priv *priv)
b481de9c
ZY		 6328{
6329 /* Remove all resets to allow NIC to operate */
bb8c093b 6330 iwl4965_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 6331}
6332
90e759d1
TW		 6333static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
6334{
6335 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
6336 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
6337}
6338
b481de9c 6339/**
bb8c093b 6340 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 6341 *
6342 * Copy into buffers for card to fetch via bus-mastering
6343 */
bb8c093b 6344static int iwl4965_read_ucode(struct iwl4965_priv *priv)
b481de9c 6345{
bb8c093b 6346 struct iwl4965_ucode *ucode;
90e759d1 6347 int ret;
b481de9c
ZY		 6348 const struct firmware *ucode_raw;
6349 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6350 u8 *src;
6351 size_t len;
6352 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6353
6354 /* Ask kernel firmware_class module to get the boot firmware off disk.
6355 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 6356 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6357 if (ret < 0) {
6358 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6359 name, ret);
b481de9c
ZY		 6360 goto error;
6361 }
6362
6363 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6364 name, ucode_raw->size);
6365
6366 /* Make sure that we got at least our header! */
6367 if (ucode_raw->size < sizeof(*ucode)) {
6368 IWL_ERROR("File size way too small!\n");
90e759d1 6369 ret = -EINVAL;
b481de9c
ZY		 6370 goto err_release;
6371 }
6372
6373 /* Data from ucode file: header followed by uCode images */
6374 ucode = (void *)ucode_raw->data;
6375
6376 ver = le32_to_cpu(ucode->ver);
6377 inst_size = le32_to_cpu(ucode->inst_size);
6378 data_size = le32_to_cpu(ucode->data_size);
6379 init_size = le32_to_cpu(ucode->init_size);
6380 init_data_size = le32_to_cpu(ucode->init_data_size);
6381 boot_size = le32_to_cpu(ucode->boot_size);
6382
6383 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6384 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6385 inst_size);
6386 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6387 data_size);
6388 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6389 init_size);
6390 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6391 init_data_size);
6392 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6393 boot_size);
6394
6395 /* Verify size of file vs. image size info in file's header */
6396 if (ucode_raw->size < sizeof(*ucode) +
6397 inst_size + data_size + init_size +
6398 init_data_size + boot_size) {
6399
6400 IWL_DEBUG_INFO("uCode file size %d too small\n",
6401 (int)ucode_raw->size);
90e759d1 6402 ret = -EINVAL;
b481de9c
ZY		 6403 goto err_release;
6404 }
6405
6406 /* Verify that uCode images will fit in card's SRAM */
6407 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW		 6408 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6409 inst_size);
6410 ret = -EINVAL;
b481de9c
ZY		 6411 goto err_release;
6412 }
6413
6414 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW		 6415 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6416 data_size);
6417 ret = -EINVAL;
b481de9c
ZY		 6418 goto err_release;
6419 }
6420 if (init_size > IWL_MAX_INST_SIZE) {
6421 IWL_DEBUG_INFO
90e759d1
TW		 6422 ("uCode init instr len %d too large to fit in\n",
6423 init_size);
6424 ret = -EINVAL;
b481de9c
ZY		 6425 goto err_release;
6426 }
6427 if (init_data_size > IWL_MAX_DATA_SIZE) {
6428 IWL_DEBUG_INFO
90e759d1
TW		 6429 ("uCode init data len %d too large to fit in\n",
6430 init_data_size);
6431 ret = -EINVAL;
b481de9c
ZY		 6432 goto err_release;
6433 }
6434 if (boot_size > IWL_MAX_BSM_SIZE) {
6435 IWL_DEBUG_INFO
90e759d1
TW		 6436 ("uCode boot instr len %d too large to fit in\n",
6437 boot_size);
6438 ret = -EINVAL;
b481de9c
ZY		 6439 goto err_release;
6440 }
6441
6442 /* Allocate ucode buffers for card's bus-master loading ... */
6443
6444 /* Runtime instructions and 2 copies of data:
6445 * 1) unmodified from disk
6446 * 2) backup cache for save/restore during power-downs */
6447 priv->ucode_code.len = inst_size;
90e759d1 6448 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 6449
6450 priv->ucode_data.len = data_size;
90e759d1 6451 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 6452
6453 priv->ucode_data_backup.len = data_size;
90e759d1 6454 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 6455
6456 /* Initialization instructions and data */
90e759d1
TW		 6457 if (init_size && init_data_size) {
6458 priv->ucode_init.len = init_size;
6459 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6460
6461 priv->ucode_init_data.len = init_data_size;
6462 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6463
6464 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6465 goto err_pci_alloc;
6466 }
b481de9c
ZY		 6467
6468 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 6469 if (boot_size) {
6470 priv->ucode_boot.len = boot_size;
6471 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 6472
90e759d1
TW		 6473 if (!priv->ucode_boot.v_addr)
6474 goto err_pci_alloc;
6475 }
b481de9c
ZY		 6476
6477 /* Copy images into buffers for card's bus-master reads ... */
6478
6479 /* Runtime instructions (first block of data in file) */
6480 src = &ucode->data[0];
6481 len = priv->ucode_code.len;
90e759d1 6482 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 6483 memcpy(priv->ucode_code.v_addr, src, len);
6484 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6485 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6486
6487 /* Runtime data (2nd block)
bb8c093b 6488 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 6489 src = &ucode->data[inst_size];
6490 len = priv->ucode_data.len;
90e759d1 6491 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 6492 memcpy(priv->ucode_data.v_addr, src, len);
6493 memcpy(priv->ucode_data_backup.v_addr, src, len);
6494
6495 /* Initialization instructions (3rd block) */
6496 if (init_size) {
6497 src = &ucode->data[inst_size + data_size];
6498 len = priv->ucode_init.len;
90e759d1
TW		 6499 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6500 len);
b481de9c
ZY		 6501 memcpy(priv->ucode_init.v_addr, src, len);
6502 }
6503
6504 /* Initialization data (4th block) */
6505 if (init_data_size) {
6506 src = &ucode->data[inst_size + data_size + init_size];
6507 len = priv->ucode_init_data.len;
90e759d1
TW		 6508 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6509 len);
b481de9c
ZY		 6510 memcpy(priv->ucode_init_data.v_addr, src, len);
6511 }
6512
6513 /* Bootstrap instructions (5th block) */
6514 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6515 len = priv->ucode_boot.len;
90e759d1 6516 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 6517 memcpy(priv->ucode_boot.v_addr, src, len);
6518
6519 /* We have our copies now, allow OS release its copies */
6520 release_firmware(ucode_raw);
6521 return 0;
6522
6523 err_pci_alloc:
6524 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 6525 ret = -ENOMEM;
bb8c093b 6526 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 6527
6528 err_release:
6529 release_firmware(ucode_raw);
6530
6531 error:
90e759d1 6532 return ret;
b481de9c
ZY		 6533}
6534
6535
6536/**
bb8c093b 6537 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 6538 *
6539 * Tell initialization uCode where to find runtime uCode.
6540 *
6541 * BSM registers initially contain pointers to initialization uCode.
6542 * We need to replace them to load runtime uCode inst and data,
6543 * and to save runtime data when powering down.
6544 */
bb8c093b 6545static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
b481de9c
ZY		 6546{
6547 dma_addr_t pinst;
6548 dma_addr_t pdata;
6549 int rc = 0;
6550 unsigned long flags;
6551
6552 /* bits 35:4 for 4965 */
6553 pinst = priv->ucode_code.p_addr >> 4;
6554 pdata = priv->ucode_data_backup.p_addr >> 4;
6555
6556 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 6557 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6558 if (rc) {
6559 spin_unlock_irqrestore(&priv->lock, flags);
6560 return rc;
6561 }
6562
6563 /* Tell bootstrap uCode where to find image to load */
bb8c093b
CH		 6564 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6565 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6566 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 6567 priv->ucode_data.len);
6568
6569 /* Inst bytecount must be last to set up, bit 31 signals uCode
6570 * that all new ptr/size info is in place */
bb8c093b 6571 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 6572 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6573
bb8c093b 6574 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6575
6576 spin_unlock_irqrestore(&priv->lock, flags);
6577
6578 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6579
6580 return rc;
6581}
6582
6583/**
bb8c093b 6584 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 6585 *
6586 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6587 *
6588 * The 4965 "initialize" ALIVE reply contains calibration data for:
6589 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6590 * (3945 does not contain this data).
6591 *
6592 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6593*/
bb8c093b 6594static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
b481de9c
ZY		 6595{
6596 /* Check alive response for "valid" sign from uCode */
6597 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6598 /* We had an error bringing up the hardware, so take it
6599 * all the way back down so we can try again */
6600 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6601 goto restart;
6602 }
6603
6604 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6605 * This is a paranoid check, because we would not have gotten the
6606 * "initialize" alive if code weren't properly loaded. */
bb8c093b 6607 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6608 /* Runtime instruction load was bad;
6609 * take it all the way back down so we can try again */
6610 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6611 goto restart;
6612 }
6613
6614 /* Calculate temperature */
6615 priv->temperature = iwl4965_get_temperature(priv);
6616
6617 /* Send pointers to protocol/runtime uCode image ... init code will
6618 * load and launch runtime uCode, which will send us another "Alive"
6619 * notification. */
6620 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 6621 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 6622 /* Runtime instruction load won't happen;
6623 * take it all the way back down so we can try again */
6624 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6625 goto restart;
6626 }
6627 return;
6628
6629 restart:
6630 queue_work(priv->workqueue, &priv->restart);
6631}
6632
6633
6634/**
bb8c093b 6635 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 6636 * from protocol/runtime uCode (initialization uCode's
bb8c093b 6637 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 6638 */
bb8c093b 6639static void iwl4965_alive_start(struct iwl4965_priv *priv)
b481de9c
ZY		 6640{
6641 int rc = 0;
6642
6643 IWL_DEBUG_INFO("Runtime Alive received.\n");
6644
6645 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6646 /* We had an error bringing up the hardware, so take it
6647 * all the way back down so we can try again */
6648 IWL_DEBUG_INFO("Alive failed.\n");
6649 goto restart;
6650 }
6651
6652 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6653 * This is a paranoid check, because we would not have gotten the
6654 * "runtime" alive if code weren't properly loaded. */
bb8c093b 6655 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6656 /* Runtime instruction load was bad;
6657 * take it all the way back down so we can try again */
6658 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6659 goto restart;
6660 }
6661
bb8c093b 6662 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6663
6664 rc = iwl4965_alive_notify(priv);
6665 if (rc) {
6666 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6667 rc);
6668 goto restart;
6669 }
6670
9fbab516 6671 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 6672 set_bit(STATUS_ALIVE, &priv->status);
6673
6674 /* Clear out the uCode error bit if it is set */
6675 clear_bit(STATUS_FW_ERROR, &priv->status);
6676
bb8c093b 6677 rc = iwl4965_init_channel_map(priv);
b481de9c
ZY		 6678 if (rc) {
6679 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6680 return;
6681 }
6682
bb8c093b 6683 iwl4965_init_geos(priv);
b481de9c 6684
bb8c093b 6685 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 6686 return;
6687
6688 if (!priv->mac80211_registered) {
6689 /* Unlock so any user space entry points can call back into
6690 * the driver without a deadlock... */
6691 mutex_unlock(&priv->mutex);
bb8c093b 6692 iwl4965_rate_control_register(priv->hw);
b481de9c
ZY		 6693 rc = ieee80211_register_hw(priv->hw);
6694 priv->hw->conf.beacon_int = 100;
6695 mutex_lock(&priv->mutex);
6696
6697 if (rc) {
bb8c093b 6698 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY		 6699 IWL_ERROR("Failed to register network "
6700 "device (error %d)\n", rc);
6701 return;
6702 }
6703
6704 priv->mac80211_registered = 1;
6705
bb8c093b 6706 iwl4965_reset_channel_flag(priv);
b481de9c
ZY		 6707 } else
6708 ieee80211_start_queues(priv->hw);
6709
6710 priv->active_rate = priv->rates_mask;
6711 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6712
bb8c093b 6713 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 6714
bb8c093b
CH		 6715 if (iwl4965_is_associated(priv)) {
6716 struct iwl4965_rxon_cmd *active_rxon =
6717 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 6718
6719 memcpy(&priv->staging_rxon, &priv->active_rxon,
6720 sizeof(priv->staging_rxon));
6721 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6722 } else {
6723 /* Initialize our rx_config data */
bb8c093b 6724 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 6725 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6726 }
6727
9fbab516 6728 /* Configure Bluetooth device coexistence support */
bb8c093b 6729 iwl4965_send_bt_config(priv);
b481de9c
ZY		 6730
6731 /* Configure the adapter for unassociated operation */
bb8c093b 6732 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6733
6734 /* At this point, the NIC is initialized and operational */
6735 priv->notif_missed_beacons = 0;
6736 set_bit(STATUS_READY, &priv->status);
6737
6738 iwl4965_rf_kill_ct_config(priv);
6739 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6740
6741 if (priv->error_recovering)
bb8c093b 6742 iwl4965_error_recovery(priv);
b481de9c
ZY		 6743
6744 return;
6745
6746 restart:
6747 queue_work(priv->workqueue, &priv->restart);
6748}
6749
bb8c093b 6750static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
b481de9c 6751
bb8c093b 6752static void __iwl4965_down(struct iwl4965_priv *priv)
b481de9c
ZY		 6753{
6754 unsigned long flags;
6755 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6756 struct ieee80211_conf *conf = NULL;
6757
6758 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6759
6760 conf = ieee80211_get_hw_conf(priv->hw);
6761
6762 if (!exit_pending)
6763 set_bit(STATUS_EXIT_PENDING, &priv->status);
6764
bb8c093b 6765 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6766
6767 /* Unblock any waiting calls */
6768 wake_up_interruptible_all(&priv->wait_command_queue);
6769
b481de9c
ZY		 6770 /* Wipe out the EXIT_PENDING status bit if we are not actually
6771 * exiting the module */
6772 if (!exit_pending)
6773 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6774
6775 /* stop and reset the on-board processor */
bb8c093b 6776 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 6777
6778 /* tell the device to stop sending interrupts */
bb8c093b 6779 iwl4965_disable_interrupts(priv);
b481de9c
ZY		 6780
6781 if (priv->mac80211_registered)
6782 ieee80211_stop_queues(priv->hw);
6783
bb8c093b 6784 /* If we have not previously called iwl4965_init() then
b481de9c 6785 * clear all bits but the RF Kill and SUSPEND bits and return */
bb8c093b 6786 if (!iwl4965_is_init(priv)) {
b481de9c
ZY		 6787 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6788 STATUS_RF_KILL_HW |
6789 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6790 STATUS_RF_KILL_SW |
6791 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6792 STATUS_IN_SUSPEND;
6793 goto exit;
6794 }
6795
6796 /* ...otherwise clear out all the status bits but the RF Kill and
6797 * SUSPEND bits and continue taking the NIC down. */
6798 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6799 STATUS_RF_KILL_HW |
6800 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6801 STATUS_RF_KILL_SW |
6802 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6803 STATUS_IN_SUSPEND |
6804 test_bit(STATUS_FW_ERROR, &priv->status) <<
6805 STATUS_FW_ERROR;
6806
6807 spin_lock_irqsave(&priv->lock, flags);
9fbab516
BC		 6808 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6809 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 6810 spin_unlock_irqrestore(&priv->lock, flags);
6811
bb8c093b
CH		 6812 iwl4965_hw_txq_ctx_stop(priv);
6813 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 6814
6815 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 6816 if (!iwl4965_grab_nic_access(priv)) {
6817 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 6818 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 6819 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6820 }
6821 spin_unlock_irqrestore(&priv->lock, flags);
6822
6823 udelay(5);
6824
bb8c093b
CH		 6825 iwl4965_hw_nic_stop_master(priv);
6826 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6827 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 6828
6829 exit:
bb8c093b 6830 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 6831
6832 if (priv->ibss_beacon)
6833 dev_kfree_skb(priv->ibss_beacon);
6834 priv->ibss_beacon = NULL;
6835
6836 /* clear out any free frames */
bb8c093b 6837 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 6838}
6839
bb8c093b 6840static void iwl4965_down(struct iwl4965_priv *priv)
b481de9c
ZY		 6841{
6842 mutex_lock(&priv->mutex);
bb8c093b 6843 __iwl4965_down(priv);
b481de9c 6844 mutex_unlock(&priv->mutex);
b24d22b1 6845
bb8c093b 6846 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 6847}
6848
6849#define MAX_HW_RESTARTS 5
6850
bb8c093b 6851static int __iwl4965_up(struct iwl4965_priv *priv)
b481de9c 6852{
0795af57 6853 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6854 int rc, i;
6855 u32 hw_rf_kill = 0;
6856
6857 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6858 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6859 return -EIO;
6860 }
6861
6862 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6863 IWL_WARNING("Radio disabled by SW RF kill (module "
6864 "parameter)\n");
6865 return 0;
6866 }
6867
a781cf94
RC		 6868 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6869 IWL_ERROR("ucode not available for device bringup\n");
6870 return -EIO;
6871 }
6872
bb8c093b 6873 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 6874
bb8c093b 6875 rc = iwl4965_hw_nic_init(priv);
b481de9c
ZY		 6876 if (rc) {
6877 IWL_ERROR("Unable to int nic\n");
6878 return rc;
6879 }
6880
6881 /* make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6882 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6883 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 6884 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6885
6886 /* clear (again), then enable host interrupts */
bb8c093b
CH		 6887 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6888 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 6889
6890 /* really make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6891 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6892 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 6893
6894 /* Copy original ucode data image from disk into backup cache.
6895 * This will be used to initialize the on-board processor's
6896 * data SRAM for a clean start when the runtime program first loads. */
6897 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6898 priv->ucode_data.len);
6899
6900 /* If platform's RF_KILL switch is set to KILL,
6901 * wait for BIT_INT_RF_KILL interrupt before loading uCode
6902 * and getting things started */
bb8c093b 6903 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 6904 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
6905 hw_rf_kill = 1;
6906
6907 if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
6908 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6909 return 0;
6910 }
6911
6912 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6913
bb8c093b 6914 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6915
6916 /* load bootstrap state machine,
6917 * load bootstrap program into processor's memory,
6918 * prepare to load the "initialize" uCode */
bb8c093b 6919 rc = iwl4965_load_bsm(priv);
b481de9c
ZY		 6920
6921 if (rc) {
6922 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6923 continue;
6924 }
6925
6926 /* start card; "initialize" will load runtime ucode */
bb8c093b 6927 iwl4965_nic_start(priv);
b481de9c 6928
9fbab516 6929 /* MAC Address location in EEPROM is same for 3945/4965 */
b481de9c 6930 get_eeprom_mac(priv, priv->mac_addr);
0795af57
JP		 6931 IWL_DEBUG_INFO("MAC address: %s\n",
6932 print_mac(mac, priv->mac_addr));
b481de9c
ZY		 6933
6934 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
6935
6936 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6937
6938 return 0;
6939 }
6940
6941 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 6942 __iwl4965_down(priv);
b481de9c
ZY		 6943
6944 /* tried to restart and config the device for as long as our
6945 * patience could withstand */
6946 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6947 return -EIO;
6948}
6949
6950
6951/*****************************************************************************
6952 *
6953 * Workqueue callbacks
6954 *
6955 *****************************************************************************/
6956
bb8c093b 6957static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 6958{
bb8c093b
CH		 6959 struct iwl4965_priv *priv =
6960 container_of(data, struct iwl4965_priv, init_alive_start.work);
b481de9c
ZY		 6961
6962 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6963 return;
6964
6965 mutex_lock(&priv->mutex);
bb8c093b 6966 iwl4965_init_alive_start(priv);
b481de9c
ZY		 6967 mutex_unlock(&priv->mutex);
6968}
6969
bb8c093b 6970static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 6971{
bb8c093b
CH		 6972 struct iwl4965_priv *priv =
6973 container_of(data, struct iwl4965_priv, alive_start.work);
b481de9c
ZY		 6974
6975 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6976 return;
6977
6978 mutex_lock(&priv->mutex);
bb8c093b 6979 iwl4965_alive_start(priv);
b481de9c
ZY		 6980 mutex_unlock(&priv->mutex);
6981}
6982
bb8c093b 6983static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 6984{
bb8c093b 6985 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
b481de9c
ZY		 6986
6987 wake_up_interruptible(&priv->wait_command_queue);
6988
6989 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6990 return;
6991
6992 mutex_lock(&priv->mutex);
6993
bb8c093b 6994 if (!iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6995 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6996 "HW and/or SW RF Kill no longer active, restarting "
6997 "device\n");
6998 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6999 queue_work(priv->workqueue, &priv->restart);
7000 } else {
7001
7002 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
7003 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
7004 "disabled by SW switch\n");
7005 else
7006 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
7007 "Kill switch must be turned off for "
7008 "wireless networking to work.\n");
7009 }
7010 mutex_unlock(&priv->mutex);
7011}
7012
7013#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
7014
bb8c093b 7015static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 7016{
bb8c093b
CH		 7017 struct iwl4965_priv *priv =
7018 container_of(data, struct iwl4965_priv, scan_check.work);
b481de9c
ZY		 7019
7020 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7021 return;
7022
7023 mutex_lock(&priv->mutex);
7024 if (test_bit(STATUS_SCANNING, &priv->status) ||
7025 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
7026 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
7027 "Scan completion watchdog resetting adapter (%dms)\n",
7028 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 7029
b481de9c 7030 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 7031 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 7032 }
7033 mutex_unlock(&priv->mutex);
7034}
7035
bb8c093b 7036static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 7037{
bb8c093b
CH		 7038 struct iwl4965_priv *priv =
7039 container_of(data, struct iwl4965_priv, request_scan);
7040 struct iwl4965_host_cmd cmd = {
b481de9c 7041 .id = REPLY_SCAN_CMD,
bb8c093b 7042 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 7043 .meta.flags = CMD_SIZE_HUGE,
7044 };
7045 int rc = 0;
bb8c093b 7046 struct iwl4965_scan_cmd *scan;
b481de9c
ZY		 7047 struct ieee80211_conf *conf = NULL;
7048 u8 direct_mask;
7049 int phymode;
7050
7051 conf = ieee80211_get_hw_conf(priv->hw);
7052
7053 mutex_lock(&priv->mutex);
7054
bb8c093b 7055 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 7056 IWL_WARNING("request scan called when driver not ready.\n");
7057 goto done;
7058 }
7059
7060 /* Make sure the scan wasn't cancelled before this queued work
7061 * was given the chance to run... */
7062 if (!test_bit(STATUS_SCANNING, &priv->status))
7063 goto done;
7064
7065 /* This should never be called or scheduled if there is currently
7066 * a scan active in the hardware. */
7067 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
7068 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
7069 "Ignoring second request.\n");
7070 rc = -EIO;
7071 goto done;
7072 }
7073
7074 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
7075 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
7076 goto done;
7077 }
7078
7079 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
7080 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
7081 goto done;
7082 }
7083
bb8c093b 7084 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 7085 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
7086 goto done;
7087 }
7088
7089 if (!test_bit(STATUS_READY, &priv->status)) {
7090 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
7091 goto done;
7092 }
7093
7094 if (!priv->scan_bands) {
7095 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
7096 goto done;
7097 }
7098
7099 if (!priv->scan) {
bb8c093b 7100 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 7101 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
7102 if (!priv->scan) {
7103 rc = -ENOMEM;
7104 goto done;
7105 }
7106 }
7107 scan = priv->scan;
bb8c093b 7108 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 7109
7110 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
7111 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
7112
bb8c093b 7113 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 7114 u16 interval = 0;
7115 u32 extra;
7116 u32 suspend_time = 100;
7117 u32 scan_suspend_time = 100;
7118 unsigned long flags;
7119
7120 IWL_DEBUG_INFO("Scanning while associated...\n");
7121
7122 spin_lock_irqsave(&priv->lock, flags);
7123 interval = priv->beacon_int;
7124 spin_unlock_irqrestore(&priv->lock, flags);
7125
7126 scan->suspend_time = 0;
052c4b9f 7127 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 7128 if (!interval)
7129 interval = suspend_time;
7130
7131 extra = (suspend_time / interval) << 22;
7132 scan_suspend_time = (extra |
7133 ((suspend_time % interval) * 1024));
7134 scan->suspend_time = cpu_to_le32(scan_suspend_time);
7135 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
7136 scan_suspend_time, interval);
7137 }
7138
7139 /* We should add the ability for user to lock to PASSIVE ONLY */
7140 if (priv->one_direct_scan) {
7141 IWL_DEBUG_SCAN
7142 ("Kicking off one direct scan for '%s'\n",
bb8c093b 7143 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 7144 priv->direct_ssid_len));
7145 scan->direct_scan[0].id = WLAN_EID_SSID;
7146 scan->direct_scan[0].len = priv->direct_ssid_len;
7147 memcpy(scan->direct_scan[0].ssid,
7148 priv->direct_ssid, priv->direct_ssid_len);
7149 direct_mask = 1;
bb8c093b 7150 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
b481de9c
ZY		 7151 scan->direct_scan[0].id = WLAN_EID_SSID;
7152 scan->direct_scan[0].len = priv->essid_len;
7153 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
7154 direct_mask = 1;
7155 } else
7156 direct_mask = 0;
7157
7158 /* We don't build a direct scan probe request; the uCode will do
7159 * that based on the direct_mask added to each channel entry */
7160 scan->tx_cmd.len = cpu_to_le16(
bb8c093b 7161 iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
b481de9c
ZY		 7162 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
7163 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
7164 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
7165 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
7166
7167 /* flags + rate selection */
7168
7169 scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
7170
7171 switch (priv->scan_bands) {
7172 case 2:
7173 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
7174 scan->tx_cmd.rate_n_flags =
bb8c093b 7175 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 7176 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
7177
7178 scan->good_CRC_th = 0;
7179 phymode = MODE_IEEE80211G;
7180 break;
7181
7182 case 1:
7183 scan->tx_cmd.rate_n_flags =
bb8c093b 7184 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 7185 RATE_MCS_ANT_B_MSK);
7186 scan->good_CRC_th = IWL_GOOD_CRC_TH;
7187 phymode = MODE_IEEE80211A;
7188 break;
7189
7190 default:
7191 IWL_WARNING("Invalid scan band count\n");
7192 goto done;
7193 }
7194
7195 /* select Rx chains */
7196
7197 /* Force use of chains B and C (0x6) for scan Rx.
7198 * Avoid A (0x1) because of its off-channel reception on A-band.
7199 * MIMO is not used here, but value is required to make uCode happy. */
7200 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7201 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7202 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7203 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7204
7205 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7206 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7207
7208 if (direct_mask)
7209 IWL_DEBUG_SCAN
7210 ("Initiating direct scan for %s.\n",
bb8c093b 7211 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY		 7212 else
7213 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7214
7215 scan->channel_count =
bb8c093b 7216 iwl4965_get_channels_for_scan(
b481de9c
ZY		 7217 priv, phymode, 1, /* active */
7218 direct_mask,
7219 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7220
7221 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 7222 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 7223 cmd.data = scan;
7224 scan->len = cpu_to_le16(cmd.len);
7225
7226 set_bit(STATUS_SCAN_HW, &priv->status);
bb8c093b 7227 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 7228 if (rc)
7229 goto done;
7230
7231 queue_delayed_work(priv->workqueue, &priv->scan_check,
7232 IWL_SCAN_CHECK_WATCHDOG);
7233
7234 mutex_unlock(&priv->mutex);
7235 return;
7236
7237 done:
01ebd063 7238 /* inform mac80211 scan aborted */
b481de9c
ZY		 7239 queue_work(priv->workqueue, &priv->scan_completed);
7240 mutex_unlock(&priv->mutex);
7241}
7242
bb8c093b 7243static void iwl4965_bg_up(struct work_struct *data)
b481de9c 7244{
bb8c093b 7245 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
b481de9c
ZY		 7246
7247 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7248 return;
7249
7250 mutex_lock(&priv->mutex);
bb8c093b 7251 __iwl4965_up(priv);
b481de9c
ZY		 7252 mutex_unlock(&priv->mutex);
7253}
7254
bb8c093b 7255static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 7256{
bb8c093b 7257 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
b481de9c
ZY		 7258
7259 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7260 return;
7261
bb8c093b 7262 iwl4965_down(priv);
b481de9c
ZY		 7263 queue_work(priv->workqueue, &priv->up);
7264}
7265
bb8c093b 7266static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 7267{
bb8c093b
CH		 7268 struct iwl4965_priv *priv =
7269 container_of(data, struct iwl4965_priv, rx_replenish);
b481de9c
ZY		 7270
7271 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7272 return;
7273
7274 mutex_lock(&priv->mutex);
bb8c093b 7275 iwl4965_rx_replenish(priv);
b481de9c
ZY		 7276 mutex_unlock(&priv->mutex);
7277}
7278
7878a5a4
MA		 7279#define IWL_DELAY_NEXT_SCAN (HZ*2)
7280
bb8c093b 7281static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 7282{
bb8c093b 7283 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
b481de9c
ZY		 7284 post_associate.work);
7285
7286 int rc = 0;
7287 struct ieee80211_conf *conf = NULL;
0795af57 7288 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7289
7290 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7291 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7292 return;
7293 }
7294
0795af57
JP		 7295 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7296 priv->assoc_id,
7297 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 7298
7299
7300 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7301 return;
7302
7303 mutex_lock(&priv->mutex);
7304
948c171c
MA		 7305 if (!priv->interface_id || !priv->is_open) {
7306 mutex_unlock(&priv->mutex);
7307 return;
7308 }
bb8c093b 7309 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 7310
b481de9c
ZY		 7311 conf = ieee80211_get_hw_conf(priv->hw);
7312
7313 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7314 iwl4965_commit_rxon(priv);
b481de9c 7315
bb8c093b
CH		 7316 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7317 iwl4965_setup_rxon_timing(priv);
7318 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 7319 sizeof(priv->rxon_timing), &priv->rxon_timing);
7320 if (rc)
7321 IWL_WARNING("REPLY_RXON_TIMING failed - "
7322 "Attempting to continue.\n");
7323
7324 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7325
c8b0e6e1 7326#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 7327 if (priv->current_ht_config.is_ht)
7328 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 7329#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY		 7330 iwl4965_set_rxon_chain(priv);
7331 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7332
7333 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7334 priv->assoc_id, priv->beacon_int);
7335
7336 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7337 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7338 else
7339 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7340
7341 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7342 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7343 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7344 else
7345 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7346
7347 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7348 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7349
7350 }
7351
bb8c093b 7352 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7353
7354 switch (priv->iw_mode) {
7355 case IEEE80211_IF_TYPE_STA:
bb8c093b 7356 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 7357 break;
7358
7359 case IEEE80211_IF_TYPE_IBSS:
7360
7361 /* clear out the station table */
bb8c093b 7362 iwl4965_clear_stations_table(priv);
b481de9c 7363
bb8c093b
CH		 7364 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7365 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7366 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7367 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 7368
7369 break;
7370
7371 default:
7372 IWL_ERROR("%s Should not be called in %d mode\n",
7373 __FUNCTION__, priv->iw_mode);
7374 break;
7375 }
7376
bb8c093b 7377 iwl4965_sequence_reset(priv);
b481de9c 7378
c8b0e6e1 7379#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 7380 /* Enable Rx differential gain and sensitivity calibrations */
7381 iwl4965_chain_noise_reset(priv);
7382 priv->start_calib = 1;
c8b0e6e1 7383#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 7384
7385 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7386 priv->assoc_station_added = 1;
7387
c8b0e6e1 7388#ifdef CONFIG_IWL4965_QOS
bb8c093b 7389 iwl4965_activate_qos(priv, 0);
c8b0e6e1 7390#endif /* CONFIG_IWL4965_QOS */
7878a5a4
MA		 7391 /* we have just associated, don't start scan too early */
7392 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
b481de9c
ZY		 7393 mutex_unlock(&priv->mutex);
7394}
7395
bb8c093b 7396static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 7397{
bb8c093b 7398 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
b481de9c 7399
bb8c093b 7400 if (!iwl4965_is_ready(priv))
b481de9c
ZY		 7401 return;
7402
7403 mutex_lock(&priv->mutex);
7404
7405 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 7406 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 7407
7408 mutex_unlock(&priv->mutex);
7409}
7410
76bb77e0
ZY		 7411static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7412
bb8c093b 7413static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 7414{
bb8c093b
CH		 7415 struct iwl4965_priv *priv =
7416 container_of(work, struct iwl4965_priv, scan_completed);
b481de9c
ZY		 7417
7418 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7419
7420 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7421 return;
7422
76bb77e0
ZY		 7423 if (priv->cache_conf)
7424 iwl4965_mac_config(priv->hw, priv->cache_conf);
7425
b481de9c
ZY		 7426 ieee80211_scan_completed(priv->hw);
7427
7428 /* Since setting the TXPOWER may have been deferred while
7429 * performing the scan, fire one off */
7430 mutex_lock(&priv->mutex);
bb8c093b 7431 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 7432 mutex_unlock(&priv->mutex);
7433}
7434
7435/*****************************************************************************
7436 *
7437 * mac80211 entry point functions
7438 *
7439 *****************************************************************************/
7440
bb8c093b 7441static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 7442{
bb8c093b 7443 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7444
7445 IWL_DEBUG_MAC80211("enter\n");
7446
7447 /* we should be verifying the device is ready to be opened */
7448 mutex_lock(&priv->mutex);
7449
7450 priv->is_open = 1;
7451
bb8c093b 7452 if (!iwl4965_is_rfkill(priv))
b481de9c
ZY		 7453 ieee80211_start_queues(priv->hw);
7454
7455 mutex_unlock(&priv->mutex);
7456 IWL_DEBUG_MAC80211("leave\n");
7457 return 0;
7458}
7459
bb8c093b 7460static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 7461{
bb8c093b 7462 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7463
7464 IWL_DEBUG_MAC80211("enter\n");
948c171c
MA		 7465
7466
7467 mutex_lock(&priv->mutex);
7468 /* stop mac, cancel any scan request and clear
7469 * RXON_FILTER_ASSOC_MSK BIT
7470 */
b481de9c 7471 priv->is_open = 0;
fde3571f
MA		 7472 if (!iwl4965_is_ready_rf(priv)) {
7473 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7474 mutex_unlock(&priv->mutex);
7475 return;
7476 }
7477
bb8c093b 7478 iwl4965_scan_cancel_timeout(priv, 100);
948c171c
MA		 7479 cancel_delayed_work(&priv->post_associate);
7480 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7481 iwl4965_commit_rxon(priv);
948c171c
MA		 7482 mutex_unlock(&priv->mutex);
7483
b481de9c 7484 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7485}
7486
bb8c093b 7487static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7488 struct ieee80211_tx_control *ctl)
7489{
bb8c093b 7490 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7491
7492 IWL_DEBUG_MAC80211("enter\n");
7493
7494 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7495 IWL_DEBUG_MAC80211("leave - monitor\n");
7496 return -1;
7497 }
7498
7499 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7500 ctl->tx_rate);
7501
bb8c093b 7502 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 7503 dev_kfree_skb_any(skb);
7504
7505 IWL_DEBUG_MAC80211("leave\n");
7506 return 0;
7507}
7508
bb8c093b 7509static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7510 struct ieee80211_if_init_conf *conf)
7511{
bb8c093b 7512 struct iwl4965_priv *priv = hw->priv;
b481de9c 7513 unsigned long flags;
0795af57 7514 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7515
7516 IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
b481de9c
ZY		 7517
7518 if (priv->interface_id) {
7519 IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
7520 return 0;
7521 }
7522
7523 spin_lock_irqsave(&priv->lock, flags);
7524 priv->interface_id = conf->if_id;
7525
7526 spin_unlock_irqrestore(&priv->lock, flags);
7527
7528 mutex_lock(&priv->mutex);
864792e3
TW		 7529
7530 if (conf->mac_addr) {
7531 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7532 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7533 }
bb8c093b 7534 iwl4965_set_mode(priv, conf->type);
b481de9c
ZY		 7535
7536 IWL_DEBUG_MAC80211("leave\n");
7537 mutex_unlock(&priv->mutex);
7538
7539 return 0;
7540}
7541
7542/**
bb8c093b 7543 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 7544 *
7545 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7546 * be set inappropriately and the driver currently sets the hardware up to
7547 * use it whenever needed.
7548 */
bb8c093b 7549static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 7550{
bb8c093b
CH		 7551 struct iwl4965_priv *priv = hw->priv;
7552 const struct iwl4965_channel_info *ch_info;
b481de9c 7553 unsigned long flags;
76bb77e0 7554 int ret = 0;
b481de9c
ZY		 7555
7556 mutex_lock(&priv->mutex);
7557 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7558
bb8c093b 7559 if (!iwl4965_is_ready(priv)) {
b481de9c 7560 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 7561 ret = -EIO;
7562 goto out;
b481de9c
ZY		 7563 }
7564
7565 /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
01ebd063 7566 * what is exposed through include/ declarations */
bb8c093b 7567 if (unlikely(!iwl4965_param_disable_hw_scan &&
b481de9c 7568 test_bit(STATUS_SCANNING, &priv->status))) {
76bb77e0
ZY		 7569
7570 if (unlikely(priv->cache_conf))
7571 IWL_DEBUG_MAC80211("leave - still scanning\n");
7572 else {
7573 /* Cache the configuration now so that we can
7574 * replay it after the hardware scan is finished. */
7575 priv->cache_conf = kmalloc(sizeof(*conf), GFP_KERNEL);
7576 if (priv->cache_conf) {
7577 memcpy(priv->cache_conf, conf, sizeof(*conf));
7578 IWL_DEBUG_MAC80211("leave - scanning\n");
7579 } else {
7580 IWL_DEBUG_MAC80211("leave - no memory\n");
7581 ret = -ENOMEM;
7582 }
7583 }
b481de9c 7584 mutex_unlock(&priv->mutex);
76bb77e0 7585 return ret;
b481de9c
ZY		 7586 }
7587
7588 spin_lock_irqsave(&priv->lock, flags);
7589
bb8c093b 7590 ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
b481de9c
ZY		 7591 if (!is_channel_valid(ch_info)) {
7592 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7593 conf->channel, conf->phymode);
7594 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7595 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 7596 ret = -EINVAL;
7597 goto out;
b481de9c
ZY		 7598 }
7599
c8b0e6e1 7600#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 7601 /* if we are switching fron ht to 2.4 clear flags
7602 * from any ht related info since 2.4 does not
7603 * support ht */
7604 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
7605#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7606 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7607#endif
7608 )
7609 priv->staging_rxon.flags = 0;
c8b0e6e1 7610#endif /* CONFIG_IWL4965_HT */
b481de9c 7611
bb8c093b 7612 iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
b481de9c 7613
bb8c093b 7614 iwl4965_set_flags_for_phymode(priv, conf->phymode);
b481de9c
ZY		 7615
7616 /* The list of supported rates and rate mask can be different
7617 * for each phymode; since the phymode may have changed, reset
7618 * the rate mask to what mac80211 lists */
bb8c093b 7619 iwl4965_set_rate(priv);
b481de9c
ZY		 7620
7621 spin_unlock_irqrestore(&priv->lock, flags);
7622
7623#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7624 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 7625 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 7626 goto out;
b481de9c
ZY		 7627 }
7628#endif
7629
bb8c093b 7630 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 7631
7632 if (!conf->radio_enabled) {
7633 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 7634 goto out;
b481de9c
ZY		 7635 }
7636
bb8c093b 7637 if (iwl4965_is_rfkill(priv)) {
b481de9c 7638 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 7639 ret = -EIO;
7640 goto out;
b481de9c
ZY		 7641 }
7642
bb8c093b 7643 iwl4965_set_rate(priv);
b481de9c
ZY		 7644
7645 if (memcmp(&priv->active_rxon,
7646 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 7647 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7648 else
7649 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7650
7651 IWL_DEBUG_MAC80211("leave\n");
7652
76bb77e0
ZY		 7653out:
7654 if (priv->cache_conf) {
7655 kfree(priv->cache_conf);
7656 priv->cache_conf = NULL;
7657 }
b481de9c 7658 mutex_unlock(&priv->mutex);
76bb77e0 7659 return ret;
b481de9c
ZY		 7660}
7661
bb8c093b 7662static void iwl4965_config_ap(struct iwl4965_priv *priv)
b481de9c
ZY		 7663{
7664 int rc = 0;
7665
7666 if (priv->status & STATUS_EXIT_PENDING)
7667 return;
7668
7669 /* The following should be done only at AP bring up */
7670 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7671
7672 /* RXON - unassoc (to set timing command) */
7673 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7674 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7675
7676 /* RXON Timing */
bb8c093b
CH		 7677 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7678 iwl4965_setup_rxon_timing(priv);
7679 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 7680 sizeof(priv->rxon_timing), &priv->rxon_timing);
7681 if (rc)
7682 IWL_WARNING("REPLY_RXON_TIMING failed - "
7683 "Attempting to continue.\n");
7684
7685 iwl4965_set_rxon_chain(priv);
7686
7687 /* FIXME: what should be the assoc_id for AP? */
7688 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7689 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7690 priv->staging_rxon.flags |=
7691 RXON_FLG_SHORT_PREAMBLE_MSK;
7692 else
7693 priv->staging_rxon.flags &=
7694 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7695
7696 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7697 if (priv->assoc_capability &
7698 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7699 priv->staging_rxon.flags |=
7700 RXON_FLG_SHORT_SLOT_MSK;
7701 else
7702 priv->staging_rxon.flags &=
7703 ~RXON_FLG_SHORT_SLOT_MSK;
7704
7705 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7706 priv->staging_rxon.flags &=
7707 ~RXON_FLG_SHORT_SLOT_MSK;
7708 }
7709 /* restore RXON assoc */
7710 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 7711 iwl4965_commit_rxon(priv);
c8b0e6e1 7712#ifdef CONFIG_IWL4965_QOS
bb8c093b 7713 iwl4965_activate_qos(priv, 1);
b481de9c 7714#endif
bb8c093b 7715 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 7716 }
bb8c093b 7717 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 7718
7719 /* FIXME - we need to add code here to detect a totally new
7720 * configuration, reset the AP, unassoc, rxon timing, assoc,
7721 * clear sta table, add BCAST sta... */
7722}
7723
bb8c093b 7724static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id,
b481de9c
ZY		 7725 struct ieee80211_if_conf *conf)
7726{
bb8c093b 7727 struct iwl4965_priv *priv = hw->priv;
0795af57 7728 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7729 unsigned long flags;
7730 int rc;
7731
7732 if (conf == NULL)
7733 return -EIO;
7734
7735 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7736 (!conf->beacon || !conf->ssid_len)) {
7737 IWL_DEBUG_MAC80211
7738 ("Leaving in AP mode because HostAPD is not ready.\n");
7739 return 0;
7740 }
7741
7742 mutex_lock(&priv->mutex);
7743
7744 IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
7745 if (conf->bssid)
0795af57
JP		 7746 IWL_DEBUG_MAC80211("bssid: %s\n",
7747 print_mac(mac, conf->bssid));
b481de9c 7748
4150c572
JB		 7749/*
7750 * very dubious code was here; the probe filtering flag is never set:
7751 *
b481de9c
ZY		 7752 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7753 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572
JB		 7754 */
7755 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
b481de9c
ZY		 7756 IWL_DEBUG_MAC80211("leave - scanning\n");
7757 mutex_unlock(&priv->mutex);
7758 return 0;
7759 }
7760
7761 if (priv->interface_id != if_id) {
7762 IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
7763 mutex_unlock(&priv->mutex);
7764 return 0;
7765 }
7766
7767 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7768 if (!conf->bssid) {
7769 conf->bssid = priv->mac_addr;
7770 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 7771 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7772 print_mac(mac, conf->bssid));
b481de9c
ZY		 7773 }
7774 if (priv->ibss_beacon)
7775 dev_kfree_skb(priv->ibss_beacon);
7776
7777 priv->ibss_beacon = conf->beacon;
7778 }
7779
fde3571f
MA		 7780 if (iwl4965_is_rfkill(priv))
7781 goto done;
7782
b481de9c
ZY		 7783 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7784 !is_multicast_ether_addr(conf->bssid)) {
7785 /* If there is currently a HW scan going on in the background
7786 * then we need to cancel it else the RXON below will fail. */
bb8c093b 7787 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 7788 IWL_WARNING("Aborted scan still in progress "
7789 "after 100ms\n");
7790 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7791 mutex_unlock(&priv->mutex);
7792 return -EAGAIN;
7793 }
7794 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7795
7796 /* TODO: Audit driver for usage of these members and see
7797 * if mac80211 deprecates them (priv->bssid looks like it
7798 * shouldn't be there, but I haven't scanned the IBSS code
7799 * to verify) - jpk */
7800 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7801
7802 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 7803 iwl4965_config_ap(priv);
b481de9c 7804 else {
bb8c093b 7805 rc = iwl4965_commit_rxon(priv);
b481de9c 7806 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 7807 iwl4965_rxon_add_station(
b481de9c
ZY		 7808 priv, priv->active_rxon.bssid_addr, 1);
7809 }
7810
7811 } else {
bb8c093b 7812 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 7813 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7814 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7815 }
7816
fde3571f 7817 done:
b481de9c
ZY		 7818 spin_lock_irqsave(&priv->lock, flags);
7819 if (!conf->ssid_len)
7820 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7821 else
7822 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7823
7824 priv->essid_len = conf->ssid_len;
7825 spin_unlock_irqrestore(&priv->lock, flags);
7826
7827 IWL_DEBUG_MAC80211("leave\n");
7828 mutex_unlock(&priv->mutex);
7829
7830 return 0;
7831}
7832
bb8c093b 7833static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 7834 unsigned int changed_flags,
7835 unsigned int *total_flags,
7836 int mc_count, struct dev_addr_list *mc_list)
7837{
7838 /*
7839 * XXX: dummy
bb8c093b 7840 * see also iwl4965_connection_init_rx_config
4150c572
JB		 7841 */
7842 *total_flags = 0;
7843}
7844
bb8c093b 7845static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7846 struct ieee80211_if_init_conf *conf)
7847{
bb8c093b 7848 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7849
7850 IWL_DEBUG_MAC80211("enter\n");
7851
7852 mutex_lock(&priv->mutex);
948c171c 7853
fde3571f
MA		 7854 if (iwl4965_is_ready_rf(priv)) {
7855 iwl4965_scan_cancel_timeout(priv, 100);
7856 cancel_delayed_work(&priv->post_associate);
7857 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7858 iwl4965_commit_rxon(priv);
7859 }
b481de9c
ZY		 7860 if (priv->interface_id == conf->if_id) {
7861 priv->interface_id = 0;
7862 memset(priv->bssid, 0, ETH_ALEN);
7863 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7864 priv->essid_len = 0;
7865 }
7866 mutex_unlock(&priv->mutex);
7867
7868 IWL_DEBUG_MAC80211("leave\n");
7869
7870}
bb8c093b 7871static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw,
220173b0
TW		 7872 u8 changes, int cts_protection, int preamble)
7873{
bb8c093b 7874 struct iwl4965_priv *priv = hw->priv;
220173b0
TW		 7875
7876 if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
7877 if (preamble == WLAN_ERP_PREAMBLE_SHORT)
7878 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7879 else
7880 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7881 }
7882
7883 if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
797a54c6 7884 if (cts_protection && (priv->phymode != MODE_IEEE80211A))
220173b0
TW		 7885 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7886 else
7887 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7888 }
7889
bb8c093b
CH		 7890 if (iwl4965_is_associated(priv))
7891 iwl4965_send_rxon_assoc(priv);
220173b0 7892}
b481de9c 7893
bb8c093b 7894static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 7895{
7896 int rc = 0;
7897 unsigned long flags;
bb8c093b 7898 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 7899
7900 IWL_DEBUG_MAC80211("enter\n");
7901
052c4b9f 7902 mutex_lock(&priv->mutex);
b481de9c
ZY		 7903 spin_lock_irqsave(&priv->lock, flags);
7904
bb8c093b 7905 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7906 rc = -EIO;
7907 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7908 goto out_unlock;
7909 }
7910
7911 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7912 rc = -EIO;
7913 IWL_ERROR("ERROR: APs don't scan\n");
7914 goto out_unlock;
7915 }
7916
7878a5a4
MA		 7917 /* we don't schedule scan within next_scan_jiffies period */
7918 if (priv->next_scan_jiffies &&
7919 time_after(priv->next_scan_jiffies, jiffies)) {
7920 rc = -EAGAIN;
7921 goto out_unlock;
7922 }
b481de9c 7923 /* if we just finished scan ask for delay */
7878a5a4
MA		 7924 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7925 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 7926 rc = -EAGAIN;
7927 goto out_unlock;
7928 }
7929 if (len) {
7878a5a4 7930 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 7931 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 7932
7933 priv->one_direct_scan = 1;
7934 priv->direct_ssid_len = (u8)
7935 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7936 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 7937 } else
7938 priv->one_direct_scan = 0;
b481de9c 7939
bb8c093b 7940 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 7941
7942 IWL_DEBUG_MAC80211("leave\n");
7943
7944out_unlock:
7945 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 7946 mutex_unlock(&priv->mutex);
b481de9c
ZY		 7947
7948 return rc;
7949}
7950
bb8c093b 7951static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 7952 const u8 *local_addr, const u8 *addr,
7953 struct ieee80211_key_conf *key)
7954{
bb8c093b 7955 struct iwl4965_priv *priv = hw->priv;
0795af57 7956 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7957 int rc = 0;
7958 u8 sta_id;
7959
7960 IWL_DEBUG_MAC80211("enter\n");
7961
bb8c093b 7962 if (!iwl4965_param_hwcrypto) {
b481de9c
ZY		 7963 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7964 return -EOPNOTSUPP;
7965 }
7966
7967 if (is_zero_ether_addr(addr))
7968 /* only support pairwise keys */
7969 return -EOPNOTSUPP;
7970
bb8c093b 7971 sta_id = iwl4965_hw_find_station(priv, addr);
b481de9c 7972 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 7973 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7974 print_mac(mac, addr));
b481de9c
ZY		 7975 return -EINVAL;
7976 }
7977
7978 mutex_lock(&priv->mutex);
7979
bb8c093b 7980 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7981
b481de9c
ZY		 7982 switch (cmd) {
7983 case SET_KEY:
bb8c093b 7984 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
b481de9c 7985 if (!rc) {
bb8c093b
CH		 7986 iwl4965_set_rxon_hwcrypto(priv, 1);
7987 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7988 key->hw_key_idx = sta_id;
7989 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7990 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7991 }
7992 break;
7993 case DISABLE_KEY:
bb8c093b 7994 rc = iwl4965_clear_sta_key_info(priv, sta_id);
b481de9c 7995 if (!rc) {
bb8c093b
CH		 7996 iwl4965_set_rxon_hwcrypto(priv, 0);
7997 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7998 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7999 }
8000 break;
8001 default:
8002 rc = -EINVAL;
8003 }
8004
8005 IWL_DEBUG_MAC80211("leave\n");
8006 mutex_unlock(&priv->mutex);
8007
8008 return rc;
8009}
8010
bb8c093b 8011static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 8012 const struct ieee80211_tx_queue_params *params)
8013{
bb8c093b 8014 struct iwl4965_priv *priv = hw->priv;
c8b0e6e1 8015#ifdef CONFIG_IWL4965_QOS
b481de9c
ZY		 8016 unsigned long flags;
8017 int q;
0054b34d 8018#endif /* CONFIG_IWL4965_QOS */
b481de9c
ZY		 8019
8020 IWL_DEBUG_MAC80211("enter\n");
8021
bb8c093b 8022 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 8023 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8024 return -EIO;
8025 }
8026
8027 if (queue >= AC_NUM) {
8028 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
8029 return 0;
8030 }
8031
c8b0e6e1 8032#ifdef CONFIG_IWL4965_QOS
b481de9c
ZY		 8033 if (!priv->qos_data.qos_enable) {
8034 priv->qos_data.qos_active = 0;
8035 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
8036 return 0;
8037 }
8038 q = AC_NUM - 1 - queue;
8039
8040 spin_lock_irqsave(&priv->lock, flags);
8041
8042 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
8043 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
8044 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
8045 priv->qos_data.def_qos_parm.ac[q].edca_txop =
8046 cpu_to_le16((params->burst_time * 100));
8047
8048 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
8049 priv->qos_data.qos_active = 1;
8050
8051 spin_unlock_irqrestore(&priv->lock, flags);
8052
8053 mutex_lock(&priv->mutex);
8054 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b
CH		 8055 iwl4965_activate_qos(priv, 1);
8056 else if (priv->assoc_id && iwl4965_is_associated(priv))
8057 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 8058
8059 mutex_unlock(&priv->mutex);
8060
c8b0e6e1 8061#endif /*CONFIG_IWL4965_QOS */
b481de9c
ZY		 8062
8063 IWL_DEBUG_MAC80211("leave\n");
8064 return 0;
8065}
8066
bb8c093b 8067static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 8068 struct ieee80211_tx_queue_stats *stats)
8069{
bb8c093b 8070 struct iwl4965_priv *priv = hw->priv;
b481de9c 8071 int i, avail;
bb8c093b
CH		 8072 struct iwl4965_tx_queue *txq;
8073 struct iwl4965_queue *q;
b481de9c
ZY		 8074 unsigned long flags;
8075
8076 IWL_DEBUG_MAC80211("enter\n");
8077
bb8c093b 8078 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 8079 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8080 return -EIO;
8081 }
8082
8083 spin_lock_irqsave(&priv->lock, flags);
8084
8085 for (i = 0; i < AC_NUM; i++) {
8086 txq = &priv->txq[i];
8087 q = &txq->q;
bb8c093b 8088 avail = iwl4965_queue_space(q);
b481de9c
ZY		 8089
8090 stats->data[i].len = q->n_window - avail;
8091 stats->data[i].limit = q->n_window - q->high_mark;
8092 stats->data[i].count = q->n_window;
8093
8094 }
8095 spin_unlock_irqrestore(&priv->lock, flags);
8096
8097 IWL_DEBUG_MAC80211("leave\n");
8098
8099 return 0;
8100}
8101
bb8c093b 8102static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 8103 struct ieee80211_low_level_stats *stats)
8104{
8105 IWL_DEBUG_MAC80211("enter\n");
8106 IWL_DEBUG_MAC80211("leave\n");
8107
8108 return 0;
8109}
8110
bb8c093b 8111static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 8112{
8113 IWL_DEBUG_MAC80211("enter\n");
8114 IWL_DEBUG_MAC80211("leave\n");
8115
8116 return 0;
8117}
8118
bb8c093b 8119static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 8120{
bb8c093b 8121 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 8122 unsigned long flags;
8123
8124 mutex_lock(&priv->mutex);
8125 IWL_DEBUG_MAC80211("enter\n");
8126
8127 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 8128#ifdef CONFIG_IWL4965_HT
b481de9c 8129 spin_lock_irqsave(&priv->lock, flags);
fd105e79 8130 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 8131 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 8132#ifdef CONFIG_IWL4965_HT_AGG
b481de9c
ZY		 8133/* if (priv->lq_mngr.agg_ctrl.granted_ba)
8134 iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
8135
bb8c093b 8136 memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
b481de9c
ZY		 8137 priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
8138 priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
8139 priv->lq_mngr.agg_ctrl.auto_agg = 1;
8140
8141 if (priv->lq_mngr.agg_ctrl.auto_agg)
8142 priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
c8b0e6e1
CH		 8143#endif /*CONFIG_IWL4965_HT_AGG */
8144#endif /* CONFIG_IWL4965_HT */
b481de9c 8145
c8b0e6e1 8146#ifdef CONFIG_IWL4965_QOS
bb8c093b 8147 iwl4965_reset_qos(priv);
b481de9c
ZY		 8148#endif
8149
8150 cancel_delayed_work(&priv->post_associate);
8151
8152 spin_lock_irqsave(&priv->lock, flags);
8153 priv->assoc_id = 0;
8154 priv->assoc_capability = 0;
8155 priv->call_post_assoc_from_beacon = 0;
8156 priv->assoc_station_added = 0;
8157
8158 /* new association get rid of ibss beacon skb */
8159 if (priv->ibss_beacon)
8160 dev_kfree_skb(priv->ibss_beacon);
8161
8162 priv->ibss_beacon = NULL;
8163
8164 priv->beacon_int = priv->hw->conf.beacon_int;
8165 priv->timestamp1 = 0;
8166 priv->timestamp0 = 0;
8167 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8168 priv->beacon_int = 0;
8169
8170 spin_unlock_irqrestore(&priv->lock, flags);
8171
fde3571f
MA		 8172 if (!iwl4965_is_ready_rf(priv)) {
8173 IWL_DEBUG_MAC80211("leave - not ready\n");
8174 mutex_unlock(&priv->mutex);
8175 return;
8176 }
8177
052c4b9f 8178 /* we are restarting association process
8179 * clear RXON_FILTER_ASSOC_MSK bit
8180 */
8181 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 8182 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 8183 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 8184 iwl4965_commit_rxon(priv);
052c4b9f 8185 }
8186
b481de9c
ZY		 8187 /* Per mac80211.h: This is only used in IBSS mode... */
8188 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 8189
b481de9c
ZY		 8190 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8191 mutex_unlock(&priv->mutex);
8192 return;
8193 }
8194
b481de9c
ZY		 8195 priv->only_active_channel = 0;
8196
bb8c093b 8197 iwl4965_set_rate(priv);
b481de9c
ZY		 8198
8199 mutex_unlock(&priv->mutex);
8200
8201 IWL_DEBUG_MAC80211("leave\n");
8202
8203}
8204
bb8c093b 8205static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 8206 struct ieee80211_tx_control *control)
8207{
bb8c093b 8208 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 8209 unsigned long flags;
8210
8211 mutex_lock(&priv->mutex);
8212 IWL_DEBUG_MAC80211("enter\n");
8213
bb8c093b 8214 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 8215 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8216 mutex_unlock(&priv->mutex);
8217 return -EIO;
8218 }
8219
8220 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8221 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8222 mutex_unlock(&priv->mutex);
8223 return -EIO;
8224 }
8225
8226 spin_lock_irqsave(&priv->lock, flags);
8227
8228 if (priv->ibss_beacon)
8229 dev_kfree_skb(priv->ibss_beacon);
8230
8231 priv->ibss_beacon = skb;
8232
8233 priv->assoc_id = 0;
8234
8235 IWL_DEBUG_MAC80211("leave\n");
8236 spin_unlock_irqrestore(&priv->lock, flags);
8237
c8b0e6e1 8238#ifdef CONFIG_IWL4965_QOS
bb8c093b 8239 iwl4965_reset_qos(priv);
b481de9c
ZY		 8240#endif
8241
8242 queue_work(priv->workqueue, &priv->post_associate.work);
8243
8244 mutex_unlock(&priv->mutex);
8245
8246 return 0;
8247}
8248
c8b0e6e1 8249#ifdef CONFIG_IWL4965_HT
b481de9c 8250
fd105e79
RR		 8251static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8252 struct iwl4965_priv *priv)
b481de9c 8253{
fd105e79
RR		 8254 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8255 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8256 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
b481de9c
ZY		 8257
8258 IWL_DEBUG_MAC80211("enter: \n");
8259
fd105e79
RR		 8260 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8261 iwl_conf->is_ht = 0;
8262 return;
b481de9c
ZY		 8263 }
8264
fd105e79
RR		 8265 iwl_conf->is_ht = 1;
8266 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8267
8268 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8269 iwl_conf->sgf |= 0x1;
8270 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8271 iwl_conf->sgf |= 0x2;
8272
8273 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8274 iwl_conf->max_amsdu_size =
8275 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8276 iwl_conf->supported_chan_width =
8277 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8278 iwl_conf->tx_mimo_ps_mode =
8279 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8280 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
8281
8282 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8283 iwl_conf->extension_chan_offset =
8284 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8285 iwl_conf->tx_chan_width =
8286 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8287 iwl_conf->ht_protection =
8288 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8289 iwl_conf->non_GF_STA_present =
8290 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
8291
8292 IWL_DEBUG_MAC80211("control channel %d\n",
8293 iwl_conf->control_channel);
b481de9c 8294 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 8295}
8296
bb8c093b 8297static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
fd105e79 8298 struct ieee80211_conf *conf)
b481de9c 8299{
bb8c093b 8300 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY		 8301
8302 IWL_DEBUG_MAC80211("enter: \n");
8303
fd105e79 8304 iwl4965_ht_info_fill(conf, priv);
b481de9c
ZY		 8305 iwl4965_set_rxon_chain(priv);
8306
8307 if (priv && priv->assoc_id &&
8308 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8309 unsigned long flags;
8310
8311 spin_lock_irqsave(&priv->lock, flags);
8312 if (priv->beacon_int)
8313 queue_work(priv->workqueue, &priv->post_associate.work);
8314 else
8315 priv->call_post_assoc_from_beacon = 1;
8316 spin_unlock_irqrestore(&priv->lock, flags);
8317 }
8318
fd105e79
RR		 8319 IWL_DEBUG_MAC80211("leave:\n");
8320 return 0;
b481de9c
ZY		 8321}
8322
bb8c093b 8323static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
8fb88032
RR		 8324 struct ieee80211_ht_cap *ht_cap,
8325 u8 use_current_config)
b481de9c 8326{
8fb88032
RR		 8327 struct ieee80211_conf *conf = &hw->conf;
8328 struct ieee80211_hw_mode *mode = conf->mode;
b481de9c 8329
8fb88032
RR		 8330 if (use_current_config) {
8331 ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
8332 memcpy(ht_cap->supp_mcs_set,
8333 conf->ht_conf.supp_mcs_set, 16);
8334 } else {
8335 ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
8336 memcpy(ht_cap->supp_mcs_set,
8337 mode->ht_info.supp_mcs_set, 16);
8338 }
8339 ht_cap->ampdu_params_info =
8340 (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
8341 ((mode->ht_info.ampdu_density << 2) &
8342 IEEE80211_HT_CAP_AMPDU_DENSITY);
b481de9c
ZY		 8343}
8344
c8b0e6e1 8345#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 8346
8347/*****************************************************************************
8348 *
8349 * sysfs attributes
8350 *
8351 *****************************************************************************/
8352
c8b0e6e1 8353#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY		 8354
8355/*
8356 * The following adds a new attribute to the sysfs representation
8357 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8358 * used for controlling the debug level.
8359 *
8360 * See the level definitions in iwl for details.
8361 */
8362
8363static ssize_t show_debug_level(struct device_driver *d, char *buf)
8364{
bb8c093b 8365 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
b481de9c
ZY		 8366}
8367static ssize_t store_debug_level(struct device_driver *d,
8368 const char *buf, size_t count)
8369{
8370 char *p = (char *)buf;
8371 u32 val;
8372
8373 val = simple_strtoul(p, &p, 0);
8374 if (p == buf)
8375 printk(KERN_INFO DRV_NAME
8376 ": %s is not in hex or decimal form.\n", buf);
8377 else
bb8c093b 8378 iwl4965_debug_level = val;
b481de9c
ZY		 8379
8380 return strnlen(buf, count);
8381}
8382
8383static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8384 show_debug_level, store_debug_level);
8385
c8b0e6e1 8386#endif /* CONFIG_IWL4965_DEBUG */
b481de9c
ZY		 8387
8388static ssize_t show_rf_kill(struct device *d,
8389 struct device_attribute *attr, char *buf)
8390{
8391 /*
8392 * 0 - RF kill not enabled
8393 * 1 - SW based RF kill active (sysfs)
8394 * 2 - HW based RF kill active
8395 * 3 - Both HW and SW based RF kill active
8396 */
bb8c093b 8397 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8398 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8399 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8400
8401 return sprintf(buf, "%i\n", val);
8402}
8403
8404static ssize_t store_rf_kill(struct device *d,
8405 struct device_attribute *attr,
8406 const char *buf, size_t count)
8407{
bb8c093b 8408 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8409
8410 mutex_lock(&priv->mutex);
bb8c093b 8411 iwl4965_radio_kill_sw(priv, buf[0] == '1');
b481de9c
ZY		 8412 mutex_unlock(&priv->mutex);
8413
8414 return count;
8415}
8416
8417static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8418
8419static ssize_t show_temperature(struct device *d,
8420 struct device_attribute *attr, char *buf)
8421{
bb8c093b 8422 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c 8423
bb8c093b 8424 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8425 return -EAGAIN;
8426
bb8c093b 8427 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 8428}
8429
8430static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8431
8432static ssize_t show_rs_window(struct device *d,
8433 struct device_attribute *attr,
8434 char *buf)
8435{
bb8c093b
CH		 8436 struct iwl4965_priv *priv = d->driver_data;
8437 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 8438}
8439static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8440
8441static ssize_t show_tx_power(struct device *d,
8442 struct device_attribute *attr, char *buf)
8443{
bb8c093b 8444 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8445 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8446}
8447
8448static ssize_t store_tx_power(struct device *d,
8449 struct device_attribute *attr,
8450 const char *buf, size_t count)
8451{
bb8c093b 8452 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8453 char *p = (char *)buf;
8454 u32 val;
8455
8456 val = simple_strtoul(p, &p, 10);
8457 if (p == buf)
8458 printk(KERN_INFO DRV_NAME
8459 ": %s is not in decimal form.\n", buf);
8460 else
bb8c093b 8461 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 8462
8463 return count;
8464}
8465
8466static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8467
8468static ssize_t show_flags(struct device *d,
8469 struct device_attribute *attr, char *buf)
8470{
bb8c093b 8471 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8472
8473 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8474}
8475
8476static ssize_t store_flags(struct device *d,
8477 struct device_attribute *attr,
8478 const char *buf, size_t count)
8479{
bb8c093b 8480 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8481 u32 flags = simple_strtoul(buf, NULL, 0);
8482
8483 mutex_lock(&priv->mutex);
8484 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8485 /* Cancel any currently running scans... */
bb8c093b 8486 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8487 IWL_WARNING("Could not cancel scan.\n");
8488 else {
8489 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8490 flags);
8491 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 8492 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8493 }
8494 }
8495 mutex_unlock(&priv->mutex);
8496
8497 return count;
8498}
8499
8500static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8501
8502static ssize_t show_filter_flags(struct device *d,
8503 struct device_attribute *attr, char *buf)
8504{
bb8c093b 8505 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8506
8507 return sprintf(buf, "0x%04X\n",
8508 le32_to_cpu(priv->active_rxon.filter_flags));
8509}
8510
8511static ssize_t store_filter_flags(struct device *d,
8512 struct device_attribute *attr,
8513 const char *buf, size_t count)
8514{
bb8c093b 8515 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8516 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8517
8518 mutex_lock(&priv->mutex);
8519 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8520 /* Cancel any currently running scans... */
bb8c093b 8521 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8522 IWL_WARNING("Could not cancel scan.\n");
8523 else {
8524 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8525 "0x%04X\n", filter_flags);
8526 priv->staging_rxon.filter_flags =
8527 cpu_to_le32(filter_flags);
bb8c093b 8528 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8529 }
8530 }
8531 mutex_unlock(&priv->mutex);
8532
8533 return count;
8534}
8535
8536static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8537 store_filter_flags);
8538
8539static ssize_t show_tune(struct device *d,
8540 struct device_attribute *attr, char *buf)
8541{
bb8c093b 8542 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8543
8544 return sprintf(buf, "0x%04X\n",
8545 (priv->phymode << 8) |
8546 le16_to_cpu(priv->active_rxon.channel));
8547}
8548
bb8c093b 8549static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
b481de9c
ZY		 8550
8551static ssize_t store_tune(struct device *d,
8552 struct device_attribute *attr,
8553 const char *buf, size_t count)
8554{
bb8c093b 8555 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY		 8556 char *p = (char *)buf;
8557 u16 tune = simple_strtoul(p, &p, 0);
8558 u8 phymode = (tune >> 8) & 0xff;
8559 u16 channel = tune & 0xff;
8560
8561 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8562
8563 mutex_lock(&priv->mutex);
8564 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8565 (priv->phymode != phymode)) {
bb8c093b 8566 const struct iwl4965_channel_info *ch_info;
b481de9c 8567
bb8c093b 8568 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
b481de9c
ZY		 8569 if (!ch_info) {
8570 IWL_WARNING("Requested invalid phymode/channel "
8571 "combination: %d %d\n", phymode, channel);
8572 mutex_unlock(&priv->mutex);
8573 return -EINVAL;
8574 }
8575
8576 /* Cancel any currently running scans... */
bb8c093b 8577 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8578 IWL_WARNING("Could not cancel scan.\n");
8579 else {
8580 IWL_DEBUG_INFO("Committing phymode and "
8581 "rxon.channel = %d %d\n",
8582 phymode, channel);
8583
bb8c093b
CH		 8584 iwl4965_set_rxon_channel(priv, phymode, channel);
8585 iwl4965_set_flags_for_phymode(priv, phymode);
b481de9c 8586
bb8c093b
CH		 8587 iwl4965_set_rate(priv);
8588 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8589 }
8590 }
8591 mutex_unlock(&priv->mutex);
8592
8593 return count;
8594}
8595
8596static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8597
c8b0e6e1 8598#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8599
8600static ssize_t show_measurement(struct device *d,
8601 struct device_attribute *attr, char *buf)
8602{
bb8c093b
CH		 8603 struct iwl4965_priv *priv = dev_get_drvdata(d);
8604 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 8605 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8606 u8 *data = (u8 *) & measure_report;
8607 unsigned long flags;
8608
8609 spin_lock_irqsave(&priv->lock, flags);
8610 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8611 spin_unlock_irqrestore(&priv->lock, flags);
8612 return 0;
8613 }
8614 memcpy(&measure_report, &priv->measure_report, size);
8615 priv->measurement_status = 0;
8616 spin_unlock_irqrestore(&priv->lock, flags);
8617
8618 while (size && (PAGE_SIZE - len)) {
8619 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8620 PAGE_SIZE - len, 1);
8621 len = strlen(buf);
8622 if (PAGE_SIZE - len)
8623 buf[len++] = '\n';
8624
8625 ofs += 16;
8626 size -= min(size, 16U);
8627 }
8628
8629 return len;
8630}
8631
8632static ssize_t store_measurement(struct device *d,
8633 struct device_attribute *attr,
8634 const char *buf, size_t count)
8635{
bb8c093b 8636 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8637 struct ieee80211_measurement_params params = {
8638 .channel = le16_to_cpu(priv->active_rxon.channel),
8639 .start_time = cpu_to_le64(priv->last_tsf),
8640 .duration = cpu_to_le16(1),
8641 };
8642 u8 type = IWL_MEASURE_BASIC;
8643 u8 buffer[32];
8644 u8 channel;
8645
8646 if (count) {
8647 char *p = buffer;
8648 strncpy(buffer, buf, min(sizeof(buffer), count));
8649 channel = simple_strtoul(p, NULL, 0);
8650 if (channel)
8651 params.channel = channel;
8652
8653 p = buffer;
8654 while (*p && *p != ' ')
8655 p++;
8656 if (*p)
8657 type = simple_strtoul(p + 1, NULL, 0);
8658 }
8659
8660 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8661 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 8662 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 8663
8664 return count;
8665}
8666
8667static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8668 show_measurement, store_measurement);
c8b0e6e1 8669#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 8670
8671static ssize_t store_retry_rate(struct device *d,
8672 struct device_attribute *attr,
8673 const char *buf, size_t count)
8674{
bb8c093b 8675 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8676
8677 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8678 if (priv->retry_rate <= 0)
8679 priv->retry_rate = 1;
8680
8681 return count;
8682}
8683
8684static ssize_t show_retry_rate(struct device *d,
8685 struct device_attribute *attr, char *buf)
8686{
bb8c093b 8687 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8688 return sprintf(buf, "%d", priv->retry_rate);
8689}
8690
8691static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8692 store_retry_rate);
8693
8694static ssize_t store_power_level(struct device *d,
8695 struct device_attribute *attr,
8696 const char *buf, size_t count)
8697{
bb8c093b 8698 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8699 int rc;
8700 int mode;
8701
8702 mode = simple_strtoul(buf, NULL, 0);
8703 mutex_lock(&priv->mutex);
8704
bb8c093b 8705 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 8706 rc = -EAGAIN;
8707 goto out;
8708 }
8709
8710 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8711 mode = IWL_POWER_AC;
8712 else
8713 mode |= IWL_POWER_ENABLED;
8714
8715 if (mode != priv->power_mode) {
bb8c093b 8716 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY		 8717 if (rc) {
8718 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8719 goto out;
8720 }
8721 priv->power_mode = mode;
8722 }
8723
8724 rc = count;
8725
8726 out:
8727 mutex_unlock(&priv->mutex);
8728 return rc;
8729}
8730
8731#define MAX_WX_STRING 80
8732
8733/* Values are in microsecond */
8734static const s32 timeout_duration[] = {
8735 350000,
8736 250000,
8737 75000,
8738 37000,
8739 25000,
8740};
8741static const s32 period_duration[] = {
8742 400000,
8743 700000,
8744 1000000,
8745 1000000,
8746 1000000
8747};
8748
8749static ssize_t show_power_level(struct device *d,
8750 struct device_attribute *attr, char *buf)
8751{
bb8c093b 8752 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8753 int level = IWL_POWER_LEVEL(priv->power_mode);
8754 char *p = buf;
8755
8756 p += sprintf(p, "%d ", level);
8757 switch (level) {
8758 case IWL_POWER_MODE_CAM:
8759 case IWL_POWER_AC:
8760 p += sprintf(p, "(AC)");
8761 break;
8762 case IWL_POWER_BATTERY:
8763 p += sprintf(p, "(BATTERY)");
8764 break;
8765 default:
8766 p += sprintf(p,
8767 "(Timeout %dms, Period %dms)",
8768 timeout_duration[level - 1] / 1000,
8769 period_duration[level - 1] / 1000);
8770 }
8771
8772 if (!(priv->power_mode & IWL_POWER_ENABLED))
8773 p += sprintf(p, " OFF\n");
8774 else
8775 p += sprintf(p, " \n");
8776
8777 return (p - buf + 1);
8778
8779}
8780
8781static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8782 store_power_level);
8783
8784static ssize_t show_channels(struct device *d,
8785 struct device_attribute *attr, char *buf)
8786{
bb8c093b 8787 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8788 int len = 0, i;
8789 struct ieee80211_channel *channels = NULL;
8790 const struct ieee80211_hw_mode *hw_mode = NULL;
8791 int count = 0;
8792
bb8c093b 8793 if (!iwl4965_is_ready(priv))
b481de9c
ZY		 8794 return -EAGAIN;
8795
bb8c093b 8796 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
b481de9c 8797 if (!hw_mode)
bb8c093b 8798 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
b481de9c
ZY		 8799 if (hw_mode) {
8800 channels = hw_mode->channels;
8801 count = hw_mode->num_channels;
8802 }
8803
8804 len +=
8805 sprintf(&buf[len],
8806 "Displaying %d channels in 2.4GHz band "
8807 "(802.11bg):\n", count);
8808
8809 for (i = 0; i < count; i++)
8810 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8811 channels[i].chan,
8812 channels[i].power_level,
8813 channels[i].
8814 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8815 " (IEEE 802.11h required)" : "",
8816 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8817 || (channels[i].
8818 flag &
8819 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8820 ", IBSS",
8821 channels[i].
8822 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8823 "active/passive" : "passive only");
8824
bb8c093b 8825 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
b481de9c
ZY		 8826 if (hw_mode) {
8827 channels = hw_mode->channels;
8828 count = hw_mode->num_channels;
8829 } else {
8830 channels = NULL;
8831 count = 0;
8832 }
8833
8834 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8835 "(802.11a):\n", count);
8836
8837 for (i = 0; i < count; i++)
8838 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8839 channels[i].chan,
8840 channels[i].power_level,
8841 channels[i].
8842 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8843 " (IEEE 802.11h required)" : "",
8844 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8845 || (channels[i].
8846 flag &
8847 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8848 ", IBSS",
8849 channels[i].
8850 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8851 "active/passive" : "passive only");
8852
8853 return len;
8854}
8855
8856static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8857
8858static ssize_t show_statistics(struct device *d,
8859 struct device_attribute *attr, char *buf)
8860{
bb8c093b
CH		 8861 struct iwl4965_priv *priv = dev_get_drvdata(d);
8862 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 8863 u32 len = 0, ofs = 0;
8864 u8 *data = (u8 *) & priv->statistics;
8865 int rc = 0;
8866
bb8c093b 8867 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8868 return -EAGAIN;
8869
8870 mutex_lock(&priv->mutex);
bb8c093b 8871 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY		 8872 mutex_unlock(&priv->mutex);
8873
8874 if (rc) {
8875 len = sprintf(buf,
8876 "Error sending statistics request: 0x%08X\n", rc);
8877 return len;
8878 }
8879
8880 while (size && (PAGE_SIZE - len)) {
8881 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8882 PAGE_SIZE - len, 1);
8883 len = strlen(buf);
8884 if (PAGE_SIZE - len)
8885 buf[len++] = '\n';
8886
8887 ofs += 16;
8888 size -= min(size, 16U);
8889 }
8890
8891 return len;
8892}
8893
8894static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8895
8896static ssize_t show_antenna(struct device *d,
8897 struct device_attribute *attr, char *buf)
8898{
bb8c093b 8899 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c 8900
bb8c093b 8901 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8902 return -EAGAIN;
8903
8904 return sprintf(buf, "%d\n", priv->antenna);
8905}
8906
8907static ssize_t store_antenna(struct device *d,
8908 struct device_attribute *attr,
8909 const char *buf, size_t count)
8910{
8911 int ant;
bb8c093b 8912 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8913
8914 if (count == 0)
8915 return 0;
8916
8917 if (sscanf(buf, "%1i", &ant) != 1) {
8918 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8919 return count;
8920 }
8921
8922 if ((ant >= 0) && (ant <= 2)) {
8923 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 8924 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY		 8925 } else
8926 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8927
8928
8929 return count;
8930}
8931
8932static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8933
8934static ssize_t show_status(struct device *d,
8935 struct device_attribute *attr, char *buf)
8936{
bb8c093b
CH		 8937 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8938 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8939 return -EAGAIN;
8940 return sprintf(buf, "0x%08x\n", (int)priv->status);
8941}
8942
8943static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8944
8945static ssize_t dump_error_log(struct device *d,
8946 struct device_attribute *attr,
8947 const char *buf, size_t count)
8948{
8949 char *p = (char *)buf;
8950
8951 if (p[0] == '1')
bb8c093b 8952 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
b481de9c
ZY		 8953
8954 return strnlen(buf, count);
8955}
8956
8957static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8958
8959static ssize_t dump_event_log(struct device *d,
8960 struct device_attribute *attr,
8961 const char *buf, size_t count)
8962{
8963 char *p = (char *)buf;
8964
8965 if (p[0] == '1')
bb8c093b 8966 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
b481de9c
ZY		 8967
8968 return strnlen(buf, count);
8969}
8970
8971static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8972
8973/*****************************************************************************
8974 *
8975 * driver setup and teardown
8976 *
8977 *****************************************************************************/
8978
bb8c093b 8979static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
b481de9c
ZY		 8980{
8981 priv->workqueue = create_workqueue(DRV_NAME);
8982
8983 init_waitqueue_head(&priv->wait_command_queue);
8984
bb8c093b
CH		 8985 INIT_WORK(&priv->up, iwl4965_bg_up);
8986 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8987 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8988 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8989 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8990 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8991 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8992 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8993 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8994 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8995 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8996 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8997
8998 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 8999
9000 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 9001 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 9002}
9003
bb8c093b 9004static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
b481de9c 9005{
bb8c093b 9006 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 9007
3ae6a054 9008 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 9009 cancel_delayed_work(&priv->scan_check);
9010 cancel_delayed_work(&priv->alive_start);
9011 cancel_delayed_work(&priv->post_associate);
9012 cancel_work_sync(&priv->beacon_update);
9013}
9014
bb8c093b 9015static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 9016 &dev_attr_antenna.attr,
9017 &dev_attr_channels.attr,
9018 &dev_attr_dump_errors.attr,
9019 &dev_attr_dump_events.attr,
9020 &dev_attr_flags.attr,
9021 &dev_attr_filter_flags.attr,
c8b0e6e1 9022#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 9023 &dev_attr_measurement.attr,
9024#endif
9025 &dev_attr_power_level.attr,
9026 &dev_attr_retry_rate.attr,
9027 &dev_attr_rf_kill.attr,
9028 &dev_attr_rs_window.attr,
9029 &dev_attr_statistics.attr,
9030 &dev_attr_status.attr,
9031 &dev_attr_temperature.attr,
9032 &dev_attr_tune.attr,
9033 &dev_attr_tx_power.attr,
9034
9035 NULL
9036};
9037
bb8c093b 9038static struct attribute_group iwl4965_attribute_group = {
b481de9c 9039 .name = NULL, /* put in device directory */
bb8c093b 9040 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 9041};
9042
bb8c093b
CH		 9043static struct ieee80211_ops iwl4965_hw_ops = {
9044 .tx = iwl4965_mac_tx,
9045 .start = iwl4965_mac_start,
9046 .stop = iwl4965_mac_stop,
9047 .add_interface = iwl4965_mac_add_interface,
9048 .remove_interface = iwl4965_mac_remove_interface,
9049 .config = iwl4965_mac_config,
9050 .config_interface = iwl4965_mac_config_interface,
9051 .configure_filter = iwl4965_configure_filter,
9052 .set_key = iwl4965_mac_set_key,
9053 .get_stats = iwl4965_mac_get_stats,
9054 .get_tx_stats = iwl4965_mac_get_tx_stats,
9055 .conf_tx = iwl4965_mac_conf_tx,
9056 .get_tsf = iwl4965_mac_get_tsf,
9057 .reset_tsf = iwl4965_mac_reset_tsf,
9058 .beacon_update = iwl4965_mac_beacon_update,
9059 .erp_ie_changed = iwl4965_mac_erp_ie_changed,
c8b0e6e1 9060#ifdef CONFIG_IWL4965_HT
bb8c093b 9061 .conf_ht = iwl4965_mac_conf_ht,
c8b0e6e1 9062#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b
CH		 9063 .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
9064 .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
9065 .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start,
9066 .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop,
c8b0e6e1
CH		 9067#endif /* CONFIG_IWL4965_HT_AGG */
9068#endif /* CONFIG_IWL4965_HT */
bb8c093b 9069 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 9070};
9071
bb8c093b 9072static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 9073{
9074 int err = 0;
bb8c093b 9075 struct iwl4965_priv *priv;
b481de9c
ZY		 9076 struct ieee80211_hw *hw;
9077 int i;
9078
6440adb5
CB		 9079 /* Disabling hardware scan means that mac80211 will perform scans
9080 * "the hard way", rather than using device's scan. */
bb8c093b 9081 if (iwl4965_param_disable_hw_scan) {
b481de9c 9082 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 9083 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 9084 }
9085
bb8c093b
CH		 9086 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
9087 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
b481de9c
ZY		 9088 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
9089 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
9090 err = -EINVAL;
9091 goto out;
9092 }
9093
9094 /* mac80211 allocates memory for this device instance, including
9095 * space for this driver's private structure */
bb8c093b 9096 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
b481de9c
ZY		 9097 if (hw == NULL) {
9098 IWL_ERROR("Can not allocate network device\n");
9099 err = -ENOMEM;
9100 goto out;
9101 }
9102 SET_IEEE80211_DEV(hw, &pdev->dev);
9103
f51359a8
JB		 9104 hw->rate_control_algorithm = "iwl-4965-rs";
9105
b481de9c
ZY		 9106 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
9107 priv = hw->priv;
9108 priv->hw = hw;
9109
9110 priv->pci_dev = pdev;
bb8c093b 9111 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
c8b0e6e1 9112#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9113 iwl4965_debug_level = iwl4965_param_debug;
b481de9c
ZY		 9114 atomic_set(&priv->restrict_refcnt, 0);
9115#endif
9116 priv->retry_rate = 1;
9117
9118 priv->ibss_beacon = NULL;
9119
9120 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
9121 * the range of signal quality values that we'll provide.
9122 * Negative values for level/noise indicate that we'll provide dBm.
9123 * For WE, at least, non-0 values here *enable* display of values
9124 * in app (iwconfig). */
9125 hw->max_rssi = -20; /* signal level, negative indicates dBm */
9126 hw->max_noise = -20; /* noise level, negative indicates dBm */
9127 hw->max_signal = 100; /* link quality indication (%) */
9128
9129 /* Tell mac80211 our Tx characteristics */
9130 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
9131
6440adb5 9132 /* Default value; 4 EDCA QOS priorities */
b481de9c 9133 hw->queues = 4;
c8b0e6e1
CH		 9134#ifdef CONFIG_IWL4965_HT
9135#ifdef CONFIG_IWL4965_HT_AGG
6440adb5 9136 /* Enhanced value; more queues, to support 11n aggregation */
b481de9c 9137 hw->queues = 16;
c8b0e6e1
CH		 9138#endif /* CONFIG_IWL4965_HT_AGG */
9139#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 9140
9141 spin_lock_init(&priv->lock);
9142 spin_lock_init(&priv->power_data.lock);
9143 spin_lock_init(&priv->sta_lock);
9144 spin_lock_init(&priv->hcmd_lock);
9145 spin_lock_init(&priv->lq_mngr.lock);
9146
9147 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
9148 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
9149
9150 INIT_LIST_HEAD(&priv->free_frames);
9151
9152 mutex_init(&priv->mutex);
9153 if (pci_enable_device(pdev)) {
9154 err = -ENODEV;
9155 goto out_ieee80211_free_hw;
9156 }
9157
9158 pci_set_master(pdev);
9159
6440adb5 9160 /* Clear the driver's (not device's) station table */
bb8c093b 9161 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 9162
9163 priv->data_retry_limit = -1;
9164 priv->ieee_channels = NULL;
9165 priv->ieee_rates = NULL;
9166 priv->phymode = -1;
9167
9168 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
9169 if (!err)
9170 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
9171 if (err) {
9172 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
9173 goto out_pci_disable_device;
9174 }
9175
9176 pci_set_drvdata(pdev, priv);
9177 err = pci_request_regions(pdev, DRV_NAME);
9178 if (err)
9179 goto out_pci_disable_device;
6440adb5 9180
b481de9c
ZY		 9181 /* We disable the RETRY_TIMEOUT register (0x41) to keep
9182 * PCI Tx retries from interfering with C3 CPU state */
9183 pci_write_config_byte(pdev, 0x41, 0x00);
6440adb5 9184
b481de9c
ZY		 9185 priv->hw_base = pci_iomap(pdev, 0, 0);
9186 if (!priv->hw_base) {
9187 err = -ENODEV;
9188 goto out_pci_release_regions;
9189 }
9190
9191 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
9192 (unsigned long long) pci_resource_len(pdev, 0));
9193 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
9194
9195 /* Initialize module parameter values here */
9196
6440adb5 9197 /* Disable radio (SW RF KILL) via parameter when loading driver */
bb8c093b 9198 if (iwl4965_param_disable) {
b481de9c
ZY		 9199 set_bit(STATUS_RF_KILL_SW, &priv->status);
9200 IWL_DEBUG_INFO("Radio disabled.\n");
9201 }
9202
9203 priv->iw_mode = IEEE80211_IF_TYPE_STA;
9204
9205 priv->ps_mode = 0;
9206 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
b481de9c
ZY		 9207 priv->valid_antenna = 0x7; /* assume all 3 connected */
9208 priv->ps_mode = IWL_MIMO_PS_NONE;
b481de9c 9209
6440adb5 9210 /* Choose which receivers/antennas to use */
b481de9c
ZY		 9211 iwl4965_set_rxon_chain(priv);
9212
9213 printk(KERN_INFO DRV_NAME
9214 ": Detected Intel Wireless WiFi Link 4965AGN\n");
9215
9216 /* Device-specific setup */
bb8c093b 9217 if (iwl4965_hw_set_hw_setting(priv)) {
b481de9c
ZY		 9218 IWL_ERROR("failed to set hw settings\n");
9219 mutex_unlock(&priv->mutex);
9220 goto out_iounmap;
9221 }
9222
c8b0e6e1 9223#ifdef CONFIG_IWL4965_QOS
bb8c093b 9224 if (iwl4965_param_qos_enable)
b481de9c
ZY		 9225 priv->qos_data.qos_enable = 1;
9226
bb8c093b 9227 iwl4965_reset_qos(priv);
b481de9c
ZY		 9228
9229 priv->qos_data.qos_active = 0;
9230 priv->qos_data.qos_cap.val = 0;
c8b0e6e1 9231#endif /* CONFIG_IWL4965_QOS */
b481de9c 9232
bb8c093b
CH		 9233 iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
9234 iwl4965_setup_deferred_work(priv);
9235 iwl4965_setup_rx_handlers(priv);
b481de9c
ZY		 9236
9237 priv->rates_mask = IWL_RATES_MASK;
9238 /* If power management is turned on, default to AC mode */
9239 priv->power_mode = IWL_POWER_AC;
9240 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
9241
bb8c093b 9242 iwl4965_disable_interrupts(priv);
49df2b33 9243
b481de9c
ZY		 9244 pci_enable_msi(pdev);
9245
bb8c093b 9246 err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
b481de9c
ZY		 9247 if (err) {
9248 IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
9249 goto out_disable_msi;
9250 }
9251
9252 mutex_lock(&priv->mutex);
9253
bb8c093b 9254 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 9255 if (err) {
9256 IWL_ERROR("failed to create sysfs device attributes\n");
9257 mutex_unlock(&priv->mutex);
9258 goto out_release_irq;
9259 }
9260
9261 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
9262 * ucode filename and max sizes are card-specific. */
bb8c093b 9263 err = iwl4965_read_ucode(priv);
b481de9c
ZY		 9264 if (err) {
9265 IWL_ERROR("Could not read microcode: %d\n", err);
9266 mutex_unlock(&priv->mutex);
9267 goto out_pci_alloc;
9268 }
9269
9270 mutex_unlock(&priv->mutex);
9271
01ebd063 9272 IWL_DEBUG_INFO("Queueing UP work.\n");
b481de9c
ZY		 9273
9274 queue_work(priv->workqueue, &priv->up);
9275
9276 return 0;
9277
9278 out_pci_alloc:
bb8c093b 9279 iwl4965_dealloc_ucode_pci(priv);
b481de9c 9280
bb8c093b 9281 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 9282
9283 out_release_irq:
9284 free_irq(pdev->irq, priv);
9285
9286 out_disable_msi:
9287 pci_disable_msi(pdev);
9288 destroy_workqueue(priv->workqueue);
9289 priv->workqueue = NULL;
bb8c093b 9290 iwl4965_unset_hw_setting(priv);
b481de9c
ZY		 9291
9292 out_iounmap:
9293 pci_iounmap(pdev, priv->hw_base);
9294 out_pci_release_regions:
9295 pci_release_regions(pdev);
9296 out_pci_disable_device:
9297 pci_disable_device(pdev);
9298 pci_set_drvdata(pdev, NULL);
9299 out_ieee80211_free_hw:
9300 ieee80211_free_hw(priv->hw);
9301 out:
9302 return err;
9303}
9304
bb8c093b 9305static void iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 9306{
bb8c093b 9307 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 9308 struct list_head *p, *q;
9309 int i;
9310
9311 if (!priv)
9312 return;
9313
9314 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9315
b481de9c 9316 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 9317
bb8c093b 9318 iwl4965_down(priv);
b481de9c
ZY		 9319
9320 /* Free MAC hash list for ADHOC */
9321 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9322 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9323 list_del(p);
bb8c093b 9324 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 9325 }
9326 }
9327
bb8c093b 9328 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 9329
bb8c093b 9330 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 9331
9332 if (priv->rxq.bd)
bb8c093b
CH		 9333 iwl4965_rx_queue_free(priv, &priv->rxq);
9334 iwl4965_hw_txq_ctx_free(priv);
b481de9c 9335
bb8c093b
CH		 9336 iwl4965_unset_hw_setting(priv);
9337 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 9338
9339 if (priv->mac80211_registered) {
9340 ieee80211_unregister_hw(priv->hw);
bb8c093b 9341 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY		 9342 }
9343
948c171c
MA		 9344 /*netif_stop_queue(dev); */
9345 flush_workqueue(priv->workqueue);
9346
bb8c093b 9347 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 9348 * priv->workqueue... so we can't take down the workqueue
9349 * until now... */
9350 destroy_workqueue(priv->workqueue);
9351 priv->workqueue = NULL;
9352
9353 free_irq(pdev->irq, priv);
9354 pci_disable_msi(pdev);
9355 pci_iounmap(pdev, priv->hw_base);
9356 pci_release_regions(pdev);
9357 pci_disable_device(pdev);
9358 pci_set_drvdata(pdev, NULL);
9359
9360 kfree(priv->channel_info);
9361
9362 kfree(priv->ieee_channels);
9363 kfree(priv->ieee_rates);
9364
9365 if (priv->ibss_beacon)
9366 dev_kfree_skb(priv->ibss_beacon);
9367
9368 ieee80211_free_hw(priv->hw);
9369}
9370
9371#ifdef CONFIG_PM
9372
bb8c093b 9373static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 9374{
bb8c093b 9375 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c 9376
b481de9c
ZY		 9377 set_bit(STATUS_IN_SUSPEND, &priv->status);
9378
9379 /* Take down the device; powers it off, etc. */
bb8c093b 9380 iwl4965_down(priv);
b481de9c
ZY		 9381
9382 if (priv->mac80211_registered)
9383 ieee80211_stop_queues(priv->hw);
9384
9385 pci_save_state(pdev);
9386 pci_disable_device(pdev);
9387 pci_set_power_state(pdev, PCI_D3hot);
9388
b481de9c
ZY		 9389 return 0;
9390}
9391
bb8c093b 9392static void iwl4965_resume(struct iwl4965_priv *priv)
b481de9c
ZY		 9393{
9394 unsigned long flags;
9395
9396 /* The following it a temporary work around due to the
9397 * suspend / resume not fully initializing the NIC correctly.
9398 * Without all of the following, resume will not attempt to take
9399 * down the NIC (it shouldn't really need to) and will just try
9400 * and bring the NIC back up. However that fails during the
bb8c093b
CH		 9401 * ucode verification process. This then causes iwl4965_down to be
9402 * called *after* iwl4965_hw_nic_init() has succeeded -- which
b481de9c
ZY		 9403 * then lets the next init sequence succeed. So, we've
9404 * replicated all of that NIC init code here... */
9405
bb8c093b 9406 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 9407
bb8c093b 9408 iwl4965_hw_nic_init(priv);
b481de9c 9409
bb8c093b
CH		 9410 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9411 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 9412 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH		 9413 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
9414 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9415 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 9416
9417 /* tell the device to stop sending interrupts */
bb8c093b 9418 iwl4965_disable_interrupts(priv);
b481de9c
ZY		 9419
9420 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 9421 iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c 9422
bb8c093b
CH		 9423 if (!iwl4965_grab_nic_access(priv)) {
9424 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
ac17a947 9425 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 9426 iwl4965_release_nic_access(priv);
b481de9c
ZY		 9427 }
9428 spin_unlock_irqrestore(&priv->lock, flags);
9429
9430 udelay(5);
9431
bb8c093b 9432 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 9433
9434 /* Bring the device back up */
9435 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9436 queue_work(priv->workqueue, &priv->up);
9437}
9438
bb8c093b 9439static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 9440{
bb8c093b 9441 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 9442 int err;
9443
9444 printk(KERN_INFO "Coming out of suspend...\n");
9445
b481de9c
ZY		 9446 pci_set_power_state(pdev, PCI_D0);
9447 err = pci_enable_device(pdev);
9448 pci_restore_state(pdev);
9449
9450 /*
9451 * Suspend/Resume resets the PCI configuration space, so we have to
9452 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
9453 * from interfering with C3 CPU state. pci_restore_state won't help
9454 * here since it only restores the first 64 bytes pci config header.
9455 */
9456 pci_write_config_byte(pdev, 0x41, 0x00);
9457
bb8c093b 9458 iwl4965_resume(priv);
b481de9c
ZY		 9459
9460 return 0;
9461}
9462
9463#endif /* CONFIG_PM */
9464
9465/*****************************************************************************
9466 *
9467 * driver and module entry point
9468 *
9469 *****************************************************************************/
9470
bb8c093b 9471static struct pci_driver iwl4965_driver = {
b481de9c 9472 .name = DRV_NAME,
bb8c093b
CH		 9473 .id_table = iwl4965_hw_card_ids,
9474 .probe = iwl4965_pci_probe,
9475 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 9476#ifdef CONFIG_PM
bb8c093b
CH		 9477 .suspend = iwl4965_pci_suspend,
9478 .resume = iwl4965_pci_resume,
b481de9c
ZY		 9479#endif
9480};
9481
bb8c093b 9482static int __init iwl4965_init(void)
b481de9c
ZY		 9483{
9484
9485 int ret;
9486 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9487 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
bb8c093b 9488 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY		 9489 if (ret) {
9490 IWL_ERROR("Unable to initialize PCI module\n");
9491 return ret;
9492 }
c8b0e6e1 9493#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9494 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 9495 if (ret) {
9496 IWL_ERROR("Unable to create driver sysfs file\n");
bb8c093b 9497 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 9498 return ret;
9499 }
9500#endif
9501
9502 return ret;
9503}
9504
bb8c093b 9505static void __exit iwl4965_exit(void)
b481de9c 9506{
c8b0e6e1 9507#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9508 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 9509#endif
bb8c093b 9510 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 9511}
9512
bb8c093b 9513module_param_named(antenna, iwl4965_param_antenna, int, 0444);
b481de9c 9514MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
bb8c093b 9515module_param_named(disable, iwl4965_param_disable, int, 0444);
b481de9c 9516MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
bb8c093b 9517module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
b481de9c
ZY		 9518MODULE_PARM_DESC(hwcrypto,
9519 "using hardware crypto engine (default 0 [software])\n");
bb8c093b 9520module_param_named(debug, iwl4965_param_debug, int, 0444);
b481de9c 9521MODULE_PARM_DESC(debug, "debug output mask");
bb8c093b 9522module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
b481de9c
ZY		 9523MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9524
bb8c093b 9525module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
b481de9c
ZY		 9526MODULE_PARM_DESC(queues_num, "number of hw queues.");
9527
9528/* QoS */
bb8c093b 9529module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
b481de9c 9530MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9ee1ba47
RR		 9531module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
9532MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
b481de9c 9533
bb8c093b
CH		 9534module_exit(iwl4965_exit);
9535module_init(iwl4965_init);
Linux kernel - Deliverables
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