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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
3 | * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved. | |
4 | * | |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
30 | /* | |
31 | * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets | |
32 | * by defining IWL to either 3945 or 4965. The Makefile used when building | |
33 | * the base targets will create base-3945.o and base-4965.o | |
34 | * | |
35 | * The eventual goal is to move as many of the #if IWL / #endif blocks out of | |
36 | * this file and into the hardware specific implementation files (iwl-XXXX.c) | |
37 | * and leave only the common (non #ifdef sprinkled) code in this file | |
38 | */ | |
39 | ||
40 | #include <linux/kernel.h> | |
41 | #include <linux/module.h> | |
42 | #include <linux/version.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/pci.h> | |
45 | #include <linux/dma-mapping.h> | |
46 | #include <linux/delay.h> | |
47 | #include <linux/skbuff.h> | |
48 | #include <linux/netdevice.h> | |
49 | #include <linux/wireless.h> | |
50 | #include <linux/firmware.h> | |
b481de9c ZY |
51 | #include <linux/etherdevice.h> |
52 | #include <linux/if_arp.h> | |
53 | ||
54 | #include <net/ieee80211_radiotap.h> | |
55 | #include <net/mac80211.h> | |
56 | ||
57 | #include <asm/div64.h> | |
58 | ||
b481de9c ZY |
59 | #include "iwl-4965.h" |
60 | #include "iwl-helpers.h" | |
61 | ||
c8b0e6e1 | 62 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 63 | u32 iwl4965_debug_level; |
b481de9c ZY |
64 | #endif |
65 | ||
bb8c093b CH |
66 | static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv, |
67 | struct iwl4965_tx_queue *txq); | |
416e1438 | 68 | |
b481de9c ZY |
69 | /****************************************************************************** |
70 | * | |
71 | * module boiler plate | |
72 | * | |
73 | ******************************************************************************/ | |
74 | ||
75 | /* module parameters */ | |
bb8c093b CH |
76 | static int iwl4965_param_disable_hw_scan; |
77 | static int iwl4965_param_debug; | |
78 | static int iwl4965_param_disable; /* def: enable radio */ | |
79 | static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */ | |
80 | int iwl4965_param_hwcrypto; /* def: using software encryption */ | |
81 | static int iwl4965_param_qos_enable = 1; | |
82 | int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; | |
b481de9c ZY |
83 | |
84 | /* | |
85 | * module name, copyright, version, etc. | |
86 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
87 | */ | |
88 | ||
89 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
90 | ||
c8b0e6e1 | 91 | #ifdef CONFIG_IWL4965_DEBUG |
b481de9c ZY |
92 | #define VD "d" |
93 | #else | |
94 | #define VD | |
95 | #endif | |
96 | ||
c8b0e6e1 | 97 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
98 | #define VS "s" |
99 | #else | |
100 | #define VS | |
101 | #endif | |
102 | ||
80f3e024 | 103 | #define IWLWIFI_VERSION "1.1.19k" VD VS |
b481de9c ZY |
104 | #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation" |
105 | #define DRV_VERSION IWLWIFI_VERSION | |
106 | ||
107 | /* Change firmware file name, using "-" and incrementing number, | |
108 | * *only* when uCode interface or architecture changes so that it | |
109 | * is not compatible with earlier drivers. | |
110 | * This number will also appear in << 8 position of 1st dword of uCode file */ | |
111 | #define IWL4965_UCODE_API "-1" | |
112 | ||
113 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
114 | MODULE_VERSION(DRV_VERSION); | |
115 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
116 | MODULE_LICENSE("GPL"); | |
117 | ||
118 | __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr) | |
119 | { | |
120 | u16 fc = le16_to_cpu(hdr->frame_control); | |
121 | int hdr_len = ieee80211_get_hdrlen(fc); | |
122 | ||
123 | if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA)) | |
124 | return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN); | |
125 | return NULL; | |
126 | } | |
127 | ||
bb8c093b CH |
128 | static const struct ieee80211_hw_mode *iwl4965_get_hw_mode( |
129 | struct iwl4965_priv *priv, int mode) | |
b481de9c ZY |
130 | { |
131 | int i; | |
132 | ||
133 | for (i = 0; i < 3; i++) | |
134 | if (priv->modes[i].mode == mode) | |
135 | return &priv->modes[i]; | |
136 | ||
137 | return NULL; | |
138 | } | |
139 | ||
bb8c093b | 140 | static int iwl4965_is_empty_essid(const char *essid, int essid_len) |
b481de9c ZY |
141 | { |
142 | /* Single white space is for Linksys APs */ | |
143 | if (essid_len == 1 && essid[0] == ' ') | |
144 | return 1; | |
145 | ||
146 | /* Otherwise, if the entire essid is 0, we assume it is hidden */ | |
147 | while (essid_len) { | |
148 | essid_len--; | |
149 | if (essid[essid_len] != '\0') | |
150 | return 0; | |
151 | } | |
152 | ||
153 | return 1; | |
154 | } | |
155 | ||
bb8c093b | 156 | static const char *iwl4965_escape_essid(const char *essid, u8 essid_len) |
b481de9c ZY |
157 | { |
158 | static char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
159 | const char *s = essid; | |
160 | char *d = escaped; | |
161 | ||
bb8c093b | 162 | if (iwl4965_is_empty_essid(essid, essid_len)) { |
b481de9c ZY |
163 | memcpy(escaped, "<hidden>", sizeof("<hidden>")); |
164 | return escaped; | |
165 | } | |
166 | ||
167 | essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE); | |
168 | while (essid_len--) { | |
169 | if (*s == '\0') { | |
170 | *d++ = '\\'; | |
171 | *d++ = '0'; | |
172 | s++; | |
173 | } else | |
174 | *d++ = *s++; | |
175 | } | |
176 | *d = '\0'; | |
177 | return escaped; | |
178 | } | |
179 | ||
bb8c093b | 180 | static void iwl4965_print_hex_dump(int level, void *p, u32 len) |
b481de9c | 181 | { |
c8b0e6e1 | 182 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 183 | if (!(iwl4965_debug_level & level)) |
b481de9c ZY |
184 | return; |
185 | ||
186 | print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1, | |
187 | p, len, 1); | |
188 | #endif | |
189 | } | |
190 | ||
191 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** | |
192 | * DMA services | |
193 | * | |
194 | * Theory of operation | |
195 | * | |
196 | * A queue is a circular buffers with 'Read' and 'Write' pointers. | |
197 | * 2 empty entries always kept in the buffer to protect from overflow. | |
198 | * | |
199 | * For Tx queue, there are low mark and high mark limits. If, after queuing | |
200 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | |
201 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | |
202 | * Tx queue resumed. | |
203 | * | |
583fab37 | 204 | * The IWL operates with six queues, one receive queue in the device's |
b481de9c ZY |
205 | * sram, one transmit queue for sending commands to the device firmware, |
206 | * and four transmit queues for data. | |
207 | ***************************************************/ | |
208 | ||
bb8c093b | 209 | static int iwl4965_queue_space(const struct iwl4965_queue *q) |
b481de9c | 210 | { |
fc4b6853 | 211 | int s = q->read_ptr - q->write_ptr; |
b481de9c | 212 | |
fc4b6853 | 213 | if (q->read_ptr > q->write_ptr) |
b481de9c ZY |
214 | s -= q->n_bd; |
215 | ||
216 | if (s <= 0) | |
217 | s += q->n_window; | |
218 | /* keep some reserve to not confuse empty and full situations */ | |
219 | s -= 2; | |
220 | if (s < 0) | |
221 | s = 0; | |
222 | return s; | |
223 | } | |
224 | ||
225 | /* XXX: n_bd must be power-of-two size */ | |
bb8c093b | 226 | static inline int iwl4965_queue_inc_wrap(int index, int n_bd) |
b481de9c ZY |
227 | { |
228 | return ++index & (n_bd - 1); | |
229 | } | |
230 | ||
231 | /* XXX: n_bd must be power-of-two size */ | |
bb8c093b | 232 | static inline int iwl4965_queue_dec_wrap(int index, int n_bd) |
b481de9c ZY |
233 | { |
234 | return --index & (n_bd - 1); | |
235 | } | |
236 | ||
bb8c093b | 237 | static inline int x2_queue_used(const struct iwl4965_queue *q, int i) |
b481de9c | 238 | { |
fc4b6853 TW |
239 | return q->write_ptr > q->read_ptr ? |
240 | (i >= q->read_ptr && i < q->write_ptr) : | |
241 | !(i < q->read_ptr && i >= q->write_ptr); | |
b481de9c ZY |
242 | } |
243 | ||
bb8c093b | 244 | static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge) |
b481de9c ZY |
245 | { |
246 | if (is_huge) | |
247 | return q->n_window; | |
248 | ||
249 | return index & (q->n_window - 1); | |
250 | } | |
251 | ||
bb8c093b | 252 | static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q, |
b481de9c ZY |
253 | int count, int slots_num, u32 id) |
254 | { | |
255 | q->n_bd = count; | |
256 | q->n_window = slots_num; | |
257 | q->id = id; | |
258 | ||
bb8c093b CH |
259 | /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap |
260 | * and iwl4965_queue_dec_wrap are broken. */ | |
b481de9c ZY |
261 | BUG_ON(!is_power_of_2(count)); |
262 | ||
263 | /* slots_num must be power-of-two size, otherwise | |
264 | * get_cmd_index is broken. */ | |
265 | BUG_ON(!is_power_of_2(slots_num)); | |
266 | ||
267 | q->low_mark = q->n_window / 4; | |
268 | if (q->low_mark < 4) | |
269 | q->low_mark = 4; | |
270 | ||
271 | q->high_mark = q->n_window / 8; | |
272 | if (q->high_mark < 2) | |
273 | q->high_mark = 2; | |
274 | ||
fc4b6853 | 275 | q->write_ptr = q->read_ptr = 0; |
b481de9c ZY |
276 | |
277 | return 0; | |
278 | } | |
279 | ||
bb8c093b CH |
280 | static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv, |
281 | struct iwl4965_tx_queue *txq, u32 id) | |
b481de9c ZY |
282 | { |
283 | struct pci_dev *dev = priv->pci_dev; | |
284 | ||
285 | if (id != IWL_CMD_QUEUE_NUM) { | |
286 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | |
287 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | |
288 | if (!txq->txb) { | |
01ebd063 | 289 | IWL_ERROR("kmalloc for auxiliary BD " |
b481de9c ZY |
290 | "structures failed\n"); |
291 | goto error; | |
292 | } | |
293 | } else | |
294 | txq->txb = NULL; | |
295 | ||
296 | txq->bd = pci_alloc_consistent(dev, | |
297 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX, | |
298 | &txq->q.dma_addr); | |
299 | ||
300 | if (!txq->bd) { | |
301 | IWL_ERROR("pci_alloc_consistent(%zd) failed\n", | |
302 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX); | |
303 | goto error; | |
304 | } | |
305 | txq->q.id = id; | |
306 | ||
307 | return 0; | |
308 | ||
309 | error: | |
310 | if (txq->txb) { | |
311 | kfree(txq->txb); | |
312 | txq->txb = NULL; | |
313 | } | |
314 | ||
315 | return -ENOMEM; | |
316 | } | |
317 | ||
bb8c093b CH |
318 | int iwl4965_tx_queue_init(struct iwl4965_priv *priv, |
319 | struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id) | |
b481de9c ZY |
320 | { |
321 | struct pci_dev *dev = priv->pci_dev; | |
322 | int len; | |
323 | int rc = 0; | |
324 | ||
01ebd063 | 325 | /* allocate command space + one big command for scan since scan |
b481de9c ZY |
326 | * command is very huge the system will not have two scan at the |
327 | * same time */ | |
bb8c093b | 328 | len = sizeof(struct iwl4965_cmd) * slots_num; |
b481de9c ZY |
329 | if (txq_id == IWL_CMD_QUEUE_NUM) |
330 | len += IWL_MAX_SCAN_SIZE; | |
331 | txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd); | |
332 | if (!txq->cmd) | |
333 | return -ENOMEM; | |
334 | ||
bb8c093b | 335 | rc = iwl4965_tx_queue_alloc(priv, txq, txq_id); |
b481de9c ZY |
336 | if (rc) { |
337 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | |
338 | ||
339 | return -ENOMEM; | |
340 | } | |
341 | txq->need_update = 0; | |
342 | ||
343 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise | |
bb8c093b | 344 | * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */ |
b481de9c | 345 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); |
bb8c093b | 346 | iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
b481de9c | 347 | |
bb8c093b | 348 | iwl4965_hw_tx_queue_init(priv, txq); |
b481de9c ZY |
349 | |
350 | return 0; | |
351 | } | |
352 | ||
353 | /** | |
bb8c093b | 354 | * iwl4965_tx_queue_free - Deallocate DMA queue. |
b481de9c ZY |
355 | * @txq: Transmit queue to deallocate. |
356 | * | |
357 | * Empty queue by removing and destroying all BD's. | |
358 | * Free all buffers. txq itself is not freed. | |
359 | * | |
360 | */ | |
bb8c093b | 361 | void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq) |
b481de9c | 362 | { |
bb8c093b | 363 | struct iwl4965_queue *q = &txq->q; |
b481de9c ZY |
364 | struct pci_dev *dev = priv->pci_dev; |
365 | int len; | |
366 | ||
367 | if (q->n_bd == 0) | |
368 | return; | |
369 | ||
370 | /* first, empty all BD's */ | |
fc4b6853 | 371 | for (; q->write_ptr != q->read_ptr; |
bb8c093b CH |
372 | q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) |
373 | iwl4965_hw_txq_free_tfd(priv, txq); | |
b481de9c | 374 | |
bb8c093b | 375 | len = sizeof(struct iwl4965_cmd) * q->n_window; |
b481de9c ZY |
376 | if (q->id == IWL_CMD_QUEUE_NUM) |
377 | len += IWL_MAX_SCAN_SIZE; | |
378 | ||
379 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | |
380 | ||
381 | /* free buffers belonging to queue itself */ | |
382 | if (txq->q.n_bd) | |
bb8c093b | 383 | pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) * |
b481de9c ZY |
384 | txq->q.n_bd, txq->bd, txq->q.dma_addr); |
385 | ||
386 | if (txq->txb) { | |
387 | kfree(txq->txb); | |
388 | txq->txb = NULL; | |
389 | } | |
390 | ||
391 | /* 0 fill whole structure */ | |
392 | memset(txq, 0, sizeof(*txq)); | |
393 | } | |
394 | ||
bb8c093b | 395 | const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
b481de9c ZY |
396 | |
397 | /*************** STATION TABLE MANAGEMENT **** | |
398 | * | |
399 | * NOTE: This needs to be overhauled to better synchronize between | |
bb8c093b | 400 | * how the iwl-4965.c is using iwl4965_hw_find_station vs. iwl-3945.c |
b481de9c ZY |
401 | * |
402 | * mac80211 should also be examined to determine if sta_info is duplicating | |
403 | * the functionality provided here | |
404 | */ | |
405 | ||
406 | /**************************************************************/ | |
407 | ||
01ebd063 | 408 | #if 0 /* temporary disable till we add real remove station */ |
bb8c093b | 409 | static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap) |
b481de9c ZY |
410 | { |
411 | int index = IWL_INVALID_STATION; | |
412 | int i; | |
413 | unsigned long flags; | |
414 | ||
415 | spin_lock_irqsave(&priv->sta_lock, flags); | |
416 | ||
417 | if (is_ap) | |
418 | index = IWL_AP_ID; | |
419 | else if (is_broadcast_ether_addr(addr)) | |
420 | index = priv->hw_setting.bcast_sta_id; | |
421 | else | |
422 | for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) | |
423 | if (priv->stations[i].used && | |
424 | !compare_ether_addr(priv->stations[i].sta.sta.addr, | |
425 | addr)) { | |
426 | index = i; | |
427 | break; | |
428 | } | |
429 | ||
430 | if (unlikely(index == IWL_INVALID_STATION)) | |
431 | goto out; | |
432 | ||
433 | if (priv->stations[index].used) { | |
434 | priv->stations[index].used = 0; | |
435 | priv->num_stations--; | |
436 | } | |
437 | ||
438 | BUG_ON(priv->num_stations < 0); | |
439 | ||
440 | out: | |
441 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
442 | return 0; | |
443 | } | |
556f8db7 | 444 | #endif |
b481de9c | 445 | |
bb8c093b | 446 | static void iwl4965_clear_stations_table(struct iwl4965_priv *priv) |
b481de9c ZY |
447 | { |
448 | unsigned long flags; | |
449 | ||
450 | spin_lock_irqsave(&priv->sta_lock, flags); | |
451 | ||
452 | priv->num_stations = 0; | |
453 | memset(priv->stations, 0, sizeof(priv->stations)); | |
454 | ||
455 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
456 | } | |
457 | ||
bb8c093b | 458 | u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr, int is_ap, u8 flags) |
b481de9c ZY |
459 | { |
460 | int i; | |
461 | int index = IWL_INVALID_STATION; | |
bb8c093b | 462 | struct iwl4965_station_entry *station; |
b481de9c | 463 | unsigned long flags_spin; |
0795af57 | 464 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
465 | |
466 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | |
467 | if (is_ap) | |
468 | index = IWL_AP_ID; | |
469 | else if (is_broadcast_ether_addr(addr)) | |
470 | index = priv->hw_setting.bcast_sta_id; | |
471 | else | |
472 | for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) { | |
473 | if (!compare_ether_addr(priv->stations[i].sta.sta.addr, | |
474 | addr)) { | |
475 | index = i; | |
476 | break; | |
477 | } | |
478 | ||
479 | if (!priv->stations[i].used && | |
480 | index == IWL_INVALID_STATION) | |
481 | index = i; | |
482 | } | |
483 | ||
484 | ||
01ebd063 | 485 | /* These two conditions has the same outcome but keep them separate |
b481de9c ZY |
486 | since they have different meaning */ |
487 | if (unlikely(index == IWL_INVALID_STATION)) { | |
488 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
489 | return index; | |
490 | } | |
491 | ||
492 | if (priv->stations[index].used && | |
493 | !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) { | |
494 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
495 | return index; | |
496 | } | |
497 | ||
498 | ||
0795af57 | 499 | IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr)); |
b481de9c ZY |
500 | station = &priv->stations[index]; |
501 | station->used = 1; | |
502 | priv->num_stations++; | |
503 | ||
bb8c093b | 504 | memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd)); |
b481de9c ZY |
505 | memcpy(station->sta.sta.addr, addr, ETH_ALEN); |
506 | station->sta.mode = 0; | |
507 | station->sta.sta.sta_id = index; | |
508 | station->sta.station_flags = 0; | |
509 | ||
c8b0e6e1 | 510 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
511 | /* BCAST station and IBSS stations do not work in HT mode */ |
512 | if (index != priv->hw_setting.bcast_sta_id && | |
513 | priv->iw_mode != IEEE80211_IF_TYPE_IBSS) | |
514 | iwl4965_set_ht_add_station(priv, index); | |
c8b0e6e1 | 515 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
516 | |
517 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
bb8c093b | 518 | iwl4965_send_add_station(priv, &station->sta, flags); |
b481de9c ZY |
519 | return index; |
520 | ||
521 | } | |
522 | ||
523 | /*************** DRIVER STATUS FUNCTIONS *****/ | |
524 | ||
bb8c093b | 525 | static inline int iwl4965_is_ready(struct iwl4965_priv *priv) |
b481de9c ZY |
526 | { |
527 | /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are | |
528 | * set but EXIT_PENDING is not */ | |
529 | return test_bit(STATUS_READY, &priv->status) && | |
530 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) && | |
531 | !test_bit(STATUS_EXIT_PENDING, &priv->status); | |
532 | } | |
533 | ||
bb8c093b | 534 | static inline int iwl4965_is_alive(struct iwl4965_priv *priv) |
b481de9c ZY |
535 | { |
536 | return test_bit(STATUS_ALIVE, &priv->status); | |
537 | } | |
538 | ||
bb8c093b | 539 | static inline int iwl4965_is_init(struct iwl4965_priv *priv) |
b481de9c ZY |
540 | { |
541 | return test_bit(STATUS_INIT, &priv->status); | |
542 | } | |
543 | ||
bb8c093b | 544 | static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv) |
b481de9c ZY |
545 | { |
546 | return test_bit(STATUS_RF_KILL_HW, &priv->status) || | |
547 | test_bit(STATUS_RF_KILL_SW, &priv->status); | |
548 | } | |
549 | ||
bb8c093b | 550 | static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv) |
b481de9c ZY |
551 | { |
552 | ||
bb8c093b | 553 | if (iwl4965_is_rfkill(priv)) |
b481de9c ZY |
554 | return 0; |
555 | ||
bb8c093b | 556 | return iwl4965_is_ready(priv); |
b481de9c ZY |
557 | } |
558 | ||
559 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | |
560 | ||
561 | #define IWL_CMD(x) case x : return #x | |
562 | ||
563 | static const char *get_cmd_string(u8 cmd) | |
564 | { | |
565 | switch (cmd) { | |
566 | IWL_CMD(REPLY_ALIVE); | |
567 | IWL_CMD(REPLY_ERROR); | |
568 | IWL_CMD(REPLY_RXON); | |
569 | IWL_CMD(REPLY_RXON_ASSOC); | |
570 | IWL_CMD(REPLY_QOS_PARAM); | |
571 | IWL_CMD(REPLY_RXON_TIMING); | |
572 | IWL_CMD(REPLY_ADD_STA); | |
573 | IWL_CMD(REPLY_REMOVE_STA); | |
574 | IWL_CMD(REPLY_REMOVE_ALL_STA); | |
575 | IWL_CMD(REPLY_TX); | |
576 | IWL_CMD(REPLY_RATE_SCALE); | |
577 | IWL_CMD(REPLY_LEDS_CMD); | |
578 | IWL_CMD(REPLY_TX_LINK_QUALITY_CMD); | |
579 | IWL_CMD(RADAR_NOTIFICATION); | |
580 | IWL_CMD(REPLY_QUIET_CMD); | |
581 | IWL_CMD(REPLY_CHANNEL_SWITCH); | |
582 | IWL_CMD(CHANNEL_SWITCH_NOTIFICATION); | |
583 | IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD); | |
584 | IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION); | |
585 | IWL_CMD(POWER_TABLE_CMD); | |
586 | IWL_CMD(PM_SLEEP_NOTIFICATION); | |
587 | IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC); | |
588 | IWL_CMD(REPLY_SCAN_CMD); | |
589 | IWL_CMD(REPLY_SCAN_ABORT_CMD); | |
590 | IWL_CMD(SCAN_START_NOTIFICATION); | |
591 | IWL_CMD(SCAN_RESULTS_NOTIFICATION); | |
592 | IWL_CMD(SCAN_COMPLETE_NOTIFICATION); | |
593 | IWL_CMD(BEACON_NOTIFICATION); | |
594 | IWL_CMD(REPLY_TX_BEACON); | |
595 | IWL_CMD(WHO_IS_AWAKE_NOTIFICATION); | |
596 | IWL_CMD(QUIET_NOTIFICATION); | |
597 | IWL_CMD(REPLY_TX_PWR_TABLE_CMD); | |
598 | IWL_CMD(MEASURE_ABORT_NOTIFICATION); | |
599 | IWL_CMD(REPLY_BT_CONFIG); | |
600 | IWL_CMD(REPLY_STATISTICS_CMD); | |
601 | IWL_CMD(STATISTICS_NOTIFICATION); | |
602 | IWL_CMD(REPLY_CARD_STATE_CMD); | |
603 | IWL_CMD(CARD_STATE_NOTIFICATION); | |
604 | IWL_CMD(MISSED_BEACONS_NOTIFICATION); | |
605 | IWL_CMD(REPLY_CT_KILL_CONFIG_CMD); | |
606 | IWL_CMD(SENSITIVITY_CMD); | |
607 | IWL_CMD(REPLY_PHY_CALIBRATION_CMD); | |
608 | IWL_CMD(REPLY_RX_PHY_CMD); | |
609 | IWL_CMD(REPLY_RX_MPDU_CMD); | |
610 | IWL_CMD(REPLY_4965_RX); | |
611 | IWL_CMD(REPLY_COMPRESSED_BA); | |
612 | default: | |
613 | return "UNKNOWN"; | |
614 | ||
615 | } | |
616 | } | |
617 | ||
618 | #define HOST_COMPLETE_TIMEOUT (HZ / 2) | |
619 | ||
620 | /** | |
bb8c093b | 621 | * iwl4965_enqueue_hcmd - enqueue a uCode command |
b481de9c ZY |
622 | * @priv: device private data point |
623 | * @cmd: a point to the ucode command structure | |
624 | * | |
625 | * The function returns < 0 values to indicate the operation is | |
626 | * failed. On success, it turns the index (> 0) of command in the | |
627 | * command queue. | |
628 | */ | |
bb8c093b | 629 | static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd) |
b481de9c | 630 | { |
bb8c093b CH |
631 | struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; |
632 | struct iwl4965_queue *q = &txq->q; | |
633 | struct iwl4965_tfd_frame *tfd; | |
b481de9c | 634 | u32 *control_flags; |
bb8c093b | 635 | struct iwl4965_cmd *out_cmd; |
b481de9c ZY |
636 | u32 idx; |
637 | u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | |
638 | dma_addr_t phys_addr; | |
639 | int ret; | |
640 | unsigned long flags; | |
641 | ||
642 | /* If any of the command structures end up being larger than | |
643 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | |
644 | * we will need to increase the size of the TFD entries */ | |
645 | BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && | |
646 | !(cmd->meta.flags & CMD_SIZE_HUGE)); | |
647 | ||
bb8c093b | 648 | if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { |
b481de9c ZY |
649 | IWL_ERROR("No space for Tx\n"); |
650 | return -ENOSPC; | |
651 | } | |
652 | ||
653 | spin_lock_irqsave(&priv->hcmd_lock, flags); | |
654 | ||
fc4b6853 | 655 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
656 | memset(tfd, 0, sizeof(*tfd)); |
657 | ||
658 | control_flags = (u32 *) tfd; | |
659 | ||
fc4b6853 | 660 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
b481de9c ZY |
661 | out_cmd = &txq->cmd[idx]; |
662 | ||
663 | out_cmd->hdr.cmd = cmd->id; | |
664 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | |
665 | memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); | |
666 | ||
667 | /* At this point, the out_cmd now has all of the incoming cmd | |
668 | * information */ | |
669 | ||
670 | out_cmd->hdr.flags = 0; | |
671 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) | | |
fc4b6853 | 672 | INDEX_TO_SEQ(q->write_ptr)); |
b481de9c ZY |
673 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) |
674 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | |
675 | ||
676 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | |
bb8c093b CH |
677 | offsetof(struct iwl4965_cmd, hdr); |
678 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); | |
b481de9c ZY |
679 | |
680 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | |
681 | "%d bytes at %d[%d]:%d\n", | |
682 | get_cmd_string(out_cmd->hdr.cmd), | |
683 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), | |
fc4b6853 | 684 | fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM); |
b481de9c ZY |
685 | |
686 | txq->need_update = 1; | |
687 | ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0); | |
bb8c093b CH |
688 | q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd); |
689 | iwl4965_tx_queue_update_write_ptr(priv, txq); | |
b481de9c ZY |
690 | |
691 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | |
692 | return ret ? ret : idx; | |
693 | } | |
694 | ||
bb8c093b | 695 | static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd) |
b481de9c ZY |
696 | { |
697 | int ret; | |
698 | ||
699 | BUG_ON(!(cmd->meta.flags & CMD_ASYNC)); | |
700 | ||
701 | /* An asynchronous command can not expect an SKB to be set. */ | |
702 | BUG_ON(cmd->meta.flags & CMD_WANT_SKB); | |
703 | ||
704 | /* An asynchronous command MUST have a callback. */ | |
705 | BUG_ON(!cmd->meta.u.callback); | |
706 | ||
707 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
708 | return -EBUSY; | |
709 | ||
bb8c093b | 710 | ret = iwl4965_enqueue_hcmd(priv, cmd); |
b481de9c | 711 | if (ret < 0) { |
bb8c093b | 712 | IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n", |
b481de9c ZY |
713 | get_cmd_string(cmd->id), ret); |
714 | return ret; | |
715 | } | |
716 | return 0; | |
717 | } | |
718 | ||
bb8c093b | 719 | static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd) |
b481de9c ZY |
720 | { |
721 | int cmd_idx; | |
722 | int ret; | |
723 | static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */ | |
724 | ||
725 | BUG_ON(cmd->meta.flags & CMD_ASYNC); | |
726 | ||
727 | /* A synchronous command can not have a callback set. */ | |
728 | BUG_ON(cmd->meta.u.callback != NULL); | |
729 | ||
730 | if (atomic_xchg(&entry, 1)) { | |
731 | IWL_ERROR("Error sending %s: Already sending a host command\n", | |
732 | get_cmd_string(cmd->id)); | |
733 | return -EBUSY; | |
734 | } | |
735 | ||
736 | set_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
737 | ||
738 | if (cmd->meta.flags & CMD_WANT_SKB) | |
739 | cmd->meta.source = &cmd->meta; | |
740 | ||
bb8c093b | 741 | cmd_idx = iwl4965_enqueue_hcmd(priv, cmd); |
b481de9c ZY |
742 | if (cmd_idx < 0) { |
743 | ret = cmd_idx; | |
bb8c093b | 744 | IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n", |
b481de9c ZY |
745 | get_cmd_string(cmd->id), ret); |
746 | goto out; | |
747 | } | |
748 | ||
749 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
750 | !test_bit(STATUS_HCMD_ACTIVE, &priv->status), | |
751 | HOST_COMPLETE_TIMEOUT); | |
752 | if (!ret) { | |
753 | if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) { | |
754 | IWL_ERROR("Error sending %s: time out after %dms.\n", | |
755 | get_cmd_string(cmd->id), | |
756 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); | |
757 | ||
758 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
759 | ret = -ETIMEDOUT; | |
760 | goto cancel; | |
761 | } | |
762 | } | |
763 | ||
764 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
765 | IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n", | |
766 | get_cmd_string(cmd->id)); | |
767 | ret = -ECANCELED; | |
768 | goto fail; | |
769 | } | |
770 | if (test_bit(STATUS_FW_ERROR, &priv->status)) { | |
771 | IWL_DEBUG_INFO("Command %s failed: FW Error\n", | |
772 | get_cmd_string(cmd->id)); | |
773 | ret = -EIO; | |
774 | goto fail; | |
775 | } | |
776 | if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) { | |
777 | IWL_ERROR("Error: Response NULL in '%s'\n", | |
778 | get_cmd_string(cmd->id)); | |
779 | ret = -EIO; | |
780 | goto out; | |
781 | } | |
782 | ||
783 | ret = 0; | |
784 | goto out; | |
785 | ||
786 | cancel: | |
787 | if (cmd->meta.flags & CMD_WANT_SKB) { | |
bb8c093b | 788 | struct iwl4965_cmd *qcmd; |
b481de9c ZY |
789 | |
790 | /* Cancel the CMD_WANT_SKB flag for the cmd in the | |
791 | * TX cmd queue. Otherwise in case the cmd comes | |
792 | * in later, it will possibly set an invalid | |
793 | * address (cmd->meta.source). */ | |
794 | qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx]; | |
795 | qcmd->meta.flags &= ~CMD_WANT_SKB; | |
796 | } | |
797 | fail: | |
798 | if (cmd->meta.u.skb) { | |
799 | dev_kfree_skb_any(cmd->meta.u.skb); | |
800 | cmd->meta.u.skb = NULL; | |
801 | } | |
802 | out: | |
803 | atomic_set(&entry, 0); | |
804 | return ret; | |
805 | } | |
806 | ||
bb8c093b | 807 | int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd) |
b481de9c | 808 | { |
b481de9c | 809 | if (cmd->meta.flags & CMD_ASYNC) |
bb8c093b | 810 | return iwl4965_send_cmd_async(priv, cmd); |
b481de9c | 811 | |
bb8c093b | 812 | return iwl4965_send_cmd_sync(priv, cmd); |
b481de9c ZY |
813 | } |
814 | ||
bb8c093b | 815 | int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data) |
b481de9c | 816 | { |
bb8c093b | 817 | struct iwl4965_host_cmd cmd = { |
b481de9c ZY |
818 | .id = id, |
819 | .len = len, | |
820 | .data = data, | |
821 | }; | |
822 | ||
bb8c093b | 823 | return iwl4965_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
824 | } |
825 | ||
bb8c093b | 826 | static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val) |
b481de9c | 827 | { |
bb8c093b | 828 | struct iwl4965_host_cmd cmd = { |
b481de9c ZY |
829 | .id = id, |
830 | .len = sizeof(val), | |
831 | .data = &val, | |
832 | }; | |
833 | ||
bb8c093b | 834 | return iwl4965_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
835 | } |
836 | ||
bb8c093b | 837 | int iwl4965_send_statistics_request(struct iwl4965_priv *priv) |
b481de9c | 838 | { |
bb8c093b | 839 | return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0); |
b481de9c ZY |
840 | } |
841 | ||
842 | /** | |
bb8c093b | 843 | * iwl4965_rxon_add_station - add station into station table. |
b481de9c ZY |
844 | * |
845 | * there is only one AP station with id= IWL_AP_ID | |
846 | * NOTE: mutex must be held before calling the this fnction | |
847 | */ | |
bb8c093b | 848 | static int iwl4965_rxon_add_station(struct iwl4965_priv *priv, |
b481de9c ZY |
849 | const u8 *addr, int is_ap) |
850 | { | |
556f8db7 | 851 | u8 sta_id; |
b481de9c | 852 | |
bb8c093b | 853 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, 0); |
b481de9c ZY |
854 | iwl4965_add_station(priv, addr, is_ap); |
855 | ||
556f8db7 | 856 | return sta_id; |
b481de9c ZY |
857 | } |
858 | ||
859 | /** | |
bb8c093b | 860 | * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON |
b481de9c ZY |
861 | * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz |
862 | * @channel: Any channel valid for the requested phymode | |
863 | ||
864 | * In addition to setting the staging RXON, priv->phymode is also set. | |
865 | * | |
866 | * NOTE: Does not commit to the hardware; it sets appropriate bit fields | |
867 | * in the staging RXON flag structure based on the phymode | |
868 | */ | |
bb8c093b | 869 | static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode, u16 channel) |
b481de9c | 870 | { |
bb8c093b | 871 | if (!iwl4965_get_channel_info(priv, phymode, channel)) { |
b481de9c ZY |
872 | IWL_DEBUG_INFO("Could not set channel to %d [%d]\n", |
873 | channel, phymode); | |
874 | return -EINVAL; | |
875 | } | |
876 | ||
877 | if ((le16_to_cpu(priv->staging_rxon.channel) == channel) && | |
878 | (priv->phymode == phymode)) | |
879 | return 0; | |
880 | ||
881 | priv->staging_rxon.channel = cpu_to_le16(channel); | |
882 | if (phymode == MODE_IEEE80211A) | |
883 | priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK; | |
884 | else | |
885 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
886 | ||
887 | priv->phymode = phymode; | |
888 | ||
889 | IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode); | |
890 | ||
891 | return 0; | |
892 | } | |
893 | ||
894 | /** | |
bb8c093b | 895 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
896 | * |
897 | * NOTE: This is really only useful during development and can eventually | |
898 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
899 | * making changes | |
900 | */ | |
bb8c093b | 901 | static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c ZY |
902 | { |
903 | int error = 0; | |
904 | int counter = 1; | |
905 | ||
906 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
907 | error |= le32_to_cpu(rxon->flags & | |
908 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
909 | RXON_FLG_RADAR_DETECT_MSK)); | |
910 | if (error) | |
911 | IWL_WARNING("check 24G fields %d | %d\n", | |
912 | counter++, error); | |
913 | } else { | |
914 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
915 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
916 | if (error) | |
917 | IWL_WARNING("check 52 fields %d | %d\n", | |
918 | counter++, error); | |
919 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
920 | if (error) | |
921 | IWL_WARNING("check 52 CCK %d | %d\n", | |
922 | counter++, error); | |
923 | } | |
924 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
925 | if (error) | |
926 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
927 | ||
928 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
929 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
930 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
931 | if (error) | |
932 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
933 | ||
934 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
935 | if (error) | |
936 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
937 | ||
938 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
939 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
940 | if (error) | |
941 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
942 | counter++, error); | |
943 | ||
944 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
945 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
946 | if (error) | |
947 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
948 | counter++, error); | |
949 | ||
950 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
951 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
952 | if (error) | |
953 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
954 | counter++, error); | |
955 | ||
956 | if (error) | |
957 | IWL_WARNING("Tuning to channel %d\n", | |
958 | le16_to_cpu(rxon->channel)); | |
959 | ||
960 | if (error) { | |
bb8c093b | 961 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
962 | return -1; |
963 | } | |
964 | return 0; | |
965 | } | |
966 | ||
967 | /** | |
bb8c093b | 968 | * iwl4965_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit |
01ebd063 | 969 | * @priv: staging_rxon is compared to active_rxon |
b481de9c ZY |
970 | * |
971 | * If the RXON structure is changing sufficient to require a new | |
972 | * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1 | |
973 | * to indicate a new tune is required. | |
974 | */ | |
bb8c093b | 975 | static int iwl4965_full_rxon_required(struct iwl4965_priv *priv) |
b481de9c ZY |
976 | { |
977 | ||
978 | /* These items are only settable from the full RXON command */ | |
979 | if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) || | |
980 | compare_ether_addr(priv->staging_rxon.bssid_addr, | |
981 | priv->active_rxon.bssid_addr) || | |
982 | compare_ether_addr(priv->staging_rxon.node_addr, | |
983 | priv->active_rxon.node_addr) || | |
984 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
985 | priv->active_rxon.wlap_bssid_addr) || | |
986 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
987 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
988 | (priv->staging_rxon.air_propagation != | |
989 | priv->active_rxon.air_propagation) || | |
990 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
991 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
992 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
993 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
994 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
995 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
996 | return 1; | |
997 | ||
998 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
999 | * be updated with the RXON_ASSOC command -- however only some | |
1000 | * flag transitions are allowed using RXON_ASSOC */ | |
1001 | ||
1002 | /* Check if we are not switching bands */ | |
1003 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
1004 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
1005 | return 1; | |
1006 | ||
1007 | /* Check if we are switching association toggle */ | |
1008 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
1009 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
1010 | return 1; | |
1011 | ||
1012 | return 0; | |
1013 | } | |
1014 | ||
bb8c093b | 1015 | static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv) |
b481de9c ZY |
1016 | { |
1017 | int rc = 0; | |
bb8c093b CH |
1018 | struct iwl4965_rx_packet *res = NULL; |
1019 | struct iwl4965_rxon_assoc_cmd rxon_assoc; | |
1020 | struct iwl4965_host_cmd cmd = { | |
b481de9c ZY |
1021 | .id = REPLY_RXON_ASSOC, |
1022 | .len = sizeof(rxon_assoc), | |
1023 | .meta.flags = CMD_WANT_SKB, | |
1024 | .data = &rxon_assoc, | |
1025 | }; | |
bb8c093b CH |
1026 | const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon; |
1027 | const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon; | |
b481de9c ZY |
1028 | |
1029 | if ((rxon1->flags == rxon2->flags) && | |
1030 | (rxon1->filter_flags == rxon2->filter_flags) && | |
1031 | (rxon1->cck_basic_rates == rxon2->cck_basic_rates) && | |
1032 | (rxon1->ofdm_ht_single_stream_basic_rates == | |
1033 | rxon2->ofdm_ht_single_stream_basic_rates) && | |
1034 | (rxon1->ofdm_ht_dual_stream_basic_rates == | |
1035 | rxon2->ofdm_ht_dual_stream_basic_rates) && | |
1036 | (rxon1->rx_chain == rxon2->rx_chain) && | |
1037 | (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) { | |
1038 | IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n"); | |
1039 | return 0; | |
1040 | } | |
1041 | ||
1042 | rxon_assoc.flags = priv->staging_rxon.flags; | |
1043 | rxon_assoc.filter_flags = priv->staging_rxon.filter_flags; | |
1044 | rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates; | |
1045 | rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates; | |
1046 | rxon_assoc.reserved = 0; | |
1047 | rxon_assoc.ofdm_ht_single_stream_basic_rates = | |
1048 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates; | |
1049 | rxon_assoc.ofdm_ht_dual_stream_basic_rates = | |
1050 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates; | |
1051 | rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain; | |
1052 | ||
bb8c093b | 1053 | rc = iwl4965_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
1054 | if (rc) |
1055 | return rc; | |
1056 | ||
bb8c093b | 1057 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1058 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1059 | IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n"); | |
1060 | rc = -EIO; | |
1061 | } | |
1062 | ||
1063 | priv->alloc_rxb_skb--; | |
1064 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1065 | ||
1066 | return rc; | |
1067 | } | |
1068 | ||
1069 | /** | |
bb8c093b | 1070 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 1071 | * |
01ebd063 | 1072 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
1073 | * the active_rxon structure is updated with the new data. This |
1074 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
1075 | * a HW tune is required based on the RXON structure changes. | |
1076 | */ | |
bb8c093b | 1077 | static int iwl4965_commit_rxon(struct iwl4965_priv *priv) |
b481de9c ZY |
1078 | { |
1079 | /* cast away the const for active_rxon in this function */ | |
bb8c093b | 1080 | struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 1081 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
1082 | int rc = 0; |
1083 | ||
bb8c093b | 1084 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
1085 | return -1; |
1086 | ||
1087 | /* always get timestamp with Rx frame */ | |
1088 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
1089 | ||
bb8c093b | 1090 | rc = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
b481de9c ZY |
1091 | if (rc) { |
1092 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | |
1093 | return -EINVAL; | |
1094 | } | |
1095 | ||
1096 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 1097 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 1098 | * and other flags for the current radio configuration. */ |
bb8c093b CH |
1099 | if (!iwl4965_full_rxon_required(priv)) { |
1100 | rc = iwl4965_send_rxon_assoc(priv); | |
b481de9c ZY |
1101 | if (rc) { |
1102 | IWL_ERROR("Error setting RXON_ASSOC " | |
1103 | "configuration (%d).\n", rc); | |
1104 | return rc; | |
1105 | } | |
1106 | ||
1107 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
1108 | ||
1109 | return 0; | |
1110 | } | |
1111 | ||
1112 | /* station table will be cleared */ | |
1113 | priv->assoc_station_added = 0; | |
1114 | ||
c8b0e6e1 | 1115 | #ifdef CONFIG_IWL4965_SENSITIVITY |
b481de9c ZY |
1116 | priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT; |
1117 | if (!priv->error_recovering) | |
1118 | priv->start_calib = 0; | |
1119 | ||
1120 | iwl4965_init_sensitivity(priv, CMD_ASYNC, 1); | |
c8b0e6e1 | 1121 | #endif /* CONFIG_IWL4965_SENSITIVITY */ |
b481de9c ZY |
1122 | |
1123 | /* If we are currently associated and the new config requires | |
1124 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
1125 | * we must clear the associated from the active configuration | |
1126 | * before we apply the new config */ | |
bb8c093b | 1127 | if (iwl4965_is_associated(priv) && |
b481de9c ZY |
1128 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
1129 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | |
1130 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
1131 | ||
bb8c093b CH |
1132 | rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON, |
1133 | sizeof(struct iwl4965_rxon_cmd), | |
b481de9c ZY |
1134 | &priv->active_rxon); |
1135 | ||
1136 | /* If the mask clearing failed then we set | |
1137 | * active_rxon back to what it was previously */ | |
1138 | if (rc) { | |
1139 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
1140 | IWL_ERROR("Error clearing ASSOC_MSK on current " | |
1141 | "configuration (%d).\n", rc); | |
1142 | return rc; | |
1143 | } | |
b481de9c ZY |
1144 | } |
1145 | ||
1146 | IWL_DEBUG_INFO("Sending RXON\n" | |
1147 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
1148 | "* channel = %d\n" | |
0795af57 | 1149 | "* bssid = %s\n", |
b481de9c ZY |
1150 | ((priv->staging_rxon.filter_flags & |
1151 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | |
1152 | le16_to_cpu(priv->staging_rxon.channel), | |
0795af57 | 1153 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c ZY |
1154 | |
1155 | /* Apply the new configuration */ | |
bb8c093b CH |
1156 | rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON, |
1157 | sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon); | |
b481de9c ZY |
1158 | if (rc) { |
1159 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | |
1160 | return rc; | |
1161 | } | |
1162 | ||
bb8c093b | 1163 | iwl4965_clear_stations_table(priv); |
556f8db7 | 1164 | |
c8b0e6e1 | 1165 | #ifdef CONFIG_IWL4965_SENSITIVITY |
b481de9c ZY |
1166 | if (!priv->error_recovering) |
1167 | priv->start_calib = 0; | |
1168 | ||
1169 | priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT; | |
1170 | iwl4965_init_sensitivity(priv, CMD_ASYNC, 1); | |
c8b0e6e1 | 1171 | #endif /* CONFIG_IWL4965_SENSITIVITY */ |
b481de9c ZY |
1172 | |
1173 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
1174 | ||
1175 | /* If we issue a new RXON command which required a tune then we must | |
1176 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
bb8c093b | 1177 | rc = iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
1178 | if (rc) { |
1179 | IWL_ERROR("Error setting Tx power (%d).\n", rc); | |
1180 | return rc; | |
1181 | } | |
1182 | ||
1183 | /* Add the broadcast address so we can send broadcast frames */ | |
bb8c093b | 1184 | if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) == |
b481de9c ZY |
1185 | IWL_INVALID_STATION) { |
1186 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | |
1187 | return -EIO; | |
1188 | } | |
1189 | ||
1190 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
1191 | * add the IWL_AP_ID to the station rate table */ | |
bb8c093b | 1192 | if (iwl4965_is_associated(priv) && |
b481de9c | 1193 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
bb8c093b | 1194 | if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
1195 | == IWL_INVALID_STATION) { |
1196 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
1197 | return -EIO; | |
1198 | } | |
1199 | priv->assoc_station_added = 1; | |
1200 | } | |
1201 | ||
1202 | return 0; | |
1203 | } | |
1204 | ||
bb8c093b | 1205 | static int iwl4965_send_bt_config(struct iwl4965_priv *priv) |
b481de9c | 1206 | { |
bb8c093b | 1207 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
1208 | .flags = 3, |
1209 | .lead_time = 0xAA, | |
1210 | .max_kill = 1, | |
1211 | .kill_ack_mask = 0, | |
1212 | .kill_cts_mask = 0, | |
1213 | }; | |
1214 | ||
bb8c093b CH |
1215 | return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
1216 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); | |
b481de9c ZY |
1217 | } |
1218 | ||
bb8c093b | 1219 | static int iwl4965_send_scan_abort(struct iwl4965_priv *priv) |
b481de9c ZY |
1220 | { |
1221 | int rc = 0; | |
bb8c093b CH |
1222 | struct iwl4965_rx_packet *res; |
1223 | struct iwl4965_host_cmd cmd = { | |
b481de9c ZY |
1224 | .id = REPLY_SCAN_ABORT_CMD, |
1225 | .meta.flags = CMD_WANT_SKB, | |
1226 | }; | |
1227 | ||
1228 | /* If there isn't a scan actively going on in the hardware | |
1229 | * then we are in between scan bands and not actually | |
1230 | * actively scanning, so don't send the abort command */ | |
1231 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
1232 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1233 | return 0; | |
1234 | } | |
1235 | ||
bb8c093b | 1236 | rc = iwl4965_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
1237 | if (rc) { |
1238 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1239 | return rc; | |
1240 | } | |
1241 | ||
bb8c093b | 1242 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1243 | if (res->u.status != CAN_ABORT_STATUS) { |
1244 | /* The scan abort will return 1 for success or | |
1245 | * 2 for "failure". A failure condition can be | |
1246 | * due to simply not being in an active scan which | |
1247 | * can occur if we send the scan abort before we | |
1248 | * the microcode has notified us that a scan is | |
1249 | * completed. */ | |
1250 | IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status); | |
1251 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1252 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
1253 | } | |
1254 | ||
1255 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1256 | ||
1257 | return rc; | |
1258 | } | |
1259 | ||
bb8c093b CH |
1260 | static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv, |
1261 | struct iwl4965_cmd *cmd, | |
b481de9c ZY |
1262 | struct sk_buff *skb) |
1263 | { | |
1264 | return 1; | |
1265 | } | |
1266 | ||
1267 | /* | |
1268 | * CARD_STATE_CMD | |
1269 | * | |
1270 | * Use: Sets the internal card state to enable, disable, or halt | |
1271 | * | |
1272 | * When in the 'enable' state the card operates as normal. | |
1273 | * When in the 'disable' state, the card enters into a low power mode. | |
1274 | * When in the 'halt' state, the card is shut down and must be fully | |
1275 | * restarted to come back on. | |
1276 | */ | |
bb8c093b | 1277 | static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag) |
b481de9c | 1278 | { |
bb8c093b | 1279 | struct iwl4965_host_cmd cmd = { |
b481de9c ZY |
1280 | .id = REPLY_CARD_STATE_CMD, |
1281 | .len = sizeof(u32), | |
1282 | .data = &flags, | |
1283 | .meta.flags = meta_flag, | |
1284 | }; | |
1285 | ||
1286 | if (meta_flag & CMD_ASYNC) | |
bb8c093b | 1287 | cmd.meta.u.callback = iwl4965_card_state_sync_callback; |
b481de9c | 1288 | |
bb8c093b | 1289 | return iwl4965_send_cmd(priv, &cmd); |
b481de9c ZY |
1290 | } |
1291 | ||
bb8c093b CH |
1292 | static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv, |
1293 | struct iwl4965_cmd *cmd, struct sk_buff *skb) | |
b481de9c | 1294 | { |
bb8c093b | 1295 | struct iwl4965_rx_packet *res = NULL; |
b481de9c ZY |
1296 | |
1297 | if (!skb) { | |
1298 | IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n"); | |
1299 | return 1; | |
1300 | } | |
1301 | ||
bb8c093b | 1302 | res = (struct iwl4965_rx_packet *)skb->data; |
b481de9c ZY |
1303 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1304 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | |
1305 | res->hdr.flags); | |
1306 | return 1; | |
1307 | } | |
1308 | ||
1309 | switch (res->u.add_sta.status) { | |
1310 | case ADD_STA_SUCCESS_MSK: | |
1311 | break; | |
1312 | default: | |
1313 | break; | |
1314 | } | |
1315 | ||
1316 | /* We didn't cache the SKB; let the caller free it */ | |
1317 | return 1; | |
1318 | } | |
1319 | ||
bb8c093b CH |
1320 | int iwl4965_send_add_station(struct iwl4965_priv *priv, |
1321 | struct iwl4965_addsta_cmd *sta, u8 flags) | |
b481de9c | 1322 | { |
bb8c093b | 1323 | struct iwl4965_rx_packet *res = NULL; |
b481de9c | 1324 | int rc = 0; |
bb8c093b | 1325 | struct iwl4965_host_cmd cmd = { |
b481de9c | 1326 | .id = REPLY_ADD_STA, |
bb8c093b | 1327 | .len = sizeof(struct iwl4965_addsta_cmd), |
b481de9c ZY |
1328 | .meta.flags = flags, |
1329 | .data = sta, | |
1330 | }; | |
1331 | ||
1332 | if (flags & CMD_ASYNC) | |
bb8c093b | 1333 | cmd.meta.u.callback = iwl4965_add_sta_sync_callback; |
b481de9c ZY |
1334 | else |
1335 | cmd.meta.flags |= CMD_WANT_SKB; | |
1336 | ||
bb8c093b | 1337 | rc = iwl4965_send_cmd(priv, &cmd); |
b481de9c ZY |
1338 | |
1339 | if (rc || (flags & CMD_ASYNC)) | |
1340 | return rc; | |
1341 | ||
bb8c093b | 1342 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1343 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1344 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | |
1345 | res->hdr.flags); | |
1346 | rc = -EIO; | |
1347 | } | |
1348 | ||
1349 | if (rc == 0) { | |
1350 | switch (res->u.add_sta.status) { | |
1351 | case ADD_STA_SUCCESS_MSK: | |
1352 | IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n"); | |
1353 | break; | |
1354 | default: | |
1355 | rc = -EIO; | |
1356 | IWL_WARNING("REPLY_ADD_STA failed\n"); | |
1357 | break; | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | priv->alloc_rxb_skb--; | |
1362 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1363 | ||
1364 | return rc; | |
1365 | } | |
1366 | ||
bb8c093b | 1367 | static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv, |
b481de9c ZY |
1368 | struct ieee80211_key_conf *keyconf, |
1369 | u8 sta_id) | |
1370 | { | |
1371 | unsigned long flags; | |
1372 | __le16 key_flags = 0; | |
1373 | ||
1374 | switch (keyconf->alg) { | |
1375 | case ALG_CCMP: | |
1376 | key_flags |= STA_KEY_FLG_CCMP; | |
1377 | key_flags |= cpu_to_le16( | |
1378 | keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
1379 | key_flags &= ~STA_KEY_FLG_INVALID; | |
1380 | break; | |
1381 | case ALG_TKIP: | |
1382 | case ALG_WEP: | |
b481de9c ZY |
1383 | default: |
1384 | return -EINVAL; | |
1385 | } | |
1386 | spin_lock_irqsave(&priv->sta_lock, flags); | |
1387 | priv->stations[sta_id].keyinfo.alg = keyconf->alg; | |
1388 | priv->stations[sta_id].keyinfo.keylen = keyconf->keylen; | |
1389 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, | |
1390 | keyconf->keylen); | |
1391 | ||
1392 | memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, | |
1393 | keyconf->keylen); | |
1394 | priv->stations[sta_id].sta.key.key_flags = key_flags; | |
1395 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
1396 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
1397 | ||
1398 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1399 | ||
1400 | IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n"); | |
bb8c093b | 1401 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0); |
b481de9c ZY |
1402 | return 0; |
1403 | } | |
1404 | ||
bb8c093b | 1405 | static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id) |
b481de9c ZY |
1406 | { |
1407 | unsigned long flags; | |
1408 | ||
1409 | spin_lock_irqsave(&priv->sta_lock, flags); | |
bb8c093b CH |
1410 | memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key)); |
1411 | memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo)); | |
b481de9c ZY |
1412 | priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; |
1413 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
1414 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
1415 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1416 | ||
1417 | IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n"); | |
bb8c093b | 1418 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0); |
b481de9c ZY |
1419 | return 0; |
1420 | } | |
1421 | ||
bb8c093b | 1422 | static void iwl4965_clear_free_frames(struct iwl4965_priv *priv) |
b481de9c ZY |
1423 | { |
1424 | struct list_head *element; | |
1425 | ||
1426 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
1427 | priv->frames_count); | |
1428 | ||
1429 | while (!list_empty(&priv->free_frames)) { | |
1430 | element = priv->free_frames.next; | |
1431 | list_del(element); | |
bb8c093b | 1432 | kfree(list_entry(element, struct iwl4965_frame, list)); |
b481de9c ZY |
1433 | priv->frames_count--; |
1434 | } | |
1435 | ||
1436 | if (priv->frames_count) { | |
1437 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
1438 | priv->frames_count); | |
1439 | priv->frames_count = 0; | |
1440 | } | |
1441 | } | |
1442 | ||
bb8c093b | 1443 | static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv) |
b481de9c | 1444 | { |
bb8c093b | 1445 | struct iwl4965_frame *frame; |
b481de9c ZY |
1446 | struct list_head *element; |
1447 | if (list_empty(&priv->free_frames)) { | |
1448 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
1449 | if (!frame) { | |
1450 | IWL_ERROR("Could not allocate frame!\n"); | |
1451 | return NULL; | |
1452 | } | |
1453 | ||
1454 | priv->frames_count++; | |
1455 | return frame; | |
1456 | } | |
1457 | ||
1458 | element = priv->free_frames.next; | |
1459 | list_del(element); | |
bb8c093b | 1460 | return list_entry(element, struct iwl4965_frame, list); |
b481de9c ZY |
1461 | } |
1462 | ||
bb8c093b | 1463 | static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame) |
b481de9c ZY |
1464 | { |
1465 | memset(frame, 0, sizeof(*frame)); | |
1466 | list_add(&frame->list, &priv->free_frames); | |
1467 | } | |
1468 | ||
bb8c093b | 1469 | unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv, |
b481de9c ZY |
1470 | struct ieee80211_hdr *hdr, |
1471 | const u8 *dest, int left) | |
1472 | { | |
1473 | ||
bb8c093b | 1474 | if (!iwl4965_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
1475 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
1476 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
1477 | return 0; | |
1478 | ||
1479 | if (priv->ibss_beacon->len > left) | |
1480 | return 0; | |
1481 | ||
1482 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
1483 | ||
1484 | return priv->ibss_beacon->len; | |
1485 | } | |
1486 | ||
bb8c093b | 1487 | int iwl4965_rate_index_from_plcp(int plcp) |
b481de9c ZY |
1488 | { |
1489 | int i = 0; | |
1490 | ||
1491 | if (plcp & RATE_MCS_HT_MSK) { | |
1492 | i = (plcp & 0xff); | |
1493 | ||
1494 | if (i >= IWL_RATE_MIMO_6M_PLCP) | |
1495 | i = i - IWL_RATE_MIMO_6M_PLCP; | |
1496 | ||
1497 | i += IWL_FIRST_OFDM_RATE; | |
1498 | /* skip 9M not supported in ht*/ | |
1499 | if (i >= IWL_RATE_9M_INDEX) | |
1500 | i += 1; | |
1501 | if ((i >= IWL_FIRST_OFDM_RATE) && | |
1502 | (i <= IWL_LAST_OFDM_RATE)) | |
1503 | return i; | |
1504 | } else { | |
bb8c093b CH |
1505 | for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++) |
1506 | if (iwl4965_rates[i].plcp == (plcp &0xFF)) | |
b481de9c ZY |
1507 | return i; |
1508 | } | |
1509 | return -1; | |
1510 | } | |
1511 | ||
bb8c093b | 1512 | static u8 iwl4965_rate_get_lowest_plcp(int rate_mask) |
b481de9c ZY |
1513 | { |
1514 | u8 i; | |
1515 | ||
1516 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; | |
bb8c093b | 1517 | i = iwl4965_rates[i].next_ieee) { |
b481de9c | 1518 | if (rate_mask & (1 << i)) |
bb8c093b | 1519 | return iwl4965_rates[i].plcp; |
b481de9c ZY |
1520 | } |
1521 | ||
1522 | return IWL_RATE_INVALID; | |
1523 | } | |
1524 | ||
bb8c093b | 1525 | static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv) |
b481de9c | 1526 | { |
bb8c093b | 1527 | struct iwl4965_frame *frame; |
b481de9c ZY |
1528 | unsigned int frame_size; |
1529 | int rc; | |
1530 | u8 rate; | |
1531 | ||
bb8c093b | 1532 | frame = iwl4965_get_free_frame(priv); |
b481de9c ZY |
1533 | |
1534 | if (!frame) { | |
1535 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
1536 | "command.\n"); | |
1537 | return -ENOMEM; | |
1538 | } | |
1539 | ||
1540 | if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) { | |
bb8c093b | 1541 | rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & |
b481de9c ZY |
1542 | 0xFF0); |
1543 | if (rate == IWL_INVALID_RATE) | |
1544 | rate = IWL_RATE_6M_PLCP; | |
1545 | } else { | |
bb8c093b | 1546 | rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF); |
b481de9c ZY |
1547 | if (rate == IWL_INVALID_RATE) |
1548 | rate = IWL_RATE_1M_PLCP; | |
1549 | } | |
1550 | ||
bb8c093b | 1551 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 1552 | |
bb8c093b | 1553 | rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
1554 | &frame->u.cmd[0]); |
1555 | ||
bb8c093b | 1556 | iwl4965_free_frame(priv, frame); |
b481de9c ZY |
1557 | |
1558 | return rc; | |
1559 | } | |
1560 | ||
1561 | /****************************************************************************** | |
1562 | * | |
1563 | * EEPROM related functions | |
1564 | * | |
1565 | ******************************************************************************/ | |
1566 | ||
bb8c093b | 1567 | static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac) |
b481de9c ZY |
1568 | { |
1569 | memcpy(mac, priv->eeprom.mac_address, 6); | |
1570 | } | |
1571 | ||
1572 | /** | |
bb8c093b | 1573 | * iwl4965_eeprom_init - read EEPROM contents |
b481de9c ZY |
1574 | * |
1575 | * Load the EEPROM from adapter into priv->eeprom | |
1576 | * | |
1577 | * NOTE: This routine uses the non-debug IO access functions. | |
1578 | */ | |
bb8c093b | 1579 | int iwl4965_eeprom_init(struct iwl4965_priv *priv) |
b481de9c ZY |
1580 | { |
1581 | u16 *e = (u16 *)&priv->eeprom; | |
bb8c093b | 1582 | u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP); |
b481de9c ZY |
1583 | u32 r; |
1584 | int sz = sizeof(priv->eeprom); | |
1585 | int rc; | |
1586 | int i; | |
1587 | u16 addr; | |
1588 | ||
1589 | /* The EEPROM structure has several padding buffers within it | |
1590 | * and when adding new EEPROM maps is subject to programmer errors | |
1591 | * which may be very difficult to identify without explicitly | |
1592 | * checking the resulting size of the eeprom map. */ | |
1593 | BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE); | |
1594 | ||
1595 | if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { | |
1596 | IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp); | |
1597 | return -ENOENT; | |
1598 | } | |
1599 | ||
bb8c093b | 1600 | rc = iwl4965_eeprom_acquire_semaphore(priv); |
b481de9c | 1601 | if (rc < 0) { |
91e17473 | 1602 | IWL_ERROR("Failed to acquire EEPROM semaphore.\n"); |
b481de9c ZY |
1603 | return -ENOENT; |
1604 | } | |
1605 | ||
1606 | /* eeprom is an array of 16bit values */ | |
1607 | for (addr = 0; addr < sz; addr += sizeof(u16)) { | |
bb8c093b CH |
1608 | _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1); |
1609 | _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD); | |
b481de9c ZY |
1610 | |
1611 | for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT; | |
1612 | i += IWL_EEPROM_ACCESS_DELAY) { | |
bb8c093b | 1613 | r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG); |
b481de9c ZY |
1614 | if (r & CSR_EEPROM_REG_READ_VALID_MSK) |
1615 | break; | |
1616 | udelay(IWL_EEPROM_ACCESS_DELAY); | |
1617 | } | |
1618 | ||
1619 | if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) { | |
1620 | IWL_ERROR("Time out reading EEPROM[%d]", addr); | |
1621 | rc = -ETIMEDOUT; | |
1622 | goto done; | |
1623 | } | |
1624 | e[addr / 2] = le16_to_cpu(r >> 16); | |
1625 | } | |
1626 | rc = 0; | |
1627 | ||
1628 | done: | |
bb8c093b | 1629 | iwl4965_eeprom_release_semaphore(priv); |
b481de9c ZY |
1630 | return rc; |
1631 | } | |
1632 | ||
1633 | /****************************************************************************** | |
1634 | * | |
1635 | * Misc. internal state and helper functions | |
1636 | * | |
1637 | ******************************************************************************/ | |
c8b0e6e1 | 1638 | #ifdef CONFIG_IWL4965_DEBUG |
b481de9c ZY |
1639 | |
1640 | /** | |
bb8c093b | 1641 | * iwl4965_report_frame - dump frame to syslog during debug sessions |
b481de9c ZY |
1642 | * |
1643 | * hack this function to show different aspects of received frames, | |
1644 | * including selective frame dumps. | |
1645 | * group100 parameter selects whether to show 1 out of 100 good frames. | |
1646 | * | |
1647 | * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type | |
bb8c093b | 1648 | * info output is okay, but some of this stuff (e.g. iwl4965_rx_frame_stats) |
b481de9c ZY |
1649 | * is 3945-specific and gives bad output for 4965. Need to split the |
1650 | * functionality, keep common stuff here. | |
1651 | */ | |
bb8c093b CH |
1652 | void iwl4965_report_frame(struct iwl4965_priv *priv, |
1653 | struct iwl4965_rx_packet *pkt, | |
b481de9c ZY |
1654 | struct ieee80211_hdr *header, int group100) |
1655 | { | |
1656 | u32 to_us; | |
1657 | u32 print_summary = 0; | |
1658 | u32 print_dump = 0; /* set to 1 to dump all frames' contents */ | |
1659 | u32 hundred = 0; | |
1660 | u32 dataframe = 0; | |
1661 | u16 fc; | |
1662 | u16 seq_ctl; | |
1663 | u16 channel; | |
1664 | u16 phy_flags; | |
1665 | int rate_sym; | |
1666 | u16 length; | |
1667 | u16 status; | |
1668 | u16 bcn_tmr; | |
1669 | u32 tsf_low; | |
1670 | u64 tsf; | |
1671 | u8 rssi; | |
1672 | u8 agc; | |
1673 | u16 sig_avg; | |
1674 | u16 noise_diff; | |
bb8c093b CH |
1675 | struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt); |
1676 | struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); | |
1677 | struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt); | |
b481de9c ZY |
1678 | u8 *data = IWL_RX_DATA(pkt); |
1679 | ||
1680 | /* MAC header */ | |
1681 | fc = le16_to_cpu(header->frame_control); | |
1682 | seq_ctl = le16_to_cpu(header->seq_ctrl); | |
1683 | ||
1684 | /* metadata */ | |
1685 | channel = le16_to_cpu(rx_hdr->channel); | |
1686 | phy_flags = le16_to_cpu(rx_hdr->phy_flags); | |
1687 | rate_sym = rx_hdr->rate; | |
1688 | length = le16_to_cpu(rx_hdr->len); | |
1689 | ||
1690 | /* end-of-frame status and timestamp */ | |
1691 | status = le32_to_cpu(rx_end->status); | |
1692 | bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp); | |
1693 | tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff; | |
1694 | tsf = le64_to_cpu(rx_end->timestamp); | |
1695 | ||
1696 | /* signal statistics */ | |
1697 | rssi = rx_stats->rssi; | |
1698 | agc = rx_stats->agc; | |
1699 | sig_avg = le16_to_cpu(rx_stats->sig_avg); | |
1700 | noise_diff = le16_to_cpu(rx_stats->noise_diff); | |
1701 | ||
1702 | to_us = !compare_ether_addr(header->addr1, priv->mac_addr); | |
1703 | ||
1704 | /* if data frame is to us and all is good, | |
1705 | * (optionally) print summary for only 1 out of every 100 */ | |
1706 | if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) == | |
1707 | (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) { | |
1708 | dataframe = 1; | |
1709 | if (!group100) | |
1710 | print_summary = 1; /* print each frame */ | |
1711 | else if (priv->framecnt_to_us < 100) { | |
1712 | priv->framecnt_to_us++; | |
1713 | print_summary = 0; | |
1714 | } else { | |
1715 | priv->framecnt_to_us = 0; | |
1716 | print_summary = 1; | |
1717 | hundred = 1; | |
1718 | } | |
1719 | } else { | |
1720 | /* print summary for all other frames */ | |
1721 | print_summary = 1; | |
1722 | } | |
1723 | ||
1724 | if (print_summary) { | |
1725 | char *title; | |
1726 | u32 rate; | |
1727 | ||
1728 | if (hundred) | |
1729 | title = "100Frames"; | |
1730 | else if (fc & IEEE80211_FCTL_RETRY) | |
1731 | title = "Retry"; | |
1732 | else if (ieee80211_is_assoc_response(fc)) | |
1733 | title = "AscRsp"; | |
1734 | else if (ieee80211_is_reassoc_response(fc)) | |
1735 | title = "RasRsp"; | |
1736 | else if (ieee80211_is_probe_response(fc)) { | |
1737 | title = "PrbRsp"; | |
1738 | print_dump = 1; /* dump frame contents */ | |
1739 | } else if (ieee80211_is_beacon(fc)) { | |
1740 | title = "Beacon"; | |
1741 | print_dump = 1; /* dump frame contents */ | |
1742 | } else if (ieee80211_is_atim(fc)) | |
1743 | title = "ATIM"; | |
1744 | else if (ieee80211_is_auth(fc)) | |
1745 | title = "Auth"; | |
1746 | else if (ieee80211_is_deauth(fc)) | |
1747 | title = "DeAuth"; | |
1748 | else if (ieee80211_is_disassoc(fc)) | |
1749 | title = "DisAssoc"; | |
1750 | else | |
1751 | title = "Frame"; | |
1752 | ||
bb8c093b | 1753 | rate = iwl4965_rate_index_from_plcp(rate_sym); |
b481de9c ZY |
1754 | if (rate == -1) |
1755 | rate = 0; | |
1756 | else | |
bb8c093b | 1757 | rate = iwl4965_rates[rate].ieee / 2; |
b481de9c ZY |
1758 | |
1759 | /* print frame summary. | |
1760 | * MAC addresses show just the last byte (for brevity), | |
1761 | * but you can hack it to show more, if you'd like to. */ | |
1762 | if (dataframe) | |
1763 | IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, " | |
1764 | "len=%u, rssi=%d, chnl=%d, rate=%u, \n", | |
1765 | title, fc, header->addr1[5], | |
1766 | length, rssi, channel, rate); | |
1767 | else { | |
1768 | /* src/dst addresses assume managed mode */ | |
1769 | IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, " | |
1770 | "src=0x%02x, rssi=%u, tim=%lu usec, " | |
1771 | "phy=0x%02x, chnl=%d\n", | |
1772 | title, fc, header->addr1[5], | |
1773 | header->addr3[5], rssi, | |
1774 | tsf_low - priv->scan_start_tsf, | |
1775 | phy_flags, channel); | |
1776 | } | |
1777 | } | |
1778 | if (print_dump) | |
bb8c093b | 1779 | iwl4965_print_hex_dump(IWL_DL_RX, data, length); |
b481de9c ZY |
1780 | } |
1781 | #endif | |
1782 | ||
bb8c093b | 1783 | static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv) |
b481de9c ZY |
1784 | { |
1785 | if (priv->hw_setting.shared_virt) | |
1786 | pci_free_consistent(priv->pci_dev, | |
bb8c093b | 1787 | sizeof(struct iwl4965_shared), |
b481de9c ZY |
1788 | priv->hw_setting.shared_virt, |
1789 | priv->hw_setting.shared_phys); | |
1790 | } | |
1791 | ||
1792 | /** | |
bb8c093b | 1793 | * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field |
b481de9c ZY |
1794 | * |
1795 | * return : set the bit for each supported rate insert in ie | |
1796 | */ | |
bb8c093b | 1797 | static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate, |
c7c46676 | 1798 | u16 basic_rate, int *left) |
b481de9c ZY |
1799 | { |
1800 | u16 ret_rates = 0, bit; | |
1801 | int i; | |
c7c46676 TW |
1802 | u8 *cnt = ie; |
1803 | u8 *rates = ie + 1; | |
b481de9c ZY |
1804 | |
1805 | for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) { | |
1806 | if (bit & supported_rate) { | |
1807 | ret_rates |= bit; | |
bb8c093b | 1808 | rates[*cnt] = iwl4965_rates[i].ieee | |
c7c46676 TW |
1809 | ((bit & basic_rate) ? 0x80 : 0x00); |
1810 | (*cnt)++; | |
1811 | (*left)--; | |
1812 | if ((*left <= 0) || | |
1813 | (*cnt >= IWL_SUPPORTED_RATES_IE_LEN)) | |
b481de9c ZY |
1814 | break; |
1815 | } | |
1816 | } | |
1817 | ||
1818 | return ret_rates; | |
1819 | } | |
1820 | ||
c8b0e6e1 | 1821 | #ifdef CONFIG_IWL4965_HT |
bb8c093b | 1822 | void static iwl4965_set_ht_capab(struct ieee80211_hw *hw, |
b481de9c ZY |
1823 | struct ieee80211_ht_capability *ht_cap, |
1824 | u8 use_wide_chan); | |
1825 | #endif | |
1826 | ||
1827 | /** | |
bb8c093b | 1828 | * iwl4965_fill_probe_req - fill in all required fields and IE for probe request |
b481de9c | 1829 | */ |
bb8c093b | 1830 | static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv, |
b481de9c ZY |
1831 | struct ieee80211_mgmt *frame, |
1832 | int left, int is_direct) | |
1833 | { | |
1834 | int len = 0; | |
1835 | u8 *pos = NULL; | |
bee488db | 1836 | u16 active_rates, ret_rates, cck_rates, active_rate_basic; |
b481de9c ZY |
1837 | |
1838 | /* Make sure there is enough space for the probe request, | |
1839 | * two mandatory IEs and the data */ | |
1840 | left -= 24; | |
1841 | if (left < 0) | |
1842 | return 0; | |
1843 | len += 24; | |
1844 | ||
1845 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | |
bb8c093b | 1846 | memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c | 1847 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); |
bb8c093b | 1848 | memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c ZY |
1849 | frame->seq_ctrl = 0; |
1850 | ||
1851 | /* fill in our indirect SSID IE */ | |
1852 | /* ...next IE... */ | |
1853 | ||
1854 | left -= 2; | |
1855 | if (left < 0) | |
1856 | return 0; | |
1857 | len += 2; | |
1858 | pos = &(frame->u.probe_req.variable[0]); | |
1859 | *pos++ = WLAN_EID_SSID; | |
1860 | *pos++ = 0; | |
1861 | ||
1862 | /* fill in our direct SSID IE... */ | |
1863 | if (is_direct) { | |
1864 | /* ...next IE... */ | |
1865 | left -= 2 + priv->essid_len; | |
1866 | if (left < 0) | |
1867 | return 0; | |
1868 | /* ... fill it in... */ | |
1869 | *pos++ = WLAN_EID_SSID; | |
1870 | *pos++ = priv->essid_len; | |
1871 | memcpy(pos, priv->essid, priv->essid_len); | |
1872 | pos += priv->essid_len; | |
1873 | len += 2 + priv->essid_len; | |
1874 | } | |
1875 | ||
1876 | /* fill in supported rate */ | |
1877 | /* ...next IE... */ | |
1878 | left -= 2; | |
1879 | if (left < 0) | |
1880 | return 0; | |
c7c46676 | 1881 | |
b481de9c ZY |
1882 | /* ... fill it in... */ |
1883 | *pos++ = WLAN_EID_SUPP_RATES; | |
1884 | *pos = 0; | |
c7c46676 | 1885 | |
bee488db | 1886 | /* exclude 60M rate */ |
1887 | active_rates = priv->rates_mask; | |
1888 | active_rates &= ~IWL_RATE_60M_MASK; | |
1889 | ||
1890 | active_rate_basic = active_rates & IWL_BASIC_RATES_MASK; | |
b481de9c | 1891 | |
c7c46676 | 1892 | cck_rates = IWL_CCK_RATES_MASK & active_rates; |
bb8c093b | 1893 | ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates, |
bee488db | 1894 | active_rate_basic, &left); |
c7c46676 TW |
1895 | active_rates &= ~ret_rates; |
1896 | ||
bb8c093b | 1897 | ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1898 | active_rate_basic, &left); |
c7c46676 TW |
1899 | active_rates &= ~ret_rates; |
1900 | ||
b481de9c ZY |
1901 | len += 2 + *pos; |
1902 | pos += (*pos) + 1; | |
c7c46676 | 1903 | if (active_rates == 0) |
b481de9c ZY |
1904 | goto fill_end; |
1905 | ||
1906 | /* fill in supported extended rate */ | |
1907 | /* ...next IE... */ | |
1908 | left -= 2; | |
1909 | if (left < 0) | |
1910 | return 0; | |
1911 | /* ... fill it in... */ | |
1912 | *pos++ = WLAN_EID_EXT_SUPP_RATES; | |
1913 | *pos = 0; | |
bb8c093b | 1914 | iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1915 | active_rate_basic, &left); |
b481de9c ZY |
1916 | if (*pos > 0) |
1917 | len += 2 + *pos; | |
1918 | ||
c8b0e6e1 | 1919 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
1920 | if (is_direct && priv->is_ht_enabled) { |
1921 | u8 use_wide_chan = 1; | |
1922 | ||
1923 | if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ) | |
1924 | use_wide_chan = 0; | |
1925 | pos += (*pos) + 1; | |
1926 | *pos++ = WLAN_EID_HT_CAPABILITY; | |
1927 | *pos++ = sizeof(struct ieee80211_ht_capability); | |
bb8c093b | 1928 | iwl4965_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos, |
b481de9c ZY |
1929 | use_wide_chan); |
1930 | len += 2 + sizeof(struct ieee80211_ht_capability); | |
1931 | } | |
c8b0e6e1 | 1932 | #endif /*CONFIG_IWL4965_HT */ |
b481de9c ZY |
1933 | |
1934 | fill_end: | |
1935 | return (u16)len; | |
1936 | } | |
1937 | ||
1938 | /* | |
1939 | * QoS support | |
1940 | */ | |
c8b0e6e1 | 1941 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b CH |
1942 | static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv, |
1943 | struct iwl4965_qosparam_cmd *qos) | |
b481de9c ZY |
1944 | { |
1945 | ||
bb8c093b CH |
1946 | return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
1947 | sizeof(struct iwl4965_qosparam_cmd), qos); | |
b481de9c ZY |
1948 | } |
1949 | ||
bb8c093b | 1950 | static void iwl4965_reset_qos(struct iwl4965_priv *priv) |
b481de9c ZY |
1951 | { |
1952 | u16 cw_min = 15; | |
1953 | u16 cw_max = 1023; | |
1954 | u8 aifs = 2; | |
1955 | u8 is_legacy = 0; | |
1956 | unsigned long flags; | |
1957 | int i; | |
1958 | ||
1959 | spin_lock_irqsave(&priv->lock, flags); | |
1960 | priv->qos_data.qos_active = 0; | |
1961 | ||
1962 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) { | |
1963 | if (priv->qos_data.qos_enable) | |
1964 | priv->qos_data.qos_active = 1; | |
1965 | if (!(priv->active_rate & 0xfff0)) { | |
1966 | cw_min = 31; | |
1967 | is_legacy = 1; | |
1968 | } | |
1969 | } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
1970 | if (priv->qos_data.qos_enable) | |
1971 | priv->qos_data.qos_active = 1; | |
1972 | } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) { | |
1973 | cw_min = 31; | |
1974 | is_legacy = 1; | |
1975 | } | |
1976 | ||
1977 | if (priv->qos_data.qos_active) | |
1978 | aifs = 3; | |
1979 | ||
1980 | priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min); | |
1981 | priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max); | |
1982 | priv->qos_data.def_qos_parm.ac[0].aifsn = aifs; | |
1983 | priv->qos_data.def_qos_parm.ac[0].edca_txop = 0; | |
1984 | priv->qos_data.def_qos_parm.ac[0].reserved1 = 0; | |
1985 | ||
1986 | if (priv->qos_data.qos_active) { | |
1987 | i = 1; | |
1988 | priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min); | |
1989 | priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max); | |
1990 | priv->qos_data.def_qos_parm.ac[i].aifsn = 7; | |
1991 | priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; | |
1992 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | |
1993 | ||
1994 | i = 2; | |
1995 | priv->qos_data.def_qos_parm.ac[i].cw_min = | |
1996 | cpu_to_le16((cw_min + 1) / 2 - 1); | |
1997 | priv->qos_data.def_qos_parm.ac[i].cw_max = | |
1998 | cpu_to_le16(cw_max); | |
1999 | priv->qos_data.def_qos_parm.ac[i].aifsn = 2; | |
2000 | if (is_legacy) | |
2001 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | |
2002 | cpu_to_le16(6016); | |
2003 | else | |
2004 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | |
2005 | cpu_to_le16(3008); | |
2006 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | |
2007 | ||
2008 | i = 3; | |
2009 | priv->qos_data.def_qos_parm.ac[i].cw_min = | |
2010 | cpu_to_le16((cw_min + 1) / 4 - 1); | |
2011 | priv->qos_data.def_qos_parm.ac[i].cw_max = | |
2012 | cpu_to_le16((cw_max + 1) / 2 - 1); | |
2013 | priv->qos_data.def_qos_parm.ac[i].aifsn = 2; | |
2014 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | |
2015 | if (is_legacy) | |
2016 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | |
2017 | cpu_to_le16(3264); | |
2018 | else | |
2019 | priv->qos_data.def_qos_parm.ac[i].edca_txop = | |
2020 | cpu_to_le16(1504); | |
2021 | } else { | |
2022 | for (i = 1; i < 4; i++) { | |
2023 | priv->qos_data.def_qos_parm.ac[i].cw_min = | |
2024 | cpu_to_le16(cw_min); | |
2025 | priv->qos_data.def_qos_parm.ac[i].cw_max = | |
2026 | cpu_to_le16(cw_max); | |
2027 | priv->qos_data.def_qos_parm.ac[i].aifsn = aifs; | |
2028 | priv->qos_data.def_qos_parm.ac[i].edca_txop = 0; | |
2029 | priv->qos_data.def_qos_parm.ac[i].reserved1 = 0; | |
2030 | } | |
2031 | } | |
2032 | IWL_DEBUG_QOS("set QoS to default \n"); | |
2033 | ||
2034 | spin_unlock_irqrestore(&priv->lock, flags); | |
2035 | } | |
2036 | ||
bb8c093b | 2037 | static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force) |
b481de9c ZY |
2038 | { |
2039 | unsigned long flags; | |
2040 | ||
b481de9c ZY |
2041 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
2042 | return; | |
2043 | ||
2044 | if (!priv->qos_data.qos_enable) | |
2045 | return; | |
2046 | ||
2047 | spin_lock_irqsave(&priv->lock, flags); | |
2048 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
2049 | ||
2050 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
2051 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
2052 | priv->qos_data.def_qos_parm.qos_flags |= | |
2053 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
2054 | if (priv->qos_data.qos_active) |
2055 | priv->qos_data.def_qos_parm.qos_flags |= | |
2056 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
2057 | ||
c8b0e6e1 | 2058 | #ifdef CONFIG_IWL4965_HT |
f1f1f5c7 TW |
2059 | if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht) |
2060 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; | |
c8b0e6e1 | 2061 | #endif /* CONFIG_IWL4965_HT */ |
f1f1f5c7 | 2062 | |
b481de9c ZY |
2063 | spin_unlock_irqrestore(&priv->lock, flags); |
2064 | ||
bb8c093b | 2065 | if (force || iwl4965_is_associated(priv)) { |
f1f1f5c7 TW |
2066 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
2067 | priv->qos_data.qos_active, | |
2068 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 2069 | |
bb8c093b | 2070 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
2071 | &(priv->qos_data.def_qos_parm)); |
2072 | } | |
2073 | } | |
2074 | ||
c8b0e6e1 | 2075 | #endif /* CONFIG_IWL4965_QOS */ |
b481de9c ZY |
2076 | /* |
2077 | * Power management (not Tx power!) functions | |
2078 | */ | |
2079 | #define MSEC_TO_USEC 1024 | |
2080 | ||
2081 | #define NOSLP __constant_cpu_to_le16(0), 0, 0 | |
2082 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 | |
2083 | #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC) | |
2084 | #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \ | |
2085 | __constant_cpu_to_le32(X1), \ | |
2086 | __constant_cpu_to_le32(X2), \ | |
2087 | __constant_cpu_to_le32(X3), \ | |
2088 | __constant_cpu_to_le32(X4)} | |
2089 | ||
2090 | ||
2091 | /* default power management (not Tx power) table values */ | |
2092 | /* for tim 0-10 */ | |
bb8c093b | 2093 | static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = { |
b481de9c ZY |
2094 | {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
2095 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, | |
2096 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0}, | |
2097 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0}, | |
2098 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1}, | |
2099 | {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1} | |
2100 | }; | |
2101 | ||
2102 | /* for tim > 10 */ | |
bb8c093b | 2103 | static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = { |
b481de9c ZY |
2104 | {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
2105 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), | |
2106 | SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, | |
2107 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), | |
2108 | SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, | |
2109 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), | |
2110 | SLP_VEC(2, 6, 9, 9, 0xFF)}, 0}, | |
2111 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0}, | |
2112 | {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), | |
2113 | SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} | |
2114 | }; | |
2115 | ||
bb8c093b | 2116 | int iwl4965_power_init_handle(struct iwl4965_priv *priv) |
b481de9c ZY |
2117 | { |
2118 | int rc = 0, i; | |
bb8c093b CH |
2119 | struct iwl4965_power_mgr *pow_data; |
2120 | int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC; | |
b481de9c ZY |
2121 | u16 pci_pm; |
2122 | ||
2123 | IWL_DEBUG_POWER("Initialize power \n"); | |
2124 | ||
2125 | pow_data = &(priv->power_data); | |
2126 | ||
2127 | memset(pow_data, 0, sizeof(*pow_data)); | |
2128 | ||
2129 | pow_data->active_index = IWL_POWER_RANGE_0; | |
2130 | pow_data->dtim_val = 0xffff; | |
2131 | ||
2132 | memcpy(&pow_data->pwr_range_0[0], &range_0[0], size); | |
2133 | memcpy(&pow_data->pwr_range_1[0], &range_1[0], size); | |
2134 | ||
2135 | rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm); | |
2136 | if (rc != 0) | |
2137 | return 0; | |
2138 | else { | |
bb8c093b | 2139 | struct iwl4965_powertable_cmd *cmd; |
b481de9c ZY |
2140 | |
2141 | IWL_DEBUG_POWER("adjust power command flags\n"); | |
2142 | ||
2143 | for (i = 0; i < IWL_POWER_AC; i++) { | |
2144 | cmd = &pow_data->pwr_range_0[i].cmd; | |
2145 | ||
2146 | if (pci_pm & 0x1) | |
2147 | cmd->flags &= ~IWL_POWER_PCI_PM_MSK; | |
2148 | else | |
2149 | cmd->flags |= IWL_POWER_PCI_PM_MSK; | |
2150 | } | |
2151 | } | |
2152 | return rc; | |
2153 | } | |
2154 | ||
bb8c093b CH |
2155 | static int iwl4965_update_power_cmd(struct iwl4965_priv *priv, |
2156 | struct iwl4965_powertable_cmd *cmd, u32 mode) | |
b481de9c ZY |
2157 | { |
2158 | int rc = 0, i; | |
2159 | u8 skip; | |
2160 | u32 max_sleep = 0; | |
bb8c093b | 2161 | struct iwl4965_power_vec_entry *range; |
b481de9c | 2162 | u8 period = 0; |
bb8c093b | 2163 | struct iwl4965_power_mgr *pow_data; |
b481de9c ZY |
2164 | |
2165 | if (mode > IWL_POWER_INDEX_5) { | |
2166 | IWL_DEBUG_POWER("Error invalid power mode \n"); | |
2167 | return -1; | |
2168 | } | |
2169 | pow_data = &(priv->power_data); | |
2170 | ||
2171 | if (pow_data->active_index == IWL_POWER_RANGE_0) | |
2172 | range = &pow_data->pwr_range_0[0]; | |
2173 | else | |
2174 | range = &pow_data->pwr_range_1[1]; | |
2175 | ||
bb8c093b | 2176 | memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd)); |
b481de9c ZY |
2177 | |
2178 | #ifdef IWL_MAC80211_DISABLE | |
2179 | if (priv->assoc_network != NULL) { | |
2180 | unsigned long flags; | |
2181 | ||
2182 | period = priv->assoc_network->tim.tim_period; | |
2183 | } | |
2184 | #endif /*IWL_MAC80211_DISABLE */ | |
2185 | skip = range[mode].no_dtim; | |
2186 | ||
2187 | if (period == 0) { | |
2188 | period = 1; | |
2189 | skip = 0; | |
2190 | } | |
2191 | ||
2192 | if (skip == 0) { | |
2193 | max_sleep = period; | |
2194 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | |
2195 | } else { | |
2196 | __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; | |
2197 | max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; | |
2198 | cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; | |
2199 | } | |
2200 | ||
2201 | for (i = 0; i < IWL_POWER_VEC_SIZE; i++) { | |
2202 | if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) | |
2203 | cmd->sleep_interval[i] = cpu_to_le32(max_sleep); | |
2204 | } | |
2205 | ||
2206 | IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags); | |
2207 | IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); | |
2208 | IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout)); | |
2209 | IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n", | |
2210 | le32_to_cpu(cmd->sleep_interval[0]), | |
2211 | le32_to_cpu(cmd->sleep_interval[1]), | |
2212 | le32_to_cpu(cmd->sleep_interval[2]), | |
2213 | le32_to_cpu(cmd->sleep_interval[3]), | |
2214 | le32_to_cpu(cmd->sleep_interval[4])); | |
2215 | ||
2216 | return rc; | |
2217 | } | |
2218 | ||
bb8c093b | 2219 | static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode) |
b481de9c | 2220 | { |
9a62f73b | 2221 | u32 uninitialized_var(final_mode); |
b481de9c | 2222 | int rc; |
bb8c093b | 2223 | struct iwl4965_powertable_cmd cmd; |
b481de9c ZY |
2224 | |
2225 | /* If on battery, set to 3, | |
01ebd063 | 2226 | * if plugged into AC power, set to CAM ("continuously aware mode"), |
b481de9c ZY |
2227 | * else user level */ |
2228 | switch (mode) { | |
2229 | case IWL_POWER_BATTERY: | |
2230 | final_mode = IWL_POWER_INDEX_3; | |
2231 | break; | |
2232 | case IWL_POWER_AC: | |
2233 | final_mode = IWL_POWER_MODE_CAM; | |
2234 | break; | |
2235 | default: | |
2236 | final_mode = mode; | |
2237 | break; | |
2238 | } | |
2239 | ||
2240 | cmd.keep_alive_beacons = 0; | |
2241 | ||
bb8c093b | 2242 | iwl4965_update_power_cmd(priv, &cmd, final_mode); |
b481de9c | 2243 | |
bb8c093b | 2244 | rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd); |
b481de9c ZY |
2245 | |
2246 | if (final_mode == IWL_POWER_MODE_CAM) | |
2247 | clear_bit(STATUS_POWER_PMI, &priv->status); | |
2248 | else | |
2249 | set_bit(STATUS_POWER_PMI, &priv->status); | |
2250 | ||
2251 | return rc; | |
2252 | } | |
2253 | ||
bb8c093b | 2254 | int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
2255 | { |
2256 | /* Filter incoming packets to determine if they are targeted toward | |
2257 | * this network, discarding packets coming from ourselves */ | |
2258 | switch (priv->iw_mode) { | |
2259 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
2260 | /* packets from our adapter are dropped (echo) */ | |
2261 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
2262 | return 0; | |
2263 | /* {broad,multi}cast packets to our IBSS go through */ | |
2264 | if (is_multicast_ether_addr(header->addr1)) | |
2265 | return !compare_ether_addr(header->addr3, priv->bssid); | |
2266 | /* packets to our adapter go through */ | |
2267 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
2268 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
2269 | /* packets from our adapter are dropped (echo) */ | |
2270 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
2271 | return 0; | |
2272 | /* {broad,multi}cast packets to our BSS go through */ | |
2273 | if (is_multicast_ether_addr(header->addr1)) | |
2274 | return !compare_ether_addr(header->addr2, priv->bssid); | |
2275 | /* packets to our adapter go through */ | |
2276 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
2277 | } | |
2278 | ||
2279 | return 1; | |
2280 | } | |
2281 | ||
2282 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
2283 | ||
bb8c093b | 2284 | static const char *iwl4965_get_tx_fail_reason(u32 status) |
b481de9c ZY |
2285 | { |
2286 | switch (status & TX_STATUS_MSK) { | |
2287 | case TX_STATUS_SUCCESS: | |
2288 | return "SUCCESS"; | |
2289 | TX_STATUS_ENTRY(SHORT_LIMIT); | |
2290 | TX_STATUS_ENTRY(LONG_LIMIT); | |
2291 | TX_STATUS_ENTRY(FIFO_UNDERRUN); | |
2292 | TX_STATUS_ENTRY(MGMNT_ABORT); | |
2293 | TX_STATUS_ENTRY(NEXT_FRAG); | |
2294 | TX_STATUS_ENTRY(LIFE_EXPIRE); | |
2295 | TX_STATUS_ENTRY(DEST_PS); | |
2296 | TX_STATUS_ENTRY(ABORTED); | |
2297 | TX_STATUS_ENTRY(BT_RETRY); | |
2298 | TX_STATUS_ENTRY(STA_INVALID); | |
2299 | TX_STATUS_ENTRY(FRAG_DROPPED); | |
2300 | TX_STATUS_ENTRY(TID_DISABLE); | |
2301 | TX_STATUS_ENTRY(FRAME_FLUSHED); | |
2302 | TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL); | |
2303 | TX_STATUS_ENTRY(TX_LOCKED); | |
2304 | TX_STATUS_ENTRY(NO_BEACON_ON_RADAR); | |
2305 | } | |
2306 | ||
2307 | return "UNKNOWN"; | |
2308 | } | |
2309 | ||
2310 | /** | |
bb8c093b | 2311 | * iwl4965_scan_cancel - Cancel any currently executing HW scan |
b481de9c ZY |
2312 | * |
2313 | * NOTE: priv->mutex is not required before calling this function | |
2314 | */ | |
bb8c093b | 2315 | static int iwl4965_scan_cancel(struct iwl4965_priv *priv) |
b481de9c ZY |
2316 | { |
2317 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
2318 | clear_bit(STATUS_SCANNING, &priv->status); | |
2319 | return 0; | |
2320 | } | |
2321 | ||
2322 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
2323 | if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
2324 | IWL_DEBUG_SCAN("Queuing scan abort.\n"); | |
2325 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
2326 | queue_work(priv->workqueue, &priv->abort_scan); | |
2327 | ||
2328 | } else | |
2329 | IWL_DEBUG_SCAN("Scan abort already in progress.\n"); | |
2330 | ||
2331 | return test_bit(STATUS_SCANNING, &priv->status); | |
2332 | } | |
2333 | ||
2334 | return 0; | |
2335 | } | |
2336 | ||
2337 | /** | |
bb8c093b | 2338 | * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan |
b481de9c ZY |
2339 | * @ms: amount of time to wait (in milliseconds) for scan to abort |
2340 | * | |
2341 | * NOTE: priv->mutex must be held before calling this function | |
2342 | */ | |
bb8c093b | 2343 | static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms) |
b481de9c ZY |
2344 | { |
2345 | unsigned long now = jiffies; | |
2346 | int ret; | |
2347 | ||
bb8c093b | 2348 | ret = iwl4965_scan_cancel(priv); |
b481de9c ZY |
2349 | if (ret && ms) { |
2350 | mutex_unlock(&priv->mutex); | |
2351 | while (!time_after(jiffies, now + msecs_to_jiffies(ms)) && | |
2352 | test_bit(STATUS_SCANNING, &priv->status)) | |
2353 | msleep(1); | |
2354 | mutex_lock(&priv->mutex); | |
2355 | ||
2356 | return test_bit(STATUS_SCANNING, &priv->status); | |
2357 | } | |
2358 | ||
2359 | return ret; | |
2360 | } | |
2361 | ||
bb8c093b | 2362 | static void iwl4965_sequence_reset(struct iwl4965_priv *priv) |
b481de9c ZY |
2363 | { |
2364 | /* Reset ieee stats */ | |
2365 | ||
2366 | /* We don't reset the net_device_stats (ieee->stats) on | |
2367 | * re-association */ | |
2368 | ||
2369 | priv->last_seq_num = -1; | |
2370 | priv->last_frag_num = -1; | |
2371 | priv->last_packet_time = 0; | |
2372 | ||
bb8c093b | 2373 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
2374 | } |
2375 | ||
2376 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
2377 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
2378 | ||
bb8c093b | 2379 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
2380 | { |
2381 | u16 new_val = 0; | |
2382 | u16 beacon_factor = 0; | |
2383 | ||
2384 | beacon_factor = | |
2385 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
2386 | / MAX_UCODE_BEACON_INTERVAL; | |
2387 | new_val = beacon_val / beacon_factor; | |
2388 | ||
2389 | return cpu_to_le16(new_val); | |
2390 | } | |
2391 | ||
bb8c093b | 2392 | static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv) |
b481de9c ZY |
2393 | { |
2394 | u64 interval_tm_unit; | |
2395 | u64 tsf, result; | |
2396 | unsigned long flags; | |
2397 | struct ieee80211_conf *conf = NULL; | |
2398 | u16 beacon_int = 0; | |
2399 | ||
2400 | conf = ieee80211_get_hw_conf(priv->hw); | |
2401 | ||
2402 | spin_lock_irqsave(&priv->lock, flags); | |
2403 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1); | |
2404 | priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0); | |
2405 | ||
2406 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
2407 | ||
2408 | tsf = priv->timestamp1; | |
2409 | tsf = ((tsf << 32) | priv->timestamp0); | |
2410 | ||
2411 | beacon_int = priv->beacon_int; | |
2412 | spin_unlock_irqrestore(&priv->lock, flags); | |
2413 | ||
2414 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
2415 | if (beacon_int == 0) { | |
2416 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
2417 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
2418 | } else { | |
2419 | priv->rxon_timing.beacon_interval = | |
2420 | cpu_to_le16(beacon_int); | |
2421 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 2422 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
2423 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
2424 | } | |
2425 | ||
2426 | priv->rxon_timing.atim_window = 0; | |
2427 | } else { | |
2428 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 2429 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
2430 | /* TODO: we need to get atim_window from upper stack |
2431 | * for now we set to 0 */ | |
2432 | priv->rxon_timing.atim_window = 0; | |
2433 | } | |
2434 | ||
2435 | interval_tm_unit = | |
2436 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
2437 | result = do_div(tsf, interval_tm_unit); | |
2438 | priv->rxon_timing.beacon_init_val = | |
2439 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
2440 | ||
2441 | IWL_DEBUG_ASSOC | |
2442 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
2443 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
2444 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
2445 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
2446 | } | |
2447 | ||
bb8c093b | 2448 | static int iwl4965_scan_initiate(struct iwl4965_priv *priv) |
b481de9c ZY |
2449 | { |
2450 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
2451 | IWL_ERROR("APs don't scan.\n"); | |
2452 | return 0; | |
2453 | } | |
2454 | ||
bb8c093b | 2455 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
2456 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); |
2457 | return -EIO; | |
2458 | } | |
2459 | ||
2460 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
2461 | IWL_DEBUG_SCAN("Scan already in progress.\n"); | |
2462 | return -EAGAIN; | |
2463 | } | |
2464 | ||
2465 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
2466 | IWL_DEBUG_SCAN("Scan request while abort pending. " | |
2467 | "Queuing.\n"); | |
2468 | return -EAGAIN; | |
2469 | } | |
2470 | ||
2471 | IWL_DEBUG_INFO("Starting scan...\n"); | |
2472 | priv->scan_bands = 2; | |
2473 | set_bit(STATUS_SCANNING, &priv->status); | |
2474 | priv->scan_start = jiffies; | |
2475 | priv->scan_pass_start = priv->scan_start; | |
2476 | ||
2477 | queue_work(priv->workqueue, &priv->request_scan); | |
2478 | ||
2479 | return 0; | |
2480 | } | |
2481 | ||
bb8c093b | 2482 | static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt) |
b481de9c | 2483 | { |
bb8c093b | 2484 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; |
b481de9c ZY |
2485 | |
2486 | if (hw_decrypt) | |
2487 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
2488 | else | |
2489 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
2490 | ||
2491 | return 0; | |
2492 | } | |
2493 | ||
bb8c093b | 2494 | static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode) |
b481de9c ZY |
2495 | { |
2496 | if (phymode == MODE_IEEE80211A) { | |
2497 | priv->staging_rxon.flags &= | |
2498 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
2499 | | RXON_FLG_CCK_MSK); | |
2500 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2501 | } else { | |
bb8c093b | 2502 | /* Copied from iwl4965_bg_post_associate() */ |
b481de9c ZY |
2503 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
2504 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2505 | else | |
2506 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2507 | ||
2508 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2509 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2510 | ||
2511 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
2512 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
2513 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
2514 | } | |
2515 | } | |
2516 | ||
2517 | /* | |
01ebd063 | 2518 | * initialize rxon structure with default values from eeprom |
b481de9c | 2519 | */ |
bb8c093b | 2520 | static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv) |
b481de9c | 2521 | { |
bb8c093b | 2522 | const struct iwl4965_channel_info *ch_info; |
b481de9c ZY |
2523 | |
2524 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
2525 | ||
2526 | switch (priv->iw_mode) { | |
2527 | case IEEE80211_IF_TYPE_AP: | |
2528 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
2529 | break; | |
2530 | ||
2531 | case IEEE80211_IF_TYPE_STA: | |
2532 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
2533 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
2534 | break; | |
2535 | ||
2536 | case IEEE80211_IF_TYPE_IBSS: | |
2537 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
2538 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
2539 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
2540 | RXON_FILTER_ACCEPT_GRP_MSK; | |
2541 | break; | |
2542 | ||
2543 | case IEEE80211_IF_TYPE_MNTR: | |
2544 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
2545 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
2546 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
2547 | break; | |
2548 | } | |
2549 | ||
2550 | #if 0 | |
2551 | /* TODO: Figure out when short_preamble would be set and cache from | |
2552 | * that */ | |
2553 | if (!hw_to_local(priv->hw)->short_preamble) | |
2554 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2555 | else | |
2556 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2557 | #endif | |
2558 | ||
bb8c093b | 2559 | ch_info = iwl4965_get_channel_info(priv, priv->phymode, |
b481de9c ZY |
2560 | le16_to_cpu(priv->staging_rxon.channel)); |
2561 | ||
2562 | if (!ch_info) | |
2563 | ch_info = &priv->channel_info[0]; | |
2564 | ||
2565 | /* | |
2566 | * in some case A channels are all non IBSS | |
2567 | * in this case force B/G channel | |
2568 | */ | |
2569 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
2570 | !(is_channel_ibss(ch_info))) | |
2571 | ch_info = &priv->channel_info[0]; | |
2572 | ||
2573 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
2574 | if (is_channel_a_band(ch_info)) | |
2575 | priv->phymode = MODE_IEEE80211A; | |
2576 | else | |
2577 | priv->phymode = MODE_IEEE80211G; | |
2578 | ||
bb8c093b | 2579 | iwl4965_set_flags_for_phymode(priv, priv->phymode); |
b481de9c ZY |
2580 | |
2581 | priv->staging_rxon.ofdm_basic_rates = | |
2582 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
2583 | priv->staging_rxon.cck_basic_rates = | |
2584 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
2585 | ||
2586 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
2587 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
2588 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
2589 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
2590 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
2591 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
2592 | iwl4965_set_rxon_chain(priv); | |
2593 | } | |
2594 | ||
bb8c093b | 2595 | static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode) |
b481de9c | 2596 | { |
bb8c093b | 2597 | if (!iwl4965_is_ready_rf(priv)) |
b481de9c ZY |
2598 | return -EAGAIN; |
2599 | ||
2600 | if (mode == IEEE80211_IF_TYPE_IBSS) { | |
bb8c093b | 2601 | const struct iwl4965_channel_info *ch_info; |
b481de9c | 2602 | |
bb8c093b | 2603 | ch_info = iwl4965_get_channel_info(priv, |
b481de9c ZY |
2604 | priv->phymode, |
2605 | le16_to_cpu(priv->staging_rxon.channel)); | |
2606 | ||
2607 | if (!ch_info || !is_channel_ibss(ch_info)) { | |
2608 | IWL_ERROR("channel %d not IBSS channel\n", | |
2609 | le16_to_cpu(priv->staging_rxon.channel)); | |
2610 | return -EINVAL; | |
2611 | } | |
2612 | } | |
2613 | ||
2614 | cancel_delayed_work(&priv->scan_check); | |
bb8c093b | 2615 | if (iwl4965_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
2616 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); |
2617 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
2618 | return -EAGAIN; | |
2619 | } | |
2620 | ||
2621 | priv->iw_mode = mode; | |
2622 | ||
bb8c093b | 2623 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2624 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2625 | ||
bb8c093b | 2626 | iwl4965_clear_stations_table(priv); |
b481de9c | 2627 | |
bb8c093b | 2628 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2629 | |
2630 | return 0; | |
2631 | } | |
2632 | ||
bb8c093b | 2633 | static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv, |
b481de9c | 2634 | struct ieee80211_tx_control *ctl, |
bb8c093b | 2635 | struct iwl4965_cmd *cmd, |
b481de9c ZY |
2636 | struct sk_buff *skb_frag, |
2637 | int last_frag) | |
2638 | { | |
bb8c093b | 2639 | struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo; |
b481de9c ZY |
2640 | |
2641 | switch (keyinfo->alg) { | |
2642 | case ALG_CCMP: | |
2643 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM; | |
2644 | memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen); | |
2645 | IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n"); | |
2646 | break; | |
2647 | ||
2648 | case ALG_TKIP: | |
2649 | #if 0 | |
2650 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP; | |
2651 | ||
2652 | if (last_frag) | |
2653 | memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8, | |
2654 | 8); | |
2655 | else | |
2656 | memset(cmd->cmd.tx.tkip_mic.byte, 0, 8); | |
2657 | #endif | |
2658 | break; | |
2659 | ||
2660 | case ALG_WEP: | |
2661 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP | | |
2662 | (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; | |
2663 | ||
2664 | if (keyinfo->keylen == 13) | |
2665 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
2666 | ||
2667 | memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen); | |
2668 | ||
2669 | IWL_DEBUG_TX("Configuring packet for WEP encryption " | |
2670 | "with key %d\n", ctl->key_idx); | |
2671 | break; | |
2672 | ||
b481de9c ZY |
2673 | default: |
2674 | printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg); | |
2675 | break; | |
2676 | } | |
2677 | } | |
2678 | ||
2679 | /* | |
2680 | * handle build REPLY_TX command notification. | |
2681 | */ | |
bb8c093b CH |
2682 | static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv, |
2683 | struct iwl4965_cmd *cmd, | |
b481de9c ZY |
2684 | struct ieee80211_tx_control *ctrl, |
2685 | struct ieee80211_hdr *hdr, | |
2686 | int is_unicast, u8 std_id) | |
2687 | { | |
2688 | __le16 *qc; | |
2689 | u16 fc = le16_to_cpu(hdr->frame_control); | |
2690 | __le32 tx_flags = cmd->cmd.tx.tx_flags; | |
2691 | ||
2692 | cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
2693 | if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) { | |
2694 | tx_flags |= TX_CMD_FLG_ACK_MSK; | |
2695 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
2696 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
2697 | if (ieee80211_is_probe_response(fc) && | |
2698 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) | |
2699 | tx_flags |= TX_CMD_FLG_TSF_MSK; | |
2700 | } else { | |
2701 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | |
2702 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
2703 | } | |
2704 | ||
2705 | cmd->cmd.tx.sta_id = std_id; | |
2706 | if (ieee80211_get_morefrag(hdr)) | |
2707 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | |
2708 | ||
2709 | qc = ieee80211_get_qos_ctrl(hdr); | |
2710 | if (qc) { | |
2711 | cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf); | |
2712 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | |
2713 | } else | |
2714 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
2715 | ||
2716 | if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
2717 | tx_flags |= TX_CMD_FLG_RTS_MSK; | |
2718 | tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
2719 | } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) { | |
2720 | tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
2721 | tx_flags |= TX_CMD_FLG_CTS_MSK; | |
2722 | } | |
2723 | ||
2724 | if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) | |
2725 | tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | |
2726 | ||
2727 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | |
2728 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { | |
2729 | if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ || | |
2730 | (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ) | |
bc434dd2 | 2731 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); |
b481de9c | 2732 | else |
bc434dd2 | 2733 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); |
b481de9c ZY |
2734 | } else |
2735 | cmd->cmd.tx.timeout.pm_frame_timeout = 0; | |
2736 | ||
2737 | cmd->cmd.tx.driver_txop = 0; | |
2738 | cmd->cmd.tx.tx_flags = tx_flags; | |
2739 | cmd->cmd.tx.next_frame_len = 0; | |
2740 | } | |
2741 | ||
bb8c093b | 2742 | static int iwl4965_get_sta_id(struct iwl4965_priv *priv, struct ieee80211_hdr *hdr) |
b481de9c ZY |
2743 | { |
2744 | int sta_id; | |
2745 | u16 fc = le16_to_cpu(hdr->frame_control); | |
0795af57 | 2746 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
2747 | |
2748 | /* If this frame is broadcast or not data then use the broadcast | |
2749 | * station id */ | |
2750 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || | |
2751 | is_multicast_ether_addr(hdr->addr1)) | |
2752 | return priv->hw_setting.bcast_sta_id; | |
2753 | ||
2754 | switch (priv->iw_mode) { | |
2755 | ||
2756 | /* If this frame is part of a BSS network (we're a station), then | |
2757 | * we use the AP's station id */ | |
2758 | case IEEE80211_IF_TYPE_STA: | |
2759 | return IWL_AP_ID; | |
2760 | ||
2761 | /* If we are an AP, then find the station, or use BCAST */ | |
2762 | case IEEE80211_IF_TYPE_AP: | |
bb8c093b | 2763 | sta_id = iwl4965_hw_find_station(priv, hdr->addr1); |
b481de9c ZY |
2764 | if (sta_id != IWL_INVALID_STATION) |
2765 | return sta_id; | |
2766 | return priv->hw_setting.bcast_sta_id; | |
2767 | ||
2768 | /* If this frame is part of a IBSS network, then we use the | |
2769 | * target specific station id */ | |
2770 | case IEEE80211_IF_TYPE_IBSS: | |
bb8c093b | 2771 | sta_id = iwl4965_hw_find_station(priv, hdr->addr1); |
b481de9c ZY |
2772 | if (sta_id != IWL_INVALID_STATION) |
2773 | return sta_id; | |
2774 | ||
bb8c093b | 2775 | sta_id = iwl4965_add_station_flags(priv, hdr->addr1, 0, CMD_ASYNC); |
b481de9c ZY |
2776 | |
2777 | if (sta_id != IWL_INVALID_STATION) | |
2778 | return sta_id; | |
2779 | ||
0795af57 | 2780 | IWL_DEBUG_DROP("Station %s not in station map. " |
b481de9c | 2781 | "Defaulting to broadcast...\n", |
0795af57 | 2782 | print_mac(mac, hdr->addr1)); |
bb8c093b | 2783 | iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
b481de9c ZY |
2784 | return priv->hw_setting.bcast_sta_id; |
2785 | ||
2786 | default: | |
01ebd063 | 2787 | IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode); |
b481de9c ZY |
2788 | return priv->hw_setting.bcast_sta_id; |
2789 | } | |
2790 | } | |
2791 | ||
2792 | /* | |
2793 | * start REPLY_TX command process | |
2794 | */ | |
bb8c093b | 2795 | static int iwl4965_tx_skb(struct iwl4965_priv *priv, |
b481de9c ZY |
2796 | struct sk_buff *skb, struct ieee80211_tx_control *ctl) |
2797 | { | |
2798 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
bb8c093b | 2799 | struct iwl4965_tfd_frame *tfd; |
b481de9c ZY |
2800 | u32 *control_flags; |
2801 | int txq_id = ctl->queue; | |
bb8c093b CH |
2802 | struct iwl4965_tx_queue *txq = NULL; |
2803 | struct iwl4965_queue *q = NULL; | |
b481de9c ZY |
2804 | dma_addr_t phys_addr; |
2805 | dma_addr_t txcmd_phys; | |
bb8c093b | 2806 | struct iwl4965_cmd *out_cmd = NULL; |
b481de9c ZY |
2807 | u16 len, idx, len_org; |
2808 | u8 id, hdr_len, unicast; | |
2809 | u8 sta_id; | |
2810 | u16 seq_number = 0; | |
2811 | u16 fc; | |
2812 | __le16 *qc; | |
2813 | u8 wait_write_ptr = 0; | |
2814 | unsigned long flags; | |
2815 | int rc; | |
2816 | ||
2817 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 2818 | if (iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
2819 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); |
2820 | goto drop_unlock; | |
2821 | } | |
2822 | ||
2823 | if (!priv->interface_id) { | |
2824 | IWL_DEBUG_DROP("Dropping - !priv->interface_id\n"); | |
2825 | goto drop_unlock; | |
2826 | } | |
2827 | ||
2828 | if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) { | |
2829 | IWL_ERROR("ERROR: No TX rate available.\n"); | |
2830 | goto drop_unlock; | |
2831 | } | |
2832 | ||
2833 | unicast = !is_multicast_ether_addr(hdr->addr1); | |
2834 | id = 0; | |
2835 | ||
2836 | fc = le16_to_cpu(hdr->frame_control); | |
2837 | ||
c8b0e6e1 | 2838 | #ifdef CONFIG_IWL4965_DEBUG |
b481de9c ZY |
2839 | if (ieee80211_is_auth(fc)) |
2840 | IWL_DEBUG_TX("Sending AUTH frame\n"); | |
2841 | else if (ieee80211_is_assoc_request(fc)) | |
2842 | IWL_DEBUG_TX("Sending ASSOC frame\n"); | |
2843 | else if (ieee80211_is_reassoc_request(fc)) | |
2844 | IWL_DEBUG_TX("Sending REASSOC frame\n"); | |
2845 | #endif | |
2846 | ||
bb8c093b | 2847 | if (!iwl4965_is_associated(priv) && |
b481de9c | 2848 | ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) { |
bb8c093b | 2849 | IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n"); |
b481de9c ZY |
2850 | goto drop_unlock; |
2851 | } | |
2852 | ||
2853 | spin_unlock_irqrestore(&priv->lock, flags); | |
2854 | ||
2855 | hdr_len = ieee80211_get_hdrlen(fc); | |
bb8c093b | 2856 | sta_id = iwl4965_get_sta_id(priv, hdr); |
b481de9c | 2857 | if (sta_id == IWL_INVALID_STATION) { |
0795af57 JP |
2858 | DECLARE_MAC_BUF(mac); |
2859 | ||
2860 | IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n", | |
2861 | print_mac(mac, hdr->addr1)); | |
b481de9c ZY |
2862 | goto drop; |
2863 | } | |
2864 | ||
2865 | IWL_DEBUG_RATE("station Id %d\n", sta_id); | |
2866 | ||
2867 | qc = ieee80211_get_qos_ctrl(hdr); | |
2868 | if (qc) { | |
2869 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2870 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | |
2871 | IEEE80211_SCTL_SEQ; | |
2872 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | |
2873 | (hdr->seq_ctrl & | |
2874 | __constant_cpu_to_le16(IEEE80211_SCTL_FRAG)); | |
2875 | seq_number += 0x10; | |
c8b0e6e1 CH |
2876 | #ifdef CONFIG_IWL4965_HT |
2877 | #ifdef CONFIG_IWL4965_HT_AGG | |
b481de9c ZY |
2878 | /* aggregation is on for this <sta,tid> */ |
2879 | if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG) | |
2880 | txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; | |
c8b0e6e1 CH |
2881 | #endif /* CONFIG_IWL4965_HT_AGG */ |
2882 | #endif /* CONFIG_IWL4965_HT */ | |
b481de9c ZY |
2883 | } |
2884 | txq = &priv->txq[txq_id]; | |
2885 | q = &txq->q; | |
2886 | ||
2887 | spin_lock_irqsave(&priv->lock, flags); | |
2888 | ||
fc4b6853 | 2889 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
2890 | memset(tfd, 0, sizeof(*tfd)); |
2891 | control_flags = (u32 *) tfd; | |
fc4b6853 | 2892 | idx = get_cmd_index(q, q->write_ptr, 0); |
b481de9c | 2893 | |
bb8c093b | 2894 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info)); |
fc4b6853 TW |
2895 | txq->txb[q->write_ptr].skb[0] = skb; |
2896 | memcpy(&(txq->txb[q->write_ptr].status.control), | |
b481de9c ZY |
2897 | ctl, sizeof(struct ieee80211_tx_control)); |
2898 | out_cmd = &txq->cmd[idx]; | |
2899 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | |
2900 | memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx)); | |
2901 | out_cmd->hdr.cmd = REPLY_TX; | |
2902 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | |
fc4b6853 | 2903 | INDEX_TO_SEQ(q->write_ptr))); |
b481de9c ZY |
2904 | /* copy frags header */ |
2905 | memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len); | |
2906 | ||
2907 | /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */ | |
2908 | len = priv->hw_setting.tx_cmd_len + | |
bb8c093b | 2909 | sizeof(struct iwl4965_cmd_header) + hdr_len; |
b481de9c ZY |
2910 | |
2911 | len_org = len; | |
2912 | len = (len + 3) & ~3; | |
2913 | ||
2914 | if (len_org != len) | |
2915 | len_org = 1; | |
2916 | else | |
2917 | len_org = 0; | |
2918 | ||
bb8c093b CH |
2919 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx + |
2920 | offsetof(struct iwl4965_cmd, hdr); | |
b481de9c | 2921 | |
bb8c093b | 2922 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
b481de9c ZY |
2923 | |
2924 | if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT)) | |
bb8c093b | 2925 | iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0); |
b481de9c ZY |
2926 | |
2927 | /* 802.11 null functions have no payload... */ | |
2928 | len = skb->len - hdr_len; | |
2929 | if (len) { | |
2930 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | |
2931 | len, PCI_DMA_TODEVICE); | |
bb8c093b | 2932 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); |
b481de9c ZY |
2933 | } |
2934 | ||
2935 | if (len_org) | |
2936 | out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK; | |
2937 | ||
2938 | len = (u16)skb->len; | |
2939 | out_cmd->cmd.tx.len = cpu_to_le16(len); | |
2940 | ||
2941 | /* TODO need this for burst mode later on */ | |
bb8c093b | 2942 | iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id); |
b481de9c ZY |
2943 | |
2944 | /* set is_hcca to 0; it probably will never be implemented */ | |
bb8c093b | 2945 | iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0); |
b481de9c ZY |
2946 | |
2947 | iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys, | |
2948 | hdr, hdr_len, ctl, NULL); | |
2949 | ||
2950 | if (!ieee80211_get_morefrag(hdr)) { | |
2951 | txq->need_update = 1; | |
2952 | if (qc) { | |
2953 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2954 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | |
2955 | } | |
2956 | } else { | |
2957 | wait_write_ptr = 1; | |
2958 | txq->need_update = 0; | |
2959 | } | |
2960 | ||
bb8c093b | 2961 | iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload, |
b481de9c ZY |
2962 | sizeof(out_cmd->cmd.tx)); |
2963 | ||
bb8c093b | 2964 | iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr, |
b481de9c ZY |
2965 | ieee80211_get_hdrlen(fc)); |
2966 | ||
2967 | iwl4965_tx_queue_update_wr_ptr(priv, txq, len); | |
2968 | ||
bb8c093b CH |
2969 | q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd); |
2970 | rc = iwl4965_tx_queue_update_write_ptr(priv, txq); | |
b481de9c ZY |
2971 | spin_unlock_irqrestore(&priv->lock, flags); |
2972 | ||
2973 | if (rc) | |
2974 | return rc; | |
2975 | ||
bb8c093b | 2976 | if ((iwl4965_queue_space(q) < q->high_mark) |
b481de9c ZY |
2977 | && priv->mac80211_registered) { |
2978 | if (wait_write_ptr) { | |
2979 | spin_lock_irqsave(&priv->lock, flags); | |
2980 | txq->need_update = 1; | |
bb8c093b | 2981 | iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2982 | spin_unlock_irqrestore(&priv->lock, flags); |
2983 | } | |
2984 | ||
2985 | ieee80211_stop_queue(priv->hw, ctl->queue); | |
2986 | } | |
2987 | ||
2988 | return 0; | |
2989 | ||
2990 | drop_unlock: | |
2991 | spin_unlock_irqrestore(&priv->lock, flags); | |
2992 | drop: | |
2993 | return -1; | |
2994 | } | |
2995 | ||
bb8c093b | 2996 | static void iwl4965_set_rate(struct iwl4965_priv *priv) |
b481de9c ZY |
2997 | { |
2998 | const struct ieee80211_hw_mode *hw = NULL; | |
2999 | struct ieee80211_rate *rate; | |
3000 | int i; | |
3001 | ||
bb8c093b | 3002 | hw = iwl4965_get_hw_mode(priv, priv->phymode); |
c4ba9621 SA |
3003 | if (!hw) { |
3004 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
3005 | return; | |
3006 | } | |
b481de9c ZY |
3007 | |
3008 | priv->active_rate = 0; | |
3009 | priv->active_rate_basic = 0; | |
3010 | ||
3011 | IWL_DEBUG_RATE("Setting rates for 802.11%c\n", | |
3012 | hw->mode == MODE_IEEE80211A ? | |
3013 | 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g')); | |
3014 | ||
3015 | for (i = 0; i < hw->num_rates; i++) { | |
3016 | rate = &(hw->rates[i]); | |
3017 | if ((rate->val < IWL_RATE_COUNT) && | |
3018 | (rate->flags & IEEE80211_RATE_SUPPORTED)) { | |
3019 | IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n", | |
bb8c093b | 3020 | rate->val, iwl4965_rates[rate->val].plcp, |
b481de9c ZY |
3021 | (rate->flags & IEEE80211_RATE_BASIC) ? |
3022 | "*" : ""); | |
3023 | priv->active_rate |= (1 << rate->val); | |
3024 | if (rate->flags & IEEE80211_RATE_BASIC) | |
3025 | priv->active_rate_basic |= (1 << rate->val); | |
3026 | } else | |
3027 | IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n", | |
bb8c093b | 3028 | rate->val, iwl4965_rates[rate->val].plcp); |
b481de9c ZY |
3029 | } |
3030 | ||
3031 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
3032 | priv->active_rate, priv->active_rate_basic); | |
3033 | ||
3034 | /* | |
3035 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
3036 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
3037 | * OFDM | |
3038 | */ | |
3039 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
3040 | priv->staging_rxon.cck_basic_rates = | |
3041 | ((priv->active_rate_basic & | |
3042 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
3043 | else | |
3044 | priv->staging_rxon.cck_basic_rates = | |
3045 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
3046 | ||
3047 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
3048 | priv->staging_rxon.ofdm_basic_rates = | |
3049 | ((priv->active_rate_basic & | |
3050 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
3051 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
3052 | else | |
3053 | priv->staging_rxon.ofdm_basic_rates = | |
3054 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
3055 | } | |
3056 | ||
bb8c093b | 3057 | static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio) |
b481de9c ZY |
3058 | { |
3059 | unsigned long flags; | |
3060 | ||
3061 | if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
3062 | return; | |
3063 | ||
3064 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n", | |
3065 | disable_radio ? "OFF" : "ON"); | |
3066 | ||
3067 | if (disable_radio) { | |
bb8c093b | 3068 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
3069 | /* FIXME: This is a workaround for AP */ |
3070 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
3071 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 3072 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
3073 | CSR_UCODE_SW_BIT_RFKILL); |
3074 | spin_unlock_irqrestore(&priv->lock, flags); | |
bb8c093b | 3075 | iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0); |
b481de9c ZY |
3076 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
3077 | } | |
3078 | return; | |
3079 | } | |
3080 | ||
3081 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 3082 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
b481de9c ZY |
3083 | |
3084 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
3085 | spin_unlock_irqrestore(&priv->lock, flags); | |
3086 | ||
3087 | /* wake up ucode */ | |
3088 | msleep(10); | |
3089 | ||
3090 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b CH |
3091 | iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
3092 | if (!iwl4965_grab_nic_access(priv)) | |
3093 | iwl4965_release_nic_access(priv); | |
b481de9c ZY |
3094 | spin_unlock_irqrestore(&priv->lock, flags); |
3095 | ||
3096 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
3097 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
3098 | "disabled by HW switch\n"); | |
3099 | return; | |
3100 | } | |
3101 | ||
3102 | queue_work(priv->workqueue, &priv->restart); | |
3103 | return; | |
3104 | } | |
3105 | ||
bb8c093b | 3106 | void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb, |
b481de9c ZY |
3107 | u32 decrypt_res, struct ieee80211_rx_status *stats) |
3108 | { | |
3109 | u16 fc = | |
3110 | le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control); | |
3111 | ||
3112 | if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) | |
3113 | return; | |
3114 | ||
3115 | if (!(fc & IEEE80211_FCTL_PROTECTED)) | |
3116 | return; | |
3117 | ||
3118 | IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res); | |
3119 | switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) { | |
3120 | case RX_RES_STATUS_SEC_TYPE_TKIP: | |
3121 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == | |
3122 | RX_RES_STATUS_BAD_ICV_MIC) | |
3123 | stats->flag |= RX_FLAG_MMIC_ERROR; | |
3124 | case RX_RES_STATUS_SEC_TYPE_WEP: | |
3125 | case RX_RES_STATUS_SEC_TYPE_CCMP: | |
3126 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == | |
3127 | RX_RES_STATUS_DECRYPT_OK) { | |
3128 | IWL_DEBUG_RX("hw decrypt successfully!!!\n"); | |
3129 | stats->flag |= RX_FLAG_DECRYPTED; | |
3130 | } | |
3131 | break; | |
3132 | ||
3133 | default: | |
3134 | break; | |
3135 | } | |
3136 | } | |
3137 | ||
bb8c093b CH |
3138 | void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv, |
3139 | struct iwl4965_rx_mem_buffer *rxb, | |
b481de9c ZY |
3140 | void *data, short len, |
3141 | struct ieee80211_rx_status *stats, | |
3142 | u16 phy_flags) | |
3143 | { | |
bb8c093b | 3144 | struct iwl4965_rt_rx_hdr *iwl4965_rt; |
b481de9c ZY |
3145 | |
3146 | /* First cache any information we need before we overwrite | |
3147 | * the information provided in the skb from the hardware */ | |
3148 | s8 signal = stats->ssi; | |
3149 | s8 noise = 0; | |
3150 | int rate = stats->rate; | |
3151 | u64 tsf = stats->mactime; | |
3152 | __le16 phy_flags_hw = cpu_to_le16(phy_flags); | |
3153 | ||
3154 | /* We received data from the HW, so stop the watchdog */ | |
bb8c093b | 3155 | if (len > IWL_RX_BUF_SIZE - sizeof(*iwl4965_rt)) { |
b481de9c ZY |
3156 | IWL_DEBUG_DROP("Dropping too large packet in monitor\n"); |
3157 | return; | |
3158 | } | |
3159 | ||
3160 | /* copy the frame data to write after where the radiotap header goes */ | |
bb8c093b CH |
3161 | iwl4965_rt = (void *)rxb->skb->data; |
3162 | memmove(iwl4965_rt->payload, data, len); | |
b481de9c | 3163 | |
bb8c093b CH |
3164 | iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION; |
3165 | iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */ | |
b481de9c ZY |
3166 | |
3167 | /* total header + data */ | |
bb8c093b | 3168 | iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt)); |
b481de9c ZY |
3169 | |
3170 | /* Set the size of the skb to the size of the frame */ | |
bb8c093b | 3171 | skb_put(rxb->skb, sizeof(*iwl4965_rt) + len); |
b481de9c ZY |
3172 | |
3173 | /* Big bitfield of all the fields we provide in radiotap */ | |
bb8c093b | 3174 | iwl4965_rt->rt_hdr.it_present = |
b481de9c ZY |
3175 | cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) | |
3176 | (1 << IEEE80211_RADIOTAP_FLAGS) | | |
3177 | (1 << IEEE80211_RADIOTAP_RATE) | | |
3178 | (1 << IEEE80211_RADIOTAP_CHANNEL) | | |
3179 | (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | | |
3180 | (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | | |
3181 | (1 << IEEE80211_RADIOTAP_ANTENNA)); | |
3182 | ||
3183 | /* Zero the flags, we'll add to them as we go */ | |
bb8c093b | 3184 | iwl4965_rt->rt_flags = 0; |
b481de9c | 3185 | |
bb8c093b | 3186 | iwl4965_rt->rt_tsf = cpu_to_le64(tsf); |
b481de9c ZY |
3187 | |
3188 | /* Convert to dBm */ | |
bb8c093b CH |
3189 | iwl4965_rt->rt_dbmsignal = signal; |
3190 | iwl4965_rt->rt_dbmnoise = noise; | |
b481de9c ZY |
3191 | |
3192 | /* Convert the channel frequency and set the flags */ | |
bb8c093b | 3193 | iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq); |
b481de9c | 3194 | if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK)) |
bb8c093b | 3195 | iwl4965_rt->rt_chbitmask = |
b481de9c ZY |
3196 | cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ)); |
3197 | else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK) | |
bb8c093b | 3198 | iwl4965_rt->rt_chbitmask = |
b481de9c ZY |
3199 | cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ)); |
3200 | else /* 802.11g */ | |
bb8c093b | 3201 | iwl4965_rt->rt_chbitmask = |
b481de9c ZY |
3202 | cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ)); |
3203 | ||
bb8c093b | 3204 | rate = iwl4965_rate_index_from_plcp(rate); |
b481de9c | 3205 | if (rate == -1) |
bb8c093b | 3206 | iwl4965_rt->rt_rate = 0; |
b481de9c | 3207 | else |
bb8c093b | 3208 | iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee; |
b481de9c ZY |
3209 | |
3210 | /* antenna number */ | |
bb8c093b | 3211 | iwl4965_rt->rt_antenna = |
b481de9c ZY |
3212 | le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4; |
3213 | ||
3214 | /* set the preamble flag if we have it */ | |
3215 | if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) | |
bb8c093b | 3216 | iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; |
b481de9c ZY |
3217 | |
3218 | IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len); | |
3219 | ||
3220 | stats->flag |= RX_FLAG_RADIOTAP; | |
3221 | ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats); | |
3222 | rxb->skb = NULL; | |
3223 | } | |
3224 | ||
3225 | ||
3226 | #define IWL_PACKET_RETRY_TIME HZ | |
3227 | ||
bb8c093b | 3228 | int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
3229 | { |
3230 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
3231 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
3232 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
3233 | u16 *last_seq, *last_frag; | |
3234 | unsigned long *last_time; | |
3235 | ||
3236 | switch (priv->iw_mode) { | |
3237 | case IEEE80211_IF_TYPE_IBSS:{ | |
3238 | struct list_head *p; | |
bb8c093b | 3239 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
3240 | u8 *mac = header->addr2; |
3241 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
3242 | ||
3243 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 3244 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
3245 | if (!compare_ether_addr(entry->mac, mac)) |
3246 | break; | |
3247 | } | |
3248 | if (p == &priv->ibss_mac_hash[index]) { | |
3249 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
3250 | if (!entry) { | |
bc434dd2 | 3251 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
3252 | return 0; |
3253 | } | |
3254 | memcpy(entry->mac, mac, ETH_ALEN); | |
3255 | entry->seq_num = seq; | |
3256 | entry->frag_num = frag; | |
3257 | entry->packet_time = jiffies; | |
bc434dd2 | 3258 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
3259 | return 0; |
3260 | } | |
3261 | last_seq = &entry->seq_num; | |
3262 | last_frag = &entry->frag_num; | |
3263 | last_time = &entry->packet_time; | |
3264 | break; | |
3265 | } | |
3266 | case IEEE80211_IF_TYPE_STA: | |
3267 | last_seq = &priv->last_seq_num; | |
3268 | last_frag = &priv->last_frag_num; | |
3269 | last_time = &priv->last_packet_time; | |
3270 | break; | |
3271 | default: | |
3272 | return 0; | |
3273 | } | |
3274 | if ((*last_seq == seq) && | |
3275 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
3276 | if (*last_frag == frag) | |
3277 | goto drop; | |
3278 | if (*last_frag + 1 != frag) | |
3279 | /* out-of-order fragment */ | |
3280 | goto drop; | |
3281 | } else | |
3282 | *last_seq = seq; | |
3283 | ||
3284 | *last_frag = frag; | |
3285 | *last_time = jiffies; | |
3286 | return 0; | |
3287 | ||
3288 | drop: | |
3289 | return 1; | |
3290 | } | |
3291 | ||
c8b0e6e1 | 3292 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
3293 | |
3294 | #include "iwl-spectrum.h" | |
3295 | ||
3296 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
3297 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
3298 | #define TIME_UNIT 1024 | |
3299 | ||
3300 | /* | |
3301 | * extended beacon time format | |
3302 | * time in usec will be changed into a 32-bit value in 8:24 format | |
3303 | * the high 1 byte is the beacon counts | |
3304 | * the lower 3 bytes is the time in usec within one beacon interval | |
3305 | */ | |
3306 | ||
bb8c093b | 3307 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
3308 | { |
3309 | u32 quot; | |
3310 | u32 rem; | |
3311 | u32 interval = beacon_interval * 1024; | |
3312 | ||
3313 | if (!interval || !usec) | |
3314 | return 0; | |
3315 | ||
3316 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
3317 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
3318 | ||
3319 | return (quot << 24) + rem; | |
3320 | } | |
3321 | ||
3322 | /* base is usually what we get from ucode with each received frame, | |
3323 | * the same as HW timer counter counting down | |
3324 | */ | |
3325 | ||
bb8c093b | 3326 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
3327 | { |
3328 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
3329 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
3330 | u32 interval = beacon_interval * TIME_UNIT; | |
3331 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
3332 | (addon & BEACON_TIME_MASK_HIGH); | |
3333 | ||
3334 | if (base_low > addon_low) | |
3335 | res += base_low - addon_low; | |
3336 | else if (base_low < addon_low) { | |
3337 | res += interval + base_low - addon_low; | |
3338 | res += (1 << 24); | |
3339 | } else | |
3340 | res += (1 << 24); | |
3341 | ||
3342 | return cpu_to_le32(res); | |
3343 | } | |
3344 | ||
bb8c093b | 3345 | static int iwl4965_get_measurement(struct iwl4965_priv *priv, |
b481de9c ZY |
3346 | struct ieee80211_measurement_params *params, |
3347 | u8 type) | |
3348 | { | |
bb8c093b CH |
3349 | struct iwl4965_spectrum_cmd spectrum; |
3350 | struct iwl4965_rx_packet *res; | |
3351 | struct iwl4965_host_cmd cmd = { | |
b481de9c ZY |
3352 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
3353 | .data = (void *)&spectrum, | |
3354 | .meta.flags = CMD_WANT_SKB, | |
3355 | }; | |
3356 | u32 add_time = le64_to_cpu(params->start_time); | |
3357 | int rc; | |
3358 | int spectrum_resp_status; | |
3359 | int duration = le16_to_cpu(params->duration); | |
3360 | ||
bb8c093b | 3361 | if (iwl4965_is_associated(priv)) |
b481de9c | 3362 | add_time = |
bb8c093b | 3363 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
3364 | le64_to_cpu(params->start_time) - priv->last_tsf, |
3365 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
3366 | ||
3367 | memset(&spectrum, 0, sizeof(spectrum)); | |
3368 | ||
3369 | spectrum.channel_count = cpu_to_le16(1); | |
3370 | spectrum.flags = | |
3371 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
3372 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
3373 | cmd.len = sizeof(spectrum); | |
3374 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
3375 | ||
bb8c093b | 3376 | if (iwl4965_is_associated(priv)) |
b481de9c | 3377 | spectrum.start_time = |
bb8c093b | 3378 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
3379 | add_time, |
3380 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
3381 | else | |
3382 | spectrum.start_time = 0; | |
3383 | ||
3384 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
3385 | spectrum.channels[0].channel = params->channel; | |
3386 | spectrum.channels[0].type = type; | |
3387 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
3388 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
3389 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
3390 | ||
bb8c093b | 3391 | rc = iwl4965_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
3392 | if (rc) |
3393 | return rc; | |
3394 | ||
bb8c093b | 3395 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
3396 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
3397 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
3398 | rc = -EIO; | |
3399 | } | |
3400 | ||
3401 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
3402 | switch (spectrum_resp_status) { | |
3403 | case 0: /* Command will be handled */ | |
3404 | if (res->u.spectrum.id != 0xff) { | |
3405 | IWL_DEBUG_INFO | |
3406 | ("Replaced existing measurement: %d\n", | |
3407 | res->u.spectrum.id); | |
3408 | priv->measurement_status &= ~MEASUREMENT_READY; | |
3409 | } | |
3410 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
3411 | rc = 0; | |
3412 | break; | |
3413 | ||
3414 | case 1: /* Command will not be handled */ | |
3415 | rc = -EAGAIN; | |
3416 | break; | |
3417 | } | |
3418 | ||
3419 | dev_kfree_skb_any(cmd.meta.u.skb); | |
3420 | ||
3421 | return rc; | |
3422 | } | |
3423 | #endif | |
3424 | ||
bb8c093b CH |
3425 | static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv, |
3426 | struct iwl4965_tx_info *tx_sta) | |
b481de9c ZY |
3427 | { |
3428 | ||
3429 | tx_sta->status.ack_signal = 0; | |
3430 | tx_sta->status.excessive_retries = 0; | |
3431 | tx_sta->status.queue_length = 0; | |
3432 | tx_sta->status.queue_number = 0; | |
3433 | ||
3434 | if (in_interrupt()) | |
3435 | ieee80211_tx_status_irqsafe(priv->hw, | |
3436 | tx_sta->skb[0], &(tx_sta->status)); | |
3437 | else | |
3438 | ieee80211_tx_status(priv->hw, | |
3439 | tx_sta->skb[0], &(tx_sta->status)); | |
3440 | ||
3441 | tx_sta->skb[0] = NULL; | |
3442 | } | |
3443 | ||
3444 | /** | |
bb8c093b | 3445 | * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC. |
b481de9c ZY |
3446 | * |
3447 | * When FW advances 'R' index, all entries between old and | |
3448 | * new 'R' index need to be reclaimed. As result, some free space | |
3449 | * forms. If there is enough free space (> low mark), wake Tx queue. | |
3450 | */ | |
bb8c093b | 3451 | int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index) |
b481de9c | 3452 | { |
bb8c093b CH |
3453 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
3454 | struct iwl4965_queue *q = &txq->q; | |
b481de9c ZY |
3455 | int nfreed = 0; |
3456 | ||
3457 | if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) { | |
3458 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | |
3459 | "is out of range [0-%d] %d %d.\n", txq_id, | |
fc4b6853 | 3460 | index, q->n_bd, q->write_ptr, q->read_ptr); |
b481de9c ZY |
3461 | return 0; |
3462 | } | |
3463 | ||
bb8c093b | 3464 | for (index = iwl4965_queue_inc_wrap(index, q->n_bd); |
fc4b6853 | 3465 | q->read_ptr != index; |
bb8c093b | 3466 | q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
b481de9c | 3467 | if (txq_id != IWL_CMD_QUEUE_NUM) { |
bb8c093b | 3468 | iwl4965_txstatus_to_ieee(priv, |
fc4b6853 | 3469 | &(txq->txb[txq->q.read_ptr])); |
bb8c093b | 3470 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c ZY |
3471 | } else if (nfreed > 1) { |
3472 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index, | |
fc4b6853 | 3473 | q->write_ptr, q->read_ptr); |
b481de9c ZY |
3474 | queue_work(priv->workqueue, &priv->restart); |
3475 | } | |
3476 | nfreed++; | |
3477 | } | |
3478 | ||
bb8c093b | 3479 | if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) && |
b481de9c ZY |
3480 | (txq_id != IWL_CMD_QUEUE_NUM) && |
3481 | priv->mac80211_registered) | |
3482 | ieee80211_wake_queue(priv->hw, txq_id); | |
3483 | ||
3484 | ||
3485 | return nfreed; | |
3486 | } | |
3487 | ||
bb8c093b | 3488 | static int iwl4965_is_tx_success(u32 status) |
b481de9c ZY |
3489 | { |
3490 | status &= TX_STATUS_MSK; | |
3491 | return (status == TX_STATUS_SUCCESS) | |
3492 | || (status == TX_STATUS_DIRECT_DONE); | |
3493 | } | |
3494 | ||
3495 | /****************************************************************************** | |
3496 | * | |
3497 | * Generic RX handler implementations | |
3498 | * | |
3499 | ******************************************************************************/ | |
c8b0e6e1 CH |
3500 | #ifdef CONFIG_IWL4965_HT |
3501 | #ifdef CONFIG_IWL4965_HT_AGG | |
b481de9c | 3502 | |
bb8c093b | 3503 | static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv, |
b481de9c ZY |
3504 | struct ieee80211_hdr *hdr) |
3505 | { | |
3506 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) | |
3507 | return IWL_AP_ID; | |
3508 | else { | |
3509 | u8 *da = ieee80211_get_DA(hdr); | |
bb8c093b | 3510 | return iwl4965_hw_find_station(priv, da); |
b481de9c ZY |
3511 | } |
3512 | } | |
3513 | ||
bb8c093b CH |
3514 | static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr( |
3515 | struct iwl4965_priv *priv, int txq_id, int idx) | |
b481de9c ZY |
3516 | { |
3517 | if (priv->txq[txq_id].txb[idx].skb[0]) | |
3518 | return (struct ieee80211_hdr *)priv->txq[txq_id]. | |
3519 | txb[idx].skb[0]->data; | |
3520 | return NULL; | |
3521 | } | |
3522 | ||
bb8c093b | 3523 | static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp) |
b481de9c ZY |
3524 | { |
3525 | __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status + | |
3526 | tx_resp->frame_count); | |
3527 | return le32_to_cpu(*scd_ssn) & MAX_SN; | |
3528 | ||
3529 | } | |
bb8c093b CH |
3530 | static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv, |
3531 | struct iwl4965_ht_agg *agg, | |
3532 | struct iwl4965_tx_resp *tx_resp, | |
b481de9c ZY |
3533 | u16 start_idx) |
3534 | { | |
3535 | u32 status; | |
3536 | __le32 *frame_status = &tx_resp->status; | |
3537 | struct ieee80211_tx_status *tx_status = NULL; | |
3538 | struct ieee80211_hdr *hdr = NULL; | |
3539 | int i, sh; | |
3540 | int txq_id, idx; | |
3541 | u16 seq; | |
3542 | ||
3543 | if (agg->wait_for_ba) | |
3544 | IWL_DEBUG_TX_REPLY("got tx repsons w/o back\n"); | |
3545 | ||
3546 | agg->frame_count = tx_resp->frame_count; | |
3547 | agg->start_idx = start_idx; | |
3548 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
3549 | agg->bitmap0 = agg->bitmap1 = 0; | |
3550 | ||
3551 | if (agg->frame_count == 1) { | |
bb8c093b | 3552 | struct iwl4965_tx_queue *txq ; |
b481de9c ZY |
3553 | status = le32_to_cpu(frame_status[0]); |
3554 | ||
3555 | txq_id = agg->txq_id; | |
3556 | txq = &priv->txq[txq_id]; | |
3557 | /* FIXME: code repetition */ | |
3558 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n", | |
3559 | agg->frame_count, agg->start_idx); | |
3560 | ||
fc4b6853 | 3561 | tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status); |
b481de9c ZY |
3562 | tx_status->retry_count = tx_resp->failure_frame; |
3563 | tx_status->queue_number = status & 0xff; | |
3564 | tx_status->queue_length = tx_resp->bt_kill_count; | |
3565 | tx_status->queue_length |= tx_resp->failure_rts; | |
3566 | ||
bb8c093b | 3567 | tx_status->flags = iwl4965_is_tx_success(status)? |
b481de9c ZY |
3568 | IEEE80211_TX_STATUS_ACK : 0; |
3569 | tx_status->control.tx_rate = | |
bb8c093b | 3570 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags); |
b481de9c ZY |
3571 | /* FIXME: code repetition end */ |
3572 | ||
3573 | IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n", | |
3574 | status & 0xff, tx_resp->failure_frame); | |
3575 | IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", | |
bb8c093b | 3576 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags)); |
b481de9c ZY |
3577 | |
3578 | agg->wait_for_ba = 0; | |
3579 | } else { | |
3580 | u64 bitmap = 0; | |
3581 | int start = agg->start_idx; | |
3582 | ||
3583 | for (i = 0; i < agg->frame_count; i++) { | |
3584 | u16 sc; | |
3585 | status = le32_to_cpu(frame_status[i]); | |
3586 | seq = status >> 16; | |
3587 | idx = SEQ_TO_INDEX(seq); | |
3588 | txq_id = SEQ_TO_QUEUE(seq); | |
3589 | ||
3590 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
3591 | AGG_TX_STATE_ABORT_MSK)) | |
3592 | continue; | |
3593 | ||
3594 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", | |
3595 | agg->frame_count, txq_id, idx); | |
3596 | ||
bb8c093b | 3597 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx); |
b481de9c ZY |
3598 | |
3599 | sc = le16_to_cpu(hdr->seq_ctrl); | |
3600 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
3601 | IWL_ERROR("BUG_ON idx doesn't match seq control" | |
3602 | " idx=%d, seq_idx=%d, seq=%d\n", | |
3603 | idx, SEQ_TO_SN(sc), | |
3604 | hdr->seq_ctrl); | |
3605 | return -1; | |
3606 | } | |
3607 | ||
3608 | IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", | |
3609 | i, idx, SEQ_TO_SN(sc)); | |
3610 | ||
3611 | sh = idx - start; | |
3612 | if (sh > 64) { | |
3613 | sh = (start - idx) + 0xff; | |
3614 | bitmap = bitmap << sh; | |
3615 | sh = 0; | |
3616 | start = idx; | |
3617 | } else if (sh < -64) | |
3618 | sh = 0xff - (start - idx); | |
3619 | else if (sh < 0) { | |
3620 | sh = start - idx; | |
3621 | start = idx; | |
3622 | bitmap = bitmap << sh; | |
3623 | sh = 0; | |
3624 | } | |
3625 | bitmap |= (1 << sh); | |
3626 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | |
3627 | start, (u32)(bitmap & 0xFFFFFFFF)); | |
3628 | } | |
3629 | ||
3630 | agg->bitmap0 = bitmap & 0xFFFFFFFF; | |
3631 | agg->bitmap1 = bitmap >> 32; | |
3632 | agg->start_idx = start; | |
3633 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
3634 | IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n", | |
3635 | agg->frame_count, agg->start_idx, | |
3636 | agg->bitmap0); | |
3637 | ||
3638 | if (bitmap) | |
3639 | agg->wait_for_ba = 1; | |
3640 | } | |
3641 | return 0; | |
3642 | } | |
3643 | #endif | |
3644 | #endif | |
3645 | ||
bb8c093b CH |
3646 | static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv, |
3647 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3648 | { |
bb8c093b | 3649 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3650 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3651 | int txq_id = SEQ_TO_QUEUE(sequence); | |
3652 | int index = SEQ_TO_INDEX(sequence); | |
bb8c093b | 3653 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
b481de9c | 3654 | struct ieee80211_tx_status *tx_status; |
bb8c093b | 3655 | struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
b481de9c | 3656 | u32 status = le32_to_cpu(tx_resp->status); |
c8b0e6e1 CH |
3657 | #ifdef CONFIG_IWL4965_HT |
3658 | #ifdef CONFIG_IWL4965_HT_AGG | |
b481de9c ZY |
3659 | int tid, sta_id; |
3660 | #endif | |
3661 | #endif | |
3662 | ||
3663 | if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) { | |
3664 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | |
3665 | "is out of range [0-%d] %d %d\n", txq_id, | |
fc4b6853 TW |
3666 | index, txq->q.n_bd, txq->q.write_ptr, |
3667 | txq->q.read_ptr); | |
b481de9c ZY |
3668 | return; |
3669 | } | |
3670 | ||
c8b0e6e1 CH |
3671 | #ifdef CONFIG_IWL4965_HT |
3672 | #ifdef CONFIG_IWL4965_HT_AGG | |
b481de9c | 3673 | if (txq->sched_retry) { |
bb8c093b | 3674 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); |
b481de9c | 3675 | struct ieee80211_hdr *hdr = |
bb8c093b CH |
3676 | iwl4965_tx_queue_get_hdr(priv, txq_id, index); |
3677 | struct iwl4965_ht_agg *agg = NULL; | |
b481de9c ZY |
3678 | __le16 *qc = ieee80211_get_qos_ctrl(hdr); |
3679 | ||
3680 | if (qc == NULL) { | |
3681 | IWL_ERROR("BUG_ON qc is null!!!!\n"); | |
3682 | return; | |
3683 | } | |
3684 | ||
3685 | tid = le16_to_cpu(*qc) & 0xf; | |
3686 | ||
bb8c093b | 3687 | sta_id = iwl4965_get_ra_sta_id(priv, hdr); |
b481de9c ZY |
3688 | if (unlikely(sta_id == IWL_INVALID_STATION)) { |
3689 | IWL_ERROR("Station not known for\n"); | |
3690 | return; | |
3691 | } | |
3692 | ||
3693 | agg = &priv->stations[sta_id].tid[tid].agg; | |
3694 | ||
3695 | iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index); | |
3696 | ||
3697 | if ((tx_resp->frame_count == 1) && | |
bb8c093b | 3698 | !iwl4965_is_tx_success(status)) { |
b481de9c ZY |
3699 | /* TODO: send BAR */ |
3700 | } | |
3701 | ||
fc4b6853 | 3702 | if ((txq->q.read_ptr != (scd_ssn & 0xff))) { |
bb8c093b | 3703 | index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd); |
b481de9c ZY |
3704 | IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn " |
3705 | "%d index %d\n", scd_ssn , index); | |
bb8c093b | 3706 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
b481de9c ZY |
3707 | } |
3708 | } else { | |
c8b0e6e1 CH |
3709 | #endif /* CONFIG_IWL4965_HT_AGG */ |
3710 | #endif /* CONFIG_IWL4965_HT */ | |
fc4b6853 | 3711 | tx_status = &(txq->txb[txq->q.read_ptr].status); |
b481de9c ZY |
3712 | |
3713 | tx_status->retry_count = tx_resp->failure_frame; | |
3714 | tx_status->queue_number = status; | |
3715 | tx_status->queue_length = tx_resp->bt_kill_count; | |
3716 | tx_status->queue_length |= tx_resp->failure_rts; | |
3717 | ||
3718 | tx_status->flags = | |
bb8c093b | 3719 | iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0; |
b481de9c ZY |
3720 | |
3721 | tx_status->control.tx_rate = | |
bb8c093b | 3722 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags); |
b481de9c ZY |
3723 | |
3724 | IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x " | |
bb8c093b | 3725 | "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status), |
b481de9c ZY |
3726 | status, le32_to_cpu(tx_resp->rate_n_flags), |
3727 | tx_resp->failure_frame); | |
3728 | ||
3729 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); | |
3730 | if (index != -1) | |
bb8c093b | 3731 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
c8b0e6e1 CH |
3732 | #ifdef CONFIG_IWL4965_HT |
3733 | #ifdef CONFIG_IWL4965_HT_AGG | |
b481de9c | 3734 | } |
c8b0e6e1 CH |
3735 | #endif /* CONFIG_IWL4965_HT_AGG */ |
3736 | #endif /* CONFIG_IWL4965_HT */ | |
b481de9c ZY |
3737 | |
3738 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | |
3739 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | |
3740 | } | |
3741 | ||
3742 | ||
bb8c093b CH |
3743 | static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv, |
3744 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3745 | { |
bb8c093b CH |
3746 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3747 | struct iwl4965_alive_resp *palive; | |
b481de9c ZY |
3748 | struct delayed_work *pwork; |
3749 | ||
3750 | palive = &pkt->u.alive_frame; | |
3751 | ||
3752 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
3753 | "0x%01X 0x%01X\n", | |
3754 | palive->is_valid, palive->ver_type, | |
3755 | palive->ver_subtype); | |
3756 | ||
3757 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
3758 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
3759 | memcpy(&priv->card_alive_init, | |
3760 | &pkt->u.alive_frame, | |
bb8c093b | 3761 | sizeof(struct iwl4965_init_alive_resp)); |
b481de9c ZY |
3762 | pwork = &priv->init_alive_start; |
3763 | } else { | |
3764 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
3765 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
bb8c093b | 3766 | sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
3767 | pwork = &priv->alive_start; |
3768 | } | |
3769 | ||
3770 | /* We delay the ALIVE response by 5ms to | |
3771 | * give the HW RF Kill time to activate... */ | |
3772 | if (palive->is_valid == UCODE_VALID_OK) | |
3773 | queue_delayed_work(priv->workqueue, pwork, | |
3774 | msecs_to_jiffies(5)); | |
3775 | else | |
3776 | IWL_WARNING("uCode did not respond OK.\n"); | |
3777 | } | |
3778 | ||
bb8c093b CH |
3779 | static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv, |
3780 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3781 | { |
bb8c093b | 3782 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3783 | |
3784 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | |
3785 | return; | |
3786 | } | |
3787 | ||
bb8c093b CH |
3788 | static void iwl4965_rx_reply_error(struct iwl4965_priv *priv, |
3789 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3790 | { |
bb8c093b | 3791 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3792 | |
3793 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
3794 | "seq 0x%04X ser 0x%08X\n", | |
3795 | le32_to_cpu(pkt->u.err_resp.error_type), | |
3796 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
3797 | pkt->u.err_resp.cmd_id, | |
3798 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
3799 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
3800 | } | |
3801 | ||
3802 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
3803 | ||
bb8c093b | 3804 | static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3805 | { |
bb8c093b CH |
3806 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3807 | struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon; | |
3808 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); | |
b481de9c ZY |
3809 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
3810 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
3811 | rxon->channel = csa->channel; | |
3812 | priv->staging_rxon.channel = csa->channel; | |
3813 | } | |
3814 | ||
bb8c093b CH |
3815 | static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv, |
3816 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3817 | { |
c8b0e6e1 | 3818 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
bb8c093b CH |
3819 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3820 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); | |
b481de9c ZY |
3821 | |
3822 | if (!report->state) { | |
3823 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, | |
3824 | "Spectrum Measure Notification: Start\n"); | |
3825 | return; | |
3826 | } | |
3827 | ||
3828 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
3829 | priv->measurement_status |= MEASUREMENT_READY; | |
3830 | #endif | |
3831 | } | |
3832 | ||
bb8c093b CH |
3833 | static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv, |
3834 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3835 | { |
c8b0e6e1 | 3836 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
3837 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3838 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); | |
b481de9c ZY |
3839 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
3840 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
3841 | #endif | |
3842 | } | |
3843 | ||
bb8c093b CH |
3844 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv, |
3845 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3846 | { |
bb8c093b | 3847 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3848 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
3849 | "notification for %s:\n", | |
3850 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bb8c093b | 3851 | iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
3852 | } |
3853 | ||
bb8c093b | 3854 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 3855 | { |
bb8c093b CH |
3856 | struct iwl4965_priv *priv = |
3857 | container_of(work, struct iwl4965_priv, beacon_update); | |
b481de9c ZY |
3858 | struct sk_buff *beacon; |
3859 | ||
3860 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
3861 | beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL); | |
3862 | ||
3863 | if (!beacon) { | |
3864 | IWL_ERROR("update beacon failed\n"); | |
3865 | return; | |
3866 | } | |
3867 | ||
3868 | mutex_lock(&priv->mutex); | |
3869 | /* new beacon skb is allocated every time; dispose previous.*/ | |
3870 | if (priv->ibss_beacon) | |
3871 | dev_kfree_skb(priv->ibss_beacon); | |
3872 | ||
3873 | priv->ibss_beacon = beacon; | |
3874 | mutex_unlock(&priv->mutex); | |
3875 | ||
bb8c093b | 3876 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
3877 | } |
3878 | ||
bb8c093b CH |
3879 | static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv, |
3880 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3881 | { |
c8b0e6e1 | 3882 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
3883 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3884 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); | |
3885 | u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | |
b481de9c ZY |
3886 | |
3887 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
3888 | "tsf %d %d rate %d\n", | |
3889 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | |
3890 | beacon->beacon_notify_hdr.failure_frame, | |
3891 | le32_to_cpu(beacon->ibss_mgr_status), | |
3892 | le32_to_cpu(beacon->high_tsf), | |
3893 | le32_to_cpu(beacon->low_tsf), rate); | |
3894 | #endif | |
3895 | ||
3896 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
3897 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
3898 | queue_work(priv->workqueue, &priv->beacon_update); | |
3899 | } | |
3900 | ||
3901 | /* Service response to REPLY_SCAN_CMD (0x80) */ | |
bb8c093b CH |
3902 | static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv, |
3903 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3904 | { |
c8b0e6e1 | 3905 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
3906 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3907 | struct iwl4965_scanreq_notification *notif = | |
3908 | (struct iwl4965_scanreq_notification *)pkt->u.raw; | |
b481de9c ZY |
3909 | |
3910 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); | |
3911 | #endif | |
3912 | } | |
3913 | ||
3914 | /* Service SCAN_START_NOTIFICATION (0x82) */ | |
bb8c093b CH |
3915 | static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv, |
3916 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3917 | { |
bb8c093b CH |
3918 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3919 | struct iwl4965_scanstart_notification *notif = | |
3920 | (struct iwl4965_scanstart_notification *)pkt->u.raw; | |
b481de9c ZY |
3921 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
3922 | IWL_DEBUG_SCAN("Scan start: " | |
3923 | "%d [802.11%s] " | |
3924 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", | |
3925 | notif->channel, | |
3926 | notif->band ? "bg" : "a", | |
3927 | notif->tsf_high, | |
3928 | notif->tsf_low, notif->status, notif->beacon_timer); | |
3929 | } | |
3930 | ||
3931 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ | |
bb8c093b CH |
3932 | static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv, |
3933 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3934 | { |
bb8c093b CH |
3935 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3936 | struct iwl4965_scanresults_notification *notif = | |
3937 | (struct iwl4965_scanresults_notification *)pkt->u.raw; | |
b481de9c ZY |
3938 | |
3939 | IWL_DEBUG_SCAN("Scan ch.res: " | |
3940 | "%d [802.11%s] " | |
3941 | "(TSF: 0x%08X:%08X) - %d " | |
3942 | "elapsed=%lu usec (%dms since last)\n", | |
3943 | notif->channel, | |
3944 | notif->band ? "bg" : "a", | |
3945 | le32_to_cpu(notif->tsf_high), | |
3946 | le32_to_cpu(notif->tsf_low), | |
3947 | le32_to_cpu(notif->statistics[0]), | |
3948 | le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf, | |
3949 | jiffies_to_msecs(elapsed_jiffies | |
3950 | (priv->last_scan_jiffies, jiffies))); | |
3951 | ||
3952 | priv->last_scan_jiffies = jiffies; | |
3953 | } | |
3954 | ||
3955 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ | |
bb8c093b CH |
3956 | static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv, |
3957 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 3958 | { |
bb8c093b CH |
3959 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3960 | struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | |
b481de9c ZY |
3961 | |
3962 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | |
3963 | scan_notif->scanned_channels, | |
3964 | scan_notif->tsf_low, | |
3965 | scan_notif->tsf_high, scan_notif->status); | |
3966 | ||
3967 | /* The HW is no longer scanning */ | |
3968 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
3969 | ||
3970 | /* The scan completion notification came in, so kill that timer... */ | |
3971 | cancel_delayed_work(&priv->scan_check); | |
3972 | ||
3973 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | |
3974 | (priv->scan_bands == 2) ? "2.4" : "5.2", | |
3975 | jiffies_to_msecs(elapsed_jiffies | |
3976 | (priv->scan_pass_start, jiffies))); | |
3977 | ||
3978 | /* Remove this scanned band from the list | |
3979 | * of pending bands to scan */ | |
3980 | priv->scan_bands--; | |
3981 | ||
3982 | /* If a request to abort was given, or the scan did not succeed | |
3983 | * then we reset the scan state machine and terminate, | |
3984 | * re-queuing another scan if one has been requested */ | |
3985 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
3986 | IWL_DEBUG_INFO("Aborted scan completed.\n"); | |
3987 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
3988 | } else { | |
3989 | /* If there are more bands on this scan pass reschedule */ | |
3990 | if (priv->scan_bands > 0) | |
3991 | goto reschedule; | |
3992 | } | |
3993 | ||
3994 | priv->last_scan_jiffies = jiffies; | |
3995 | IWL_DEBUG_INFO("Setting scan to off\n"); | |
3996 | ||
3997 | clear_bit(STATUS_SCANNING, &priv->status); | |
3998 | ||
3999 | IWL_DEBUG_INFO("Scan took %dms\n", | |
4000 | jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies))); | |
4001 | ||
4002 | queue_work(priv->workqueue, &priv->scan_completed); | |
4003 | ||
4004 | return; | |
4005 | ||
4006 | reschedule: | |
4007 | priv->scan_pass_start = jiffies; | |
4008 | queue_work(priv->workqueue, &priv->request_scan); | |
4009 | } | |
4010 | ||
4011 | /* Handle notification from uCode that card's power state is changing | |
4012 | * due to software, hardware, or critical temperature RFKILL */ | |
bb8c093b CH |
4013 | static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv, |
4014 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 4015 | { |
bb8c093b | 4016 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
4017 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
4018 | unsigned long status = priv->status; | |
4019 | ||
4020 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
4021 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
4022 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
4023 | ||
4024 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
4025 | RF_CARD_DISABLED)) { | |
4026 | ||
bb8c093b | 4027 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
4028 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
4029 | ||
bb8c093b CH |
4030 | if (!iwl4965_grab_nic_access(priv)) { |
4031 | iwl4965_write_direct32( | |
b481de9c ZY |
4032 | priv, HBUS_TARG_MBX_C, |
4033 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
4034 | ||
bb8c093b | 4035 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4036 | } |
4037 | ||
4038 | if (!(flags & RXON_CARD_DISABLED)) { | |
bb8c093b | 4039 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 4040 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
bb8c093b CH |
4041 | if (!iwl4965_grab_nic_access(priv)) { |
4042 | iwl4965_write_direct32( | |
b481de9c ZY |
4043 | priv, HBUS_TARG_MBX_C, |
4044 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
4045 | ||
bb8c093b | 4046 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4047 | } |
4048 | } | |
4049 | ||
4050 | if (flags & RF_CARD_DISABLED) { | |
bb8c093b | 4051 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 4052 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
bb8c093b CH |
4053 | iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
4054 | if (!iwl4965_grab_nic_access(priv)) | |
4055 | iwl4965_release_nic_access(priv); | |
b481de9c ZY |
4056 | } |
4057 | } | |
4058 | ||
4059 | if (flags & HW_CARD_DISABLED) | |
4060 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
4061 | else | |
4062 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
4063 | ||
4064 | ||
4065 | if (flags & SW_CARD_DISABLED) | |
4066 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
4067 | else | |
4068 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
4069 | ||
4070 | if (!(flags & RXON_CARD_DISABLED)) | |
bb8c093b | 4071 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
4072 | |
4073 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
4074 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
4075 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
4076 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
4077 | queue_work(priv->workqueue, &priv->rf_kill); | |
4078 | else | |
4079 | wake_up_interruptible(&priv->wait_command_queue); | |
4080 | } | |
4081 | ||
4082 | /** | |
bb8c093b | 4083 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
4084 | * |
4085 | * Setup the RX handlers for each of the reply types sent from the uCode | |
4086 | * to the host. | |
4087 | * | |
4088 | * This function chains into the hardware specific files for them to setup | |
4089 | * any hardware specific handlers as well. | |
4090 | */ | |
bb8c093b | 4091 | static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv) |
b481de9c | 4092 | { |
bb8c093b CH |
4093 | priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive; |
4094 | priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta; | |
4095 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; | |
4096 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 4097 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
4098 | iwl4965_rx_spectrum_measure_notif; |
4099 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 4100 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
4101 | iwl4965_rx_pm_debug_statistics_notif; |
4102 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 4103 | |
bb8c093b | 4104 | /* NOTE: iwl4965_rx_statistics is different based on whether |
b481de9c ZY |
4105 | * the build is for the 3945 or the 4965. See the |
4106 | * corresponding implementation in iwl-XXXX.c | |
4107 | * | |
4108 | * The same handler is used for both the REPLY to a | |
4109 | * discrete statistics request from the host as well as | |
4110 | * for the periodic statistics notification from the uCode | |
4111 | */ | |
bb8c093b CH |
4112 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
4113 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
b481de9c | 4114 | |
bb8c093b CH |
4115 | priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan; |
4116 | priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif; | |
b481de9c | 4117 | priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] = |
bb8c093b | 4118 | iwl4965_rx_scan_results_notif; |
b481de9c | 4119 | priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] = |
bb8c093b CH |
4120 | iwl4965_rx_scan_complete_notif; |
4121 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; | |
4122 | priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx; | |
b481de9c ZY |
4123 | |
4124 | /* Setup hardware specific Rx handlers */ | |
bb8c093b | 4125 | iwl4965_hw_rx_handler_setup(priv); |
b481de9c ZY |
4126 | } |
4127 | ||
4128 | /** | |
bb8c093b | 4129 | * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them |
b481de9c ZY |
4130 | * @rxb: Rx buffer to reclaim |
4131 | * | |
4132 | * If an Rx buffer has an async callback associated with it the callback | |
4133 | * will be executed. The attached skb (if present) will only be freed | |
4134 | * if the callback returns 1 | |
4135 | */ | |
bb8c093b CH |
4136 | static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv, |
4137 | struct iwl4965_rx_mem_buffer *rxb) | |
b481de9c | 4138 | { |
bb8c093b | 4139 | struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
b481de9c ZY |
4140 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
4141 | int txq_id = SEQ_TO_QUEUE(sequence); | |
4142 | int index = SEQ_TO_INDEX(sequence); | |
4143 | int huge = sequence & SEQ_HUGE_FRAME; | |
4144 | int cmd_index; | |
bb8c093b | 4145 | struct iwl4965_cmd *cmd; |
b481de9c ZY |
4146 | |
4147 | /* If a Tx command is being handled and it isn't in the actual | |
4148 | * command queue then there a command routing bug has been introduced | |
4149 | * in the queue management code. */ | |
4150 | if (txq_id != IWL_CMD_QUEUE_NUM) | |
4151 | IWL_ERROR("Error wrong command queue %d command id 0x%X\n", | |
4152 | txq_id, pkt->hdr.cmd); | |
4153 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | |
4154 | ||
4155 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | |
4156 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | |
4157 | ||
4158 | /* Input error checking is done when commands are added to queue. */ | |
4159 | if (cmd->meta.flags & CMD_WANT_SKB) { | |
4160 | cmd->meta.source->u.skb = rxb->skb; | |
4161 | rxb->skb = NULL; | |
4162 | } else if (cmd->meta.u.callback && | |
4163 | !cmd->meta.u.callback(priv, cmd, rxb->skb)) | |
4164 | rxb->skb = NULL; | |
4165 | ||
bb8c093b | 4166 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
b481de9c ZY |
4167 | |
4168 | if (!(cmd->meta.flags & CMD_ASYNC)) { | |
4169 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
4170 | wake_up_interruptible(&priv->wait_command_queue); | |
4171 | } | |
4172 | } | |
4173 | ||
4174 | /************************** RX-FUNCTIONS ****************************/ | |
4175 | /* | |
4176 | * Rx theory of operation | |
4177 | * | |
4178 | * The host allocates 32 DMA target addresses and passes the host address | |
4179 | * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is | |
4180 | * 0 to 31 | |
4181 | * | |
4182 | * Rx Queue Indexes | |
4183 | * The host/firmware share two index registers for managing the Rx buffers. | |
4184 | * | |
4185 | * The READ index maps to the first position that the firmware may be writing | |
4186 | * to -- the driver can read up to (but not including) this position and get | |
4187 | * good data. | |
4188 | * The READ index is managed by the firmware once the card is enabled. | |
4189 | * | |
4190 | * The WRITE index maps to the last position the driver has read from -- the | |
4191 | * position preceding WRITE is the last slot the firmware can place a packet. | |
4192 | * | |
4193 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | |
4194 | * WRITE = READ. | |
4195 | * | |
4196 | * During initialization the host sets up the READ queue position to the first | |
4197 | * INDEX position, and WRITE to the last (READ - 1 wrapped) | |
4198 | * | |
4199 | * When the firmware places a packet in a buffer it will advance the READ index | |
4200 | * and fire the RX interrupt. The driver can then query the READ index and | |
4201 | * process as many packets as possible, moving the WRITE index forward as it | |
4202 | * resets the Rx queue buffers with new memory. | |
4203 | * | |
4204 | * The management in the driver is as follows: | |
4205 | * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When | |
4206 | * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | |
01ebd063 | 4207 | * to replenish the iwl->rxq->rx_free. |
bb8c093b | 4208 | * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the |
b481de9c ZY |
4209 | * iwl->rxq is replenished and the READ INDEX is updated (updating the |
4210 | * 'processed' and 'read' driver indexes as well) | |
4211 | * + A received packet is processed and handed to the kernel network stack, | |
4212 | * detached from the iwl->rxq. The driver 'processed' index is updated. | |
4213 | * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free | |
4214 | * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ | |
4215 | * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there | |
4216 | * were enough free buffers and RX_STALLED is set it is cleared. | |
4217 | * | |
4218 | * | |
4219 | * Driver sequence: | |
4220 | * | |
bb8c093b CH |
4221 | * iwl4965_rx_queue_alloc() Allocates rx_free |
4222 | * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls | |
4223 | * iwl4965_rx_queue_restock | |
4224 | * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx | |
b481de9c ZY |
4225 | * queue, updates firmware pointers, and updates |
4226 | * the WRITE index. If insufficient rx_free buffers | |
bb8c093b | 4227 | * are available, schedules iwl4965_rx_replenish |
b481de9c ZY |
4228 | * |
4229 | * -- enable interrupts -- | |
bb8c093b | 4230 | * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the |
b481de9c ZY |
4231 | * READ INDEX, detaching the SKB from the pool. |
4232 | * Moves the packet buffer from queue to rx_used. | |
bb8c093b | 4233 | * Calls iwl4965_rx_queue_restock to refill any empty |
b481de9c ZY |
4234 | * slots. |
4235 | * ... | |
4236 | * | |
4237 | */ | |
4238 | ||
4239 | /** | |
bb8c093b | 4240 | * iwl4965_rx_queue_space - Return number of free slots available in queue. |
b481de9c | 4241 | */ |
bb8c093b | 4242 | static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q) |
b481de9c ZY |
4243 | { |
4244 | int s = q->read - q->write; | |
4245 | if (s <= 0) | |
4246 | s += RX_QUEUE_SIZE; | |
4247 | /* keep some buffer to not confuse full and empty queue */ | |
4248 | s -= 2; | |
4249 | if (s < 0) | |
4250 | s = 0; | |
4251 | return s; | |
4252 | } | |
4253 | ||
4254 | /** | |
bb8c093b | 4255 | * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue |
b481de9c ZY |
4256 | * |
4257 | * NOTE: This function has 3945 and 4965 specific code sections | |
4258 | * but is declared in base due to the majority of the | |
4259 | * implementation being the same (only a numeric constant is | |
4260 | * different) | |
4261 | * | |
4262 | */ | |
bb8c093b | 4263 | int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q) |
b481de9c ZY |
4264 | { |
4265 | u32 reg = 0; | |
4266 | int rc = 0; | |
4267 | unsigned long flags; | |
4268 | ||
4269 | spin_lock_irqsave(&q->lock, flags); | |
4270 | ||
4271 | if (q->need_update == 0) | |
4272 | goto exit_unlock; | |
4273 | ||
4274 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | |
bb8c093b | 4275 | reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
4276 | |
4277 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
bb8c093b | 4278 | iwl4965_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
4279 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
4280 | goto exit_unlock; | |
4281 | } | |
4282 | ||
bb8c093b | 4283 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4284 | if (rc) |
4285 | goto exit_unlock; | |
4286 | ||
bb8c093b | 4287 | iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR, |
b481de9c | 4288 | q->write & ~0x7); |
bb8c093b | 4289 | iwl4965_release_nic_access(priv); |
b481de9c | 4290 | } else |
bb8c093b | 4291 | iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7); |
b481de9c ZY |
4292 | |
4293 | ||
4294 | q->need_update = 0; | |
4295 | ||
4296 | exit_unlock: | |
4297 | spin_unlock_irqrestore(&q->lock, flags); | |
4298 | return rc; | |
4299 | } | |
4300 | ||
4301 | /** | |
bb8c093b | 4302 | * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer. |
b481de9c ZY |
4303 | * |
4304 | * NOTE: This function has 3945 and 4965 specific code paths in it. | |
4305 | */ | |
bb8c093b | 4306 | static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv, |
b481de9c ZY |
4307 | dma_addr_t dma_addr) |
4308 | { | |
4309 | return cpu_to_le32((u32)(dma_addr >> 8)); | |
4310 | } | |
4311 | ||
4312 | ||
4313 | /** | |
bb8c093b | 4314 | * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool |
b481de9c ZY |
4315 | * |
4316 | * If there are slots in the RX queue that need to be restocked, | |
4317 | * and we have free pre-allocated buffers, fill the ranks as much | |
4318 | * as we can pulling from rx_free. | |
4319 | * | |
4320 | * This moves the 'write' index forward to catch up with 'processed', and | |
4321 | * also updates the memory address in the firmware to reference the new | |
4322 | * target buffer. | |
4323 | */ | |
bb8c093b | 4324 | static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv) |
b481de9c | 4325 | { |
bb8c093b | 4326 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c | 4327 | struct list_head *element; |
bb8c093b | 4328 | struct iwl4965_rx_mem_buffer *rxb; |
b481de9c ZY |
4329 | unsigned long flags; |
4330 | int write, rc; | |
4331 | ||
4332 | spin_lock_irqsave(&rxq->lock, flags); | |
4333 | write = rxq->write & ~0x7; | |
bb8c093b | 4334 | while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) { |
b481de9c | 4335 | element = rxq->rx_free.next; |
bb8c093b | 4336 | rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list); |
b481de9c | 4337 | list_del(element); |
bb8c093b | 4338 | rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr); |
b481de9c ZY |
4339 | rxq->queue[rxq->write] = rxb; |
4340 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | |
4341 | rxq->free_count--; | |
4342 | } | |
4343 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4344 | /* If the pre-allocated buffer pool is dropping low, schedule to | |
4345 | * refill it */ | |
4346 | if (rxq->free_count <= RX_LOW_WATERMARK) | |
4347 | queue_work(priv->workqueue, &priv->rx_replenish); | |
4348 | ||
4349 | ||
4350 | /* If we've added more space for the firmware to place data, tell it */ | |
4351 | if ((write != (rxq->write & ~0x7)) | |
4352 | || (abs(rxq->write - rxq->read) > 7)) { | |
4353 | spin_lock_irqsave(&rxq->lock, flags); | |
4354 | rxq->need_update = 1; | |
4355 | spin_unlock_irqrestore(&rxq->lock, flags); | |
bb8c093b | 4356 | rc = iwl4965_rx_queue_update_write_ptr(priv, rxq); |
b481de9c ZY |
4357 | if (rc) |
4358 | return rc; | |
4359 | } | |
4360 | ||
4361 | return 0; | |
4362 | } | |
4363 | ||
4364 | /** | |
bb8c093b | 4365 | * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free |
b481de9c ZY |
4366 | * |
4367 | * When moving to rx_free an SKB is allocated for the slot. | |
4368 | * | |
bb8c093b | 4369 | * Also restock the Rx queue via iwl4965_rx_queue_restock. |
01ebd063 | 4370 | * This is called as a scheduled work item (except for during initialization) |
b481de9c | 4371 | */ |
bb8c093b | 4372 | void iwl4965_rx_replenish(void *data) |
b481de9c | 4373 | { |
bb8c093b CH |
4374 | struct iwl4965_priv *priv = data; |
4375 | struct iwl4965_rx_queue *rxq = &priv->rxq; | |
b481de9c | 4376 | struct list_head *element; |
bb8c093b | 4377 | struct iwl4965_rx_mem_buffer *rxb; |
b481de9c ZY |
4378 | unsigned long flags; |
4379 | spin_lock_irqsave(&rxq->lock, flags); | |
4380 | while (!list_empty(&rxq->rx_used)) { | |
4381 | element = rxq->rx_used.next; | |
bb8c093b | 4382 | rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list); |
b481de9c ZY |
4383 | rxb->skb = |
4384 | alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC); | |
4385 | if (!rxb->skb) { | |
4386 | if (net_ratelimit()) | |
4387 | printk(KERN_CRIT DRV_NAME | |
4388 | ": Can not allocate SKB buffers\n"); | |
4389 | /* We don't reschedule replenish work here -- we will | |
4390 | * call the restock method and if it still needs | |
4391 | * more buffers it will schedule replenish */ | |
4392 | break; | |
4393 | } | |
4394 | priv->alloc_rxb_skb++; | |
4395 | list_del(element); | |
4396 | rxb->dma_addr = | |
4397 | pci_map_single(priv->pci_dev, rxb->skb->data, | |
4398 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
4399 | list_add_tail(&rxb->list, &rxq->rx_free); | |
4400 | rxq->free_count++; | |
4401 | } | |
4402 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4403 | ||
4404 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 4405 | iwl4965_rx_queue_restock(priv); |
b481de9c ZY |
4406 | spin_unlock_irqrestore(&priv->lock, flags); |
4407 | } | |
4408 | ||
4409 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | |
4410 | * If an SKB has been detached, the POOL needs to have it's SKB set to NULL | |
4411 | * This free routine walks the list of POOL entries and if SKB is set to | |
4412 | * non NULL it is unmapped and freed | |
4413 | */ | |
bb8c093b | 4414 | static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq) |
b481de9c ZY |
4415 | { |
4416 | int i; | |
4417 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | |
4418 | if (rxq->pool[i].skb != NULL) { | |
4419 | pci_unmap_single(priv->pci_dev, | |
4420 | rxq->pool[i].dma_addr, | |
4421 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
4422 | dev_kfree_skb(rxq->pool[i].skb); | |
4423 | } | |
4424 | } | |
4425 | ||
4426 | pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, | |
4427 | rxq->dma_addr); | |
4428 | rxq->bd = NULL; | |
4429 | } | |
4430 | ||
bb8c093b | 4431 | int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv) |
b481de9c | 4432 | { |
bb8c093b | 4433 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
4434 | struct pci_dev *dev = priv->pci_dev; |
4435 | int i; | |
4436 | ||
4437 | spin_lock_init(&rxq->lock); | |
4438 | INIT_LIST_HEAD(&rxq->rx_free); | |
4439 | INIT_LIST_HEAD(&rxq->rx_used); | |
4440 | rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr); | |
4441 | if (!rxq->bd) | |
4442 | return -ENOMEM; | |
4443 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
4444 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) | |
4445 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
4446 | /* Set us so that we have processed and used all buffers, but have | |
4447 | * not restocked the Rx queue with fresh buffers */ | |
4448 | rxq->read = rxq->write = 0; | |
4449 | rxq->free_count = 0; | |
4450 | rxq->need_update = 0; | |
4451 | return 0; | |
4452 | } | |
4453 | ||
bb8c093b | 4454 | void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq) |
b481de9c ZY |
4455 | { |
4456 | unsigned long flags; | |
4457 | int i; | |
4458 | spin_lock_irqsave(&rxq->lock, flags); | |
4459 | INIT_LIST_HEAD(&rxq->rx_free); | |
4460 | INIT_LIST_HEAD(&rxq->rx_used); | |
4461 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
4462 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
4463 | /* In the reset function, these buffers may have been allocated | |
4464 | * to an SKB, so we need to unmap and free potential storage */ | |
4465 | if (rxq->pool[i].skb != NULL) { | |
4466 | pci_unmap_single(priv->pci_dev, | |
4467 | rxq->pool[i].dma_addr, | |
4468 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
4469 | priv->alloc_rxb_skb--; | |
4470 | dev_kfree_skb(rxq->pool[i].skb); | |
4471 | rxq->pool[i].skb = NULL; | |
4472 | } | |
4473 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
4474 | } | |
4475 | ||
4476 | /* Set us so that we have processed and used all buffers, but have | |
4477 | * not restocked the Rx queue with fresh buffers */ | |
4478 | rxq->read = rxq->write = 0; | |
4479 | rxq->free_count = 0; | |
4480 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4481 | } | |
4482 | ||
4483 | /* Convert linear signal-to-noise ratio into dB */ | |
4484 | static u8 ratio2dB[100] = { | |
4485 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
4486 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
4487 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
4488 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
4489 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
4490 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
4491 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
4492 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
4493 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
4494 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
4495 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
4496 | }; | |
4497 | ||
4498 | /* Calculates a relative dB value from a ratio of linear | |
4499 | * (i.e. not dB) signal levels. | |
4500 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
bb8c093b | 4501 | int iwl4965_calc_db_from_ratio(int sig_ratio) |
b481de9c | 4502 | { |
c899a575 AB |
4503 | /* 1000:1 or higher just report as 60 dB */ |
4504 | if (sig_ratio >= 1000) | |
b481de9c ZY |
4505 | return 60; |
4506 | ||
c899a575 | 4507 | /* 100:1 or higher, divide by 10 and use table, |
b481de9c | 4508 | * add 20 dB to make up for divide by 10 */ |
c899a575 | 4509 | if (sig_ratio >= 100) |
b481de9c ZY |
4510 | return (20 + (int)ratio2dB[sig_ratio/10]); |
4511 | ||
4512 | /* We shouldn't see this */ | |
4513 | if (sig_ratio < 1) | |
4514 | return 0; | |
4515 | ||
4516 | /* Use table for ratios 1:1 - 99:1 */ | |
4517 | return (int)ratio2dB[sig_ratio]; | |
4518 | } | |
4519 | ||
4520 | #define PERFECT_RSSI (-20) /* dBm */ | |
4521 | #define WORST_RSSI (-95) /* dBm */ | |
4522 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
4523 | ||
4524 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
4525 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
4526 | * about formulas used below. */ | |
bb8c093b | 4527 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) |
b481de9c ZY |
4528 | { |
4529 | int sig_qual; | |
4530 | int degradation = PERFECT_RSSI - rssi_dbm; | |
4531 | ||
4532 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
4533 | * as indicator; formula is (signal dbm - noise dbm). | |
4534 | * SNR at or above 40 is a great signal (100%). | |
4535 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
4536 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
4537 | if (noise_dbm) { | |
4538 | if (rssi_dbm - noise_dbm >= 40) | |
4539 | return 100; | |
4540 | else if (rssi_dbm < noise_dbm) | |
4541 | return 0; | |
4542 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
4543 | ||
4544 | /* Else use just the signal level. | |
4545 | * This formula is a least squares fit of data points collected and | |
4546 | * compared with a reference system that had a percentage (%) display | |
4547 | * for signal quality. */ | |
4548 | } else | |
4549 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
4550 | (15 * RSSI_RANGE + 62 * degradation)) / | |
4551 | (RSSI_RANGE * RSSI_RANGE); | |
4552 | ||
4553 | if (sig_qual > 100) | |
4554 | sig_qual = 100; | |
4555 | else if (sig_qual < 1) | |
4556 | sig_qual = 0; | |
4557 | ||
4558 | return sig_qual; | |
4559 | } | |
4560 | ||
4561 | /** | |
bb8c093b | 4562 | * iwl4965_rx_handle - Main entry function for receiving responses from the uCode |
b481de9c ZY |
4563 | * |
4564 | * Uses the priv->rx_handlers callback function array to invoke | |
4565 | * the appropriate handlers, including command responses, | |
4566 | * frame-received notifications, and other notifications. | |
4567 | */ | |
bb8c093b | 4568 | static void iwl4965_rx_handle(struct iwl4965_priv *priv) |
b481de9c | 4569 | { |
bb8c093b CH |
4570 | struct iwl4965_rx_mem_buffer *rxb; |
4571 | struct iwl4965_rx_packet *pkt; | |
4572 | struct iwl4965_rx_queue *rxq = &priv->rxq; | |
b481de9c ZY |
4573 | u32 r, i; |
4574 | int reclaim; | |
4575 | unsigned long flags; | |
4576 | ||
bb8c093b | 4577 | r = iwl4965_hw_get_rx_read(priv); |
b481de9c ZY |
4578 | i = rxq->read; |
4579 | ||
4580 | /* Rx interrupt, but nothing sent from uCode */ | |
4581 | if (i == r) | |
4582 | IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i); | |
4583 | ||
4584 | while (i != r) { | |
4585 | rxb = rxq->queue[i]; | |
4586 | ||
4587 | /* If an RXB doesn't have a queue slot associated with it | |
4588 | * then a bug has been introduced in the queue refilling | |
4589 | * routines -- catch it here */ | |
4590 | BUG_ON(rxb == NULL); | |
4591 | ||
4592 | rxq->queue[i] = NULL; | |
4593 | ||
4594 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
4595 | IWL_RX_BUF_SIZE, | |
4596 | PCI_DMA_FROMDEVICE); | |
bb8c093b | 4597 | pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
b481de9c ZY |
4598 | |
4599 | /* Reclaim a command buffer only if this packet is a response | |
4600 | * to a (driver-originated) command. | |
4601 | * If the packet (e.g. Rx frame) originated from uCode, | |
4602 | * there is no command buffer to reclaim. | |
4603 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
4604 | * but apparently a few don't get set; catch them here. */ | |
4605 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
4606 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
4607 | (pkt->hdr.cmd != REPLY_4965_RX) && | |
cfe01709 | 4608 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
4609 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
4610 | (pkt->hdr.cmd != REPLY_TX); | |
4611 | ||
4612 | /* Based on type of command response or notification, | |
4613 | * handle those that need handling via function in | |
bb8c093b | 4614 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c ZY |
4615 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
4616 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
4617 | "r = %d, i = %d, %s, 0x%02x\n", r, i, | |
4618 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
4619 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | |
4620 | } else { | |
4621 | /* No handling needed */ | |
4622 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
4623 | "r %d i %d No handler needed for %s, 0x%02x\n", | |
4624 | r, i, get_cmd_string(pkt->hdr.cmd), | |
4625 | pkt->hdr.cmd); | |
4626 | } | |
4627 | ||
4628 | if (reclaim) { | |
4629 | /* Invoke any callbacks, transfer the skb to caller, | |
bb8c093b | 4630 | * and fire off the (possibly) blocking iwl4965_send_cmd() |
b481de9c ZY |
4631 | * as we reclaim the driver command queue */ |
4632 | if (rxb && rxb->skb) | |
bb8c093b | 4633 | iwl4965_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
4634 | else |
4635 | IWL_WARNING("Claim null rxb?\n"); | |
4636 | } | |
4637 | ||
4638 | /* For now we just don't re-use anything. We can tweak this | |
4639 | * later to try and re-use notification packets and SKBs that | |
4640 | * fail to Rx correctly */ | |
4641 | if (rxb->skb != NULL) { | |
4642 | priv->alloc_rxb_skb--; | |
4643 | dev_kfree_skb_any(rxb->skb); | |
4644 | rxb->skb = NULL; | |
4645 | } | |
4646 | ||
4647 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
4648 | IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
4649 | spin_lock_irqsave(&rxq->lock, flags); | |
4650 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
4651 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4652 | i = (i + 1) & RX_QUEUE_MASK; | |
4653 | } | |
4654 | ||
4655 | /* Backtrack one entry */ | |
4656 | priv->rxq.read = i; | |
bb8c093b | 4657 | iwl4965_rx_queue_restock(priv); |
b481de9c ZY |
4658 | } |
4659 | ||
bb8c093b CH |
4660 | static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv, |
4661 | struct iwl4965_tx_queue *txq) | |
b481de9c ZY |
4662 | { |
4663 | u32 reg = 0; | |
4664 | int rc = 0; | |
4665 | int txq_id = txq->q.id; | |
4666 | ||
4667 | if (txq->need_update == 0) | |
4668 | return rc; | |
4669 | ||
4670 | /* if we're trying to save power */ | |
4671 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | |
4672 | /* wake up nic if it's powered down ... | |
4673 | * uCode will wake up, and interrupt us again, so next | |
4674 | * time we'll skip this part. */ | |
bb8c093b | 4675 | reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
4676 | |
4677 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
4678 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | |
bb8c093b | 4679 | iwl4965_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
4680 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
4681 | return rc; | |
4682 | } | |
4683 | ||
4684 | /* restore this queue's parameters in nic hardware. */ | |
bb8c093b | 4685 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4686 | if (rc) |
4687 | return rc; | |
bb8c093b | 4688 | iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 4689 | txq->q.write_ptr | (txq_id << 8)); |
bb8c093b | 4690 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4691 | |
4692 | /* else not in power-save mode, uCode will never sleep when we're | |
4693 | * trying to tx (during RFKILL, we're not trying to tx). */ | |
4694 | } else | |
bb8c093b | 4695 | iwl4965_write32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 4696 | txq->q.write_ptr | (txq_id << 8)); |
b481de9c ZY |
4697 | |
4698 | txq->need_update = 0; | |
4699 | ||
4700 | return rc; | |
4701 | } | |
4702 | ||
c8b0e6e1 | 4703 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 4704 | static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c | 4705 | { |
0795af57 JP |
4706 | DECLARE_MAC_BUF(mac); |
4707 | ||
b481de9c | 4708 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bb8c093b | 4709 | iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
4710 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
4711 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
4712 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
4713 | le32_to_cpu(rxon->filter_flags)); | |
4714 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
4715 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
4716 | rxon->ofdm_basic_rates); | |
4717 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
4718 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
4719 | print_mac(mac, rxon->node_addr)); | |
4720 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
4721 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
4722 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
4723 | } | |
4724 | #endif | |
4725 | ||
bb8c093b | 4726 | static void iwl4965_enable_interrupts(struct iwl4965_priv *priv) |
b481de9c ZY |
4727 | { |
4728 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
4729 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
bb8c093b | 4730 | iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
4731 | } |
4732 | ||
bb8c093b | 4733 | static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv) |
b481de9c ZY |
4734 | { |
4735 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
4736 | ||
4737 | /* disable interrupts from uCode/NIC to host */ | |
bb8c093b | 4738 | iwl4965_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
4739 | |
4740 | /* acknowledge/clear/reset any interrupts still pending | |
4741 | * from uCode or flow handler (Rx/Tx DMA) */ | |
bb8c093b CH |
4742 | iwl4965_write32(priv, CSR_INT, 0xffffffff); |
4743 | iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
4744 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
4745 | } | |
4746 | ||
4747 | static const char *desc_lookup(int i) | |
4748 | { | |
4749 | switch (i) { | |
4750 | case 1: | |
4751 | return "FAIL"; | |
4752 | case 2: | |
4753 | return "BAD_PARAM"; | |
4754 | case 3: | |
4755 | return "BAD_CHECKSUM"; | |
4756 | case 4: | |
4757 | return "NMI_INTERRUPT"; | |
4758 | case 5: | |
4759 | return "SYSASSERT"; | |
4760 | case 6: | |
4761 | return "FATAL_ERROR"; | |
4762 | } | |
4763 | ||
4764 | return "UNKNOWN"; | |
4765 | } | |
4766 | ||
4767 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
4768 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
4769 | ||
bb8c093b | 4770 | static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv) |
b481de9c ZY |
4771 | { |
4772 | u32 data2, line; | |
4773 | u32 desc, time, count, base, data1; | |
4774 | u32 blink1, blink2, ilink1, ilink2; | |
4775 | int rc; | |
4776 | ||
4777 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | |
4778 | ||
bb8c093b | 4779 | if (!iwl4965_hw_valid_rtc_data_addr(base)) { |
b481de9c ZY |
4780 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); |
4781 | return; | |
4782 | } | |
4783 | ||
bb8c093b | 4784 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4785 | if (rc) { |
4786 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
4787 | return; | |
4788 | } | |
4789 | ||
bb8c093b | 4790 | count = iwl4965_read_targ_mem(priv, base); |
b481de9c ZY |
4791 | |
4792 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | |
4793 | IWL_ERROR("Start IWL Error Log Dump:\n"); | |
4794 | IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n", | |
4795 | priv->status, priv->config, count); | |
4796 | } | |
4797 | ||
bb8c093b CH |
4798 | desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32)); |
4799 | blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32)); | |
4800 | blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32)); | |
4801 | ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32)); | |
4802 | ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32)); | |
4803 | data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32)); | |
4804 | data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32)); | |
4805 | line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32)); | |
4806 | time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32)); | |
b481de9c ZY |
4807 | |
4808 | IWL_ERROR("Desc Time " | |
4809 | "data1 data2 line\n"); | |
4810 | IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n", | |
4811 | desc_lookup(desc), desc, time, data1, data2, line); | |
4812 | IWL_ERROR("blink1 blink2 ilink1 ilink2\n"); | |
4813 | IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, | |
4814 | ilink1, ilink2); | |
4815 | ||
bb8c093b | 4816 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4817 | } |
4818 | ||
4819 | #define EVENT_START_OFFSET (4 * sizeof(u32)) | |
4820 | ||
4821 | /** | |
bb8c093b | 4822 | * iwl4965_print_event_log - Dump error event log to syslog |
b481de9c | 4823 | * |
bb8c093b | 4824 | * NOTE: Must be called with iwl4965_grab_nic_access() already obtained! |
b481de9c | 4825 | */ |
bb8c093b | 4826 | static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx, |
b481de9c ZY |
4827 | u32 num_events, u32 mode) |
4828 | { | |
4829 | u32 i; | |
4830 | u32 base; /* SRAM byte address of event log header */ | |
4831 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
4832 | u32 ptr; /* SRAM byte address of log data */ | |
4833 | u32 ev, time, data; /* event log data */ | |
4834 | ||
4835 | if (num_events == 0) | |
4836 | return; | |
4837 | ||
4838 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
4839 | ||
4840 | if (mode == 0) | |
4841 | event_size = 2 * sizeof(u32); | |
4842 | else | |
4843 | event_size = 3 * sizeof(u32); | |
4844 | ||
4845 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
4846 | ||
4847 | /* "time" is actually "data" for mode 0 (no timestamp). | |
4848 | * place event id # at far right for easier visual parsing. */ | |
4849 | for (i = 0; i < num_events; i++) { | |
bb8c093b | 4850 | ev = iwl4965_read_targ_mem(priv, ptr); |
b481de9c | 4851 | ptr += sizeof(u32); |
bb8c093b | 4852 | time = iwl4965_read_targ_mem(priv, ptr); |
b481de9c ZY |
4853 | ptr += sizeof(u32); |
4854 | if (mode == 0) | |
4855 | IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ | |
4856 | else { | |
bb8c093b | 4857 | data = iwl4965_read_targ_mem(priv, ptr); |
b481de9c ZY |
4858 | ptr += sizeof(u32); |
4859 | IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); | |
4860 | } | |
4861 | } | |
4862 | } | |
4863 | ||
bb8c093b | 4864 | static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv) |
b481de9c ZY |
4865 | { |
4866 | int rc; | |
4867 | u32 base; /* SRAM byte address of event log header */ | |
4868 | u32 capacity; /* event log capacity in # entries */ | |
4869 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
4870 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
4871 | u32 next_entry; /* index of next entry to be written by uCode */ | |
4872 | u32 size; /* # entries that we'll print */ | |
4873 | ||
4874 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
bb8c093b | 4875 | if (!iwl4965_hw_valid_rtc_data_addr(base)) { |
b481de9c ZY |
4876 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); |
4877 | return; | |
4878 | } | |
4879 | ||
bb8c093b | 4880 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4881 | if (rc) { |
4882 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
4883 | return; | |
4884 | } | |
4885 | ||
4886 | /* event log header */ | |
bb8c093b CH |
4887 | capacity = iwl4965_read_targ_mem(priv, base); |
4888 | mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32))); | |
4889 | num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32))); | |
4890 | next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32))); | |
b481de9c ZY |
4891 | |
4892 | size = num_wraps ? capacity : next_entry; | |
4893 | ||
4894 | /* bail out if nothing in log */ | |
4895 | if (size == 0) { | |
583fab37 | 4896 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); |
bb8c093b | 4897 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4898 | return; |
4899 | } | |
4900 | ||
583fab37 | 4901 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", |
b481de9c ZY |
4902 | size, num_wraps); |
4903 | ||
4904 | /* if uCode has wrapped back to top of log, start at the oldest entry, | |
4905 | * i.e the next one that uCode would fill. */ | |
4906 | if (num_wraps) | |
bb8c093b | 4907 | iwl4965_print_event_log(priv, next_entry, |
b481de9c ZY |
4908 | capacity - next_entry, mode); |
4909 | ||
4910 | /* (then/else) start at top of log */ | |
bb8c093b | 4911 | iwl4965_print_event_log(priv, 0, next_entry, mode); |
b481de9c | 4912 | |
bb8c093b | 4913 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4914 | } |
4915 | ||
4916 | /** | |
bb8c093b | 4917 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 4918 | */ |
bb8c093b | 4919 | static void iwl4965_irq_handle_error(struct iwl4965_priv *priv) |
b481de9c | 4920 | { |
bb8c093b | 4921 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
4922 | set_bit(STATUS_FW_ERROR, &priv->status); |
4923 | ||
4924 | /* Cancel currently queued command. */ | |
4925 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
4926 | ||
c8b0e6e1 | 4927 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
4928 | if (iwl4965_debug_level & IWL_DL_FW_ERRORS) { |
4929 | iwl4965_dump_nic_error_log(priv); | |
4930 | iwl4965_dump_nic_event_log(priv); | |
4931 | iwl4965_print_rx_config_cmd(&priv->staging_rxon); | |
b481de9c ZY |
4932 | } |
4933 | #endif | |
4934 | ||
4935 | wake_up_interruptible(&priv->wait_command_queue); | |
4936 | ||
4937 | /* Keep the restart process from trying to send host | |
4938 | * commands by clearing the INIT status bit */ | |
4939 | clear_bit(STATUS_READY, &priv->status); | |
4940 | ||
4941 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4942 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS, | |
4943 | "Restarting adapter due to uCode error.\n"); | |
4944 | ||
bb8c093b | 4945 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
4946 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
4947 | sizeof(priv->recovery_rxon)); | |
4948 | priv->error_recovering = 1; | |
4949 | } | |
4950 | queue_work(priv->workqueue, &priv->restart); | |
4951 | } | |
4952 | } | |
4953 | ||
bb8c093b | 4954 | static void iwl4965_error_recovery(struct iwl4965_priv *priv) |
b481de9c ZY |
4955 | { |
4956 | unsigned long flags; | |
4957 | ||
4958 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
4959 | sizeof(priv->staging_rxon)); | |
4960 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 4961 | iwl4965_commit_rxon(priv); |
b481de9c | 4962 | |
bb8c093b | 4963 | iwl4965_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
4964 | |
4965 | spin_lock_irqsave(&priv->lock, flags); | |
4966 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
4967 | priv->error_recovering = 0; | |
4968 | spin_unlock_irqrestore(&priv->lock, flags); | |
4969 | } | |
4970 | ||
bb8c093b | 4971 | static void iwl4965_irq_tasklet(struct iwl4965_priv *priv) |
b481de9c ZY |
4972 | { |
4973 | u32 inta, handled = 0; | |
4974 | u32 inta_fh; | |
4975 | unsigned long flags; | |
c8b0e6e1 | 4976 | #ifdef CONFIG_IWL4965_DEBUG |
b481de9c ZY |
4977 | u32 inta_mask; |
4978 | #endif | |
4979 | ||
4980 | spin_lock_irqsave(&priv->lock, flags); | |
4981 | ||
4982 | /* Ack/clear/reset pending uCode interrupts. | |
4983 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
4984 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
bb8c093b CH |
4985 | inta = iwl4965_read32(priv, CSR_INT); |
4986 | iwl4965_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
4987 | |
4988 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
4989 | * Any new interrupts that happen after this, either while we're | |
4990 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
bb8c093b CH |
4991 | inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); |
4992 | iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 4993 | |
c8b0e6e1 | 4994 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
4995 | if (iwl4965_debug_level & IWL_DL_ISR) { |
4996 | inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */ | |
b481de9c ZY |
4997 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
4998 | inta, inta_mask, inta_fh); | |
4999 | } | |
5000 | #endif | |
5001 | ||
5002 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
5003 | * atomic, make sure that inta covers all the interrupts that | |
5004 | * we've discovered, even if FH interrupt came in just after | |
5005 | * reading CSR_INT. */ | |
5006 | if (inta_fh & CSR_FH_INT_RX_MASK) | |
5007 | inta |= CSR_INT_BIT_FH_RX; | |
5008 | if (inta_fh & CSR_FH_INT_TX_MASK) | |
5009 | inta |= CSR_INT_BIT_FH_TX; | |
5010 | ||
5011 | /* Now service all interrupt bits discovered above. */ | |
5012 | if (inta & CSR_INT_BIT_HW_ERR) { | |
5013 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
5014 | ||
5015 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 5016 | iwl4965_disable_interrupts(priv); |
b481de9c | 5017 | |
bb8c093b | 5018 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
5019 | |
5020 | handled |= CSR_INT_BIT_HW_ERR; | |
5021 | ||
5022 | spin_unlock_irqrestore(&priv->lock, flags); | |
5023 | ||
5024 | return; | |
5025 | } | |
5026 | ||
c8b0e6e1 | 5027 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 5028 | if (iwl4965_debug_level & (IWL_DL_ISR)) { |
b481de9c ZY |
5029 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
5030 | if (inta & CSR_INT_BIT_MAC_CLK_ACTV) | |
5031 | IWL_DEBUG_ISR("Microcode started or stopped.\n"); | |
5032 | ||
5033 | /* Alive notification via Rx interrupt will do the real work */ | |
5034 | if (inta & CSR_INT_BIT_ALIVE) | |
5035 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
5036 | } | |
5037 | #endif | |
5038 | /* Safely ignore these bits for debug checks below */ | |
5039 | inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE); | |
5040 | ||
5041 | /* HW RF KILL switch toggled (4965 only) */ | |
5042 | if (inta & CSR_INT_BIT_RF_KILL) { | |
5043 | int hw_rf_kill = 0; | |
bb8c093b | 5044 | if (!(iwl4965_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
5045 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
5046 | hw_rf_kill = 1; | |
5047 | ||
5048 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR, | |
5049 | "RF_KILL bit toggled to %s.\n", | |
5050 | hw_rf_kill ? "disable radio":"enable radio"); | |
5051 | ||
5052 | /* Queue restart only if RF_KILL switch was set to "kill" | |
5053 | * when we loaded driver, and is now set to "enable". | |
5054 | * After we're Alive, RF_KILL gets handled by | |
5055 | * iwl_rx_card_state_notif() */ | |
53e49093 ZY |
5056 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
5057 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 5058 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 5059 | } |
b481de9c ZY |
5060 | |
5061 | handled |= CSR_INT_BIT_RF_KILL; | |
5062 | } | |
5063 | ||
5064 | /* Chip got too hot and stopped itself (4965 only) */ | |
5065 | if (inta & CSR_INT_BIT_CT_KILL) { | |
5066 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
5067 | handled |= CSR_INT_BIT_CT_KILL; | |
5068 | } | |
5069 | ||
5070 | /* Error detected by uCode */ | |
5071 | if (inta & CSR_INT_BIT_SW_ERR) { | |
5072 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
5073 | inta); | |
bb8c093b | 5074 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
5075 | handled |= CSR_INT_BIT_SW_ERR; |
5076 | } | |
5077 | ||
5078 | /* uCode wakes up after power-down sleep */ | |
5079 | if (inta & CSR_INT_BIT_WAKEUP) { | |
5080 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
bb8c093b CH |
5081 | iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq); |
5082 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]); | |
5083 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]); | |
5084 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]); | |
5085 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]); | |
5086 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]); | |
5087 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
5088 | |
5089 | handled |= CSR_INT_BIT_WAKEUP; | |
5090 | } | |
5091 | ||
5092 | /* All uCode command responses, including Tx command responses, | |
5093 | * Rx "responses" (frame-received notification), and other | |
5094 | * notifications from uCode come through here*/ | |
5095 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
bb8c093b | 5096 | iwl4965_rx_handle(priv); |
b481de9c ZY |
5097 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
5098 | } | |
5099 | ||
5100 | if (inta & CSR_INT_BIT_FH_TX) { | |
5101 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
5102 | handled |= CSR_INT_BIT_FH_TX; | |
5103 | } | |
5104 | ||
5105 | if (inta & ~handled) | |
5106 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
5107 | ||
5108 | if (inta & ~CSR_INI_SET_MASK) { | |
5109 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
5110 | inta & ~CSR_INI_SET_MASK); | |
5111 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
5112 | } | |
5113 | ||
5114 | /* Re-enable all interrupts */ | |
bb8c093b | 5115 | iwl4965_enable_interrupts(priv); |
b481de9c | 5116 | |
c8b0e6e1 | 5117 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
5118 | if (iwl4965_debug_level & (IWL_DL_ISR)) { |
5119 | inta = iwl4965_read32(priv, CSR_INT); | |
5120 | inta_mask = iwl4965_read32(priv, CSR_INT_MASK); | |
5121 | inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
5122 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
5123 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
5124 | } | |
5125 | #endif | |
5126 | spin_unlock_irqrestore(&priv->lock, flags); | |
5127 | } | |
5128 | ||
bb8c093b | 5129 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 5130 | { |
bb8c093b | 5131 | struct iwl4965_priv *priv = data; |
b481de9c ZY |
5132 | u32 inta, inta_mask; |
5133 | u32 inta_fh; | |
5134 | if (!priv) | |
5135 | return IRQ_NONE; | |
5136 | ||
5137 | spin_lock(&priv->lock); | |
5138 | ||
5139 | /* Disable (but don't clear!) interrupts here to avoid | |
5140 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
5141 | * If we have something to service, the tasklet will re-enable ints. | |
5142 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
bb8c093b CH |
5143 | inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */ |
5144 | iwl4965_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
5145 | |
5146 | /* Discover which interrupts are active/pending */ | |
bb8c093b CH |
5147 | inta = iwl4965_read32(priv, CSR_INT); |
5148 | inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
5149 | |
5150 | /* Ignore interrupt if there's nothing in NIC to service. | |
5151 | * This may be due to IRQ shared with another device, | |
5152 | * or due to sporadic interrupts thrown from our NIC. */ | |
5153 | if (!inta && !inta_fh) { | |
5154 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
5155 | goto none; | |
5156 | } | |
5157 | ||
5158 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
5159 | /* Hardware disappeared. It might have already raised |
5160 | * an interrupt */ | |
b481de9c | 5161 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 5162 | goto unplugged; |
b481de9c ZY |
5163 | } |
5164 | ||
5165 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
5166 | inta, inta_mask, inta_fh); | |
5167 | ||
bb8c093b | 5168 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
b481de9c | 5169 | tasklet_schedule(&priv->irq_tasklet); |
b481de9c | 5170 | |
66fbb541 ON |
5171 | unplugged: |
5172 | spin_unlock(&priv->lock); | |
b481de9c ZY |
5173 | return IRQ_HANDLED; |
5174 | ||
5175 | none: | |
5176 | /* re-enable interrupts here since we don't have anything to service. */ | |
bb8c093b | 5177 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
5178 | spin_unlock(&priv->lock); |
5179 | return IRQ_NONE; | |
5180 | } | |
5181 | ||
5182 | /************************** EEPROM BANDS **************************** | |
5183 | * | |
bb8c093b | 5184 | * The iwl4965_eeprom_band definitions below provide the mapping from the |
b481de9c ZY |
5185 | * EEPROM contents to the specific channel number supported for each |
5186 | * band. | |
5187 | * | |
bb8c093b | 5188 | * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3 |
b481de9c ZY |
5189 | * definition below maps to physical channel 42 in the 5.2GHz spectrum. |
5190 | * The specific geography and calibration information for that channel | |
5191 | * is contained in the eeprom map itself. | |
5192 | * | |
5193 | * During init, we copy the eeprom information and channel map | |
5194 | * information into priv->channel_info_24/52 and priv->channel_map_24/52 | |
5195 | * | |
5196 | * channel_map_24/52 provides the index in the channel_info array for a | |
5197 | * given channel. We have to have two separate maps as there is channel | |
5198 | * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and | |
5199 | * band_2 | |
5200 | * | |
5201 | * A value of 0xff stored in the channel_map indicates that the channel | |
5202 | * is not supported by the hardware at all. | |
5203 | * | |
5204 | * A value of 0xfe in the channel_map indicates that the channel is not | |
5205 | * valid for Tx with the current hardware. This means that | |
5206 | * while the system can tune and receive on a given channel, it may not | |
5207 | * be able to associate or transmit any frames on that | |
5208 | * channel. There is no corresponding channel information for that | |
5209 | * entry. | |
5210 | * | |
5211 | *********************************************************************/ | |
5212 | ||
5213 | /* 2.4 GHz */ | |
bb8c093b | 5214 | static const u8 iwl4965_eeprom_band_1[14] = { |
b481de9c ZY |
5215 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 |
5216 | }; | |
5217 | ||
5218 | /* 5.2 GHz bands */ | |
bb8c093b | 5219 | static const u8 iwl4965_eeprom_band_2[] = { |
b481de9c ZY |
5220 | 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 |
5221 | }; | |
5222 | ||
bb8c093b | 5223 | static const u8 iwl4965_eeprom_band_3[] = { /* 5205-5320MHz */ |
b481de9c ZY |
5224 | 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 |
5225 | }; | |
5226 | ||
bb8c093b | 5227 | static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */ |
b481de9c ZY |
5228 | 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 |
5229 | }; | |
5230 | ||
bb8c093b | 5231 | static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */ |
b481de9c ZY |
5232 | 145, 149, 153, 157, 161, 165 |
5233 | }; | |
5234 | ||
bb8c093b | 5235 | static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */ |
b481de9c ZY |
5236 | 1, 2, 3, 4, 5, 6, 7 |
5237 | }; | |
5238 | ||
bb8c093b | 5239 | static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */ |
b481de9c ZY |
5240 | 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 |
5241 | }; | |
5242 | ||
bb8c093b | 5243 | static void iwl4965_init_band_reference(const struct iwl4965_priv *priv, int band, |
b481de9c | 5244 | int *eeprom_ch_count, |
bb8c093b | 5245 | const struct iwl4965_eeprom_channel |
b481de9c ZY |
5246 | **eeprom_ch_info, |
5247 | const u8 **eeprom_ch_index) | |
5248 | { | |
5249 | switch (band) { | |
5250 | case 1: /* 2.4GHz band */ | |
bb8c093b | 5251 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1); |
b481de9c | 5252 | *eeprom_ch_info = priv->eeprom.band_1_channels; |
bb8c093b | 5253 | *eeprom_ch_index = iwl4965_eeprom_band_1; |
b481de9c ZY |
5254 | break; |
5255 | case 2: /* 5.2GHz band */ | |
bb8c093b | 5256 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2); |
b481de9c | 5257 | *eeprom_ch_info = priv->eeprom.band_2_channels; |
bb8c093b | 5258 | *eeprom_ch_index = iwl4965_eeprom_band_2; |
b481de9c ZY |
5259 | break; |
5260 | case 3: /* 5.2GHz band */ | |
bb8c093b | 5261 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3); |
b481de9c | 5262 | *eeprom_ch_info = priv->eeprom.band_3_channels; |
bb8c093b | 5263 | *eeprom_ch_index = iwl4965_eeprom_band_3; |
b481de9c ZY |
5264 | break; |
5265 | case 4: /* 5.2GHz band */ | |
bb8c093b | 5266 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4); |
b481de9c | 5267 | *eeprom_ch_info = priv->eeprom.band_4_channels; |
bb8c093b | 5268 | *eeprom_ch_index = iwl4965_eeprom_band_4; |
b481de9c ZY |
5269 | break; |
5270 | case 5: /* 5.2GHz band */ | |
bb8c093b | 5271 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5); |
b481de9c | 5272 | *eeprom_ch_info = priv->eeprom.band_5_channels; |
bb8c093b | 5273 | *eeprom_ch_index = iwl4965_eeprom_band_5; |
b481de9c ZY |
5274 | break; |
5275 | case 6: | |
bb8c093b | 5276 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6); |
b481de9c | 5277 | *eeprom_ch_info = priv->eeprom.band_24_channels; |
bb8c093b | 5278 | *eeprom_ch_index = iwl4965_eeprom_band_6; |
b481de9c ZY |
5279 | break; |
5280 | case 7: | |
bb8c093b | 5281 | *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7); |
b481de9c | 5282 | *eeprom_ch_info = priv->eeprom.band_52_channels; |
bb8c093b | 5283 | *eeprom_ch_index = iwl4965_eeprom_band_7; |
b481de9c ZY |
5284 | break; |
5285 | default: | |
5286 | BUG(); | |
5287 | return; | |
5288 | } | |
5289 | } | |
5290 | ||
bb8c093b | 5291 | const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv, |
b481de9c ZY |
5292 | int phymode, u16 channel) |
5293 | { | |
5294 | int i; | |
5295 | ||
5296 | switch (phymode) { | |
5297 | case MODE_IEEE80211A: | |
5298 | for (i = 14; i < priv->channel_count; i++) { | |
5299 | if (priv->channel_info[i].channel == channel) | |
5300 | return &priv->channel_info[i]; | |
5301 | } | |
5302 | break; | |
5303 | ||
5304 | case MODE_IEEE80211B: | |
5305 | case MODE_IEEE80211G: | |
5306 | if (channel >= 1 && channel <= 14) | |
5307 | return &priv->channel_info[channel - 1]; | |
5308 | break; | |
5309 | ||
5310 | } | |
5311 | ||
5312 | return NULL; | |
5313 | } | |
5314 | ||
5315 | #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \ | |
5316 | ? # x " " : "") | |
5317 | ||
bb8c093b | 5318 | static int iwl4965_init_channel_map(struct iwl4965_priv *priv) |
b481de9c ZY |
5319 | { |
5320 | int eeprom_ch_count = 0; | |
5321 | const u8 *eeprom_ch_index = NULL; | |
bb8c093b | 5322 | const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL; |
b481de9c | 5323 | int band, ch; |
bb8c093b | 5324 | struct iwl4965_channel_info *ch_info; |
b481de9c ZY |
5325 | |
5326 | if (priv->channel_count) { | |
5327 | IWL_DEBUG_INFO("Channel map already initialized.\n"); | |
5328 | return 0; | |
5329 | } | |
5330 | ||
5331 | if (priv->eeprom.version < 0x2f) { | |
5332 | IWL_WARNING("Unsupported EEPROM version: 0x%04X\n", | |
5333 | priv->eeprom.version); | |
5334 | return -EINVAL; | |
5335 | } | |
5336 | ||
5337 | IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n"); | |
5338 | ||
5339 | priv->channel_count = | |
bb8c093b CH |
5340 | ARRAY_SIZE(iwl4965_eeprom_band_1) + |
5341 | ARRAY_SIZE(iwl4965_eeprom_band_2) + | |
5342 | ARRAY_SIZE(iwl4965_eeprom_band_3) + | |
5343 | ARRAY_SIZE(iwl4965_eeprom_band_4) + | |
5344 | ARRAY_SIZE(iwl4965_eeprom_band_5); | |
b481de9c ZY |
5345 | |
5346 | IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count); | |
5347 | ||
bb8c093b | 5348 | priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) * |
b481de9c ZY |
5349 | priv->channel_count, GFP_KERNEL); |
5350 | if (!priv->channel_info) { | |
5351 | IWL_ERROR("Could not allocate channel_info\n"); | |
5352 | priv->channel_count = 0; | |
5353 | return -ENOMEM; | |
5354 | } | |
5355 | ||
5356 | ch_info = priv->channel_info; | |
5357 | ||
5358 | /* Loop through the 5 EEPROM bands adding them in order to the | |
5359 | * channel map we maintain (that contains additional information than | |
5360 | * what just in the EEPROM) */ | |
5361 | for (band = 1; band <= 5; band++) { | |
5362 | ||
bb8c093b | 5363 | iwl4965_init_band_reference(priv, band, &eeprom_ch_count, |
b481de9c ZY |
5364 | &eeprom_ch_info, &eeprom_ch_index); |
5365 | ||
5366 | /* Loop through each band adding each of the channels */ | |
5367 | for (ch = 0; ch < eeprom_ch_count; ch++) { | |
5368 | ch_info->channel = eeprom_ch_index[ch]; | |
5369 | ch_info->phymode = (band == 1) ? MODE_IEEE80211B : | |
5370 | MODE_IEEE80211A; | |
5371 | ||
5372 | /* permanently store EEPROM's channel regulatory flags | |
5373 | * and max power in channel info database. */ | |
5374 | ch_info->eeprom = eeprom_ch_info[ch]; | |
5375 | ||
5376 | /* Copy the run-time flags so they are there even on | |
5377 | * invalid channels */ | |
5378 | ch_info->flags = eeprom_ch_info[ch].flags; | |
5379 | ||
5380 | if (!(is_channel_valid(ch_info))) { | |
5381 | IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - " | |
5382 | "No traffic\n", | |
5383 | ch_info->channel, | |
5384 | ch_info->flags, | |
5385 | is_channel_a_band(ch_info) ? | |
5386 | "5.2" : "2.4"); | |
5387 | ch_info++; | |
5388 | continue; | |
5389 | } | |
5390 | ||
5391 | /* Initialize regulatory-based run-time data */ | |
5392 | ch_info->max_power_avg = ch_info->curr_txpow = | |
5393 | eeprom_ch_info[ch].max_power_avg; | |
5394 | ch_info->scan_power = eeprom_ch_info[ch].max_power_avg; | |
5395 | ch_info->min_power = 0; | |
5396 | ||
5397 | IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x" | |
5398 | " %ddBm): Ad-Hoc %ssupported\n", | |
5399 | ch_info->channel, | |
5400 | is_channel_a_band(ch_info) ? | |
5401 | "5.2" : "2.4", | |
5402 | CHECK_AND_PRINT(IBSS), | |
5403 | CHECK_AND_PRINT(ACTIVE), | |
5404 | CHECK_AND_PRINT(RADAR), | |
5405 | CHECK_AND_PRINT(WIDE), | |
5406 | CHECK_AND_PRINT(NARROW), | |
5407 | CHECK_AND_PRINT(DFS), | |
5408 | eeprom_ch_info[ch].flags, | |
5409 | eeprom_ch_info[ch].max_power_avg, | |
5410 | ((eeprom_ch_info[ch]. | |
5411 | flags & EEPROM_CHANNEL_IBSS) | |
5412 | && !(eeprom_ch_info[ch]. | |
5413 | flags & EEPROM_CHANNEL_RADAR)) | |
5414 | ? "" : "not "); | |
5415 | ||
5416 | /* Set the user_txpower_limit to the highest power | |
5417 | * supported by any channel */ | |
5418 | if (eeprom_ch_info[ch].max_power_avg > | |
5419 | priv->user_txpower_limit) | |
5420 | priv->user_txpower_limit = | |
5421 | eeprom_ch_info[ch].max_power_avg; | |
5422 | ||
5423 | ch_info++; | |
5424 | } | |
5425 | } | |
5426 | ||
5427 | for (band = 6; band <= 7; band++) { | |
5428 | int phymode; | |
5429 | u8 fat_extension_chan; | |
5430 | ||
bb8c093b | 5431 | iwl4965_init_band_reference(priv, band, &eeprom_ch_count, |
b481de9c ZY |
5432 | &eeprom_ch_info, &eeprom_ch_index); |
5433 | ||
5434 | phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A; | |
5435 | /* Loop through each band adding each of the channels */ | |
5436 | for (ch = 0; ch < eeprom_ch_count; ch++) { | |
5437 | ||
5438 | if ((band == 6) && | |
5439 | ((eeprom_ch_index[ch] == 5) || | |
5440 | (eeprom_ch_index[ch] == 6) || | |
5441 | (eeprom_ch_index[ch] == 7))) | |
5442 | fat_extension_chan = HT_IE_EXT_CHANNEL_MAX; | |
5443 | else | |
5444 | fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE; | |
5445 | ||
5446 | iwl4965_set_fat_chan_info(priv, phymode, | |
5447 | eeprom_ch_index[ch], | |
5448 | &(eeprom_ch_info[ch]), | |
5449 | fat_extension_chan); | |
5450 | ||
5451 | iwl4965_set_fat_chan_info(priv, phymode, | |
5452 | (eeprom_ch_index[ch] + 4), | |
5453 | &(eeprom_ch_info[ch]), | |
5454 | HT_IE_EXT_CHANNEL_BELOW); | |
5455 | } | |
5456 | } | |
5457 | ||
5458 | return 0; | |
5459 | } | |
5460 | ||
5461 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after | |
5462 | * sending probe req. This should be set long enough to hear probe responses | |
5463 | * from more than one AP. */ | |
5464 | #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
5465 | #define IWL_ACTIVE_DWELL_TIME_52 (10) | |
5466 | ||
5467 | /* For faster active scanning, scan will move to the next channel if fewer than | |
5468 | * PLCP_QUIET_THRESH packets are heard on this channel within | |
5469 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | |
5470 | * time if it's a quiet channel (nothing responded to our probe, and there's | |
5471 | * no other traffic). | |
5472 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | |
5473 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | |
5474 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */ | |
5475 | ||
5476 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | |
5477 | * Must be set longer than active dwell time. | |
5478 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | |
5479 | #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
5480 | #define IWL_PASSIVE_DWELL_TIME_52 (10) | |
5481 | #define IWL_PASSIVE_DWELL_BASE (100) | |
5482 | #define IWL_CHANNEL_TUNE_TIME 5 | |
5483 | ||
bb8c093b | 5484 | static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode) |
b481de9c ZY |
5485 | { |
5486 | if (phymode == MODE_IEEE80211A) | |
5487 | return IWL_ACTIVE_DWELL_TIME_52; | |
5488 | else | |
5489 | return IWL_ACTIVE_DWELL_TIME_24; | |
5490 | } | |
5491 | ||
bb8c093b | 5492 | static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode) |
b481de9c | 5493 | { |
bb8c093b | 5494 | u16 active = iwl4965_get_active_dwell_time(priv, phymode); |
b481de9c ZY |
5495 | u16 passive = (phymode != MODE_IEEE80211A) ? |
5496 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : | |
5497 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; | |
5498 | ||
bb8c093b | 5499 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
5500 | /* If we're associated, we clamp the maximum passive |
5501 | * dwell time to be 98% of the beacon interval (minus | |
5502 | * 2 * channel tune time) */ | |
5503 | passive = priv->beacon_int; | |
5504 | if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive) | |
5505 | passive = IWL_PASSIVE_DWELL_BASE; | |
5506 | passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; | |
5507 | } | |
5508 | ||
5509 | if (passive <= active) | |
5510 | passive = active + 1; | |
5511 | ||
5512 | return passive; | |
5513 | } | |
5514 | ||
bb8c093b | 5515 | static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode, |
b481de9c | 5516 | u8 is_active, u8 direct_mask, |
bb8c093b | 5517 | struct iwl4965_scan_channel *scan_ch) |
b481de9c ZY |
5518 | { |
5519 | const struct ieee80211_channel *channels = NULL; | |
5520 | const struct ieee80211_hw_mode *hw_mode; | |
bb8c093b | 5521 | const struct iwl4965_channel_info *ch_info; |
b481de9c ZY |
5522 | u16 passive_dwell = 0; |
5523 | u16 active_dwell = 0; | |
5524 | int added, i; | |
5525 | ||
bb8c093b | 5526 | hw_mode = iwl4965_get_hw_mode(priv, phymode); |
b481de9c ZY |
5527 | if (!hw_mode) |
5528 | return 0; | |
5529 | ||
5530 | channels = hw_mode->channels; | |
5531 | ||
bb8c093b CH |
5532 | active_dwell = iwl4965_get_active_dwell_time(priv, phymode); |
5533 | passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode); | |
b481de9c ZY |
5534 | |
5535 | for (i = 0, added = 0; i < hw_mode->num_channels; i++) { | |
5536 | if (channels[i].chan == | |
5537 | le16_to_cpu(priv->active_rxon.channel)) { | |
bb8c093b | 5538 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
5539 | IWL_DEBUG_SCAN |
5540 | ("Skipping current channel %d\n", | |
5541 | le16_to_cpu(priv->active_rxon.channel)); | |
5542 | continue; | |
5543 | } | |
5544 | } else if (priv->only_active_channel) | |
5545 | continue; | |
5546 | ||
5547 | scan_ch->channel = channels[i].chan; | |
5548 | ||
bb8c093b | 5549 | ch_info = iwl4965_get_channel_info(priv, phymode, scan_ch->channel); |
b481de9c ZY |
5550 | if (!is_channel_valid(ch_info)) { |
5551 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | |
5552 | scan_ch->channel); | |
5553 | continue; | |
5554 | } | |
5555 | ||
5556 | if (!is_active || is_channel_passive(ch_info) || | |
5557 | !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN)) | |
5558 | scan_ch->type = 0; /* passive */ | |
5559 | else | |
5560 | scan_ch->type = 1; /* active */ | |
5561 | ||
5562 | if (scan_ch->type & 1) | |
5563 | scan_ch->type |= (direct_mask << 1); | |
5564 | ||
5565 | if (is_channel_narrow(ch_info)) | |
5566 | scan_ch->type |= (1 << 7); | |
5567 | ||
5568 | scan_ch->active_dwell = cpu_to_le16(active_dwell); | |
5569 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | |
5570 | ||
5571 | /* Set power levels to defaults */ | |
5572 | scan_ch->tpc.dsp_atten = 110; | |
5573 | /* scan_pwr_info->tpc.dsp_atten; */ | |
5574 | ||
5575 | /*scan_pwr_info->tpc.tx_gain; */ | |
5576 | if (phymode == MODE_IEEE80211A) | |
5577 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; | |
5578 | else { | |
5579 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | |
5580 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | |
5581 | * power level | |
5582 | scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3; | |
5583 | */ | |
5584 | } | |
5585 | ||
5586 | IWL_DEBUG_SCAN("Scanning %d [%s %d]\n", | |
5587 | scan_ch->channel, | |
5588 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | |
5589 | (scan_ch->type & 1) ? | |
5590 | active_dwell : passive_dwell); | |
5591 | ||
5592 | scan_ch++; | |
5593 | added++; | |
5594 | } | |
5595 | ||
5596 | IWL_DEBUG_SCAN("total channels to scan %d \n", added); | |
5597 | return added; | |
5598 | } | |
5599 | ||
bb8c093b | 5600 | static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv) |
b481de9c ZY |
5601 | { |
5602 | int i, j; | |
5603 | for (i = 0; i < 3; i++) { | |
5604 | struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i]; | |
5605 | for (j = 0; j < hw_mode->num_channels; j++) | |
5606 | hw_mode->channels[j].flag = hw_mode->channels[j].val; | |
5607 | } | |
5608 | } | |
5609 | ||
bb8c093b | 5610 | static void iwl4965_init_hw_rates(struct iwl4965_priv *priv, |
b481de9c ZY |
5611 | struct ieee80211_rate *rates) |
5612 | { | |
5613 | int i; | |
5614 | ||
5615 | for (i = 0; i < IWL_RATE_COUNT; i++) { | |
bb8c093b | 5616 | rates[i].rate = iwl4965_rates[i].ieee * 5; |
b481de9c ZY |
5617 | rates[i].val = i; /* Rate scaling will work on indexes */ |
5618 | rates[i].val2 = i; | |
5619 | rates[i].flags = IEEE80211_RATE_SUPPORTED; | |
5620 | /* Only OFDM have the bits-per-symbol set */ | |
5621 | if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE)) | |
5622 | rates[i].flags |= IEEE80211_RATE_OFDM; | |
5623 | else { | |
5624 | /* | |
5625 | * If CCK 1M then set rate flag to CCK else CCK_2 | |
5626 | * which is CCK | PREAMBLE2 | |
5627 | */ | |
bb8c093b | 5628 | rates[i].flags |= (iwl4965_rates[i].plcp == 10) ? |
b481de9c ZY |
5629 | IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2; |
5630 | } | |
5631 | ||
5632 | /* Set up which ones are basic rates... */ | |
5633 | if (IWL_BASIC_RATES_MASK & (1 << i)) | |
5634 | rates[i].flags |= IEEE80211_RATE_BASIC; | |
5635 | } | |
b481de9c ZY |
5636 | } |
5637 | ||
5638 | /** | |
bb8c093b | 5639 | * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom |
b481de9c | 5640 | */ |
bb8c093b | 5641 | static int iwl4965_init_geos(struct iwl4965_priv *priv) |
b481de9c | 5642 | { |
bb8c093b | 5643 | struct iwl4965_channel_info *ch; |
b481de9c ZY |
5644 | struct ieee80211_hw_mode *modes; |
5645 | struct ieee80211_channel *channels; | |
5646 | struct ieee80211_channel *geo_ch; | |
5647 | struct ieee80211_rate *rates; | |
5648 | int i = 0; | |
5649 | enum { | |
5650 | A = 0, | |
5651 | B = 1, | |
5652 | G = 2, | |
5653 | A_11N = 3, | |
5654 | G_11N = 4, | |
5655 | }; | |
5656 | int mode_count = 5; | |
5657 | ||
5658 | if (priv->modes) { | |
5659 | IWL_DEBUG_INFO("Geography modes already initialized.\n"); | |
5660 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
5661 | return 0; | |
5662 | } | |
5663 | ||
5664 | modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count, | |
5665 | GFP_KERNEL); | |
5666 | if (!modes) | |
5667 | return -ENOMEM; | |
5668 | ||
5669 | channels = kzalloc(sizeof(struct ieee80211_channel) * | |
5670 | priv->channel_count, GFP_KERNEL); | |
5671 | if (!channels) { | |
5672 | kfree(modes); | |
5673 | return -ENOMEM; | |
5674 | } | |
5675 | ||
5676 | rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)), | |
5677 | GFP_KERNEL); | |
5678 | if (!rates) { | |
5679 | kfree(modes); | |
5680 | kfree(channels); | |
5681 | return -ENOMEM; | |
5682 | } | |
5683 | ||
5684 | /* 0 = 802.11a | |
5685 | * 1 = 802.11b | |
5686 | * 2 = 802.11g | |
5687 | */ | |
5688 | ||
5689 | /* 5.2GHz channels start after the 2.4GHz channels */ | |
5690 | modes[A].mode = MODE_IEEE80211A; | |
bb8c093b | 5691 | modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)]; |
b481de9c ZY |
5692 | modes[A].rates = rates; |
5693 | modes[A].num_rates = 8; /* just OFDM */ | |
5694 | modes[A].rates = &rates[4]; | |
5695 | modes[A].num_channels = 0; | |
5696 | ||
5697 | modes[B].mode = MODE_IEEE80211B; | |
5698 | modes[B].channels = channels; | |
5699 | modes[B].rates = rates; | |
5700 | modes[B].num_rates = 4; /* just CCK */ | |
5701 | modes[B].num_channels = 0; | |
5702 | ||
5703 | modes[G].mode = MODE_IEEE80211G; | |
5704 | modes[G].channels = channels; | |
5705 | modes[G].rates = rates; | |
5706 | modes[G].num_rates = 12; /* OFDM & CCK */ | |
5707 | modes[G].num_channels = 0; | |
5708 | ||
5709 | modes[G_11N].mode = MODE_IEEE80211G; | |
5710 | modes[G_11N].channels = channels; | |
5711 | modes[G_11N].num_rates = 13; /* OFDM & CCK */ | |
5712 | modes[G_11N].rates = rates; | |
5713 | modes[G_11N].num_channels = 0; | |
5714 | ||
5715 | modes[A_11N].mode = MODE_IEEE80211A; | |
bb8c093b | 5716 | modes[A_11N].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)]; |
b481de9c ZY |
5717 | modes[A_11N].rates = &rates[4]; |
5718 | modes[A_11N].num_rates = 9; /* just OFDM */ | |
5719 | modes[A_11N].num_channels = 0; | |
5720 | ||
5721 | priv->ieee_channels = channels; | |
5722 | priv->ieee_rates = rates; | |
5723 | ||
bb8c093b | 5724 | iwl4965_init_hw_rates(priv, rates); |
b481de9c ZY |
5725 | |
5726 | for (i = 0, geo_ch = channels; i < priv->channel_count; i++) { | |
5727 | ch = &priv->channel_info[i]; | |
5728 | ||
5729 | if (!is_channel_valid(ch)) { | |
5730 | IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- " | |
5731 | "skipping.\n", | |
5732 | ch->channel, is_channel_a_band(ch) ? | |
5733 | "5.2" : "2.4"); | |
5734 | continue; | |
5735 | } | |
5736 | ||
5737 | if (is_channel_a_band(ch)) { | |
5738 | geo_ch = &modes[A].channels[modes[A].num_channels++]; | |
5739 | modes[A_11N].num_channels++; | |
5740 | } else { | |
5741 | geo_ch = &modes[B].channels[modes[B].num_channels++]; | |
5742 | modes[G].num_channels++; | |
5743 | modes[G_11N].num_channels++; | |
5744 | } | |
5745 | ||
5746 | geo_ch->freq = ieee80211chan2mhz(ch->channel); | |
5747 | geo_ch->chan = ch->channel; | |
5748 | geo_ch->power_level = ch->max_power_avg; | |
5749 | geo_ch->antenna_max = 0xff; | |
5750 | ||
5751 | if (is_channel_valid(ch)) { | |
5752 | geo_ch->flag = IEEE80211_CHAN_W_SCAN; | |
5753 | if (ch->flags & EEPROM_CHANNEL_IBSS) | |
5754 | geo_ch->flag |= IEEE80211_CHAN_W_IBSS; | |
5755 | ||
5756 | if (ch->flags & EEPROM_CHANNEL_ACTIVE) | |
5757 | geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN; | |
5758 | ||
5759 | if (ch->flags & EEPROM_CHANNEL_RADAR) | |
5760 | geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT; | |
5761 | ||
5762 | if (ch->max_power_avg > priv->max_channel_txpower_limit) | |
5763 | priv->max_channel_txpower_limit = | |
5764 | ch->max_power_avg; | |
5765 | } | |
5766 | ||
5767 | geo_ch->val = geo_ch->flag; | |
5768 | } | |
5769 | ||
5770 | if ((modes[A].num_channels == 0) && priv->is_abg) { | |
5771 | printk(KERN_INFO DRV_NAME | |
5772 | ": Incorrectly detected BG card as ABG. Please send " | |
5773 | "your PCI ID 0x%04X:0x%04X to maintainer.\n", | |
5774 | priv->pci_dev->device, priv->pci_dev->subsystem_device); | |
5775 | priv->is_abg = 0; | |
5776 | } | |
5777 | ||
5778 | printk(KERN_INFO DRV_NAME | |
5779 | ": Tunable channels: %d 802.11bg, %d 802.11a channels\n", | |
5780 | modes[G].num_channels, modes[A].num_channels); | |
5781 | ||
5782 | /* | |
5783 | * NOTE: We register these in preference of order -- the | |
5784 | * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick | |
5785 | * a phymode based on rates or AP capabilities but seems to | |
5786 | * configure it purely on if the channel being configured | |
5787 | * is supported by a mode -- and the first match is taken | |
5788 | */ | |
5789 | ||
5790 | if (modes[G].num_channels) | |
5791 | ieee80211_register_hwmode(priv->hw, &modes[G]); | |
5792 | if (modes[B].num_channels) | |
5793 | ieee80211_register_hwmode(priv->hw, &modes[B]); | |
5794 | if (modes[A].num_channels) | |
5795 | ieee80211_register_hwmode(priv->hw, &modes[A]); | |
5796 | ||
5797 | priv->modes = modes; | |
5798 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
5799 | ||
5800 | return 0; | |
5801 | } | |
5802 | ||
5803 | /****************************************************************************** | |
5804 | * | |
5805 | * uCode download functions | |
5806 | * | |
5807 | ******************************************************************************/ | |
5808 | ||
bb8c093b | 5809 | static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv) |
b481de9c ZY |
5810 | { |
5811 | if (priv->ucode_code.v_addr != NULL) { | |
5812 | pci_free_consistent(priv->pci_dev, | |
5813 | priv->ucode_code.len, | |
5814 | priv->ucode_code.v_addr, | |
5815 | priv->ucode_code.p_addr); | |
5816 | priv->ucode_code.v_addr = NULL; | |
5817 | } | |
5818 | if (priv->ucode_data.v_addr != NULL) { | |
5819 | pci_free_consistent(priv->pci_dev, | |
5820 | priv->ucode_data.len, | |
5821 | priv->ucode_data.v_addr, | |
5822 | priv->ucode_data.p_addr); | |
5823 | priv->ucode_data.v_addr = NULL; | |
5824 | } | |
5825 | if (priv->ucode_data_backup.v_addr != NULL) { | |
5826 | pci_free_consistent(priv->pci_dev, | |
5827 | priv->ucode_data_backup.len, | |
5828 | priv->ucode_data_backup.v_addr, | |
5829 | priv->ucode_data_backup.p_addr); | |
5830 | priv->ucode_data_backup.v_addr = NULL; | |
5831 | } | |
5832 | if (priv->ucode_init.v_addr != NULL) { | |
5833 | pci_free_consistent(priv->pci_dev, | |
5834 | priv->ucode_init.len, | |
5835 | priv->ucode_init.v_addr, | |
5836 | priv->ucode_init.p_addr); | |
5837 | priv->ucode_init.v_addr = NULL; | |
5838 | } | |
5839 | if (priv->ucode_init_data.v_addr != NULL) { | |
5840 | pci_free_consistent(priv->pci_dev, | |
5841 | priv->ucode_init_data.len, | |
5842 | priv->ucode_init_data.v_addr, | |
5843 | priv->ucode_init_data.p_addr); | |
5844 | priv->ucode_init_data.v_addr = NULL; | |
5845 | } | |
5846 | if (priv->ucode_boot.v_addr != NULL) { | |
5847 | pci_free_consistent(priv->pci_dev, | |
5848 | priv->ucode_boot.len, | |
5849 | priv->ucode_boot.v_addr, | |
5850 | priv->ucode_boot.p_addr); | |
5851 | priv->ucode_boot.v_addr = NULL; | |
5852 | } | |
5853 | } | |
5854 | ||
5855 | /** | |
bb8c093b | 5856 | * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host, |
b481de9c ZY |
5857 | * looking at all data. |
5858 | */ | |
bb8c093b | 5859 | static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 * image, u32 len) |
b481de9c ZY |
5860 | { |
5861 | u32 val; | |
5862 | u32 save_len = len; | |
5863 | int rc = 0; | |
5864 | u32 errcnt; | |
5865 | ||
5866 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | |
5867 | ||
bb8c093b | 5868 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
5869 | if (rc) |
5870 | return rc; | |
5871 | ||
bb8c093b | 5872 | iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND); |
b481de9c ZY |
5873 | |
5874 | errcnt = 0; | |
5875 | for (; len > 0; len -= sizeof(u32), image++) { | |
5876 | /* read data comes through single port, auto-incr addr */ | |
5877 | /* NOTE: Use the debugless read so we don't flood kernel log | |
5878 | * if IWL_DL_IO is set */ | |
bb8c093b | 5879 | val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
5880 | if (val != le32_to_cpu(*image)) { |
5881 | IWL_ERROR("uCode INST section is invalid at " | |
5882 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | |
5883 | save_len - len, val, le32_to_cpu(*image)); | |
5884 | rc = -EIO; | |
5885 | errcnt++; | |
5886 | if (errcnt >= 20) | |
5887 | break; | |
5888 | } | |
5889 | } | |
5890 | ||
bb8c093b | 5891 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5892 | |
5893 | if (!errcnt) | |
5894 | IWL_DEBUG_INFO | |
5895 | ("ucode image in INSTRUCTION memory is good\n"); | |
5896 | ||
5897 | return rc; | |
5898 | } | |
5899 | ||
5900 | ||
5901 | /** | |
bb8c093b | 5902 | * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host, |
b481de9c ZY |
5903 | * using sample data 100 bytes apart. If these sample points are good, |
5904 | * it's a pretty good bet that everything between them is good, too. | |
5905 | */ | |
bb8c093b | 5906 | static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len) |
b481de9c ZY |
5907 | { |
5908 | u32 val; | |
5909 | int rc = 0; | |
5910 | u32 errcnt = 0; | |
5911 | u32 i; | |
5912 | ||
5913 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | |
5914 | ||
bb8c093b | 5915 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
5916 | if (rc) |
5917 | return rc; | |
5918 | ||
5919 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | |
5920 | /* read data comes through single port, auto-incr addr */ | |
5921 | /* NOTE: Use the debugless read so we don't flood kernel log | |
5922 | * if IWL_DL_IO is set */ | |
bb8c093b | 5923 | iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
b481de9c | 5924 | i + RTC_INST_LOWER_BOUND); |
bb8c093b | 5925 | val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
5926 | if (val != le32_to_cpu(*image)) { |
5927 | #if 0 /* Enable this if you want to see details */ | |
5928 | IWL_ERROR("uCode INST section is invalid at " | |
5929 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | |
5930 | i, val, *image); | |
5931 | #endif | |
5932 | rc = -EIO; | |
5933 | errcnt++; | |
5934 | if (errcnt >= 3) | |
5935 | break; | |
5936 | } | |
5937 | } | |
5938 | ||
bb8c093b | 5939 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5940 | |
5941 | return rc; | |
5942 | } | |
5943 | ||
5944 | ||
5945 | /** | |
bb8c093b | 5946 | * iwl4965_verify_ucode - determine which instruction image is in SRAM, |
b481de9c ZY |
5947 | * and verify its contents |
5948 | */ | |
bb8c093b | 5949 | static int iwl4965_verify_ucode(struct iwl4965_priv *priv) |
b481de9c ZY |
5950 | { |
5951 | __le32 *image; | |
5952 | u32 len; | |
5953 | int rc = 0; | |
5954 | ||
5955 | /* Try bootstrap */ | |
5956 | image = (__le32 *)priv->ucode_boot.v_addr; | |
5957 | len = priv->ucode_boot.len; | |
bb8c093b | 5958 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
5959 | if (rc == 0) { |
5960 | IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n"); | |
5961 | return 0; | |
5962 | } | |
5963 | ||
5964 | /* Try initialize */ | |
5965 | image = (__le32 *)priv->ucode_init.v_addr; | |
5966 | len = priv->ucode_init.len; | |
bb8c093b | 5967 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
5968 | if (rc == 0) { |
5969 | IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n"); | |
5970 | return 0; | |
5971 | } | |
5972 | ||
5973 | /* Try runtime/protocol */ | |
5974 | image = (__le32 *)priv->ucode_code.v_addr; | |
5975 | len = priv->ucode_code.len; | |
bb8c093b | 5976 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
5977 | if (rc == 0) { |
5978 | IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n"); | |
5979 | return 0; | |
5980 | } | |
5981 | ||
5982 | IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | |
5983 | ||
5984 | /* Show first several data entries in instruction SRAM. | |
5985 | * Selection of bootstrap image is arbitrary. */ | |
5986 | image = (__le32 *)priv->ucode_boot.v_addr; | |
5987 | len = priv->ucode_boot.len; | |
bb8c093b | 5988 | rc = iwl4965_verify_inst_full(priv, image, len); |
b481de9c ZY |
5989 | |
5990 | return rc; | |
5991 | } | |
5992 | ||
5993 | ||
5994 | /* check contents of special bootstrap uCode SRAM */ | |
bb8c093b | 5995 | static int iwl4965_verify_bsm(struct iwl4965_priv *priv) |
b481de9c ZY |
5996 | { |
5997 | __le32 *image = priv->ucode_boot.v_addr; | |
5998 | u32 len = priv->ucode_boot.len; | |
5999 | u32 reg; | |
6000 | u32 val; | |
6001 | ||
6002 | IWL_DEBUG_INFO("Begin verify bsm\n"); | |
6003 | ||
6004 | /* verify BSM SRAM contents */ | |
bb8c093b | 6005 | val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG); |
b481de9c ZY |
6006 | for (reg = BSM_SRAM_LOWER_BOUND; |
6007 | reg < BSM_SRAM_LOWER_BOUND + len; | |
6008 | reg += sizeof(u32), image ++) { | |
bb8c093b | 6009 | val = iwl4965_read_prph(priv, reg); |
b481de9c ZY |
6010 | if (val != le32_to_cpu(*image)) { |
6011 | IWL_ERROR("BSM uCode verification failed at " | |
6012 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | |
6013 | BSM_SRAM_LOWER_BOUND, | |
6014 | reg - BSM_SRAM_LOWER_BOUND, len, | |
6015 | val, le32_to_cpu(*image)); | |
6016 | return -EIO; | |
6017 | } | |
6018 | } | |
6019 | ||
6020 | IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n"); | |
6021 | ||
6022 | return 0; | |
6023 | } | |
6024 | ||
6025 | /** | |
bb8c093b | 6026 | * iwl4965_load_bsm - Load bootstrap instructions |
b481de9c ZY |
6027 | * |
6028 | * BSM operation: | |
6029 | * | |
6030 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | |
6031 | * in special SRAM that does not power down during RFKILL. When powering back | |
6032 | * up after power-saving sleeps (or during initial uCode load), the BSM loads | |
6033 | * the bootstrap program into the on-board processor, and starts it. | |
6034 | * | |
6035 | * The bootstrap program loads (via DMA) instructions and data for a new | |
6036 | * program from host DRAM locations indicated by the host driver in the | |
6037 | * BSM_DRAM_* registers. Once the new program is loaded, it starts | |
6038 | * automatically. | |
6039 | * | |
6040 | * When initializing the NIC, the host driver points the BSM to the | |
6041 | * "initialize" uCode image. This uCode sets up some internal data, then | |
6042 | * notifies host via "initialize alive" that it is complete. | |
6043 | * | |
6044 | * The host then replaces the BSM_DRAM_* pointer values to point to the | |
6045 | * normal runtime uCode instructions and a backup uCode data cache buffer | |
6046 | * (filled initially with starting data values for the on-board processor), | |
6047 | * then triggers the "initialize" uCode to load and launch the runtime uCode, | |
6048 | * which begins normal operation. | |
6049 | * | |
6050 | * When doing a power-save shutdown, runtime uCode saves data SRAM into | |
6051 | * the backup data cache in DRAM before SRAM is powered down. | |
6052 | * | |
6053 | * When powering back up, the BSM loads the bootstrap program. This reloads | |
6054 | * the runtime uCode instructions and the backup data cache into SRAM, | |
6055 | * and re-launches the runtime uCode from where it left off. | |
6056 | */ | |
bb8c093b | 6057 | static int iwl4965_load_bsm(struct iwl4965_priv *priv) |
b481de9c ZY |
6058 | { |
6059 | __le32 *image = priv->ucode_boot.v_addr; | |
6060 | u32 len = priv->ucode_boot.len; | |
6061 | dma_addr_t pinst; | |
6062 | dma_addr_t pdata; | |
6063 | u32 inst_len; | |
6064 | u32 data_len; | |
6065 | int rc; | |
6066 | int i; | |
6067 | u32 done; | |
6068 | u32 reg_offset; | |
6069 | ||
6070 | IWL_DEBUG_INFO("Begin load bsm\n"); | |
6071 | ||
6072 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | |
6073 | if (len > IWL_MAX_BSM_SIZE) | |
6074 | return -EINVAL; | |
6075 | ||
6076 | /* Tell bootstrap uCode where to find the "Initialize" uCode | |
6077 | * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965. | |
bb8c093b | 6078 | * NOTE: iwl4965_initialize_alive_start() will replace these values, |
b481de9c ZY |
6079 | * after the "initialize" uCode has run, to point to |
6080 | * runtime/protocol instructions and backup data cache. */ | |
6081 | pinst = priv->ucode_init.p_addr >> 4; | |
6082 | pdata = priv->ucode_init_data.p_addr >> 4; | |
6083 | inst_len = priv->ucode_init.len; | |
6084 | data_len = priv->ucode_init_data.len; | |
6085 | ||
bb8c093b | 6086 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
6087 | if (rc) |
6088 | return rc; | |
6089 | ||
bb8c093b CH |
6090 | iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
6091 | iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
6092 | iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | |
6093 | iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | |
b481de9c ZY |
6094 | |
6095 | /* Fill BSM memory with bootstrap instructions */ | |
6096 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | |
6097 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | |
6098 | reg_offset += sizeof(u32), image++) | |
bb8c093b | 6099 | _iwl4965_write_prph(priv, reg_offset, |
b481de9c ZY |
6100 | le32_to_cpu(*image)); |
6101 | ||
bb8c093b | 6102 | rc = iwl4965_verify_bsm(priv); |
b481de9c | 6103 | if (rc) { |
bb8c093b | 6104 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
6105 | return rc; |
6106 | } | |
6107 | ||
6108 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | |
bb8c093b CH |
6109 | iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
6110 | iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG, | |
b481de9c | 6111 | RTC_INST_LOWER_BOUND); |
bb8c093b | 6112 | iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
b481de9c ZY |
6113 | |
6114 | /* Load bootstrap code into instruction SRAM now, | |
6115 | * to prepare to load "initialize" uCode */ | |
bb8c093b | 6116 | iwl4965_write_prph(priv, BSM_WR_CTRL_REG, |
b481de9c ZY |
6117 | BSM_WR_CTRL_REG_BIT_START); |
6118 | ||
6119 | /* Wait for load of bootstrap uCode to finish */ | |
6120 | for (i = 0; i < 100; i++) { | |
bb8c093b | 6121 | done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG); |
b481de9c ZY |
6122 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) |
6123 | break; | |
6124 | udelay(10); | |
6125 | } | |
6126 | if (i < 100) | |
6127 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); | |
6128 | else { | |
6129 | IWL_ERROR("BSM write did not complete!\n"); | |
6130 | return -EIO; | |
6131 | } | |
6132 | ||
6133 | /* Enable future boot loads whenever power management unit triggers it | |
6134 | * (e.g. when powering back up after power-save shutdown) */ | |
bb8c093b | 6135 | iwl4965_write_prph(priv, BSM_WR_CTRL_REG, |
b481de9c ZY |
6136 | BSM_WR_CTRL_REG_BIT_START_EN); |
6137 | ||
bb8c093b | 6138 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
6139 | |
6140 | return 0; | |
6141 | } | |
6142 | ||
bb8c093b | 6143 | static void iwl4965_nic_start(struct iwl4965_priv *priv) |
b481de9c ZY |
6144 | { |
6145 | /* Remove all resets to allow NIC to operate */ | |
bb8c093b | 6146 | iwl4965_write32(priv, CSR_RESET, 0); |
b481de9c ZY |
6147 | } |
6148 | ||
6149 | /** | |
bb8c093b | 6150 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
6151 | * |
6152 | * Copy into buffers for card to fetch via bus-mastering | |
6153 | */ | |
bb8c093b | 6154 | static int iwl4965_read_ucode(struct iwl4965_priv *priv) |
b481de9c | 6155 | { |
bb8c093b | 6156 | struct iwl4965_ucode *ucode; |
b481de9c ZY |
6157 | int rc = 0; |
6158 | const struct firmware *ucode_raw; | |
6159 | const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode"; | |
6160 | u8 *src; | |
6161 | size_t len; | |
6162 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
6163 | ||
6164 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
6165 | * request_firmware() is synchronous, file is in memory on return. */ | |
6166 | rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); | |
6167 | if (rc < 0) { | |
6168 | IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc); | |
6169 | goto error; | |
6170 | } | |
6171 | ||
6172 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
6173 | name, ucode_raw->size); | |
6174 | ||
6175 | /* Make sure that we got at least our header! */ | |
6176 | if (ucode_raw->size < sizeof(*ucode)) { | |
6177 | IWL_ERROR("File size way too small!\n"); | |
6178 | rc = -EINVAL; | |
6179 | goto err_release; | |
6180 | } | |
6181 | ||
6182 | /* Data from ucode file: header followed by uCode images */ | |
6183 | ucode = (void *)ucode_raw->data; | |
6184 | ||
6185 | ver = le32_to_cpu(ucode->ver); | |
6186 | inst_size = le32_to_cpu(ucode->inst_size); | |
6187 | data_size = le32_to_cpu(ucode->data_size); | |
6188 | init_size = le32_to_cpu(ucode->init_size); | |
6189 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
6190 | boot_size = le32_to_cpu(ucode->boot_size); | |
6191 | ||
6192 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
6193 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
6194 | inst_size); | |
6195 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
6196 | data_size); | |
6197 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
6198 | init_size); | |
6199 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
6200 | init_data_size); | |
6201 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
6202 | boot_size); | |
6203 | ||
6204 | /* Verify size of file vs. image size info in file's header */ | |
6205 | if (ucode_raw->size < sizeof(*ucode) + | |
6206 | inst_size + data_size + init_size + | |
6207 | init_data_size + boot_size) { | |
6208 | ||
6209 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
6210 | (int)ucode_raw->size); | |
6211 | rc = -EINVAL; | |
6212 | goto err_release; | |
6213 | } | |
6214 | ||
6215 | /* Verify that uCode images will fit in card's SRAM */ | |
6216 | if (inst_size > IWL_MAX_INST_SIZE) { | |
6217 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n", | |
6218 | (int)inst_size); | |
6219 | rc = -EINVAL; | |
6220 | goto err_release; | |
6221 | } | |
6222 | ||
6223 | if (data_size > IWL_MAX_DATA_SIZE) { | |
6224 | IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n", | |
6225 | (int)data_size); | |
6226 | rc = -EINVAL; | |
6227 | goto err_release; | |
6228 | } | |
6229 | if (init_size > IWL_MAX_INST_SIZE) { | |
6230 | IWL_DEBUG_INFO | |
6231 | ("uCode init instr len %d too large to fit in card\n", | |
6232 | (int)init_size); | |
6233 | rc = -EINVAL; | |
6234 | goto err_release; | |
6235 | } | |
6236 | if (init_data_size > IWL_MAX_DATA_SIZE) { | |
6237 | IWL_DEBUG_INFO | |
6238 | ("uCode init data len %d too large to fit in card\n", | |
6239 | (int)init_data_size); | |
6240 | rc = -EINVAL; | |
6241 | goto err_release; | |
6242 | } | |
6243 | if (boot_size > IWL_MAX_BSM_SIZE) { | |
6244 | IWL_DEBUG_INFO | |
6245 | ("uCode boot instr len %d too large to fit in bsm\n", | |
6246 | (int)boot_size); | |
6247 | rc = -EINVAL; | |
6248 | goto err_release; | |
6249 | } | |
6250 | ||
6251 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
6252 | ||
6253 | /* Runtime instructions and 2 copies of data: | |
6254 | * 1) unmodified from disk | |
6255 | * 2) backup cache for save/restore during power-downs */ | |
6256 | priv->ucode_code.len = inst_size; | |
6257 | priv->ucode_code.v_addr = | |
6258 | pci_alloc_consistent(priv->pci_dev, | |
6259 | priv->ucode_code.len, | |
6260 | &(priv->ucode_code.p_addr)); | |
6261 | ||
6262 | priv->ucode_data.len = data_size; | |
6263 | priv->ucode_data.v_addr = | |
6264 | pci_alloc_consistent(priv->pci_dev, | |
6265 | priv->ucode_data.len, | |
6266 | &(priv->ucode_data.p_addr)); | |
6267 | ||
6268 | priv->ucode_data_backup.len = data_size; | |
6269 | priv->ucode_data_backup.v_addr = | |
6270 | pci_alloc_consistent(priv->pci_dev, | |
6271 | priv->ucode_data_backup.len, | |
6272 | &(priv->ucode_data_backup.p_addr)); | |
6273 | ||
6274 | ||
6275 | /* Initialization instructions and data */ | |
6276 | priv->ucode_init.len = init_size; | |
6277 | priv->ucode_init.v_addr = | |
6278 | pci_alloc_consistent(priv->pci_dev, | |
6279 | priv->ucode_init.len, | |
6280 | &(priv->ucode_init.p_addr)); | |
6281 | ||
6282 | priv->ucode_init_data.len = init_data_size; | |
6283 | priv->ucode_init_data.v_addr = | |
6284 | pci_alloc_consistent(priv->pci_dev, | |
6285 | priv->ucode_init_data.len, | |
6286 | &(priv->ucode_init_data.p_addr)); | |
6287 | ||
6288 | /* Bootstrap (instructions only, no data) */ | |
6289 | priv->ucode_boot.len = boot_size; | |
6290 | priv->ucode_boot.v_addr = | |
6291 | pci_alloc_consistent(priv->pci_dev, | |
6292 | priv->ucode_boot.len, | |
6293 | &(priv->ucode_boot.p_addr)); | |
6294 | ||
6295 | if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr || | |
6296 | !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr || | |
6297 | !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr) | |
6298 | goto err_pci_alloc; | |
6299 | ||
6300 | /* Copy images into buffers for card's bus-master reads ... */ | |
6301 | ||
6302 | /* Runtime instructions (first block of data in file) */ | |
6303 | src = &ucode->data[0]; | |
6304 | len = priv->ucode_code.len; | |
6305 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n", | |
6306 | (int)len); | |
6307 | memcpy(priv->ucode_code.v_addr, src, len); | |
6308 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
6309 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
6310 | ||
6311 | /* Runtime data (2nd block) | |
bb8c093b | 6312 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
6313 | src = &ucode->data[inst_size]; |
6314 | len = priv->ucode_data.len; | |
6315 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n", | |
6316 | (int)len); | |
6317 | memcpy(priv->ucode_data.v_addr, src, len); | |
6318 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
6319 | ||
6320 | /* Initialization instructions (3rd block) */ | |
6321 | if (init_size) { | |
6322 | src = &ucode->data[inst_size + data_size]; | |
6323 | len = priv->ucode_init.len; | |
6324 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n", | |
6325 | (int)len); | |
6326 | memcpy(priv->ucode_init.v_addr, src, len); | |
6327 | } | |
6328 | ||
6329 | /* Initialization data (4th block) */ | |
6330 | if (init_data_size) { | |
6331 | src = &ucode->data[inst_size + data_size + init_size]; | |
6332 | len = priv->ucode_init_data.len; | |
6333 | IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n", | |
6334 | (int)len); | |
6335 | memcpy(priv->ucode_init_data.v_addr, src, len); | |
6336 | } | |
6337 | ||
6338 | /* Bootstrap instructions (5th block) */ | |
6339 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
6340 | len = priv->ucode_boot.len; | |
6341 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n", | |
6342 | (int)len); | |
6343 | memcpy(priv->ucode_boot.v_addr, src, len); | |
6344 | ||
6345 | /* We have our copies now, allow OS release its copies */ | |
6346 | release_firmware(ucode_raw); | |
6347 | return 0; | |
6348 | ||
6349 | err_pci_alloc: | |
6350 | IWL_ERROR("failed to allocate pci memory\n"); | |
6351 | rc = -ENOMEM; | |
bb8c093b | 6352 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
6353 | |
6354 | err_release: | |
6355 | release_firmware(ucode_raw); | |
6356 | ||
6357 | error: | |
6358 | return rc; | |
6359 | } | |
6360 | ||
6361 | ||
6362 | /** | |
bb8c093b | 6363 | * iwl4965_set_ucode_ptrs - Set uCode address location |
b481de9c ZY |
6364 | * |
6365 | * Tell initialization uCode where to find runtime uCode. | |
6366 | * | |
6367 | * BSM registers initially contain pointers to initialization uCode. | |
6368 | * We need to replace them to load runtime uCode inst and data, | |
6369 | * and to save runtime data when powering down. | |
6370 | */ | |
bb8c093b | 6371 | static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv) |
b481de9c ZY |
6372 | { |
6373 | dma_addr_t pinst; | |
6374 | dma_addr_t pdata; | |
6375 | int rc = 0; | |
6376 | unsigned long flags; | |
6377 | ||
6378 | /* bits 35:4 for 4965 */ | |
6379 | pinst = priv->ucode_code.p_addr >> 4; | |
6380 | pdata = priv->ucode_data_backup.p_addr >> 4; | |
6381 | ||
6382 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 6383 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
6384 | if (rc) { |
6385 | spin_unlock_irqrestore(&priv->lock, flags); | |
6386 | return rc; | |
6387 | } | |
6388 | ||
6389 | /* Tell bootstrap uCode where to find image to load */ | |
bb8c093b CH |
6390 | iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
6391 | iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
6392 | iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
b481de9c ZY |
6393 | priv->ucode_data.len); |
6394 | ||
6395 | /* Inst bytecount must be last to set up, bit 31 signals uCode | |
6396 | * that all new ptr/size info is in place */ | |
bb8c093b | 6397 | iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
b481de9c ZY |
6398 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
6399 | ||
bb8c093b | 6400 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
6401 | |
6402 | spin_unlock_irqrestore(&priv->lock, flags); | |
6403 | ||
6404 | IWL_DEBUG_INFO("Runtime uCode pointers are set.\n"); | |
6405 | ||
6406 | return rc; | |
6407 | } | |
6408 | ||
6409 | /** | |
bb8c093b | 6410 | * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received |
b481de9c ZY |
6411 | * |
6412 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
6413 | * | |
6414 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
6415 | * Voltage, temperature, and MIMO tx gain correction, now stored in priv | |
6416 | * (3945 does not contain this data). | |
6417 | * | |
6418 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
6419 | */ | |
bb8c093b | 6420 | static void iwl4965_init_alive_start(struct iwl4965_priv *priv) |
b481de9c ZY |
6421 | { |
6422 | /* Check alive response for "valid" sign from uCode */ | |
6423 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | |
6424 | /* We had an error bringing up the hardware, so take it | |
6425 | * all the way back down so we can try again */ | |
6426 | IWL_DEBUG_INFO("Initialize Alive failed.\n"); | |
6427 | goto restart; | |
6428 | } | |
6429 | ||
6430 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
6431 | * This is a paranoid check, because we would not have gotten the | |
6432 | * "initialize" alive if code weren't properly loaded. */ | |
bb8c093b | 6433 | if (iwl4965_verify_ucode(priv)) { |
b481de9c ZY |
6434 | /* Runtime instruction load was bad; |
6435 | * take it all the way back down so we can try again */ | |
6436 | IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n"); | |
6437 | goto restart; | |
6438 | } | |
6439 | ||
6440 | /* Calculate temperature */ | |
6441 | priv->temperature = iwl4965_get_temperature(priv); | |
6442 | ||
6443 | /* Send pointers to protocol/runtime uCode image ... init code will | |
6444 | * load and launch runtime uCode, which will send us another "Alive" | |
6445 | * notification. */ | |
6446 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
bb8c093b | 6447 | if (iwl4965_set_ucode_ptrs(priv)) { |
b481de9c ZY |
6448 | /* Runtime instruction load won't happen; |
6449 | * take it all the way back down so we can try again */ | |
6450 | IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n"); | |
6451 | goto restart; | |
6452 | } | |
6453 | return; | |
6454 | ||
6455 | restart: | |
6456 | queue_work(priv->workqueue, &priv->restart); | |
6457 | } | |
6458 | ||
6459 | ||
6460 | /** | |
bb8c093b | 6461 | * iwl4965_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 6462 | * from protocol/runtime uCode (initialization uCode's |
bb8c093b | 6463 | * Alive gets handled by iwl4965_init_alive_start()). |
b481de9c | 6464 | */ |
bb8c093b | 6465 | static void iwl4965_alive_start(struct iwl4965_priv *priv) |
b481de9c ZY |
6466 | { |
6467 | int rc = 0; | |
6468 | ||
6469 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
6470 | ||
6471 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
6472 | /* We had an error bringing up the hardware, so take it | |
6473 | * all the way back down so we can try again */ | |
6474 | IWL_DEBUG_INFO("Alive failed.\n"); | |
6475 | goto restart; | |
6476 | } | |
6477 | ||
6478 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
6479 | * This is a paranoid check, because we would not have gotten the | |
6480 | * "runtime" alive if code weren't properly loaded. */ | |
bb8c093b | 6481 | if (iwl4965_verify_ucode(priv)) { |
b481de9c ZY |
6482 | /* Runtime instruction load was bad; |
6483 | * take it all the way back down so we can try again */ | |
6484 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
6485 | goto restart; | |
6486 | } | |
6487 | ||
bb8c093b | 6488 | iwl4965_clear_stations_table(priv); |
b481de9c ZY |
6489 | |
6490 | rc = iwl4965_alive_notify(priv); | |
6491 | if (rc) { | |
6492 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", | |
6493 | rc); | |
6494 | goto restart; | |
6495 | } | |
6496 | ||
6497 | /* After the ALIVE response, we can process host commands */ | |
6498 | set_bit(STATUS_ALIVE, &priv->status); | |
6499 | ||
6500 | /* Clear out the uCode error bit if it is set */ | |
6501 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
6502 | ||
bb8c093b | 6503 | rc = iwl4965_init_channel_map(priv); |
b481de9c ZY |
6504 | if (rc) { |
6505 | IWL_ERROR("initializing regulatory failed: %d\n", rc); | |
6506 | return; | |
6507 | } | |
6508 | ||
bb8c093b | 6509 | iwl4965_init_geos(priv); |
b481de9c | 6510 | |
bb8c093b | 6511 | if (iwl4965_is_rfkill(priv)) |
b481de9c ZY |
6512 | return; |
6513 | ||
6514 | if (!priv->mac80211_registered) { | |
6515 | /* Unlock so any user space entry points can call back into | |
6516 | * the driver without a deadlock... */ | |
6517 | mutex_unlock(&priv->mutex); | |
bb8c093b | 6518 | iwl4965_rate_control_register(priv->hw); |
b481de9c ZY |
6519 | rc = ieee80211_register_hw(priv->hw); |
6520 | priv->hw->conf.beacon_int = 100; | |
6521 | mutex_lock(&priv->mutex); | |
6522 | ||
6523 | if (rc) { | |
bb8c093b | 6524 | iwl4965_rate_control_unregister(priv->hw); |
b481de9c ZY |
6525 | IWL_ERROR("Failed to register network " |
6526 | "device (error %d)\n", rc); | |
6527 | return; | |
6528 | } | |
6529 | ||
6530 | priv->mac80211_registered = 1; | |
6531 | ||
bb8c093b | 6532 | iwl4965_reset_channel_flag(priv); |
b481de9c ZY |
6533 | } else |
6534 | ieee80211_start_queues(priv->hw); | |
6535 | ||
6536 | priv->active_rate = priv->rates_mask; | |
6537 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
6538 | ||
bb8c093b | 6539 | iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode)); |
b481de9c | 6540 | |
bb8c093b CH |
6541 | if (iwl4965_is_associated(priv)) { |
6542 | struct iwl4965_rxon_cmd *active_rxon = | |
6543 | (struct iwl4965_rxon_cmd *)(&priv->active_rxon); | |
b481de9c ZY |
6544 | |
6545 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
6546 | sizeof(priv->staging_rxon)); | |
6547 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
6548 | } else { | |
6549 | /* Initialize our rx_config data */ | |
bb8c093b | 6550 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
6551 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
6552 | } | |
6553 | ||
6554 | /* Configure BT coexistence */ | |
bb8c093b | 6555 | iwl4965_send_bt_config(priv); |
b481de9c ZY |
6556 | |
6557 | /* Configure the adapter for unassociated operation */ | |
bb8c093b | 6558 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6559 | |
6560 | /* At this point, the NIC is initialized and operational */ | |
6561 | priv->notif_missed_beacons = 0; | |
6562 | set_bit(STATUS_READY, &priv->status); | |
6563 | ||
6564 | iwl4965_rf_kill_ct_config(priv); | |
6565 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); | |
6566 | ||
6567 | if (priv->error_recovering) | |
bb8c093b | 6568 | iwl4965_error_recovery(priv); |
b481de9c ZY |
6569 | |
6570 | return; | |
6571 | ||
6572 | restart: | |
6573 | queue_work(priv->workqueue, &priv->restart); | |
6574 | } | |
6575 | ||
bb8c093b | 6576 | static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv); |
b481de9c | 6577 | |
bb8c093b | 6578 | static void __iwl4965_down(struct iwl4965_priv *priv) |
b481de9c ZY |
6579 | { |
6580 | unsigned long flags; | |
6581 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
6582 | struct ieee80211_conf *conf = NULL; | |
6583 | ||
6584 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
6585 | ||
6586 | conf = ieee80211_get_hw_conf(priv->hw); | |
6587 | ||
6588 | if (!exit_pending) | |
6589 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
6590 | ||
bb8c093b | 6591 | iwl4965_clear_stations_table(priv); |
b481de9c ZY |
6592 | |
6593 | /* Unblock any waiting calls */ | |
6594 | wake_up_interruptible_all(&priv->wait_command_queue); | |
6595 | ||
b481de9c ZY |
6596 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
6597 | * exiting the module */ | |
6598 | if (!exit_pending) | |
6599 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
6600 | ||
6601 | /* stop and reset the on-board processor */ | |
bb8c093b | 6602 | iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
6603 | |
6604 | /* tell the device to stop sending interrupts */ | |
bb8c093b | 6605 | iwl4965_disable_interrupts(priv); |
b481de9c ZY |
6606 | |
6607 | if (priv->mac80211_registered) | |
6608 | ieee80211_stop_queues(priv->hw); | |
6609 | ||
bb8c093b | 6610 | /* If we have not previously called iwl4965_init() then |
b481de9c | 6611 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
bb8c093b | 6612 | if (!iwl4965_is_init(priv)) { |
b481de9c ZY |
6613 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
6614 | STATUS_RF_KILL_HW | | |
6615 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
6616 | STATUS_RF_KILL_SW | | |
6617 | test_bit(STATUS_IN_SUSPEND, &priv->status) << | |
6618 | STATUS_IN_SUSPEND; | |
6619 | goto exit; | |
6620 | } | |
6621 | ||
6622 | /* ...otherwise clear out all the status bits but the RF Kill and | |
6623 | * SUSPEND bits and continue taking the NIC down. */ | |
6624 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
6625 | STATUS_RF_KILL_HW | | |
6626 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
6627 | STATUS_RF_KILL_SW | | |
6628 | test_bit(STATUS_IN_SUSPEND, &priv->status) << | |
6629 | STATUS_IN_SUSPEND | | |
6630 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
6631 | STATUS_FW_ERROR; | |
6632 | ||
6633 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 6634 | iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
6635 | spin_unlock_irqrestore(&priv->lock, flags); |
6636 | ||
bb8c093b CH |
6637 | iwl4965_hw_txq_ctx_stop(priv); |
6638 | iwl4965_hw_rxq_stop(priv); | |
b481de9c ZY |
6639 | |
6640 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b CH |
6641 | if (!iwl4965_grab_nic_access(priv)) { |
6642 | iwl4965_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 6643 | APMG_CLK_VAL_DMA_CLK_RQT); |
bb8c093b | 6644 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
6645 | } |
6646 | spin_unlock_irqrestore(&priv->lock, flags); | |
6647 | ||
6648 | udelay(5); | |
6649 | ||
bb8c093b CH |
6650 | iwl4965_hw_nic_stop_master(priv); |
6651 | iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); | |
6652 | iwl4965_hw_nic_reset(priv); | |
b481de9c ZY |
6653 | |
6654 | exit: | |
bb8c093b | 6655 | memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
6656 | |
6657 | if (priv->ibss_beacon) | |
6658 | dev_kfree_skb(priv->ibss_beacon); | |
6659 | priv->ibss_beacon = NULL; | |
6660 | ||
6661 | /* clear out any free frames */ | |
bb8c093b | 6662 | iwl4965_clear_free_frames(priv); |
b481de9c ZY |
6663 | } |
6664 | ||
bb8c093b | 6665 | static void iwl4965_down(struct iwl4965_priv *priv) |
b481de9c ZY |
6666 | { |
6667 | mutex_lock(&priv->mutex); | |
bb8c093b | 6668 | __iwl4965_down(priv); |
b481de9c | 6669 | mutex_unlock(&priv->mutex); |
b24d22b1 | 6670 | |
bb8c093b | 6671 | iwl4965_cancel_deferred_work(priv); |
b481de9c ZY |
6672 | } |
6673 | ||
6674 | #define MAX_HW_RESTARTS 5 | |
6675 | ||
bb8c093b | 6676 | static int __iwl4965_up(struct iwl4965_priv *priv) |
b481de9c | 6677 | { |
0795af57 | 6678 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
6679 | int rc, i; |
6680 | u32 hw_rf_kill = 0; | |
6681 | ||
6682 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
6683 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
6684 | return -EIO; | |
6685 | } | |
6686 | ||
6687 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | |
6688 | IWL_WARNING("Radio disabled by SW RF kill (module " | |
6689 | "parameter)\n"); | |
6690 | return 0; | |
6691 | } | |
6692 | ||
a781cf94 RC |
6693 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
6694 | IWL_ERROR("ucode not available for device bringup\n"); | |
6695 | return -EIO; | |
6696 | } | |
6697 | ||
bb8c093b | 6698 | iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 6699 | |
bb8c093b | 6700 | rc = iwl4965_hw_nic_init(priv); |
b481de9c ZY |
6701 | if (rc) { |
6702 | IWL_ERROR("Unable to int nic\n"); | |
6703 | return rc; | |
6704 | } | |
6705 | ||
6706 | /* make sure rfkill handshake bits are cleared */ | |
bb8c093b CH |
6707 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
6708 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
6709 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
6710 | ||
6711 | /* clear (again), then enable host interrupts */ | |
bb8c093b CH |
6712 | iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); |
6713 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
6714 | |
6715 | /* really make sure rfkill handshake bits are cleared */ | |
bb8c093b CH |
6716 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
6717 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
6718 | |
6719 | /* Copy original ucode data image from disk into backup cache. | |
6720 | * This will be used to initialize the on-board processor's | |
6721 | * data SRAM for a clean start when the runtime program first loads. */ | |
6722 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
6723 | priv->ucode_data.len); | |
6724 | ||
6725 | /* If platform's RF_KILL switch is set to KILL, | |
6726 | * wait for BIT_INT_RF_KILL interrupt before loading uCode | |
6727 | * and getting things started */ | |
bb8c093b | 6728 | if (!(iwl4965_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
6729 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
6730 | hw_rf_kill = 1; | |
6731 | ||
6732 | if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) { | |
6733 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); | |
6734 | return 0; | |
6735 | } | |
6736 | ||
6737 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
6738 | ||
bb8c093b | 6739 | iwl4965_clear_stations_table(priv); |
b481de9c ZY |
6740 | |
6741 | /* load bootstrap state machine, | |
6742 | * load bootstrap program into processor's memory, | |
6743 | * prepare to load the "initialize" uCode */ | |
bb8c093b | 6744 | rc = iwl4965_load_bsm(priv); |
b481de9c ZY |
6745 | |
6746 | if (rc) { | |
6747 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc); | |
6748 | continue; | |
6749 | } | |
6750 | ||
6751 | /* start card; "initialize" will load runtime ucode */ | |
bb8c093b | 6752 | iwl4965_nic_start(priv); |
b481de9c ZY |
6753 | |
6754 | /* MAC Address location in EEPROM same for 3945/4965 */ | |
6755 | get_eeprom_mac(priv, priv->mac_addr); | |
0795af57 JP |
6756 | IWL_DEBUG_INFO("MAC address: %s\n", |
6757 | print_mac(mac, priv->mac_addr)); | |
b481de9c ZY |
6758 | |
6759 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
6760 | ||
6761 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); | |
6762 | ||
6763 | return 0; | |
6764 | } | |
6765 | ||
6766 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 6767 | __iwl4965_down(priv); |
b481de9c ZY |
6768 | |
6769 | /* tried to restart and config the device for as long as our | |
6770 | * patience could withstand */ | |
6771 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
6772 | return -EIO; | |
6773 | } | |
6774 | ||
6775 | ||
6776 | /***************************************************************************** | |
6777 | * | |
6778 | * Workqueue callbacks | |
6779 | * | |
6780 | *****************************************************************************/ | |
6781 | ||
bb8c093b | 6782 | static void iwl4965_bg_init_alive_start(struct work_struct *data) |
b481de9c | 6783 | { |
bb8c093b CH |
6784 | struct iwl4965_priv *priv = |
6785 | container_of(data, struct iwl4965_priv, init_alive_start.work); | |
b481de9c ZY |
6786 | |
6787 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6788 | return; | |
6789 | ||
6790 | mutex_lock(&priv->mutex); | |
bb8c093b | 6791 | iwl4965_init_alive_start(priv); |
b481de9c ZY |
6792 | mutex_unlock(&priv->mutex); |
6793 | } | |
6794 | ||
bb8c093b | 6795 | static void iwl4965_bg_alive_start(struct work_struct *data) |
b481de9c | 6796 | { |
bb8c093b CH |
6797 | struct iwl4965_priv *priv = |
6798 | container_of(data, struct iwl4965_priv, alive_start.work); | |
b481de9c ZY |
6799 | |
6800 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6801 | return; | |
6802 | ||
6803 | mutex_lock(&priv->mutex); | |
bb8c093b | 6804 | iwl4965_alive_start(priv); |
b481de9c ZY |
6805 | mutex_unlock(&priv->mutex); |
6806 | } | |
6807 | ||
bb8c093b | 6808 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 6809 | { |
bb8c093b | 6810 | struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill); |
b481de9c ZY |
6811 | |
6812 | wake_up_interruptible(&priv->wait_command_queue); | |
6813 | ||
6814 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6815 | return; | |
6816 | ||
6817 | mutex_lock(&priv->mutex); | |
6818 | ||
bb8c093b | 6819 | if (!iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
6820 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL, |
6821 | "HW and/or SW RF Kill no longer active, restarting " | |
6822 | "device\n"); | |
6823 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6824 | queue_work(priv->workqueue, &priv->restart); | |
6825 | } else { | |
6826 | ||
6827 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
6828 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
6829 | "disabled by SW switch\n"); | |
6830 | else | |
6831 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
6832 | "Kill switch must be turned off for " | |
6833 | "wireless networking to work.\n"); | |
6834 | } | |
6835 | mutex_unlock(&priv->mutex); | |
6836 | } | |
6837 | ||
6838 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | |
6839 | ||
bb8c093b | 6840 | static void iwl4965_bg_scan_check(struct work_struct *data) |
b481de9c | 6841 | { |
bb8c093b CH |
6842 | struct iwl4965_priv *priv = |
6843 | container_of(data, struct iwl4965_priv, scan_check.work); | |
b481de9c ZY |
6844 | |
6845 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6846 | return; | |
6847 | ||
6848 | mutex_lock(&priv->mutex); | |
6849 | if (test_bit(STATUS_SCANNING, &priv->status) || | |
6850 | test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
6851 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, | |
6852 | "Scan completion watchdog resetting adapter (%dms)\n", | |
6853 | jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG)); | |
052c4b9f | 6854 | |
b481de9c | 6855 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) |
bb8c093b | 6856 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
6857 | } |
6858 | mutex_unlock(&priv->mutex); | |
6859 | } | |
6860 | ||
bb8c093b | 6861 | static void iwl4965_bg_request_scan(struct work_struct *data) |
b481de9c | 6862 | { |
bb8c093b CH |
6863 | struct iwl4965_priv *priv = |
6864 | container_of(data, struct iwl4965_priv, request_scan); | |
6865 | struct iwl4965_host_cmd cmd = { | |
b481de9c | 6866 | .id = REPLY_SCAN_CMD, |
bb8c093b | 6867 | .len = sizeof(struct iwl4965_scan_cmd), |
b481de9c ZY |
6868 | .meta.flags = CMD_SIZE_HUGE, |
6869 | }; | |
6870 | int rc = 0; | |
bb8c093b | 6871 | struct iwl4965_scan_cmd *scan; |
b481de9c ZY |
6872 | struct ieee80211_conf *conf = NULL; |
6873 | u8 direct_mask; | |
6874 | int phymode; | |
6875 | ||
6876 | conf = ieee80211_get_hw_conf(priv->hw); | |
6877 | ||
6878 | mutex_lock(&priv->mutex); | |
6879 | ||
bb8c093b | 6880 | if (!iwl4965_is_ready(priv)) { |
b481de9c ZY |
6881 | IWL_WARNING("request scan called when driver not ready.\n"); |
6882 | goto done; | |
6883 | } | |
6884 | ||
6885 | /* Make sure the scan wasn't cancelled before this queued work | |
6886 | * was given the chance to run... */ | |
6887 | if (!test_bit(STATUS_SCANNING, &priv->status)) | |
6888 | goto done; | |
6889 | ||
6890 | /* This should never be called or scheduled if there is currently | |
6891 | * a scan active in the hardware. */ | |
6892 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | |
6893 | IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. " | |
6894 | "Ignoring second request.\n"); | |
6895 | rc = -EIO; | |
6896 | goto done; | |
6897 | } | |
6898 | ||
6899 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
6900 | IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n"); | |
6901 | goto done; | |
6902 | } | |
6903 | ||
6904 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
6905 | IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n"); | |
6906 | goto done; | |
6907 | } | |
6908 | ||
bb8c093b | 6909 | if (iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
6910 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); |
6911 | goto done; | |
6912 | } | |
6913 | ||
6914 | if (!test_bit(STATUS_READY, &priv->status)) { | |
6915 | IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n"); | |
6916 | goto done; | |
6917 | } | |
6918 | ||
6919 | if (!priv->scan_bands) { | |
6920 | IWL_DEBUG_HC("Aborting scan due to no requested bands\n"); | |
6921 | goto done; | |
6922 | } | |
6923 | ||
6924 | if (!priv->scan) { | |
bb8c093b | 6925 | priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) + |
b481de9c ZY |
6926 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); |
6927 | if (!priv->scan) { | |
6928 | rc = -ENOMEM; | |
6929 | goto done; | |
6930 | } | |
6931 | } | |
6932 | scan = priv->scan; | |
bb8c093b | 6933 | memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE); |
b481de9c ZY |
6934 | |
6935 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | |
6936 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | |
6937 | ||
bb8c093b | 6938 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
6939 | u16 interval = 0; |
6940 | u32 extra; | |
6941 | u32 suspend_time = 100; | |
6942 | u32 scan_suspend_time = 100; | |
6943 | unsigned long flags; | |
6944 | ||
6945 | IWL_DEBUG_INFO("Scanning while associated...\n"); | |
6946 | ||
6947 | spin_lock_irqsave(&priv->lock, flags); | |
6948 | interval = priv->beacon_int; | |
6949 | spin_unlock_irqrestore(&priv->lock, flags); | |
6950 | ||
6951 | scan->suspend_time = 0; | |
052c4b9f | 6952 | scan->max_out_time = cpu_to_le32(200 * 1024); |
b481de9c ZY |
6953 | if (!interval) |
6954 | interval = suspend_time; | |
6955 | ||
6956 | extra = (suspend_time / interval) << 22; | |
6957 | scan_suspend_time = (extra | | |
6958 | ((suspend_time % interval) * 1024)); | |
6959 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | |
6960 | IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n", | |
6961 | scan_suspend_time, interval); | |
6962 | } | |
6963 | ||
6964 | /* We should add the ability for user to lock to PASSIVE ONLY */ | |
6965 | if (priv->one_direct_scan) { | |
6966 | IWL_DEBUG_SCAN | |
6967 | ("Kicking off one direct scan for '%s'\n", | |
bb8c093b | 6968 | iwl4965_escape_essid(priv->direct_ssid, |
b481de9c ZY |
6969 | priv->direct_ssid_len)); |
6970 | scan->direct_scan[0].id = WLAN_EID_SSID; | |
6971 | scan->direct_scan[0].len = priv->direct_ssid_len; | |
6972 | memcpy(scan->direct_scan[0].ssid, | |
6973 | priv->direct_ssid, priv->direct_ssid_len); | |
6974 | direct_mask = 1; | |
bb8c093b | 6975 | } else if (!iwl4965_is_associated(priv) && priv->essid_len) { |
b481de9c ZY |
6976 | scan->direct_scan[0].id = WLAN_EID_SSID; |
6977 | scan->direct_scan[0].len = priv->essid_len; | |
6978 | memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len); | |
6979 | direct_mask = 1; | |
6980 | } else | |
6981 | direct_mask = 0; | |
6982 | ||
6983 | /* We don't build a direct scan probe request; the uCode will do | |
6984 | * that based on the direct_mask added to each channel entry */ | |
6985 | scan->tx_cmd.len = cpu_to_le16( | |
bb8c093b | 6986 | iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data, |
b481de9c ZY |
6987 | IWL_MAX_SCAN_SIZE - sizeof(scan), 0)); |
6988 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; | |
6989 | scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id; | |
6990 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
6991 | ||
6992 | /* flags + rate selection */ | |
6993 | ||
6994 | scan->tx_cmd.tx_flags |= cpu_to_le32(0x200); | |
6995 | ||
6996 | switch (priv->scan_bands) { | |
6997 | case 2: | |
6998 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | |
6999 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 7000 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, |
b481de9c ZY |
7001 | RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK); |
7002 | ||
7003 | scan->good_CRC_th = 0; | |
7004 | phymode = MODE_IEEE80211G; | |
7005 | break; | |
7006 | ||
7007 | case 1: | |
7008 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 7009 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, |
b481de9c ZY |
7010 | RATE_MCS_ANT_B_MSK); |
7011 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | |
7012 | phymode = MODE_IEEE80211A; | |
7013 | break; | |
7014 | ||
7015 | default: | |
7016 | IWL_WARNING("Invalid scan band count\n"); | |
7017 | goto done; | |
7018 | } | |
7019 | ||
7020 | /* select Rx chains */ | |
7021 | ||
7022 | /* Force use of chains B and C (0x6) for scan Rx. | |
7023 | * Avoid A (0x1) because of its off-channel reception on A-band. | |
7024 | * MIMO is not used here, but value is required to make uCode happy. */ | |
7025 | scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK | | |
7026 | cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) | | |
7027 | (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) | | |
7028 | (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS)); | |
7029 | ||
7030 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) | |
7031 | scan->filter_flags = RXON_FILTER_PROMISC_MSK; | |
7032 | ||
7033 | if (direct_mask) | |
7034 | IWL_DEBUG_SCAN | |
7035 | ("Initiating direct scan for %s.\n", | |
bb8c093b | 7036 | iwl4965_escape_essid(priv->essid, priv->essid_len)); |
b481de9c ZY |
7037 | else |
7038 | IWL_DEBUG_SCAN("Initiating indirect scan.\n"); | |
7039 | ||
7040 | scan->channel_count = | |
bb8c093b | 7041 | iwl4965_get_channels_for_scan( |
b481de9c ZY |
7042 | priv, phymode, 1, /* active */ |
7043 | direct_mask, | |
7044 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
7045 | ||
7046 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + | |
bb8c093b | 7047 | scan->channel_count * sizeof(struct iwl4965_scan_channel); |
b481de9c ZY |
7048 | cmd.data = scan; |
7049 | scan->len = cpu_to_le16(cmd.len); | |
7050 | ||
7051 | set_bit(STATUS_SCAN_HW, &priv->status); | |
bb8c093b | 7052 | rc = iwl4965_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
7053 | if (rc) |
7054 | goto done; | |
7055 | ||
7056 | queue_delayed_work(priv->workqueue, &priv->scan_check, | |
7057 | IWL_SCAN_CHECK_WATCHDOG); | |
7058 | ||
7059 | mutex_unlock(&priv->mutex); | |
7060 | return; | |
7061 | ||
7062 | done: | |
01ebd063 | 7063 | /* inform mac80211 scan aborted */ |
b481de9c ZY |
7064 | queue_work(priv->workqueue, &priv->scan_completed); |
7065 | mutex_unlock(&priv->mutex); | |
7066 | } | |
7067 | ||
bb8c093b | 7068 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 7069 | { |
bb8c093b | 7070 | struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up); |
b481de9c ZY |
7071 | |
7072 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
7073 | return; | |
7074 | ||
7075 | mutex_lock(&priv->mutex); | |
bb8c093b | 7076 | __iwl4965_up(priv); |
b481de9c ZY |
7077 | mutex_unlock(&priv->mutex); |
7078 | } | |
7079 | ||
bb8c093b | 7080 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 7081 | { |
bb8c093b | 7082 | struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart); |
b481de9c ZY |
7083 | |
7084 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
7085 | return; | |
7086 | ||
bb8c093b | 7087 | iwl4965_down(priv); |
b481de9c ZY |
7088 | queue_work(priv->workqueue, &priv->up); |
7089 | } | |
7090 | ||
bb8c093b | 7091 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 7092 | { |
bb8c093b CH |
7093 | struct iwl4965_priv *priv = |
7094 | container_of(data, struct iwl4965_priv, rx_replenish); | |
b481de9c ZY |
7095 | |
7096 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
7097 | return; | |
7098 | ||
7099 | mutex_lock(&priv->mutex); | |
bb8c093b | 7100 | iwl4965_rx_replenish(priv); |
b481de9c ZY |
7101 | mutex_unlock(&priv->mutex); |
7102 | } | |
7103 | ||
bb8c093b | 7104 | static void iwl4965_bg_post_associate(struct work_struct *data) |
b481de9c | 7105 | { |
bb8c093b | 7106 | struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, |
b481de9c ZY |
7107 | post_associate.work); |
7108 | ||
7109 | int rc = 0; | |
7110 | struct ieee80211_conf *conf = NULL; | |
0795af57 | 7111 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
7112 | |
7113 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
7114 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
7115 | return; | |
7116 | } | |
7117 | ||
0795af57 JP |
7118 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
7119 | priv->assoc_id, | |
7120 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
7121 | |
7122 | ||
7123 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
7124 | return; | |
7125 | ||
7126 | mutex_lock(&priv->mutex); | |
7127 | ||
948c171c MA |
7128 | if (!priv->interface_id || !priv->is_open) { |
7129 | mutex_unlock(&priv->mutex); | |
7130 | return; | |
7131 | } | |
bb8c093b | 7132 | iwl4965_scan_cancel_timeout(priv, 200); |
052c4b9f | 7133 | |
b481de9c ZY |
7134 | conf = ieee80211_get_hw_conf(priv->hw); |
7135 | ||
7136 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 7137 | iwl4965_commit_rxon(priv); |
b481de9c | 7138 | |
bb8c093b CH |
7139 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
7140 | iwl4965_setup_rxon_timing(priv); | |
7141 | rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING, | |
b481de9c ZY |
7142 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
7143 | if (rc) | |
7144 | IWL_WARNING("REPLY_RXON_TIMING failed - " | |
7145 | "Attempting to continue.\n"); | |
7146 | ||
7147 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
7148 | ||
c8b0e6e1 | 7149 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
7150 | if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht) |
7151 | iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht); | |
7152 | else { | |
7153 | priv->active_rate_ht[0] = 0; | |
7154 | priv->active_rate_ht[1] = 0; | |
7155 | priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ; | |
7156 | } | |
c8b0e6e1 | 7157 | #endif /* CONFIG_IWL4965_HT*/ |
b481de9c ZY |
7158 | iwl4965_set_rxon_chain(priv); |
7159 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
7160 | ||
7161 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
7162 | priv->assoc_id, priv->beacon_int); | |
7163 | ||
7164 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
7165 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
7166 | else | |
7167 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
7168 | ||
7169 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
7170 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
7171 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
7172 | else | |
7173 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
7174 | ||
7175 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
7176 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
7177 | ||
7178 | } | |
7179 | ||
bb8c093b | 7180 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
7181 | |
7182 | switch (priv->iw_mode) { | |
7183 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 7184 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
7185 | break; |
7186 | ||
7187 | case IEEE80211_IF_TYPE_IBSS: | |
7188 | ||
7189 | /* clear out the station table */ | |
bb8c093b | 7190 | iwl4965_clear_stations_table(priv); |
b481de9c | 7191 | |
bb8c093b CH |
7192 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
7193 | iwl4965_rxon_add_station(priv, priv->bssid, 0); | |
7194 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); | |
7195 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
7196 | |
7197 | break; | |
7198 | ||
7199 | default: | |
7200 | IWL_ERROR("%s Should not be called in %d mode\n", | |
7201 | __FUNCTION__, priv->iw_mode); | |
7202 | break; | |
7203 | } | |
7204 | ||
bb8c093b | 7205 | iwl4965_sequence_reset(priv); |
b481de9c | 7206 | |
c8b0e6e1 | 7207 | #ifdef CONFIG_IWL4965_SENSITIVITY |
b481de9c ZY |
7208 | /* Enable Rx differential gain and sensitivity calibrations */ |
7209 | iwl4965_chain_noise_reset(priv); | |
7210 | priv->start_calib = 1; | |
c8b0e6e1 | 7211 | #endif /* CONFIG_IWL4965_SENSITIVITY */ |
b481de9c ZY |
7212 | |
7213 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
7214 | priv->assoc_station_added = 1; | |
7215 | ||
c8b0e6e1 | 7216 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b | 7217 | iwl4965_activate_qos(priv, 0); |
c8b0e6e1 | 7218 | #endif /* CONFIG_IWL4965_QOS */ |
b481de9c ZY |
7219 | mutex_unlock(&priv->mutex); |
7220 | } | |
7221 | ||
bb8c093b | 7222 | static void iwl4965_bg_abort_scan(struct work_struct *work) |
b481de9c | 7223 | { |
bb8c093b | 7224 | struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan); |
b481de9c | 7225 | |
bb8c093b | 7226 | if (!iwl4965_is_ready(priv)) |
b481de9c ZY |
7227 | return; |
7228 | ||
7229 | mutex_lock(&priv->mutex); | |
7230 | ||
7231 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
bb8c093b | 7232 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
7233 | |
7234 | mutex_unlock(&priv->mutex); | |
7235 | } | |
7236 | ||
bb8c093b | 7237 | static void iwl4965_bg_scan_completed(struct work_struct *work) |
b481de9c | 7238 | { |
bb8c093b CH |
7239 | struct iwl4965_priv *priv = |
7240 | container_of(work, struct iwl4965_priv, scan_completed); | |
b481de9c ZY |
7241 | |
7242 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n"); | |
7243 | ||
7244 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
7245 | return; | |
7246 | ||
7247 | ieee80211_scan_completed(priv->hw); | |
7248 | ||
7249 | /* Since setting the TXPOWER may have been deferred while | |
7250 | * performing the scan, fire one off */ | |
7251 | mutex_lock(&priv->mutex); | |
bb8c093b | 7252 | iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
7253 | mutex_unlock(&priv->mutex); |
7254 | } | |
7255 | ||
7256 | /***************************************************************************** | |
7257 | * | |
7258 | * mac80211 entry point functions | |
7259 | * | |
7260 | *****************************************************************************/ | |
7261 | ||
bb8c093b | 7262 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 7263 | { |
bb8c093b | 7264 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7265 | |
7266 | IWL_DEBUG_MAC80211("enter\n"); | |
7267 | ||
7268 | /* we should be verifying the device is ready to be opened */ | |
7269 | mutex_lock(&priv->mutex); | |
7270 | ||
7271 | priv->is_open = 1; | |
7272 | ||
bb8c093b | 7273 | if (!iwl4965_is_rfkill(priv)) |
b481de9c ZY |
7274 | ieee80211_start_queues(priv->hw); |
7275 | ||
7276 | mutex_unlock(&priv->mutex); | |
7277 | IWL_DEBUG_MAC80211("leave\n"); | |
7278 | return 0; | |
7279 | } | |
7280 | ||
bb8c093b | 7281 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 7282 | { |
bb8c093b | 7283 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7284 | |
7285 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c MA |
7286 | |
7287 | ||
7288 | mutex_lock(&priv->mutex); | |
7289 | /* stop mac, cancel any scan request and clear | |
7290 | * RXON_FILTER_ASSOC_MSK BIT | |
7291 | */ | |
b481de9c | 7292 | priv->is_open = 0; |
bb8c093b | 7293 | iwl4965_scan_cancel_timeout(priv, 100); |
948c171c MA |
7294 | cancel_delayed_work(&priv->post_associate); |
7295 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 7296 | iwl4965_commit_rxon(priv); |
948c171c MA |
7297 | mutex_unlock(&priv->mutex); |
7298 | ||
b481de9c | 7299 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
7300 | } |
7301 | ||
bb8c093b | 7302 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
7303 | struct ieee80211_tx_control *ctl) |
7304 | { | |
bb8c093b | 7305 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7306 | |
7307 | IWL_DEBUG_MAC80211("enter\n"); | |
7308 | ||
7309 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
7310 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
7311 | return -1; | |
7312 | } | |
7313 | ||
7314 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
7315 | ctl->tx_rate); | |
7316 | ||
bb8c093b | 7317 | if (iwl4965_tx_skb(priv, skb, ctl)) |
b481de9c ZY |
7318 | dev_kfree_skb_any(skb); |
7319 | ||
7320 | IWL_DEBUG_MAC80211("leave\n"); | |
7321 | return 0; | |
7322 | } | |
7323 | ||
bb8c093b | 7324 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
7325 | struct ieee80211_if_init_conf *conf) |
7326 | { | |
bb8c093b | 7327 | struct iwl4965_priv *priv = hw->priv; |
b481de9c | 7328 | unsigned long flags; |
0795af57 | 7329 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
7330 | |
7331 | IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type); | |
b481de9c ZY |
7332 | |
7333 | if (priv->interface_id) { | |
7334 | IWL_DEBUG_MAC80211("leave - interface_id != 0\n"); | |
7335 | return 0; | |
7336 | } | |
7337 | ||
7338 | spin_lock_irqsave(&priv->lock, flags); | |
7339 | priv->interface_id = conf->if_id; | |
7340 | ||
7341 | spin_unlock_irqrestore(&priv->lock, flags); | |
7342 | ||
7343 | mutex_lock(&priv->mutex); | |
864792e3 TW |
7344 | |
7345 | if (conf->mac_addr) { | |
7346 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
7347 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
7348 | } | |
bb8c093b | 7349 | iwl4965_set_mode(priv, conf->type); |
b481de9c ZY |
7350 | |
7351 | IWL_DEBUG_MAC80211("leave\n"); | |
7352 | mutex_unlock(&priv->mutex); | |
7353 | ||
7354 | return 0; | |
7355 | } | |
7356 | ||
7357 | /** | |
bb8c093b | 7358 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
7359 | * |
7360 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
7361 | * be set inappropriately and the driver currently sets the hardware up to | |
7362 | * use it whenever needed. | |
7363 | */ | |
bb8c093b | 7364 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 7365 | { |
bb8c093b CH |
7366 | struct iwl4965_priv *priv = hw->priv; |
7367 | const struct iwl4965_channel_info *ch_info; | |
b481de9c ZY |
7368 | unsigned long flags; |
7369 | ||
7370 | mutex_lock(&priv->mutex); | |
7371 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel); | |
7372 | ||
bb8c093b | 7373 | if (!iwl4965_is_ready(priv)) { |
b481de9c ZY |
7374 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
7375 | mutex_unlock(&priv->mutex); | |
7376 | return -EIO; | |
7377 | } | |
7378 | ||
7379 | /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only | |
01ebd063 | 7380 | * what is exposed through include/ declarations */ |
bb8c093b | 7381 | if (unlikely(!iwl4965_param_disable_hw_scan && |
b481de9c ZY |
7382 | test_bit(STATUS_SCANNING, &priv->status))) { |
7383 | IWL_DEBUG_MAC80211("leave - scanning\n"); | |
7384 | mutex_unlock(&priv->mutex); | |
7385 | return 0; | |
7386 | } | |
7387 | ||
7388 | spin_lock_irqsave(&priv->lock, flags); | |
7389 | ||
bb8c093b | 7390 | ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel); |
b481de9c ZY |
7391 | if (!is_channel_valid(ch_info)) { |
7392 | IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n", | |
7393 | conf->channel, conf->phymode); | |
7394 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); | |
7395 | spin_unlock_irqrestore(&priv->lock, flags); | |
7396 | mutex_unlock(&priv->mutex); | |
7397 | return -EINVAL; | |
7398 | } | |
7399 | ||
c8b0e6e1 | 7400 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
7401 | /* if we are switching fron ht to 2.4 clear flags |
7402 | * from any ht related info since 2.4 does not | |
7403 | * support ht */ | |
7404 | if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel) | |
7405 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
7406 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
7407 | #endif | |
7408 | ) | |
7409 | priv->staging_rxon.flags = 0; | |
c8b0e6e1 | 7410 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 7411 | |
bb8c093b | 7412 | iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel); |
b481de9c | 7413 | |
bb8c093b | 7414 | iwl4965_set_flags_for_phymode(priv, conf->phymode); |
b481de9c ZY |
7415 | |
7416 | /* The list of supported rates and rate mask can be different | |
7417 | * for each phymode; since the phymode may have changed, reset | |
7418 | * the rate mask to what mac80211 lists */ | |
bb8c093b | 7419 | iwl4965_set_rate(priv); |
b481de9c ZY |
7420 | |
7421 | spin_unlock_irqrestore(&priv->lock, flags); | |
7422 | ||
7423 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
7424 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 7425 | iwl4965_hw_channel_switch(priv, conf->channel); |
b481de9c ZY |
7426 | mutex_unlock(&priv->mutex); |
7427 | return 0; | |
7428 | } | |
7429 | #endif | |
7430 | ||
bb8c093b | 7431 | iwl4965_radio_kill_sw(priv, !conf->radio_enabled); |
b481de9c ZY |
7432 | |
7433 | if (!conf->radio_enabled) { | |
7434 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
7435 | mutex_unlock(&priv->mutex); | |
7436 | return 0; | |
7437 | } | |
7438 | ||
bb8c093b | 7439 | if (iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
7440 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
7441 | mutex_unlock(&priv->mutex); | |
7442 | return -EIO; | |
7443 | } | |
7444 | ||
bb8c093b | 7445 | iwl4965_set_rate(priv); |
b481de9c ZY |
7446 | |
7447 | if (memcmp(&priv->active_rxon, | |
7448 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 7449 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
7450 | else |
7451 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
7452 | ||
7453 | IWL_DEBUG_MAC80211("leave\n"); | |
7454 | ||
7455 | mutex_unlock(&priv->mutex); | |
7456 | ||
7457 | return 0; | |
7458 | } | |
7459 | ||
bb8c093b | 7460 | static void iwl4965_config_ap(struct iwl4965_priv *priv) |
b481de9c ZY |
7461 | { |
7462 | int rc = 0; | |
7463 | ||
7464 | if (priv->status & STATUS_EXIT_PENDING) | |
7465 | return; | |
7466 | ||
7467 | /* The following should be done only at AP bring up */ | |
7468 | if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) { | |
7469 | ||
7470 | /* RXON - unassoc (to set timing command) */ | |
7471 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 7472 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
7473 | |
7474 | /* RXON Timing */ | |
bb8c093b CH |
7475 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
7476 | iwl4965_setup_rxon_timing(priv); | |
7477 | rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING, | |
b481de9c ZY |
7478 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
7479 | if (rc) | |
7480 | IWL_WARNING("REPLY_RXON_TIMING failed - " | |
7481 | "Attempting to continue.\n"); | |
7482 | ||
7483 | iwl4965_set_rxon_chain(priv); | |
7484 | ||
7485 | /* FIXME: what should be the assoc_id for AP? */ | |
7486 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
7487 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
7488 | priv->staging_rxon.flags |= | |
7489 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
7490 | else | |
7491 | priv->staging_rxon.flags &= | |
7492 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
7493 | ||
7494 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
7495 | if (priv->assoc_capability & | |
7496 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
7497 | priv->staging_rxon.flags |= | |
7498 | RXON_FLG_SHORT_SLOT_MSK; | |
7499 | else | |
7500 | priv->staging_rxon.flags &= | |
7501 | ~RXON_FLG_SHORT_SLOT_MSK; | |
7502 | ||
7503 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
7504 | priv->staging_rxon.flags &= | |
7505 | ~RXON_FLG_SHORT_SLOT_MSK; | |
7506 | } | |
7507 | /* restore RXON assoc */ | |
7508 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 7509 | iwl4965_commit_rxon(priv); |
c8b0e6e1 | 7510 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b | 7511 | iwl4965_activate_qos(priv, 1); |
b481de9c | 7512 | #endif |
bb8c093b | 7513 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
e1493deb | 7514 | } |
bb8c093b | 7515 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
7516 | |
7517 | /* FIXME - we need to add code here to detect a totally new | |
7518 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
7519 | * clear sta table, add BCAST sta... */ | |
7520 | } | |
7521 | ||
bb8c093b | 7522 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id, |
b481de9c ZY |
7523 | struct ieee80211_if_conf *conf) |
7524 | { | |
bb8c093b | 7525 | struct iwl4965_priv *priv = hw->priv; |
0795af57 | 7526 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
7527 | unsigned long flags; |
7528 | int rc; | |
7529 | ||
7530 | if (conf == NULL) | |
7531 | return -EIO; | |
7532 | ||
7533 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
7534 | (!conf->beacon || !conf->ssid_len)) { | |
7535 | IWL_DEBUG_MAC80211 | |
7536 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
7537 | return 0; | |
7538 | } | |
7539 | ||
7540 | mutex_lock(&priv->mutex); | |
7541 | ||
7542 | IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id); | |
7543 | if (conf->bssid) | |
0795af57 JP |
7544 | IWL_DEBUG_MAC80211("bssid: %s\n", |
7545 | print_mac(mac, conf->bssid)); | |
b481de9c | 7546 | |
4150c572 JB |
7547 | /* |
7548 | * very dubious code was here; the probe filtering flag is never set: | |
7549 | * | |
b481de9c ZY |
7550 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
7551 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 JB |
7552 | */ |
7553 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) { | |
b481de9c ZY |
7554 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
7555 | mutex_unlock(&priv->mutex); | |
7556 | return 0; | |
7557 | } | |
7558 | ||
7559 | if (priv->interface_id != if_id) { | |
7560 | IWL_DEBUG_MAC80211("leave - interface_id != if_id\n"); | |
7561 | mutex_unlock(&priv->mutex); | |
7562 | return 0; | |
7563 | } | |
7564 | ||
7565 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
7566 | if (!conf->bssid) { | |
7567 | conf->bssid = priv->mac_addr; | |
7568 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
7569 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
7570 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
7571 | } |
7572 | if (priv->ibss_beacon) | |
7573 | dev_kfree_skb(priv->ibss_beacon); | |
7574 | ||
7575 | priv->ibss_beacon = conf->beacon; | |
7576 | } | |
7577 | ||
7578 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && | |
7579 | !is_multicast_ether_addr(conf->bssid)) { | |
7580 | /* If there is currently a HW scan going on in the background | |
7581 | * then we need to cancel it else the RXON below will fail. */ | |
bb8c093b | 7582 | if (iwl4965_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
7583 | IWL_WARNING("Aborted scan still in progress " |
7584 | "after 100ms\n"); | |
7585 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
7586 | mutex_unlock(&priv->mutex); | |
7587 | return -EAGAIN; | |
7588 | } | |
7589 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
7590 | ||
7591 | /* TODO: Audit driver for usage of these members and see | |
7592 | * if mac80211 deprecates them (priv->bssid looks like it | |
7593 | * shouldn't be there, but I haven't scanned the IBSS code | |
7594 | * to verify) - jpk */ | |
7595 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
7596 | ||
7597 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 7598 | iwl4965_config_ap(priv); |
b481de9c | 7599 | else { |
bb8c093b | 7600 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 7601 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
bb8c093b | 7602 | iwl4965_rxon_add_station( |
b481de9c ZY |
7603 | priv, priv->active_rxon.bssid_addr, 1); |
7604 | } | |
7605 | ||
7606 | } else { | |
bb8c093b | 7607 | iwl4965_scan_cancel_timeout(priv, 100); |
b481de9c | 7608 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 7609 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
7610 | } |
7611 | ||
7612 | spin_lock_irqsave(&priv->lock, flags); | |
7613 | if (!conf->ssid_len) | |
7614 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
7615 | else | |
7616 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
7617 | ||
7618 | priv->essid_len = conf->ssid_len; | |
7619 | spin_unlock_irqrestore(&priv->lock, flags); | |
7620 | ||
7621 | IWL_DEBUG_MAC80211("leave\n"); | |
7622 | mutex_unlock(&priv->mutex); | |
7623 | ||
7624 | return 0; | |
7625 | } | |
7626 | ||
bb8c093b | 7627 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
7628 | unsigned int changed_flags, |
7629 | unsigned int *total_flags, | |
7630 | int mc_count, struct dev_addr_list *mc_list) | |
7631 | { | |
7632 | /* | |
7633 | * XXX: dummy | |
bb8c093b | 7634 | * see also iwl4965_connection_init_rx_config |
4150c572 JB |
7635 | */ |
7636 | *total_flags = 0; | |
7637 | } | |
7638 | ||
bb8c093b | 7639 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
7640 | struct ieee80211_if_init_conf *conf) |
7641 | { | |
bb8c093b | 7642 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7643 | |
7644 | IWL_DEBUG_MAC80211("enter\n"); | |
7645 | ||
7646 | mutex_lock(&priv->mutex); | |
948c171c | 7647 | |
bb8c093b | 7648 | iwl4965_scan_cancel_timeout(priv, 100); |
948c171c MA |
7649 | cancel_delayed_work(&priv->post_associate); |
7650 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 7651 | iwl4965_commit_rxon(priv); |
948c171c | 7652 | |
b481de9c ZY |
7653 | if (priv->interface_id == conf->if_id) { |
7654 | priv->interface_id = 0; | |
7655 | memset(priv->bssid, 0, ETH_ALEN); | |
7656 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
7657 | priv->essid_len = 0; | |
7658 | } | |
7659 | mutex_unlock(&priv->mutex); | |
7660 | ||
7661 | IWL_DEBUG_MAC80211("leave\n"); | |
7662 | ||
7663 | } | |
bb8c093b | 7664 | static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw, |
220173b0 TW |
7665 | u8 changes, int cts_protection, int preamble) |
7666 | { | |
bb8c093b | 7667 | struct iwl4965_priv *priv = hw->priv; |
220173b0 TW |
7668 | |
7669 | if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) { | |
7670 | if (preamble == WLAN_ERP_PREAMBLE_SHORT) | |
7671 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
7672 | else | |
7673 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
7674 | } | |
7675 | ||
7676 | if (changes & IEEE80211_ERP_CHANGE_PROTECTION) { | |
797a54c6 | 7677 | if (cts_protection && (priv->phymode != MODE_IEEE80211A)) |
220173b0 TW |
7678 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
7679 | else | |
7680 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
7681 | } | |
7682 | ||
bb8c093b CH |
7683 | if (iwl4965_is_associated(priv)) |
7684 | iwl4965_send_rxon_assoc(priv); | |
220173b0 | 7685 | } |
b481de9c ZY |
7686 | |
7687 | #define IWL_DELAY_NEXT_SCAN (HZ*2) | |
bb8c093b | 7688 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
7689 | { |
7690 | int rc = 0; | |
7691 | unsigned long flags; | |
bb8c093b | 7692 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7693 | |
7694 | IWL_DEBUG_MAC80211("enter\n"); | |
7695 | ||
052c4b9f | 7696 | mutex_lock(&priv->mutex); |
b481de9c ZY |
7697 | spin_lock_irqsave(&priv->lock, flags); |
7698 | ||
bb8c093b | 7699 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7700 | rc = -EIO; |
7701 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
7702 | goto out_unlock; | |
7703 | } | |
7704 | ||
7705 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
7706 | rc = -EIO; | |
7707 | IWL_ERROR("ERROR: APs don't scan\n"); | |
7708 | goto out_unlock; | |
7709 | } | |
7710 | ||
7711 | /* if we just finished scan ask for delay */ | |
7712 | if (priv->last_scan_jiffies && | |
7713 | time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, | |
7714 | jiffies)) { | |
7715 | rc = -EAGAIN; | |
7716 | goto out_unlock; | |
7717 | } | |
7718 | if (len) { | |
7719 | IWL_DEBUG_SCAN("direct scan for " | |
7720 | "%s [%d]\n ", | |
bb8c093b | 7721 | iwl4965_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
7722 | |
7723 | priv->one_direct_scan = 1; | |
7724 | priv->direct_ssid_len = (u8) | |
7725 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
7726 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
7727 | } else |
7728 | priv->one_direct_scan = 0; | |
b481de9c | 7729 | |
bb8c093b | 7730 | rc = iwl4965_scan_initiate(priv); |
b481de9c ZY |
7731 | |
7732 | IWL_DEBUG_MAC80211("leave\n"); | |
7733 | ||
7734 | out_unlock: | |
7735 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 7736 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
7737 | |
7738 | return rc; | |
7739 | } | |
7740 | ||
bb8c093b | 7741 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
7742 | const u8 *local_addr, const u8 *addr, |
7743 | struct ieee80211_key_conf *key) | |
7744 | { | |
bb8c093b | 7745 | struct iwl4965_priv *priv = hw->priv; |
0795af57 | 7746 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
7747 | int rc = 0; |
7748 | u8 sta_id; | |
7749 | ||
7750 | IWL_DEBUG_MAC80211("enter\n"); | |
7751 | ||
bb8c093b | 7752 | if (!iwl4965_param_hwcrypto) { |
b481de9c ZY |
7753 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
7754 | return -EOPNOTSUPP; | |
7755 | } | |
7756 | ||
7757 | if (is_zero_ether_addr(addr)) | |
7758 | /* only support pairwise keys */ | |
7759 | return -EOPNOTSUPP; | |
7760 | ||
bb8c093b | 7761 | sta_id = iwl4965_hw_find_station(priv, addr); |
b481de9c | 7762 | if (sta_id == IWL_INVALID_STATION) { |
0795af57 JP |
7763 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", |
7764 | print_mac(mac, addr)); | |
b481de9c ZY |
7765 | return -EINVAL; |
7766 | } | |
7767 | ||
7768 | mutex_lock(&priv->mutex); | |
7769 | ||
bb8c093b | 7770 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 7771 | |
b481de9c ZY |
7772 | switch (cmd) { |
7773 | case SET_KEY: | |
bb8c093b | 7774 | rc = iwl4965_update_sta_key_info(priv, key, sta_id); |
b481de9c | 7775 | if (!rc) { |
bb8c093b CH |
7776 | iwl4965_set_rxon_hwcrypto(priv, 1); |
7777 | iwl4965_commit_rxon(priv); | |
b481de9c ZY |
7778 | key->hw_key_idx = sta_id; |
7779 | IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n"); | |
7780 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
7781 | } | |
7782 | break; | |
7783 | case DISABLE_KEY: | |
bb8c093b | 7784 | rc = iwl4965_clear_sta_key_info(priv, sta_id); |
b481de9c | 7785 | if (!rc) { |
bb8c093b CH |
7786 | iwl4965_set_rxon_hwcrypto(priv, 0); |
7787 | iwl4965_commit_rxon(priv); | |
b481de9c ZY |
7788 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); |
7789 | } | |
7790 | break; | |
7791 | default: | |
7792 | rc = -EINVAL; | |
7793 | } | |
7794 | ||
7795 | IWL_DEBUG_MAC80211("leave\n"); | |
7796 | mutex_unlock(&priv->mutex); | |
7797 | ||
7798 | return rc; | |
7799 | } | |
7800 | ||
bb8c093b | 7801 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue, |
b481de9c ZY |
7802 | const struct ieee80211_tx_queue_params *params) |
7803 | { | |
bb8c093b | 7804 | struct iwl4965_priv *priv = hw->priv; |
c8b0e6e1 | 7805 | #ifdef CONFIG_IWL4965_QOS |
b481de9c ZY |
7806 | unsigned long flags; |
7807 | int q; | |
7808 | #endif /* CONFIG_IWL_QOS */ | |
7809 | ||
7810 | IWL_DEBUG_MAC80211("enter\n"); | |
7811 | ||
bb8c093b | 7812 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7813 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7814 | return -EIO; | |
7815 | } | |
7816 | ||
7817 | if (queue >= AC_NUM) { | |
7818 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
7819 | return 0; | |
7820 | } | |
7821 | ||
c8b0e6e1 | 7822 | #ifdef CONFIG_IWL4965_QOS |
b481de9c ZY |
7823 | if (!priv->qos_data.qos_enable) { |
7824 | priv->qos_data.qos_active = 0; | |
7825 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
7826 | return 0; | |
7827 | } | |
7828 | q = AC_NUM - 1 - queue; | |
7829 | ||
7830 | spin_lock_irqsave(&priv->lock, flags); | |
7831 | ||
7832 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
7833 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
7834 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
7835 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
7836 | cpu_to_le16((params->burst_time * 100)); | |
7837 | ||
7838 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
7839 | priv->qos_data.qos_active = 1; | |
7840 | ||
7841 | spin_unlock_irqrestore(&priv->lock, flags); | |
7842 | ||
7843 | mutex_lock(&priv->mutex); | |
7844 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b CH |
7845 | iwl4965_activate_qos(priv, 1); |
7846 | else if (priv->assoc_id && iwl4965_is_associated(priv)) | |
7847 | iwl4965_activate_qos(priv, 0); | |
b481de9c ZY |
7848 | |
7849 | mutex_unlock(&priv->mutex); | |
7850 | ||
c8b0e6e1 | 7851 | #endif /*CONFIG_IWL4965_QOS */ |
b481de9c ZY |
7852 | |
7853 | IWL_DEBUG_MAC80211("leave\n"); | |
7854 | return 0; | |
7855 | } | |
7856 | ||
bb8c093b | 7857 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
7858 | struct ieee80211_tx_queue_stats *stats) |
7859 | { | |
bb8c093b | 7860 | struct iwl4965_priv *priv = hw->priv; |
b481de9c | 7861 | int i, avail; |
bb8c093b CH |
7862 | struct iwl4965_tx_queue *txq; |
7863 | struct iwl4965_queue *q; | |
b481de9c ZY |
7864 | unsigned long flags; |
7865 | ||
7866 | IWL_DEBUG_MAC80211("enter\n"); | |
7867 | ||
bb8c093b | 7868 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7869 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7870 | return -EIO; | |
7871 | } | |
7872 | ||
7873 | spin_lock_irqsave(&priv->lock, flags); | |
7874 | ||
7875 | for (i = 0; i < AC_NUM; i++) { | |
7876 | txq = &priv->txq[i]; | |
7877 | q = &txq->q; | |
bb8c093b | 7878 | avail = iwl4965_queue_space(q); |
b481de9c ZY |
7879 | |
7880 | stats->data[i].len = q->n_window - avail; | |
7881 | stats->data[i].limit = q->n_window - q->high_mark; | |
7882 | stats->data[i].count = q->n_window; | |
7883 | ||
7884 | } | |
7885 | spin_unlock_irqrestore(&priv->lock, flags); | |
7886 | ||
7887 | IWL_DEBUG_MAC80211("leave\n"); | |
7888 | ||
7889 | return 0; | |
7890 | } | |
7891 | ||
bb8c093b | 7892 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
7893 | struct ieee80211_low_level_stats *stats) |
7894 | { | |
7895 | IWL_DEBUG_MAC80211("enter\n"); | |
7896 | IWL_DEBUG_MAC80211("leave\n"); | |
7897 | ||
7898 | return 0; | |
7899 | } | |
7900 | ||
bb8c093b | 7901 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c ZY |
7902 | { |
7903 | IWL_DEBUG_MAC80211("enter\n"); | |
7904 | IWL_DEBUG_MAC80211("leave\n"); | |
7905 | ||
7906 | return 0; | |
7907 | } | |
7908 | ||
bb8c093b | 7909 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 7910 | { |
bb8c093b | 7911 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7912 | unsigned long flags; |
7913 | ||
7914 | mutex_lock(&priv->mutex); | |
7915 | IWL_DEBUG_MAC80211("enter\n"); | |
7916 | ||
7917 | priv->lq_mngr.lq_ready = 0; | |
c8b0e6e1 | 7918 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
7919 | spin_lock_irqsave(&priv->lock, flags); |
7920 | memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info)); | |
7921 | spin_unlock_irqrestore(&priv->lock, flags); | |
c8b0e6e1 | 7922 | #ifdef CONFIG_IWL4965_HT_AGG |
b481de9c ZY |
7923 | /* if (priv->lq_mngr.agg_ctrl.granted_ba) |
7924 | iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/ | |
7925 | ||
bb8c093b | 7926 | memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control)); |
b481de9c ZY |
7927 | priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10; |
7928 | priv->lq_mngr.agg_ctrl.ba_timeout = 5000; | |
7929 | priv->lq_mngr.agg_ctrl.auto_agg = 1; | |
7930 | ||
7931 | if (priv->lq_mngr.agg_ctrl.auto_agg) | |
7932 | priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED; | |
c8b0e6e1 CH |
7933 | #endif /*CONFIG_IWL4965_HT_AGG */ |
7934 | #endif /* CONFIG_IWL4965_HT */ | |
b481de9c | 7935 | |
c8b0e6e1 | 7936 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b | 7937 | iwl4965_reset_qos(priv); |
b481de9c ZY |
7938 | #endif |
7939 | ||
7940 | cancel_delayed_work(&priv->post_associate); | |
7941 | ||
7942 | spin_lock_irqsave(&priv->lock, flags); | |
7943 | priv->assoc_id = 0; | |
7944 | priv->assoc_capability = 0; | |
7945 | priv->call_post_assoc_from_beacon = 0; | |
7946 | priv->assoc_station_added = 0; | |
7947 | ||
7948 | /* new association get rid of ibss beacon skb */ | |
7949 | if (priv->ibss_beacon) | |
7950 | dev_kfree_skb(priv->ibss_beacon); | |
7951 | ||
7952 | priv->ibss_beacon = NULL; | |
7953 | ||
7954 | priv->beacon_int = priv->hw->conf.beacon_int; | |
7955 | priv->timestamp1 = 0; | |
7956 | priv->timestamp0 = 0; | |
7957 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) | |
7958 | priv->beacon_int = 0; | |
7959 | ||
7960 | spin_unlock_irqrestore(&priv->lock, flags); | |
7961 | ||
052c4b9f | 7962 | /* we are restarting association process |
7963 | * clear RXON_FILTER_ASSOC_MSK bit | |
7964 | */ | |
7965 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
bb8c093b | 7966 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 7967 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 7968 | iwl4965_commit_rxon(priv); |
052c4b9f | 7969 | } |
7970 | ||
b481de9c ZY |
7971 | /* Per mac80211.h: This is only used in IBSS mode... */ |
7972 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 7973 | |
b481de9c ZY |
7974 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
7975 | mutex_unlock(&priv->mutex); | |
7976 | return; | |
7977 | } | |
7978 | ||
bb8c093b | 7979 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7980 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
7981 | mutex_unlock(&priv->mutex); | |
7982 | return; | |
7983 | } | |
7984 | ||
7985 | priv->only_active_channel = 0; | |
7986 | ||
bb8c093b | 7987 | iwl4965_set_rate(priv); |
b481de9c ZY |
7988 | |
7989 | mutex_unlock(&priv->mutex); | |
7990 | ||
7991 | IWL_DEBUG_MAC80211("leave\n"); | |
7992 | ||
7993 | } | |
7994 | ||
bb8c093b | 7995 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
7996 | struct ieee80211_tx_control *control) |
7997 | { | |
bb8c093b | 7998 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
7999 | unsigned long flags; |
8000 | ||
8001 | mutex_lock(&priv->mutex); | |
8002 | IWL_DEBUG_MAC80211("enter\n"); | |
8003 | ||
bb8c093b | 8004 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
8005 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
8006 | mutex_unlock(&priv->mutex); | |
8007 | return -EIO; | |
8008 | } | |
8009 | ||
8010 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
8011 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
8012 | mutex_unlock(&priv->mutex); | |
8013 | return -EIO; | |
8014 | } | |
8015 | ||
8016 | spin_lock_irqsave(&priv->lock, flags); | |
8017 | ||
8018 | if (priv->ibss_beacon) | |
8019 | dev_kfree_skb(priv->ibss_beacon); | |
8020 | ||
8021 | priv->ibss_beacon = skb; | |
8022 | ||
8023 | priv->assoc_id = 0; | |
8024 | ||
8025 | IWL_DEBUG_MAC80211("leave\n"); | |
8026 | spin_unlock_irqrestore(&priv->lock, flags); | |
8027 | ||
c8b0e6e1 | 8028 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b | 8029 | iwl4965_reset_qos(priv); |
b481de9c ZY |
8030 | #endif |
8031 | ||
8032 | queue_work(priv->workqueue, &priv->post_associate.work); | |
8033 | ||
8034 | mutex_unlock(&priv->mutex); | |
8035 | ||
8036 | return 0; | |
8037 | } | |
8038 | ||
c8b0e6e1 | 8039 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
8040 | union ht_cap_info { |
8041 | struct { | |
8042 | u16 advanced_coding_cap :1; | |
8043 | u16 supported_chan_width_set :1; | |
8044 | u16 mimo_power_save_mode :2; | |
8045 | u16 green_field :1; | |
8046 | u16 short_GI20 :1; | |
8047 | u16 short_GI40 :1; | |
8048 | u16 tx_stbc :1; | |
8049 | u16 rx_stbc :1; | |
8050 | u16 beam_forming :1; | |
8051 | u16 delayed_ba :1; | |
8052 | u16 maximal_amsdu_size :1; | |
8053 | u16 cck_mode_at_40MHz :1; | |
8054 | u16 psmp_support :1; | |
8055 | u16 stbc_ctrl_frame_support :1; | |
8056 | u16 sig_txop_protection_support :1; | |
8057 | }; | |
8058 | u16 val; | |
8059 | } __attribute__ ((packed)); | |
8060 | ||
8061 | union ht_param_info{ | |
8062 | struct { | |
8063 | u8 max_rx_ampdu_factor :2; | |
8064 | u8 mpdu_density :3; | |
8065 | u8 reserved :3; | |
8066 | }; | |
8067 | u8 val; | |
8068 | } __attribute__ ((packed)); | |
8069 | ||
8070 | union ht_exra_param_info { | |
8071 | struct { | |
8072 | u8 ext_chan_offset :2; | |
8073 | u8 tx_chan_width :1; | |
8074 | u8 rifs_mode :1; | |
8075 | u8 controlled_access_only :1; | |
8076 | u8 service_interval_granularity :3; | |
8077 | }; | |
8078 | u8 val; | |
8079 | } __attribute__ ((packed)); | |
8080 | ||
8081 | union ht_operation_mode{ | |
8082 | struct { | |
8083 | u16 op_mode :2; | |
8084 | u16 non_GF :1; | |
8085 | u16 reserved :13; | |
8086 | }; | |
8087 | u16 val; | |
8088 | } __attribute__ ((packed)); | |
8089 | ||
8090 | ||
8091 | static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap, | |
8092 | struct ieee80211_ht_additional_info *ht_extra, | |
8093 | struct sta_ht_info *ht_info_ap, | |
8094 | struct sta_ht_info *ht_info) | |
8095 | { | |
8096 | union ht_cap_info cap; | |
8097 | union ht_operation_mode op_mode; | |
8098 | union ht_param_info param_info; | |
8099 | union ht_exra_param_info extra_param_info; | |
8100 | ||
8101 | IWL_DEBUG_MAC80211("enter: \n"); | |
8102 | ||
8103 | if (!ht_info) { | |
8104 | IWL_DEBUG_MAC80211("leave: ht_info is NULL\n"); | |
8105 | return -1; | |
8106 | } | |
8107 | ||
8108 | if (ht_cap) { | |
8109 | cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info); | |
8110 | param_info.val = ht_cap->mac_ht_params_info; | |
8111 | ht_info->is_ht = 1; | |
8112 | if (cap.short_GI20) | |
8113 | ht_info->sgf |= 0x1; | |
8114 | if (cap.short_GI40) | |
8115 | ht_info->sgf |= 0x2; | |
8116 | ht_info->is_green_field = cap.green_field; | |
8117 | ht_info->max_amsdu_size = cap.maximal_amsdu_size; | |
8118 | ht_info->supported_chan_width = cap.supported_chan_width_set; | |
8119 | ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode; | |
8120 | memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16); | |
8121 | ||
8122 | ht_info->ampdu_factor = param_info.max_rx_ampdu_factor; | |
8123 | ht_info->mpdu_density = param_info.mpdu_density; | |
8124 | ||
8125 | IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n", | |
8126 | ht_cap->supported_mcs_set[0], | |
8127 | ht_cap->supported_mcs_set[1]); | |
8128 | ||
8129 | if (ht_info_ap) { | |
8130 | ht_info->control_channel = ht_info_ap->control_channel; | |
8131 | ht_info->extension_chan_offset = | |
8132 | ht_info_ap->extension_chan_offset; | |
8133 | ht_info->tx_chan_width = ht_info_ap->tx_chan_width; | |
8134 | ht_info->operating_mode = ht_info_ap->operating_mode; | |
8135 | } | |
8136 | ||
8137 | if (ht_extra) { | |
8138 | extra_param_info.val = ht_extra->ht_param; | |
8139 | ht_info->control_channel = ht_extra->control_chan; | |
8140 | ht_info->extension_chan_offset = | |
8141 | extra_param_info.ext_chan_offset; | |
8142 | ht_info->tx_chan_width = extra_param_info.tx_chan_width; | |
8143 | op_mode.val = (u16) | |
8144 | le16_to_cpu(ht_extra->operation_mode); | |
8145 | ht_info->operating_mode = op_mode.op_mode; | |
8146 | IWL_DEBUG_MAC80211("control channel %d\n", | |
8147 | ht_extra->control_chan); | |
8148 | } | |
8149 | } else | |
8150 | ht_info->is_ht = 0; | |
8151 | ||
8152 | IWL_DEBUG_MAC80211("leave\n"); | |
8153 | return 0; | |
8154 | } | |
8155 | ||
bb8c093b | 8156 | static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw, |
b481de9c ZY |
8157 | struct ieee80211_ht_capability *ht_cap, |
8158 | struct ieee80211_ht_additional_info *ht_extra) | |
8159 | { | |
bb8c093b | 8160 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
8161 | int rs; |
8162 | ||
8163 | IWL_DEBUG_MAC80211("enter: \n"); | |
8164 | ||
8165 | rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht); | |
8166 | iwl4965_set_rxon_chain(priv); | |
8167 | ||
8168 | if (priv && priv->assoc_id && | |
8169 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { | |
8170 | unsigned long flags; | |
8171 | ||
8172 | spin_lock_irqsave(&priv->lock, flags); | |
8173 | if (priv->beacon_int) | |
8174 | queue_work(priv->workqueue, &priv->post_associate.work); | |
8175 | else | |
8176 | priv->call_post_assoc_from_beacon = 1; | |
8177 | spin_unlock_irqrestore(&priv->lock, flags); | |
8178 | } | |
8179 | ||
8180 | IWL_DEBUG_MAC80211("leave: control channel %d\n", | |
8181 | ht_extra->control_chan); | |
8182 | return rs; | |
8183 | ||
8184 | } | |
8185 | ||
bb8c093b | 8186 | static void iwl4965_set_ht_capab(struct ieee80211_hw *hw, |
b481de9c ZY |
8187 | struct ieee80211_ht_capability *ht_cap, |
8188 | u8 use_wide_chan) | |
8189 | { | |
8190 | union ht_cap_info cap; | |
8191 | union ht_param_info param_info; | |
8192 | ||
8193 | memset(&cap, 0, sizeof(union ht_cap_info)); | |
8194 | memset(¶m_info, 0, sizeof(union ht_param_info)); | |
8195 | ||
8196 | cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K; | |
8197 | cap.green_field = 1; | |
8198 | cap.short_GI20 = 1; | |
8199 | cap.short_GI40 = 1; | |
8200 | cap.supported_chan_width_set = use_wide_chan; | |
8201 | cap.mimo_power_save_mode = 0x3; | |
8202 | ||
8203 | param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF; | |
8204 | param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF; | |
8205 | ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val); | |
8206 | ht_cap->mac_ht_params_info = (u8) param_info.val; | |
8207 | ||
8208 | ht_cap->supported_mcs_set[0] = 0xff; | |
8209 | ht_cap->supported_mcs_set[1] = 0xff; | |
8210 | ht_cap->supported_mcs_set[4] = | |
8211 | (cap.supported_chan_width_set) ? 0x1: 0x0; | |
8212 | } | |
8213 | ||
bb8c093b | 8214 | static void iwl4965_mac_get_ht_capab(struct ieee80211_hw *hw, |
b481de9c ZY |
8215 | struct ieee80211_ht_capability *ht_cap) |
8216 | { | |
8217 | u8 use_wide_channel = 1; | |
bb8c093b | 8218 | struct iwl4965_priv *priv = hw->priv; |
b481de9c ZY |
8219 | |
8220 | IWL_DEBUG_MAC80211("enter: \n"); | |
8221 | if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ) | |
8222 | use_wide_channel = 0; | |
8223 | ||
8224 | /* no fat tx allowed on 2.4GHZ */ | |
8225 | if (priv->phymode != MODE_IEEE80211A) | |
8226 | use_wide_channel = 0; | |
8227 | ||
bb8c093b | 8228 | iwl4965_set_ht_capab(hw, ht_cap, use_wide_channel); |
b481de9c ZY |
8229 | IWL_DEBUG_MAC80211("leave: \n"); |
8230 | } | |
c8b0e6e1 | 8231 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
8232 | |
8233 | /***************************************************************************** | |
8234 | * | |
8235 | * sysfs attributes | |
8236 | * | |
8237 | *****************************************************************************/ | |
8238 | ||
c8b0e6e1 | 8239 | #ifdef CONFIG_IWL4965_DEBUG |
b481de9c ZY |
8240 | |
8241 | /* | |
8242 | * The following adds a new attribute to the sysfs representation | |
8243 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
8244 | * used for controlling the debug level. | |
8245 | * | |
8246 | * See the level definitions in iwl for details. | |
8247 | */ | |
8248 | ||
8249 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | |
8250 | { | |
bb8c093b | 8251 | return sprintf(buf, "0x%08X\n", iwl4965_debug_level); |
b481de9c ZY |
8252 | } |
8253 | static ssize_t store_debug_level(struct device_driver *d, | |
8254 | const char *buf, size_t count) | |
8255 | { | |
8256 | char *p = (char *)buf; | |
8257 | u32 val; | |
8258 | ||
8259 | val = simple_strtoul(p, &p, 0); | |
8260 | if (p == buf) | |
8261 | printk(KERN_INFO DRV_NAME | |
8262 | ": %s is not in hex or decimal form.\n", buf); | |
8263 | else | |
bb8c093b | 8264 | iwl4965_debug_level = val; |
b481de9c ZY |
8265 | |
8266 | return strnlen(buf, count); | |
8267 | } | |
8268 | ||
8269 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | |
8270 | show_debug_level, store_debug_level); | |
8271 | ||
c8b0e6e1 | 8272 | #endif /* CONFIG_IWL4965_DEBUG */ |
b481de9c ZY |
8273 | |
8274 | static ssize_t show_rf_kill(struct device *d, | |
8275 | struct device_attribute *attr, char *buf) | |
8276 | { | |
8277 | /* | |
8278 | * 0 - RF kill not enabled | |
8279 | * 1 - SW based RF kill active (sysfs) | |
8280 | * 2 - HW based RF kill active | |
8281 | * 3 - Both HW and SW based RF kill active | |
8282 | */ | |
bb8c093b | 8283 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8284 | int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) | |
8285 | (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0); | |
8286 | ||
8287 | return sprintf(buf, "%i\n", val); | |
8288 | } | |
8289 | ||
8290 | static ssize_t store_rf_kill(struct device *d, | |
8291 | struct device_attribute *attr, | |
8292 | const char *buf, size_t count) | |
8293 | { | |
bb8c093b | 8294 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8295 | |
8296 | mutex_lock(&priv->mutex); | |
bb8c093b | 8297 | iwl4965_radio_kill_sw(priv, buf[0] == '1'); |
b481de9c ZY |
8298 | mutex_unlock(&priv->mutex); |
8299 | ||
8300 | return count; | |
8301 | } | |
8302 | ||
8303 | static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill); | |
8304 | ||
8305 | static ssize_t show_temperature(struct device *d, | |
8306 | struct device_attribute *attr, char *buf) | |
8307 | { | |
bb8c093b | 8308 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c | 8309 | |
bb8c093b | 8310 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
8311 | return -EAGAIN; |
8312 | ||
bb8c093b | 8313 | return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv)); |
b481de9c ZY |
8314 | } |
8315 | ||
8316 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
8317 | ||
8318 | static ssize_t show_rs_window(struct device *d, | |
8319 | struct device_attribute *attr, | |
8320 | char *buf) | |
8321 | { | |
bb8c093b CH |
8322 | struct iwl4965_priv *priv = d->driver_data; |
8323 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); | |
b481de9c ZY |
8324 | } |
8325 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
8326 | ||
8327 | static ssize_t show_tx_power(struct device *d, | |
8328 | struct device_attribute *attr, char *buf) | |
8329 | { | |
bb8c093b | 8330 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8331 | return sprintf(buf, "%d\n", priv->user_txpower_limit); |
8332 | } | |
8333 | ||
8334 | static ssize_t store_tx_power(struct device *d, | |
8335 | struct device_attribute *attr, | |
8336 | const char *buf, size_t count) | |
8337 | { | |
bb8c093b | 8338 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8339 | char *p = (char *)buf; |
8340 | u32 val; | |
8341 | ||
8342 | val = simple_strtoul(p, &p, 10); | |
8343 | if (p == buf) | |
8344 | printk(KERN_INFO DRV_NAME | |
8345 | ": %s is not in decimal form.\n", buf); | |
8346 | else | |
bb8c093b | 8347 | iwl4965_hw_reg_set_txpower(priv, val); |
b481de9c ZY |
8348 | |
8349 | return count; | |
8350 | } | |
8351 | ||
8352 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
8353 | ||
8354 | static ssize_t show_flags(struct device *d, | |
8355 | struct device_attribute *attr, char *buf) | |
8356 | { | |
bb8c093b | 8357 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8358 | |
8359 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
8360 | } | |
8361 | ||
8362 | static ssize_t store_flags(struct device *d, | |
8363 | struct device_attribute *attr, | |
8364 | const char *buf, size_t count) | |
8365 | { | |
bb8c093b | 8366 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8367 | u32 flags = simple_strtoul(buf, NULL, 0); |
8368 | ||
8369 | mutex_lock(&priv->mutex); | |
8370 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
8371 | /* Cancel any currently running scans... */ | |
bb8c093b | 8372 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
8373 | IWL_WARNING("Could not cancel scan.\n"); |
8374 | else { | |
8375 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
8376 | flags); | |
8377 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 8378 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
8379 | } |
8380 | } | |
8381 | mutex_unlock(&priv->mutex); | |
8382 | ||
8383 | return count; | |
8384 | } | |
8385 | ||
8386 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
8387 | ||
8388 | static ssize_t show_filter_flags(struct device *d, | |
8389 | struct device_attribute *attr, char *buf) | |
8390 | { | |
bb8c093b | 8391 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8392 | |
8393 | return sprintf(buf, "0x%04X\n", | |
8394 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
8395 | } | |
8396 | ||
8397 | static ssize_t store_filter_flags(struct device *d, | |
8398 | struct device_attribute *attr, | |
8399 | const char *buf, size_t count) | |
8400 | { | |
bb8c093b | 8401 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8402 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
8403 | ||
8404 | mutex_lock(&priv->mutex); | |
8405 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
8406 | /* Cancel any currently running scans... */ | |
bb8c093b | 8407 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
8408 | IWL_WARNING("Could not cancel scan.\n"); |
8409 | else { | |
8410 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
8411 | "0x%04X\n", filter_flags); | |
8412 | priv->staging_rxon.filter_flags = | |
8413 | cpu_to_le32(filter_flags); | |
bb8c093b | 8414 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
8415 | } |
8416 | } | |
8417 | mutex_unlock(&priv->mutex); | |
8418 | ||
8419 | return count; | |
8420 | } | |
8421 | ||
8422 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
8423 | store_filter_flags); | |
8424 | ||
8425 | static ssize_t show_tune(struct device *d, | |
8426 | struct device_attribute *attr, char *buf) | |
8427 | { | |
bb8c093b | 8428 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8429 | |
8430 | return sprintf(buf, "0x%04X\n", | |
8431 | (priv->phymode << 8) | | |
8432 | le16_to_cpu(priv->active_rxon.channel)); | |
8433 | } | |
8434 | ||
bb8c093b | 8435 | static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode); |
b481de9c ZY |
8436 | |
8437 | static ssize_t store_tune(struct device *d, | |
8438 | struct device_attribute *attr, | |
8439 | const char *buf, size_t count) | |
8440 | { | |
bb8c093b | 8441 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
b481de9c ZY |
8442 | char *p = (char *)buf; |
8443 | u16 tune = simple_strtoul(p, &p, 0); | |
8444 | u8 phymode = (tune >> 8) & 0xff; | |
8445 | u16 channel = tune & 0xff; | |
8446 | ||
8447 | IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel); | |
8448 | ||
8449 | mutex_lock(&priv->mutex); | |
8450 | if ((le16_to_cpu(priv->staging_rxon.channel) != channel) || | |
8451 | (priv->phymode != phymode)) { | |
bb8c093b | 8452 | const struct iwl4965_channel_info *ch_info; |
b481de9c | 8453 | |
bb8c093b | 8454 | ch_info = iwl4965_get_channel_info(priv, phymode, channel); |
b481de9c ZY |
8455 | if (!ch_info) { |
8456 | IWL_WARNING("Requested invalid phymode/channel " | |
8457 | "combination: %d %d\n", phymode, channel); | |
8458 | mutex_unlock(&priv->mutex); | |
8459 | return -EINVAL; | |
8460 | } | |
8461 | ||
8462 | /* Cancel any currently running scans... */ | |
bb8c093b | 8463 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
8464 | IWL_WARNING("Could not cancel scan.\n"); |
8465 | else { | |
8466 | IWL_DEBUG_INFO("Committing phymode and " | |
8467 | "rxon.channel = %d %d\n", | |
8468 | phymode, channel); | |
8469 | ||
bb8c093b CH |
8470 | iwl4965_set_rxon_channel(priv, phymode, channel); |
8471 | iwl4965_set_flags_for_phymode(priv, phymode); | |
b481de9c | 8472 | |
bb8c093b CH |
8473 | iwl4965_set_rate(priv); |
8474 | iwl4965_commit_rxon(priv); | |
b481de9c ZY |
8475 | } |
8476 | } | |
8477 | mutex_unlock(&priv->mutex); | |
8478 | ||
8479 | return count; | |
8480 | } | |
8481 | ||
8482 | static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune); | |
8483 | ||
c8b0e6e1 | 8484 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
8485 | |
8486 | static ssize_t show_measurement(struct device *d, | |
8487 | struct device_attribute *attr, char *buf) | |
8488 | { | |
bb8c093b CH |
8489 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
8490 | struct iwl4965_spectrum_notification measure_report; | |
b481de9c ZY |
8491 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
8492 | u8 *data = (u8 *) & measure_report; | |
8493 | unsigned long flags; | |
8494 | ||
8495 | spin_lock_irqsave(&priv->lock, flags); | |
8496 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
8497 | spin_unlock_irqrestore(&priv->lock, flags); | |
8498 | return 0; | |
8499 | } | |
8500 | memcpy(&measure_report, &priv->measure_report, size); | |
8501 | priv->measurement_status = 0; | |
8502 | spin_unlock_irqrestore(&priv->lock, flags); | |
8503 | ||
8504 | while (size && (PAGE_SIZE - len)) { | |
8505 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
8506 | PAGE_SIZE - len, 1); | |
8507 | len = strlen(buf); | |
8508 | if (PAGE_SIZE - len) | |
8509 | buf[len++] = '\n'; | |
8510 | ||
8511 | ofs += 16; | |
8512 | size -= min(size, 16U); | |
8513 | } | |
8514 | ||
8515 | return len; | |
8516 | } | |
8517 | ||
8518 | static ssize_t store_measurement(struct device *d, | |
8519 | struct device_attribute *attr, | |
8520 | const char *buf, size_t count) | |
8521 | { | |
bb8c093b | 8522 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8523 | struct ieee80211_measurement_params params = { |
8524 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
8525 | .start_time = cpu_to_le64(priv->last_tsf), | |
8526 | .duration = cpu_to_le16(1), | |
8527 | }; | |
8528 | u8 type = IWL_MEASURE_BASIC; | |
8529 | u8 buffer[32]; | |
8530 | u8 channel; | |
8531 | ||
8532 | if (count) { | |
8533 | char *p = buffer; | |
8534 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
8535 | channel = simple_strtoul(p, NULL, 0); | |
8536 | if (channel) | |
8537 | params.channel = channel; | |
8538 | ||
8539 | p = buffer; | |
8540 | while (*p && *p != ' ') | |
8541 | p++; | |
8542 | if (*p) | |
8543 | type = simple_strtoul(p + 1, NULL, 0); | |
8544 | } | |
8545 | ||
8546 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
8547 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 8548 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
8549 | |
8550 | return count; | |
8551 | } | |
8552 | ||
8553 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
8554 | show_measurement, store_measurement); | |
c8b0e6e1 | 8555 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
8556 | |
8557 | static ssize_t store_retry_rate(struct device *d, | |
8558 | struct device_attribute *attr, | |
8559 | const char *buf, size_t count) | |
8560 | { | |
bb8c093b | 8561 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8562 | |
8563 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
8564 | if (priv->retry_rate <= 0) | |
8565 | priv->retry_rate = 1; | |
8566 | ||
8567 | return count; | |
8568 | } | |
8569 | ||
8570 | static ssize_t show_retry_rate(struct device *d, | |
8571 | struct device_attribute *attr, char *buf) | |
8572 | { | |
bb8c093b | 8573 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8574 | return sprintf(buf, "%d", priv->retry_rate); |
8575 | } | |
8576 | ||
8577 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
8578 | store_retry_rate); | |
8579 | ||
8580 | static ssize_t store_power_level(struct device *d, | |
8581 | struct device_attribute *attr, | |
8582 | const char *buf, size_t count) | |
8583 | { | |
bb8c093b | 8584 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8585 | int rc; |
8586 | int mode; | |
8587 | ||
8588 | mode = simple_strtoul(buf, NULL, 0); | |
8589 | mutex_lock(&priv->mutex); | |
8590 | ||
bb8c093b | 8591 | if (!iwl4965_is_ready(priv)) { |
b481de9c ZY |
8592 | rc = -EAGAIN; |
8593 | goto out; | |
8594 | } | |
8595 | ||
8596 | if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC)) | |
8597 | mode = IWL_POWER_AC; | |
8598 | else | |
8599 | mode |= IWL_POWER_ENABLED; | |
8600 | ||
8601 | if (mode != priv->power_mode) { | |
bb8c093b | 8602 | rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode)); |
b481de9c ZY |
8603 | if (rc) { |
8604 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
8605 | goto out; | |
8606 | } | |
8607 | priv->power_mode = mode; | |
8608 | } | |
8609 | ||
8610 | rc = count; | |
8611 | ||
8612 | out: | |
8613 | mutex_unlock(&priv->mutex); | |
8614 | return rc; | |
8615 | } | |
8616 | ||
8617 | #define MAX_WX_STRING 80 | |
8618 | ||
8619 | /* Values are in microsecond */ | |
8620 | static const s32 timeout_duration[] = { | |
8621 | 350000, | |
8622 | 250000, | |
8623 | 75000, | |
8624 | 37000, | |
8625 | 25000, | |
8626 | }; | |
8627 | static const s32 period_duration[] = { | |
8628 | 400000, | |
8629 | 700000, | |
8630 | 1000000, | |
8631 | 1000000, | |
8632 | 1000000 | |
8633 | }; | |
8634 | ||
8635 | static ssize_t show_power_level(struct device *d, | |
8636 | struct device_attribute *attr, char *buf) | |
8637 | { | |
bb8c093b | 8638 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8639 | int level = IWL_POWER_LEVEL(priv->power_mode); |
8640 | char *p = buf; | |
8641 | ||
8642 | p += sprintf(p, "%d ", level); | |
8643 | switch (level) { | |
8644 | case IWL_POWER_MODE_CAM: | |
8645 | case IWL_POWER_AC: | |
8646 | p += sprintf(p, "(AC)"); | |
8647 | break; | |
8648 | case IWL_POWER_BATTERY: | |
8649 | p += sprintf(p, "(BATTERY)"); | |
8650 | break; | |
8651 | default: | |
8652 | p += sprintf(p, | |
8653 | "(Timeout %dms, Period %dms)", | |
8654 | timeout_duration[level - 1] / 1000, | |
8655 | period_duration[level - 1] / 1000); | |
8656 | } | |
8657 | ||
8658 | if (!(priv->power_mode & IWL_POWER_ENABLED)) | |
8659 | p += sprintf(p, " OFF\n"); | |
8660 | else | |
8661 | p += sprintf(p, " \n"); | |
8662 | ||
8663 | return (p - buf + 1); | |
8664 | ||
8665 | } | |
8666 | ||
8667 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
8668 | store_power_level); | |
8669 | ||
8670 | static ssize_t show_channels(struct device *d, | |
8671 | struct device_attribute *attr, char *buf) | |
8672 | { | |
bb8c093b | 8673 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8674 | int len = 0, i; |
8675 | struct ieee80211_channel *channels = NULL; | |
8676 | const struct ieee80211_hw_mode *hw_mode = NULL; | |
8677 | int count = 0; | |
8678 | ||
bb8c093b | 8679 | if (!iwl4965_is_ready(priv)) |
b481de9c ZY |
8680 | return -EAGAIN; |
8681 | ||
bb8c093b | 8682 | hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G); |
b481de9c | 8683 | if (!hw_mode) |
bb8c093b | 8684 | hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B); |
b481de9c ZY |
8685 | if (hw_mode) { |
8686 | channels = hw_mode->channels; | |
8687 | count = hw_mode->num_channels; | |
8688 | } | |
8689 | ||
8690 | len += | |
8691 | sprintf(&buf[len], | |
8692 | "Displaying %d channels in 2.4GHz band " | |
8693 | "(802.11bg):\n", count); | |
8694 | ||
8695 | for (i = 0; i < count; i++) | |
8696 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
8697 | channels[i].chan, | |
8698 | channels[i].power_level, | |
8699 | channels[i]. | |
8700 | flag & IEEE80211_CHAN_W_RADAR_DETECT ? | |
8701 | " (IEEE 802.11h required)" : "", | |
8702 | (!(channels[i].flag & IEEE80211_CHAN_W_IBSS) | |
8703 | || (channels[i]. | |
8704 | flag & | |
8705 | IEEE80211_CHAN_W_RADAR_DETECT)) ? "" : | |
8706 | ", IBSS", | |
8707 | channels[i]. | |
8708 | flag & IEEE80211_CHAN_W_ACTIVE_SCAN ? | |
8709 | "active/passive" : "passive only"); | |
8710 | ||
bb8c093b | 8711 | hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A); |
b481de9c ZY |
8712 | if (hw_mode) { |
8713 | channels = hw_mode->channels; | |
8714 | count = hw_mode->num_channels; | |
8715 | } else { | |
8716 | channels = NULL; | |
8717 | count = 0; | |
8718 | } | |
8719 | ||
8720 | len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band " | |
8721 | "(802.11a):\n", count); | |
8722 | ||
8723 | for (i = 0; i < count; i++) | |
8724 | len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n", | |
8725 | channels[i].chan, | |
8726 | channels[i].power_level, | |
8727 | channels[i]. | |
8728 | flag & IEEE80211_CHAN_W_RADAR_DETECT ? | |
8729 | " (IEEE 802.11h required)" : "", | |
8730 | (!(channels[i].flag & IEEE80211_CHAN_W_IBSS) | |
8731 | || (channels[i]. | |
8732 | flag & | |
8733 | IEEE80211_CHAN_W_RADAR_DETECT)) ? "" : | |
8734 | ", IBSS", | |
8735 | channels[i]. | |
8736 | flag & IEEE80211_CHAN_W_ACTIVE_SCAN ? | |
8737 | "active/passive" : "passive only"); | |
8738 | ||
8739 | return len; | |
8740 | } | |
8741 | ||
8742 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
8743 | ||
8744 | static ssize_t show_statistics(struct device *d, | |
8745 | struct device_attribute *attr, char *buf) | |
8746 | { | |
bb8c093b CH |
8747 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
8748 | u32 size = sizeof(struct iwl4965_notif_statistics); | |
b481de9c ZY |
8749 | u32 len = 0, ofs = 0; |
8750 | u8 *data = (u8 *) & priv->statistics; | |
8751 | int rc = 0; | |
8752 | ||
bb8c093b | 8753 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
8754 | return -EAGAIN; |
8755 | ||
8756 | mutex_lock(&priv->mutex); | |
bb8c093b | 8757 | rc = iwl4965_send_statistics_request(priv); |
b481de9c ZY |
8758 | mutex_unlock(&priv->mutex); |
8759 | ||
8760 | if (rc) { | |
8761 | len = sprintf(buf, | |
8762 | "Error sending statistics request: 0x%08X\n", rc); | |
8763 | return len; | |
8764 | } | |
8765 | ||
8766 | while (size && (PAGE_SIZE - len)) { | |
8767 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
8768 | PAGE_SIZE - len, 1); | |
8769 | len = strlen(buf); | |
8770 | if (PAGE_SIZE - len) | |
8771 | buf[len++] = '\n'; | |
8772 | ||
8773 | ofs += 16; | |
8774 | size -= min(size, 16U); | |
8775 | } | |
8776 | ||
8777 | return len; | |
8778 | } | |
8779 | ||
8780 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
8781 | ||
8782 | static ssize_t show_antenna(struct device *d, | |
8783 | struct device_attribute *attr, char *buf) | |
8784 | { | |
bb8c093b | 8785 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c | 8786 | |
bb8c093b | 8787 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
8788 | return -EAGAIN; |
8789 | ||
8790 | return sprintf(buf, "%d\n", priv->antenna); | |
8791 | } | |
8792 | ||
8793 | static ssize_t store_antenna(struct device *d, | |
8794 | struct device_attribute *attr, | |
8795 | const char *buf, size_t count) | |
8796 | { | |
8797 | int ant; | |
bb8c093b | 8798 | struct iwl4965_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
8799 | |
8800 | if (count == 0) | |
8801 | return 0; | |
8802 | ||
8803 | if (sscanf(buf, "%1i", &ant) != 1) { | |
8804 | IWL_DEBUG_INFO("not in hex or decimal form.\n"); | |
8805 | return count; | |
8806 | } | |
8807 | ||
8808 | if ((ant >= 0) && (ant <= 2)) { | |
8809 | IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant); | |
bb8c093b | 8810 | priv->antenna = (enum iwl4965_antenna)ant; |
b481de9c ZY |
8811 | } else |
8812 | IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant); | |
8813 | ||
8814 | ||
8815 | return count; | |
8816 | } | |
8817 | ||
8818 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna); | |
8819 | ||
8820 | static ssize_t show_status(struct device *d, | |
8821 | struct device_attribute *attr, char *buf) | |
8822 | { | |
bb8c093b CH |
8823 | struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data; |
8824 | if (!iwl4965_is_alive(priv)) | |
b481de9c ZY |
8825 | return -EAGAIN; |
8826 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
8827 | } | |
8828 | ||
8829 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
8830 | ||
8831 | static ssize_t dump_error_log(struct device *d, | |
8832 | struct device_attribute *attr, | |
8833 | const char *buf, size_t count) | |
8834 | { | |
8835 | char *p = (char *)buf; | |
8836 | ||
8837 | if (p[0] == '1') | |
bb8c093b | 8838 | iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data); |
b481de9c ZY |
8839 | |
8840 | return strnlen(buf, count); | |
8841 | } | |
8842 | ||
8843 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | |
8844 | ||
8845 | static ssize_t dump_event_log(struct device *d, | |
8846 | struct device_attribute *attr, | |
8847 | const char *buf, size_t count) | |
8848 | { | |
8849 | char *p = (char *)buf; | |
8850 | ||
8851 | if (p[0] == '1') | |
bb8c093b | 8852 | iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data); |
b481de9c ZY |
8853 | |
8854 | return strnlen(buf, count); | |
8855 | } | |
8856 | ||
8857 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |
8858 | ||
8859 | /***************************************************************************** | |
8860 | * | |
8861 | * driver setup and teardown | |
8862 | * | |
8863 | *****************************************************************************/ | |
8864 | ||
bb8c093b | 8865 | static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv) |
b481de9c ZY |
8866 | { |
8867 | priv->workqueue = create_workqueue(DRV_NAME); | |
8868 | ||
8869 | init_waitqueue_head(&priv->wait_command_queue); | |
8870 | ||
bb8c093b CH |
8871 | INIT_WORK(&priv->up, iwl4965_bg_up); |
8872 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
8873 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
8874 | INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed); | |
8875 | INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan); | |
8876 | INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan); | |
8877 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); | |
8878 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
8879 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); | |
8880 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start); | |
8881 | INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start); | |
8882 | INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check); | |
8883 | ||
8884 | iwl4965_hw_setup_deferred_work(priv); | |
b481de9c ZY |
8885 | |
8886 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 8887 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
8888 | } |
8889 | ||
bb8c093b | 8890 | static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv) |
b481de9c | 8891 | { |
bb8c093b | 8892 | iwl4965_hw_cancel_deferred_work(priv); |
b481de9c | 8893 | |
3ae6a054 | 8894 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
8895 | cancel_delayed_work(&priv->scan_check); |
8896 | cancel_delayed_work(&priv->alive_start); | |
8897 | cancel_delayed_work(&priv->post_associate); | |
8898 | cancel_work_sync(&priv->beacon_update); | |
8899 | } | |
8900 | ||
bb8c093b | 8901 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c ZY |
8902 | &dev_attr_antenna.attr, |
8903 | &dev_attr_channels.attr, | |
8904 | &dev_attr_dump_errors.attr, | |
8905 | &dev_attr_dump_events.attr, | |
8906 | &dev_attr_flags.attr, | |
8907 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 8908 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
8909 | &dev_attr_measurement.attr, |
8910 | #endif | |
8911 | &dev_attr_power_level.attr, | |
8912 | &dev_attr_retry_rate.attr, | |
8913 | &dev_attr_rf_kill.attr, | |
8914 | &dev_attr_rs_window.attr, | |
8915 | &dev_attr_statistics.attr, | |
8916 | &dev_attr_status.attr, | |
8917 | &dev_attr_temperature.attr, | |
8918 | &dev_attr_tune.attr, | |
8919 | &dev_attr_tx_power.attr, | |
8920 | ||
8921 | NULL | |
8922 | }; | |
8923 | ||
bb8c093b | 8924 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 8925 | .name = NULL, /* put in device directory */ |
bb8c093b | 8926 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
8927 | }; |
8928 | ||
bb8c093b CH |
8929 | static struct ieee80211_ops iwl4965_hw_ops = { |
8930 | .tx = iwl4965_mac_tx, | |
8931 | .start = iwl4965_mac_start, | |
8932 | .stop = iwl4965_mac_stop, | |
8933 | .add_interface = iwl4965_mac_add_interface, | |
8934 | .remove_interface = iwl4965_mac_remove_interface, | |
8935 | .config = iwl4965_mac_config, | |
8936 | .config_interface = iwl4965_mac_config_interface, | |
8937 | .configure_filter = iwl4965_configure_filter, | |
8938 | .set_key = iwl4965_mac_set_key, | |
8939 | .get_stats = iwl4965_mac_get_stats, | |
8940 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
8941 | .conf_tx = iwl4965_mac_conf_tx, | |
8942 | .get_tsf = iwl4965_mac_get_tsf, | |
8943 | .reset_tsf = iwl4965_mac_reset_tsf, | |
8944 | .beacon_update = iwl4965_mac_beacon_update, | |
8945 | .erp_ie_changed = iwl4965_mac_erp_ie_changed, | |
c8b0e6e1 | 8946 | #ifdef CONFIG_IWL4965_HT |
bb8c093b CH |
8947 | .conf_ht = iwl4965_mac_conf_ht, |
8948 | .get_ht_capab = iwl4965_mac_get_ht_capab, | |
c8b0e6e1 | 8949 | #ifdef CONFIG_IWL4965_HT_AGG |
bb8c093b CH |
8950 | .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start, |
8951 | .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop, | |
8952 | .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start, | |
8953 | .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop, | |
c8b0e6e1 CH |
8954 | #endif /* CONFIG_IWL4965_HT_AGG */ |
8955 | #endif /* CONFIG_IWL4965_HT */ | |
bb8c093b | 8956 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
8957 | }; |
8958 | ||
bb8c093b | 8959 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
8960 | { |
8961 | int err = 0; | |
bb8c093b | 8962 | struct iwl4965_priv *priv; |
b481de9c ZY |
8963 | struct ieee80211_hw *hw; |
8964 | int i; | |
8965 | ||
bb8c093b | 8966 | if (iwl4965_param_disable_hw_scan) { |
b481de9c | 8967 | IWL_DEBUG_INFO("Disabling hw_scan\n"); |
bb8c093b | 8968 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
8969 | } |
8970 | ||
bb8c093b CH |
8971 | if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) || |
8972 | (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) { | |
b481de9c ZY |
8973 | IWL_ERROR("invalid queues_num, should be between %d and %d\n", |
8974 | IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES); | |
8975 | err = -EINVAL; | |
8976 | goto out; | |
8977 | } | |
8978 | ||
8979 | /* mac80211 allocates memory for this device instance, including | |
8980 | * space for this driver's private structure */ | |
bb8c093b | 8981 | hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops); |
b481de9c ZY |
8982 | if (hw == NULL) { |
8983 | IWL_ERROR("Can not allocate network device\n"); | |
8984 | err = -ENOMEM; | |
8985 | goto out; | |
8986 | } | |
8987 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
8988 | ||
f51359a8 JB |
8989 | hw->rate_control_algorithm = "iwl-4965-rs"; |
8990 | ||
b481de9c ZY |
8991 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); |
8992 | priv = hw->priv; | |
8993 | priv->hw = hw; | |
8994 | ||
8995 | priv->pci_dev = pdev; | |
bb8c093b | 8996 | priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna; |
c8b0e6e1 | 8997 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 8998 | iwl4965_debug_level = iwl4965_param_debug; |
b481de9c ZY |
8999 | atomic_set(&priv->restrict_refcnt, 0); |
9000 | #endif | |
9001 | priv->retry_rate = 1; | |
9002 | ||
9003 | priv->ibss_beacon = NULL; | |
9004 | ||
9005 | /* Tell mac80211 and its clients (e.g. Wireless Extensions) | |
9006 | * the range of signal quality values that we'll provide. | |
9007 | * Negative values for level/noise indicate that we'll provide dBm. | |
9008 | * For WE, at least, non-0 values here *enable* display of values | |
9009 | * in app (iwconfig). */ | |
9010 | hw->max_rssi = -20; /* signal level, negative indicates dBm */ | |
9011 | hw->max_noise = -20; /* noise level, negative indicates dBm */ | |
9012 | hw->max_signal = 100; /* link quality indication (%) */ | |
9013 | ||
9014 | /* Tell mac80211 our Tx characteristics */ | |
9015 | hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE; | |
9016 | ||
9017 | hw->queues = 4; | |
c8b0e6e1 CH |
9018 | #ifdef CONFIG_IWL4965_HT |
9019 | #ifdef CONFIG_IWL4965_HT_AGG | |
b481de9c | 9020 | hw->queues = 16; |
c8b0e6e1 CH |
9021 | #endif /* CONFIG_IWL4965_HT_AGG */ |
9022 | #endif /* CONFIG_IWL4965_HT */ | |
b481de9c ZY |
9023 | |
9024 | spin_lock_init(&priv->lock); | |
9025 | spin_lock_init(&priv->power_data.lock); | |
9026 | spin_lock_init(&priv->sta_lock); | |
9027 | spin_lock_init(&priv->hcmd_lock); | |
9028 | spin_lock_init(&priv->lq_mngr.lock); | |
9029 | ||
9030 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) | |
9031 | INIT_LIST_HEAD(&priv->ibss_mac_hash[i]); | |
9032 | ||
9033 | INIT_LIST_HEAD(&priv->free_frames); | |
9034 | ||
9035 | mutex_init(&priv->mutex); | |
9036 | if (pci_enable_device(pdev)) { | |
9037 | err = -ENODEV; | |
9038 | goto out_ieee80211_free_hw; | |
9039 | } | |
9040 | ||
9041 | pci_set_master(pdev); | |
9042 | ||
bb8c093b | 9043 | iwl4965_clear_stations_table(priv); |
b481de9c ZY |
9044 | |
9045 | priv->data_retry_limit = -1; | |
9046 | priv->ieee_channels = NULL; | |
9047 | priv->ieee_rates = NULL; | |
9048 | priv->phymode = -1; | |
9049 | ||
9050 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
9051 | if (!err) | |
9052 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
9053 | if (err) { | |
9054 | printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n"); | |
9055 | goto out_pci_disable_device; | |
9056 | } | |
9057 | ||
9058 | pci_set_drvdata(pdev, priv); | |
9059 | err = pci_request_regions(pdev, DRV_NAME); | |
9060 | if (err) | |
9061 | goto out_pci_disable_device; | |
9062 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
9063 | * PCI Tx retries from interfering with C3 CPU state */ | |
9064 | pci_write_config_byte(pdev, 0x41, 0x00); | |
9065 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
9066 | if (!priv->hw_base) { | |
9067 | err = -ENODEV; | |
9068 | goto out_pci_release_regions; | |
9069 | } | |
9070 | ||
9071 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
9072 | (unsigned long long) pci_resource_len(pdev, 0)); | |
9073 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
9074 | ||
9075 | /* Initialize module parameter values here */ | |
9076 | ||
bb8c093b | 9077 | if (iwl4965_param_disable) { |
b481de9c ZY |
9078 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
9079 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
9080 | } | |
9081 | ||
9082 | priv->iw_mode = IEEE80211_IF_TYPE_STA; | |
9083 | ||
9084 | priv->ps_mode = 0; | |
9085 | priv->use_ant_b_for_management_frame = 1; /* start with ant B */ | |
9086 | priv->is_ht_enabled = 1; | |
9087 | priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ; | |
9088 | priv->valid_antenna = 0x7; /* assume all 3 connected */ | |
9089 | priv->ps_mode = IWL_MIMO_PS_NONE; | |
b481de9c ZY |
9090 | |
9091 | iwl4965_set_rxon_chain(priv); | |
9092 | ||
9093 | printk(KERN_INFO DRV_NAME | |
9094 | ": Detected Intel Wireless WiFi Link 4965AGN\n"); | |
9095 | ||
9096 | /* Device-specific setup */ | |
bb8c093b | 9097 | if (iwl4965_hw_set_hw_setting(priv)) { |
b481de9c ZY |
9098 | IWL_ERROR("failed to set hw settings\n"); |
9099 | mutex_unlock(&priv->mutex); | |
9100 | goto out_iounmap; | |
9101 | } | |
9102 | ||
c8b0e6e1 | 9103 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b | 9104 | if (iwl4965_param_qos_enable) |
b481de9c ZY |
9105 | priv->qos_data.qos_enable = 1; |
9106 | ||
bb8c093b | 9107 | iwl4965_reset_qos(priv); |
b481de9c ZY |
9108 | |
9109 | priv->qos_data.qos_active = 0; | |
9110 | priv->qos_data.qos_cap.val = 0; | |
c8b0e6e1 | 9111 | #endif /* CONFIG_IWL4965_QOS */ |
b481de9c | 9112 | |
bb8c093b CH |
9113 | iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6); |
9114 | iwl4965_setup_deferred_work(priv); | |
9115 | iwl4965_setup_rx_handlers(priv); | |
b481de9c ZY |
9116 | |
9117 | priv->rates_mask = IWL_RATES_MASK; | |
9118 | /* If power management is turned on, default to AC mode */ | |
9119 | priv->power_mode = IWL_POWER_AC; | |
9120 | priv->user_txpower_limit = IWL_DEFAULT_TX_POWER; | |
9121 | ||
bb8c093b | 9122 | iwl4965_disable_interrupts(priv); |
49df2b33 | 9123 | |
b481de9c ZY |
9124 | pci_enable_msi(pdev); |
9125 | ||
bb8c093b | 9126 | err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv); |
b481de9c ZY |
9127 | if (err) { |
9128 | IWL_ERROR("Error allocating IRQ %d\n", pdev->irq); | |
9129 | goto out_disable_msi; | |
9130 | } | |
9131 | ||
9132 | mutex_lock(&priv->mutex); | |
9133 | ||
bb8c093b | 9134 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c ZY |
9135 | if (err) { |
9136 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
9137 | mutex_unlock(&priv->mutex); | |
9138 | goto out_release_irq; | |
9139 | } | |
9140 | ||
9141 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | |
9142 | * ucode filename and max sizes are card-specific. */ | |
bb8c093b | 9143 | err = iwl4965_read_ucode(priv); |
b481de9c ZY |
9144 | if (err) { |
9145 | IWL_ERROR("Could not read microcode: %d\n", err); | |
9146 | mutex_unlock(&priv->mutex); | |
9147 | goto out_pci_alloc; | |
9148 | } | |
9149 | ||
9150 | mutex_unlock(&priv->mutex); | |
9151 | ||
01ebd063 | 9152 | IWL_DEBUG_INFO("Queueing UP work.\n"); |
b481de9c ZY |
9153 | |
9154 | queue_work(priv->workqueue, &priv->up); | |
9155 | ||
9156 | return 0; | |
9157 | ||
9158 | out_pci_alloc: | |
bb8c093b | 9159 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c | 9160 | |
bb8c093b | 9161 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c ZY |
9162 | |
9163 | out_release_irq: | |
9164 | free_irq(pdev->irq, priv); | |
9165 | ||
9166 | out_disable_msi: | |
9167 | pci_disable_msi(pdev); | |
9168 | destroy_workqueue(priv->workqueue); | |
9169 | priv->workqueue = NULL; | |
bb8c093b | 9170 | iwl4965_unset_hw_setting(priv); |
b481de9c ZY |
9171 | |
9172 | out_iounmap: | |
9173 | pci_iounmap(pdev, priv->hw_base); | |
9174 | out_pci_release_regions: | |
9175 | pci_release_regions(pdev); | |
9176 | out_pci_disable_device: | |
9177 | pci_disable_device(pdev); | |
9178 | pci_set_drvdata(pdev, NULL); | |
9179 | out_ieee80211_free_hw: | |
9180 | ieee80211_free_hw(priv->hw); | |
9181 | out: | |
9182 | return err; | |
9183 | } | |
9184 | ||
bb8c093b | 9185 | static void iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 9186 | { |
bb8c093b | 9187 | struct iwl4965_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
9188 | struct list_head *p, *q; |
9189 | int i; | |
9190 | ||
9191 | if (!priv) | |
9192 | return; | |
9193 | ||
9194 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
9195 | ||
b481de9c | 9196 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 9197 | |
bb8c093b | 9198 | iwl4965_down(priv); |
b481de9c ZY |
9199 | |
9200 | /* Free MAC hash list for ADHOC */ | |
9201 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
9202 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
9203 | list_del(p); | |
bb8c093b | 9204 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
9205 | } |
9206 | } | |
9207 | ||
bb8c093b | 9208 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c | 9209 | |
bb8c093b | 9210 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
9211 | |
9212 | if (priv->rxq.bd) | |
bb8c093b CH |
9213 | iwl4965_rx_queue_free(priv, &priv->rxq); |
9214 | iwl4965_hw_txq_ctx_free(priv); | |
b481de9c | 9215 | |
bb8c093b CH |
9216 | iwl4965_unset_hw_setting(priv); |
9217 | iwl4965_clear_stations_table(priv); | |
b481de9c ZY |
9218 | |
9219 | if (priv->mac80211_registered) { | |
9220 | ieee80211_unregister_hw(priv->hw); | |
bb8c093b | 9221 | iwl4965_rate_control_unregister(priv->hw); |
b481de9c ZY |
9222 | } |
9223 | ||
948c171c MA |
9224 | /*netif_stop_queue(dev); */ |
9225 | flush_workqueue(priv->workqueue); | |
9226 | ||
bb8c093b | 9227 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
9228 | * priv->workqueue... so we can't take down the workqueue |
9229 | * until now... */ | |
9230 | destroy_workqueue(priv->workqueue); | |
9231 | priv->workqueue = NULL; | |
9232 | ||
9233 | free_irq(pdev->irq, priv); | |
9234 | pci_disable_msi(pdev); | |
9235 | pci_iounmap(pdev, priv->hw_base); | |
9236 | pci_release_regions(pdev); | |
9237 | pci_disable_device(pdev); | |
9238 | pci_set_drvdata(pdev, NULL); | |
9239 | ||
9240 | kfree(priv->channel_info); | |
9241 | ||
9242 | kfree(priv->ieee_channels); | |
9243 | kfree(priv->ieee_rates); | |
9244 | ||
9245 | if (priv->ibss_beacon) | |
9246 | dev_kfree_skb(priv->ibss_beacon); | |
9247 | ||
9248 | ieee80211_free_hw(priv->hw); | |
9249 | } | |
9250 | ||
9251 | #ifdef CONFIG_PM | |
9252 | ||
bb8c093b | 9253 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 9254 | { |
bb8c093b | 9255 | struct iwl4965_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 9256 | |
b481de9c ZY |
9257 | set_bit(STATUS_IN_SUSPEND, &priv->status); |
9258 | ||
9259 | /* Take down the device; powers it off, etc. */ | |
bb8c093b | 9260 | iwl4965_down(priv); |
b481de9c ZY |
9261 | |
9262 | if (priv->mac80211_registered) | |
9263 | ieee80211_stop_queues(priv->hw); | |
9264 | ||
9265 | pci_save_state(pdev); | |
9266 | pci_disable_device(pdev); | |
9267 | pci_set_power_state(pdev, PCI_D3hot); | |
9268 | ||
b481de9c ZY |
9269 | return 0; |
9270 | } | |
9271 | ||
bb8c093b | 9272 | static void iwl4965_resume(struct iwl4965_priv *priv) |
b481de9c ZY |
9273 | { |
9274 | unsigned long flags; | |
9275 | ||
9276 | /* The following it a temporary work around due to the | |
9277 | * suspend / resume not fully initializing the NIC correctly. | |
9278 | * Without all of the following, resume will not attempt to take | |
9279 | * down the NIC (it shouldn't really need to) and will just try | |
9280 | * and bring the NIC back up. However that fails during the | |
bb8c093b CH |
9281 | * ucode verification process. This then causes iwl4965_down to be |
9282 | * called *after* iwl4965_hw_nic_init() has succeeded -- which | |
b481de9c ZY |
9283 | * then lets the next init sequence succeed. So, we've |
9284 | * replicated all of that NIC init code here... */ | |
9285 | ||
bb8c093b | 9286 | iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 9287 | |
bb8c093b | 9288 | iwl4965_hw_nic_init(priv); |
b481de9c | 9289 | |
bb8c093b CH |
9290 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
9291 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c | 9292 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
bb8c093b CH |
9293 | iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); |
9294 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
9295 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
9296 | |
9297 | /* tell the device to stop sending interrupts */ | |
bb8c093b | 9298 | iwl4965_disable_interrupts(priv); |
b481de9c ZY |
9299 | |
9300 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 9301 | iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c | 9302 | |
bb8c093b CH |
9303 | if (!iwl4965_grab_nic_access(priv)) { |
9304 | iwl4965_write_prph(priv, APMG_CLK_DIS_REG, | |
ac17a947 | 9305 | APMG_CLK_VAL_DMA_CLK_RQT); |
bb8c093b | 9306 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
9307 | } |
9308 | spin_unlock_irqrestore(&priv->lock, flags); | |
9309 | ||
9310 | udelay(5); | |
9311 | ||
bb8c093b | 9312 | iwl4965_hw_nic_reset(priv); |
b481de9c ZY |
9313 | |
9314 | /* Bring the device back up */ | |
9315 | clear_bit(STATUS_IN_SUSPEND, &priv->status); | |
9316 | queue_work(priv->workqueue, &priv->up); | |
9317 | } | |
9318 | ||
bb8c093b | 9319 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 9320 | { |
bb8c093b | 9321 | struct iwl4965_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
9322 | int err; |
9323 | ||
9324 | printk(KERN_INFO "Coming out of suspend...\n"); | |
9325 | ||
b481de9c ZY |
9326 | pci_set_power_state(pdev, PCI_D0); |
9327 | err = pci_enable_device(pdev); | |
9328 | pci_restore_state(pdev); | |
9329 | ||
9330 | /* | |
9331 | * Suspend/Resume resets the PCI configuration space, so we have to | |
9332 | * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries | |
9333 | * from interfering with C3 CPU state. pci_restore_state won't help | |
9334 | * here since it only restores the first 64 bytes pci config header. | |
9335 | */ | |
9336 | pci_write_config_byte(pdev, 0x41, 0x00); | |
9337 | ||
bb8c093b | 9338 | iwl4965_resume(priv); |
b481de9c ZY |
9339 | |
9340 | return 0; | |
9341 | } | |
9342 | ||
9343 | #endif /* CONFIG_PM */ | |
9344 | ||
9345 | /***************************************************************************** | |
9346 | * | |
9347 | * driver and module entry point | |
9348 | * | |
9349 | *****************************************************************************/ | |
9350 | ||
bb8c093b | 9351 | static struct pci_driver iwl4965_driver = { |
b481de9c | 9352 | .name = DRV_NAME, |
bb8c093b CH |
9353 | .id_table = iwl4965_hw_card_ids, |
9354 | .probe = iwl4965_pci_probe, | |
9355 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 9356 | #ifdef CONFIG_PM |
bb8c093b CH |
9357 | .suspend = iwl4965_pci_suspend, |
9358 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
9359 | #endif |
9360 | }; | |
9361 | ||
bb8c093b | 9362 | static int __init iwl4965_init(void) |
b481de9c ZY |
9363 | { |
9364 | ||
9365 | int ret; | |
9366 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
9367 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
bb8c093b | 9368 | ret = pci_register_driver(&iwl4965_driver); |
b481de9c ZY |
9369 | if (ret) { |
9370 | IWL_ERROR("Unable to initialize PCI module\n"); | |
9371 | return ret; | |
9372 | } | |
c8b0e6e1 | 9373 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 9374 | ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level); |
b481de9c ZY |
9375 | if (ret) { |
9376 | IWL_ERROR("Unable to create driver sysfs file\n"); | |
bb8c093b | 9377 | pci_unregister_driver(&iwl4965_driver); |
b481de9c ZY |
9378 | return ret; |
9379 | } | |
9380 | #endif | |
9381 | ||
9382 | return ret; | |
9383 | } | |
9384 | ||
bb8c093b | 9385 | static void __exit iwl4965_exit(void) |
b481de9c | 9386 | { |
c8b0e6e1 | 9387 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b | 9388 | driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level); |
b481de9c | 9389 | #endif |
bb8c093b | 9390 | pci_unregister_driver(&iwl4965_driver); |
b481de9c ZY |
9391 | } |
9392 | ||
bb8c093b | 9393 | module_param_named(antenna, iwl4965_param_antenna, int, 0444); |
b481de9c | 9394 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); |
bb8c093b | 9395 | module_param_named(disable, iwl4965_param_disable, int, 0444); |
b481de9c | 9396 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); |
bb8c093b | 9397 | module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444); |
b481de9c ZY |
9398 | MODULE_PARM_DESC(hwcrypto, |
9399 | "using hardware crypto engine (default 0 [software])\n"); | |
bb8c093b | 9400 | module_param_named(debug, iwl4965_param_debug, int, 0444); |
b481de9c | 9401 | MODULE_PARM_DESC(debug, "debug output mask"); |
bb8c093b | 9402 | module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444); |
b481de9c ZY |
9403 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); |
9404 | ||
bb8c093b | 9405 | module_param_named(queues_num, iwl4965_param_queues_num, int, 0444); |
b481de9c ZY |
9406 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
9407 | ||
9408 | /* QoS */ | |
bb8c093b | 9409 | module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444); |
b481de9c ZY |
9410 | MODULE_PARM_DESC(qos_enable, "enable all QoS functionality"); |
9411 | ||
bb8c093b CH |
9412 | module_exit(iwl4965_exit); |
9413 | module_init(iwl4965_init); |