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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
3e0d4cb1 | 49 | #include "iwl-dev.h" |
fee1247a | 50 | #include "iwl-core.h" |
3395f6e9 | 51 | #include "iwl-io.h" |
b481de9c | 52 | #include "iwl-helpers.h" |
6974e363 | 53 | #include "iwl-sta.h" |
f0832f13 | 54 | #include "iwl-calib.h" |
b481de9c | 55 | |
c79dd5b5 | 56 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 57 | struct iwl4965_tx_queue *txq); |
416e1438 | 58 | |
b481de9c ZY |
59 | /****************************************************************************** |
60 | * | |
61 | * module boiler plate | |
62 | * | |
63 | ******************************************************************************/ | |
64 | ||
b481de9c ZY |
65 | /* |
66 | * module name, copyright, version, etc. | |
67 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
68 | */ | |
69 | ||
70 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
71 | ||
0a6857e7 | 72 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
73 | #define VD "d" |
74 | #else | |
75 | #define VD | |
76 | #endif | |
77 | ||
c8b0e6e1 | 78 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
79 | #define VS "s" |
80 | #else | |
81 | #define VS | |
82 | #endif | |
83 | ||
df48c323 | 84 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 85 | |
b481de9c ZY |
86 | |
87 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
88 | MODULE_VERSION(DRV_VERSION); | |
89 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
90 | MODULE_LICENSE("GPL"); | |
91 | ||
92 | __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr) | |
93 | { | |
94 | u16 fc = le16_to_cpu(hdr->frame_control); | |
95 | int hdr_len = ieee80211_get_hdrlen(fc); | |
96 | ||
97 | if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA)) | |
98 | return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN); | |
99 | return NULL; | |
100 | } | |
101 | ||
d1141dfb | 102 | static const struct ieee80211_supported_band *iwl_get_hw_mode( |
c79dd5b5 | 103 | struct iwl_priv *priv, enum ieee80211_band band) |
b481de9c | 104 | { |
8318d78a | 105 | return priv->hw->wiphy->bands[band]; |
b481de9c ZY |
106 | } |
107 | ||
bb8c093b | 108 | static int iwl4965_is_empty_essid(const char *essid, int essid_len) |
b481de9c ZY |
109 | { |
110 | /* Single white space is for Linksys APs */ | |
111 | if (essid_len == 1 && essid[0] == ' ') | |
112 | return 1; | |
113 | ||
114 | /* Otherwise, if the entire essid is 0, we assume it is hidden */ | |
115 | while (essid_len) { | |
116 | essid_len--; | |
117 | if (essid[essid_len] != '\0') | |
118 | return 0; | |
119 | } | |
120 | ||
121 | return 1; | |
122 | } | |
123 | ||
bb8c093b | 124 | static const char *iwl4965_escape_essid(const char *essid, u8 essid_len) |
b481de9c ZY |
125 | { |
126 | static char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
127 | const char *s = essid; | |
128 | char *d = escaped; | |
129 | ||
bb8c093b | 130 | if (iwl4965_is_empty_essid(essid, essid_len)) { |
b481de9c ZY |
131 | memcpy(escaped, "<hidden>", sizeof("<hidden>")); |
132 | return escaped; | |
133 | } | |
134 | ||
135 | essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE); | |
136 | while (essid_len--) { | |
137 | if (*s == '\0') { | |
138 | *d++ = '\\'; | |
139 | *d++ = '0'; | |
140 | s++; | |
141 | } else | |
142 | *d++ = *s++; | |
143 | } | |
144 | *d = '\0'; | |
145 | return escaped; | |
146 | } | |
147 | ||
bf403db8 | 148 | |
b481de9c ZY |
149 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
150 | * DMA services | |
151 | * | |
152 | * Theory of operation | |
153 | * | |
6440adb5 CB |
154 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer |
155 | * of buffer descriptors, each of which points to one or more data buffers for | |
156 | * the device to read from or fill. Driver and device exchange status of each | |
157 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty | |
158 | * entries in each circular buffer, to protect against confusing empty and full | |
159 | * queue states. | |
160 | * | |
161 | * The device reads or writes the data in the queues via the device's several | |
162 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. | |
b481de9c ZY |
163 | * |
164 | * For Tx queue, there are low mark and high mark limits. If, after queuing | |
165 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | |
166 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | |
167 | * Tx queue resumed. | |
168 | * | |
6440adb5 CB |
169 | * The 4965 operates with up to 17 queues: One receive queue, one transmit |
170 | * queue (#4) for sending commands to the device firmware, and 15 other | |
171 | * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels. | |
e3851447 BC |
172 | * |
173 | * See more detailed info in iwl-4965-hw.h. | |
b481de9c ZY |
174 | ***************************************************/ |
175 | ||
fe01b477 | 176 | int iwl4965_queue_space(const struct iwl4965_queue *q) |
b481de9c | 177 | { |
fc4b6853 | 178 | int s = q->read_ptr - q->write_ptr; |
b481de9c | 179 | |
fc4b6853 | 180 | if (q->read_ptr > q->write_ptr) |
b481de9c ZY |
181 | s -= q->n_bd; |
182 | ||
183 | if (s <= 0) | |
184 | s += q->n_window; | |
185 | /* keep some reserve to not confuse empty and full situations */ | |
186 | s -= 2; | |
187 | if (s < 0) | |
188 | s = 0; | |
189 | return s; | |
190 | } | |
191 | ||
b481de9c | 192 | |
bb8c093b | 193 | static inline int x2_queue_used(const struct iwl4965_queue *q, int i) |
b481de9c | 194 | { |
fc4b6853 TW |
195 | return q->write_ptr > q->read_ptr ? |
196 | (i >= q->read_ptr && i < q->write_ptr) : | |
197 | !(i < q->read_ptr && i >= q->write_ptr); | |
b481de9c ZY |
198 | } |
199 | ||
bb8c093b | 200 | static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge) |
b481de9c | 201 | { |
6440adb5 | 202 | /* This is for scan command, the big buffer at end of command array */ |
b481de9c | 203 | if (is_huge) |
6440adb5 | 204 | return q->n_window; /* must be power of 2 */ |
b481de9c | 205 | |
6440adb5 | 206 | /* Otherwise, use normal size buffers */ |
b481de9c ZY |
207 | return index & (q->n_window - 1); |
208 | } | |
209 | ||
6440adb5 CB |
210 | /** |
211 | * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes | |
212 | */ | |
c79dd5b5 | 213 | static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q, |
b481de9c ZY |
214 | int count, int slots_num, u32 id) |
215 | { | |
216 | q->n_bd = count; | |
217 | q->n_window = slots_num; | |
218 | q->id = id; | |
219 | ||
c54b679d TW |
220 | /* count must be power-of-two size, otherwise iwl_queue_inc_wrap |
221 | * and iwl_queue_dec_wrap are broken. */ | |
b481de9c ZY |
222 | BUG_ON(!is_power_of_2(count)); |
223 | ||
224 | /* slots_num must be power-of-two size, otherwise | |
225 | * get_cmd_index is broken. */ | |
226 | BUG_ON(!is_power_of_2(slots_num)); | |
227 | ||
228 | q->low_mark = q->n_window / 4; | |
229 | if (q->low_mark < 4) | |
230 | q->low_mark = 4; | |
231 | ||
232 | q->high_mark = q->n_window / 8; | |
233 | if (q->high_mark < 2) | |
234 | q->high_mark = 2; | |
235 | ||
fc4b6853 | 236 | q->write_ptr = q->read_ptr = 0; |
b481de9c ZY |
237 | |
238 | return 0; | |
239 | } | |
240 | ||
6440adb5 CB |
241 | /** |
242 | * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue | |
243 | */ | |
c79dd5b5 | 244 | static int iwl4965_tx_queue_alloc(struct iwl_priv *priv, |
bb8c093b | 245 | struct iwl4965_tx_queue *txq, u32 id) |
b481de9c ZY |
246 | { |
247 | struct pci_dev *dev = priv->pci_dev; | |
248 | ||
6440adb5 CB |
249 | /* Driver private data, only for Tx (not command) queues, |
250 | * not shared with device. */ | |
b481de9c ZY |
251 | if (id != IWL_CMD_QUEUE_NUM) { |
252 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | |
253 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | |
254 | if (!txq->txb) { | |
01ebd063 | 255 | IWL_ERROR("kmalloc for auxiliary BD " |
b481de9c ZY |
256 | "structures failed\n"); |
257 | goto error; | |
258 | } | |
259 | } else | |
260 | txq->txb = NULL; | |
261 | ||
6440adb5 CB |
262 | /* Circular buffer of transmit frame descriptors (TFDs), |
263 | * shared with device */ | |
b481de9c ZY |
264 | txq->bd = pci_alloc_consistent(dev, |
265 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX, | |
266 | &txq->q.dma_addr); | |
267 | ||
268 | if (!txq->bd) { | |
269 | IWL_ERROR("pci_alloc_consistent(%zd) failed\n", | |
270 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX); | |
271 | goto error; | |
272 | } | |
273 | txq->q.id = id; | |
274 | ||
275 | return 0; | |
276 | ||
277 | error: | |
278 | if (txq->txb) { | |
279 | kfree(txq->txb); | |
280 | txq->txb = NULL; | |
281 | } | |
282 | ||
283 | return -ENOMEM; | |
284 | } | |
285 | ||
8b6eaea8 CB |
286 | /** |
287 | * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue | |
288 | */ | |
c79dd5b5 | 289 | int iwl4965_tx_queue_init(struct iwl_priv *priv, |
bb8c093b | 290 | struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id) |
b481de9c ZY |
291 | { |
292 | struct pci_dev *dev = priv->pci_dev; | |
293 | int len; | |
294 | int rc = 0; | |
295 | ||
8b6eaea8 CB |
296 | /* |
297 | * Alloc buffer array for commands (Tx or other types of commands). | |
298 | * For the command queue (#4), allocate command space + one big | |
299 | * command for scan, since scan command is very huge; the system will | |
300 | * not have two scans at the same time, so only one is needed. | |
bb54244b | 301 | * For normal Tx queues (all other queues), no super-size command |
8b6eaea8 CB |
302 | * space is needed. |
303 | */ | |
857485c0 | 304 | len = sizeof(struct iwl_cmd) * slots_num; |
b481de9c ZY |
305 | if (txq_id == IWL_CMD_QUEUE_NUM) |
306 | len += IWL_MAX_SCAN_SIZE; | |
307 | txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd); | |
308 | if (!txq->cmd) | |
309 | return -ENOMEM; | |
310 | ||
8b6eaea8 | 311 | /* Alloc driver data array and TFD circular buffer */ |
bb8c093b | 312 | rc = iwl4965_tx_queue_alloc(priv, txq, txq_id); |
b481de9c ZY |
313 | if (rc) { |
314 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | |
315 | ||
316 | return -ENOMEM; | |
317 | } | |
318 | txq->need_update = 0; | |
319 | ||
320 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise | |
c54b679d | 321 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ |
b481de9c | 322 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); |
8b6eaea8 CB |
323 | |
324 | /* Initialize queue's high/low-water marks, and head/tail indexes */ | |
bb8c093b | 325 | iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
b481de9c | 326 | |
8b6eaea8 | 327 | /* Tell device where to find queue */ |
bb8c093b | 328 | iwl4965_hw_tx_queue_init(priv, txq); |
b481de9c ZY |
329 | |
330 | return 0; | |
331 | } | |
332 | ||
333 | /** | |
bb8c093b | 334 | * iwl4965_tx_queue_free - Deallocate DMA queue. |
b481de9c ZY |
335 | * @txq: Transmit queue to deallocate. |
336 | * | |
337 | * Empty queue by removing and destroying all BD's. | |
6440adb5 CB |
338 | * Free all buffers. |
339 | * 0-fill, but do not free "txq" descriptor structure. | |
b481de9c | 340 | */ |
c79dd5b5 | 341 | void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq) |
b481de9c | 342 | { |
bb8c093b | 343 | struct iwl4965_queue *q = &txq->q; |
b481de9c ZY |
344 | struct pci_dev *dev = priv->pci_dev; |
345 | int len; | |
346 | ||
347 | if (q->n_bd == 0) | |
348 | return; | |
349 | ||
350 | /* first, empty all BD's */ | |
fc4b6853 | 351 | for (; q->write_ptr != q->read_ptr; |
c54b679d | 352 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) |
bb8c093b | 353 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c | 354 | |
857485c0 | 355 | len = sizeof(struct iwl_cmd) * q->n_window; |
b481de9c ZY |
356 | if (q->id == IWL_CMD_QUEUE_NUM) |
357 | len += IWL_MAX_SCAN_SIZE; | |
358 | ||
6440adb5 | 359 | /* De-alloc array of command/tx buffers */ |
b481de9c ZY |
360 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); |
361 | ||
6440adb5 | 362 | /* De-alloc circular buffer of TFDs */ |
b481de9c | 363 | if (txq->q.n_bd) |
bb8c093b | 364 | pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) * |
b481de9c ZY |
365 | txq->q.n_bd, txq->bd, txq->q.dma_addr); |
366 | ||
6440adb5 | 367 | /* De-alloc array of per-TFD driver data */ |
b481de9c ZY |
368 | if (txq->txb) { |
369 | kfree(txq->txb); | |
370 | txq->txb = NULL; | |
371 | } | |
372 | ||
6440adb5 | 373 | /* 0-fill queue descriptor structure */ |
b481de9c ZY |
374 | memset(txq, 0, sizeof(*txq)); |
375 | } | |
376 | ||
bb8c093b | 377 | const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
b481de9c ZY |
378 | |
379 | /*************** STATION TABLE MANAGEMENT **** | |
9fbab516 | 380 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
381 | * the functionality provided here |
382 | */ | |
383 | ||
384 | /**************************************************************/ | |
385 | ||
01ebd063 | 386 | #if 0 /* temporary disable till we add real remove station */ |
6440adb5 CB |
387 | /** |
388 | * iwl4965_remove_station - Remove driver's knowledge of station. | |
389 | * | |
390 | * NOTE: This does not remove station from device's station table. | |
391 | */ | |
c79dd5b5 | 392 | static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
b481de9c ZY |
393 | { |
394 | int index = IWL_INVALID_STATION; | |
395 | int i; | |
396 | unsigned long flags; | |
397 | ||
398 | spin_lock_irqsave(&priv->sta_lock, flags); | |
399 | ||
400 | if (is_ap) | |
401 | index = IWL_AP_ID; | |
402 | else if (is_broadcast_ether_addr(addr)) | |
5425e490 | 403 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 404 | else |
5425e490 | 405 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) |
b481de9c ZY |
406 | if (priv->stations[i].used && |
407 | !compare_ether_addr(priv->stations[i].sta.sta.addr, | |
408 | addr)) { | |
409 | index = i; | |
410 | break; | |
411 | } | |
412 | ||
413 | if (unlikely(index == IWL_INVALID_STATION)) | |
414 | goto out; | |
415 | ||
416 | if (priv->stations[index].used) { | |
417 | priv->stations[index].used = 0; | |
418 | priv->num_stations--; | |
419 | } | |
420 | ||
421 | BUG_ON(priv->num_stations < 0); | |
422 | ||
423 | out: | |
424 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
425 | return 0; | |
426 | } | |
556f8db7 | 427 | #endif |
b481de9c | 428 | |
6440adb5 CB |
429 | /** |
430 | * iwl4965_add_station_flags - Add station to tables in driver and device | |
431 | */ | |
c79dd5b5 | 432 | u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr, |
67d62035 | 433 | int is_ap, u8 flags, void *ht_data) |
b481de9c ZY |
434 | { |
435 | int i; | |
436 | int index = IWL_INVALID_STATION; | |
6def9761 | 437 | struct iwl_station_entry *station; |
b481de9c | 438 | unsigned long flags_spin; |
0795af57 | 439 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
440 | |
441 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | |
442 | if (is_ap) | |
443 | index = IWL_AP_ID; | |
444 | else if (is_broadcast_ether_addr(addr)) | |
5425e490 | 445 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 446 | else |
5425e490 | 447 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) { |
b481de9c ZY |
448 | if (!compare_ether_addr(priv->stations[i].sta.sta.addr, |
449 | addr)) { | |
450 | index = i; | |
451 | break; | |
452 | } | |
453 | ||
454 | if (!priv->stations[i].used && | |
455 | index == IWL_INVALID_STATION) | |
456 | index = i; | |
457 | } | |
458 | ||
459 | ||
9fbab516 BC |
460 | /* These two conditions have the same outcome, but keep them separate |
461 | since they have different meanings */ | |
b481de9c ZY |
462 | if (unlikely(index == IWL_INVALID_STATION)) { |
463 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
464 | return index; | |
465 | } | |
466 | ||
467 | if (priv->stations[index].used && | |
468 | !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) { | |
469 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
470 | return index; | |
471 | } | |
472 | ||
473 | ||
0795af57 | 474 | IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr)); |
b481de9c ZY |
475 | station = &priv->stations[index]; |
476 | station->used = 1; | |
477 | priv->num_stations++; | |
478 | ||
6440adb5 | 479 | /* Set up the REPLY_ADD_STA command to send to device */ |
133636de | 480 | memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd)); |
b481de9c ZY |
481 | memcpy(station->sta.sta.addr, addr, ETH_ALEN); |
482 | station->sta.mode = 0; | |
483 | station->sta.sta.sta_id = index; | |
484 | station->sta.station_flags = 0; | |
485 | ||
c8b0e6e1 | 486 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 487 | /* BCAST station and IBSS stations do not work in HT mode */ |
5425e490 | 488 | if (index != priv->hw_params.bcast_sta_id && |
b481de9c | 489 | priv->iw_mode != IEEE80211_IF_TYPE_IBSS) |
67d62035 RR |
490 | iwl4965_set_ht_add_station(priv, index, |
491 | (struct ieee80211_ht_info *) ht_data); | |
c8b0e6e1 | 492 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
493 | |
494 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
6440adb5 CB |
495 | |
496 | /* Add station to device's station table */ | |
133636de | 497 | iwl_send_add_sta(priv, &station->sta, flags); |
b481de9c ZY |
498 | return index; |
499 | ||
500 | } | |
501 | ||
b481de9c | 502 | |
b481de9c ZY |
503 | |
504 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | |
505 | ||
b481de9c | 506 | /** |
bb8c093b | 507 | * iwl4965_enqueue_hcmd - enqueue a uCode command |
b481de9c ZY |
508 | * @priv: device private data point |
509 | * @cmd: a point to the ucode command structure | |
510 | * | |
511 | * The function returns < 0 values to indicate the operation is | |
512 | * failed. On success, it turns the index (> 0) of command in the | |
513 | * command queue. | |
514 | */ | |
857485c0 | 515 | int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) |
b481de9c | 516 | { |
bb8c093b CH |
517 | struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; |
518 | struct iwl4965_queue *q = &txq->q; | |
519 | struct iwl4965_tfd_frame *tfd; | |
b481de9c | 520 | u32 *control_flags; |
857485c0 | 521 | struct iwl_cmd *out_cmd; |
b481de9c ZY |
522 | u32 idx; |
523 | u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | |
524 | dma_addr_t phys_addr; | |
525 | int ret; | |
526 | unsigned long flags; | |
527 | ||
528 | /* If any of the command structures end up being larger than | |
529 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | |
530 | * we will need to increase the size of the TFD entries */ | |
531 | BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && | |
532 | !(cmd->meta.flags & CMD_SIZE_HUGE)); | |
533 | ||
fee1247a | 534 | if (iwl_is_rfkill(priv)) { |
c342a1b9 GG |
535 | IWL_DEBUG_INFO("Not sending command - RF KILL"); |
536 | return -EIO; | |
537 | } | |
538 | ||
bb8c093b | 539 | if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { |
b481de9c ZY |
540 | IWL_ERROR("No space for Tx\n"); |
541 | return -ENOSPC; | |
542 | } | |
543 | ||
544 | spin_lock_irqsave(&priv->hcmd_lock, flags); | |
545 | ||
fc4b6853 | 546 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
547 | memset(tfd, 0, sizeof(*tfd)); |
548 | ||
549 | control_flags = (u32 *) tfd; | |
550 | ||
fc4b6853 | 551 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
b481de9c ZY |
552 | out_cmd = &txq->cmd[idx]; |
553 | ||
554 | out_cmd->hdr.cmd = cmd->id; | |
555 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | |
556 | memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); | |
557 | ||
558 | /* At this point, the out_cmd now has all of the incoming cmd | |
559 | * information */ | |
560 | ||
561 | out_cmd->hdr.flags = 0; | |
562 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) | | |
fc4b6853 | 563 | INDEX_TO_SEQ(q->write_ptr)); |
b481de9c ZY |
564 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) |
565 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | |
566 | ||
567 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | |
857485c0 | 568 | offsetof(struct iwl_cmd, hdr); |
bb8c093b | 569 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); |
b481de9c ZY |
570 | |
571 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | |
572 | "%d bytes at %d[%d]:%d\n", | |
573 | get_cmd_string(out_cmd->hdr.cmd), | |
574 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), | |
fc4b6853 | 575 | fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM); |
b481de9c ZY |
576 | |
577 | txq->need_update = 1; | |
6440adb5 CB |
578 | |
579 | /* Set up entry in queue's byte count circular buffer */ | |
e2a722eb | 580 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0); |
6440adb5 CB |
581 | |
582 | /* Increment and update queue's write index */ | |
c54b679d | 583 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
e2a722eb | 584 | ret = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
585 | |
586 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | |
587 | return ret ? ret : idx; | |
588 | } | |
589 | ||
deb09c43 EG |
590 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
591 | { | |
592 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; | |
593 | ||
594 | if (hw_decrypt) | |
595 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
596 | else | |
597 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
598 | ||
599 | } | |
600 | ||
b481de9c | 601 | /** |
bb8c093b | 602 | * iwl4965_rxon_add_station - add station into station table. |
b481de9c ZY |
603 | * |
604 | * there is only one AP station with id= IWL_AP_ID | |
9fbab516 BC |
605 | * NOTE: mutex must be held before calling this fnction |
606 | */ | |
c79dd5b5 | 607 | static int iwl4965_rxon_add_station(struct iwl_priv *priv, |
b481de9c ZY |
608 | const u8 *addr, int is_ap) |
609 | { | |
556f8db7 | 610 | u8 sta_id; |
b481de9c | 611 | |
6440adb5 | 612 | /* Add station to device's station table */ |
67d62035 RR |
613 | #ifdef CONFIG_IWL4965_HT |
614 | struct ieee80211_conf *conf = &priv->hw->conf; | |
615 | struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf; | |
616 | ||
617 | if ((is_ap) && | |
618 | (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && | |
619 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) | |
620 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
621 | 0, cur_ht_config); | |
622 | else | |
623 | #endif /* CONFIG_IWL4965_HT */ | |
624 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
625 | 0, NULL); | |
6440adb5 CB |
626 | |
627 | /* Set up default rate scaling table in device's station table */ | |
b481de9c ZY |
628 | iwl4965_add_station(priv, addr, is_ap); |
629 | ||
556f8db7 | 630 | return sta_id; |
b481de9c ZY |
631 | } |
632 | ||
b481de9c | 633 | /** |
bb8c093b | 634 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
635 | * |
636 | * NOTE: This is really only useful during development and can eventually | |
637 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
638 | * making changes | |
639 | */ | |
bb8c093b | 640 | static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c ZY |
641 | { |
642 | int error = 0; | |
643 | int counter = 1; | |
644 | ||
645 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
646 | error |= le32_to_cpu(rxon->flags & | |
647 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
648 | RXON_FLG_RADAR_DETECT_MSK)); | |
649 | if (error) | |
650 | IWL_WARNING("check 24G fields %d | %d\n", | |
651 | counter++, error); | |
652 | } else { | |
653 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
654 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
655 | if (error) | |
656 | IWL_WARNING("check 52 fields %d | %d\n", | |
657 | counter++, error); | |
658 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
659 | if (error) | |
660 | IWL_WARNING("check 52 CCK %d | %d\n", | |
661 | counter++, error); | |
662 | } | |
663 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
664 | if (error) | |
665 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
666 | ||
667 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
668 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
669 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
670 | if (error) | |
671 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
672 | ||
673 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
674 | if (error) | |
675 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
676 | ||
677 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
678 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
679 | if (error) | |
680 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
681 | counter++, error); | |
682 | ||
683 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
684 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
685 | if (error) | |
686 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
687 | counter++, error); | |
688 | ||
689 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
690 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
691 | if (error) | |
692 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
693 | counter++, error); | |
694 | ||
695 | if (error) | |
696 | IWL_WARNING("Tuning to channel %d\n", | |
697 | le16_to_cpu(rxon->channel)); | |
698 | ||
699 | if (error) { | |
bb8c093b | 700 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
701 | return -1; |
702 | } | |
703 | return 0; | |
704 | } | |
705 | ||
706 | /** | |
9fbab516 | 707 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 708 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 709 | * |
9fbab516 BC |
710 | * If the RXON structure is changing enough to require a new tune, |
711 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
712 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 713 | */ |
c79dd5b5 | 714 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
715 | { |
716 | ||
717 | /* These items are only settable from the full RXON command */ | |
718 | if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) || | |
719 | compare_ether_addr(priv->staging_rxon.bssid_addr, | |
720 | priv->active_rxon.bssid_addr) || | |
721 | compare_ether_addr(priv->staging_rxon.node_addr, | |
722 | priv->active_rxon.node_addr) || | |
723 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
724 | priv->active_rxon.wlap_bssid_addr) || | |
725 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
726 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
727 | (priv->staging_rxon.air_propagation != | |
728 | priv->active_rxon.air_propagation) || | |
729 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
730 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
731 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
732 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
733 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
734 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
735 | return 1; | |
736 | ||
737 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
738 | * be updated with the RXON_ASSOC command -- however only some | |
739 | * flag transitions are allowed using RXON_ASSOC */ | |
740 | ||
741 | /* Check if we are not switching bands */ | |
742 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
743 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
744 | return 1; | |
745 | ||
746 | /* Check if we are switching association toggle */ | |
747 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
748 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
749 | return 1; | |
750 | ||
751 | return 0; | |
752 | } | |
753 | ||
b481de9c | 754 | /** |
bb8c093b | 755 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 756 | * |
01ebd063 | 757 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
758 | * the active_rxon structure is updated with the new data. This |
759 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
760 | * a HW tune is required based on the RXON structure changes. | |
761 | */ | |
c79dd5b5 | 762 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
763 | { |
764 | /* cast away the const for active_rxon in this function */ | |
bb8c093b | 765 | struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 766 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
767 | int rc = 0; |
768 | ||
fee1247a | 769 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
770 | return -1; |
771 | ||
772 | /* always get timestamp with Rx frame */ | |
773 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
774 | ||
bb8c093b | 775 | rc = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
b481de9c ZY |
776 | if (rc) { |
777 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | |
778 | return -EINVAL; | |
779 | } | |
780 | ||
781 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 782 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 783 | * and other flags for the current radio configuration. */ |
bb8c093b | 784 | if (!iwl4965_full_rxon_required(priv)) { |
7e8c519e | 785 | rc = iwl_send_rxon_assoc(priv); |
b481de9c ZY |
786 | if (rc) { |
787 | IWL_ERROR("Error setting RXON_ASSOC " | |
788 | "configuration (%d).\n", rc); | |
789 | return rc; | |
790 | } | |
791 | ||
792 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
793 | ||
794 | return 0; | |
795 | } | |
796 | ||
797 | /* station table will be cleared */ | |
798 | priv->assoc_station_added = 0; | |
799 | ||
b481de9c ZY |
800 | /* If we are currently associated and the new config requires |
801 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
802 | * we must clear the associated from the active configuration | |
803 | * before we apply the new config */ | |
3109ece1 | 804 | if (iwl_is_associated(priv) && |
b481de9c ZY |
805 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
806 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | |
807 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
808 | ||
857485c0 | 809 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 810 | sizeof(struct iwl4965_rxon_cmd), |
b481de9c ZY |
811 | &priv->active_rxon); |
812 | ||
813 | /* If the mask clearing failed then we set | |
814 | * active_rxon back to what it was previously */ | |
815 | if (rc) { | |
816 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
817 | IWL_ERROR("Error clearing ASSOC_MSK on current " | |
818 | "configuration (%d).\n", rc); | |
819 | return rc; | |
820 | } | |
b481de9c ZY |
821 | } |
822 | ||
823 | IWL_DEBUG_INFO("Sending RXON\n" | |
824 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
825 | "* channel = %d\n" | |
0795af57 | 826 | "* bssid = %s\n", |
b481de9c ZY |
827 | ((priv->staging_rxon.filter_flags & |
828 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | |
829 | le16_to_cpu(priv->staging_rxon.channel), | |
0795af57 | 830 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 831 | |
099b40b7 | 832 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
b481de9c | 833 | /* Apply the new configuration */ |
857485c0 | 834 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 835 | sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon); |
b481de9c ZY |
836 | if (rc) { |
837 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | |
838 | return rc; | |
839 | } | |
840 | ||
bf85ea4f | 841 | iwlcore_clear_stations_table(priv); |
556f8db7 | 842 | |
b481de9c ZY |
843 | if (!priv->error_recovering) |
844 | priv->start_calib = 0; | |
845 | ||
f0832f13 | 846 | iwl_init_sensitivity(priv); |
b481de9c ZY |
847 | |
848 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
849 | ||
850 | /* If we issue a new RXON command which required a tune then we must | |
851 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
bb8c093b | 852 | rc = iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
853 | if (rc) { |
854 | IWL_ERROR("Error setting Tx power (%d).\n", rc); | |
855 | return rc; | |
856 | } | |
857 | ||
858 | /* Add the broadcast address so we can send broadcast frames */ | |
bb8c093b | 859 | if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) == |
b481de9c ZY |
860 | IWL_INVALID_STATION) { |
861 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | |
862 | return -EIO; | |
863 | } | |
864 | ||
865 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
866 | * add the IWL_AP_ID to the station rate table */ | |
3109ece1 | 867 | if (iwl_is_associated(priv) && |
b481de9c | 868 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
bb8c093b | 869 | if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
870 | == IWL_INVALID_STATION) { |
871 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
872 | return -EIO; | |
873 | } | |
874 | priv->assoc_station_added = 1; | |
6974e363 EG |
875 | if (priv->default_wep_key && |
876 | iwl_send_static_wepkey_cmd(priv, 0)) | |
877 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c ZY |
878 | } |
879 | ||
880 | return 0; | |
881 | } | |
882 | ||
5da4b55f MA |
883 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
884 | { | |
885 | ||
c7de35cd | 886 | iwl_set_rxon_chain(priv); |
5da4b55f MA |
887 | iwl4965_commit_rxon(priv); |
888 | } | |
889 | ||
c79dd5b5 | 890 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 891 | { |
bb8c093b | 892 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
893 | .flags = 3, |
894 | .lead_time = 0xAA, | |
895 | .max_kill = 1, | |
896 | .kill_ack_mask = 0, | |
897 | .kill_cts_mask = 0, | |
898 | }; | |
899 | ||
857485c0 | 900 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 901 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
902 | } |
903 | ||
c79dd5b5 | 904 | static int iwl4965_send_scan_abort(struct iwl_priv *priv) |
b481de9c | 905 | { |
db11d634 TW |
906 | int ret = 0; |
907 | struct iwl_rx_packet *res; | |
857485c0 | 908 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
909 | .id = REPLY_SCAN_ABORT_CMD, |
910 | .meta.flags = CMD_WANT_SKB, | |
911 | }; | |
912 | ||
913 | /* If there isn't a scan actively going on in the hardware | |
914 | * then we are in between scan bands and not actually | |
915 | * actively scanning, so don't send the abort command */ | |
916 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
917 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
918 | return 0; | |
919 | } | |
920 | ||
db11d634 TW |
921 | ret = iwl_send_cmd_sync(priv, &cmd); |
922 | if (ret) { | |
b481de9c | 923 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); |
db11d634 | 924 | return ret; |
b481de9c ZY |
925 | } |
926 | ||
db11d634 | 927 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
928 | if (res->u.status != CAN_ABORT_STATUS) { |
929 | /* The scan abort will return 1 for success or | |
930 | * 2 for "failure". A failure condition can be | |
931 | * due to simply not being in an active scan which | |
932 | * can occur if we send the scan abort before we | |
933 | * the microcode has notified us that a scan is | |
934 | * completed. */ | |
935 | IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status); | |
936 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
937 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
938 | } | |
939 | ||
940 | dev_kfree_skb_any(cmd.meta.u.skb); | |
941 | ||
db11d634 | 942 | return ret; |
b481de9c ZY |
943 | } |
944 | ||
b481de9c ZY |
945 | /* |
946 | * CARD_STATE_CMD | |
947 | * | |
9fbab516 | 948 | * Use: Sets the device's internal card state to enable, disable, or halt |
b481de9c ZY |
949 | * |
950 | * When in the 'enable' state the card operates as normal. | |
951 | * When in the 'disable' state, the card enters into a low power mode. | |
952 | * When in the 'halt' state, the card is shut down and must be fully | |
953 | * restarted to come back on. | |
954 | */ | |
c79dd5b5 | 955 | static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
b481de9c | 956 | { |
857485c0 | 957 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
958 | .id = REPLY_CARD_STATE_CMD, |
959 | .len = sizeof(u32), | |
960 | .data = &flags, | |
961 | .meta.flags = meta_flag, | |
962 | }; | |
963 | ||
857485c0 | 964 | return iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
965 | } |
966 | ||
c79dd5b5 | 967 | static void iwl4965_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
968 | { |
969 | struct list_head *element; | |
970 | ||
971 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
972 | priv->frames_count); | |
973 | ||
974 | while (!list_empty(&priv->free_frames)) { | |
975 | element = priv->free_frames.next; | |
976 | list_del(element); | |
bb8c093b | 977 | kfree(list_entry(element, struct iwl4965_frame, list)); |
b481de9c ZY |
978 | priv->frames_count--; |
979 | } | |
980 | ||
981 | if (priv->frames_count) { | |
982 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
983 | priv->frames_count); | |
984 | priv->frames_count = 0; | |
985 | } | |
986 | } | |
987 | ||
c79dd5b5 | 988 | static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv) |
b481de9c | 989 | { |
bb8c093b | 990 | struct iwl4965_frame *frame; |
b481de9c ZY |
991 | struct list_head *element; |
992 | if (list_empty(&priv->free_frames)) { | |
993 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
994 | if (!frame) { | |
995 | IWL_ERROR("Could not allocate frame!\n"); | |
996 | return NULL; | |
997 | } | |
998 | ||
999 | priv->frames_count++; | |
1000 | return frame; | |
1001 | } | |
1002 | ||
1003 | element = priv->free_frames.next; | |
1004 | list_del(element); | |
bb8c093b | 1005 | return list_entry(element, struct iwl4965_frame, list); |
b481de9c ZY |
1006 | } |
1007 | ||
c79dd5b5 | 1008 | static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame) |
b481de9c ZY |
1009 | { |
1010 | memset(frame, 0, sizeof(*frame)); | |
1011 | list_add(&frame->list, &priv->free_frames); | |
1012 | } | |
1013 | ||
c79dd5b5 | 1014 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c ZY |
1015 | struct ieee80211_hdr *hdr, |
1016 | const u8 *dest, int left) | |
1017 | { | |
1018 | ||
3109ece1 | 1019 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
1020 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
1021 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
1022 | return 0; | |
1023 | ||
1024 | if (priv->ibss_beacon->len > left) | |
1025 | return 0; | |
1026 | ||
1027 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
1028 | ||
1029 | return priv->ibss_beacon->len; | |
1030 | } | |
1031 | ||
39e88504 | 1032 | static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) |
b481de9c | 1033 | { |
39e88504 GC |
1034 | int i; |
1035 | int rate_mask; | |
1036 | ||
1037 | /* Set rate mask*/ | |
1038 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
1039 | rate_mask = priv->active_rate_basic & 0xF; | |
1040 | else | |
1041 | rate_mask = priv->active_rate_basic & 0xFF0; | |
b481de9c | 1042 | |
39e88504 | 1043 | /* Find lowest valid rate */ |
b481de9c | 1044 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; |
39e88504 | 1045 | i = iwl4965_rates[i].next_ieee) { |
b481de9c | 1046 | if (rate_mask & (1 << i)) |
bb8c093b | 1047 | return iwl4965_rates[i].plcp; |
b481de9c ZY |
1048 | } |
1049 | ||
39e88504 GC |
1050 | /* No valid rate was found. Assign the lowest one */ |
1051 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
1052 | return IWL_RATE_1M_PLCP; | |
1053 | else | |
1054 | return IWL_RATE_6M_PLCP; | |
b481de9c ZY |
1055 | } |
1056 | ||
c79dd5b5 | 1057 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 1058 | { |
bb8c093b | 1059 | struct iwl4965_frame *frame; |
b481de9c ZY |
1060 | unsigned int frame_size; |
1061 | int rc; | |
1062 | u8 rate; | |
1063 | ||
bb8c093b | 1064 | frame = iwl4965_get_free_frame(priv); |
b481de9c ZY |
1065 | |
1066 | if (!frame) { | |
1067 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
1068 | "command.\n"); | |
1069 | return -ENOMEM; | |
1070 | } | |
1071 | ||
39e88504 | 1072 | rate = iwl4965_rate_get_lowest_plcp(priv); |
b481de9c | 1073 | |
bb8c093b | 1074 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 1075 | |
857485c0 | 1076 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
1077 | &frame->u.cmd[0]); |
1078 | ||
bb8c093b | 1079 | iwl4965_free_frame(priv, frame); |
b481de9c ZY |
1080 | |
1081 | return rc; | |
1082 | } | |
1083 | ||
b481de9c ZY |
1084 | /****************************************************************************** |
1085 | * | |
1086 | * Misc. internal state and helper functions | |
1087 | * | |
1088 | ******************************************************************************/ | |
b481de9c | 1089 | |
b481de9c | 1090 | /** |
bb8c093b | 1091 | * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field |
b481de9c ZY |
1092 | * |
1093 | * return : set the bit for each supported rate insert in ie | |
1094 | */ | |
bb8c093b | 1095 | static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate, |
c7c46676 | 1096 | u16 basic_rate, int *left) |
b481de9c ZY |
1097 | { |
1098 | u16 ret_rates = 0, bit; | |
1099 | int i; | |
c7c46676 TW |
1100 | u8 *cnt = ie; |
1101 | u8 *rates = ie + 1; | |
b481de9c ZY |
1102 | |
1103 | for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) { | |
1104 | if (bit & supported_rate) { | |
1105 | ret_rates |= bit; | |
bb8c093b | 1106 | rates[*cnt] = iwl4965_rates[i].ieee | |
c7c46676 TW |
1107 | ((bit & basic_rate) ? 0x80 : 0x00); |
1108 | (*cnt)++; | |
1109 | (*left)--; | |
1110 | if ((*left <= 0) || | |
1111 | (*cnt >= IWL_SUPPORTED_RATES_IE_LEN)) | |
b481de9c ZY |
1112 | break; |
1113 | } | |
1114 | } | |
1115 | ||
1116 | return ret_rates; | |
1117 | } | |
1118 | ||
d1141dfb EG |
1119 | #ifdef CONFIG_IWL4965_HT |
1120 | static void iwl4965_ht_conf(struct iwl_priv *priv, | |
1121 | struct ieee80211_bss_conf *bss_conf) | |
1122 | { | |
1123 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
1124 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
1125 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
1126 | ||
1127 | IWL_DEBUG_MAC80211("enter: \n"); | |
1128 | ||
1129 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
1130 | ||
1131 | if (!iwl_conf->is_ht) | |
1132 | return; | |
1133 | ||
1134 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
1135 | ||
1136 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
1137 | iwl_conf->sgf |= 0x1; | |
1138 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) | |
1139 | iwl_conf->sgf |= 0x2; | |
1140 | ||
1141 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
1142 | iwl_conf->max_amsdu_size = | |
1143 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
1144 | ||
1145 | iwl_conf->supported_chan_width = | |
1146 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
1147 | iwl_conf->extension_chan_offset = | |
1148 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
1149 | /* If no above or below channel supplied disable FAT channel */ | |
1150 | if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE && | |
1151 | iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW) | |
1152 | iwl_conf->supported_chan_width = 0; | |
1153 | ||
1154 | iwl_conf->tx_mimo_ps_mode = | |
1155 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
1156 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
1157 | ||
1158 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
1159 | iwl_conf->tx_chan_width = | |
1160 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
1161 | iwl_conf->ht_protection = | |
1162 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
1163 | iwl_conf->non_GF_STA_present = | |
1164 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
1165 | ||
1166 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
1167 | IWL_DEBUG_MAC80211("leave\n"); | |
1168 | } | |
1169 | ||
1170 | static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband, | |
1171 | u8 *pos, int *left) | |
1172 | { | |
1173 | struct ieee80211_ht_cap *ht_cap; | |
1174 | ||
1175 | if (!sband || !sband->ht_info.ht_supported) | |
1176 | return; | |
1177 | ||
1178 | if (*left < sizeof(struct ieee80211_ht_cap)) | |
1179 | return; | |
1180 | ||
1181 | *pos++ = sizeof(struct ieee80211_ht_cap); | |
1182 | ht_cap = (struct ieee80211_ht_cap *) pos; | |
1183 | ||
1184 | ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap); | |
1185 | memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16); | |
1186 | ht_cap->ampdu_params_info = | |
1187 | (sband->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) | | |
1188 | ((sband->ht_info.ampdu_density << 2) & | |
1189 | IEEE80211_HT_CAP_AMPDU_DENSITY); | |
1190 | *left -= sizeof(struct ieee80211_ht_cap); | |
1191 | } | |
1192 | #else | |
1193 | static inline void iwl4965_ht_conf(struct iwl_priv *priv, | |
1194 | struct ieee80211_bss_conf *bss_conf) | |
1195 | { | |
1196 | } | |
1197 | static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband, | |
1198 | u8 *pos, int *left) | |
1199 | { | |
1200 | } | |
1201 | #endif | |
1202 | ||
1203 | ||
b481de9c | 1204 | /** |
bb8c093b | 1205 | * iwl4965_fill_probe_req - fill in all required fields and IE for probe request |
b481de9c | 1206 | */ |
c79dd5b5 | 1207 | static u16 iwl4965_fill_probe_req(struct iwl_priv *priv, |
78330fdd TW |
1208 | enum ieee80211_band band, |
1209 | struct ieee80211_mgmt *frame, | |
1210 | int left, int is_direct) | |
b481de9c ZY |
1211 | { |
1212 | int len = 0; | |
1213 | u8 *pos = NULL; | |
bee488db | 1214 | u16 active_rates, ret_rates, cck_rates, active_rate_basic; |
78330fdd | 1215 | const struct ieee80211_supported_band *sband = |
d1141dfb | 1216 | iwl_get_hw_mode(priv, band); |
b481de9c ZY |
1217 | |
1218 | /* Make sure there is enough space for the probe request, | |
1219 | * two mandatory IEs and the data */ | |
1220 | left -= 24; | |
1221 | if (left < 0) | |
1222 | return 0; | |
1223 | len += 24; | |
1224 | ||
1225 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | |
bb8c093b | 1226 | memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c | 1227 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); |
bb8c093b | 1228 | memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c ZY |
1229 | frame->seq_ctrl = 0; |
1230 | ||
1231 | /* fill in our indirect SSID IE */ | |
1232 | /* ...next IE... */ | |
1233 | ||
1234 | left -= 2; | |
1235 | if (left < 0) | |
1236 | return 0; | |
1237 | len += 2; | |
1238 | pos = &(frame->u.probe_req.variable[0]); | |
1239 | *pos++ = WLAN_EID_SSID; | |
1240 | *pos++ = 0; | |
1241 | ||
1242 | /* fill in our direct SSID IE... */ | |
1243 | if (is_direct) { | |
1244 | /* ...next IE... */ | |
1245 | left -= 2 + priv->essid_len; | |
1246 | if (left < 0) | |
1247 | return 0; | |
1248 | /* ... fill it in... */ | |
1249 | *pos++ = WLAN_EID_SSID; | |
1250 | *pos++ = priv->essid_len; | |
1251 | memcpy(pos, priv->essid, priv->essid_len); | |
1252 | pos += priv->essid_len; | |
1253 | len += 2 + priv->essid_len; | |
1254 | } | |
1255 | ||
1256 | /* fill in supported rate */ | |
1257 | /* ...next IE... */ | |
1258 | left -= 2; | |
1259 | if (left < 0) | |
1260 | return 0; | |
c7c46676 | 1261 | |
b481de9c ZY |
1262 | /* ... fill it in... */ |
1263 | *pos++ = WLAN_EID_SUPP_RATES; | |
1264 | *pos = 0; | |
c7c46676 | 1265 | |
bee488db | 1266 | /* exclude 60M rate */ |
1267 | active_rates = priv->rates_mask; | |
1268 | active_rates &= ~IWL_RATE_60M_MASK; | |
1269 | ||
1270 | active_rate_basic = active_rates & IWL_BASIC_RATES_MASK; | |
b481de9c | 1271 | |
c7c46676 | 1272 | cck_rates = IWL_CCK_RATES_MASK & active_rates; |
bb8c093b | 1273 | ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates, |
bee488db | 1274 | active_rate_basic, &left); |
c7c46676 TW |
1275 | active_rates &= ~ret_rates; |
1276 | ||
bb8c093b | 1277 | ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1278 | active_rate_basic, &left); |
c7c46676 TW |
1279 | active_rates &= ~ret_rates; |
1280 | ||
b481de9c ZY |
1281 | len += 2 + *pos; |
1282 | pos += (*pos) + 1; | |
c7c46676 | 1283 | if (active_rates == 0) |
b481de9c ZY |
1284 | goto fill_end; |
1285 | ||
1286 | /* fill in supported extended rate */ | |
1287 | /* ...next IE... */ | |
1288 | left -= 2; | |
1289 | if (left < 0) | |
1290 | return 0; | |
1291 | /* ... fill it in... */ | |
1292 | *pos++ = WLAN_EID_EXT_SUPP_RATES; | |
1293 | *pos = 0; | |
bb8c093b | 1294 | iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1295 | active_rate_basic, &left); |
b481de9c ZY |
1296 | if (*pos > 0) |
1297 | len += 2 + *pos; | |
1298 | ||
b481de9c | 1299 | fill_end: |
d1141dfb EG |
1300 | /* fill in HT IE */ |
1301 | left -= 2; | |
1302 | if (left < 0) | |
1303 | return 0; | |
1304 | ||
1305 | *pos++ = WLAN_EID_HT_CAPABILITY; | |
1306 | *pos = 0; | |
1307 | ||
1308 | iwl_ht_cap_to_ie(sband, pos, &left); | |
1309 | ||
1310 | if (*pos > 0) | |
1311 | len += 2 + *pos; | |
b481de9c ZY |
1312 | return (u16)len; |
1313 | } | |
1314 | ||
1315 | /* | |
1316 | * QoS support | |
1317 | */ | |
c79dd5b5 | 1318 | static int iwl4965_send_qos_params_command(struct iwl_priv *priv, |
bb8c093b | 1319 | struct iwl4965_qosparam_cmd *qos) |
b481de9c ZY |
1320 | { |
1321 | ||
857485c0 | 1322 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
bb8c093b | 1323 | sizeof(struct iwl4965_qosparam_cmd), qos); |
b481de9c ZY |
1324 | } |
1325 | ||
c79dd5b5 | 1326 | static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c ZY |
1327 | { |
1328 | unsigned long flags; | |
1329 | ||
b481de9c ZY |
1330 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
1331 | return; | |
1332 | ||
1333 | if (!priv->qos_data.qos_enable) | |
1334 | return; | |
1335 | ||
1336 | spin_lock_irqsave(&priv->lock, flags); | |
1337 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
1338 | ||
1339 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
1340 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
1341 | priv->qos_data.def_qos_parm.qos_flags |= | |
1342 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
1343 | if (priv->qos_data.qos_active) |
1344 | priv->qos_data.def_qos_parm.qos_flags |= | |
1345 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
1346 | ||
c8b0e6e1 | 1347 | #ifdef CONFIG_IWL4965_HT |
fd105e79 | 1348 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 1349 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
c8b0e6e1 | 1350 | #endif /* CONFIG_IWL4965_HT */ |
f1f1f5c7 | 1351 | |
b481de9c ZY |
1352 | spin_unlock_irqrestore(&priv->lock, flags); |
1353 | ||
3109ece1 | 1354 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
1355 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
1356 | priv->qos_data.qos_active, | |
1357 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 1358 | |
bb8c093b | 1359 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
1360 | &(priv->qos_data.def_qos_parm)); |
1361 | } | |
1362 | } | |
1363 | ||
c79dd5b5 | 1364 | int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
1365 | { |
1366 | /* Filter incoming packets to determine if they are targeted toward | |
1367 | * this network, discarding packets coming from ourselves */ | |
1368 | switch (priv->iw_mode) { | |
1369 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
1370 | /* packets from our adapter are dropped (echo) */ | |
1371 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
1372 | return 0; | |
1373 | /* {broad,multi}cast packets to our IBSS go through */ | |
1374 | if (is_multicast_ether_addr(header->addr1)) | |
1375 | return !compare_ether_addr(header->addr3, priv->bssid); | |
1376 | /* packets to our adapter go through */ | |
1377 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
1378 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
1379 | /* packets from our adapter are dropped (echo) */ | |
1380 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
1381 | return 0; | |
1382 | /* {broad,multi}cast packets to our BSS go through */ | |
1383 | if (is_multicast_ether_addr(header->addr1)) | |
1384 | return !compare_ether_addr(header->addr2, priv->bssid); | |
1385 | /* packets to our adapter go through */ | |
1386 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
69dc5d9d TW |
1387 | default: |
1388 | break; | |
b481de9c ZY |
1389 | } |
1390 | ||
1391 | return 1; | |
1392 | } | |
1393 | ||
1394 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1395 | ||
bb8c093b | 1396 | static const char *iwl4965_get_tx_fail_reason(u32 status) |
b481de9c ZY |
1397 | { |
1398 | switch (status & TX_STATUS_MSK) { | |
1399 | case TX_STATUS_SUCCESS: | |
1400 | return "SUCCESS"; | |
1401 | TX_STATUS_ENTRY(SHORT_LIMIT); | |
1402 | TX_STATUS_ENTRY(LONG_LIMIT); | |
1403 | TX_STATUS_ENTRY(FIFO_UNDERRUN); | |
1404 | TX_STATUS_ENTRY(MGMNT_ABORT); | |
1405 | TX_STATUS_ENTRY(NEXT_FRAG); | |
1406 | TX_STATUS_ENTRY(LIFE_EXPIRE); | |
1407 | TX_STATUS_ENTRY(DEST_PS); | |
1408 | TX_STATUS_ENTRY(ABORTED); | |
1409 | TX_STATUS_ENTRY(BT_RETRY); | |
1410 | TX_STATUS_ENTRY(STA_INVALID); | |
1411 | TX_STATUS_ENTRY(FRAG_DROPPED); | |
1412 | TX_STATUS_ENTRY(TID_DISABLE); | |
1413 | TX_STATUS_ENTRY(FRAME_FLUSHED); | |
1414 | TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL); | |
1415 | TX_STATUS_ENTRY(TX_LOCKED); | |
1416 | TX_STATUS_ENTRY(NO_BEACON_ON_RADAR); | |
1417 | } | |
1418 | ||
1419 | return "UNKNOWN"; | |
1420 | } | |
1421 | ||
1422 | /** | |
bb8c093b | 1423 | * iwl4965_scan_cancel - Cancel any currently executing HW scan |
b481de9c ZY |
1424 | * |
1425 | * NOTE: priv->mutex is not required before calling this function | |
1426 | */ | |
c79dd5b5 | 1427 | static int iwl4965_scan_cancel(struct iwl_priv *priv) |
b481de9c ZY |
1428 | { |
1429 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
1430 | clear_bit(STATUS_SCANNING, &priv->status); | |
1431 | return 0; | |
1432 | } | |
1433 | ||
1434 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1435 | if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1436 | IWL_DEBUG_SCAN("Queuing scan abort.\n"); | |
1437 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1438 | queue_work(priv->workqueue, &priv->abort_scan); | |
1439 | ||
1440 | } else | |
1441 | IWL_DEBUG_SCAN("Scan abort already in progress.\n"); | |
1442 | ||
1443 | return test_bit(STATUS_SCANNING, &priv->status); | |
1444 | } | |
1445 | ||
1446 | return 0; | |
1447 | } | |
1448 | ||
1449 | /** | |
bb8c093b | 1450 | * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan |
b481de9c ZY |
1451 | * @ms: amount of time to wait (in milliseconds) for scan to abort |
1452 | * | |
1453 | * NOTE: priv->mutex must be held before calling this function | |
1454 | */ | |
c79dd5b5 | 1455 | static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms) |
b481de9c ZY |
1456 | { |
1457 | unsigned long now = jiffies; | |
1458 | int ret; | |
1459 | ||
bb8c093b | 1460 | ret = iwl4965_scan_cancel(priv); |
b481de9c ZY |
1461 | if (ret && ms) { |
1462 | mutex_unlock(&priv->mutex); | |
1463 | while (!time_after(jiffies, now + msecs_to_jiffies(ms)) && | |
1464 | test_bit(STATUS_SCANNING, &priv->status)) | |
1465 | msleep(1); | |
1466 | mutex_lock(&priv->mutex); | |
1467 | ||
1468 | return test_bit(STATUS_SCANNING, &priv->status); | |
1469 | } | |
1470 | ||
1471 | return ret; | |
1472 | } | |
1473 | ||
c79dd5b5 | 1474 | static void iwl4965_sequence_reset(struct iwl_priv *priv) |
b481de9c ZY |
1475 | { |
1476 | /* Reset ieee stats */ | |
1477 | ||
1478 | /* We don't reset the net_device_stats (ieee->stats) on | |
1479 | * re-association */ | |
1480 | ||
1481 | priv->last_seq_num = -1; | |
1482 | priv->last_frag_num = -1; | |
1483 | priv->last_packet_time = 0; | |
1484 | ||
bb8c093b | 1485 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
1486 | } |
1487 | ||
1488 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
1489 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
1490 | ||
bb8c093b | 1491 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
1492 | { |
1493 | u16 new_val = 0; | |
1494 | u16 beacon_factor = 0; | |
1495 | ||
1496 | beacon_factor = | |
1497 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
1498 | / MAX_UCODE_BEACON_INTERVAL; | |
1499 | new_val = beacon_val / beacon_factor; | |
1500 | ||
1501 | return cpu_to_le16(new_val); | |
1502 | } | |
1503 | ||
c79dd5b5 | 1504 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
1505 | { |
1506 | u64 interval_tm_unit; | |
1507 | u64 tsf, result; | |
1508 | unsigned long flags; | |
1509 | struct ieee80211_conf *conf = NULL; | |
1510 | u16 beacon_int = 0; | |
1511 | ||
1512 | conf = ieee80211_get_hw_conf(priv->hw); | |
1513 | ||
1514 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
1515 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
1516 | priv->rxon_timing.timestamp.dw[0] = | |
1517 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c ZY |
1518 | |
1519 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
1520 | ||
3109ece1 | 1521 | tsf = priv->timestamp; |
b481de9c ZY |
1522 | |
1523 | beacon_int = priv->beacon_int; | |
1524 | spin_unlock_irqrestore(&priv->lock, flags); | |
1525 | ||
1526 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
1527 | if (beacon_int == 0) { | |
1528 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
1529 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
1530 | } else { | |
1531 | priv->rxon_timing.beacon_interval = | |
1532 | cpu_to_le16(beacon_int); | |
1533 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1534 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
1535 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
1536 | } | |
1537 | ||
1538 | priv->rxon_timing.atim_window = 0; | |
1539 | } else { | |
1540 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1541 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
1542 | /* TODO: we need to get atim_window from upper stack |
1543 | * for now we set to 0 */ | |
1544 | priv->rxon_timing.atim_window = 0; | |
1545 | } | |
1546 | ||
1547 | interval_tm_unit = | |
1548 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
1549 | result = do_div(tsf, interval_tm_unit); | |
1550 | priv->rxon_timing.beacon_init_val = | |
1551 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
1552 | ||
1553 | IWL_DEBUG_ASSOC | |
1554 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
1555 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
1556 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
1557 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
1558 | } | |
1559 | ||
c79dd5b5 | 1560 | static int iwl4965_scan_initiate(struct iwl_priv *priv) |
b481de9c ZY |
1561 | { |
1562 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
1563 | IWL_ERROR("APs don't scan.\n"); | |
1564 | return 0; | |
1565 | } | |
1566 | ||
fee1247a | 1567 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
1568 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); |
1569 | return -EIO; | |
1570 | } | |
1571 | ||
1572 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1573 | IWL_DEBUG_SCAN("Scan already in progress.\n"); | |
1574 | return -EAGAIN; | |
1575 | } | |
1576 | ||
1577 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1578 | IWL_DEBUG_SCAN("Scan request while abort pending. " | |
1579 | "Queuing.\n"); | |
1580 | return -EAGAIN; | |
1581 | } | |
1582 | ||
1583 | IWL_DEBUG_INFO("Starting scan...\n"); | |
1584 | priv->scan_bands = 2; | |
1585 | set_bit(STATUS_SCANNING, &priv->status); | |
1586 | priv->scan_start = jiffies; | |
1587 | priv->scan_pass_start = priv->scan_start; | |
1588 | ||
1589 | queue_work(priv->workqueue, &priv->request_scan); | |
1590 | ||
1591 | return 0; | |
1592 | } | |
1593 | ||
b481de9c | 1594 | |
c79dd5b5 | 1595 | static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv, |
8318d78a | 1596 | enum ieee80211_band band) |
b481de9c | 1597 | { |
8318d78a | 1598 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
1599 | priv->staging_rxon.flags &= |
1600 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
1601 | | RXON_FLG_CCK_MSK); | |
1602 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1603 | } else { | |
508e32e1 | 1604 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
1605 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
1606 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1607 | else | |
1608 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1609 | ||
1610 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
1611 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1612 | ||
1613 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
1614 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
1615 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
1616 | } | |
1617 | } | |
1618 | ||
1619 | /* | |
01ebd063 | 1620 | * initialize rxon structure with default values from eeprom |
b481de9c | 1621 | */ |
c79dd5b5 | 1622 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 1623 | { |
bf85ea4f | 1624 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
1625 | |
1626 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
1627 | ||
1628 | switch (priv->iw_mode) { | |
1629 | case IEEE80211_IF_TYPE_AP: | |
1630 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
1631 | break; | |
1632 | ||
1633 | case IEEE80211_IF_TYPE_STA: | |
1634 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
1635 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
1636 | break; | |
1637 | ||
1638 | case IEEE80211_IF_TYPE_IBSS: | |
1639 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
1640 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
1641 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
1642 | RXON_FILTER_ACCEPT_GRP_MSK; | |
1643 | break; | |
1644 | ||
1645 | case IEEE80211_IF_TYPE_MNTR: | |
1646 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
1647 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
1648 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
1649 | break; | |
69dc5d9d TW |
1650 | default: |
1651 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
1652 | break; | |
b481de9c ZY |
1653 | } |
1654 | ||
1655 | #if 0 | |
1656 | /* TODO: Figure out when short_preamble would be set and cache from | |
1657 | * that */ | |
1658 | if (!hw_to_local(priv->hw)->short_preamble) | |
1659 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
1660 | else | |
1661 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
1662 | #endif | |
1663 | ||
8622e705 | 1664 | ch_info = iwl_get_channel_info(priv, priv->band, |
b481de9c ZY |
1665 | le16_to_cpu(priv->staging_rxon.channel)); |
1666 | ||
1667 | if (!ch_info) | |
1668 | ch_info = &priv->channel_info[0]; | |
1669 | ||
1670 | /* | |
1671 | * in some case A channels are all non IBSS | |
1672 | * in this case force B/G channel | |
1673 | */ | |
1674 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
1675 | !(is_channel_ibss(ch_info))) | |
1676 | ch_info = &priv->channel_info[0]; | |
1677 | ||
1678 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 1679 | priv->band = ch_info->band; |
b481de9c | 1680 | |
8318d78a | 1681 | iwl4965_set_flags_for_phymode(priv, priv->band); |
b481de9c ZY |
1682 | |
1683 | priv->staging_rxon.ofdm_basic_rates = | |
1684 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
1685 | priv->staging_rxon.cck_basic_rates = | |
1686 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
1687 | ||
1688 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
1689 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
1690 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
1691 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
1692 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
1693 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
c7de35cd | 1694 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
1695 | } |
1696 | ||
c79dd5b5 | 1697 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 1698 | { |
b481de9c | 1699 | if (mode == IEEE80211_IF_TYPE_IBSS) { |
bf85ea4f | 1700 | const struct iwl_channel_info *ch_info; |
b481de9c | 1701 | |
8622e705 | 1702 | ch_info = iwl_get_channel_info(priv, |
8318d78a | 1703 | priv->band, |
b481de9c ZY |
1704 | le16_to_cpu(priv->staging_rxon.channel)); |
1705 | ||
1706 | if (!ch_info || !is_channel_ibss(ch_info)) { | |
1707 | IWL_ERROR("channel %d not IBSS channel\n", | |
1708 | le16_to_cpu(priv->staging_rxon.channel)); | |
1709 | return -EINVAL; | |
1710 | } | |
1711 | } | |
1712 | ||
b481de9c ZY |
1713 | priv->iw_mode = mode; |
1714 | ||
bb8c093b | 1715 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
1716 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
1717 | ||
bf85ea4f | 1718 | iwlcore_clear_stations_table(priv); |
b481de9c | 1719 | |
fde3571f | 1720 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 1721 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
1722 | return -EAGAIN; |
1723 | ||
1724 | cancel_delayed_work(&priv->scan_check); | |
1725 | if (iwl4965_scan_cancel_timeout(priv, 100)) { | |
1726 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); | |
1727 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
1728 | return -EAGAIN; | |
1729 | } | |
1730 | ||
bb8c093b | 1731 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
1732 | |
1733 | return 0; | |
1734 | } | |
1735 | ||
c79dd5b5 | 1736 | static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv, |
b481de9c | 1737 | struct ieee80211_tx_control *ctl, |
857485c0 | 1738 | struct iwl_cmd *cmd, |
b481de9c | 1739 | struct sk_buff *skb_frag, |
deb09c43 | 1740 | int sta_id) |
b481de9c | 1741 | { |
6def9761 | 1742 | struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo; |
6974e363 EG |
1743 | struct iwl_wep_key *wepkey; |
1744 | int keyidx = 0; | |
1745 | ||
1c014420 | 1746 | BUG_ON(ctl->hw_key->hw_key_idx > 3); |
b481de9c ZY |
1747 | |
1748 | switch (keyinfo->alg) { | |
1749 | case ALG_CCMP: | |
1750 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM; | |
1751 | memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen); | |
8236e183 MS |
1752 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
1753 | cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK; | |
b481de9c ZY |
1754 | IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n"); |
1755 | break; | |
1756 | ||
1757 | case ALG_TKIP: | |
b481de9c | 1758 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP; |
2bc75089 EG |
1759 | ieee80211_get_tkip_key(keyinfo->conf, skb_frag, |
1760 | IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key); | |
1761 | IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n"); | |
b481de9c ZY |
1762 | break; |
1763 | ||
1764 | case ALG_WEP: | |
1c014420 | 1765 | wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx]; |
6974e363 EG |
1766 | cmd->cmd.tx.sec_ctl = 0; |
1767 | if (priv->default_wep_key) { | |
1768 | /* the WEP key was sent as static */ | |
1c014420 | 1769 | keyidx = ctl->hw_key->hw_key_idx; |
6974e363 EG |
1770 | memcpy(&cmd->cmd.tx.key[3], wepkey->key, |
1771 | wepkey->key_size); | |
1772 | if (wepkey->key_size == WEP_KEY_LEN_128) | |
1773 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
1774 | } else { | |
0211ddda EG |
1775 | /* the WEP key was sent as dynamic */ |
1776 | keyidx = keyinfo->keyidx; | |
1777 | memcpy(&cmd->cmd.tx.key[3], keyinfo->key, | |
1778 | keyinfo->keylen); | |
1779 | if (keyinfo->keylen == WEP_KEY_LEN_128) | |
1780 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
6974e363 | 1781 | } |
b481de9c | 1782 | |
6974e363 EG |
1783 | cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP | |
1784 | (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT); | |
b481de9c ZY |
1785 | |
1786 | IWL_DEBUG_TX("Configuring packet for WEP encryption " | |
6974e363 | 1787 | "with key %d\n", keyidx); |
b481de9c ZY |
1788 | break; |
1789 | ||
b481de9c ZY |
1790 | default: |
1791 | printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg); | |
1792 | break; | |
1793 | } | |
1794 | } | |
1795 | ||
1796 | /* | |
1797 | * handle build REPLY_TX command notification. | |
1798 | */ | |
c79dd5b5 | 1799 | static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv, |
857485c0 | 1800 | struct iwl_cmd *cmd, |
b481de9c ZY |
1801 | struct ieee80211_tx_control *ctrl, |
1802 | struct ieee80211_hdr *hdr, | |
1803 | int is_unicast, u8 std_id) | |
1804 | { | |
1805 | __le16 *qc; | |
1806 | u16 fc = le16_to_cpu(hdr->frame_control); | |
1807 | __le32 tx_flags = cmd->cmd.tx.tx_flags; | |
1808 | ||
1809 | cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
1810 | if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) { | |
1811 | tx_flags |= TX_CMD_FLG_ACK_MSK; | |
1812 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
1813 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1814 | if (ieee80211_is_probe_response(fc) && | |
1815 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) | |
1816 | tx_flags |= TX_CMD_FLG_TSF_MSK; | |
1817 | } else { | |
1818 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | |
1819 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1820 | } | |
1821 | ||
87e4f7df TW |
1822 | if (ieee80211_is_back_request(fc)) |
1823 | tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK; | |
1824 | ||
1825 | ||
b481de9c ZY |
1826 | cmd->cmd.tx.sta_id = std_id; |
1827 | if (ieee80211_get_morefrag(hdr)) | |
1828 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | |
1829 | ||
1830 | qc = ieee80211_get_qos_ctrl(hdr); | |
1831 | if (qc) { | |
1832 | cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf); | |
1833 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | |
1834 | } else | |
1835 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1836 | ||
1837 | if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
1838 | tx_flags |= TX_CMD_FLG_RTS_MSK; | |
1839 | tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
1840 | } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) { | |
1841 | tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
1842 | tx_flags |= TX_CMD_FLG_CTS_MSK; | |
1843 | } | |
1844 | ||
1845 | if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) | |
1846 | tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | |
1847 | ||
1848 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | |
1849 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { | |
1850 | if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ || | |
1851 | (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ) | |
bc434dd2 | 1852 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); |
b481de9c | 1853 | else |
bc434dd2 | 1854 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); |
ab53d8af | 1855 | } else { |
b481de9c | 1856 | cmd->cmd.tx.timeout.pm_frame_timeout = 0; |
ab53d8af | 1857 | } |
b481de9c ZY |
1858 | |
1859 | cmd->cmd.tx.driver_txop = 0; | |
1860 | cmd->cmd.tx.tx_flags = tx_flags; | |
1861 | cmd->cmd.tx.next_frame_len = 0; | |
1862 | } | |
19758bef TW |
1863 | static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len) |
1864 | { | |
1865 | /* 0 - mgmt, 1 - cnt, 2 - data */ | |
1866 | int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2; | |
1867 | priv->tx_stats[idx].cnt++; | |
1868 | priv->tx_stats[idx].bytes += len; | |
1869 | } | |
6440adb5 CB |
1870 | /** |
1871 | * iwl4965_get_sta_id - Find station's index within station table | |
1872 | * | |
1873 | * If new IBSS station, create new entry in station table | |
1874 | */ | |
c79dd5b5 | 1875 | static int iwl4965_get_sta_id(struct iwl_priv *priv, |
9fbab516 | 1876 | struct ieee80211_hdr *hdr) |
b481de9c ZY |
1877 | { |
1878 | int sta_id; | |
1879 | u16 fc = le16_to_cpu(hdr->frame_control); | |
0795af57 | 1880 | DECLARE_MAC_BUF(mac); |
b481de9c | 1881 | |
6440adb5 | 1882 | /* If this frame is broadcast or management, use broadcast station id */ |
b481de9c ZY |
1883 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || |
1884 | is_multicast_ether_addr(hdr->addr1)) | |
5425e490 | 1885 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1886 | |
1887 | switch (priv->iw_mode) { | |
1888 | ||
6440adb5 CB |
1889 | /* If we are a client station in a BSS network, use the special |
1890 | * AP station entry (that's the only station we communicate with) */ | |
b481de9c ZY |
1891 | case IEEE80211_IF_TYPE_STA: |
1892 | return IWL_AP_ID; | |
1893 | ||
1894 | /* If we are an AP, then find the station, or use BCAST */ | |
1895 | case IEEE80211_IF_TYPE_AP: | |
947b13a7 | 1896 | sta_id = iwl_find_station(priv, hdr->addr1); |
b481de9c ZY |
1897 | if (sta_id != IWL_INVALID_STATION) |
1898 | return sta_id; | |
5425e490 | 1899 | return priv->hw_params.bcast_sta_id; |
b481de9c | 1900 | |
6440adb5 CB |
1901 | /* If this frame is going out to an IBSS network, find the station, |
1902 | * or create a new station table entry */ | |
b481de9c | 1903 | case IEEE80211_IF_TYPE_IBSS: |
947b13a7 | 1904 | sta_id = iwl_find_station(priv, hdr->addr1); |
b481de9c ZY |
1905 | if (sta_id != IWL_INVALID_STATION) |
1906 | return sta_id; | |
1907 | ||
6440adb5 | 1908 | /* Create new station table entry */ |
67d62035 RR |
1909 | sta_id = iwl4965_add_station_flags(priv, hdr->addr1, |
1910 | 0, CMD_ASYNC, NULL); | |
b481de9c ZY |
1911 | |
1912 | if (sta_id != IWL_INVALID_STATION) | |
1913 | return sta_id; | |
1914 | ||
0795af57 | 1915 | IWL_DEBUG_DROP("Station %s not in station map. " |
b481de9c | 1916 | "Defaulting to broadcast...\n", |
0795af57 | 1917 | print_mac(mac, hdr->addr1)); |
bf403db8 | 1918 | iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
5425e490 | 1919 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1920 | |
1921 | default: | |
01ebd063 | 1922 | IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode); |
5425e490 | 1923 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1924 | } |
1925 | } | |
1926 | ||
1927 | /* | |
1928 | * start REPLY_TX command process | |
1929 | */ | |
c79dd5b5 | 1930 | static int iwl4965_tx_skb(struct iwl_priv *priv, |
b481de9c ZY |
1931 | struct sk_buff *skb, struct ieee80211_tx_control *ctl) |
1932 | { | |
1933 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
bb8c093b | 1934 | struct iwl4965_tfd_frame *tfd; |
b481de9c ZY |
1935 | u32 *control_flags; |
1936 | int txq_id = ctl->queue; | |
bb8c093b CH |
1937 | struct iwl4965_tx_queue *txq = NULL; |
1938 | struct iwl4965_queue *q = NULL; | |
b481de9c ZY |
1939 | dma_addr_t phys_addr; |
1940 | dma_addr_t txcmd_phys; | |
87e4f7df | 1941 | dma_addr_t scratch_phys; |
857485c0 | 1942 | struct iwl_cmd *out_cmd = NULL; |
b481de9c ZY |
1943 | u16 len, idx, len_org; |
1944 | u8 id, hdr_len, unicast; | |
1945 | u8 sta_id; | |
1946 | u16 seq_number = 0; | |
1947 | u16 fc; | |
1948 | __le16 *qc; | |
1949 | u8 wait_write_ptr = 0; | |
1950 | unsigned long flags; | |
1951 | int rc; | |
1952 | ||
1953 | spin_lock_irqsave(&priv->lock, flags); | |
fee1247a | 1954 | if (iwl_is_rfkill(priv)) { |
b481de9c ZY |
1955 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); |
1956 | goto drop_unlock; | |
1957 | } | |
1958 | ||
32bfd35d JB |
1959 | if (!priv->vif) { |
1960 | IWL_DEBUG_DROP("Dropping - !priv->vif\n"); | |
b481de9c ZY |
1961 | goto drop_unlock; |
1962 | } | |
1963 | ||
8318d78a | 1964 | if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) { |
b481de9c ZY |
1965 | IWL_ERROR("ERROR: No TX rate available.\n"); |
1966 | goto drop_unlock; | |
1967 | } | |
1968 | ||
1969 | unicast = !is_multicast_ether_addr(hdr->addr1); | |
1970 | id = 0; | |
1971 | ||
1972 | fc = le16_to_cpu(hdr->frame_control); | |
1973 | ||
0a6857e7 | 1974 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1975 | if (ieee80211_is_auth(fc)) |
1976 | IWL_DEBUG_TX("Sending AUTH frame\n"); | |
1977 | else if (ieee80211_is_assoc_request(fc)) | |
1978 | IWL_DEBUG_TX("Sending ASSOC frame\n"); | |
1979 | else if (ieee80211_is_reassoc_request(fc)) | |
1980 | IWL_DEBUG_TX("Sending REASSOC frame\n"); | |
1981 | #endif | |
1982 | ||
7878a5a4 | 1983 | /* drop all data frame if we are not associated */ |
76f3915b | 1984 | if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) && |
3109ece1 | 1985 | (!iwl_is_associated(priv) || |
a6477249 | 1986 | ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) || |
76f3915b | 1987 | !priv->assoc_station_added)) { |
3109ece1 | 1988 | IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n"); |
b481de9c ZY |
1989 | goto drop_unlock; |
1990 | } | |
1991 | ||
1992 | spin_unlock_irqrestore(&priv->lock, flags); | |
1993 | ||
1994 | hdr_len = ieee80211_get_hdrlen(fc); | |
6440adb5 CB |
1995 | |
1996 | /* Find (or create) index into station table for destination station */ | |
bb8c093b | 1997 | sta_id = iwl4965_get_sta_id(priv, hdr); |
b481de9c | 1998 | if (sta_id == IWL_INVALID_STATION) { |
0795af57 JP |
1999 | DECLARE_MAC_BUF(mac); |
2000 | ||
2001 | IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n", | |
2002 | print_mac(mac, hdr->addr1)); | |
b481de9c ZY |
2003 | goto drop; |
2004 | } | |
2005 | ||
07bc28ed | 2006 | IWL_DEBUG_TX("station Id %d\n", sta_id); |
b481de9c ZY |
2007 | |
2008 | qc = ieee80211_get_qos_ctrl(hdr); | |
2009 | if (qc) { | |
2010 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2011 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | |
2012 | IEEE80211_SCTL_SEQ; | |
2013 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | |
2014 | (hdr->seq_ctrl & | |
2015 | __constant_cpu_to_le16(IEEE80211_SCTL_FRAG)); | |
2016 | seq_number += 0x10; | |
c8b0e6e1 | 2017 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2018 | /* aggregation is on for this <sta,tid> */ |
fe01b477 | 2019 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
b481de9c | 2020 | txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; |
fe01b477 | 2021 | priv->stations[sta_id].tid[tid].tfds_in_queue++; |
c8b0e6e1 | 2022 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 2023 | } |
6440adb5 CB |
2024 | |
2025 | /* Descriptor for chosen Tx queue */ | |
b481de9c ZY |
2026 | txq = &priv->txq[txq_id]; |
2027 | q = &txq->q; | |
2028 | ||
2029 | spin_lock_irqsave(&priv->lock, flags); | |
2030 | ||
6440adb5 | 2031 | /* Set up first empty TFD within this queue's circular TFD buffer */ |
fc4b6853 | 2032 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
2033 | memset(tfd, 0, sizeof(*tfd)); |
2034 | control_flags = (u32 *) tfd; | |
fc4b6853 | 2035 | idx = get_cmd_index(q, q->write_ptr, 0); |
b481de9c | 2036 | |
6440adb5 | 2037 | /* Set up driver data for this TFD */ |
bb8c093b | 2038 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info)); |
fc4b6853 TW |
2039 | txq->txb[q->write_ptr].skb[0] = skb; |
2040 | memcpy(&(txq->txb[q->write_ptr].status.control), | |
b481de9c | 2041 | ctl, sizeof(struct ieee80211_tx_control)); |
6440adb5 CB |
2042 | |
2043 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ | |
b481de9c ZY |
2044 | out_cmd = &txq->cmd[idx]; |
2045 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | |
2046 | memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx)); | |
6440adb5 CB |
2047 | |
2048 | /* | |
2049 | * Set up the Tx-command (not MAC!) header. | |
2050 | * Store the chosen Tx queue and TFD index within the sequence field; | |
2051 | * after Tx, uCode's Tx response will return this value so driver can | |
2052 | * locate the frame within the tx queue and do post-tx processing. | |
2053 | */ | |
b481de9c ZY |
2054 | out_cmd->hdr.cmd = REPLY_TX; |
2055 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | |
fc4b6853 | 2056 | INDEX_TO_SEQ(q->write_ptr))); |
6440adb5 CB |
2057 | |
2058 | /* Copy MAC header from skb into command buffer */ | |
b481de9c ZY |
2059 | memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len); |
2060 | ||
6440adb5 CB |
2061 | /* |
2062 | * Use the first empty entry in this queue's command buffer array | |
2063 | * to contain the Tx command and MAC header concatenated together | |
2064 | * (payload data will be in another buffer). | |
2065 | * Size of this varies, due to varying MAC header length. | |
2066 | * If end is not dword aligned, we'll have 2 extra bytes at the end | |
2067 | * of the MAC header (device reads on dword boundaries). | |
2068 | * We'll tell device about this padding later. | |
2069 | */ | |
5425e490 | 2070 | len = priv->hw_params.tx_cmd_len + |
857485c0 | 2071 | sizeof(struct iwl_cmd_header) + hdr_len; |
b481de9c ZY |
2072 | |
2073 | len_org = len; | |
2074 | len = (len + 3) & ~3; | |
2075 | ||
2076 | if (len_org != len) | |
2077 | len_org = 1; | |
2078 | else | |
2079 | len_org = 0; | |
2080 | ||
6440adb5 CB |
2081 | /* Physical address of this Tx command's header (not MAC header!), |
2082 | * within command buffer array. */ | |
857485c0 TW |
2083 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx + |
2084 | offsetof(struct iwl_cmd, hdr); | |
b481de9c | 2085 | |
6440adb5 CB |
2086 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
2087 | * first entry */ | |
bb8c093b | 2088 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
b481de9c ZY |
2089 | |
2090 | if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT)) | |
deb09c43 | 2091 | iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id); |
b481de9c | 2092 | |
6440adb5 CB |
2093 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
2094 | * if any (802.11 null frames have no payload). */ | |
b481de9c ZY |
2095 | len = skb->len - hdr_len; |
2096 | if (len) { | |
2097 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | |
2098 | len, PCI_DMA_TODEVICE); | |
bb8c093b | 2099 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); |
b481de9c ZY |
2100 | } |
2101 | ||
6440adb5 | 2102 | /* Tell 4965 about any 2-byte padding after MAC header */ |
b481de9c ZY |
2103 | if (len_org) |
2104 | out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK; | |
2105 | ||
6440adb5 | 2106 | /* Total # bytes to be transmitted */ |
b481de9c ZY |
2107 | len = (u16)skb->len; |
2108 | out_cmd->cmd.tx.len = cpu_to_le16(len); | |
2109 | ||
2110 | /* TODO need this for burst mode later on */ | |
bb8c093b | 2111 | iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id); |
b481de9c ZY |
2112 | |
2113 | /* set is_hcca to 0; it probably will never be implemented */ | |
bb8c093b | 2114 | iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0); |
b481de9c | 2115 | |
19758bef TW |
2116 | iwl_update_tx_stats(priv, fc, len); |
2117 | ||
857485c0 | 2118 | scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + |
87e4f7df TW |
2119 | offsetof(struct iwl4965_tx_cmd, scratch); |
2120 | out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys); | |
2121 | out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys); | |
2122 | ||
b481de9c ZY |
2123 | if (!ieee80211_get_morefrag(hdr)) { |
2124 | txq->need_update = 1; | |
2125 | if (qc) { | |
2126 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2127 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | |
2128 | } | |
2129 | } else { | |
2130 | wait_write_ptr = 1; | |
2131 | txq->need_update = 0; | |
2132 | } | |
2133 | ||
bf403db8 | 2134 | iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload, |
b481de9c ZY |
2135 | sizeof(out_cmd->cmd.tx)); |
2136 | ||
bf403db8 | 2137 | iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr, |
b481de9c ZY |
2138 | ieee80211_get_hdrlen(fc)); |
2139 | ||
6440adb5 | 2140 | /* Set up entry for this TFD in Tx byte-count array */ |
e2a722eb | 2141 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len); |
b481de9c | 2142 | |
6440adb5 | 2143 | /* Tell device the write index *just past* this latest filled TFD */ |
c54b679d | 2144 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
bb8c093b | 2145 | rc = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2146 | spin_unlock_irqrestore(&priv->lock, flags); |
2147 | ||
2148 | if (rc) | |
2149 | return rc; | |
2150 | ||
bb8c093b | 2151 | if ((iwl4965_queue_space(q) < q->high_mark) |
b481de9c ZY |
2152 | && priv->mac80211_registered) { |
2153 | if (wait_write_ptr) { | |
2154 | spin_lock_irqsave(&priv->lock, flags); | |
2155 | txq->need_update = 1; | |
bb8c093b | 2156 | iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2157 | spin_unlock_irqrestore(&priv->lock, flags); |
2158 | } | |
2159 | ||
2160 | ieee80211_stop_queue(priv->hw, ctl->queue); | |
2161 | } | |
2162 | ||
2163 | return 0; | |
2164 | ||
2165 | drop_unlock: | |
2166 | spin_unlock_irqrestore(&priv->lock, flags); | |
2167 | drop: | |
2168 | return -1; | |
2169 | } | |
2170 | ||
c79dd5b5 | 2171 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 2172 | { |
8318d78a | 2173 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
2174 | struct ieee80211_rate *rate; |
2175 | int i; | |
2176 | ||
d1141dfb | 2177 | hw = iwl_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
2178 | if (!hw) { |
2179 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
2180 | return; | |
2181 | } | |
b481de9c ZY |
2182 | |
2183 | priv->active_rate = 0; | |
2184 | priv->active_rate_basic = 0; | |
2185 | ||
8318d78a JB |
2186 | for (i = 0; i < hw->n_bitrates; i++) { |
2187 | rate = &(hw->bitrates[i]); | |
2188 | if (rate->hw_value < IWL_RATE_COUNT) | |
2189 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
2190 | } |
2191 | ||
2192 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
2193 | priv->active_rate, priv->active_rate_basic); | |
2194 | ||
2195 | /* | |
2196 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
2197 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
2198 | * OFDM | |
2199 | */ | |
2200 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
2201 | priv->staging_rxon.cck_basic_rates = | |
2202 | ((priv->active_rate_basic & | |
2203 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
2204 | else | |
2205 | priv->staging_rxon.cck_basic_rates = | |
2206 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
2207 | ||
2208 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
2209 | priv->staging_rxon.ofdm_basic_rates = | |
2210 | ((priv->active_rate_basic & | |
2211 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
2212 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
2213 | else | |
2214 | priv->staging_rxon.ofdm_basic_rates = | |
2215 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
2216 | } | |
2217 | ||
ad97edd2 | 2218 | void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio) |
b481de9c ZY |
2219 | { |
2220 | unsigned long flags; | |
2221 | ||
2222 | if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
2223 | return; | |
2224 | ||
2225 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n", | |
2226 | disable_radio ? "OFF" : "ON"); | |
2227 | ||
2228 | if (disable_radio) { | |
bb8c093b | 2229 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
2230 | /* FIXME: This is a workaround for AP */ |
2231 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2232 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2233 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
2234 | CSR_UCODE_SW_BIT_RFKILL); |
2235 | spin_unlock_irqrestore(&priv->lock, flags); | |
ad97edd2 | 2236 | /* call the host command only if no hw rf-kill set */ |
59003835 MA |
2237 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status) && |
2238 | iwl_is_ready(priv)) | |
ad97edd2 MA |
2239 | iwl4965_send_card_state(priv, |
2240 | CARD_STATE_CMD_DISABLE, | |
2241 | 0); | |
b481de9c | 2242 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
ad97edd2 MA |
2243 | |
2244 | /* make sure mac80211 stop sending Tx frame */ | |
2245 | if (priv->mac80211_registered) | |
2246 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2247 | } |
2248 | return; | |
2249 | } | |
2250 | ||
2251 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2252 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
b481de9c ZY |
2253 | |
2254 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
2255 | spin_unlock_irqrestore(&priv->lock, flags); | |
2256 | ||
2257 | /* wake up ucode */ | |
2258 | msleep(10); | |
2259 | ||
2260 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2261 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
2262 | if (!iwl_grab_nic_access(priv)) | |
2263 | iwl_release_nic_access(priv); | |
b481de9c ZY |
2264 | spin_unlock_irqrestore(&priv->lock, flags); |
2265 | ||
2266 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
2267 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2268 | "disabled by HW switch\n"); | |
2269 | return; | |
2270 | } | |
2271 | ||
2272 | queue_work(priv->workqueue, &priv->restart); | |
2273 | return; | |
2274 | } | |
2275 | ||
b481de9c ZY |
2276 | #define IWL_PACKET_RETRY_TIME HZ |
2277 | ||
c79dd5b5 | 2278 | int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
2279 | { |
2280 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
2281 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
2282 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
2283 | u16 *last_seq, *last_frag; | |
2284 | unsigned long *last_time; | |
2285 | ||
2286 | switch (priv->iw_mode) { | |
2287 | case IEEE80211_IF_TYPE_IBSS:{ | |
2288 | struct list_head *p; | |
bb8c093b | 2289 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
2290 | u8 *mac = header->addr2; |
2291 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
2292 | ||
2293 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 2294 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
2295 | if (!compare_ether_addr(entry->mac, mac)) |
2296 | break; | |
2297 | } | |
2298 | if (p == &priv->ibss_mac_hash[index]) { | |
2299 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
2300 | if (!entry) { | |
bc434dd2 | 2301 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
2302 | return 0; |
2303 | } | |
2304 | memcpy(entry->mac, mac, ETH_ALEN); | |
2305 | entry->seq_num = seq; | |
2306 | entry->frag_num = frag; | |
2307 | entry->packet_time = jiffies; | |
bc434dd2 | 2308 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
2309 | return 0; |
2310 | } | |
2311 | last_seq = &entry->seq_num; | |
2312 | last_frag = &entry->frag_num; | |
2313 | last_time = &entry->packet_time; | |
2314 | break; | |
2315 | } | |
2316 | case IEEE80211_IF_TYPE_STA: | |
2317 | last_seq = &priv->last_seq_num; | |
2318 | last_frag = &priv->last_frag_num; | |
2319 | last_time = &priv->last_packet_time; | |
2320 | break; | |
2321 | default: | |
2322 | return 0; | |
2323 | } | |
2324 | if ((*last_seq == seq) && | |
2325 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
2326 | if (*last_frag == frag) | |
2327 | goto drop; | |
2328 | if (*last_frag + 1 != frag) | |
2329 | /* out-of-order fragment */ | |
2330 | goto drop; | |
2331 | } else | |
2332 | *last_seq = seq; | |
2333 | ||
2334 | *last_frag = frag; | |
2335 | *last_time = jiffies; | |
2336 | return 0; | |
2337 | ||
2338 | drop: | |
2339 | return 1; | |
2340 | } | |
2341 | ||
c8b0e6e1 | 2342 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
2343 | |
2344 | #include "iwl-spectrum.h" | |
2345 | ||
2346 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
2347 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
2348 | #define TIME_UNIT 1024 | |
2349 | ||
2350 | /* | |
2351 | * extended beacon time format | |
2352 | * time in usec will be changed into a 32-bit value in 8:24 format | |
2353 | * the high 1 byte is the beacon counts | |
2354 | * the lower 3 bytes is the time in usec within one beacon interval | |
2355 | */ | |
2356 | ||
bb8c093b | 2357 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
2358 | { |
2359 | u32 quot; | |
2360 | u32 rem; | |
2361 | u32 interval = beacon_interval * 1024; | |
2362 | ||
2363 | if (!interval || !usec) | |
2364 | return 0; | |
2365 | ||
2366 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
2367 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
2368 | ||
2369 | return (quot << 24) + rem; | |
2370 | } | |
2371 | ||
2372 | /* base is usually what we get from ucode with each received frame, | |
2373 | * the same as HW timer counter counting down | |
2374 | */ | |
2375 | ||
bb8c093b | 2376 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
2377 | { |
2378 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
2379 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
2380 | u32 interval = beacon_interval * TIME_UNIT; | |
2381 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
2382 | (addon & BEACON_TIME_MASK_HIGH); | |
2383 | ||
2384 | if (base_low > addon_low) | |
2385 | res += base_low - addon_low; | |
2386 | else if (base_low < addon_low) { | |
2387 | res += interval + base_low - addon_low; | |
2388 | res += (1 << 24); | |
2389 | } else | |
2390 | res += (1 << 24); | |
2391 | ||
2392 | return cpu_to_le32(res); | |
2393 | } | |
2394 | ||
c79dd5b5 | 2395 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
2396 | struct ieee80211_measurement_params *params, |
2397 | u8 type) | |
2398 | { | |
bb8c093b | 2399 | struct iwl4965_spectrum_cmd spectrum; |
db11d634 | 2400 | struct iwl_rx_packet *res; |
857485c0 | 2401 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
2402 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
2403 | .data = (void *)&spectrum, | |
2404 | .meta.flags = CMD_WANT_SKB, | |
2405 | }; | |
2406 | u32 add_time = le64_to_cpu(params->start_time); | |
2407 | int rc; | |
2408 | int spectrum_resp_status; | |
2409 | int duration = le16_to_cpu(params->duration); | |
2410 | ||
3109ece1 | 2411 | if (iwl_is_associated(priv)) |
b481de9c | 2412 | add_time = |
bb8c093b | 2413 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
2414 | le64_to_cpu(params->start_time) - priv->last_tsf, |
2415 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2416 | ||
2417 | memset(&spectrum, 0, sizeof(spectrum)); | |
2418 | ||
2419 | spectrum.channel_count = cpu_to_le16(1); | |
2420 | spectrum.flags = | |
2421 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
2422 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
2423 | cmd.len = sizeof(spectrum); | |
2424 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
2425 | ||
3109ece1 | 2426 | if (iwl_is_associated(priv)) |
b481de9c | 2427 | spectrum.start_time = |
bb8c093b | 2428 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
2429 | add_time, |
2430 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2431 | else | |
2432 | spectrum.start_time = 0; | |
2433 | ||
2434 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
2435 | spectrum.channels[0].channel = params->channel; | |
2436 | spectrum.channels[0].type = type; | |
2437 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
2438 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
2439 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
2440 | ||
857485c0 | 2441 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
2442 | if (rc) |
2443 | return rc; | |
2444 | ||
db11d634 | 2445 | res = (struct iwl_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
2446 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
2447 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
2448 | rc = -EIO; | |
2449 | } | |
2450 | ||
2451 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
2452 | switch (spectrum_resp_status) { | |
2453 | case 0: /* Command will be handled */ | |
2454 | if (res->u.spectrum.id != 0xff) { | |
2455 | IWL_DEBUG_INFO | |
2456 | ("Replaced existing measurement: %d\n", | |
2457 | res->u.spectrum.id); | |
2458 | priv->measurement_status &= ~MEASUREMENT_READY; | |
2459 | } | |
2460 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
2461 | rc = 0; | |
2462 | break; | |
2463 | ||
2464 | case 1: /* Command will not be handled */ | |
2465 | rc = -EAGAIN; | |
2466 | break; | |
2467 | } | |
2468 | ||
2469 | dev_kfree_skb_any(cmd.meta.u.skb); | |
2470 | ||
2471 | return rc; | |
2472 | } | |
2473 | #endif | |
2474 | ||
c79dd5b5 | 2475 | static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv, |
bb8c093b | 2476 | struct iwl4965_tx_info *tx_sta) |
b481de9c ZY |
2477 | { |
2478 | ||
2479 | tx_sta->status.ack_signal = 0; | |
2480 | tx_sta->status.excessive_retries = 0; | |
b481de9c ZY |
2481 | |
2482 | if (in_interrupt()) | |
2483 | ieee80211_tx_status_irqsafe(priv->hw, | |
2484 | tx_sta->skb[0], &(tx_sta->status)); | |
2485 | else | |
2486 | ieee80211_tx_status(priv->hw, | |
2487 | tx_sta->skb[0], &(tx_sta->status)); | |
2488 | ||
2489 | tx_sta->skb[0] = NULL; | |
2490 | } | |
2491 | ||
2492 | /** | |
6440adb5 | 2493 | * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd |
b481de9c | 2494 | * |
6440adb5 CB |
2495 | * When FW advances 'R' index, all entries between old and new 'R' index |
2496 | * need to be reclaimed. As result, some free space forms. If there is | |
2497 | * enough free space (> low mark), wake the stack that feeds us. | |
b481de9c | 2498 | */ |
c79dd5b5 | 2499 | int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) |
b481de9c | 2500 | { |
bb8c093b CH |
2501 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
2502 | struct iwl4965_queue *q = &txq->q; | |
b481de9c ZY |
2503 | int nfreed = 0; |
2504 | ||
2505 | if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) { | |
2506 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | |
2507 | "is out of range [0-%d] %d %d.\n", txq_id, | |
fc4b6853 | 2508 | index, q->n_bd, q->write_ptr, q->read_ptr); |
b481de9c ZY |
2509 | return 0; |
2510 | } | |
2511 | ||
c54b679d | 2512 | for (index = iwl_queue_inc_wrap(index, q->n_bd); |
fc4b6853 | 2513 | q->read_ptr != index; |
c54b679d | 2514 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
b481de9c | 2515 | if (txq_id != IWL_CMD_QUEUE_NUM) { |
bb8c093b | 2516 | iwl4965_txstatus_to_ieee(priv, |
fc4b6853 | 2517 | &(txq->txb[txq->q.read_ptr])); |
bb8c093b | 2518 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c ZY |
2519 | } else if (nfreed > 1) { |
2520 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index, | |
fc4b6853 | 2521 | q->write_ptr, q->read_ptr); |
b481de9c ZY |
2522 | queue_work(priv->workqueue, &priv->restart); |
2523 | } | |
2524 | nfreed++; | |
2525 | } | |
2526 | ||
b481de9c ZY |
2527 | return nfreed; |
2528 | } | |
2529 | ||
bb8c093b | 2530 | static int iwl4965_is_tx_success(u32 status) |
b481de9c ZY |
2531 | { |
2532 | status &= TX_STATUS_MSK; | |
2533 | return (status == TX_STATUS_SUCCESS) | |
2534 | || (status == TX_STATUS_DIRECT_DONE); | |
2535 | } | |
2536 | ||
2537 | /****************************************************************************** | |
2538 | * | |
2539 | * Generic RX handler implementations | |
2540 | * | |
2541 | ******************************************************************************/ | |
c8b0e6e1 | 2542 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2543 | |
c79dd5b5 | 2544 | static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv, |
b481de9c ZY |
2545 | struct ieee80211_hdr *hdr) |
2546 | { | |
2547 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) | |
2548 | return IWL_AP_ID; | |
2549 | else { | |
2550 | u8 *da = ieee80211_get_DA(hdr); | |
947b13a7 | 2551 | return iwl_find_station(priv, da); |
b481de9c ZY |
2552 | } |
2553 | } | |
2554 | ||
bb8c093b | 2555 | static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr( |
c79dd5b5 | 2556 | struct iwl_priv *priv, int txq_id, int idx) |
b481de9c ZY |
2557 | { |
2558 | if (priv->txq[txq_id].txb[idx].skb[0]) | |
2559 | return (struct ieee80211_hdr *)priv->txq[txq_id]. | |
2560 | txb[idx].skb[0]->data; | |
2561 | return NULL; | |
2562 | } | |
2563 | ||
bb8c093b | 2564 | static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp) |
b481de9c ZY |
2565 | { |
2566 | __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status + | |
2567 | tx_resp->frame_count); | |
2568 | return le32_to_cpu(*scd_ssn) & MAX_SN; | |
2569 | ||
2570 | } | |
6440adb5 CB |
2571 | |
2572 | /** | |
2573 | * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue | |
2574 | */ | |
c79dd5b5 | 2575 | static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, |
6def9761 | 2576 | struct iwl_ht_agg *agg, |
fe01b477 | 2577 | struct iwl4965_tx_resp_agg *tx_resp, |
b481de9c ZY |
2578 | u16 start_idx) |
2579 | { | |
fe01b477 RR |
2580 | u16 status; |
2581 | struct agg_tx_status *frame_status = &tx_resp->status; | |
b481de9c ZY |
2582 | struct ieee80211_tx_status *tx_status = NULL; |
2583 | struct ieee80211_hdr *hdr = NULL; | |
2584 | int i, sh; | |
2585 | int txq_id, idx; | |
2586 | u16 seq; | |
2587 | ||
2588 | if (agg->wait_for_ba) | |
6440adb5 | 2589 | IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n"); |
b481de9c ZY |
2590 | |
2591 | agg->frame_count = tx_resp->frame_count; | |
2592 | agg->start_idx = start_idx; | |
2593 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 2594 | agg->bitmap = 0; |
b481de9c | 2595 | |
6440adb5 | 2596 | /* # frames attempted by Tx command */ |
b481de9c | 2597 | if (agg->frame_count == 1) { |
6440adb5 | 2598 | /* Only one frame was attempted; no block-ack will arrive */ |
fe01b477 RR |
2599 | status = le16_to_cpu(frame_status[0].status); |
2600 | seq = le16_to_cpu(frame_status[0].sequence); | |
2601 | idx = SEQ_TO_INDEX(seq); | |
2602 | txq_id = SEQ_TO_QUEUE(seq); | |
b481de9c | 2603 | |
b481de9c | 2604 | /* FIXME: code repetition */ |
fe01b477 RR |
2605 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", |
2606 | agg->frame_count, agg->start_idx, idx); | |
b481de9c | 2607 | |
fe01b477 | 2608 | tx_status = &(priv->txq[txq_id].txb[idx].status); |
b481de9c | 2609 | tx_status->retry_count = tx_resp->failure_frame; |
fe01b477 | 2610 | tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU; |
bb8c093b | 2611 | tx_status->flags = iwl4965_is_tx_success(status)? |
b481de9c | 2612 | IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
2613 | iwl4965_hwrate_to_tx_control(priv, |
2614 | le32_to_cpu(tx_resp->rate_n_flags), | |
2615 | &tx_status->control); | |
b481de9c ZY |
2616 | /* FIXME: code repetition end */ |
2617 | ||
2618 | IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n", | |
2619 | status & 0xff, tx_resp->failure_frame); | |
2620 | IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", | |
bb8c093b | 2621 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags)); |
b481de9c ZY |
2622 | |
2623 | agg->wait_for_ba = 0; | |
2624 | } else { | |
6440adb5 | 2625 | /* Two or more frames were attempted; expect block-ack */ |
b481de9c ZY |
2626 | u64 bitmap = 0; |
2627 | int start = agg->start_idx; | |
2628 | ||
6440adb5 | 2629 | /* Construct bit-map of pending frames within Tx window */ |
b481de9c ZY |
2630 | for (i = 0; i < agg->frame_count; i++) { |
2631 | u16 sc; | |
fe01b477 RR |
2632 | status = le16_to_cpu(frame_status[i].status); |
2633 | seq = le16_to_cpu(frame_status[i].sequence); | |
b481de9c ZY |
2634 | idx = SEQ_TO_INDEX(seq); |
2635 | txq_id = SEQ_TO_QUEUE(seq); | |
2636 | ||
2637 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
2638 | AGG_TX_STATE_ABORT_MSK)) | |
2639 | continue; | |
2640 | ||
2641 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", | |
2642 | agg->frame_count, txq_id, idx); | |
2643 | ||
bb8c093b | 2644 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx); |
b481de9c ZY |
2645 | |
2646 | sc = le16_to_cpu(hdr->seq_ctrl); | |
2647 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
2648 | IWL_ERROR("BUG_ON idx doesn't match seq control" | |
2649 | " idx=%d, seq_idx=%d, seq=%d\n", | |
2650 | idx, SEQ_TO_SN(sc), | |
2651 | hdr->seq_ctrl); | |
2652 | return -1; | |
2653 | } | |
2654 | ||
2655 | IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", | |
2656 | i, idx, SEQ_TO_SN(sc)); | |
2657 | ||
2658 | sh = idx - start; | |
2659 | if (sh > 64) { | |
2660 | sh = (start - idx) + 0xff; | |
2661 | bitmap = bitmap << sh; | |
2662 | sh = 0; | |
2663 | start = idx; | |
2664 | } else if (sh < -64) | |
2665 | sh = 0xff - (start - idx); | |
2666 | else if (sh < 0) { | |
2667 | sh = start - idx; | |
2668 | start = idx; | |
2669 | bitmap = bitmap << sh; | |
2670 | sh = 0; | |
2671 | } | |
2672 | bitmap |= (1 << sh); | |
2673 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | |
2674 | start, (u32)(bitmap & 0xFFFFFFFF)); | |
2675 | } | |
2676 | ||
fe01b477 | 2677 | agg->bitmap = bitmap; |
b481de9c ZY |
2678 | agg->start_idx = start; |
2679 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 2680 | IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", |
b481de9c | 2681 | agg->frame_count, agg->start_idx, |
06501d29 | 2682 | (unsigned long long)agg->bitmap); |
b481de9c ZY |
2683 | |
2684 | if (bitmap) | |
2685 | agg->wait_for_ba = 1; | |
2686 | } | |
2687 | return 0; | |
2688 | } | |
2689 | #endif | |
b481de9c | 2690 | |
6440adb5 CB |
2691 | /** |
2692 | * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response | |
2693 | */ | |
c79dd5b5 | 2694 | static void iwl4965_rx_reply_tx(struct iwl_priv *priv, |
a55360e4 | 2695 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2696 | { |
db11d634 | 2697 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2698 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
2699 | int txq_id = SEQ_TO_QUEUE(sequence); | |
2700 | int index = SEQ_TO_INDEX(sequence); | |
bb8c093b | 2701 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
b481de9c | 2702 | struct ieee80211_tx_status *tx_status; |
bb8c093b | 2703 | struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
b481de9c | 2704 | u32 status = le32_to_cpu(tx_resp->status); |
c8b0e6e1 | 2705 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2706 | int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION; |
2707 | struct ieee80211_hdr *hdr; | |
2708 | __le16 *qc; | |
b481de9c ZY |
2709 | #endif |
2710 | ||
2711 | if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) { | |
2712 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | |
2713 | "is out of range [0-%d] %d %d\n", txq_id, | |
fc4b6853 TW |
2714 | index, txq->q.n_bd, txq->q.write_ptr, |
2715 | txq->q.read_ptr); | |
b481de9c ZY |
2716 | return; |
2717 | } | |
2718 | ||
c8b0e6e1 | 2719 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2720 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index); |
2721 | qc = ieee80211_get_qos_ctrl(hdr); | |
2722 | ||
2723 | if (qc) | |
2724 | tid = le16_to_cpu(*qc) & 0xf; | |
2725 | ||
2726 | sta_id = iwl4965_get_ra_sta_id(priv, hdr); | |
2727 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { | |
2728 | IWL_ERROR("Station not known\n"); | |
2729 | return; | |
2730 | } | |
2731 | ||
b481de9c | 2732 | if (txq->sched_retry) { |
bb8c093b | 2733 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); |
6def9761 | 2734 | struct iwl_ht_agg *agg = NULL; |
b481de9c | 2735 | |
fe01b477 | 2736 | if (!qc) |
b481de9c | 2737 | return; |
b481de9c ZY |
2738 | |
2739 | agg = &priv->stations[sta_id].tid[tid].agg; | |
2740 | ||
fe01b477 RR |
2741 | iwl4965_tx_status_reply_tx(priv, agg, |
2742 | (struct iwl4965_tx_resp_agg *)tx_resp, index); | |
b481de9c ZY |
2743 | |
2744 | if ((tx_resp->frame_count == 1) && | |
bb8c093b | 2745 | !iwl4965_is_tx_success(status)) { |
b481de9c ZY |
2746 | /* TODO: send BAR */ |
2747 | } | |
2748 | ||
fe01b477 | 2749 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { |
0d0b2c1c | 2750 | int freed, ampdu_q; |
c54b679d | 2751 | index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd); |
b481de9c ZY |
2752 | IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn " |
2753 | "%d index %d\n", scd_ssn , index); | |
fe01b477 RR |
2754 | freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); |
2755 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
2756 | ||
2757 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
2758 | txq_id >= 0 && priv->mac80211_registered && | |
0d0b2c1c RR |
2759 | agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) { |
2760 | /* calculate mac80211 ampdu sw queue to wake */ | |
2761 | ampdu_q = txq_id - IWL_BACK_QUEUE_FIRST_ID + | |
2762 | priv->hw->queues; | |
2763 | if (agg->state == IWL_AGG_OFF) | |
2764 | ieee80211_wake_queue(priv->hw, txq_id); | |
2765 | else | |
2766 | ieee80211_wake_queue(priv->hw, ampdu_q); | |
2767 | } | |
fe01b477 | 2768 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); |
b481de9c ZY |
2769 | } |
2770 | } else { | |
c8b0e6e1 | 2771 | #endif /* CONFIG_IWL4965_HT */ |
fc4b6853 | 2772 | tx_status = &(txq->txb[txq->q.read_ptr].status); |
b481de9c ZY |
2773 | |
2774 | tx_status->retry_count = tx_resp->failure_frame; | |
b481de9c | 2775 | tx_status->flags = |
bb8c093b | 2776 | iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
2777 | iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags), |
2778 | &tx_status->control); | |
b481de9c | 2779 | |
b481de9c | 2780 | IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x " |
bb8c093b | 2781 | "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status), |
b481de9c ZY |
2782 | status, le32_to_cpu(tx_resp->rate_n_flags), |
2783 | tx_resp->failure_frame); | |
2784 | ||
2785 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); | |
47c5196e | 2786 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2787 | if (index != -1) { |
2788 | int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); | |
fe01b477 RR |
2789 | if (tid != MAX_TID_COUNT) |
2790 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
2791 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
0d0b2c1c | 2792 | (txq_id >= 0) && priv->mac80211_registered) |
fe01b477 RR |
2793 | ieee80211_wake_queue(priv->hw, txq_id); |
2794 | if (tid != MAX_TID_COUNT) | |
2795 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); | |
fe01b477 | 2796 | } |
b481de9c | 2797 | } |
c8b0e6e1 | 2798 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c ZY |
2799 | |
2800 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | |
2801 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | |
2802 | } | |
2803 | ||
2804 | ||
c79dd5b5 | 2805 | static void iwl4965_rx_reply_alive(struct iwl_priv *priv, |
a55360e4 | 2806 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2807 | { |
db11d634 | 2808 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2809 | struct iwl4965_alive_resp *palive; |
b481de9c ZY |
2810 | struct delayed_work *pwork; |
2811 | ||
2812 | palive = &pkt->u.alive_frame; | |
2813 | ||
2814 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
2815 | "0x%01X 0x%01X\n", | |
2816 | palive->is_valid, palive->ver_type, | |
2817 | palive->ver_subtype); | |
2818 | ||
2819 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
2820 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
2821 | memcpy(&priv->card_alive_init, | |
2822 | &pkt->u.alive_frame, | |
bb8c093b | 2823 | sizeof(struct iwl4965_init_alive_resp)); |
b481de9c ZY |
2824 | pwork = &priv->init_alive_start; |
2825 | } else { | |
2826 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2827 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
bb8c093b | 2828 | sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
2829 | pwork = &priv->alive_start; |
2830 | } | |
2831 | ||
2832 | /* We delay the ALIVE response by 5ms to | |
2833 | * give the HW RF Kill time to activate... */ | |
2834 | if (palive->is_valid == UCODE_VALID_OK) | |
2835 | queue_delayed_work(priv->workqueue, pwork, | |
2836 | msecs_to_jiffies(5)); | |
2837 | else | |
2838 | IWL_WARNING("uCode did not respond OK.\n"); | |
2839 | } | |
2840 | ||
c79dd5b5 | 2841 | static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv, |
a55360e4 | 2842 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2843 | { |
db11d634 | 2844 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2845 | |
2846 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | |
2847 | return; | |
2848 | } | |
2849 | ||
c79dd5b5 | 2850 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
a55360e4 | 2851 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2852 | { |
db11d634 | 2853 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2854 | |
2855 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
2856 | "seq 0x%04X ser 0x%08X\n", | |
2857 | le32_to_cpu(pkt->u.err_resp.error_type), | |
2858 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
2859 | pkt->u.err_resp.cmd_id, | |
2860 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
2861 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
2862 | } | |
2863 | ||
2864 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
2865 | ||
a55360e4 | 2866 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2867 | { |
db11d634 | 2868 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2869 | struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon; |
2870 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); | |
b481de9c ZY |
2871 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
2872 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
2873 | rxon->channel = csa->channel; | |
2874 | priv->staging_rxon.channel = csa->channel; | |
2875 | } | |
2876 | ||
c79dd5b5 | 2877 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
a55360e4 | 2878 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2879 | { |
c8b0e6e1 | 2880 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
db11d634 | 2881 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2882 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
b481de9c ZY |
2883 | |
2884 | if (!report->state) { | |
2885 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, | |
2886 | "Spectrum Measure Notification: Start\n"); | |
2887 | return; | |
2888 | } | |
2889 | ||
2890 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
2891 | priv->measurement_status |= MEASUREMENT_READY; | |
2892 | #endif | |
2893 | } | |
2894 | ||
c79dd5b5 | 2895 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
a55360e4 | 2896 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2897 | { |
0a6857e7 | 2898 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 2899 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 2900 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); |
b481de9c ZY |
2901 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
2902 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
2903 | #endif | |
2904 | } | |
2905 | ||
c79dd5b5 | 2906 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
a55360e4 | 2907 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2908 | { |
db11d634 | 2909 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
2910 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
2911 | "notification for %s:\n", | |
2912 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
bf403db8 | 2913 | iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
2914 | } |
2915 | ||
bb8c093b | 2916 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 2917 | { |
c79dd5b5 TW |
2918 | struct iwl_priv *priv = |
2919 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
2920 | struct sk_buff *beacon; |
2921 | ||
2922 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
32bfd35d | 2923 | beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL); |
b481de9c ZY |
2924 | |
2925 | if (!beacon) { | |
2926 | IWL_ERROR("update beacon failed\n"); | |
2927 | return; | |
2928 | } | |
2929 | ||
2930 | mutex_lock(&priv->mutex); | |
2931 | /* new beacon skb is allocated every time; dispose previous.*/ | |
2932 | if (priv->ibss_beacon) | |
2933 | dev_kfree_skb(priv->ibss_beacon); | |
2934 | ||
2935 | priv->ibss_beacon = beacon; | |
2936 | mutex_unlock(&priv->mutex); | |
2937 | ||
bb8c093b | 2938 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2939 | } |
2940 | ||
c79dd5b5 | 2941 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
a55360e4 | 2942 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2943 | { |
0a6857e7 | 2944 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 2945 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2946 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); |
2947 | u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | |
b481de9c ZY |
2948 | |
2949 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
2950 | "tsf %d %d rate %d\n", | |
2951 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | |
2952 | beacon->beacon_notify_hdr.failure_frame, | |
2953 | le32_to_cpu(beacon->ibss_mgr_status), | |
2954 | le32_to_cpu(beacon->high_tsf), | |
2955 | le32_to_cpu(beacon->low_tsf), rate); | |
2956 | #endif | |
2957 | ||
2958 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
2959 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
2960 | queue_work(priv->workqueue, &priv->beacon_update); | |
2961 | } | |
2962 | ||
2963 | /* Service response to REPLY_SCAN_CMD (0x80) */ | |
c79dd5b5 | 2964 | static void iwl4965_rx_reply_scan(struct iwl_priv *priv, |
a55360e4 | 2965 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2966 | { |
0a6857e7 | 2967 | #ifdef CONFIG_IWLWIFI_DEBUG |
db11d634 | 2968 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2969 | struct iwl4965_scanreq_notification *notif = |
2970 | (struct iwl4965_scanreq_notification *)pkt->u.raw; | |
b481de9c ZY |
2971 | |
2972 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); | |
2973 | #endif | |
2974 | } | |
2975 | ||
2976 | /* Service SCAN_START_NOTIFICATION (0x82) */ | |
c79dd5b5 | 2977 | static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv, |
a55360e4 | 2978 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2979 | { |
db11d634 | 2980 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2981 | struct iwl4965_scanstart_notification *notif = |
2982 | (struct iwl4965_scanstart_notification *)pkt->u.raw; | |
b481de9c ZY |
2983 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
2984 | IWL_DEBUG_SCAN("Scan start: " | |
2985 | "%d [802.11%s] " | |
2986 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", | |
2987 | notif->channel, | |
2988 | notif->band ? "bg" : "a", | |
2989 | notif->tsf_high, | |
2990 | notif->tsf_low, notif->status, notif->beacon_timer); | |
2991 | } | |
2992 | ||
2993 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ | |
c79dd5b5 | 2994 | static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv, |
a55360e4 | 2995 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 2996 | { |
db11d634 | 2997 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b CH |
2998 | struct iwl4965_scanresults_notification *notif = |
2999 | (struct iwl4965_scanresults_notification *)pkt->u.raw; | |
b481de9c ZY |
3000 | |
3001 | IWL_DEBUG_SCAN("Scan ch.res: " | |
3002 | "%d [802.11%s] " | |
3003 | "(TSF: 0x%08X:%08X) - %d " | |
3004 | "elapsed=%lu usec (%dms since last)\n", | |
3005 | notif->channel, | |
3006 | notif->band ? "bg" : "a", | |
3007 | le32_to_cpu(notif->tsf_high), | |
3008 | le32_to_cpu(notif->tsf_low), | |
3009 | le32_to_cpu(notif->statistics[0]), | |
3010 | le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf, | |
3011 | jiffies_to_msecs(elapsed_jiffies | |
3012 | (priv->last_scan_jiffies, jiffies))); | |
3013 | ||
3014 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 3015 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
3016 | } |
3017 | ||
3018 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ | |
c79dd5b5 | 3019 | static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv, |
a55360e4 | 3020 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 3021 | { |
db11d634 | 3022 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
bb8c093b | 3023 | struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw; |
b481de9c ZY |
3024 | |
3025 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | |
3026 | scan_notif->scanned_channels, | |
3027 | scan_notif->tsf_low, | |
3028 | scan_notif->tsf_high, scan_notif->status); | |
3029 | ||
3030 | /* The HW is no longer scanning */ | |
3031 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
3032 | ||
3033 | /* The scan completion notification came in, so kill that timer... */ | |
3034 | cancel_delayed_work(&priv->scan_check); | |
3035 | ||
3036 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | |
3037 | (priv->scan_bands == 2) ? "2.4" : "5.2", | |
3038 | jiffies_to_msecs(elapsed_jiffies | |
3039 | (priv->scan_pass_start, jiffies))); | |
3040 | ||
3041 | /* Remove this scanned band from the list | |
3042 | * of pending bands to scan */ | |
3043 | priv->scan_bands--; | |
3044 | ||
3045 | /* If a request to abort was given, or the scan did not succeed | |
3046 | * then we reset the scan state machine and terminate, | |
3047 | * re-queuing another scan if one has been requested */ | |
3048 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
3049 | IWL_DEBUG_INFO("Aborted scan completed.\n"); | |
3050 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
3051 | } else { | |
3052 | /* If there are more bands on this scan pass reschedule */ | |
3053 | if (priv->scan_bands > 0) | |
3054 | goto reschedule; | |
3055 | } | |
3056 | ||
3057 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 3058 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
3059 | IWL_DEBUG_INFO("Setting scan to off\n"); |
3060 | ||
3061 | clear_bit(STATUS_SCANNING, &priv->status); | |
3062 | ||
3063 | IWL_DEBUG_INFO("Scan took %dms\n", | |
3064 | jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies))); | |
3065 | ||
3066 | queue_work(priv->workqueue, &priv->scan_completed); | |
3067 | ||
3068 | return; | |
3069 | ||
3070 | reschedule: | |
3071 | priv->scan_pass_start = jiffies; | |
3072 | queue_work(priv->workqueue, &priv->request_scan); | |
3073 | } | |
3074 | ||
3075 | /* Handle notification from uCode that card's power state is changing | |
3076 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 3077 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
a55360e4 | 3078 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 3079 | { |
db11d634 | 3080 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3081 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
3082 | unsigned long status = priv->status; | |
3083 | ||
3084 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
3085 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
3086 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
3087 | ||
3088 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
3089 | RF_CARD_DISABLED)) { | |
3090 | ||
3395f6e9 | 3091 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
3092 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3093 | ||
3395f6e9 TW |
3094 | if (!iwl_grab_nic_access(priv)) { |
3095 | iwl_write_direct32( | |
b481de9c ZY |
3096 | priv, HBUS_TARG_MBX_C, |
3097 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
3098 | ||
3395f6e9 | 3099 | iwl_release_nic_access(priv); |
b481de9c ZY |
3100 | } |
3101 | ||
3102 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 3103 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 3104 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
3105 | if (!iwl_grab_nic_access(priv)) { |
3106 | iwl_write_direct32( | |
b481de9c ZY |
3107 | priv, HBUS_TARG_MBX_C, |
3108 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
3109 | ||
3395f6e9 | 3110 | iwl_release_nic_access(priv); |
b481de9c ZY |
3111 | } |
3112 | } | |
3113 | ||
3114 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 3115 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 3116 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
3117 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
3118 | if (!iwl_grab_nic_access(priv)) | |
3119 | iwl_release_nic_access(priv); | |
b481de9c ZY |
3120 | } |
3121 | } | |
3122 | ||
3123 | if (flags & HW_CARD_DISABLED) | |
3124 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
3125 | else | |
3126 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
3127 | ||
3128 | ||
3129 | if (flags & SW_CARD_DISABLED) | |
3130 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
3131 | else | |
3132 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
3133 | ||
3134 | if (!(flags & RXON_CARD_DISABLED)) | |
bb8c093b | 3135 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
3136 | |
3137 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
3138 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
3139 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
3140 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
3141 | queue_work(priv->workqueue, &priv->rf_kill); | |
3142 | else | |
3143 | wake_up_interruptible(&priv->wait_command_queue); | |
3144 | } | |
3145 | ||
3146 | /** | |
bb8c093b | 3147 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
3148 | * |
3149 | * Setup the RX handlers for each of the reply types sent from the uCode | |
3150 | * to the host. | |
3151 | * | |
3152 | * This function chains into the hardware specific files for them to setup | |
3153 | * any hardware specific handlers as well. | |
3154 | */ | |
c79dd5b5 | 3155 | static void iwl4965_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 3156 | { |
bb8c093b CH |
3157 | priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive; |
3158 | priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta; | |
3159 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; | |
3160 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 3161 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
3162 | iwl4965_rx_spectrum_measure_notif; |
3163 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 3164 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
3165 | iwl4965_rx_pm_debug_statistics_notif; |
3166 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 3167 | |
9fbab516 BC |
3168 | /* |
3169 | * The same handler is used for both the REPLY to a discrete | |
3170 | * statistics request from the host as well as for the periodic | |
3171 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 3172 | */ |
bb8c093b CH |
3173 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
3174 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
b481de9c | 3175 | |
bb8c093b CH |
3176 | priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan; |
3177 | priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif; | |
b481de9c | 3178 | priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] = |
bb8c093b | 3179 | iwl4965_rx_scan_results_notif; |
b481de9c | 3180 | priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] = |
bb8c093b CH |
3181 | iwl4965_rx_scan_complete_notif; |
3182 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; | |
3183 | priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx; | |
b481de9c | 3184 | |
9fbab516 | 3185 | /* Set up hardware specific Rx handlers */ |
d4789efe | 3186 | priv->cfg->ops->lib->rx_handler_setup(priv); |
b481de9c ZY |
3187 | } |
3188 | ||
3189 | /** | |
bb8c093b | 3190 | * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them |
b481de9c ZY |
3191 | * @rxb: Rx buffer to reclaim |
3192 | * | |
3193 | * If an Rx buffer has an async callback associated with it the callback | |
3194 | * will be executed. The attached skb (if present) will only be freed | |
3195 | * if the callback returns 1 | |
3196 | */ | |
c79dd5b5 | 3197 | static void iwl4965_tx_cmd_complete(struct iwl_priv *priv, |
a55360e4 | 3198 | struct iwl_rx_mem_buffer *rxb) |
b481de9c | 3199 | { |
db11d634 | 3200 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3201 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3202 | int txq_id = SEQ_TO_QUEUE(sequence); | |
3203 | int index = SEQ_TO_INDEX(sequence); | |
3204 | int huge = sequence & SEQ_HUGE_FRAME; | |
3205 | int cmd_index; | |
857485c0 | 3206 | struct iwl_cmd *cmd; |
b481de9c ZY |
3207 | |
3208 | /* If a Tx command is being handled and it isn't in the actual | |
3209 | * command queue then there a command routing bug has been introduced | |
3210 | * in the queue management code. */ | |
3211 | if (txq_id != IWL_CMD_QUEUE_NUM) | |
3212 | IWL_ERROR("Error wrong command queue %d command id 0x%X\n", | |
3213 | txq_id, pkt->hdr.cmd); | |
3214 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | |
3215 | ||
3216 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | |
3217 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | |
3218 | ||
3219 | /* Input error checking is done when commands are added to queue. */ | |
3220 | if (cmd->meta.flags & CMD_WANT_SKB) { | |
3221 | cmd->meta.source->u.skb = rxb->skb; | |
3222 | rxb->skb = NULL; | |
3223 | } else if (cmd->meta.u.callback && | |
3224 | !cmd->meta.u.callback(priv, cmd, rxb->skb)) | |
3225 | rxb->skb = NULL; | |
3226 | ||
bb8c093b | 3227 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
b481de9c ZY |
3228 | |
3229 | if (!(cmd->meta.flags & CMD_ASYNC)) { | |
3230 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
3231 | wake_up_interruptible(&priv->wait_command_queue); | |
3232 | } | |
3233 | } | |
3234 | ||
5c0eef96 MA |
3235 | /* |
3236 | * this should be called while priv->lock is locked | |
3237 | */ | |
a55360e4 | 3238 | static void __iwl_rx_replenish(struct iwl_priv *priv) |
b481de9c | 3239 | { |
a55360e4 TW |
3240 | iwl_rx_allocate(priv); |
3241 | iwl_rx_queue_restock(priv); | |
b481de9c ZY |
3242 | } |
3243 | ||
b481de9c ZY |
3244 | |
3245 | /** | |
a55360e4 | 3246 | * iwl_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
3247 | * |
3248 | * Uses the priv->rx_handlers callback function array to invoke | |
3249 | * the appropriate handlers, including command responses, | |
3250 | * frame-received notifications, and other notifications. | |
3251 | */ | |
a55360e4 | 3252 | void iwl_rx_handle(struct iwl_priv *priv) |
b481de9c | 3253 | { |
a55360e4 | 3254 | struct iwl_rx_mem_buffer *rxb; |
db11d634 | 3255 | struct iwl_rx_packet *pkt; |
a55360e4 | 3256 | struct iwl_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
3257 | u32 r, i; |
3258 | int reclaim; | |
3259 | unsigned long flags; | |
5c0eef96 | 3260 | u8 fill_rx = 0; |
d68ab680 | 3261 | u32 count = 8; |
b481de9c | 3262 | |
6440adb5 CB |
3263 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
3264 | * buffer that the driver may process (last buffer filled by ucode). */ | |
bb8c093b | 3265 | r = iwl4965_hw_get_rx_read(priv); |
b481de9c ZY |
3266 | i = rxq->read; |
3267 | ||
3268 | /* Rx interrupt, but nothing sent from uCode */ | |
3269 | if (i == r) | |
3270 | IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i); | |
3271 | ||
a55360e4 | 3272 | if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
5c0eef96 MA |
3273 | fill_rx = 1; |
3274 | ||
b481de9c ZY |
3275 | while (i != r) { |
3276 | rxb = rxq->queue[i]; | |
3277 | ||
9fbab516 | 3278 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
3279 | * then a bug has been introduced in the queue refilling |
3280 | * routines -- catch it here */ | |
3281 | BUG_ON(rxb == NULL); | |
3282 | ||
3283 | rxq->queue[i] = NULL; | |
3284 | ||
3285 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 3286 | priv->hw_params.rx_buf_size, |
b481de9c | 3287 | PCI_DMA_FROMDEVICE); |
db11d634 | 3288 | pkt = (struct iwl_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3289 | |
3290 | /* Reclaim a command buffer only if this packet is a response | |
3291 | * to a (driver-originated) command. | |
3292 | * If the packet (e.g. Rx frame) originated from uCode, | |
3293 | * there is no command buffer to reclaim. | |
3294 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
3295 | * but apparently a few don't get set; catch them here. */ | |
3296 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
3297 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 3298 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 3299 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
3300 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
3301 | (pkt->hdr.cmd != REPLY_TX); | |
3302 | ||
3303 | /* Based on type of command response or notification, | |
3304 | * handle those that need handling via function in | |
bb8c093b | 3305 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c ZY |
3306 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
3307 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
3308 | "r = %d, i = %d, %s, 0x%02x\n", r, i, | |
3309 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
3310 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | |
3311 | } else { | |
3312 | /* No handling needed */ | |
3313 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
3314 | "r %d i %d No handler needed for %s, 0x%02x\n", | |
3315 | r, i, get_cmd_string(pkt->hdr.cmd), | |
3316 | pkt->hdr.cmd); | |
3317 | } | |
3318 | ||
3319 | if (reclaim) { | |
9fbab516 | 3320 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 3321 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
3322 | * as we reclaim the driver command queue */ |
3323 | if (rxb && rxb->skb) | |
bb8c093b | 3324 | iwl4965_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
3325 | else |
3326 | IWL_WARNING("Claim null rxb?\n"); | |
3327 | } | |
3328 | ||
3329 | /* For now we just don't re-use anything. We can tweak this | |
3330 | * later to try and re-use notification packets and SKBs that | |
3331 | * fail to Rx correctly */ | |
3332 | if (rxb->skb != NULL) { | |
3333 | priv->alloc_rxb_skb--; | |
3334 | dev_kfree_skb_any(rxb->skb); | |
3335 | rxb->skb = NULL; | |
3336 | } | |
3337 | ||
3338 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 3339 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 3340 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3341 | spin_lock_irqsave(&rxq->lock, flags); |
3342 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
3343 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3344 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
3345 | /* If there are a lot of unused frames, |
3346 | * restock the Rx queue so ucode wont assert. */ | |
3347 | if (fill_rx) { | |
3348 | count++; | |
3349 | if (count >= 8) { | |
3350 | priv->rxq.read = i; | |
a55360e4 | 3351 | __iwl_rx_replenish(priv); |
5c0eef96 MA |
3352 | count = 0; |
3353 | } | |
3354 | } | |
b481de9c ZY |
3355 | } |
3356 | ||
3357 | /* Backtrack one entry */ | |
3358 | priv->rxq.read = i; | |
a55360e4 TW |
3359 | iwl_rx_queue_restock(priv); |
3360 | } | |
3361 | /* Convert linear signal-to-noise ratio into dB */ | |
3362 | static u8 ratio2dB[100] = { | |
3363 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
3364 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
3365 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
3366 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
3367 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
3368 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
3369 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
3370 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
3371 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
3372 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
3373 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
3374 | }; | |
3375 | ||
3376 | /* Calculates a relative dB value from a ratio of linear | |
3377 | * (i.e. not dB) signal levels. | |
3378 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
3379 | int iwl4965_calc_db_from_ratio(int sig_ratio) | |
3380 | { | |
3381 | /* 1000:1 or higher just report as 60 dB */ | |
3382 | if (sig_ratio >= 1000) | |
3383 | return 60; | |
3384 | ||
3385 | /* 100:1 or higher, divide by 10 and use table, | |
3386 | * add 20 dB to make up for divide by 10 */ | |
3387 | if (sig_ratio >= 100) | |
3388 | return (20 + (int)ratio2dB[sig_ratio/10]); | |
3389 | ||
3390 | /* We shouldn't see this */ | |
3391 | if (sig_ratio < 1) | |
3392 | return 0; | |
3393 | ||
3394 | /* Use table for ratios 1:1 - 99:1 */ | |
3395 | return (int)ratio2dB[sig_ratio]; | |
3396 | } | |
3397 | ||
3398 | #define PERFECT_RSSI (-20) /* dBm */ | |
3399 | #define WORST_RSSI (-95) /* dBm */ | |
3400 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
3401 | ||
3402 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
3403 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
3404 | * about formulas used below. */ | |
3405 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) | |
3406 | { | |
3407 | int sig_qual; | |
3408 | int degradation = PERFECT_RSSI - rssi_dbm; | |
3409 | ||
3410 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
3411 | * as indicator; formula is (signal dbm - noise dbm). | |
3412 | * SNR at or above 40 is a great signal (100%). | |
3413 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
3414 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
3415 | if (noise_dbm) { | |
3416 | if (rssi_dbm - noise_dbm >= 40) | |
3417 | return 100; | |
3418 | else if (rssi_dbm < noise_dbm) | |
3419 | return 0; | |
3420 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
3421 | ||
3422 | /* Else use just the signal level. | |
3423 | * This formula is a least squares fit of data points collected and | |
3424 | * compared with a reference system that had a percentage (%) display | |
3425 | * for signal quality. */ | |
3426 | } else | |
3427 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
3428 | (15 * RSSI_RANGE + 62 * degradation)) / | |
3429 | (RSSI_RANGE * RSSI_RANGE); | |
3430 | ||
3431 | if (sig_qual > 100) | |
3432 | sig_qual = 100; | |
3433 | else if (sig_qual < 1) | |
3434 | sig_qual = 0; | |
3435 | ||
3436 | return sig_qual; | |
b481de9c ZY |
3437 | } |
3438 | ||
6440adb5 CB |
3439 | /** |
3440 | * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware | |
3441 | */ | |
c79dd5b5 | 3442 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 3443 | struct iwl4965_tx_queue *txq) |
b481de9c ZY |
3444 | { |
3445 | u32 reg = 0; | |
3446 | int rc = 0; | |
3447 | int txq_id = txq->q.id; | |
3448 | ||
3449 | if (txq->need_update == 0) | |
3450 | return rc; | |
3451 | ||
3452 | /* if we're trying to save power */ | |
3453 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | |
3454 | /* wake up nic if it's powered down ... | |
3455 | * uCode will wake up, and interrupt us again, so next | |
3456 | * time we'll skip this part. */ | |
3395f6e9 | 3457 | reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
3458 | |
3459 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
3460 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | |
3395f6e9 | 3461 | iwl_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
3462 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
3463 | return rc; | |
3464 | } | |
3465 | ||
3466 | /* restore this queue's parameters in nic hardware. */ | |
3395f6e9 | 3467 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3468 | if (rc) |
3469 | return rc; | |
3395f6e9 | 3470 | iwl_write_direct32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 3471 | txq->q.write_ptr | (txq_id << 8)); |
3395f6e9 | 3472 | iwl_release_nic_access(priv); |
b481de9c ZY |
3473 | |
3474 | /* else not in power-save mode, uCode will never sleep when we're | |
3475 | * trying to tx (during RFKILL, we're not trying to tx). */ | |
3476 | } else | |
3395f6e9 | 3477 | iwl_write32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 3478 | txq->q.write_ptr | (txq_id << 8)); |
b481de9c ZY |
3479 | |
3480 | txq->need_update = 0; | |
3481 | ||
3482 | return rc; | |
3483 | } | |
3484 | ||
0a6857e7 | 3485 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3486 | static void iwl4965_print_rx_config_cmd(struct iwl_priv *priv) |
b481de9c | 3487 | { |
bf403db8 | 3488 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; |
0795af57 JP |
3489 | DECLARE_MAC_BUF(mac); |
3490 | ||
b481de9c | 3491 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
bf403db8 | 3492 | iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
3493 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
3494 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
3495 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
3496 | le32_to_cpu(rxon->filter_flags)); | |
3497 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
3498 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
3499 | rxon->ofdm_basic_rates); | |
3500 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
3501 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
3502 | print_mac(mac, rxon->node_addr)); | |
3503 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
3504 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
3505 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
3506 | } | |
3507 | #endif | |
3508 | ||
c79dd5b5 | 3509 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
3510 | { |
3511 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
3512 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 3513 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
3514 | } |
3515 | ||
0359facc MA |
3516 | /* call this function to flush any scheduled tasklet */ |
3517 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
3518 | { | |
3519 | /* wait to make sure we flush pedding tasklet*/ | |
3520 | synchronize_irq(priv->pci_dev->irq); | |
3521 | tasklet_kill(&priv->irq_tasklet); | |
3522 | } | |
3523 | ||
c79dd5b5 | 3524 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
3525 | { |
3526 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
3527 | ||
3528 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 3529 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
3530 | |
3531 | /* acknowledge/clear/reset any interrupts still pending | |
3532 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
3533 | iwl_write32(priv, CSR_INT, 0xffffffff); |
3534 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
3535 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
3536 | } | |
3537 | ||
3538 | static const char *desc_lookup(int i) | |
3539 | { | |
3540 | switch (i) { | |
3541 | case 1: | |
3542 | return "FAIL"; | |
3543 | case 2: | |
3544 | return "BAD_PARAM"; | |
3545 | case 3: | |
3546 | return "BAD_CHECKSUM"; | |
3547 | case 4: | |
3548 | return "NMI_INTERRUPT"; | |
3549 | case 5: | |
3550 | return "SYSASSERT"; | |
3551 | case 6: | |
3552 | return "FATAL_ERROR"; | |
3553 | } | |
3554 | ||
3555 | return "UNKNOWN"; | |
3556 | } | |
3557 | ||
3558 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
3559 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
3560 | ||
c79dd5b5 | 3561 | static void iwl4965_dump_nic_error_log(struct iwl_priv *priv) |
b481de9c ZY |
3562 | { |
3563 | u32 data2, line; | |
3564 | u32 desc, time, count, base, data1; | |
3565 | u32 blink1, blink2, ilink1, ilink2; | |
3566 | int rc; | |
3567 | ||
3568 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | |
3569 | ||
57aab75a | 3570 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
b481de9c ZY |
3571 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); |
3572 | return; | |
3573 | } | |
3574 | ||
3395f6e9 | 3575 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3576 | if (rc) { |
3577 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
3578 | return; | |
3579 | } | |
3580 | ||
3395f6e9 | 3581 | count = iwl_read_targ_mem(priv, base); |
b481de9c ZY |
3582 | |
3583 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | |
3584 | IWL_ERROR("Start IWL Error Log Dump:\n"); | |
2acae16e | 3585 | IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); |
b481de9c ZY |
3586 | } |
3587 | ||
3395f6e9 TW |
3588 | desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); |
3589 | blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32)); | |
3590 | blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32)); | |
3591 | ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32)); | |
3592 | ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32)); | |
3593 | data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32)); | |
3594 | data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32)); | |
3595 | line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); | |
3596 | time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); | |
b481de9c ZY |
3597 | |
3598 | IWL_ERROR("Desc Time " | |
3599 | "data1 data2 line\n"); | |
3600 | IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n", | |
3601 | desc_lookup(desc), desc, time, data1, data2, line); | |
3602 | IWL_ERROR("blink1 blink2 ilink1 ilink2\n"); | |
3603 | IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, | |
3604 | ilink1, ilink2); | |
3605 | ||
3395f6e9 | 3606 | iwl_release_nic_access(priv); |
b481de9c ZY |
3607 | } |
3608 | ||
3609 | #define EVENT_START_OFFSET (4 * sizeof(u32)) | |
3610 | ||
3611 | /** | |
bb8c093b | 3612 | * iwl4965_print_event_log - Dump error event log to syslog |
b481de9c | 3613 | * |
3395f6e9 | 3614 | * NOTE: Must be called with iwl_grab_nic_access() already obtained! |
b481de9c | 3615 | */ |
c79dd5b5 | 3616 | static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx, |
b481de9c ZY |
3617 | u32 num_events, u32 mode) |
3618 | { | |
3619 | u32 i; | |
3620 | u32 base; /* SRAM byte address of event log header */ | |
3621 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
3622 | u32 ptr; /* SRAM byte address of log data */ | |
3623 | u32 ev, time, data; /* event log data */ | |
3624 | ||
3625 | if (num_events == 0) | |
3626 | return; | |
3627 | ||
3628 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
3629 | ||
3630 | if (mode == 0) | |
3631 | event_size = 2 * sizeof(u32); | |
3632 | else | |
3633 | event_size = 3 * sizeof(u32); | |
3634 | ||
3635 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
3636 | ||
3637 | /* "time" is actually "data" for mode 0 (no timestamp). | |
3638 | * place event id # at far right for easier visual parsing. */ | |
3639 | for (i = 0; i < num_events; i++) { | |
3395f6e9 | 3640 | ev = iwl_read_targ_mem(priv, ptr); |
b481de9c | 3641 | ptr += sizeof(u32); |
3395f6e9 | 3642 | time = iwl_read_targ_mem(priv, ptr); |
b481de9c ZY |
3643 | ptr += sizeof(u32); |
3644 | if (mode == 0) | |
3645 | IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ | |
3646 | else { | |
3395f6e9 | 3647 | data = iwl_read_targ_mem(priv, ptr); |
b481de9c ZY |
3648 | ptr += sizeof(u32); |
3649 | IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); | |
3650 | } | |
3651 | } | |
3652 | } | |
3653 | ||
c79dd5b5 | 3654 | static void iwl4965_dump_nic_event_log(struct iwl_priv *priv) |
b481de9c ZY |
3655 | { |
3656 | int rc; | |
3657 | u32 base; /* SRAM byte address of event log header */ | |
3658 | u32 capacity; /* event log capacity in # entries */ | |
3659 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
3660 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
3661 | u32 next_entry; /* index of next entry to be written by uCode */ | |
3662 | u32 size; /* # entries that we'll print */ | |
3663 | ||
3664 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
57aab75a | 3665 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
b481de9c ZY |
3666 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); |
3667 | return; | |
3668 | } | |
3669 | ||
3395f6e9 | 3670 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3671 | if (rc) { |
3672 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
3673 | return; | |
3674 | } | |
3675 | ||
3676 | /* event log header */ | |
3395f6e9 TW |
3677 | capacity = iwl_read_targ_mem(priv, base); |
3678 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); | |
3679 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | |
3680 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); | |
b481de9c ZY |
3681 | |
3682 | size = num_wraps ? capacity : next_entry; | |
3683 | ||
3684 | /* bail out if nothing in log */ | |
3685 | if (size == 0) { | |
583fab37 | 3686 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); |
3395f6e9 | 3687 | iwl_release_nic_access(priv); |
b481de9c ZY |
3688 | return; |
3689 | } | |
3690 | ||
583fab37 | 3691 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", |
b481de9c ZY |
3692 | size, num_wraps); |
3693 | ||
3694 | /* if uCode has wrapped back to top of log, start at the oldest entry, | |
3695 | * i.e the next one that uCode would fill. */ | |
3696 | if (num_wraps) | |
bb8c093b | 3697 | iwl4965_print_event_log(priv, next_entry, |
b481de9c ZY |
3698 | capacity - next_entry, mode); |
3699 | ||
3700 | /* (then/else) start at top of log */ | |
bb8c093b | 3701 | iwl4965_print_event_log(priv, 0, next_entry, mode); |
b481de9c | 3702 | |
3395f6e9 | 3703 | iwl_release_nic_access(priv); |
b481de9c ZY |
3704 | } |
3705 | ||
3706 | /** | |
bb8c093b | 3707 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 3708 | */ |
c79dd5b5 | 3709 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 3710 | { |
bb8c093b | 3711 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
3712 | set_bit(STATUS_FW_ERROR, &priv->status); |
3713 | ||
3714 | /* Cancel currently queued command. */ | |
3715 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
3716 | ||
0a6857e7 | 3717 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3718 | if (priv->debug_level & IWL_DL_FW_ERRORS) { |
bb8c093b CH |
3719 | iwl4965_dump_nic_error_log(priv); |
3720 | iwl4965_dump_nic_event_log(priv); | |
bf403db8 | 3721 | iwl4965_print_rx_config_cmd(priv); |
b481de9c ZY |
3722 | } |
3723 | #endif | |
3724 | ||
3725 | wake_up_interruptible(&priv->wait_command_queue); | |
3726 | ||
3727 | /* Keep the restart process from trying to send host | |
3728 | * commands by clearing the INIT status bit */ | |
3729 | clear_bit(STATUS_READY, &priv->status); | |
3730 | ||
3731 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
3732 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS, | |
3733 | "Restarting adapter due to uCode error.\n"); | |
3734 | ||
3109ece1 | 3735 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
3736 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
3737 | sizeof(priv->recovery_rxon)); | |
3738 | priv->error_recovering = 1; | |
3739 | } | |
3740 | queue_work(priv->workqueue, &priv->restart); | |
3741 | } | |
3742 | } | |
3743 | ||
c79dd5b5 | 3744 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
3745 | { |
3746 | unsigned long flags; | |
3747 | ||
3748 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
3749 | sizeof(priv->staging_rxon)); | |
3750 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 3751 | iwl4965_commit_rxon(priv); |
b481de9c | 3752 | |
bb8c093b | 3753 | iwl4965_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
3754 | |
3755 | spin_lock_irqsave(&priv->lock, flags); | |
3756 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
3757 | priv->error_recovering = 0; | |
3758 | spin_unlock_irqrestore(&priv->lock, flags); | |
3759 | } | |
3760 | ||
c79dd5b5 | 3761 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
3762 | { |
3763 | u32 inta, handled = 0; | |
3764 | u32 inta_fh; | |
3765 | unsigned long flags; | |
0a6857e7 | 3766 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
3767 | u32 inta_mask; |
3768 | #endif | |
3769 | ||
3770 | spin_lock_irqsave(&priv->lock, flags); | |
3771 | ||
3772 | /* Ack/clear/reset pending uCode interrupts. | |
3773 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
3774 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
3775 | inta = iwl_read32(priv, CSR_INT); |
3776 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
3777 | |
3778 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
3779 | * Any new interrupts that happen after this, either while we're | |
3780 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
3781 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
3782 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 3783 | |
0a6857e7 | 3784 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3785 | if (priv->debug_level & IWL_DL_ISR) { |
9fbab516 | 3786 | /* just for debug */ |
3395f6e9 | 3787 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
3788 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
3789 | inta, inta_mask, inta_fh); | |
3790 | } | |
3791 | #endif | |
3792 | ||
3793 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
3794 | * atomic, make sure that inta covers all the interrupts that | |
3795 | * we've discovered, even if FH interrupt came in just after | |
3796 | * reading CSR_INT. */ | |
6f83eaa1 | 3797 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 3798 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 3799 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
3800 | inta |= CSR_INT_BIT_FH_TX; |
3801 | ||
3802 | /* Now service all interrupt bits discovered above. */ | |
3803 | if (inta & CSR_INT_BIT_HW_ERR) { | |
3804 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
3805 | ||
3806 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 3807 | iwl4965_disable_interrupts(priv); |
b481de9c | 3808 | |
bb8c093b | 3809 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
3810 | |
3811 | handled |= CSR_INT_BIT_HW_ERR; | |
3812 | ||
3813 | spin_unlock_irqrestore(&priv->lock, flags); | |
3814 | ||
3815 | return; | |
3816 | } | |
3817 | ||
0a6857e7 | 3818 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3819 | if (priv->debug_level & (IWL_DL_ISR)) { |
b481de9c | 3820 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
3821 | if (inta & CSR_INT_BIT_SCD) |
3822 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
3823 | "the frame/frames.\n"); | |
b481de9c ZY |
3824 | |
3825 | /* Alive notification via Rx interrupt will do the real work */ | |
3826 | if (inta & CSR_INT_BIT_ALIVE) | |
3827 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
3828 | } | |
3829 | #endif | |
3830 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 3831 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 3832 | |
9fbab516 | 3833 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
3834 | if (inta & CSR_INT_BIT_RF_KILL) { |
3835 | int hw_rf_kill = 0; | |
3395f6e9 | 3836 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
3837 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
3838 | hw_rf_kill = 1; | |
3839 | ||
3840 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR, | |
3841 | "RF_KILL bit toggled to %s.\n", | |
3842 | hw_rf_kill ? "disable radio":"enable radio"); | |
3843 | ||
3844 | /* Queue restart only if RF_KILL switch was set to "kill" | |
3845 | * when we loaded driver, and is now set to "enable". | |
3846 | * After we're Alive, RF_KILL gets handled by | |
3230455d | 3847 | * iwl4965_rx_card_state_notif() */ |
53e49093 ZY |
3848 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
3849 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 3850 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 3851 | } |
b481de9c ZY |
3852 | |
3853 | handled |= CSR_INT_BIT_RF_KILL; | |
3854 | } | |
3855 | ||
9fbab516 | 3856 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
3857 | if (inta & CSR_INT_BIT_CT_KILL) { |
3858 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
3859 | handled |= CSR_INT_BIT_CT_KILL; | |
3860 | } | |
3861 | ||
3862 | /* Error detected by uCode */ | |
3863 | if (inta & CSR_INT_BIT_SW_ERR) { | |
3864 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
3865 | inta); | |
bb8c093b | 3866 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
3867 | handled |= CSR_INT_BIT_SW_ERR; |
3868 | } | |
3869 | ||
3870 | /* uCode wakes up after power-down sleep */ | |
3871 | if (inta & CSR_INT_BIT_WAKEUP) { | |
3872 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
a55360e4 | 3873 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
bb8c093b CH |
3874 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]); |
3875 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]); | |
3876 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]); | |
3877 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]); | |
3878 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]); | |
3879 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
3880 | |
3881 | handled |= CSR_INT_BIT_WAKEUP; | |
3882 | } | |
3883 | ||
3884 | /* All uCode command responses, including Tx command responses, | |
3885 | * Rx "responses" (frame-received notification), and other | |
3886 | * notifications from uCode come through here*/ | |
3887 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
a55360e4 | 3888 | iwl_rx_handle(priv); |
b481de9c ZY |
3889 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
3890 | } | |
3891 | ||
3892 | if (inta & CSR_INT_BIT_FH_TX) { | |
3893 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
3894 | handled |= CSR_INT_BIT_FH_TX; | |
3895 | } | |
3896 | ||
3897 | if (inta & ~handled) | |
3898 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
3899 | ||
3900 | if (inta & ~CSR_INI_SET_MASK) { | |
3901 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
3902 | inta & ~CSR_INI_SET_MASK); | |
3903 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
3904 | } | |
3905 | ||
3906 | /* Re-enable all interrupts */ | |
0359facc MA |
3907 | /* only Re-enable if diabled by irq */ |
3908 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
3909 | iwl4965_enable_interrupts(priv); | |
b481de9c | 3910 | |
0a6857e7 | 3911 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 3912 | if (priv->debug_level & (IWL_DL_ISR)) { |
3395f6e9 TW |
3913 | inta = iwl_read32(priv, CSR_INT); |
3914 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
3915 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
3916 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
3917 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
3918 | } | |
3919 | #endif | |
3920 | spin_unlock_irqrestore(&priv->lock, flags); | |
3921 | } | |
3922 | ||
bb8c093b | 3923 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 3924 | { |
c79dd5b5 | 3925 | struct iwl_priv *priv = data; |
b481de9c ZY |
3926 | u32 inta, inta_mask; |
3927 | u32 inta_fh; | |
3928 | if (!priv) | |
3929 | return IRQ_NONE; | |
3930 | ||
3931 | spin_lock(&priv->lock); | |
3932 | ||
3933 | /* Disable (but don't clear!) interrupts here to avoid | |
3934 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
3935 | * If we have something to service, the tasklet will re-enable ints. | |
3936 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
3937 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
3938 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
3939 | |
3940 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
3941 | inta = iwl_read32(priv, CSR_INT); |
3942 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
3943 | |
3944 | /* Ignore interrupt if there's nothing in NIC to service. | |
3945 | * This may be due to IRQ shared with another device, | |
3946 | * or due to sporadic interrupts thrown from our NIC. */ | |
3947 | if (!inta && !inta_fh) { | |
3948 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
3949 | goto none; | |
3950 | } | |
3951 | ||
3952 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
3953 | /* Hardware disappeared. It might have already raised |
3954 | * an interrupt */ | |
b481de9c | 3955 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 3956 | goto unplugged; |
b481de9c ZY |
3957 | } |
3958 | ||
3959 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
3960 | inta, inta_mask, inta_fh); | |
3961 | ||
25c03d8e JP |
3962 | inta &= ~CSR_INT_BIT_SCD; |
3963 | ||
bb8c093b | 3964 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
3965 | if (likely(inta || inta_fh)) |
3966 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 3967 | |
66fbb541 ON |
3968 | unplugged: |
3969 | spin_unlock(&priv->lock); | |
b481de9c ZY |
3970 | return IRQ_HANDLED; |
3971 | ||
3972 | none: | |
3973 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
3974 | /* only Re-enable if diabled by irq */ |
3975 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
3976 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
3977 | spin_unlock(&priv->lock); |
3978 | return IRQ_NONE; | |
3979 | } | |
3980 | ||
b481de9c ZY |
3981 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after |
3982 | * sending probe req. This should be set long enough to hear probe responses | |
3983 | * from more than one AP. */ | |
3984 | #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
3985 | #define IWL_ACTIVE_DWELL_TIME_52 (10) | |
3986 | ||
3987 | /* For faster active scanning, scan will move to the next channel if fewer than | |
3988 | * PLCP_QUIET_THRESH packets are heard on this channel within | |
3989 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | |
3990 | * time if it's a quiet channel (nothing responded to our probe, and there's | |
3991 | * no other traffic). | |
3992 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | |
3993 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | |
3994 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */ | |
3995 | ||
3996 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | |
3997 | * Must be set longer than active dwell time. | |
3998 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | |
3999 | #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
4000 | #define IWL_PASSIVE_DWELL_TIME_52 (10) | |
4001 | #define IWL_PASSIVE_DWELL_BASE (100) | |
4002 | #define IWL_CHANNEL_TUNE_TIME 5 | |
4003 | ||
c79dd5b5 | 4004 | static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv, |
8318d78a | 4005 | enum ieee80211_band band) |
b481de9c | 4006 | { |
8318d78a | 4007 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
4008 | return IWL_ACTIVE_DWELL_TIME_52; |
4009 | else | |
4010 | return IWL_ACTIVE_DWELL_TIME_24; | |
4011 | } | |
4012 | ||
c79dd5b5 | 4013 | static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv, |
8318d78a | 4014 | enum ieee80211_band band) |
b481de9c | 4015 | { |
8318d78a JB |
4016 | u16 active = iwl4965_get_active_dwell_time(priv, band); |
4017 | u16 passive = (band != IEEE80211_BAND_5GHZ) ? | |
b481de9c ZY |
4018 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : |
4019 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; | |
4020 | ||
3109ece1 | 4021 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
4022 | /* If we're associated, we clamp the maximum passive |
4023 | * dwell time to be 98% of the beacon interval (minus | |
4024 | * 2 * channel tune time) */ | |
4025 | passive = priv->beacon_int; | |
4026 | if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive) | |
4027 | passive = IWL_PASSIVE_DWELL_BASE; | |
4028 | passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; | |
4029 | } | |
4030 | ||
4031 | if (passive <= active) | |
4032 | passive = active + 1; | |
4033 | ||
4034 | return passive; | |
4035 | } | |
4036 | ||
c79dd5b5 | 4037 | static int iwl4965_get_channels_for_scan(struct iwl_priv *priv, |
8318d78a | 4038 | enum ieee80211_band band, |
b481de9c | 4039 | u8 is_active, u8 direct_mask, |
bb8c093b | 4040 | struct iwl4965_scan_channel *scan_ch) |
b481de9c ZY |
4041 | { |
4042 | const struct ieee80211_channel *channels = NULL; | |
8318d78a | 4043 | const struct ieee80211_supported_band *sband; |
bf85ea4f | 4044 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
4045 | u16 passive_dwell = 0; |
4046 | u16 active_dwell = 0; | |
4047 | int added, i; | |
4048 | ||
d1141dfb | 4049 | sband = iwl_get_hw_mode(priv, band); |
8318d78a | 4050 | if (!sband) |
b481de9c ZY |
4051 | return 0; |
4052 | ||
8318d78a | 4053 | channels = sband->channels; |
b481de9c | 4054 | |
8318d78a JB |
4055 | active_dwell = iwl4965_get_active_dwell_time(priv, band); |
4056 | passive_dwell = iwl4965_get_passive_dwell_time(priv, band); | |
b481de9c | 4057 | |
8318d78a | 4058 | for (i = 0, added = 0; i < sband->n_channels; i++) { |
182e2e66 JB |
4059 | if (channels[i].flags & IEEE80211_CHAN_DISABLED) |
4060 | continue; | |
4061 | ||
8318d78a | 4062 | scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq); |
b481de9c | 4063 | |
8622e705 | 4064 | ch_info = iwl_get_channel_info(priv, band, |
9fbab516 | 4065 | scan_ch->channel); |
b481de9c ZY |
4066 | if (!is_channel_valid(ch_info)) { |
4067 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | |
4068 | scan_ch->channel); | |
4069 | continue; | |
4070 | } | |
4071 | ||
4072 | if (!is_active || is_channel_passive(ch_info) || | |
8318d78a | 4073 | (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) |
b481de9c ZY |
4074 | scan_ch->type = 0; /* passive */ |
4075 | else | |
4076 | scan_ch->type = 1; /* active */ | |
4077 | ||
4078 | if (scan_ch->type & 1) | |
4079 | scan_ch->type |= (direct_mask << 1); | |
4080 | ||
b481de9c ZY |
4081 | scan_ch->active_dwell = cpu_to_le16(active_dwell); |
4082 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | |
4083 | ||
9fbab516 | 4084 | /* Set txpower levels to defaults */ |
b481de9c ZY |
4085 | scan_ch->tpc.dsp_atten = 110; |
4086 | /* scan_pwr_info->tpc.dsp_atten; */ | |
4087 | ||
4088 | /*scan_pwr_info->tpc.tx_gain; */ | |
8318d78a | 4089 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
4090 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; |
4091 | else { | |
4092 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | |
4093 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | |
9fbab516 | 4094 | * power level: |
8a1b0245 | 4095 | * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; |
b481de9c ZY |
4096 | */ |
4097 | } | |
4098 | ||
4099 | IWL_DEBUG_SCAN("Scanning %d [%s %d]\n", | |
4100 | scan_ch->channel, | |
4101 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | |
4102 | (scan_ch->type & 1) ? | |
4103 | active_dwell : passive_dwell); | |
4104 | ||
4105 | scan_ch++; | |
4106 | added++; | |
4107 | } | |
4108 | ||
4109 | IWL_DEBUG_SCAN("total channels to scan %d \n", added); | |
4110 | return added; | |
4111 | } | |
4112 | ||
b481de9c ZY |
4113 | /****************************************************************************** |
4114 | * | |
4115 | * uCode download functions | |
4116 | * | |
4117 | ******************************************************************************/ | |
4118 | ||
c79dd5b5 | 4119 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 4120 | { |
98c92211 TW |
4121 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
4122 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
4123 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
4124 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
4125 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
4126 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
4127 | } |
4128 | ||
c79dd5b5 | 4129 | static void iwl4965_nic_start(struct iwl_priv *priv) |
b481de9c ZY |
4130 | { |
4131 | /* Remove all resets to allow NIC to operate */ | |
3395f6e9 | 4132 | iwl_write32(priv, CSR_RESET, 0); |
b481de9c ZY |
4133 | } |
4134 | ||
90e759d1 | 4135 | |
b481de9c | 4136 | /** |
bb8c093b | 4137 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
4138 | * |
4139 | * Copy into buffers for card to fetch via bus-mastering | |
4140 | */ | |
c79dd5b5 | 4141 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 4142 | { |
bb8c093b | 4143 | struct iwl4965_ucode *ucode; |
90e759d1 | 4144 | int ret; |
b481de9c | 4145 | const struct firmware *ucode_raw; |
4bf775cd | 4146 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
4147 | u8 *src; |
4148 | size_t len; | |
4149 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
4150 | ||
4151 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
4152 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
4153 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
4154 | if (ret < 0) { | |
4155 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
4156 | name, ret); | |
b481de9c ZY |
4157 | goto error; |
4158 | } | |
4159 | ||
4160 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
4161 | name, ucode_raw->size); | |
4162 | ||
4163 | /* Make sure that we got at least our header! */ | |
4164 | if (ucode_raw->size < sizeof(*ucode)) { | |
4165 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 4166 | ret = -EINVAL; |
b481de9c ZY |
4167 | goto err_release; |
4168 | } | |
4169 | ||
4170 | /* Data from ucode file: header followed by uCode images */ | |
4171 | ucode = (void *)ucode_raw->data; | |
4172 | ||
4173 | ver = le32_to_cpu(ucode->ver); | |
4174 | inst_size = le32_to_cpu(ucode->inst_size); | |
4175 | data_size = le32_to_cpu(ucode->data_size); | |
4176 | init_size = le32_to_cpu(ucode->init_size); | |
4177 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
4178 | boot_size = le32_to_cpu(ucode->boot_size); | |
4179 | ||
4180 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
4181 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
4182 | inst_size); | |
4183 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
4184 | data_size); | |
4185 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
4186 | init_size); | |
4187 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
4188 | init_data_size); | |
4189 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
4190 | boot_size); | |
4191 | ||
4192 | /* Verify size of file vs. image size info in file's header */ | |
4193 | if (ucode_raw->size < sizeof(*ucode) + | |
4194 | inst_size + data_size + init_size + | |
4195 | init_data_size + boot_size) { | |
4196 | ||
4197 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
4198 | (int)ucode_raw->size); | |
90e759d1 | 4199 | ret = -EINVAL; |
b481de9c ZY |
4200 | goto err_release; |
4201 | } | |
4202 | ||
4203 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 4204 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
4205 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
4206 | inst_size); | |
4207 | ret = -EINVAL; | |
b481de9c ZY |
4208 | goto err_release; |
4209 | } | |
4210 | ||
099b40b7 | 4211 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
4212 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
4213 | data_size); | |
4214 | ret = -EINVAL; | |
b481de9c ZY |
4215 | goto err_release; |
4216 | } | |
099b40b7 | 4217 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 4218 | IWL_DEBUG_INFO |
90e759d1 TW |
4219 | ("uCode init instr len %d too large to fit in\n", |
4220 | init_size); | |
4221 | ret = -EINVAL; | |
b481de9c ZY |
4222 | goto err_release; |
4223 | } | |
099b40b7 | 4224 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 4225 | IWL_DEBUG_INFO |
90e759d1 TW |
4226 | ("uCode init data len %d too large to fit in\n", |
4227 | init_data_size); | |
4228 | ret = -EINVAL; | |
b481de9c ZY |
4229 | goto err_release; |
4230 | } | |
099b40b7 | 4231 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 4232 | IWL_DEBUG_INFO |
90e759d1 TW |
4233 | ("uCode boot instr len %d too large to fit in\n", |
4234 | boot_size); | |
4235 | ret = -EINVAL; | |
b481de9c ZY |
4236 | goto err_release; |
4237 | } | |
4238 | ||
4239 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
4240 | ||
4241 | /* Runtime instructions and 2 copies of data: | |
4242 | * 1) unmodified from disk | |
4243 | * 2) backup cache for save/restore during power-downs */ | |
4244 | priv->ucode_code.len = inst_size; | |
98c92211 | 4245 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
4246 | |
4247 | priv->ucode_data.len = data_size; | |
98c92211 | 4248 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
4249 | |
4250 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 4251 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
4252 | |
4253 | /* Initialization instructions and data */ | |
90e759d1 TW |
4254 | if (init_size && init_data_size) { |
4255 | priv->ucode_init.len = init_size; | |
98c92211 | 4256 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
4257 | |
4258 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 4259 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
4260 | |
4261 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
4262 | goto err_pci_alloc; | |
4263 | } | |
b481de9c ZY |
4264 | |
4265 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
4266 | if (boot_size) { |
4267 | priv->ucode_boot.len = boot_size; | |
98c92211 | 4268 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 4269 | |
90e759d1 TW |
4270 | if (!priv->ucode_boot.v_addr) |
4271 | goto err_pci_alloc; | |
4272 | } | |
b481de9c ZY |
4273 | |
4274 | /* Copy images into buffers for card's bus-master reads ... */ | |
4275 | ||
4276 | /* Runtime instructions (first block of data in file) */ | |
4277 | src = &ucode->data[0]; | |
4278 | len = priv->ucode_code.len; | |
90e759d1 | 4279 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
4280 | memcpy(priv->ucode_code.v_addr, src, len); |
4281 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
4282 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
4283 | ||
4284 | /* Runtime data (2nd block) | |
bb8c093b | 4285 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
4286 | src = &ucode->data[inst_size]; |
4287 | len = priv->ucode_data.len; | |
90e759d1 | 4288 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
4289 | memcpy(priv->ucode_data.v_addr, src, len); |
4290 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
4291 | ||
4292 | /* Initialization instructions (3rd block) */ | |
4293 | if (init_size) { | |
4294 | src = &ucode->data[inst_size + data_size]; | |
4295 | len = priv->ucode_init.len; | |
90e759d1 TW |
4296 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
4297 | len); | |
b481de9c ZY |
4298 | memcpy(priv->ucode_init.v_addr, src, len); |
4299 | } | |
4300 | ||
4301 | /* Initialization data (4th block) */ | |
4302 | if (init_data_size) { | |
4303 | src = &ucode->data[inst_size + data_size + init_size]; | |
4304 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
4305 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
4306 | len); | |
b481de9c ZY |
4307 | memcpy(priv->ucode_init_data.v_addr, src, len); |
4308 | } | |
4309 | ||
4310 | /* Bootstrap instructions (5th block) */ | |
4311 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
4312 | len = priv->ucode_boot.len; | |
90e759d1 | 4313 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
4314 | memcpy(priv->ucode_boot.v_addr, src, len); |
4315 | ||
4316 | /* We have our copies now, allow OS release its copies */ | |
4317 | release_firmware(ucode_raw); | |
4318 | return 0; | |
4319 | ||
4320 | err_pci_alloc: | |
4321 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 4322 | ret = -ENOMEM; |
bb8c093b | 4323 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4324 | |
4325 | err_release: | |
4326 | release_firmware(ucode_raw); | |
4327 | ||
4328 | error: | |
90e759d1 | 4329 | return ret; |
b481de9c ZY |
4330 | } |
4331 | ||
4332 | ||
4333 | /** | |
bb8c093b | 4334 | * iwl4965_set_ucode_ptrs - Set uCode address location |
b481de9c ZY |
4335 | * |
4336 | * Tell initialization uCode where to find runtime uCode. | |
4337 | * | |
4338 | * BSM registers initially contain pointers to initialization uCode. | |
4339 | * We need to replace them to load runtime uCode inst and data, | |
4340 | * and to save runtime data when powering down. | |
4341 | */ | |
c79dd5b5 | 4342 | static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) |
b481de9c ZY |
4343 | { |
4344 | dma_addr_t pinst; | |
4345 | dma_addr_t pdata; | |
4346 | int rc = 0; | |
4347 | unsigned long flags; | |
4348 | ||
4349 | /* bits 35:4 for 4965 */ | |
4350 | pinst = priv->ucode_code.p_addr >> 4; | |
4351 | pdata = priv->ucode_data_backup.p_addr >> 4; | |
4352 | ||
4353 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 4354 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
4355 | if (rc) { |
4356 | spin_unlock_irqrestore(&priv->lock, flags); | |
4357 | return rc; | |
4358 | } | |
4359 | ||
4360 | /* Tell bootstrap uCode where to find image to load */ | |
3395f6e9 TW |
4361 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
4362 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
4363 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
b481de9c ZY |
4364 | priv->ucode_data.len); |
4365 | ||
4366 | /* Inst bytecount must be last to set up, bit 31 signals uCode | |
4367 | * that all new ptr/size info is in place */ | |
3395f6e9 | 4368 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
b481de9c ZY |
4369 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
4370 | ||
3395f6e9 | 4371 | iwl_release_nic_access(priv); |
b481de9c ZY |
4372 | |
4373 | spin_unlock_irqrestore(&priv->lock, flags); | |
4374 | ||
4375 | IWL_DEBUG_INFO("Runtime uCode pointers are set.\n"); | |
4376 | ||
4377 | return rc; | |
4378 | } | |
4379 | ||
4380 | /** | |
bb8c093b | 4381 | * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received |
b481de9c ZY |
4382 | * |
4383 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
4384 | * | |
4385 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
4386 | * Voltage, temperature, and MIMO tx gain correction, now stored in priv | |
4387 | * (3945 does not contain this data). | |
4388 | * | |
4389 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
4390 | */ | |
c79dd5b5 | 4391 | static void iwl4965_init_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
4392 | { |
4393 | /* Check alive response for "valid" sign from uCode */ | |
4394 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | |
4395 | /* We had an error bringing up the hardware, so take it | |
4396 | * all the way back down so we can try again */ | |
4397 | IWL_DEBUG_INFO("Initialize Alive failed.\n"); | |
4398 | goto restart; | |
4399 | } | |
4400 | ||
4401 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
4402 | * This is a paranoid check, because we would not have gotten the | |
4403 | * "initialize" alive if code weren't properly loaded. */ | |
b0692f2f | 4404 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
4405 | /* Runtime instruction load was bad; |
4406 | * take it all the way back down so we can try again */ | |
4407 | IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n"); | |
4408 | goto restart; | |
4409 | } | |
4410 | ||
4411 | /* Calculate temperature */ | |
4412 | priv->temperature = iwl4965_get_temperature(priv); | |
4413 | ||
4414 | /* Send pointers to protocol/runtime uCode image ... init code will | |
4415 | * load and launch runtime uCode, which will send us another "Alive" | |
4416 | * notification. */ | |
4417 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
bb8c093b | 4418 | if (iwl4965_set_ucode_ptrs(priv)) { |
b481de9c ZY |
4419 | /* Runtime instruction load won't happen; |
4420 | * take it all the way back down so we can try again */ | |
4421 | IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n"); | |
4422 | goto restart; | |
4423 | } | |
4424 | return; | |
4425 | ||
4426 | restart: | |
4427 | queue_work(priv->workqueue, &priv->restart); | |
4428 | } | |
4429 | ||
4430 | ||
4431 | /** | |
bb8c093b | 4432 | * iwl4965_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 4433 | * from protocol/runtime uCode (initialization uCode's |
bb8c093b | 4434 | * Alive gets handled by iwl4965_init_alive_start()). |
b481de9c | 4435 | */ |
c79dd5b5 | 4436 | static void iwl4965_alive_start(struct iwl_priv *priv) |
b481de9c | 4437 | { |
57aab75a | 4438 | int ret = 0; |
b481de9c ZY |
4439 | |
4440 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
4441 | ||
4442 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
4443 | /* We had an error bringing up the hardware, so take it | |
4444 | * all the way back down so we can try again */ | |
4445 | IWL_DEBUG_INFO("Alive failed.\n"); | |
4446 | goto restart; | |
4447 | } | |
4448 | ||
4449 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
4450 | * This is a paranoid check, because we would not have gotten the | |
4451 | * "runtime" alive if code weren't properly loaded. */ | |
b0692f2f | 4452 | if (iwl_verify_ucode(priv)) { |
b481de9c ZY |
4453 | /* Runtime instruction load was bad; |
4454 | * take it all the way back down so we can try again */ | |
4455 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
4456 | goto restart; | |
4457 | } | |
4458 | ||
bf85ea4f | 4459 | iwlcore_clear_stations_table(priv); |
b481de9c | 4460 | |
57aab75a TW |
4461 | ret = priv->cfg->ops->lib->alive_notify(priv); |
4462 | if (ret) { | |
b481de9c | 4463 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 4464 | ret); |
b481de9c ZY |
4465 | goto restart; |
4466 | } | |
4467 | ||
9fbab516 | 4468 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
4469 | set_bit(STATUS_ALIVE, &priv->status); |
4470 | ||
4471 | /* Clear out the uCode error bit if it is set */ | |
4472 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
4473 | ||
fee1247a | 4474 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
4475 | return; |
4476 | ||
5a66926a | 4477 | ieee80211_start_queues(priv->hw); |
b481de9c ZY |
4478 | |
4479 | priv->active_rate = priv->rates_mask; | |
4480 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
4481 | ||
3109ece1 | 4482 | if (iwl_is_associated(priv)) { |
bb8c093b CH |
4483 | struct iwl4965_rxon_cmd *active_rxon = |
4484 | (struct iwl4965_rxon_cmd *)(&priv->active_rxon); | |
b481de9c ZY |
4485 | |
4486 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
4487 | sizeof(priv->staging_rxon)); | |
4488 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
4489 | } else { | |
4490 | /* Initialize our rx_config data */ | |
bb8c093b | 4491 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
4492 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
4493 | } | |
4494 | ||
9fbab516 | 4495 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 4496 | iwl4965_send_bt_config(priv); |
b481de9c ZY |
4497 | |
4498 | /* Configure the adapter for unassociated operation */ | |
bb8c093b | 4499 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
4500 | |
4501 | /* At this point, the NIC is initialized and operational */ | |
4502 | priv->notif_missed_beacons = 0; | |
b481de9c ZY |
4503 | |
4504 | iwl4965_rf_kill_ct_config(priv); | |
5a66926a | 4505 | |
fe00b5a5 RC |
4506 | iwl_leds_register(priv); |
4507 | ||
b481de9c | 4508 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 4509 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 4510 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
4511 | |
4512 | if (priv->error_recovering) | |
bb8c093b | 4513 | iwl4965_error_recovery(priv); |
b481de9c | 4514 | |
c8381fdc | 4515 | iwlcore_low_level_notify(priv, IWLCORE_START_EVT); |
84363e6e | 4516 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
b481de9c ZY |
4517 | return; |
4518 | ||
4519 | restart: | |
4520 | queue_work(priv->workqueue, &priv->restart); | |
4521 | } | |
4522 | ||
c79dd5b5 | 4523 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 4524 | |
c79dd5b5 | 4525 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
4526 | { |
4527 | unsigned long flags; | |
4528 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
4529 | struct ieee80211_conf *conf = NULL; | |
4530 | ||
4531 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
4532 | ||
4533 | conf = ieee80211_get_hw_conf(priv->hw); | |
4534 | ||
4535 | if (!exit_pending) | |
4536 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
4537 | ||
ab53d8af MA |
4538 | iwl_leds_unregister(priv); |
4539 | ||
c8381fdc MA |
4540 | iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT); |
4541 | ||
bf85ea4f | 4542 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
4543 | |
4544 | /* Unblock any waiting calls */ | |
4545 | wake_up_interruptible_all(&priv->wait_command_queue); | |
4546 | ||
b481de9c ZY |
4547 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
4548 | * exiting the module */ | |
4549 | if (!exit_pending) | |
4550 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
4551 | ||
4552 | /* stop and reset the on-board processor */ | |
3395f6e9 | 4553 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
4554 | |
4555 | /* tell the device to stop sending interrupts */ | |
0359facc | 4556 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 4557 | iwl4965_disable_interrupts(priv); |
0359facc MA |
4558 | spin_unlock_irqrestore(&priv->lock, flags); |
4559 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
4560 | |
4561 | if (priv->mac80211_registered) | |
4562 | ieee80211_stop_queues(priv->hw); | |
4563 | ||
bb8c093b | 4564 | /* If we have not previously called iwl4965_init() then |
b481de9c | 4565 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 4566 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
4567 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
4568 | STATUS_RF_KILL_HW | | |
4569 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
4570 | STATUS_RF_KILL_SW | | |
9788864e RC |
4571 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
4572 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
4573 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
4574 | STATUS_IN_SUSPEND; | |
4575 | goto exit; | |
4576 | } | |
4577 | ||
4578 | /* ...otherwise clear out all the status bits but the RF Kill and | |
4579 | * SUSPEND bits and continue taking the NIC down. */ | |
4580 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
4581 | STATUS_RF_KILL_HW | | |
4582 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
4583 | STATUS_RF_KILL_SW | | |
9788864e RC |
4584 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
4585 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
4586 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
4587 | STATUS_IN_SUSPEND | | |
4588 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
4589 | STATUS_FW_ERROR; | |
4590 | ||
4591 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 4592 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 4593 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
4594 | spin_unlock_irqrestore(&priv->lock, flags); |
4595 | ||
bb8c093b CH |
4596 | iwl4965_hw_txq_ctx_stop(priv); |
4597 | iwl4965_hw_rxq_stop(priv); | |
b481de9c ZY |
4598 | |
4599 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
4600 | if (!iwl_grab_nic_access(priv)) { |
4601 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 4602 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 4603 | iwl_release_nic_access(priv); |
b481de9c ZY |
4604 | } |
4605 | spin_unlock_irqrestore(&priv->lock, flags); | |
4606 | ||
4607 | udelay(5); | |
4608 | ||
bb8c093b | 4609 | iwl4965_hw_nic_stop_master(priv); |
3395f6e9 | 4610 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
bb8c093b | 4611 | iwl4965_hw_nic_reset(priv); |
399f4900 | 4612 | priv->cfg->ops->lib->free_shared_mem(priv); |
b481de9c ZY |
4613 | |
4614 | exit: | |
bb8c093b | 4615 | memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
4616 | |
4617 | if (priv->ibss_beacon) | |
4618 | dev_kfree_skb(priv->ibss_beacon); | |
4619 | priv->ibss_beacon = NULL; | |
4620 | ||
4621 | /* clear out any free frames */ | |
bb8c093b | 4622 | iwl4965_clear_free_frames(priv); |
b481de9c ZY |
4623 | } |
4624 | ||
c79dd5b5 | 4625 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
4626 | { |
4627 | mutex_lock(&priv->mutex); | |
bb8c093b | 4628 | __iwl4965_down(priv); |
b481de9c | 4629 | mutex_unlock(&priv->mutex); |
b24d22b1 | 4630 | |
bb8c093b | 4631 | iwl4965_cancel_deferred_work(priv); |
b481de9c ZY |
4632 | } |
4633 | ||
4634 | #define MAX_HW_RESTARTS 5 | |
4635 | ||
c79dd5b5 | 4636 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 4637 | { |
57aab75a TW |
4638 | int i; |
4639 | int ret; | |
b481de9c ZY |
4640 | |
4641 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4642 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
4643 | return -EIO; | |
4644 | } | |
4645 | ||
4646 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | |
4647 | IWL_WARNING("Radio disabled by SW RF kill (module " | |
4648 | "parameter)\n"); | |
ad97edd2 | 4649 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
4650 | return -ENODEV; |
4651 | } | |
4652 | ||
e903fbd4 RC |
4653 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
4654 | IWL_ERROR("ucode not available for device bringup\n"); | |
4655 | return -EIO; | |
4656 | } | |
4657 | ||
e655b9f0 | 4658 | /* If platform's RF_KILL switch is NOT set to KILL */ |
3395f6e9 | 4659 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
4660 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
4661 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
4662 | else { | |
4663 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
4664 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
ad97edd2 | 4665 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
4666 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); |
4667 | return -ENODEV; | |
4668 | } | |
b481de9c ZY |
4669 | } |
4670 | ||
ad97edd2 | 4671 | iwl_rfkill_set_hw_state(priv); |
3395f6e9 | 4672 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 4673 | |
399f4900 RR |
4674 | ret = priv->cfg->ops->lib->alloc_shared_mem(priv); |
4675 | if (ret) { | |
4676 | IWL_ERROR("Unable to allocate shared memory\n"); | |
4677 | return ret; | |
4678 | } | |
4679 | ||
57aab75a TW |
4680 | ret = priv->cfg->ops->lib->hw_nic_init(priv); |
4681 | if (ret) { | |
4682 | IWL_ERROR("Unable to init nic\n"); | |
4683 | return ret; | |
b481de9c ZY |
4684 | } |
4685 | ||
4686 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
4687 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
4688 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
4689 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
4690 | ||
4691 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 4692 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 4693 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
4694 | |
4695 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
4696 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
4697 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
4698 | |
4699 | /* Copy original ucode data image from disk into backup cache. | |
4700 | * This will be used to initialize the on-board processor's | |
4701 | * data SRAM for a clean start when the runtime program first loads. */ | |
4702 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 4703 | priv->ucode_data.len); |
b481de9c | 4704 | |
e655b9f0 ZY |
4705 | /* We return success when we resume from suspend and rf_kill is on. */ |
4706 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
b481de9c | 4707 | return 0; |
b481de9c ZY |
4708 | |
4709 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
4710 | ||
bf85ea4f | 4711 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
4712 | |
4713 | /* load bootstrap state machine, | |
4714 | * load bootstrap program into processor's memory, | |
4715 | * prepare to load the "initialize" uCode */ | |
57aab75a | 4716 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 4717 | |
57aab75a TW |
4718 | if (ret) { |
4719 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
4720 | continue; |
4721 | } | |
4722 | ||
4723 | /* start card; "initialize" will load runtime ucode */ | |
bb8c093b | 4724 | iwl4965_nic_start(priv); |
b481de9c | 4725 | |
b481de9c ZY |
4726 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
4727 | ||
4728 | return 0; | |
4729 | } | |
4730 | ||
4731 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 4732 | __iwl4965_down(priv); |
b481de9c ZY |
4733 | |
4734 | /* tried to restart and config the device for as long as our | |
4735 | * patience could withstand */ | |
4736 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
4737 | return -EIO; | |
4738 | } | |
4739 | ||
4740 | ||
4741 | /***************************************************************************** | |
4742 | * | |
4743 | * Workqueue callbacks | |
4744 | * | |
4745 | *****************************************************************************/ | |
4746 | ||
bb8c093b | 4747 | static void iwl4965_bg_init_alive_start(struct work_struct *data) |
b481de9c | 4748 | { |
c79dd5b5 TW |
4749 | struct iwl_priv *priv = |
4750 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
4751 | |
4752 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4753 | return; | |
4754 | ||
4755 | mutex_lock(&priv->mutex); | |
bb8c093b | 4756 | iwl4965_init_alive_start(priv); |
b481de9c ZY |
4757 | mutex_unlock(&priv->mutex); |
4758 | } | |
4759 | ||
bb8c093b | 4760 | static void iwl4965_bg_alive_start(struct work_struct *data) |
b481de9c | 4761 | { |
c79dd5b5 TW |
4762 | struct iwl_priv *priv = |
4763 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
4764 | |
4765 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4766 | return; | |
4767 | ||
4768 | mutex_lock(&priv->mutex); | |
bb8c093b | 4769 | iwl4965_alive_start(priv); |
b481de9c ZY |
4770 | mutex_unlock(&priv->mutex); |
4771 | } | |
4772 | ||
bb8c093b | 4773 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 4774 | { |
c79dd5b5 | 4775 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
4776 | |
4777 | wake_up_interruptible(&priv->wait_command_queue); | |
4778 | ||
4779 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4780 | return; | |
4781 | ||
4782 | mutex_lock(&priv->mutex); | |
4783 | ||
fee1247a | 4784 | if (!iwl_is_rfkill(priv)) { |
b481de9c ZY |
4785 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL, |
4786 | "HW and/or SW RF Kill no longer active, restarting " | |
4787 | "device\n"); | |
4788 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4789 | queue_work(priv->workqueue, &priv->restart); | |
4790 | } else { | |
ad97edd2 MA |
4791 | /* make sure mac80211 stop sending Tx frame */ |
4792 | if (priv->mac80211_registered) | |
4793 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
4794 | |
4795 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
4796 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
4797 | "disabled by SW switch\n"); | |
4798 | else | |
4799 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
4800 | "Kill switch must be turned off for " | |
4801 | "wireless networking to work.\n"); | |
4802 | } | |
ad97edd2 MA |
4803 | iwl_rfkill_set_hw_state(priv); |
4804 | ||
b481de9c ZY |
4805 | mutex_unlock(&priv->mutex); |
4806 | } | |
4807 | ||
4808 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | |
4809 | ||
bb8c093b | 4810 | static void iwl4965_bg_scan_check(struct work_struct *data) |
b481de9c | 4811 | { |
c79dd5b5 TW |
4812 | struct iwl_priv *priv = |
4813 | container_of(data, struct iwl_priv, scan_check.work); | |
b481de9c ZY |
4814 | |
4815 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
4816 | return; | |
4817 | ||
4818 | mutex_lock(&priv->mutex); | |
4819 | if (test_bit(STATUS_SCANNING, &priv->status) || | |
4820 | test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
4821 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, | |
4822 | "Scan completion watchdog resetting adapter (%dms)\n", | |
4823 | jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG)); | |
052c4b9f | 4824 | |
b481de9c | 4825 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) |
bb8c093b | 4826 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
4827 | } |
4828 | mutex_unlock(&priv->mutex); | |
4829 | } | |
4830 | ||
bb8c093b | 4831 | static void iwl4965_bg_request_scan(struct work_struct *data) |
b481de9c | 4832 | { |
c79dd5b5 TW |
4833 | struct iwl_priv *priv = |
4834 | container_of(data, struct iwl_priv, request_scan); | |
857485c0 | 4835 | struct iwl_host_cmd cmd = { |
b481de9c | 4836 | .id = REPLY_SCAN_CMD, |
bb8c093b | 4837 | .len = sizeof(struct iwl4965_scan_cmd), |
b481de9c ZY |
4838 | .meta.flags = CMD_SIZE_HUGE, |
4839 | }; | |
bb8c093b | 4840 | struct iwl4965_scan_cmd *scan; |
b481de9c | 4841 | struct ieee80211_conf *conf = NULL; |
78330fdd | 4842 | u16 cmd_len; |
8318d78a | 4843 | enum ieee80211_band band; |
78330fdd | 4844 | u8 direct_mask; |
857485c0 | 4845 | int ret = 0; |
b481de9c ZY |
4846 | |
4847 | conf = ieee80211_get_hw_conf(priv->hw); | |
4848 | ||
4849 | mutex_lock(&priv->mutex); | |
4850 | ||
fee1247a | 4851 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
4852 | IWL_WARNING("request scan called when driver not ready.\n"); |
4853 | goto done; | |
4854 | } | |
4855 | ||
4856 | /* Make sure the scan wasn't cancelled before this queued work | |
4857 | * was given the chance to run... */ | |
4858 | if (!test_bit(STATUS_SCANNING, &priv->status)) | |
4859 | goto done; | |
4860 | ||
4861 | /* This should never be called or scheduled if there is currently | |
4862 | * a scan active in the hardware. */ | |
4863 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | |
4864 | IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. " | |
4865 | "Ignoring second request.\n"); | |
857485c0 | 4866 | ret = -EIO; |
b481de9c ZY |
4867 | goto done; |
4868 | } | |
4869 | ||
4870 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4871 | IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n"); | |
4872 | goto done; | |
4873 | } | |
4874 | ||
4875 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
4876 | IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n"); | |
4877 | goto done; | |
4878 | } | |
4879 | ||
fee1247a | 4880 | if (iwl_is_rfkill(priv)) { |
b481de9c ZY |
4881 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); |
4882 | goto done; | |
4883 | } | |
4884 | ||
4885 | if (!test_bit(STATUS_READY, &priv->status)) { | |
4886 | IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n"); | |
4887 | goto done; | |
4888 | } | |
4889 | ||
4890 | if (!priv->scan_bands) { | |
4891 | IWL_DEBUG_HC("Aborting scan due to no requested bands\n"); | |
4892 | goto done; | |
4893 | } | |
4894 | ||
4895 | if (!priv->scan) { | |
bb8c093b | 4896 | priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) + |
b481de9c ZY |
4897 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); |
4898 | if (!priv->scan) { | |
857485c0 | 4899 | ret = -ENOMEM; |
b481de9c ZY |
4900 | goto done; |
4901 | } | |
4902 | } | |
4903 | scan = priv->scan; | |
bb8c093b | 4904 | memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE); |
b481de9c ZY |
4905 | |
4906 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | |
4907 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | |
4908 | ||
3109ece1 | 4909 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
4910 | u16 interval = 0; |
4911 | u32 extra; | |
4912 | u32 suspend_time = 100; | |
4913 | u32 scan_suspend_time = 100; | |
4914 | unsigned long flags; | |
4915 | ||
4916 | IWL_DEBUG_INFO("Scanning while associated...\n"); | |
4917 | ||
4918 | spin_lock_irqsave(&priv->lock, flags); | |
4919 | interval = priv->beacon_int; | |
4920 | spin_unlock_irqrestore(&priv->lock, flags); | |
4921 | ||
4922 | scan->suspend_time = 0; | |
052c4b9f | 4923 | scan->max_out_time = cpu_to_le32(200 * 1024); |
b481de9c ZY |
4924 | if (!interval) |
4925 | interval = suspend_time; | |
4926 | ||
4927 | extra = (suspend_time / interval) << 22; | |
4928 | scan_suspend_time = (extra | | |
4929 | ((suspend_time % interval) * 1024)); | |
4930 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | |
4931 | IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n", | |
4932 | scan_suspend_time, interval); | |
4933 | } | |
4934 | ||
4935 | /* We should add the ability for user to lock to PASSIVE ONLY */ | |
4936 | if (priv->one_direct_scan) { | |
4937 | IWL_DEBUG_SCAN | |
4938 | ("Kicking off one direct scan for '%s'\n", | |
bb8c093b | 4939 | iwl4965_escape_essid(priv->direct_ssid, |
b481de9c ZY |
4940 | priv->direct_ssid_len)); |
4941 | scan->direct_scan[0].id = WLAN_EID_SSID; | |
4942 | scan->direct_scan[0].len = priv->direct_ssid_len; | |
4943 | memcpy(scan->direct_scan[0].ssid, | |
4944 | priv->direct_ssid, priv->direct_ssid_len); | |
4945 | direct_mask = 1; | |
3109ece1 | 4946 | } else if (!iwl_is_associated(priv) && priv->essid_len) { |
786b4557 BM |
4947 | IWL_DEBUG_SCAN |
4948 | ("Kicking off one direct scan for '%s' when not associated\n", | |
4949 | iwl4965_escape_essid(priv->essid, priv->essid_len)); | |
b481de9c ZY |
4950 | scan->direct_scan[0].id = WLAN_EID_SSID; |
4951 | scan->direct_scan[0].len = priv->essid_len; | |
4952 | memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len); | |
4953 | direct_mask = 1; | |
857485c0 | 4954 | } else { |
786b4557 | 4955 | IWL_DEBUG_SCAN("Kicking off one indirect scan.\n"); |
b481de9c | 4956 | direct_mask = 0; |
857485c0 | 4957 | } |
b481de9c | 4958 | |
b481de9c | 4959 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; |
5425e490 | 4960 | scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; |
b481de9c ZY |
4961 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
4962 | ||
b481de9c ZY |
4963 | |
4964 | switch (priv->scan_bands) { | |
4965 | case 2: | |
4966 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | |
4967 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 4968 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, |
b481de9c ZY |
4969 | RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK); |
4970 | ||
4971 | scan->good_CRC_th = 0; | |
8318d78a | 4972 | band = IEEE80211_BAND_2GHZ; |
b481de9c ZY |
4973 | break; |
4974 | ||
4975 | case 1: | |
4976 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 4977 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, |
b481de9c ZY |
4978 | RATE_MCS_ANT_B_MSK); |
4979 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | |
8318d78a | 4980 | band = IEEE80211_BAND_5GHZ; |
b481de9c ZY |
4981 | break; |
4982 | ||
4983 | default: | |
4984 | IWL_WARNING("Invalid scan band count\n"); | |
4985 | goto done; | |
4986 | } | |
4987 | ||
78330fdd TW |
4988 | /* We don't build a direct scan probe request; the uCode will do |
4989 | * that based on the direct_mask added to each channel entry */ | |
4990 | cmd_len = iwl4965_fill_probe_req(priv, band, | |
4991 | (struct ieee80211_mgmt *)scan->data, | |
4992 | IWL_MAX_SCAN_SIZE - sizeof(*scan), 0); | |
4993 | ||
4994 | scan->tx_cmd.len = cpu_to_le16(cmd_len); | |
b481de9c ZY |
4995 | /* select Rx chains */ |
4996 | ||
4997 | /* Force use of chains B and C (0x6) for scan Rx. | |
4998 | * Avoid A (0x1) because of its off-channel reception on A-band. | |
4999 | * MIMO is not used here, but value is required to make uCode happy. */ | |
5000 | scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK | | |
5001 | cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) | | |
5002 | (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) | | |
5003 | (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS)); | |
5004 | ||
5005 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) | |
5006 | scan->filter_flags = RXON_FILTER_PROMISC_MSK; | |
5007 | ||
786b4557 | 5008 | if (direct_mask) |
26c0f03f RC |
5009 | scan->channel_count = |
5010 | iwl4965_get_channels_for_scan( | |
5011 | priv, band, 1, /* active */ | |
5012 | direct_mask, | |
5013 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
786b4557 | 5014 | else |
26c0f03f RC |
5015 | scan->channel_count = |
5016 | iwl4965_get_channels_for_scan( | |
5017 | priv, band, 0, /* passive */ | |
5018 | direct_mask, | |
5019 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
b481de9c | 5020 | |
5da4b55f MA |
5021 | scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | |
5022 | RXON_FILTER_BCON_AWARE_MSK); | |
b481de9c | 5023 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + |
bb8c093b | 5024 | scan->channel_count * sizeof(struct iwl4965_scan_channel); |
b481de9c ZY |
5025 | cmd.data = scan; |
5026 | scan->len = cpu_to_le16(cmd.len); | |
5027 | ||
5028 | set_bit(STATUS_SCAN_HW, &priv->status); | |
857485c0 TW |
5029 | ret = iwl_send_cmd_sync(priv, &cmd); |
5030 | if (ret) | |
b481de9c ZY |
5031 | goto done; |
5032 | ||
5033 | queue_delayed_work(priv->workqueue, &priv->scan_check, | |
5034 | IWL_SCAN_CHECK_WATCHDOG); | |
5035 | ||
5036 | mutex_unlock(&priv->mutex); | |
5037 | return; | |
5038 | ||
5039 | done: | |
01ebd063 | 5040 | /* inform mac80211 scan aborted */ |
b481de9c ZY |
5041 | queue_work(priv->workqueue, &priv->scan_completed); |
5042 | mutex_unlock(&priv->mutex); | |
5043 | } | |
5044 | ||
bb8c093b | 5045 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 5046 | { |
c79dd5b5 | 5047 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
5048 | |
5049 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5050 | return; | |
5051 | ||
5052 | mutex_lock(&priv->mutex); | |
bb8c093b | 5053 | __iwl4965_up(priv); |
b481de9c ZY |
5054 | mutex_unlock(&priv->mutex); |
5055 | } | |
5056 | ||
bb8c093b | 5057 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 5058 | { |
c79dd5b5 | 5059 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
5060 | |
5061 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5062 | return; | |
5063 | ||
bb8c093b | 5064 | iwl4965_down(priv); |
b481de9c ZY |
5065 | queue_work(priv->workqueue, &priv->up); |
5066 | } | |
5067 | ||
bb8c093b | 5068 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 5069 | { |
c79dd5b5 TW |
5070 | struct iwl_priv *priv = |
5071 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
5072 | |
5073 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5074 | return; | |
5075 | ||
5076 | mutex_lock(&priv->mutex); | |
a55360e4 | 5077 | iwl_rx_replenish(priv); |
b481de9c ZY |
5078 | mutex_unlock(&priv->mutex); |
5079 | } | |
5080 | ||
7878a5a4 MA |
5081 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
5082 | ||
508e32e1 | 5083 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 5084 | { |
b481de9c | 5085 | struct ieee80211_conf *conf = NULL; |
857485c0 | 5086 | int ret = 0; |
0795af57 | 5087 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
5088 | |
5089 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
5090 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
5091 | return; | |
5092 | } | |
5093 | ||
0795af57 JP |
5094 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
5095 | priv->assoc_id, | |
5096 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
5097 | |
5098 | ||
5099 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5100 | return; | |
5101 | ||
b481de9c | 5102 | |
508e32e1 | 5103 | if (!priv->vif || !priv->is_open) |
948c171c | 5104 | return; |
508e32e1 | 5105 | |
bb8c093b | 5106 | iwl4965_scan_cancel_timeout(priv, 200); |
052c4b9f | 5107 | |
b481de9c ZY |
5108 | conf = ieee80211_get_hw_conf(priv->hw); |
5109 | ||
5110 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 5111 | iwl4965_commit_rxon(priv); |
b481de9c | 5112 | |
bb8c093b CH |
5113 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
5114 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 5115 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 5116 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 5117 | if (ret) |
b481de9c ZY |
5118 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
5119 | "Attempting to continue.\n"); | |
5120 | ||
5121 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
5122 | ||
c8b0e6e1 | 5123 | #ifdef CONFIG_IWL4965_HT |
fd105e79 | 5124 | if (priv->current_ht_config.is_ht) |
47c5196e | 5125 | iwl_set_rxon_ht(priv, &priv->current_ht_config); |
c8b0e6e1 | 5126 | #endif /* CONFIG_IWL4965_HT*/ |
c7de35cd | 5127 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
5128 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); |
5129 | ||
5130 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
5131 | priv->assoc_id, priv->beacon_int); | |
5132 | ||
5133 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
5134 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
5135 | else | |
5136 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
5137 | ||
5138 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
5139 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
5140 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
5141 | else | |
5142 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
5143 | ||
5144 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5145 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
5146 | ||
5147 | } | |
5148 | ||
bb8c093b | 5149 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5150 | |
5151 | switch (priv->iw_mode) { | |
5152 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 5153 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
5154 | break; |
5155 | ||
5156 | case IEEE80211_IF_TYPE_IBSS: | |
5157 | ||
5158 | /* clear out the station table */ | |
bf85ea4f | 5159 | iwlcore_clear_stations_table(priv); |
b481de9c | 5160 | |
bb8c093b CH |
5161 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
5162 | iwl4965_rxon_add_station(priv, priv->bssid, 0); | |
5163 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); | |
5164 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
5165 | |
5166 | break; | |
5167 | ||
5168 | default: | |
5169 | IWL_ERROR("%s Should not be called in %d mode\n", | |
5170 | __FUNCTION__, priv->iw_mode); | |
5171 | break; | |
5172 | } | |
5173 | ||
bb8c093b | 5174 | iwl4965_sequence_reset(priv); |
b481de9c | 5175 | |
b481de9c | 5176 | /* Enable Rx differential gain and sensitivity calibrations */ |
f0832f13 | 5177 | iwl_chain_noise_reset(priv); |
b481de9c | 5178 | priv->start_calib = 1; |
b481de9c ZY |
5179 | |
5180 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5181 | priv->assoc_station_added = 1; | |
5182 | ||
bb8c093b | 5183 | iwl4965_activate_qos(priv, 0); |
292ae174 | 5184 | |
5da4b55f | 5185 | iwl_power_update_mode(priv, 0); |
7878a5a4 MA |
5186 | /* we have just associated, don't start scan too early */ |
5187 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
5188 | } |
5189 | ||
5190 | ||
5191 | static void iwl4965_bg_post_associate(struct work_struct *data) | |
5192 | { | |
5193 | struct iwl_priv *priv = container_of(data, struct iwl_priv, | |
5194 | post_associate.work); | |
5195 | ||
5196 | mutex_lock(&priv->mutex); | |
5197 | iwl4965_post_associate(priv); | |
b481de9c | 5198 | mutex_unlock(&priv->mutex); |
508e32e1 | 5199 | |
b481de9c ZY |
5200 | } |
5201 | ||
bb8c093b | 5202 | static void iwl4965_bg_abort_scan(struct work_struct *work) |
b481de9c | 5203 | { |
c79dd5b5 | 5204 | struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); |
b481de9c | 5205 | |
fee1247a | 5206 | if (!iwl_is_ready(priv)) |
b481de9c ZY |
5207 | return; |
5208 | ||
5209 | mutex_lock(&priv->mutex); | |
5210 | ||
5211 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
bb8c093b | 5212 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
5213 | |
5214 | mutex_unlock(&priv->mutex); | |
5215 | } | |
5216 | ||
76bb77e0 ZY |
5217 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
5218 | ||
bb8c093b | 5219 | static void iwl4965_bg_scan_completed(struct work_struct *work) |
b481de9c | 5220 | { |
c79dd5b5 TW |
5221 | struct iwl_priv *priv = |
5222 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c ZY |
5223 | |
5224 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n"); | |
5225 | ||
5226 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5227 | return; | |
5228 | ||
a0646470 ZY |
5229 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
5230 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 5231 | |
b481de9c ZY |
5232 | ieee80211_scan_completed(priv->hw); |
5233 | ||
5234 | /* Since setting the TXPOWER may have been deferred while | |
5235 | * performing the scan, fire one off */ | |
5236 | mutex_lock(&priv->mutex); | |
bb8c093b | 5237 | iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
5238 | mutex_unlock(&priv->mutex); |
5239 | } | |
5240 | ||
5241 | /***************************************************************************** | |
5242 | * | |
5243 | * mac80211 entry point functions | |
5244 | * | |
5245 | *****************************************************************************/ | |
5246 | ||
5a66926a ZY |
5247 | #define UCODE_READY_TIMEOUT (2 * HZ) |
5248 | ||
bb8c093b | 5249 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 5250 | { |
c79dd5b5 | 5251 | struct iwl_priv *priv = hw->priv; |
5a66926a | 5252 | int ret; |
b481de9c ZY |
5253 | |
5254 | IWL_DEBUG_MAC80211("enter\n"); | |
5255 | ||
5a66926a ZY |
5256 | if (pci_enable_device(priv->pci_dev)) { |
5257 | IWL_ERROR("Fail to pci_enable_device\n"); | |
5258 | return -ENODEV; | |
5259 | } | |
5260 | pci_restore_state(priv->pci_dev); | |
5261 | pci_enable_msi(priv->pci_dev); | |
5262 | ||
5263 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
5264 | DRV_NAME, priv); | |
5265 | if (ret) { | |
5266 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
5267 | goto out_disable_msi; | |
5268 | } | |
5269 | ||
b481de9c ZY |
5270 | /* we should be verifying the device is ready to be opened */ |
5271 | mutex_lock(&priv->mutex); | |
5272 | ||
5a66926a ZY |
5273 | memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd)); |
5274 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | |
5275 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 5276 | |
5a66926a ZY |
5277 | if (!priv->ucode_code.len) { |
5278 | ret = iwl4965_read_ucode(priv); | |
5279 | if (ret) { | |
5280 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
5281 | mutex_unlock(&priv->mutex); | |
5282 | goto out_release_irq; | |
5283 | } | |
5284 | } | |
b481de9c | 5285 | |
e655b9f0 | 5286 | ret = __iwl4965_up(priv); |
5a66926a | 5287 | |
b481de9c | 5288 | mutex_unlock(&priv->mutex); |
5a66926a | 5289 | |
e655b9f0 ZY |
5290 | if (ret) |
5291 | goto out_release_irq; | |
5292 | ||
5293 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
5294 | ||
5295 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
5296 | return 0; | |
5297 | ||
5a66926a ZY |
5298 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from |
5299 | * mac80211 will not be run successfully. */ | |
5300 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
5301 | test_bit(STATUS_READY, &priv->status), | |
5302 | UCODE_READY_TIMEOUT); | |
5303 | if (!ret) { | |
5304 | if (!test_bit(STATUS_READY, &priv->status)) { | |
5305 | IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n", | |
5306 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
5307 | ret = -ETIMEDOUT; | |
5308 | goto out_release_irq; | |
5309 | } | |
5310 | } | |
5311 | ||
e655b9f0 | 5312 | priv->is_open = 1; |
b481de9c ZY |
5313 | IWL_DEBUG_MAC80211("leave\n"); |
5314 | return 0; | |
5a66926a ZY |
5315 | |
5316 | out_release_irq: | |
5317 | free_irq(priv->pci_dev->irq, priv); | |
5318 | out_disable_msi: | |
5319 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
5320 | pci_disable_device(priv->pci_dev); |
5321 | priv->is_open = 0; | |
5322 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 5323 | return ret; |
b481de9c ZY |
5324 | } |
5325 | ||
bb8c093b | 5326 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 5327 | { |
c79dd5b5 | 5328 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5329 | |
5330 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 5331 | |
e655b9f0 ZY |
5332 | if (!priv->is_open) { |
5333 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
5334 | return; | |
5335 | } | |
5336 | ||
b481de9c | 5337 | priv->is_open = 0; |
5a66926a | 5338 | |
fee1247a | 5339 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
5340 | /* stop mac, cancel any scan request and clear |
5341 | * RXON_FILTER_ASSOC_MSK BIT | |
5342 | */ | |
5a66926a ZY |
5343 | mutex_lock(&priv->mutex); |
5344 | iwl4965_scan_cancel_timeout(priv, 100); | |
5345 | cancel_delayed_work(&priv->post_associate); | |
fde3571f | 5346 | mutex_unlock(&priv->mutex); |
fde3571f MA |
5347 | } |
5348 | ||
5a66926a ZY |
5349 | iwl4965_down(priv); |
5350 | ||
5351 | flush_workqueue(priv->workqueue); | |
5352 | free_irq(priv->pci_dev->irq, priv); | |
5353 | pci_disable_msi(priv->pci_dev); | |
5354 | pci_save_state(priv->pci_dev); | |
5355 | pci_disable_device(priv->pci_dev); | |
948c171c | 5356 | |
b481de9c | 5357 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
5358 | } |
5359 | ||
bb8c093b | 5360 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
5361 | struct ieee80211_tx_control *ctl) |
5362 | { | |
c79dd5b5 | 5363 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5364 | |
5365 | IWL_DEBUG_MAC80211("enter\n"); | |
5366 | ||
5367 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
5368 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
5369 | return -1; | |
5370 | } | |
5371 | ||
5372 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
8318d78a | 5373 | ctl->tx_rate->bitrate); |
b481de9c | 5374 | |
bb8c093b | 5375 | if (iwl4965_tx_skb(priv, skb, ctl)) |
b481de9c ZY |
5376 | dev_kfree_skb_any(skb); |
5377 | ||
5378 | IWL_DEBUG_MAC80211("leave\n"); | |
5379 | return 0; | |
5380 | } | |
5381 | ||
bb8c093b | 5382 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
5383 | struct ieee80211_if_init_conf *conf) |
5384 | { | |
c79dd5b5 | 5385 | struct iwl_priv *priv = hw->priv; |
b481de9c | 5386 | unsigned long flags; |
0795af57 | 5387 | DECLARE_MAC_BUF(mac); |
b481de9c | 5388 | |
32bfd35d | 5389 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 5390 | |
32bfd35d JB |
5391 | if (priv->vif) { |
5392 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 5393 | return -EOPNOTSUPP; |
b481de9c ZY |
5394 | } |
5395 | ||
5396 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 5397 | priv->vif = conf->vif; |
b481de9c ZY |
5398 | |
5399 | spin_unlock_irqrestore(&priv->lock, flags); | |
5400 | ||
5401 | mutex_lock(&priv->mutex); | |
864792e3 TW |
5402 | |
5403 | if (conf->mac_addr) { | |
5404 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
5405 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
5406 | } | |
b481de9c | 5407 | |
fee1247a | 5408 | if (iwl_is_ready(priv)) |
5a66926a ZY |
5409 | iwl4965_set_mode(priv, conf->type); |
5410 | ||
b481de9c ZY |
5411 | mutex_unlock(&priv->mutex); |
5412 | ||
5a66926a | 5413 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
5414 | return 0; |
5415 | } | |
5416 | ||
5417 | /** | |
bb8c093b | 5418 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
5419 | * |
5420 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
5421 | * be set inappropriately and the driver currently sets the hardware up to | |
5422 | * use it whenever needed. | |
5423 | */ | |
bb8c093b | 5424 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 5425 | { |
c79dd5b5 | 5426 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 5427 | const struct iwl_channel_info *ch_info; |
b481de9c | 5428 | unsigned long flags; |
76bb77e0 | 5429 | int ret = 0; |
b481de9c ZY |
5430 | |
5431 | mutex_lock(&priv->mutex); | |
8318d78a | 5432 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 5433 | |
12342c47 ZY |
5434 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
5435 | ||
fee1247a | 5436 | if (!iwl_is_ready(priv)) { |
b481de9c | 5437 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
5438 | ret = -EIO; |
5439 | goto out; | |
b481de9c ZY |
5440 | } |
5441 | ||
1ea87396 | 5442 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 5443 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
5444 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
5445 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 5446 | mutex_unlock(&priv->mutex); |
a0646470 | 5447 | return 0; |
b481de9c ZY |
5448 | } |
5449 | ||
5450 | spin_lock_irqsave(&priv->lock, flags); | |
5451 | ||
8622e705 | 5452 | ch_info = iwl_get_channel_info(priv, conf->channel->band, |
8318d78a | 5453 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 5454 | if (!is_channel_valid(ch_info)) { |
b481de9c ZY |
5455 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
5456 | spin_unlock_irqrestore(&priv->lock, flags); | |
76bb77e0 ZY |
5457 | ret = -EINVAL; |
5458 | goto out; | |
b481de9c ZY |
5459 | } |
5460 | ||
c8b0e6e1 | 5461 | #ifdef CONFIG_IWL4965_HT |
78330fdd | 5462 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
5463 | * from any ht related info since 2.4 does not |
5464 | * support ht */ | |
78330fdd | 5465 | if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value) |
b481de9c ZY |
5466 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
5467 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
5468 | #endif | |
5469 | ) | |
5470 | priv->staging_rxon.flags = 0; | |
c8b0e6e1 | 5471 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 5472 | |
c7de35cd | 5473 | iwl_set_rxon_channel(priv, conf->channel->band, |
8318d78a | 5474 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 5475 | |
8318d78a | 5476 | iwl4965_set_flags_for_phymode(priv, conf->channel->band); |
b481de9c ZY |
5477 | |
5478 | /* The list of supported rates and rate mask can be different | |
8318d78a | 5479 | * for each band; since the band may have changed, reset |
b481de9c | 5480 | * the rate mask to what mac80211 lists */ |
bb8c093b | 5481 | iwl4965_set_rate(priv); |
b481de9c ZY |
5482 | |
5483 | spin_unlock_irqrestore(&priv->lock, flags); | |
5484 | ||
5485 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
5486 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 5487 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 5488 | goto out; |
b481de9c ZY |
5489 | } |
5490 | #endif | |
5491 | ||
ad97edd2 MA |
5492 | if (priv->cfg->ops->lib->radio_kill_sw) |
5493 | priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled); | |
b481de9c ZY |
5494 | |
5495 | if (!conf->radio_enabled) { | |
5496 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 5497 | goto out; |
b481de9c ZY |
5498 | } |
5499 | ||
fee1247a | 5500 | if (iwl_is_rfkill(priv)) { |
b481de9c | 5501 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
5502 | ret = -EIO; |
5503 | goto out; | |
b481de9c ZY |
5504 | } |
5505 | ||
bb8c093b | 5506 | iwl4965_set_rate(priv); |
b481de9c ZY |
5507 | |
5508 | if (memcmp(&priv->active_rxon, | |
5509 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 5510 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5511 | else |
5512 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
5513 | ||
5514 | IWL_DEBUG_MAC80211("leave\n"); | |
5515 | ||
a0646470 ZY |
5516 | out: |
5517 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 5518 | mutex_unlock(&priv->mutex); |
76bb77e0 | 5519 | return ret; |
b481de9c ZY |
5520 | } |
5521 | ||
c79dd5b5 | 5522 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 5523 | { |
857485c0 | 5524 | int ret = 0; |
b481de9c | 5525 | |
d986bcd1 | 5526 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
5527 | return; |
5528 | ||
5529 | /* The following should be done only at AP bring up */ | |
5530 | if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) { | |
5531 | ||
5532 | /* RXON - unassoc (to set timing command) */ | |
5533 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 5534 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5535 | |
5536 | /* RXON Timing */ | |
bb8c093b CH |
5537 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
5538 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 5539 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 5540 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 5541 | if (ret) |
b481de9c ZY |
5542 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
5543 | "Attempting to continue.\n"); | |
5544 | ||
c7de35cd | 5545 | iwl_set_rxon_chain(priv); |
b481de9c ZY |
5546 | |
5547 | /* FIXME: what should be the assoc_id for AP? */ | |
5548 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
5549 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
5550 | priv->staging_rxon.flags |= | |
5551 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
5552 | else | |
5553 | priv->staging_rxon.flags &= | |
5554 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
5555 | ||
5556 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
5557 | if (priv->assoc_capability & | |
5558 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
5559 | priv->staging_rxon.flags |= | |
5560 | RXON_FLG_SHORT_SLOT_MSK; | |
5561 | else | |
5562 | priv->staging_rxon.flags &= | |
5563 | ~RXON_FLG_SHORT_SLOT_MSK; | |
5564 | ||
5565 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5566 | priv->staging_rxon.flags &= | |
5567 | ~RXON_FLG_SHORT_SLOT_MSK; | |
5568 | } | |
5569 | /* restore RXON assoc */ | |
5570 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 5571 | iwl4965_commit_rxon(priv); |
bb8c093b | 5572 | iwl4965_activate_qos(priv, 1); |
bb8c093b | 5573 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
e1493deb | 5574 | } |
bb8c093b | 5575 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
5576 | |
5577 | /* FIXME - we need to add code here to detect a totally new | |
5578 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
5579 | * clear sta table, add BCAST sta... */ | |
5580 | } | |
5581 | ||
32bfd35d JB |
5582 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
5583 | struct ieee80211_vif *vif, | |
b481de9c ZY |
5584 | struct ieee80211_if_conf *conf) |
5585 | { | |
c79dd5b5 | 5586 | struct iwl_priv *priv = hw->priv; |
0795af57 | 5587 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
5588 | unsigned long flags; |
5589 | int rc; | |
5590 | ||
5591 | if (conf == NULL) | |
5592 | return -EIO; | |
5593 | ||
b716bb91 EG |
5594 | if (priv->vif != vif) { |
5595 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
5596 | return 0; |
5597 | } | |
5598 | ||
b481de9c ZY |
5599 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
5600 | (!conf->beacon || !conf->ssid_len)) { | |
5601 | IWL_DEBUG_MAC80211 | |
5602 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
5603 | return 0; | |
5604 | } | |
5605 | ||
fee1247a | 5606 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
5607 | return -EAGAIN; |
5608 | ||
b481de9c ZY |
5609 | mutex_lock(&priv->mutex); |
5610 | ||
b481de9c | 5611 | if (conf->bssid) |
0795af57 JP |
5612 | IWL_DEBUG_MAC80211("bssid: %s\n", |
5613 | print_mac(mac, conf->bssid)); | |
b481de9c | 5614 | |
4150c572 JB |
5615 | /* |
5616 | * very dubious code was here; the probe filtering flag is never set: | |
5617 | * | |
b481de9c ZY |
5618 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
5619 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 5620 | */ |
b481de9c ZY |
5621 | |
5622 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
5623 | if (!conf->bssid) { | |
5624 | conf->bssid = priv->mac_addr; | |
5625 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
5626 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
5627 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
5628 | } |
5629 | if (priv->ibss_beacon) | |
5630 | dev_kfree_skb(priv->ibss_beacon); | |
5631 | ||
5632 | priv->ibss_beacon = conf->beacon; | |
5633 | } | |
5634 | ||
fee1247a | 5635 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
5636 | goto done; |
5637 | ||
b481de9c ZY |
5638 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
5639 | !is_multicast_ether_addr(conf->bssid)) { | |
5640 | /* If there is currently a HW scan going on in the background | |
5641 | * then we need to cancel it else the RXON below will fail. */ | |
bb8c093b | 5642 | if (iwl4965_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
5643 | IWL_WARNING("Aborted scan still in progress " |
5644 | "after 100ms\n"); | |
5645 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
5646 | mutex_unlock(&priv->mutex); | |
5647 | return -EAGAIN; | |
5648 | } | |
5649 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
5650 | ||
5651 | /* TODO: Audit driver for usage of these members and see | |
5652 | * if mac80211 deprecates them (priv->bssid looks like it | |
5653 | * shouldn't be there, but I haven't scanned the IBSS code | |
5654 | * to verify) - jpk */ | |
5655 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
5656 | ||
5657 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 5658 | iwl4965_config_ap(priv); |
b481de9c | 5659 | else { |
bb8c093b | 5660 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 5661 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
bb8c093b | 5662 | iwl4965_rxon_add_station( |
b481de9c ZY |
5663 | priv, priv->active_rxon.bssid_addr, 1); |
5664 | } | |
5665 | ||
5666 | } else { | |
bb8c093b | 5667 | iwl4965_scan_cancel_timeout(priv, 100); |
b481de9c | 5668 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 5669 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5670 | } |
5671 | ||
fde3571f | 5672 | done: |
b481de9c ZY |
5673 | spin_lock_irqsave(&priv->lock, flags); |
5674 | if (!conf->ssid_len) | |
5675 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
5676 | else | |
5677 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
5678 | ||
5679 | priv->essid_len = conf->ssid_len; | |
5680 | spin_unlock_irqrestore(&priv->lock, flags); | |
5681 | ||
5682 | IWL_DEBUG_MAC80211("leave\n"); | |
5683 | mutex_unlock(&priv->mutex); | |
5684 | ||
5685 | return 0; | |
5686 | } | |
5687 | ||
bb8c093b | 5688 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
5689 | unsigned int changed_flags, |
5690 | unsigned int *total_flags, | |
5691 | int mc_count, struct dev_addr_list *mc_list) | |
5692 | { | |
5693 | /* | |
5694 | * XXX: dummy | |
bb8c093b | 5695 | * see also iwl4965_connection_init_rx_config |
4150c572 JB |
5696 | */ |
5697 | *total_flags = 0; | |
5698 | } | |
5699 | ||
bb8c093b | 5700 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
5701 | struct ieee80211_if_init_conf *conf) |
5702 | { | |
c79dd5b5 | 5703 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5704 | |
5705 | IWL_DEBUG_MAC80211("enter\n"); | |
5706 | ||
5707 | mutex_lock(&priv->mutex); | |
948c171c | 5708 | |
fee1247a | 5709 | if (iwl_is_ready_rf(priv)) { |
fde3571f MA |
5710 | iwl4965_scan_cancel_timeout(priv, 100); |
5711 | cancel_delayed_work(&priv->post_associate); | |
5712 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5713 | iwl4965_commit_rxon(priv); | |
5714 | } | |
32bfd35d JB |
5715 | if (priv->vif == conf->vif) { |
5716 | priv->vif = NULL; | |
b481de9c ZY |
5717 | memset(priv->bssid, 0, ETH_ALEN); |
5718 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
5719 | priv->essid_len = 0; | |
5720 | } | |
5721 | mutex_unlock(&priv->mutex); | |
5722 | ||
5723 | IWL_DEBUG_MAC80211("leave\n"); | |
5724 | ||
5725 | } | |
471b3efd | 5726 | |
3109ece1 | 5727 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
5728 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
5729 | struct ieee80211_vif *vif, | |
5730 | struct ieee80211_bss_conf *bss_conf, | |
5731 | u32 changes) | |
220173b0 | 5732 | { |
c79dd5b5 | 5733 | struct iwl_priv *priv = hw->priv; |
220173b0 | 5734 | |
3109ece1 TW |
5735 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
5736 | ||
471b3efd | 5737 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
5738 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
5739 | bss_conf->use_short_preamble); | |
471b3efd | 5740 | if (bss_conf->use_short_preamble) |
220173b0 TW |
5741 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
5742 | else | |
5743 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
5744 | } | |
5745 | ||
471b3efd | 5746 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 5747 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 5748 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
5749 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
5750 | else | |
5751 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
5752 | } | |
5753 | ||
98952d5d | 5754 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 5755 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d | 5756 | iwl4965_ht_conf(priv, bss_conf); |
c7de35cd | 5757 | iwl_set_rxon_chain(priv); |
98952d5d TW |
5758 | } |
5759 | ||
471b3efd | 5760 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 5761 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
5762 | /* This should never happen as this function should |
5763 | * never be called from interrupt context. */ | |
5764 | if (WARN_ON_ONCE(in_interrupt())) | |
5765 | return; | |
3109ece1 TW |
5766 | if (bss_conf->assoc) { |
5767 | priv->assoc_id = bss_conf->aid; | |
5768 | priv->beacon_int = bss_conf->beacon_int; | |
5769 | priv->timestamp = bss_conf->timestamp; | |
5770 | priv->assoc_capability = bss_conf->assoc_capability; | |
5771 | priv->next_scan_jiffies = jiffies + | |
5772 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
5773 | mutex_lock(&priv->mutex); |
5774 | iwl4965_post_associate(priv); | |
5775 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
5776 | } else { |
5777 | priv->assoc_id = 0; | |
5778 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
5779 | } | |
5780 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
5781 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 5782 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
5783 | } |
5784 | ||
220173b0 | 5785 | } |
b481de9c | 5786 | |
bb8c093b | 5787 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
5788 | { |
5789 | int rc = 0; | |
5790 | unsigned long flags; | |
c79dd5b5 | 5791 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5792 | |
5793 | IWL_DEBUG_MAC80211("enter\n"); | |
5794 | ||
052c4b9f | 5795 | mutex_lock(&priv->mutex); |
b481de9c ZY |
5796 | spin_lock_irqsave(&priv->lock, flags); |
5797 | ||
fee1247a | 5798 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
5799 | rc = -EIO; |
5800 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
5801 | goto out_unlock; | |
5802 | } | |
5803 | ||
5804 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
5805 | rc = -EIO; | |
5806 | IWL_ERROR("ERROR: APs don't scan\n"); | |
5807 | goto out_unlock; | |
5808 | } | |
5809 | ||
7878a5a4 MA |
5810 | /* we don't schedule scan within next_scan_jiffies period */ |
5811 | if (priv->next_scan_jiffies && | |
5812 | time_after(priv->next_scan_jiffies, jiffies)) { | |
5813 | rc = -EAGAIN; | |
5814 | goto out_unlock; | |
5815 | } | |
b481de9c | 5816 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
5817 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
5818 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
5819 | rc = -EAGAIN; |
5820 | goto out_unlock; | |
5821 | } | |
5822 | if (len) { | |
7878a5a4 | 5823 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
bb8c093b | 5824 | iwl4965_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
5825 | |
5826 | priv->one_direct_scan = 1; | |
5827 | priv->direct_ssid_len = (u8) | |
5828 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
5829 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
5830 | } else |
5831 | priv->one_direct_scan = 0; | |
b481de9c | 5832 | |
bb8c093b | 5833 | rc = iwl4965_scan_initiate(priv); |
b481de9c ZY |
5834 | |
5835 | IWL_DEBUG_MAC80211("leave\n"); | |
5836 | ||
5837 | out_unlock: | |
5838 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 5839 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
5840 | |
5841 | return rc; | |
5842 | } | |
5843 | ||
ab885f8c EG |
5844 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
5845 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
5846 | u32 iv32, u16 *phase1key) | |
5847 | { | |
5848 | struct iwl_priv *priv = hw->priv; | |
5849 | u8 sta_id = IWL_INVALID_STATION; | |
5850 | unsigned long flags; | |
5851 | __le16 key_flags = 0; | |
5852 | int i; | |
5853 | DECLARE_MAC_BUF(mac); | |
5854 | ||
5855 | IWL_DEBUG_MAC80211("enter\n"); | |
5856 | ||
947b13a7 | 5857 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
5858 | if (sta_id == IWL_INVALID_STATION) { |
5859 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
5860 | print_mac(mac, addr)); | |
5861 | return; | |
5862 | } | |
5863 | ||
5864 | iwl4965_scan_cancel_timeout(priv, 100); | |
5865 | ||
5866 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
5867 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
5868 | key_flags &= ~STA_KEY_FLG_INVALID; | |
5869 | ||
5425e490 | 5870 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
5871 | key_flags |= STA_KEY_MULTICAST_MSK; |
5872 | ||
5873 | spin_lock_irqsave(&priv->sta_lock, flags); | |
5874 | ||
ab885f8c EG |
5875 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
5876 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
5877 | ||
5878 | for (i = 0; i < 5; i++) | |
5879 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
5880 | cpu_to_le16(phase1key[i]); | |
5881 | ||
5882 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
5883 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
5884 | ||
133636de | 5885 | iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
ab885f8c EG |
5886 | |
5887 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
5888 | ||
5889 | IWL_DEBUG_MAC80211("leave\n"); | |
5890 | } | |
5891 | ||
bb8c093b | 5892 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
5893 | const u8 *local_addr, const u8 *addr, |
5894 | struct ieee80211_key_conf *key) | |
5895 | { | |
c79dd5b5 | 5896 | struct iwl_priv *priv = hw->priv; |
0795af57 | 5897 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
5898 | int ret = 0; |
5899 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 5900 | u8 is_default_wep_key = 0; |
b481de9c ZY |
5901 | |
5902 | IWL_DEBUG_MAC80211("enter\n"); | |
5903 | ||
099b40b7 | 5904 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
5905 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
5906 | return -EOPNOTSUPP; | |
5907 | } | |
5908 | ||
5909 | if (is_zero_ether_addr(addr)) | |
5910 | /* only support pairwise keys */ | |
5911 | return -EOPNOTSUPP; | |
5912 | ||
947b13a7 | 5913 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
5914 | if (sta_id == IWL_INVALID_STATION) { |
5915 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
5916 | print_mac(mac, addr)); | |
5917 | return -EINVAL; | |
b481de9c | 5918 | |
deb09c43 | 5919 | } |
b481de9c | 5920 | |
6974e363 | 5921 | mutex_lock(&priv->mutex); |
bb8c093b | 5922 | iwl4965_scan_cancel_timeout(priv, 100); |
6974e363 EG |
5923 | mutex_unlock(&priv->mutex); |
5924 | ||
5925 | /* If we are getting WEP group key and we didn't receive any key mapping | |
5926 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
5927 | * in 1X mode. | |
5928 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 5929 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
5930 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
5931 | if (cmd == SET_KEY) | |
5932 | is_default_wep_key = !priv->key_mapping_key; | |
5933 | else | |
5934 | is_default_wep_key = priv->default_wep_key; | |
5935 | } | |
052c4b9f | 5936 | |
b481de9c | 5937 | switch (cmd) { |
deb09c43 | 5938 | case SET_KEY: |
6974e363 EG |
5939 | if (is_default_wep_key) |
5940 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 5941 | else |
7480513f | 5942 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
5943 | |
5944 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
5945 | break; |
5946 | case DISABLE_KEY: | |
6974e363 EG |
5947 | if (is_default_wep_key) |
5948 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 5949 | else |
3ec47732 | 5950 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
5951 | |
5952 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
5953 | break; |
5954 | default: | |
deb09c43 | 5955 | ret = -EINVAL; |
b481de9c ZY |
5956 | } |
5957 | ||
5958 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 5959 | |
deb09c43 | 5960 | return ret; |
b481de9c ZY |
5961 | } |
5962 | ||
e100bb64 | 5963 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
b481de9c ZY |
5964 | const struct ieee80211_tx_queue_params *params) |
5965 | { | |
c79dd5b5 | 5966 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5967 | unsigned long flags; |
5968 | int q; | |
b481de9c ZY |
5969 | |
5970 | IWL_DEBUG_MAC80211("enter\n"); | |
5971 | ||
fee1247a | 5972 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
5973 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
5974 | return -EIO; | |
5975 | } | |
5976 | ||
5977 | if (queue >= AC_NUM) { | |
5978 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
5979 | return 0; | |
5980 | } | |
5981 | ||
b481de9c ZY |
5982 | if (!priv->qos_data.qos_enable) { |
5983 | priv->qos_data.qos_active = 0; | |
5984 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
5985 | return 0; | |
5986 | } | |
5987 | q = AC_NUM - 1 - queue; | |
5988 | ||
5989 | spin_lock_irqsave(&priv->lock, flags); | |
5990 | ||
5991 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
5992 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
5993 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
5994 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 5995 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
5996 | |
5997 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
5998 | priv->qos_data.qos_active = 1; | |
5999 | ||
6000 | spin_unlock_irqrestore(&priv->lock, flags); | |
6001 | ||
6002 | mutex_lock(&priv->mutex); | |
6003 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 6004 | iwl4965_activate_qos(priv, 1); |
3109ece1 | 6005 | else if (priv->assoc_id && iwl_is_associated(priv)) |
bb8c093b | 6006 | iwl4965_activate_qos(priv, 0); |
b481de9c ZY |
6007 | |
6008 | mutex_unlock(&priv->mutex); | |
6009 | ||
b481de9c ZY |
6010 | IWL_DEBUG_MAC80211("leave\n"); |
6011 | return 0; | |
6012 | } | |
6013 | ||
bb8c093b | 6014 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
6015 | struct ieee80211_tx_queue_stats *stats) |
6016 | { | |
c79dd5b5 | 6017 | struct iwl_priv *priv = hw->priv; |
b481de9c | 6018 | int i, avail; |
bb8c093b CH |
6019 | struct iwl4965_tx_queue *txq; |
6020 | struct iwl4965_queue *q; | |
b481de9c ZY |
6021 | unsigned long flags; |
6022 | ||
6023 | IWL_DEBUG_MAC80211("enter\n"); | |
6024 | ||
fee1247a | 6025 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
6026 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
6027 | return -EIO; | |
6028 | } | |
6029 | ||
6030 | spin_lock_irqsave(&priv->lock, flags); | |
6031 | ||
6032 | for (i = 0; i < AC_NUM; i++) { | |
6033 | txq = &priv->txq[i]; | |
6034 | q = &txq->q; | |
bb8c093b | 6035 | avail = iwl4965_queue_space(q); |
b481de9c | 6036 | |
57ffc589 JB |
6037 | stats[i].len = q->n_window - avail; |
6038 | stats[i].limit = q->n_window - q->high_mark; | |
6039 | stats[i].count = q->n_window; | |
b481de9c ZY |
6040 | |
6041 | } | |
6042 | spin_unlock_irqrestore(&priv->lock, flags); | |
6043 | ||
6044 | IWL_DEBUG_MAC80211("leave\n"); | |
6045 | ||
6046 | return 0; | |
6047 | } | |
6048 | ||
bb8c093b | 6049 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
6050 | struct ieee80211_low_level_stats *stats) |
6051 | { | |
bf403db8 EK |
6052 | struct iwl_priv *priv = hw->priv; |
6053 | ||
6054 | priv = hw->priv; | |
b481de9c ZY |
6055 | IWL_DEBUG_MAC80211("enter\n"); |
6056 | IWL_DEBUG_MAC80211("leave\n"); | |
6057 | ||
6058 | return 0; | |
6059 | } | |
6060 | ||
bb8c093b | 6061 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c | 6062 | { |
bf403db8 EK |
6063 | struct iwl_priv *priv; |
6064 | ||
6065 | priv = hw->priv; | |
b481de9c ZY |
6066 | IWL_DEBUG_MAC80211("enter\n"); |
6067 | IWL_DEBUG_MAC80211("leave\n"); | |
6068 | ||
6069 | return 0; | |
6070 | } | |
6071 | ||
bb8c093b | 6072 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 6073 | { |
c79dd5b5 | 6074 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6075 | unsigned long flags; |
6076 | ||
6077 | mutex_lock(&priv->mutex); | |
6078 | IWL_DEBUG_MAC80211("enter\n"); | |
6079 | ||
6080 | priv->lq_mngr.lq_ready = 0; | |
c8b0e6e1 | 6081 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 6082 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 6083 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 6084 | spin_unlock_irqrestore(&priv->lock, flags); |
c8b0e6e1 | 6085 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 6086 | |
c7de35cd | 6087 | iwl_reset_qos(priv); |
b481de9c ZY |
6088 | |
6089 | cancel_delayed_work(&priv->post_associate); | |
6090 | ||
6091 | spin_lock_irqsave(&priv->lock, flags); | |
6092 | priv->assoc_id = 0; | |
6093 | priv->assoc_capability = 0; | |
b481de9c ZY |
6094 | priv->assoc_station_added = 0; |
6095 | ||
6096 | /* new association get rid of ibss beacon skb */ | |
6097 | if (priv->ibss_beacon) | |
6098 | dev_kfree_skb(priv->ibss_beacon); | |
6099 | ||
6100 | priv->ibss_beacon = NULL; | |
6101 | ||
6102 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 6103 | priv->timestamp = 0; |
b481de9c ZY |
6104 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
6105 | priv->beacon_int = 0; | |
6106 | ||
6107 | spin_unlock_irqrestore(&priv->lock, flags); | |
6108 | ||
fee1247a | 6109 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
6110 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
6111 | mutex_unlock(&priv->mutex); | |
6112 | return; | |
6113 | } | |
6114 | ||
052c4b9f | 6115 | /* we are restarting association process |
6116 | * clear RXON_FILTER_ASSOC_MSK bit | |
6117 | */ | |
6118 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
bb8c093b | 6119 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 6120 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 6121 | iwl4965_commit_rxon(priv); |
052c4b9f | 6122 | } |
6123 | ||
5da4b55f MA |
6124 | iwl_power_update_mode(priv, 0); |
6125 | ||
b481de9c ZY |
6126 | /* Per mac80211.h: This is only used in IBSS mode... */ |
6127 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 6128 | |
b481de9c ZY |
6129 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
6130 | mutex_unlock(&priv->mutex); | |
6131 | return; | |
6132 | } | |
6133 | ||
bb8c093b | 6134 | iwl4965_set_rate(priv); |
b481de9c ZY |
6135 | |
6136 | mutex_unlock(&priv->mutex); | |
6137 | ||
6138 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
6139 | } |
6140 | ||
bb8c093b | 6141 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
6142 | struct ieee80211_tx_control *control) |
6143 | { | |
c79dd5b5 | 6144 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6145 | unsigned long flags; |
6146 | ||
6147 | mutex_lock(&priv->mutex); | |
6148 | IWL_DEBUG_MAC80211("enter\n"); | |
6149 | ||
fee1247a | 6150 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
6151 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
6152 | mutex_unlock(&priv->mutex); | |
6153 | return -EIO; | |
6154 | } | |
6155 | ||
6156 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
6157 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
6158 | mutex_unlock(&priv->mutex); | |
6159 | return -EIO; | |
6160 | } | |
6161 | ||
6162 | spin_lock_irqsave(&priv->lock, flags); | |
6163 | ||
6164 | if (priv->ibss_beacon) | |
6165 | dev_kfree_skb(priv->ibss_beacon); | |
6166 | ||
6167 | priv->ibss_beacon = skb; | |
6168 | ||
6169 | priv->assoc_id = 0; | |
6170 | ||
6171 | IWL_DEBUG_MAC80211("leave\n"); | |
6172 | spin_unlock_irqrestore(&priv->lock, flags); | |
6173 | ||
c7de35cd | 6174 | iwl_reset_qos(priv); |
b481de9c ZY |
6175 | |
6176 | queue_work(priv->workqueue, &priv->post_associate.work); | |
6177 | ||
6178 | mutex_unlock(&priv->mutex); | |
6179 | ||
6180 | return 0; | |
6181 | } | |
6182 | ||
b481de9c ZY |
6183 | /***************************************************************************** |
6184 | * | |
6185 | * sysfs attributes | |
6186 | * | |
6187 | *****************************************************************************/ | |
6188 | ||
0a6857e7 | 6189 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
6190 | |
6191 | /* | |
6192 | * The following adds a new attribute to the sysfs representation | |
6193 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
6194 | * used for controlling the debug level. | |
6195 | * | |
6196 | * See the level definitions in iwl for details. | |
6197 | */ | |
6198 | ||
6199 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | |
6200 | { | |
0a6857e7 | 6201 | return sprintf(buf, "0x%08X\n", iwl_debug_level); |
b481de9c ZY |
6202 | } |
6203 | static ssize_t store_debug_level(struct device_driver *d, | |
6204 | const char *buf, size_t count) | |
6205 | { | |
6206 | char *p = (char *)buf; | |
6207 | u32 val; | |
6208 | ||
6209 | val = simple_strtoul(p, &p, 0); | |
6210 | if (p == buf) | |
6211 | printk(KERN_INFO DRV_NAME | |
6212 | ": %s is not in hex or decimal form.\n", buf); | |
6213 | else | |
0a6857e7 | 6214 | iwl_debug_level = val; |
b481de9c ZY |
6215 | |
6216 | return strnlen(buf, count); | |
6217 | } | |
6218 | ||
6219 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | |
6220 | show_debug_level, store_debug_level); | |
6221 | ||
0a6857e7 | 6222 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 6223 | |
b481de9c ZY |
6224 | |
6225 | static ssize_t show_temperature(struct device *d, | |
6226 | struct device_attribute *attr, char *buf) | |
6227 | { | |
c79dd5b5 | 6228 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 6229 | |
fee1247a | 6230 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6231 | return -EAGAIN; |
6232 | ||
bb8c093b | 6233 | return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv)); |
b481de9c ZY |
6234 | } |
6235 | ||
6236 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
6237 | ||
6238 | static ssize_t show_rs_window(struct device *d, | |
6239 | struct device_attribute *attr, | |
6240 | char *buf) | |
6241 | { | |
c79dd5b5 | 6242 | struct iwl_priv *priv = d->driver_data; |
bb8c093b | 6243 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); |
b481de9c ZY |
6244 | } |
6245 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
6246 | ||
6247 | static ssize_t show_tx_power(struct device *d, | |
6248 | struct device_attribute *attr, char *buf) | |
6249 | { | |
c79dd5b5 | 6250 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6251 | return sprintf(buf, "%d\n", priv->user_txpower_limit); |
6252 | } | |
6253 | ||
6254 | static ssize_t store_tx_power(struct device *d, | |
6255 | struct device_attribute *attr, | |
6256 | const char *buf, size_t count) | |
6257 | { | |
c79dd5b5 | 6258 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6259 | char *p = (char *)buf; |
6260 | u32 val; | |
6261 | ||
6262 | val = simple_strtoul(p, &p, 10); | |
6263 | if (p == buf) | |
6264 | printk(KERN_INFO DRV_NAME | |
6265 | ": %s is not in decimal form.\n", buf); | |
6266 | else | |
bb8c093b | 6267 | iwl4965_hw_reg_set_txpower(priv, val); |
b481de9c ZY |
6268 | |
6269 | return count; | |
6270 | } | |
6271 | ||
6272 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
6273 | ||
6274 | static ssize_t show_flags(struct device *d, | |
6275 | struct device_attribute *attr, char *buf) | |
6276 | { | |
c79dd5b5 | 6277 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6278 | |
6279 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
6280 | } | |
6281 | ||
6282 | static ssize_t store_flags(struct device *d, | |
6283 | struct device_attribute *attr, | |
6284 | const char *buf, size_t count) | |
6285 | { | |
c79dd5b5 | 6286 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6287 | u32 flags = simple_strtoul(buf, NULL, 0); |
6288 | ||
6289 | mutex_lock(&priv->mutex); | |
6290 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
6291 | /* Cancel any currently running scans... */ | |
bb8c093b | 6292 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
6293 | IWL_WARNING("Could not cancel scan.\n"); |
6294 | else { | |
6295 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
6296 | flags); | |
6297 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 6298 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6299 | } |
6300 | } | |
6301 | mutex_unlock(&priv->mutex); | |
6302 | ||
6303 | return count; | |
6304 | } | |
6305 | ||
6306 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
6307 | ||
6308 | static ssize_t show_filter_flags(struct device *d, | |
6309 | struct device_attribute *attr, char *buf) | |
6310 | { | |
c79dd5b5 | 6311 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6312 | |
6313 | return sprintf(buf, "0x%04X\n", | |
6314 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
6315 | } | |
6316 | ||
6317 | static ssize_t store_filter_flags(struct device *d, | |
6318 | struct device_attribute *attr, | |
6319 | const char *buf, size_t count) | |
6320 | { | |
c79dd5b5 | 6321 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6322 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
6323 | ||
6324 | mutex_lock(&priv->mutex); | |
6325 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
6326 | /* Cancel any currently running scans... */ | |
bb8c093b | 6327 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
6328 | IWL_WARNING("Could not cancel scan.\n"); |
6329 | else { | |
6330 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
6331 | "0x%04X\n", filter_flags); | |
6332 | priv->staging_rxon.filter_flags = | |
6333 | cpu_to_le32(filter_flags); | |
bb8c093b | 6334 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6335 | } |
6336 | } | |
6337 | mutex_unlock(&priv->mutex); | |
6338 | ||
6339 | return count; | |
6340 | } | |
6341 | ||
6342 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
6343 | store_filter_flags); | |
6344 | ||
c8b0e6e1 | 6345 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
6346 | |
6347 | static ssize_t show_measurement(struct device *d, | |
6348 | struct device_attribute *attr, char *buf) | |
6349 | { | |
c79dd5b5 | 6350 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 6351 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
6352 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
6353 | u8 *data = (u8 *) & measure_report; | |
6354 | unsigned long flags; | |
6355 | ||
6356 | spin_lock_irqsave(&priv->lock, flags); | |
6357 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
6358 | spin_unlock_irqrestore(&priv->lock, flags); | |
6359 | return 0; | |
6360 | } | |
6361 | memcpy(&measure_report, &priv->measure_report, size); | |
6362 | priv->measurement_status = 0; | |
6363 | spin_unlock_irqrestore(&priv->lock, flags); | |
6364 | ||
6365 | while (size && (PAGE_SIZE - len)) { | |
6366 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
6367 | PAGE_SIZE - len, 1); | |
6368 | len = strlen(buf); | |
6369 | if (PAGE_SIZE - len) | |
6370 | buf[len++] = '\n'; | |
6371 | ||
6372 | ofs += 16; | |
6373 | size -= min(size, 16U); | |
6374 | } | |
6375 | ||
6376 | return len; | |
6377 | } | |
6378 | ||
6379 | static ssize_t store_measurement(struct device *d, | |
6380 | struct device_attribute *attr, | |
6381 | const char *buf, size_t count) | |
6382 | { | |
c79dd5b5 | 6383 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6384 | struct ieee80211_measurement_params params = { |
6385 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
6386 | .start_time = cpu_to_le64(priv->last_tsf), | |
6387 | .duration = cpu_to_le16(1), | |
6388 | }; | |
6389 | u8 type = IWL_MEASURE_BASIC; | |
6390 | u8 buffer[32]; | |
6391 | u8 channel; | |
6392 | ||
6393 | if (count) { | |
6394 | char *p = buffer; | |
6395 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
6396 | channel = simple_strtoul(p, NULL, 0); | |
6397 | if (channel) | |
6398 | params.channel = channel; | |
6399 | ||
6400 | p = buffer; | |
6401 | while (*p && *p != ' ') | |
6402 | p++; | |
6403 | if (*p) | |
6404 | type = simple_strtoul(p + 1, NULL, 0); | |
6405 | } | |
6406 | ||
6407 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
6408 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 6409 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
6410 | |
6411 | return count; | |
6412 | } | |
6413 | ||
6414 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
6415 | show_measurement, store_measurement); | |
c8b0e6e1 | 6416 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
6417 | |
6418 | static ssize_t store_retry_rate(struct device *d, | |
6419 | struct device_attribute *attr, | |
6420 | const char *buf, size_t count) | |
6421 | { | |
c79dd5b5 | 6422 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6423 | |
6424 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
6425 | if (priv->retry_rate <= 0) | |
6426 | priv->retry_rate = 1; | |
6427 | ||
6428 | return count; | |
6429 | } | |
6430 | ||
6431 | static ssize_t show_retry_rate(struct device *d, | |
6432 | struct device_attribute *attr, char *buf) | |
6433 | { | |
c79dd5b5 | 6434 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6435 | return sprintf(buf, "%d", priv->retry_rate); |
6436 | } | |
6437 | ||
6438 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
6439 | store_retry_rate); | |
6440 | ||
6441 | static ssize_t store_power_level(struct device *d, | |
6442 | struct device_attribute *attr, | |
6443 | const char *buf, size_t count) | |
6444 | { | |
c79dd5b5 | 6445 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
6446 | int rc; |
6447 | int mode; | |
6448 | ||
6449 | mode = simple_strtoul(buf, NULL, 0); | |
6450 | mutex_lock(&priv->mutex); | |
6451 | ||
fee1247a | 6452 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
6453 | rc = -EAGAIN; |
6454 | goto out; | |
6455 | } | |
6456 | ||
5da4b55f MA |
6457 | rc = iwl_power_set_user_mode(priv, mode); |
6458 | if (rc) { | |
6459 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
6460 | goto out; | |
b481de9c | 6461 | } |
b481de9c ZY |
6462 | rc = count; |
6463 | ||
6464 | out: | |
6465 | mutex_unlock(&priv->mutex); | |
6466 | return rc; | |
6467 | } | |
6468 | ||
6469 | #define MAX_WX_STRING 80 | |
6470 | ||
6471 | /* Values are in microsecond */ | |
6472 | static const s32 timeout_duration[] = { | |
6473 | 350000, | |
6474 | 250000, | |
6475 | 75000, | |
6476 | 37000, | |
6477 | 25000, | |
6478 | }; | |
6479 | static const s32 period_duration[] = { | |
6480 | 400000, | |
6481 | 700000, | |
6482 | 1000000, | |
6483 | 1000000, | |
6484 | 1000000 | |
6485 | }; | |
6486 | ||
6487 | static ssize_t show_power_level(struct device *d, | |
6488 | struct device_attribute *attr, char *buf) | |
6489 | { | |
c79dd5b5 | 6490 | struct iwl_priv *priv = dev_get_drvdata(d); |
5da4b55f | 6491 | int level = priv->power_data.power_mode; |
b481de9c ZY |
6492 | char *p = buf; |
6493 | ||
6494 | p += sprintf(p, "%d ", level); | |
6495 | switch (level) { | |
6496 | case IWL_POWER_MODE_CAM: | |
6497 | case IWL_POWER_AC: | |
6498 | p += sprintf(p, "(AC)"); | |
6499 | break; | |
6500 | case IWL_POWER_BATTERY: | |
6501 | p += sprintf(p, "(BATTERY)"); | |
6502 | break; | |
6503 | default: | |
6504 | p += sprintf(p, | |
6505 | "(Timeout %dms, Period %dms)", | |
6506 | timeout_duration[level - 1] / 1000, | |
6507 | period_duration[level - 1] / 1000); | |
6508 | } | |
5da4b55f | 6509 | /* |
b481de9c ZY |
6510 | if (!(priv->power_mode & IWL_POWER_ENABLED)) |
6511 | p += sprintf(p, " OFF\n"); | |
6512 | else | |
6513 | p += sprintf(p, " \n"); | |
5da4b55f MA |
6514 | */ |
6515 | p += sprintf(p, " \n"); | |
b481de9c | 6516 | return (p - buf + 1); |
b481de9c ZY |
6517 | } |
6518 | ||
6519 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
6520 | store_power_level); | |
6521 | ||
6522 | static ssize_t show_channels(struct device *d, | |
6523 | struct device_attribute *attr, char *buf) | |
6524 | { | |
8318d78a JB |
6525 | /* all this shit doesn't belong into sysfs anyway */ |
6526 | return 0; | |
b481de9c ZY |
6527 | } |
6528 | ||
6529 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
6530 | ||
6531 | static ssize_t show_statistics(struct device *d, | |
6532 | struct device_attribute *attr, char *buf) | |
6533 | { | |
c79dd5b5 | 6534 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 6535 | u32 size = sizeof(struct iwl4965_notif_statistics); |
b481de9c ZY |
6536 | u32 len = 0, ofs = 0; |
6537 | u8 *data = (u8 *) & priv->statistics; | |
6538 | int rc = 0; | |
6539 | ||
fee1247a | 6540 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6541 | return -EAGAIN; |
6542 | ||
6543 | mutex_lock(&priv->mutex); | |
49ea8596 | 6544 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
6545 | mutex_unlock(&priv->mutex); |
6546 | ||
6547 | if (rc) { | |
6548 | len = sprintf(buf, | |
6549 | "Error sending statistics request: 0x%08X\n", rc); | |
6550 | return len; | |
6551 | } | |
6552 | ||
6553 | while (size && (PAGE_SIZE - len)) { | |
6554 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
6555 | PAGE_SIZE - len, 1); | |
6556 | len = strlen(buf); | |
6557 | if (PAGE_SIZE - len) | |
6558 | buf[len++] = '\n'; | |
6559 | ||
6560 | ofs += 16; | |
6561 | size -= min(size, 16U); | |
6562 | } | |
6563 | ||
6564 | return len; | |
6565 | } | |
6566 | ||
6567 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
6568 | ||
b481de9c ZY |
6569 | static ssize_t show_status(struct device *d, |
6570 | struct device_attribute *attr, char *buf) | |
6571 | { | |
c79dd5b5 | 6572 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 6573 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6574 | return -EAGAIN; |
6575 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
6576 | } | |
6577 | ||
6578 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
6579 | ||
6580 | static ssize_t dump_error_log(struct device *d, | |
6581 | struct device_attribute *attr, | |
6582 | const char *buf, size_t count) | |
6583 | { | |
6584 | char *p = (char *)buf; | |
6585 | ||
6586 | if (p[0] == '1') | |
c79dd5b5 | 6587 | iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
6588 | |
6589 | return strnlen(buf, count); | |
6590 | } | |
6591 | ||
6592 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | |
6593 | ||
6594 | static ssize_t dump_event_log(struct device *d, | |
6595 | struct device_attribute *attr, | |
6596 | const char *buf, size_t count) | |
6597 | { | |
6598 | char *p = (char *)buf; | |
6599 | ||
6600 | if (p[0] == '1') | |
c79dd5b5 | 6601 | iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
6602 | |
6603 | return strnlen(buf, count); | |
6604 | } | |
6605 | ||
6606 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |
6607 | ||
6608 | /***************************************************************************** | |
6609 | * | |
6610 | * driver setup and teardown | |
6611 | * | |
6612 | *****************************************************************************/ | |
6613 | ||
c79dd5b5 | 6614 | static void iwl4965_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
6615 | { |
6616 | priv->workqueue = create_workqueue(DRV_NAME); | |
6617 | ||
6618 | init_waitqueue_head(&priv->wait_command_queue); | |
6619 | ||
bb8c093b CH |
6620 | INIT_WORK(&priv->up, iwl4965_bg_up); |
6621 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
6622 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
6623 | INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed); | |
6624 | INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan); | |
6625 | INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan); | |
6626 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); | |
6627 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
6628 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); | |
6629 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start); | |
6630 | INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start); | |
6631 | INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check); | |
6632 | ||
6633 | iwl4965_hw_setup_deferred_work(priv); | |
b481de9c ZY |
6634 | |
6635 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 6636 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
6637 | } |
6638 | ||
c79dd5b5 | 6639 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 6640 | { |
bb8c093b | 6641 | iwl4965_hw_cancel_deferred_work(priv); |
b481de9c | 6642 | |
3ae6a054 | 6643 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
6644 | cancel_delayed_work(&priv->scan_check); |
6645 | cancel_delayed_work(&priv->alive_start); | |
6646 | cancel_delayed_work(&priv->post_associate); | |
6647 | cancel_work_sync(&priv->beacon_update); | |
6648 | } | |
6649 | ||
bb8c093b | 6650 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c ZY |
6651 | &dev_attr_channels.attr, |
6652 | &dev_attr_dump_errors.attr, | |
6653 | &dev_attr_dump_events.attr, | |
6654 | &dev_attr_flags.attr, | |
6655 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 6656 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
6657 | &dev_attr_measurement.attr, |
6658 | #endif | |
6659 | &dev_attr_power_level.attr, | |
6660 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
6661 | &dev_attr_rs_window.attr, |
6662 | &dev_attr_statistics.attr, | |
6663 | &dev_attr_status.attr, | |
6664 | &dev_attr_temperature.attr, | |
b481de9c ZY |
6665 | &dev_attr_tx_power.attr, |
6666 | ||
6667 | NULL | |
6668 | }; | |
6669 | ||
bb8c093b | 6670 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 6671 | .name = NULL, /* put in device directory */ |
bb8c093b | 6672 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
6673 | }; |
6674 | ||
bb8c093b CH |
6675 | static struct ieee80211_ops iwl4965_hw_ops = { |
6676 | .tx = iwl4965_mac_tx, | |
6677 | .start = iwl4965_mac_start, | |
6678 | .stop = iwl4965_mac_stop, | |
6679 | .add_interface = iwl4965_mac_add_interface, | |
6680 | .remove_interface = iwl4965_mac_remove_interface, | |
6681 | .config = iwl4965_mac_config, | |
6682 | .config_interface = iwl4965_mac_config_interface, | |
6683 | .configure_filter = iwl4965_configure_filter, | |
6684 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 6685 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
6686 | .get_stats = iwl4965_mac_get_stats, |
6687 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
6688 | .conf_tx = iwl4965_mac_conf_tx, | |
6689 | .get_tsf = iwl4965_mac_get_tsf, | |
6690 | .reset_tsf = iwl4965_mac_reset_tsf, | |
6691 | .beacon_update = iwl4965_mac_beacon_update, | |
471b3efd | 6692 | .bss_info_changed = iwl4965_bss_info_changed, |
c8b0e6e1 | 6693 | #ifdef CONFIG_IWL4965_HT |
9ab46173 | 6694 | .ampdu_action = iwl4965_mac_ampdu_action, |
c8b0e6e1 | 6695 | #endif /* CONFIG_IWL4965_HT */ |
bb8c093b | 6696 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
6697 | }; |
6698 | ||
bb8c093b | 6699 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
6700 | { |
6701 | int err = 0; | |
c79dd5b5 | 6702 | struct iwl_priv *priv; |
b481de9c | 6703 | struct ieee80211_hw *hw; |
82b9a121 | 6704 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 6705 | unsigned long flags; |
5a66926a | 6706 | DECLARE_MAC_BUF(mac); |
b481de9c | 6707 | |
316c30d9 AK |
6708 | /************************ |
6709 | * 1. Allocating HW data | |
6710 | ************************/ | |
6711 | ||
6440adb5 CB |
6712 | /* Disabling hardware scan means that mac80211 will perform scans |
6713 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 6714 | if (cfg->mod_params->disable_hw_scan) { |
bf403db8 EK |
6715 | if (cfg->mod_params->debug & IWL_DL_INFO) |
6716 | dev_printk(KERN_DEBUG, &(pdev->dev), | |
6717 | "Disabling hw_scan\n"); | |
bb8c093b | 6718 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
6719 | } |
6720 | ||
1d0a082d AK |
6721 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
6722 | if (!hw) { | |
b481de9c ZY |
6723 | err = -ENOMEM; |
6724 | goto out; | |
6725 | } | |
1d0a082d AK |
6726 | priv = hw->priv; |
6727 | /* At this point both hw and priv are allocated. */ | |
6728 | ||
b481de9c ZY |
6729 | SET_IEEE80211_DEV(hw, &pdev->dev); |
6730 | ||
6731 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 6732 | priv->cfg = cfg; |
b481de9c | 6733 | priv->pci_dev = pdev; |
316c30d9 | 6734 | |
0a6857e7 | 6735 | #ifdef CONFIG_IWLWIFI_DEBUG |
bf403db8 | 6736 | priv->debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
6737 | atomic_set(&priv->restrict_refcnt, 0); |
6738 | #endif | |
b481de9c | 6739 | |
316c30d9 AK |
6740 | /************************** |
6741 | * 2. Initializing PCI bus | |
6742 | **************************/ | |
6743 | if (pci_enable_device(pdev)) { | |
6744 | err = -ENODEV; | |
6745 | goto out_ieee80211_free_hw; | |
6746 | } | |
6747 | ||
6748 | pci_set_master(pdev); | |
6749 | ||
cc2a8ea8 | 6750 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
316c30d9 | 6751 | if (!err) |
cc2a8ea8 RR |
6752 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
6753 | if (err) { | |
6754 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
6755 | if (!err) | |
6756 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
6757 | /* both attempts failed: */ | |
316c30d9 | 6758 | if (err) { |
cc2a8ea8 RR |
6759 | printk(KERN_WARNING "%s: No suitable DMA available.\n", |
6760 | DRV_NAME); | |
316c30d9 | 6761 | goto out_pci_disable_device; |
cc2a8ea8 | 6762 | } |
316c30d9 AK |
6763 | } |
6764 | ||
6765 | err = pci_request_regions(pdev, DRV_NAME); | |
6766 | if (err) | |
6767 | goto out_pci_disable_device; | |
6768 | ||
6769 | pci_set_drvdata(pdev, priv); | |
6770 | ||
6771 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
6772 | * PCI Tx retries from interfering with C3 CPU state */ | |
6773 | pci_write_config_byte(pdev, 0x41, 0x00); | |
6774 | ||
6775 | /*********************** | |
6776 | * 3. Read REV register | |
6777 | ***********************/ | |
6778 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
6779 | if (!priv->hw_base) { | |
6780 | err = -ENODEV; | |
6781 | goto out_pci_release_regions; | |
6782 | } | |
6783 | ||
6784 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
6785 | (unsigned long long) pci_resource_len(pdev, 0)); | |
6786 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
6787 | ||
b661c819 | 6788 | iwl_hw_detect(priv); |
316c30d9 | 6789 | printk(KERN_INFO DRV_NAME |
b661c819 TW |
6790 | ": Detected Intel Wireless WiFi Link %s REV=0x%X\n", |
6791 | priv->cfg->name, priv->hw_rev); | |
316c30d9 | 6792 | |
91238714 TW |
6793 | /* amp init */ |
6794 | err = priv->cfg->ops->lib->apm_ops.init(priv); | |
316c30d9 | 6795 | if (err < 0) { |
91238714 | 6796 | IWL_DEBUG_INFO("Failed to init APMG\n"); |
316c30d9 AK |
6797 | goto out_iounmap; |
6798 | } | |
91238714 TW |
6799 | /***************** |
6800 | * 4. Read EEPROM | |
6801 | *****************/ | |
316c30d9 AK |
6802 | /* Read the EEPROM */ |
6803 | err = iwl_eeprom_init(priv); | |
6804 | if (err) { | |
6805 | IWL_ERROR("Unable to init EEPROM\n"); | |
6806 | goto out_iounmap; | |
6807 | } | |
8614f360 TW |
6808 | err = iwl_eeprom_check_version(priv); |
6809 | if (err) | |
6810 | goto out_iounmap; | |
6811 | ||
316c30d9 AK |
6812 | /* MAC Address location in EEPROM same for 3945/4965 */ |
6813 | iwl_eeprom_get_mac(priv, priv->mac_addr); | |
6814 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
6815 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
6816 | ||
6817 | /************************ | |
6818 | * 5. Setup HW constants | |
6819 | ************************/ | |
6820 | /* Device-specific setup */ | |
5425e490 TW |
6821 | if (priv->cfg->ops->lib->set_hw_params(priv)) { |
6822 | IWL_ERROR("failed to set hw parameters\n"); | |
073d3f5f | 6823 | goto out_free_eeprom; |
316c30d9 AK |
6824 | } |
6825 | ||
6826 | /******************* | |
6827 | * 6. Setup hw/priv | |
6828 | *******************/ | |
b481de9c | 6829 | |
bf85ea4f AK |
6830 | err = iwl_setup(priv); |
6831 | if (err) | |
399f4900 | 6832 | goto out_free_eeprom; |
bf85ea4f | 6833 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
6834 | |
6835 | /********************************** | |
6836 | * 7. Initialize module parameters | |
6837 | **********************************/ | |
6838 | ||
6839 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 6840 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
6841 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
6842 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
6843 | } | |
6844 | ||
1ea87396 | 6845 | if (priv->cfg->mod_params->enable_qos) |
316c30d9 AK |
6846 | priv->qos_data.qos_enable = 1; |
6847 | ||
6848 | /******************** | |
6849 | * 8. Setup services | |
6850 | ********************/ | |
0359facc | 6851 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 6852 | iwl4965_disable_interrupts(priv); |
0359facc | 6853 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
6854 | |
6855 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
6856 | if (err) { | |
6857 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
399f4900 | 6858 | goto out_free_eeprom; |
316c30d9 AK |
6859 | } |
6860 | ||
6861 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
6862 | if (err) { | |
6863 | IWL_ERROR("failed to create debugfs files\n"); | |
6864 | goto out_remove_sysfs; | |
6865 | } | |
6866 | ||
6867 | iwl4965_setup_deferred_work(priv); | |
6868 | iwl4965_setup_rx_handlers(priv); | |
6869 | ||
6870 | /******************** | |
6871 | * 9. Conclude | |
6872 | ********************/ | |
5a66926a ZY |
6873 | pci_save_state(pdev); |
6874 | pci_disable_device(pdev); | |
b481de9c | 6875 | |
c8381fdc MA |
6876 | /* notify iwlcore to init */ |
6877 | iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT); | |
b481de9c ZY |
6878 | return 0; |
6879 | ||
316c30d9 AK |
6880 | out_remove_sysfs: |
6881 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
073d3f5f TW |
6882 | out_free_eeprom: |
6883 | iwl_eeprom_free(priv); | |
b481de9c ZY |
6884 | out_iounmap: |
6885 | pci_iounmap(pdev, priv->hw_base); | |
6886 | out_pci_release_regions: | |
6887 | pci_release_regions(pdev); | |
316c30d9 | 6888 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
6889 | out_pci_disable_device: |
6890 | pci_disable_device(pdev); | |
b481de9c ZY |
6891 | out_ieee80211_free_hw: |
6892 | ieee80211_free_hw(priv->hw); | |
6893 | out: | |
6894 | return err; | |
6895 | } | |
6896 | ||
c83dbf68 | 6897 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 6898 | { |
c79dd5b5 | 6899 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
6900 | struct list_head *p, *q; |
6901 | int i; | |
0359facc | 6902 | unsigned long flags; |
b481de9c ZY |
6903 | |
6904 | if (!priv) | |
6905 | return; | |
6906 | ||
6907 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
6908 | ||
c4f55232 RR |
6909 | if (priv->mac80211_registered) { |
6910 | ieee80211_unregister_hw(priv->hw); | |
6911 | priv->mac80211_registered = 0; | |
6912 | } | |
6913 | ||
b481de9c | 6914 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 6915 | |
bb8c093b | 6916 | iwl4965_down(priv); |
b481de9c | 6917 | |
0359facc MA |
6918 | /* make sure we flush any pending irq or |
6919 | * tasklet for the driver | |
6920 | */ | |
6921 | spin_lock_irqsave(&priv->lock, flags); | |
6922 | iwl4965_disable_interrupts(priv); | |
6923 | spin_unlock_irqrestore(&priv->lock, flags); | |
6924 | ||
6925 | iwl_synchronize_irq(priv); | |
6926 | ||
b481de9c ZY |
6927 | /* Free MAC hash list for ADHOC */ |
6928 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
6929 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
6930 | list_del(p); | |
bb8c093b | 6931 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
6932 | } |
6933 | } | |
6934 | ||
c8381fdc | 6935 | iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT); |
712b6cf5 | 6936 | iwl_dbgfs_unregister(priv); |
bb8c093b | 6937 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c | 6938 | |
bb8c093b | 6939 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
6940 | |
6941 | if (priv->rxq.bd) | |
a55360e4 | 6942 | iwl_rx_queue_free(priv, &priv->rxq); |
bb8c093b | 6943 | iwl4965_hw_txq_ctx_free(priv); |
b481de9c | 6944 | |
bf85ea4f | 6945 | iwlcore_clear_stations_table(priv); |
073d3f5f | 6946 | iwl_eeprom_free(priv); |
b481de9c | 6947 | |
b481de9c | 6948 | |
948c171c MA |
6949 | /*netif_stop_queue(dev); */ |
6950 | flush_workqueue(priv->workqueue); | |
6951 | ||
bb8c093b | 6952 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
6953 | * priv->workqueue... so we can't take down the workqueue |
6954 | * until now... */ | |
6955 | destroy_workqueue(priv->workqueue); | |
6956 | priv->workqueue = NULL; | |
6957 | ||
b481de9c ZY |
6958 | pci_iounmap(pdev, priv->hw_base); |
6959 | pci_release_regions(pdev); | |
6960 | pci_disable_device(pdev); | |
6961 | pci_set_drvdata(pdev, NULL); | |
6962 | ||
bf85ea4f | 6963 | iwl_free_channel_map(priv); |
c7de35cd | 6964 | iwlcore_free_geos(priv); |
b481de9c ZY |
6965 | |
6966 | if (priv->ibss_beacon) | |
6967 | dev_kfree_skb(priv->ibss_beacon); | |
6968 | ||
6969 | ieee80211_free_hw(priv->hw); | |
6970 | } | |
6971 | ||
6972 | #ifdef CONFIG_PM | |
6973 | ||
bb8c093b | 6974 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 6975 | { |
c79dd5b5 | 6976 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 6977 | |
e655b9f0 ZY |
6978 | if (priv->is_open) { |
6979 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
6980 | iwl4965_mac_stop(priv->hw); | |
6981 | priv->is_open = 1; | |
6982 | } | |
b481de9c | 6983 | |
b481de9c ZY |
6984 | pci_set_power_state(pdev, PCI_D3hot); |
6985 | ||
b481de9c ZY |
6986 | return 0; |
6987 | } | |
6988 | ||
bb8c093b | 6989 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 6990 | { |
c79dd5b5 | 6991 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 6992 | |
b481de9c | 6993 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 6994 | |
e655b9f0 ZY |
6995 | if (priv->is_open) |
6996 | iwl4965_mac_start(priv->hw); | |
b481de9c | 6997 | |
e655b9f0 | 6998 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
6999 | return 0; |
7000 | } | |
7001 | ||
7002 | #endif /* CONFIG_PM */ | |
7003 | ||
7004 | /***************************************************************************** | |
7005 | * | |
7006 | * driver and module entry point | |
7007 | * | |
7008 | *****************************************************************************/ | |
7009 | ||
fed9017e RR |
7010 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
7011 | static struct pci_device_id iwl_hw_card_ids[] = { | |
7012 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
7013 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
5a6a256e TW |
7014 | #ifdef CONFIG_IWL5000 |
7015 | {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, | |
7016 | {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, | |
7017 | {IWL_PCI_DEVICE(0x423A, PCI_ANY_ID, iwl5350_agn_cfg)}, | |
7018 | #endif /* CONFIG_IWL5000 */ | |
fed9017e RR |
7019 | {0} |
7020 | }; | |
7021 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
7022 | ||
7023 | static struct pci_driver iwl_driver = { | |
b481de9c | 7024 | .name = DRV_NAME, |
fed9017e | 7025 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
7026 | .probe = iwl4965_pci_probe, |
7027 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 7028 | #ifdef CONFIG_PM |
bb8c093b CH |
7029 | .suspend = iwl4965_pci_suspend, |
7030 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
7031 | #endif |
7032 | }; | |
7033 | ||
bb8c093b | 7034 | static int __init iwl4965_init(void) |
b481de9c ZY |
7035 | { |
7036 | ||
7037 | int ret; | |
7038 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
7039 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 RC |
7040 | |
7041 | ret = iwl4965_rate_control_register(); | |
7042 | if (ret) { | |
7043 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
7044 | return ret; | |
7045 | } | |
7046 | ||
fed9017e | 7047 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
7048 | if (ret) { |
7049 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 7050 | goto error_register; |
b481de9c | 7051 | } |
0a6857e7 | 7052 | #ifdef CONFIG_IWLWIFI_DEBUG |
fed9017e | 7053 | ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level); |
b481de9c ZY |
7054 | if (ret) { |
7055 | IWL_ERROR("Unable to create driver sysfs file\n"); | |
897e1cf2 | 7056 | goto error_debug; |
b481de9c ZY |
7057 | } |
7058 | #endif | |
7059 | ||
7060 | return ret; | |
897e1cf2 RC |
7061 | |
7062 | #ifdef CONFIG_IWLWIFI_DEBUG | |
7063 | error_debug: | |
fed9017e | 7064 | pci_unregister_driver(&iwl_driver); |
897e1cf2 RC |
7065 | #endif |
7066 | error_register: | |
7067 | iwl4965_rate_control_unregister(); | |
7068 | return ret; | |
b481de9c ZY |
7069 | } |
7070 | ||
bb8c093b | 7071 | static void __exit iwl4965_exit(void) |
b481de9c | 7072 | { |
0a6857e7 | 7073 | #ifdef CONFIG_IWLWIFI_DEBUG |
fed9017e | 7074 | driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level); |
b481de9c | 7075 | #endif |
fed9017e | 7076 | pci_unregister_driver(&iwl_driver); |
897e1cf2 | 7077 | iwl4965_rate_control_unregister(); |
b481de9c ZY |
7078 | } |
7079 | ||
bb8c093b CH |
7080 | module_exit(iwl4965_exit); |
7081 | module_init(iwl4965_init); |