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iwlwifi: default WEP HW encryption
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
b481de9c 49#include "iwl-4965.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
b481de9c 54
c79dd5b5 55static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 56 struct iwl4965_tx_queue *txq);
416e1438 57
b481de9c
ZY		 58/******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
b481de9c
ZY		 64/*
65 * module name, copyright, version, etc.
66 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
67 */
68
69#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
70
0a6857e7 71#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 72#define VD "d"
73#else
74#define VD
75#endif
76
c8b0e6e1 77#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 78#define VS "s"
79#else
80#define VS
81#endif
82
df48c323 83#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 84
b481de9c
ZY		 85
86MODULE_DESCRIPTION(DRV_DESCRIPTION);
87MODULE_VERSION(DRV_VERSION);
88MODULE_AUTHOR(DRV_COPYRIGHT);
89MODULE_LICENSE("GPL");
90
91__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
92{
93 u16 fc = le16_to_cpu(hdr->frame_control);
94 int hdr_len = ieee80211_get_hdrlen(fc);
95
96 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
97 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
98 return NULL;
99}
100
8318d78a 101static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
c79dd5b5 102 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 103{
8318d78a 104 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 105}
106
bb8c093b 107static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 108{
109 /* Single white space is for Linksys APs */
110 if (essid_len == 1 && essid[0] == ' ')
111 return 1;
112
113 /* Otherwise, if the entire essid is 0, we assume it is hidden */
114 while (essid_len) {
115 essid_len--;
116 if (essid[essid_len] != '\0')
117 return 0;
118 }
119
120 return 1;
121}
122
bb8c093b 123static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 124{
125 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
126 const char *s = essid;
127 char *d = escaped;
128
bb8c093b 129 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 130 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
131 return escaped;
132 }
133
134 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
135 while (essid_len--) {
136 if (*s == '\0') {
137 *d++ = '\\';
138 *d++ = '0';
139 s++;
140 } else
141 *d++ = *s++;
142 }
143 *d = '\0';
144 return escaped;
145}
146
b481de9c
ZY		 147/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
148 * DMA services
149 *
150 * Theory of operation
151 *
6440adb5
CB		 152 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
153 * of buffer descriptors, each of which points to one or more data buffers for
154 * the device to read from or fill. Driver and device exchange status of each
155 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
156 * entries in each circular buffer, to protect against confusing empty and full
157 * queue states.
158 *
159 * The device reads or writes the data in the queues via the device's several
160 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 161 *
162 * For Tx queue, there are low mark and high mark limits. If, after queuing
163 * the packet for Tx, free space become < low mark, Tx queue stopped. When
164 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
165 * Tx queue resumed.
166 *
6440adb5
CB		 167 * The 4965 operates with up to 17 queues: One receive queue, one transmit
168 * queue (#4) for sending commands to the device firmware, and 15 other
169 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 170 *
171 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 172 ***************************************************/
173
fe01b477 174int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 175{
fc4b6853 176 int s = q->read_ptr - q->write_ptr;
b481de9c 177
fc4b6853 178 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 179 s -= q->n_bd;
180
181 if (s <= 0)
182 s += q->n_window;
183 /* keep some reserve to not confuse empty and full situations */
184 s -= 2;
185 if (s < 0)
186 s = 0;
187 return s;
188}
189
b481de9c 190
bb8c093b 191static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 192{
fc4b6853
TW		 193 return q->write_ptr > q->read_ptr ?
194 (i >= q->read_ptr && i < q->write_ptr) :
195 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 196}
197
bb8c093b 198static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 199{
6440adb5 200 /* This is for scan command, the big buffer at end of command array */
b481de9c 201 if (is_huge)
6440adb5 202 return q->n_window; /* must be power of 2 */
b481de9c 203
6440adb5 204 /* Otherwise, use normal size buffers */
b481de9c
ZY		 205 return index & (q->n_window - 1);
206}
207
6440adb5
CB		 208/**
209 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
210 */
c79dd5b5 211static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 212 int count, int slots_num, u32 id)
213{
214 q->n_bd = count;
215 q->n_window = slots_num;
216 q->id = id;
217
c54b679d
TW		 218 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
219 * and iwl_queue_dec_wrap are broken. */
b481de9c
ZY		 220 BUG_ON(!is_power_of_2(count));
221
222 /* slots_num must be power-of-two size, otherwise
223 * get_cmd_index is broken. */
224 BUG_ON(!is_power_of_2(slots_num));
225
226 q->low_mark = q->n_window / 4;
227 if (q->low_mark < 4)
228 q->low_mark = 4;
229
230 q->high_mark = q->n_window / 8;
231 if (q->high_mark < 2)
232 q->high_mark = 2;
233
fc4b6853 234 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 235
236 return 0;
237}
238
6440adb5
CB		 239/**
240 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
241 */
c79dd5b5 242static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 243 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 244{
245 struct pci_dev *dev = priv->pci_dev;
246
6440adb5
CB		 247 /* Driver private data, only for Tx (not command) queues,
248 * not shared with device. */
b481de9c
ZY		 249 if (id != IWL_CMD_QUEUE_NUM) {
250 txq->txb = kmalloc(sizeof(txq->txb[0]) *
251 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
252 if (!txq->txb) {
01ebd063 253 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 254 "structures failed\n");
255 goto error;
256 }
257 } else
258 txq->txb = NULL;
259
6440adb5
CB		 260 /* Circular buffer of transmit frame descriptors (TFDs),
261 * shared with device */
b481de9c
ZY		 262 txq->bd = pci_alloc_consistent(dev,
263 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
264 &txq->q.dma_addr);
265
266 if (!txq->bd) {
267 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
268 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
269 goto error;
270 }
271 txq->q.id = id;
272
273 return 0;
274
275 error:
276 if (txq->txb) {
277 kfree(txq->txb);
278 txq->txb = NULL;
279 }
280
281 return -ENOMEM;
282}
283
8b6eaea8
CB		 284/**
285 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
286 */
c79dd5b5 287int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 288 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 289{
290 struct pci_dev *dev = priv->pci_dev;
291 int len;
292 int rc = 0;
293
8b6eaea8
CB		 294 /*
295 * Alloc buffer array for commands (Tx or other types of commands).
296 * For the command queue (#4), allocate command space + one big
297 * command for scan, since scan command is very huge; the system will
298 * not have two scans at the same time, so only one is needed.
bb54244b 299 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB		 300 * space is needed.
301 */
857485c0 302 len = sizeof(struct iwl_cmd) * slots_num;
b481de9c
ZY		 303 if (txq_id == IWL_CMD_QUEUE_NUM)
304 len += IWL_MAX_SCAN_SIZE;
305 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
306 if (!txq->cmd)
307 return -ENOMEM;
308
8b6eaea8 309 /* Alloc driver data array and TFD circular buffer */
bb8c093b 310 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 311 if (rc) {
312 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
313
314 return -ENOMEM;
315 }
316 txq->need_update = 0;
317
318 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 319 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 320 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB		 321
322 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 323 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 324
8b6eaea8 325 /* Tell device where to find queue */
bb8c093b 326 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 327
328 return 0;
329}
330
331/**
bb8c093b 332 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 333 * @txq: Transmit queue to deallocate.
334 *
335 * Empty queue by removing and destroying all BD's.
6440adb5
CB		 336 * Free all buffers.
337 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 338 */
c79dd5b5 339void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 340{
bb8c093b 341 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344
345 if (q->n_bd == 0)
346 return;
347
348 /* first, empty all BD's */
fc4b6853 349 for (; q->write_ptr != q->read_ptr;
c54b679d 350 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 351 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 352
857485c0 353 len = sizeof(struct iwl_cmd) * q->n_window;
b481de9c
ZY		 354 if (q->id == IWL_CMD_QUEUE_NUM)
355 len += IWL_MAX_SCAN_SIZE;
356
6440adb5 357 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 358 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
359
6440adb5 360 /* De-alloc circular buffer of TFDs */
b481de9c 361 if (txq->q.n_bd)
bb8c093b 362 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 363 txq->q.n_bd, txq->bd, txq->q.dma_addr);
364
6440adb5 365 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 366 if (txq->txb) {
367 kfree(txq->txb);
368 txq->txb = NULL;
369 }
370
6440adb5 371 /* 0-fill queue descriptor structure */
b481de9c
ZY		 372 memset(txq, 0, sizeof(*txq));
373}
374
bb8c093b 375const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 376
377/*************** STATION TABLE MANAGEMENT ****
9fbab516 378 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 379 * the functionality provided here
380 */
381
382/**************************************************************/
383
01ebd063 384#if 0 /* temporary disable till we add real remove station */
6440adb5
CB		 385/**
386 * iwl4965_remove_station - Remove driver's knowledge of station.
387 *
388 * NOTE: This does not remove station from device's station table.
389 */
c79dd5b5 390static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 391{
392 int index = IWL_INVALID_STATION;
393 int i;
394 unsigned long flags;
395
396 spin_lock_irqsave(&priv->sta_lock, flags);
397
398 if (is_ap)
399 index = IWL_AP_ID;
400 else if (is_broadcast_ether_addr(addr))
401 index = priv->hw_setting.bcast_sta_id;
402 else
403 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
404 if (priv->stations[i].used &&
405 !compare_ether_addr(priv->stations[i].sta.sta.addr,
406 addr)) {
407 index = i;
408 break;
409 }
410
411 if (unlikely(index == IWL_INVALID_STATION))
412 goto out;
413
414 if (priv->stations[index].used) {
415 priv->stations[index].used = 0;
416 priv->num_stations--;
417 }
418
419 BUG_ON(priv->num_stations < 0);
420
421out:
422 spin_unlock_irqrestore(&priv->sta_lock, flags);
423 return 0;
424}
556f8db7 425#endif
b481de9c 426
6440adb5
CB		 427/**
428 * iwl4965_add_station_flags - Add station to tables in driver and device
429 */
c79dd5b5 430u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 431 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 432{
433 int i;
434 int index = IWL_INVALID_STATION;
bb8c093b 435 struct iwl4965_station_entry *station;
b481de9c 436 unsigned long flags_spin;
0795af57 437 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 438
439 spin_lock_irqsave(&priv->sta_lock, flags_spin);
440 if (is_ap)
441 index = IWL_AP_ID;
442 else if (is_broadcast_ether_addr(addr))
443 index = priv->hw_setting.bcast_sta_id;
444 else
445 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
446 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
447 addr)) {
448 index = i;
449 break;
450 }
451
452 if (!priv->stations[i].used &&
453 index == IWL_INVALID_STATION)
454 index = i;
455 }
456
457
9fbab516
BC		 458 /* These two conditions have the same outcome, but keep them separate
459 since they have different meanings */
b481de9c
ZY		 460 if (unlikely(index == IWL_INVALID_STATION)) {
461 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
462 return index;
463 }
464
465 if (priv->stations[index].used &&
466 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
467 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
468 return index;
469 }
470
471
0795af57 472 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 473 station = &priv->stations[index];
474 station->used = 1;
475 priv->num_stations++;
476
6440adb5 477 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 478 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 479 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
480 station->sta.mode = 0;
481 station->sta.sta.sta_id = index;
482 station->sta.station_flags = 0;
483
c8b0e6e1 484#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 485 /* BCAST station and IBSS stations do not work in HT mode */
486 if (index != priv->hw_setting.bcast_sta_id &&
487 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 488 iwl4965_set_ht_add_station(priv, index,
489 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 490#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 491
492 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB		 493
494 /* Add station to device's station table */
bb8c093b 495 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 496 return index;
497
498}
499
b481de9c 500
b481de9c
ZY		 501
502/*************** HOST COMMAND QUEUE FUNCTIONS *****/
503
b481de9c 504/**
bb8c093b 505 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 506 * @priv: device private data point
507 * @cmd: a point to the ucode command structure
508 *
509 * The function returns < 0 values to indicate the operation is
510 * failed. On success, it turns the index (> 0) of command in the
511 * command queue.
512 */
857485c0 513int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 514{
bb8c093b
CH		 515 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
516 struct iwl4965_queue *q = &txq->q;
517 struct iwl4965_tfd_frame *tfd;
b481de9c 518 u32 *control_flags;
857485c0 519 struct iwl_cmd *out_cmd;
b481de9c
ZY		 520 u32 idx;
521 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
522 dma_addr_t phys_addr;
523 int ret;
524 unsigned long flags;
525
526 /* If any of the command structures end up being larger than
527 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
528 * we will need to increase the size of the TFD entries */
529 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
530 !(cmd->meta.flags & CMD_SIZE_HUGE));
531
fee1247a 532 if (iwl_is_rfkill(priv)) {
c342a1b9
GG		 533 IWL_DEBUG_INFO("Not sending command - RF KILL");
534 return -EIO;
535 }
536
bb8c093b 537 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 538 IWL_ERROR("No space for Tx\n");
539 return -ENOSPC;
540 }
541
542 spin_lock_irqsave(&priv->hcmd_lock, flags);
543
fc4b6853 544 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 545 memset(tfd, 0, sizeof(*tfd));
546
547 control_flags = (u32 *) tfd;
548
fc4b6853 549 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 550 out_cmd = &txq->cmd[idx];
551
552 out_cmd->hdr.cmd = cmd->id;
553 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
554 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
555
556 /* At this point, the out_cmd now has all of the incoming cmd
557 * information */
558
559 out_cmd->hdr.flags = 0;
560 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 561 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 562 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
563 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
564
565 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 566 offsetof(struct iwl_cmd, hdr);
bb8c093b 567 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 568
569 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
570 "%d bytes at %d[%d]:%d\n",
571 get_cmd_string(out_cmd->hdr.cmd),
572 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 573 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 574
575 txq->need_update = 1;
6440adb5
CB		 576
577 /* Set up entry in queue's byte count circular buffer */
b481de9c 578 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
CB		 579
580 /* Increment and update queue's write index */
c54b679d 581 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 582 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 583
584 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
585 return ret ? ret : idx;
586}
587
deb09c43
EG		 588static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
589{
590 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
591
592 if (hw_decrypt)
593 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
594 else
595 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
596
597}
598
c79dd5b5 599int iwl4965_send_statistics_request(struct iwl_priv *priv)
b481de9c 600{
857485c0
TW		 601 u32 flags = 0;
602 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
603 sizeof(flags), &flags);
b481de9c
ZY		 604}
605
606/**
bb8c093b 607 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 608 *
609 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 610 * NOTE: mutex must be held before calling this fnction
611 */
c79dd5b5 612static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY		 613 const u8 *addr, int is_ap)
614{
556f8db7 615 u8 sta_id;
b481de9c 616
6440adb5 617 /* Add station to device's station table */
67d62035
RR		 618#ifdef CONFIG_IWL4965_HT
619 struct ieee80211_conf *conf = &priv->hw->conf;
620 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
621
622 if ((is_ap) &&
623 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
624 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
625 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
626 0, cur_ht_config);
627 else
628#endif /* CONFIG_IWL4965_HT */
629 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
630 0, NULL);
6440adb5
CB		 631
632 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 633 iwl4965_add_station(priv, addr, is_ap);
634
556f8db7 635 return sta_id;
b481de9c
ZY		 636}
637
b481de9c 638/**
bb8c093b 639 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 640 *
641 * NOTE: This is really only useful during development and can eventually
642 * be #ifdef'd out once the driver is stable and folks aren't actively
643 * making changes
644 */
bb8c093b 645static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 646{
647 int error = 0;
648 int counter = 1;
649
650 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
651 error |= le32_to_cpu(rxon->flags &
652 (RXON_FLG_TGJ_NARROW_BAND_MSK |
653 RXON_FLG_RADAR_DETECT_MSK));
654 if (error)
655 IWL_WARNING("check 24G fields %d | %d\n",
656 counter++, error);
657 } else {
658 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
659 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
660 if (error)
661 IWL_WARNING("check 52 fields %d | %d\n",
662 counter++, error);
663 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
664 if (error)
665 IWL_WARNING("check 52 CCK %d | %d\n",
666 counter++, error);
667 }
668 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
669 if (error)
670 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
671
672 /* make sure basic rates 6Mbps and 1Mbps are supported */
673 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
674 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
675 if (error)
676 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
677
678 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
679 if (error)
680 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
681
682 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
683 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
684 if (error)
685 IWL_WARNING("check CCK and short slot %d | %d\n",
686 counter++, error);
687
688 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
689 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
690 if (error)
691 IWL_WARNING("check CCK & auto detect %d | %d\n",
692 counter++, error);
693
694 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
695 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
696 if (error)
697 IWL_WARNING("check TGG and auto detect %d | %d\n",
698 counter++, error);
699
700 if (error)
701 IWL_WARNING("Tuning to channel %d\n",
702 le16_to_cpu(rxon->channel));
703
704 if (error) {
bb8c093b 705 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 706 return -1;
707 }
708 return 0;
709}
710
711/**
9fbab516 712 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 713 * @priv: staging_rxon is compared to active_rxon
b481de9c 714 *
9fbab516
BC		 715 * If the RXON structure is changing enough to require a new tune,
716 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
717 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 718 */
c79dd5b5 719static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 720{
721
722 /* These items are only settable from the full RXON command */
723 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
724 compare_ether_addr(priv->staging_rxon.bssid_addr,
725 priv->active_rxon.bssid_addr) ||
726 compare_ether_addr(priv->staging_rxon.node_addr,
727 priv->active_rxon.node_addr) ||
728 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
729 priv->active_rxon.wlap_bssid_addr) ||
730 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
731 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
732 (priv->staging_rxon.air_propagation !=
733 priv->active_rxon.air_propagation) ||
734 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
735 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
736 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
737 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
738 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
739 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
740 return 1;
741
742 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
743 * be updated with the RXON_ASSOC command -- however only some
744 * flag transitions are allowed using RXON_ASSOC */
745
746 /* Check if we are not switching bands */
747 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
748 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
749 return 1;
750
751 /* Check if we are switching association toggle */
752 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
753 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
754 return 1;
755
756 return 0;
757}
758
c79dd5b5 759static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
b481de9c
ZY		 760{
761 int rc = 0;
bb8c093b
CH		 762 struct iwl4965_rx_packet *res = NULL;
763 struct iwl4965_rxon_assoc_cmd rxon_assoc;
857485c0 764 struct iwl_host_cmd cmd = {
b481de9c
ZY		 765 .id = REPLY_RXON_ASSOC,
766 .len = sizeof(rxon_assoc),
767 .meta.flags = CMD_WANT_SKB,
768 .data = &rxon_assoc,
769 };
bb8c093b
CH		 770 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
771 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY		 772
773 if ((rxon1->flags == rxon2->flags) &&
774 (rxon1->filter_flags == rxon2->filter_flags) &&
775 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
776 (rxon1->ofdm_ht_single_stream_basic_rates ==
777 rxon2->ofdm_ht_single_stream_basic_rates) &&
778 (rxon1->ofdm_ht_dual_stream_basic_rates ==
779 rxon2->ofdm_ht_dual_stream_basic_rates) &&
780 (rxon1->rx_chain == rxon2->rx_chain) &&
781 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
782 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
783 return 0;
784 }
785
786 rxon_assoc.flags = priv->staging_rxon.flags;
787 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
788 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
789 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
790 rxon_assoc.reserved = 0;
791 rxon_assoc.ofdm_ht_single_stream_basic_rates =
792 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
793 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
794 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
795 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
796
857485c0 797 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 798 if (rc)
799 return rc;
800
bb8c093b 801 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 802 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
803 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
804 rc = -EIO;
805 }
806
807 priv->alloc_rxb_skb--;
808 dev_kfree_skb_any(cmd.meta.u.skb);
809
810 return rc;
811}
812
813/**
bb8c093b 814 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 815 *
01ebd063 816 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 817 * the active_rxon structure is updated with the new data. This
818 * function correctly transitions out of the RXON_ASSOC_MSK state if
819 * a HW tune is required based on the RXON structure changes.
820 */
c79dd5b5 821static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 822{
823 /* cast away the const for active_rxon in this function */
bb8c093b 824 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 825 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 826 int rc = 0;
827
fee1247a 828 if (!iwl_is_alive(priv))
b481de9c
ZY		 829 return -1;
830
831 /* always get timestamp with Rx frame */
832 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
833
bb8c093b 834 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 835 if (rc) {
836 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
837 return -EINVAL;
838 }
839
840 /* If we don't need to send a full RXON, we can use
bb8c093b 841 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 842 * and other flags for the current radio configuration. */
bb8c093b
CH		 843 if (!iwl4965_full_rxon_required(priv)) {
844 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY		 845 if (rc) {
846 IWL_ERROR("Error setting RXON_ASSOC "
847 "configuration (%d).\n", rc);
848 return rc;
849 }
850
851 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
852
853 return 0;
854 }
855
856 /* station table will be cleared */
857 priv->assoc_station_added = 0;
858
c8b0e6e1 859#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 860 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
861 if (!priv->error_recovering)
862 priv->start_calib = 0;
863
864 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 865#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 866
867 /* If we are currently associated and the new config requires
868 * an RXON_ASSOC and the new config wants the associated mask enabled,
869 * we must clear the associated from the active configuration
870 * before we apply the new config */
3109ece1 871 if (iwl_is_associated(priv) &&
b481de9c
ZY		 872 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
873 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
874 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
875
857485c0 876 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 877 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 878 &priv->active_rxon);
879
880 /* If the mask clearing failed then we set
881 * active_rxon back to what it was previously */
882 if (rc) {
883 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
884 IWL_ERROR("Error clearing ASSOC_MSK on current "
885 "configuration (%d).\n", rc);
886 return rc;
887 }
b481de9c
ZY		 888 }
889
890 IWL_DEBUG_INFO("Sending RXON\n"
891 "* with%s RXON_FILTER_ASSOC_MSK\n"
892 "* channel = %d\n"
0795af57 893 "* bssid = %s\n",
b481de9c
ZY		 894 ((priv->staging_rxon.filter_flags &
895 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
896 le16_to_cpu(priv->staging_rxon.channel),
0795af57 897 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 898
deb09c43 899 iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
b481de9c 900 /* Apply the new configuration */
857485c0 901 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 902 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 903 if (rc) {
904 IWL_ERROR("Error setting new configuration (%d).\n", rc);
905 return rc;
906 }
907
bf85ea4f 908 iwlcore_clear_stations_table(priv);
556f8db7 909
c8b0e6e1 910#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 911 if (!priv->error_recovering)
912 priv->start_calib = 0;
913
914 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
915 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 916#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 917
918 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
919
920 /* If we issue a new RXON command which required a tune then we must
921 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 922 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 923 if (rc) {
924 IWL_ERROR("Error setting Tx power (%d).\n", rc);
925 return rc;
926 }
927
928 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 929 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 930 IWL_INVALID_STATION) {
931 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
932 return -EIO;
933 }
934
935 /* If we have set the ASSOC_MSK and we are in BSS mode then
936 * add the IWL_AP_ID to the station rate table */
3109ece1 937 if (iwl_is_associated(priv) &&
b481de9c 938 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 939 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 940 == IWL_INVALID_STATION) {
941 IWL_ERROR("Error adding AP address for transmit.\n");
942 return -EIO;
943 }
944 priv->assoc_station_added = 1;
6974e363
EG		 945 if (priv->default_wep_key &&
946 iwl_send_static_wepkey_cmd(priv, 0))
947 IWL_ERROR("Could not send WEP static key.\n");
b481de9c
ZY		 948 }
949
950 return 0;
951}
952
c79dd5b5 953static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 954{
bb8c093b 955 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 956 .flags = 3,
957 .lead_time = 0xAA,
958 .max_kill = 1,
959 .kill_ack_mask = 0,
960 .kill_cts_mask = 0,
961 };
962
857485c0 963 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 964 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 965}
966
c79dd5b5 967static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY		 968{
969 int rc = 0;
bb8c093b 970 struct iwl4965_rx_packet *res;
857485c0 971 struct iwl_host_cmd cmd = {
b481de9c
ZY		 972 .id = REPLY_SCAN_ABORT_CMD,
973 .meta.flags = CMD_WANT_SKB,
974 };
975
976 /* If there isn't a scan actively going on in the hardware
977 * then we are in between scan bands and not actually
978 * actively scanning, so don't send the abort command */
979 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
980 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
981 return 0;
982 }
983
857485c0 984 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 985 if (rc) {
986 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
987 return rc;
988 }
989
bb8c093b 990 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 991 if (res->u.status != CAN_ABORT_STATUS) {
992 /* The scan abort will return 1 for success or
993 * 2 for "failure". A failure condition can be
994 * due to simply not being in an active scan which
995 * can occur if we send the scan abort before we
996 * the microcode has notified us that a scan is
997 * completed. */
998 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
999 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1000 clear_bit(STATUS_SCAN_HW, &priv->status);
1001 }
1002
1003 dev_kfree_skb_any(cmd.meta.u.skb);
1004
1005 return rc;
1006}
1007
c79dd5b5 1008static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
857485c0 1009 struct iwl_cmd *cmd,
b481de9c
ZY		 1010 struct sk_buff *skb)
1011{
1012 return 1;
1013}
1014
1015/*
1016 * CARD_STATE_CMD
1017 *
9fbab516 1018 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 1019 *
1020 * When in the 'enable' state the card operates as normal.
1021 * When in the 'disable' state, the card enters into a low power mode.
1022 * When in the 'halt' state, the card is shut down and must be fully
1023 * restarted to come back on.
1024 */
c79dd5b5 1025static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1026{
857485c0 1027 struct iwl_host_cmd cmd = {
b481de9c
ZY		 1028 .id = REPLY_CARD_STATE_CMD,
1029 .len = sizeof(u32),
1030 .data = &flags,
1031 .meta.flags = meta_flag,
1032 };
1033
1034 if (meta_flag & CMD_ASYNC)
bb8c093b 1035 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1036
857485c0 1037 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 1038}
1039
c79dd5b5 1040static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
857485c0 1041 struct iwl_cmd *cmd, struct sk_buff *skb)
b481de9c 1042{
bb8c093b 1043 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY		 1044
1045 if (!skb) {
1046 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1047 return 1;
1048 }
1049
bb8c093b 1050 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY		 1051 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1052 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1053 res->hdr.flags);
1054 return 1;
1055 }
1056
1057 switch (res->u.add_sta.status) {
1058 case ADD_STA_SUCCESS_MSK:
1059 break;
1060 default:
1061 break;
1062 }
1063
1064 /* We didn't cache the SKB; let the caller free it */
1065 return 1;
1066}
1067
c79dd5b5 1068int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 1069 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1070{
bb8c093b 1071 struct iwl4965_rx_packet *res = NULL;
b481de9c 1072 int rc = 0;
857485c0 1073 struct iwl_host_cmd cmd = {
b481de9c 1074 .id = REPLY_ADD_STA,
bb8c093b 1075 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 1076 .meta.flags = flags,
1077 .data = sta,
1078 };
1079
1080 if (flags & CMD_ASYNC)
bb8c093b 1081 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY		 1082 else
1083 cmd.meta.flags |= CMD_WANT_SKB;
1084
857485c0 1085 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 1086
1087 if (rc || (flags & CMD_ASYNC))
1088 return rc;
1089
bb8c093b 1090 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1091 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1092 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1093 res->hdr.flags);
1094 rc = -EIO;
1095 }
1096
1097 if (rc == 0) {
1098 switch (res->u.add_sta.status) {
1099 case ADD_STA_SUCCESS_MSK:
1100 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1101 break;
1102 default:
1103 rc = -EIO;
1104 IWL_WARNING("REPLY_ADD_STA failed\n");
1105 break;
1106 }
1107 }
1108
1109 priv->alloc_rxb_skb--;
1110 dev_kfree_skb_any(cmd.meta.u.skb);
1111
1112 return rc;
1113}
1114
deb09c43 1115static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
b481de9c
ZY		 1116 struct ieee80211_key_conf *keyconf,
1117 u8 sta_id)
1118{
1119 unsigned long flags;
1120 __le16 key_flags = 0;
1121
deb09c43
EG		 1122 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
1123 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1124
1125 if (sta_id == priv->hw_setting.bcast_sta_id)
1126 key_flags |= STA_KEY_MULTICAST_MSK;
1127
1128 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1129 keyconf->hw_key_idx = keyconf->keyidx;
1130
1131 key_flags &= ~STA_KEY_FLG_INVALID;
1132
b481de9c
ZY		 1133 spin_lock_irqsave(&priv->sta_lock, flags);
1134 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1135 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
deb09c43 1136
b481de9c
ZY		 1137 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1138 keyconf->keylen);
1139
1140 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1141 keyconf->keylen);
deb09c43
EG		 1142
1143 priv->stations[sta_id].sta.key.key_offset
1144 = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
b481de9c
ZY		 1145 priv->stations[sta_id].sta.key.key_flags = key_flags;
1146 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1147 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1148
1149 spin_unlock_irqrestore(&priv->sta_lock, flags);
1150
1151 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
deb09c43
EG		 1152 return iwl4965_send_add_station(priv,
1153 &priv->stations[sta_id].sta, CMD_ASYNC);
1154}
1155
1156static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
1157 struct ieee80211_key_conf *keyconf,
1158 u8 sta_id)
1159{
2bc75089
EG		 1160 unsigned long flags;
1161 int ret = 0;
1162
1163 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1164 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1165 keyconf->hw_key_idx = keyconf->keyidx;
1166
1167 spin_lock_irqsave(&priv->sta_lock, flags);
1168
1169 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1170 priv->stations[sta_id].keyinfo.conf = keyconf;
1171 priv->stations[sta_id].keyinfo.keylen = 16;
1172
1173 /* This copy is acutally not needed: we get the key with each TX */
1174 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
1175
1176 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
1177
1178 spin_unlock_irqrestore(&priv->sta_lock, flags);
1179
1180 return ret;
b481de9c
ZY		 1181}
1182
c79dd5b5 1183static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
ZY		 1184{
1185 unsigned long flags;
1186
6974e363
EG		 1187 priv->key_mapping_key = 0;
1188
b481de9c 1189 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH		 1190 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1191 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY		 1192 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1193 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1194 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1195 spin_unlock_irqrestore(&priv->sta_lock, flags);
1196
1197 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1198 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1199 return 0;
1200}
1201
deb09c43
EG		 1202static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
1203 struct ieee80211_key_conf *key, u8 sta_id)
1204{
1205 int ret;
1206
6974e363
EG		 1207 priv->key_mapping_key = 1;
1208
deb09c43
EG		 1209 switch (key->alg) {
1210 case ALG_CCMP:
1211 ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
1212 break;
1213 case ALG_TKIP:
1214 ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
1215 break;
1216 case ALG_WEP:
1217 ret = -EOPNOTSUPP;
1218 break;
1219 default:
1220 IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
1221 ret = -EINVAL;
1222 }
1223
1224 return ret;
1225}
1226
c79dd5b5 1227static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 1228{
1229 struct list_head *element;
1230
1231 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1232 priv->frames_count);
1233
1234 while (!list_empty(&priv->free_frames)) {
1235 element = priv->free_frames.next;
1236 list_del(element);
bb8c093b 1237 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1238 priv->frames_count--;
1239 }
1240
1241 if (priv->frames_count) {
1242 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1243 priv->frames_count);
1244 priv->frames_count = 0;
1245 }
1246}
1247
c79dd5b5 1248static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1249{
bb8c093b 1250 struct iwl4965_frame *frame;
b481de9c
ZY		 1251 struct list_head *element;
1252 if (list_empty(&priv->free_frames)) {
1253 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1254 if (!frame) {
1255 IWL_ERROR("Could not allocate frame!\n");
1256 return NULL;
1257 }
1258
1259 priv->frames_count++;
1260 return frame;
1261 }
1262
1263 element = priv->free_frames.next;
1264 list_del(element);
bb8c093b 1265 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1266}
1267
c79dd5b5 1268static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1269{
1270 memset(frame, 0, sizeof(*frame));
1271 list_add(&frame->list, &priv->free_frames);
1272}
1273
c79dd5b5 1274unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY		 1275 struct ieee80211_hdr *hdr,
1276 const u8 *dest, int left)
1277{
1278
3109ece1 1279 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1280 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1281 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1282 return 0;
1283
1284 if (priv->ibss_beacon->len > left)
1285 return 0;
1286
1287 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1288
1289 return priv->ibss_beacon->len;
1290}
1291
bb8c093b 1292static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY		 1293{
1294 u8 i;
1295
1296 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1297 i = iwl4965_rates[i].next_ieee) {
b481de9c 1298 if (rate_mask & (1 << i))
bb8c093b 1299 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1300 }
1301
1302 return IWL_RATE_INVALID;
1303}
1304
c79dd5b5 1305static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1306{
bb8c093b 1307 struct iwl4965_frame *frame;
b481de9c
ZY		 1308 unsigned int frame_size;
1309 int rc;
1310 u8 rate;
1311
bb8c093b 1312 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1313
1314 if (!frame) {
1315 IWL_ERROR("Could not obtain free frame buffer for beacon "
1316 "command.\n");
1317 return -ENOMEM;
1318 }
1319
1320 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1321 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY		 1322 0xFF0);
1323 if (rate == IWL_INVALID_RATE)
1324 rate = IWL_RATE_6M_PLCP;
1325 } else {
bb8c093b 1326 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY		 1327 if (rate == IWL_INVALID_RATE)
1328 rate = IWL_RATE_1M_PLCP;
1329 }
1330
bb8c093b 1331 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1332
857485c0 1333 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1334 &frame->u.cmd[0]);
1335
bb8c093b 1336 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1337
1338 return rc;
1339}
1340
b481de9c
ZY		 1341/******************************************************************************
1342 *
1343 * Misc. internal state and helper functions
1344 *
1345 ******************************************************************************/
b481de9c 1346
c79dd5b5 1347static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
b481de9c
ZY		 1348{
1349 if (priv->hw_setting.shared_virt)
1350 pci_free_consistent(priv->pci_dev,
bb8c093b 1351 sizeof(struct iwl4965_shared),
b481de9c
ZY		 1352 priv->hw_setting.shared_virt,
1353 priv->hw_setting.shared_phys);
1354}
1355
1356/**
bb8c093b 1357 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1358 *
1359 * return : set the bit for each supported rate insert in ie
1360 */
bb8c093b 1361static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1362 u16 basic_rate, int *left)
b481de9c
ZY		 1363{
1364 u16 ret_rates = 0, bit;
1365 int i;
c7c46676
TW		 1366 u8 *cnt = ie;
1367 u8 *rates = ie + 1;
b481de9c
ZY		 1368
1369 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1370 if (bit & supported_rate) {
1371 ret_rates |= bit;
bb8c093b 1372 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1373 ((bit & basic_rate) ? 0x80 : 0x00);
1374 (*cnt)++;
1375 (*left)--;
1376 if ((*left <= 0) ||
1377 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1378 break;
1379 }
1380 }
1381
1382 return ret_rates;
1383}
1384
b481de9c 1385/**
bb8c093b 1386 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1387 */
c79dd5b5 1388static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW		 1389 enum ieee80211_band band,
1390 struct ieee80211_mgmt *frame,
1391 int left, int is_direct)
b481de9c
ZY		 1392{
1393 int len = 0;
1394 u8 *pos = NULL;
bee488db 1395 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032 1396#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1397 const struct ieee80211_supported_band *sband =
1398 iwl4965_get_hw_mode(priv, band);
8fb88032 1399#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 1400
1401 /* Make sure there is enough space for the probe request,
1402 * two mandatory IEs and the data */
1403 left -= 24;
1404 if (left < 0)
1405 return 0;
1406 len += 24;
1407
1408 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1409 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1410 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1411 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1412 frame->seq_ctrl = 0;
1413
1414 /* fill in our indirect SSID IE */
1415 /* ...next IE... */
1416
1417 left -= 2;
1418 if (left < 0)
1419 return 0;
1420 len += 2;
1421 pos = &(frame->u.probe_req.variable[0]);
1422 *pos++ = WLAN_EID_SSID;
1423 *pos++ = 0;
1424
1425 /* fill in our direct SSID IE... */
1426 if (is_direct) {
1427 /* ...next IE... */
1428 left -= 2 + priv->essid_len;
1429 if (left < 0)
1430 return 0;
1431 /* ... fill it in... */
1432 *pos++ = WLAN_EID_SSID;
1433 *pos++ = priv->essid_len;
1434 memcpy(pos, priv->essid, priv->essid_len);
1435 pos += priv->essid_len;
1436 len += 2 + priv->essid_len;
1437 }
1438
1439 /* fill in supported rate */
1440 /* ...next IE... */
1441 left -= 2;
1442 if (left < 0)
1443 return 0;
c7c46676 1444
b481de9c
ZY		 1445 /* ... fill it in... */
1446 *pos++ = WLAN_EID_SUPP_RATES;
1447 *pos = 0;
c7c46676 1448
bee488db 1449 /* exclude 60M rate */
1450 active_rates = priv->rates_mask;
1451 active_rates &= ~IWL_RATE_60M_MASK;
1452
1453 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1454
c7c46676 1455 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1456 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1457 active_rate_basic, &left);
c7c46676
TW		 1458 active_rates &= ~ret_rates;
1459
bb8c093b 1460 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1461 active_rate_basic, &left);
c7c46676
TW		 1462 active_rates &= ~ret_rates;
1463
b481de9c
ZY		 1464 len += 2 + *pos;
1465 pos += (*pos) + 1;
c7c46676 1466 if (active_rates == 0)
b481de9c
ZY		 1467 goto fill_end;
1468
1469 /* fill in supported extended rate */
1470 /* ...next IE... */
1471 left -= 2;
1472 if (left < 0)
1473 return 0;
1474 /* ... fill it in... */
1475 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1476 *pos = 0;
bb8c093b 1477 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1478 active_rate_basic, &left);
b481de9c
ZY		 1479 if (*pos > 0)
1480 len += 2 + *pos;
1481
c8b0e6e1 1482#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1483 if (sband && sband->ht_info.ht_supported) {
1484 struct ieee80211_ht_cap *ht_cap;
b481de9c
ZY		 1485 pos += (*pos) + 1;
1486 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032 1487 *pos++ = sizeof(struct ieee80211_ht_cap);
78330fdd
TW		 1488 ht_cap = (struct ieee80211_ht_cap *)pos;
1489 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1490 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1491 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
1492 IEEE80211_HT_CAP_AMPDU_FACTOR) |
1493 ((sband->ht_info.ampdu_density << 2) &
1494 IEEE80211_HT_CAP_AMPDU_DENSITY);
8fb88032 1495 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 1496 }
c8b0e6e1 1497#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 1498
1499 fill_end:
1500 return (u16)len;
1501}
1502
1503/*
1504 * QoS support
1505*/
c79dd5b5 1506static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1507 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 1508{
1509
857485c0 1510 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1511 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 1512}
1513
c79dd5b5 1514static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY		 1515{
1516 unsigned long flags;
1517
b481de9c
ZY		 1518 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1519 return;
1520
1521 if (!priv->qos_data.qos_enable)
1522 return;
1523
1524 spin_lock_irqsave(&priv->lock, flags);
1525 priv->qos_data.def_qos_parm.qos_flags = 0;
1526
1527 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1528 !priv->qos_data.qos_cap.q_AP.txop_request)
1529 priv->qos_data.def_qos_parm.qos_flags |=
1530 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 1531 if (priv->qos_data.qos_active)
1532 priv->qos_data.def_qos_parm.qos_flags |=
1533 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1534
c8b0e6e1 1535#ifdef CONFIG_IWL4965_HT
fd105e79 1536 if (priv->current_ht_config.is_ht)
f1f1f5c7 1537 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1538#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1539
b481de9c
ZY		 1540 spin_unlock_irqrestore(&priv->lock, flags);
1541
3109ece1 1542 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW		 1543 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1544 priv->qos_data.qos_active,
1545 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1546
bb8c093b 1547 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 1548 &(priv->qos_data.def_qos_parm));
1549 }
1550}
1551
b481de9c
ZY		 1552/*
1553 * Power management (not Tx power!) functions
1554 */
1555#define MSEC_TO_USEC 1024
1556
1557#define NOSLP __constant_cpu_to_le16(0), 0, 0
1558#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1559#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1560#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1561 __constant_cpu_to_le32(X1), \
1562 __constant_cpu_to_le32(X2), \
1563 __constant_cpu_to_le32(X3), \
1564 __constant_cpu_to_le32(X4)}
1565
1566
1567/* default power management (not Tx power) table values */
1568/* for tim 0-10 */
bb8c093b 1569static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY		 1570 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1571 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1572 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1573 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1574 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1575 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1576};
1577
1578/* for tim > 10 */
bb8c093b 1579static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY		 1580 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1581 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1582 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1583 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1584 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1585 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1586 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1587 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1588 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1589 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1590};
1591
c79dd5b5 1592int iwl4965_power_init_handle(struct iwl_priv *priv)
b481de9c
ZY		 1593{
1594 int rc = 0, i;
bb8c093b
CH		 1595 struct iwl4965_power_mgr *pow_data;
1596 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY		 1597 u16 pci_pm;
1598
1599 IWL_DEBUG_POWER("Initialize power \n");
1600
1601 pow_data = &(priv->power_data);
1602
1603 memset(pow_data, 0, sizeof(*pow_data));
1604
1605 pow_data->active_index = IWL_POWER_RANGE_0;
1606 pow_data->dtim_val = 0xffff;
1607
1608 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1609 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1610
1611 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1612 if (rc != 0)
1613 return 0;
1614 else {
bb8c093b 1615 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY		 1616
1617 IWL_DEBUG_POWER("adjust power command flags\n");
1618
1619 for (i = 0; i < IWL_POWER_AC; i++) {
1620 cmd = &pow_data->pwr_range_0[i].cmd;
1621
1622 if (pci_pm & 0x1)
1623 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1624 else
1625 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1626 }
1627 }
1628 return rc;
1629}
1630
c79dd5b5 1631static int iwl4965_update_power_cmd(struct iwl_priv *priv,
bb8c093b 1632 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY		 1633{
1634 int rc = 0, i;
1635 u8 skip;
1636 u32 max_sleep = 0;
bb8c093b 1637 struct iwl4965_power_vec_entry *range;
b481de9c 1638 u8 period = 0;
bb8c093b 1639 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY		 1640
1641 if (mode > IWL_POWER_INDEX_5) {
1642 IWL_DEBUG_POWER("Error invalid power mode \n");
1643 return -1;
1644 }
1645 pow_data = &(priv->power_data);
1646
1647 if (pow_data->active_index == IWL_POWER_RANGE_0)
1648 range = &pow_data->pwr_range_0[0];
1649 else
1650 range = &pow_data->pwr_range_1[1];
1651
bb8c093b 1652 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY		 1653
1654#ifdef IWL_MAC80211_DISABLE
1655 if (priv->assoc_network != NULL) {
1656 unsigned long flags;
1657
1658 period = priv->assoc_network->tim.tim_period;
1659 }
1660#endif /*IWL_MAC80211_DISABLE */
1661 skip = range[mode].no_dtim;
1662
1663 if (period == 0) {
1664 period = 1;
1665 skip = 0;
1666 }
1667
1668 if (skip == 0) {
1669 max_sleep = period;
1670 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1671 } else {
1672 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1673 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1674 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1675 }
1676
1677 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1678 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1679 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1680 }
1681
1682 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1683 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1684 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1685 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1686 le32_to_cpu(cmd->sleep_interval[0]),
1687 le32_to_cpu(cmd->sleep_interval[1]),
1688 le32_to_cpu(cmd->sleep_interval[2]),
1689 le32_to_cpu(cmd->sleep_interval[3]),
1690 le32_to_cpu(cmd->sleep_interval[4]));
1691
1692 return rc;
1693}
1694
c79dd5b5 1695static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
b481de9c 1696{
9a62f73b 1697 u32 uninitialized_var(final_mode);
b481de9c 1698 int rc;
bb8c093b 1699 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY		 1700
1701 /* If on battery, set to 3,
01ebd063 1702 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY		 1703 * else user level */
1704 switch (mode) {
1705 case IWL_POWER_BATTERY:
1706 final_mode = IWL_POWER_INDEX_3;
1707 break;
1708 case IWL_POWER_AC:
1709 final_mode = IWL_POWER_MODE_CAM;
1710 break;
1711 default:
1712 final_mode = mode;
1713 break;
1714 }
1715
1716 cmd.keep_alive_beacons = 0;
1717
bb8c093b 1718 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 1719
857485c0 1720 rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY		 1721
1722 if (final_mode == IWL_POWER_MODE_CAM)
1723 clear_bit(STATUS_POWER_PMI, &priv->status);
1724 else
1725 set_bit(STATUS_POWER_PMI, &priv->status);
1726
1727 return rc;
1728}
1729
c79dd5b5 1730int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 1731{
1732 /* Filter incoming packets to determine if they are targeted toward
1733 * this network, discarding packets coming from ourselves */
1734 switch (priv->iw_mode) {
1735 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1736 /* packets from our adapter are dropped (echo) */
1737 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1738 return 0;
1739 /* {broad,multi}cast packets to our IBSS go through */
1740 if (is_multicast_ether_addr(header->addr1))
1741 return !compare_ether_addr(header->addr3, priv->bssid);
1742 /* packets to our adapter go through */
1743 return !compare_ether_addr(header->addr1, priv->mac_addr);
1744 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1745 /* packets from our adapter are dropped (echo) */
1746 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1747 return 0;
1748 /* {broad,multi}cast packets to our BSS go through */
1749 if (is_multicast_ether_addr(header->addr1))
1750 return !compare_ether_addr(header->addr2, priv->bssid);
1751 /* packets to our adapter go through */
1752 return !compare_ether_addr(header->addr1, priv->mac_addr);
69dc5d9d
TW		 1753 default:
1754 break;
b481de9c
ZY		 1755 }
1756
1757 return 1;
1758}
1759
1760#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1761
bb8c093b 1762static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 1763{
1764 switch (status & TX_STATUS_MSK) {
1765 case TX_STATUS_SUCCESS:
1766 return "SUCCESS";
1767 TX_STATUS_ENTRY(SHORT_LIMIT);
1768 TX_STATUS_ENTRY(LONG_LIMIT);
1769 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1770 TX_STATUS_ENTRY(MGMNT_ABORT);
1771 TX_STATUS_ENTRY(NEXT_FRAG);
1772 TX_STATUS_ENTRY(LIFE_EXPIRE);
1773 TX_STATUS_ENTRY(DEST_PS);
1774 TX_STATUS_ENTRY(ABORTED);
1775 TX_STATUS_ENTRY(BT_RETRY);
1776 TX_STATUS_ENTRY(STA_INVALID);
1777 TX_STATUS_ENTRY(FRAG_DROPPED);
1778 TX_STATUS_ENTRY(TID_DISABLE);
1779 TX_STATUS_ENTRY(FRAME_FLUSHED);
1780 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1781 TX_STATUS_ENTRY(TX_LOCKED);
1782 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1783 }
1784
1785 return "UNKNOWN";
1786}
1787
1788/**
bb8c093b 1789 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 1790 *
1791 * NOTE: priv->mutex is not required before calling this function
1792 */
c79dd5b5 1793static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY		 1794{
1795 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1796 clear_bit(STATUS_SCANNING, &priv->status);
1797 return 0;
1798 }
1799
1800 if (test_bit(STATUS_SCANNING, &priv->status)) {
1801 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1802 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1803 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1804 queue_work(priv->workqueue, &priv->abort_scan);
1805
1806 } else
1807 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1808
1809 return test_bit(STATUS_SCANNING, &priv->status);
1810 }
1811
1812 return 0;
1813}
1814
1815/**
bb8c093b 1816 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 1817 * @ms: amount of time to wait (in milliseconds) for scan to abort
1818 *
1819 * NOTE: priv->mutex must be held before calling this function
1820 */
c79dd5b5 1821static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY		 1822{
1823 unsigned long now = jiffies;
1824 int ret;
1825
bb8c093b 1826 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 1827 if (ret && ms) {
1828 mutex_unlock(&priv->mutex);
1829 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1830 test_bit(STATUS_SCANNING, &priv->status))
1831 msleep(1);
1832 mutex_lock(&priv->mutex);
1833
1834 return test_bit(STATUS_SCANNING, &priv->status);
1835 }
1836
1837 return ret;
1838}
1839
c79dd5b5 1840static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY		 1841{
1842 /* Reset ieee stats */
1843
1844 /* We don't reset the net_device_stats (ieee->stats) on
1845 * re-association */
1846
1847 priv->last_seq_num = -1;
1848 priv->last_frag_num = -1;
1849 priv->last_packet_time = 0;
1850
bb8c093b 1851 iwl4965_scan_cancel(priv);
b481de9c
ZY		 1852}
1853
1854#define MAX_UCODE_BEACON_INTERVAL 4096
1855#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1856
bb8c093b 1857static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 1858{
1859 u16 new_val = 0;
1860 u16 beacon_factor = 0;
1861
1862 beacon_factor =
1863 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1864 / MAX_UCODE_BEACON_INTERVAL;
1865 new_val = beacon_val / beacon_factor;
1866
1867 return cpu_to_le16(new_val);
1868}
1869
c79dd5b5 1870static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY		 1871{
1872 u64 interval_tm_unit;
1873 u64 tsf, result;
1874 unsigned long flags;
1875 struct ieee80211_conf *conf = NULL;
1876 u16 beacon_int = 0;
1877
1878 conf = ieee80211_get_hw_conf(priv->hw);
1879
1880 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW		 1881 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
1882 priv->rxon_timing.timestamp.dw[0] =
1883 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY		 1884
1885 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1886
3109ece1 1887 tsf = priv->timestamp;
b481de9c
ZY		 1888
1889 beacon_int = priv->beacon_int;
1890 spin_unlock_irqrestore(&priv->lock, flags);
1891
1892 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1893 if (beacon_int == 0) {
1894 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1895 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1896 } else {
1897 priv->rxon_timing.beacon_interval =
1898 cpu_to_le16(beacon_int);
1899 priv->rxon_timing.beacon_interval =
bb8c093b 1900 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 1901 le16_to_cpu(priv->rxon_timing.beacon_interval));
1902 }
1903
1904 priv->rxon_timing.atim_window = 0;
1905 } else {
1906 priv->rxon_timing.beacon_interval =
bb8c093b 1907 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 1908 /* TODO: we need to get atim_window from upper stack
1909 * for now we set to 0 */
1910 priv->rxon_timing.atim_window = 0;
1911 }
1912
1913 interval_tm_unit =
1914 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1915 result = do_div(tsf, interval_tm_unit);
1916 priv->rxon_timing.beacon_init_val =
1917 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1918
1919 IWL_DEBUG_ASSOC
1920 ("beacon interval %d beacon timer %d beacon tim %d\n",
1921 le16_to_cpu(priv->rxon_timing.beacon_interval),
1922 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1923 le16_to_cpu(priv->rxon_timing.atim_window));
1924}
1925
c79dd5b5 1926static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY		 1927{
1928 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1929 IWL_ERROR("APs don't scan.\n");
1930 return 0;
1931 }
1932
fee1247a 1933 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 1934 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1935 return -EIO;
1936 }
1937
1938 if (test_bit(STATUS_SCANNING, &priv->status)) {
1939 IWL_DEBUG_SCAN("Scan already in progress.\n");
1940 return -EAGAIN;
1941 }
1942
1943 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1944 IWL_DEBUG_SCAN("Scan request while abort pending. "
1945 "Queuing.\n");
1946 return -EAGAIN;
1947 }
1948
1949 IWL_DEBUG_INFO("Starting scan...\n");
1950 priv->scan_bands = 2;
1951 set_bit(STATUS_SCANNING, &priv->status);
1952 priv->scan_start = jiffies;
1953 priv->scan_pass_start = priv->scan_start;
1954
1955 queue_work(priv->workqueue, &priv->request_scan);
1956
1957 return 0;
1958}
1959
b481de9c 1960
c79dd5b5 1961static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 1962 enum ieee80211_band band)
b481de9c 1963{
8318d78a 1964 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 1965 priv->staging_rxon.flags &=
1966 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1967 | RXON_FLG_CCK_MSK);
1968 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1969 } else {
bb8c093b 1970 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY		 1971 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1972 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1973 else
1974 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1975
1976 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
1977 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1978
1979 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1980 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1981 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1982 }
1983}
1984
1985/*
01ebd063 1986 * initialize rxon structure with default values from eeprom
b481de9c 1987 */
c79dd5b5 1988static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 1989{
bf85ea4f 1990 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 1991
1992 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1993
1994 switch (priv->iw_mode) {
1995 case IEEE80211_IF_TYPE_AP:
1996 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1997 break;
1998
1999 case IEEE80211_IF_TYPE_STA:
2000 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2001 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2002 break;
2003
2004 case IEEE80211_IF_TYPE_IBSS:
2005 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2006 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2007 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2008 RXON_FILTER_ACCEPT_GRP_MSK;
2009 break;
2010
2011 case IEEE80211_IF_TYPE_MNTR:
2012 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2013 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2014 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2015 break;
69dc5d9d
TW		 2016 default:
2017 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2018 break;
b481de9c
ZY		 2019 }
2020
2021#if 0
2022 /* TODO: Figure out when short_preamble would be set and cache from
2023 * that */
2024 if (!hw_to_local(priv->hw)->short_preamble)
2025 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2026 else
2027 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2028#endif
2029
8622e705 2030 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY		 2031 le16_to_cpu(priv->staging_rxon.channel));
2032
2033 if (!ch_info)
2034 ch_info = &priv->channel_info[0];
2035
2036 /*
2037 * in some case A channels are all non IBSS
2038 * in this case force B/G channel
2039 */
2040 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2041 !(is_channel_ibss(ch_info)))
2042 ch_info = &priv->channel_info[0];
2043
2044 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 2045 priv->band = ch_info->band;
b481de9c 2046
8318d78a 2047 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 2048
2049 priv->staging_rxon.ofdm_basic_rates =
2050 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2051 priv->staging_rxon.cck_basic_rates =
2052 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2053
2054 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2055 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2056 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2057 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2058 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2059 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2060 iwl4965_set_rxon_chain(priv);
2061}
2062
c79dd5b5 2063static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 2064{
b481de9c 2065 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 2066 const struct iwl_channel_info *ch_info;
b481de9c 2067
8622e705 2068 ch_info = iwl_get_channel_info(priv,
8318d78a 2069 priv->band,
b481de9c
ZY		 2070 le16_to_cpu(priv->staging_rxon.channel));
2071
2072 if (!ch_info || !is_channel_ibss(ch_info)) {
2073 IWL_ERROR("channel %d not IBSS channel\n",
2074 le16_to_cpu(priv->staging_rxon.channel));
2075 return -EINVAL;
2076 }
2077 }
2078
b481de9c
ZY		 2079 priv->iw_mode = mode;
2080
bb8c093b 2081 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 2082 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2083
bf85ea4f 2084 iwlcore_clear_stations_table(priv);
b481de9c 2085
fde3571f 2086 /* dont commit rxon if rf-kill is on*/
fee1247a 2087 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 2088 return -EAGAIN;
2089
2090 cancel_delayed_work(&priv->scan_check);
2091 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2092 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2093 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2094 return -EAGAIN;
2095 }
2096
bb8c093b 2097 iwl4965_commit_rxon(priv);
b481de9c
ZY		 2098
2099 return 0;
2100}
2101
c79dd5b5 2102static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 2103 struct ieee80211_tx_control *ctl,
857485c0 2104 struct iwl_cmd *cmd,
b481de9c 2105 struct sk_buff *skb_frag,
deb09c43 2106 int sta_id)
b481de9c 2107{
deb09c43 2108 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
6974e363
EG		 2109 struct iwl_wep_key *wepkey;
2110 int keyidx = 0;
2111
2112 BUG_ON(ctl->key_idx > 3);
b481de9c
ZY		 2113
2114 switch (keyinfo->alg) {
2115 case ALG_CCMP:
2116 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2117 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS		 2118 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
2119 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY		 2120 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2121 break;
2122
2123 case ALG_TKIP:
b481de9c 2124 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG		 2125 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
2126 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
2127 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY		 2128 break;
2129
2130 case ALG_WEP:
6974e363
EG		 2131 wepkey = &priv->wep_keys[ctl->key_idx];
2132 cmd->cmd.tx.sec_ctl = 0;
2133 if (priv->default_wep_key) {
2134 /* the WEP key was sent as static */
2135 keyidx = ctl->key_idx;
2136 memcpy(&cmd->cmd.tx.key[3], wepkey->key,
2137 wepkey->key_size);
2138 if (wepkey->key_size == WEP_KEY_LEN_128)
2139 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2140 } else {
2141 IWL_ERROR("No support for WEP key mappings key\n");
2142 }
b481de9c 2143
6974e363
EG		 2144 cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
2145 (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
b481de9c
ZY		 2146
2147 IWL_DEBUG_TX("Configuring packet for WEP encryption "
6974e363 2148 "with key %d\n", keyidx);
b481de9c
ZY		 2149 break;
2150
b481de9c
ZY		 2151 default:
2152 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2153 break;
2154 }
2155}
2156
2157/*
2158 * handle build REPLY_TX command notification.
2159 */
c79dd5b5 2160static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 2161 struct iwl_cmd *cmd,
b481de9c
ZY		 2162 struct ieee80211_tx_control *ctrl,
2163 struct ieee80211_hdr *hdr,
2164 int is_unicast, u8 std_id)
2165{
2166 __le16 *qc;
2167 u16 fc = le16_to_cpu(hdr->frame_control);
2168 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2169
2170 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2171 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2172 tx_flags |= TX_CMD_FLG_ACK_MSK;
2173 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2174 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2175 if (ieee80211_is_probe_response(fc) &&
2176 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2177 tx_flags |= TX_CMD_FLG_TSF_MSK;
2178 } else {
2179 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2180 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2181 }
2182
87e4f7df
TW		 2183 if (ieee80211_is_back_request(fc))
2184 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2185
2186
b481de9c
ZY		 2187 cmd->cmd.tx.sta_id = std_id;
2188 if (ieee80211_get_morefrag(hdr))
2189 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2190
2191 qc = ieee80211_get_qos_ctrl(hdr);
2192 if (qc) {
2193 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2194 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2195 } else
2196 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2197
2198 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2199 tx_flags |= TX_CMD_FLG_RTS_MSK;
2200 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2201 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2202 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2203 tx_flags |= TX_CMD_FLG_CTS_MSK;
2204 }
2205
2206 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2207 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2208
2209 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2210 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2211 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2212 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2213 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2214 else
bc434dd2 2215 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 2216 } else {
b481de9c 2217 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
ab53d8af 2218 }
b481de9c
ZY		 2219
2220 cmd->cmd.tx.driver_txop = 0;
2221 cmd->cmd.tx.tx_flags = tx_flags;
2222 cmd->cmd.tx.next_frame_len = 0;
2223}
19758bef
TW		 2224static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2225{
2226 /* 0 - mgmt, 1 - cnt, 2 - data */
2227 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2228 priv->tx_stats[idx].cnt++;
2229 priv->tx_stats[idx].bytes += len;
2230}
6440adb5
CB		 2231/**
2232 * iwl4965_get_sta_id - Find station's index within station table
2233 *
2234 * If new IBSS station, create new entry in station table
2235 */
c79dd5b5 2236static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 2237 struct ieee80211_hdr *hdr)
b481de9c
ZY		 2238{
2239 int sta_id;
2240 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2241 DECLARE_MAC_BUF(mac);
b481de9c 2242
6440adb5 2243 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 2244 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2245 is_multicast_ether_addr(hdr->addr1))
2246 return priv->hw_setting.bcast_sta_id;
2247
2248 switch (priv->iw_mode) {
2249
6440adb5
CB		 2250 /* If we are a client station in a BSS network, use the special
2251 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 2252 case IEEE80211_IF_TYPE_STA:
2253 return IWL_AP_ID;
2254
2255 /* If we are an AP, then find the station, or use BCAST */
2256 case IEEE80211_IF_TYPE_AP:
bb8c093b 2257 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2258 if (sta_id != IWL_INVALID_STATION)
2259 return sta_id;
2260 return priv->hw_setting.bcast_sta_id;
2261
6440adb5
CB		 2262 /* If this frame is going out to an IBSS network, find the station,
2263 * or create a new station table entry */
b481de9c 2264 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2265 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2266 if (sta_id != IWL_INVALID_STATION)
2267 return sta_id;
2268
6440adb5 2269 /* Create new station table entry */
67d62035
RR		 2270 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2271 0, CMD_ASYNC, NULL);
b481de9c
ZY		 2272
2273 if (sta_id != IWL_INVALID_STATION)
2274 return sta_id;
2275
0795af57 2276 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2277 "Defaulting to broadcast...\n",
0795af57 2278 print_mac(mac, hdr->addr1));
0a6857e7 2279 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY		 2280 return priv->hw_setting.bcast_sta_id;
2281
2282 default:
01ebd063 2283 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY		 2284 return priv->hw_setting.bcast_sta_id;
2285 }
2286}
2287
2288/*
2289 * start REPLY_TX command process
2290 */
c79dd5b5 2291static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY		 2292 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2293{
2294 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2295 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 2296 u32 *control_flags;
2297 int txq_id = ctl->queue;
bb8c093b
CH		 2298 struct iwl4965_tx_queue *txq = NULL;
2299 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 2300 dma_addr_t phys_addr;
2301 dma_addr_t txcmd_phys;
87e4f7df 2302 dma_addr_t scratch_phys;
857485c0 2303 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY		 2304 u16 len, idx, len_org;
2305 u8 id, hdr_len, unicast;
2306 u8 sta_id;
2307 u16 seq_number = 0;
2308 u16 fc;
2309 __le16 *qc;
2310 u8 wait_write_ptr = 0;
2311 unsigned long flags;
2312 int rc;
2313
2314 spin_lock_irqsave(&priv->lock, flags);
fee1247a 2315 if (iwl_is_rfkill(priv)) {
b481de9c
ZY		 2316 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2317 goto drop_unlock;
2318 }
2319
32bfd35d
JB		 2320 if (!priv->vif) {
2321 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2322 goto drop_unlock;
2323 }
2324
8318d78a 2325 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2326 IWL_ERROR("ERROR: No TX rate available.\n");
2327 goto drop_unlock;
2328 }
2329
2330 unicast = !is_multicast_ether_addr(hdr->addr1);
2331 id = 0;
2332
2333 fc = le16_to_cpu(hdr->frame_control);
2334
0a6857e7 2335#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2336 if (ieee80211_is_auth(fc))
2337 IWL_DEBUG_TX("Sending AUTH frame\n");
2338 else if (ieee80211_is_assoc_request(fc))
2339 IWL_DEBUG_TX("Sending ASSOC frame\n");
2340 else if (ieee80211_is_reassoc_request(fc))
2341 IWL_DEBUG_TX("Sending REASSOC frame\n");
2342#endif
2343
7878a5a4 2344 /* drop all data frame if we are not associated */
76f3915b 2345 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
3109ece1 2346 (!iwl_is_associated(priv) ||
a6477249 2347 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2348 !priv->assoc_station_added)) {
3109ece1 2349 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY		 2350 goto drop_unlock;
2351 }
2352
2353 spin_unlock_irqrestore(&priv->lock, flags);
2354
2355 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB		 2356
2357 /* Find (or create) index into station table for destination station */
bb8c093b 2358 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2359 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2360 DECLARE_MAC_BUF(mac);
2361
2362 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2363 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2364 goto drop;
2365 }
2366
2367 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2368
2369 qc = ieee80211_get_qos_ctrl(hdr);
2370 if (qc) {
2371 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2372 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2373 IEEE80211_SCTL_SEQ;
2374 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2375 (hdr->seq_ctrl &
2376 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2377 seq_number += 0x10;
c8b0e6e1 2378#ifdef CONFIG_IWL4965_HT
b481de9c 2379 /* aggregation is on for this <sta,tid> */
fe01b477 2380 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2381 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2382 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2383#endif /* CONFIG_IWL4965_HT */
b481de9c 2384 }
6440adb5
CB		 2385
2386 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2387 txq = &priv->txq[txq_id];
2388 q = &txq->q;
2389
2390 spin_lock_irqsave(&priv->lock, flags);
2391
6440adb5 2392 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2393 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2394 memset(tfd, 0, sizeof(*tfd));
2395 control_flags = (u32 *) tfd;
fc4b6853 2396 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2397
6440adb5 2398 /* Set up driver data for this TFD */
bb8c093b 2399 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2400 txq->txb[q->write_ptr].skb[0] = skb;
2401 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2402 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB		 2403
2404 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2405 out_cmd = &txq->cmd[idx];
2406 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2407 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB		 2408
2409 /*
2410 * Set up the Tx-command (not MAC!) header.
2411 * Store the chosen Tx queue and TFD index within the sequence field;
2412 * after Tx, uCode's Tx response will return this value so driver can
2413 * locate the frame within the tx queue and do post-tx processing.
2414 */
b481de9c
ZY		 2415 out_cmd->hdr.cmd = REPLY_TX;
2416 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2417 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB		 2418
2419 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 2420 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2421
6440adb5
CB		 2422 /*
2423 * Use the first empty entry in this queue's command buffer array
2424 * to contain the Tx command and MAC header concatenated together
2425 * (payload data will be in another buffer).
2426 * Size of this varies, due to varying MAC header length.
2427 * If end is not dword aligned, we'll have 2 extra bytes at the end
2428 * of the MAC header (device reads on dword boundaries).
2429 * We'll tell device about this padding later.
2430 */
b481de9c 2431 len = priv->hw_setting.tx_cmd_len +
857485c0 2432 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY		 2433
2434 len_org = len;
2435 len = (len + 3) & ~3;
2436
2437 if (len_org != len)
2438 len_org = 1;
2439 else
2440 len_org = 0;
2441
6440adb5
CB		 2442 /* Physical address of this Tx command's header (not MAC header!),
2443 * within command buffer array. */
857485c0
TW		 2444 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2445 offsetof(struct iwl_cmd, hdr);
b481de9c 2446
6440adb5
CB		 2447 /* Add buffer containing Tx command and MAC(!) header to TFD's
2448 * first entry */
bb8c093b 2449 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 2450
2451 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2452 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2453
6440adb5
CB		 2454 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2455 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 2456 len = skb->len - hdr_len;
2457 if (len) {
2458 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2459 len, PCI_DMA_TODEVICE);
bb8c093b 2460 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 2461 }
2462
6440adb5 2463 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 2464 if (len_org)
2465 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2466
6440adb5 2467 /* Total # bytes to be transmitted */
b481de9c
ZY		 2468 len = (u16)skb->len;
2469 out_cmd->cmd.tx.len = cpu_to_le16(len);
2470
2471 /* TODO need this for burst mode later on */
bb8c093b 2472 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 2473
2474 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2475 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2476
19758bef
TW		 2477 iwl_update_tx_stats(priv, fc, len);
2478
857485c0 2479 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW		 2480 offsetof(struct iwl4965_tx_cmd, scratch);
2481 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2482 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2483
b481de9c
ZY		 2484 if (!ieee80211_get_morefrag(hdr)) {
2485 txq->need_update = 1;
2486 if (qc) {
2487 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2488 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2489 }
2490 } else {
2491 wait_write_ptr = 1;
2492 txq->need_update = 0;
2493 }
2494
0a6857e7 2495 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 2496 sizeof(out_cmd->cmd.tx));
2497
0a6857e7 2498 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 2499 ieee80211_get_hdrlen(fc));
2500
6440adb5 2501 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY		 2502 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
2503
6440adb5 2504 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2505 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2506 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2507 spin_unlock_irqrestore(&priv->lock, flags);
2508
2509 if (rc)
2510 return rc;
2511
bb8c093b 2512 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 2513 && priv->mac80211_registered) {
2514 if (wait_write_ptr) {
2515 spin_lock_irqsave(&priv->lock, flags);
2516 txq->need_update = 1;
bb8c093b 2517 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2518 spin_unlock_irqrestore(&priv->lock, flags);
2519 }
2520
2521 ieee80211_stop_queue(priv->hw, ctl->queue);
2522 }
2523
2524 return 0;
2525
2526drop_unlock:
2527 spin_unlock_irqrestore(&priv->lock, flags);
2528drop:
2529 return -1;
2530}
2531
c79dd5b5 2532static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2533{
8318d78a 2534 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 2535 struct ieee80211_rate *rate;
2536 int i;
2537
8318d78a 2538 hw = iwl4965_get_hw_mode(priv, priv->band);
c4ba9621
SA		 2539 if (!hw) {
2540 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2541 return;
2542 }
b481de9c
ZY		 2543
2544 priv->active_rate = 0;
2545 priv->active_rate_basic = 0;
2546
8318d78a
JB		 2547 for (i = 0; i < hw->n_bitrates; i++) {
2548 rate = &(hw->bitrates[i]);
2549 if (rate->hw_value < IWL_RATE_COUNT)
2550 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 2551 }
2552
2553 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2554 priv->active_rate, priv->active_rate_basic);
2555
2556 /*
2557 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2558 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2559 * OFDM
2560 */
2561 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2562 priv->staging_rxon.cck_basic_rates =
2563 ((priv->active_rate_basic &
2564 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2565 else
2566 priv->staging_rxon.cck_basic_rates =
2567 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2568
2569 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2570 priv->staging_rxon.ofdm_basic_rates =
2571 ((priv->active_rate_basic &
2572 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2573 IWL_FIRST_OFDM_RATE) & 0xFF;
2574 else
2575 priv->staging_rxon.ofdm_basic_rates =
2576 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2577}
2578
ad97edd2 2579void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY		 2580{
2581 unsigned long flags;
2582
2583 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2584 return;
2585
2586 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2587 disable_radio ? "OFF" : "ON");
2588
2589 if (disable_radio) {
bb8c093b 2590 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2591 /* FIXME: This is a workaround for AP */
2592 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2593 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2594 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 2595 CSR_UCODE_SW_BIT_RFKILL);
2596 spin_unlock_irqrestore(&priv->lock, flags);
ad97edd2
MA		 2597 /* call the host command only if no hw rf-kill set */
2598 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
2599 iwl4965_send_card_state(priv,
2600 CARD_STATE_CMD_DISABLE,
2601 0);
b481de9c 2602 set_bit(STATUS_RF_KILL_SW, &priv->status);
ad97edd2
MA		 2603
2604 /* make sure mac80211 stop sending Tx frame */
2605 if (priv->mac80211_registered)
2606 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 2607 }
2608 return;
2609 }
2610
2611 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2612 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2613
2614 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2615 spin_unlock_irqrestore(&priv->lock, flags);
2616
2617 /* wake up ucode */
2618 msleep(10);
2619
2620 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 2621 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2622 if (!iwl_grab_nic_access(priv))
2623 iwl_release_nic_access(priv);
b481de9c
ZY		 2624 spin_unlock_irqrestore(&priv->lock, flags);
2625
2626 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2627 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2628 "disabled by HW switch\n");
2629 return;
2630 }
2631
2632 queue_work(priv->workqueue, &priv->restart);
2633 return;
2634}
2635
c79dd5b5 2636void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
b481de9c
ZY		 2637 u32 decrypt_res, struct ieee80211_rx_status *stats)
2638{
2639 u16 fc =
2640 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2641
2642 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2643 return;
2644
2645 if (!(fc & IEEE80211_FCTL_PROTECTED))
2646 return;
2647
2648 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2649 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2650 case RX_RES_STATUS_SEC_TYPE_TKIP:
17e476b8
EG		 2651 /* The uCode has got a bad phase 1 Key, pushes the packet.
2652 * Decryption will be done in SW. */
2653 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2654 RX_RES_STATUS_BAD_KEY_TTAK)
2655 break;
2656
b481de9c
ZY		 2657 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2658 RX_RES_STATUS_BAD_ICV_MIC)
2659 stats->flag |= RX_FLAG_MMIC_ERROR;
2660 case RX_RES_STATUS_SEC_TYPE_WEP:
2661 case RX_RES_STATUS_SEC_TYPE_CCMP:
2662 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2663 RX_RES_STATUS_DECRYPT_OK) {
2664 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2665 stats->flag |= RX_FLAG_DECRYPTED;
2666 }
2667 break;
2668
2669 default:
2670 break;
2671 }
2672}
2673
b481de9c
ZY		 2674
2675#define IWL_PACKET_RETRY_TIME HZ
2676
c79dd5b5 2677int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2678{
2679 u16 sc = le16_to_cpu(header->seq_ctrl);
2680 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2681 u16 frag = sc & IEEE80211_SCTL_FRAG;
2682 u16 *last_seq, *last_frag;
2683 unsigned long *last_time;
2684
2685 switch (priv->iw_mode) {
2686 case IEEE80211_IF_TYPE_IBSS:{
2687 struct list_head *p;
bb8c093b 2688 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 2689 u8 *mac = header->addr2;
2690 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2691
2692 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2693 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 2694 if (!compare_ether_addr(entry->mac, mac))
2695 break;
2696 }
2697 if (p == &priv->ibss_mac_hash[index]) {
2698 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2699 if (!entry) {
bc434dd2 2700 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 2701 return 0;
2702 }
2703 memcpy(entry->mac, mac, ETH_ALEN);
2704 entry->seq_num = seq;
2705 entry->frag_num = frag;
2706 entry->packet_time = jiffies;
bc434dd2 2707 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 2708 return 0;
2709 }
2710 last_seq = &entry->seq_num;
2711 last_frag = &entry->frag_num;
2712 last_time = &entry->packet_time;
2713 break;
2714 }
2715 case IEEE80211_IF_TYPE_STA:
2716 last_seq = &priv->last_seq_num;
2717 last_frag = &priv->last_frag_num;
2718 last_time = &priv->last_packet_time;
2719 break;
2720 default:
2721 return 0;
2722 }
2723 if ((*last_seq == seq) &&
2724 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2725 if (*last_frag == frag)
2726 goto drop;
2727 if (*last_frag + 1 != frag)
2728 /* out-of-order fragment */
2729 goto drop;
2730 } else
2731 *last_seq = seq;
2732
2733 *last_frag = frag;
2734 *last_time = jiffies;
2735 return 0;
2736
2737 drop:
2738 return 1;
2739}
2740
c8b0e6e1 2741#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 2742
2743#include "iwl-spectrum.h"
2744
2745#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2746#define BEACON_TIME_MASK_HIGH 0xFF000000
2747#define TIME_UNIT 1024
2748
2749/*
2750 * extended beacon time format
2751 * time in usec will be changed into a 32-bit value in 8:24 format
2752 * the high 1 byte is the beacon counts
2753 * the lower 3 bytes is the time in usec within one beacon interval
2754 */
2755
bb8c093b 2756static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 2757{
2758 u32 quot;
2759 u32 rem;
2760 u32 interval = beacon_interval * 1024;
2761
2762 if (!interval || !usec)
2763 return 0;
2764
2765 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2766 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2767
2768 return (quot << 24) + rem;
2769}
2770
2771/* base is usually what we get from ucode with each received frame,
2772 * the same as HW timer counter counting down
2773 */
2774
bb8c093b 2775static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 2776{
2777 u32 base_low = base & BEACON_TIME_MASK_LOW;
2778 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2779 u32 interval = beacon_interval * TIME_UNIT;
2780 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2781 (addon & BEACON_TIME_MASK_HIGH);
2782
2783 if (base_low > addon_low)
2784 res += base_low - addon_low;
2785 else if (base_low < addon_low) {
2786 res += interval + base_low - addon_low;
2787 res += (1 << 24);
2788 } else
2789 res += (1 << 24);
2790
2791 return cpu_to_le32(res);
2792}
2793
c79dd5b5 2794static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY		 2795 struct ieee80211_measurement_params *params,
2796 u8 type)
2797{
bb8c093b
CH		 2798 struct iwl4965_spectrum_cmd spectrum;
2799 struct iwl4965_rx_packet *res;
857485c0 2800 struct iwl_host_cmd cmd = {
b481de9c
ZY		 2801 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2802 .data = (void *)&spectrum,
2803 .meta.flags = CMD_WANT_SKB,
2804 };
2805 u32 add_time = le64_to_cpu(params->start_time);
2806 int rc;
2807 int spectrum_resp_status;
2808 int duration = le16_to_cpu(params->duration);
2809
3109ece1 2810 if (iwl_is_associated(priv))
b481de9c 2811 add_time =
bb8c093b 2812 iwl4965_usecs_to_beacons(
b481de9c
ZY		 2813 le64_to_cpu(params->start_time) - priv->last_tsf,
2814 le16_to_cpu(priv->rxon_timing.beacon_interval));
2815
2816 memset(&spectrum, 0, sizeof(spectrum));
2817
2818 spectrum.channel_count = cpu_to_le16(1);
2819 spectrum.flags =
2820 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2821 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2822 cmd.len = sizeof(spectrum);
2823 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2824
3109ece1 2825 if (iwl_is_associated(priv))
b481de9c 2826 spectrum.start_time =
bb8c093b 2827 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 2828 add_time,
2829 le16_to_cpu(priv->rxon_timing.beacon_interval));
2830 else
2831 spectrum.start_time = 0;
2832
2833 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2834 spectrum.channels[0].channel = params->channel;
2835 spectrum.channels[0].type = type;
2836 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2837 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2838 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2839
857485c0 2840 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 2841 if (rc)
2842 return rc;
2843
bb8c093b 2844 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 2845 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2846 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2847 rc = -EIO;
2848 }
2849
2850 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2851 switch (spectrum_resp_status) {
2852 case 0: /* Command will be handled */
2853 if (res->u.spectrum.id != 0xff) {
2854 IWL_DEBUG_INFO
2855 ("Replaced existing measurement: %d\n",
2856 res->u.spectrum.id);
2857 priv->measurement_status &= ~MEASUREMENT_READY;
2858 }
2859 priv->measurement_status |= MEASUREMENT_ACTIVE;
2860 rc = 0;
2861 break;
2862
2863 case 1: /* Command will not be handled */
2864 rc = -EAGAIN;
2865 break;
2866 }
2867
2868 dev_kfree_skb_any(cmd.meta.u.skb);
2869
2870 return rc;
2871}
2872#endif
2873
c79dd5b5 2874static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2875 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 2876{
2877
2878 tx_sta->status.ack_signal = 0;
2879 tx_sta->status.excessive_retries = 0;
2880 tx_sta->status.queue_length = 0;
2881 tx_sta->status.queue_number = 0;
2882
2883 if (in_interrupt())
2884 ieee80211_tx_status_irqsafe(priv->hw,
2885 tx_sta->skb[0], &(tx_sta->status));
2886 else
2887 ieee80211_tx_status(priv->hw,
2888 tx_sta->skb[0], &(tx_sta->status));
2889
2890 tx_sta->skb[0] = NULL;
2891}
2892
2893/**
6440adb5 2894 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2895 *
6440adb5
CB		 2896 * When FW advances 'R' index, all entries between old and new 'R' index
2897 * need to be reclaimed. As result, some free space forms. If there is
2898 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2899 */
c79dd5b5 2900int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2901{
bb8c093b
CH		 2902 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2903 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 2904 int nfreed = 0;
2905
2906 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2907 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2908 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2909 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 2910 return 0;
2911 }
2912
c54b679d 2913 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2914 q->read_ptr != index;
c54b679d 2915 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2916 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2917 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2918 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2919 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 2920 } else if (nfreed > 1) {
2921 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2922 q->write_ptr, q->read_ptr);
b481de9c
ZY		 2923 queue_work(priv->workqueue, &priv->restart);
2924 }
2925 nfreed++;
2926 }
2927
fe01b477 2928/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 2929 (txq_id != IWL_CMD_QUEUE_NUM) &&
2930 priv->mac80211_registered)
fe01b477 2931 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY		 2932
2933
2934 return nfreed;
2935}
2936
bb8c093b 2937static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 2938{
2939 status &= TX_STATUS_MSK;
2940 return (status == TX_STATUS_SUCCESS)
2941 || (status == TX_STATUS_DIRECT_DONE);
2942}
2943
2944/******************************************************************************
2945 *
2946 * Generic RX handler implementations
2947 *
2948 ******************************************************************************/
c8b0e6e1 2949#ifdef CONFIG_IWL4965_HT
b481de9c 2950
c79dd5b5 2951static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY		 2952 struct ieee80211_hdr *hdr)
2953{
2954 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2955 return IWL_AP_ID;
2956 else {
2957 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 2958 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY		 2959 }
2960}
2961
bb8c093b 2962static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2963 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY		 2964{
2965 if (priv->txq[txq_id].txb[idx].skb[0])
2966 return (struct ieee80211_hdr *)priv->txq[txq_id].
2967 txb[idx].skb[0]->data;
2968 return NULL;
2969}
2970
bb8c093b 2971static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 2972{
2973 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2974 tx_resp->frame_count);
2975 return le32_to_cpu(*scd_ssn) & MAX_SN;
2976
2977}
6440adb5
CB		 2978
2979/**
2980 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2981 */
c79dd5b5 2982static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2983 struct iwl4965_ht_agg *agg,
fe01b477 2984 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 2985 u16 start_idx)
2986{
fe01b477
RR		 2987 u16 status;
2988 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 2989 struct ieee80211_tx_status *tx_status = NULL;
2990 struct ieee80211_hdr *hdr = NULL;
2991 int i, sh;
2992 int txq_id, idx;
2993 u16 seq;
2994
2995 if (agg->wait_for_ba)
6440adb5 2996 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 2997
2998 agg->frame_count = tx_resp->frame_count;
2999 agg->start_idx = start_idx;
3000 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3001 agg->bitmap = 0;
b481de9c 3002
6440adb5 3003 /* # frames attempted by Tx command */
b481de9c 3004 if (agg->frame_count == 1) {
6440adb5 3005 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 3006 status = le16_to_cpu(frame_status[0].status);
3007 seq = le16_to_cpu(frame_status[0].sequence);
3008 idx = SEQ_TO_INDEX(seq);
3009 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 3010
b481de9c 3011 /* FIXME: code repetition */
fe01b477
RR		 3012 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3013 agg->frame_count, agg->start_idx, idx);
b481de9c 3014
fe01b477 3015 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY		 3016 tx_status->retry_count = tx_resp->failure_frame;
3017 tx_status->queue_number = status & 0xff;
fe01b477
RR		 3018 tx_status->queue_length = tx_resp->failure_rts;
3019 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 3020 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 3021 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3022 iwl4965_hwrate_to_tx_control(priv,
3023 le32_to_cpu(tx_resp->rate_n_flags),
3024 &tx_status->control);
b481de9c
ZY		 3025 /* FIXME: code repetition end */
3026
3027 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3028 status & 0xff, tx_resp->failure_frame);
3029 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3030 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 3031
3032 agg->wait_for_ba = 0;
3033 } else {
6440adb5 3034 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 3035 u64 bitmap = 0;
3036 int start = agg->start_idx;
3037
6440adb5 3038 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 3039 for (i = 0; i < agg->frame_count; i++) {
3040 u16 sc;
fe01b477
RR		 3041 status = le16_to_cpu(frame_status[i].status);
3042 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 3043 idx = SEQ_TO_INDEX(seq);
3044 txq_id = SEQ_TO_QUEUE(seq);
3045
3046 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3047 AGG_TX_STATE_ABORT_MSK))
3048 continue;
3049
3050 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3051 agg->frame_count, txq_id, idx);
3052
bb8c093b 3053 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 3054
3055 sc = le16_to_cpu(hdr->seq_ctrl);
3056 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3057 IWL_ERROR("BUG_ON idx doesn't match seq control"
3058 " idx=%d, seq_idx=%d, seq=%d\n",
3059 idx, SEQ_TO_SN(sc),
3060 hdr->seq_ctrl);
3061 return -1;
3062 }
3063
3064 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3065 i, idx, SEQ_TO_SN(sc));
3066
3067 sh = idx - start;
3068 if (sh > 64) {
3069 sh = (start - idx) + 0xff;
3070 bitmap = bitmap << sh;
3071 sh = 0;
3072 start = idx;
3073 } else if (sh < -64)
3074 sh = 0xff - (start - idx);
3075 else if (sh < 0) {
3076 sh = start - idx;
3077 start = idx;
3078 bitmap = bitmap << sh;
3079 sh = 0;
3080 }
3081 bitmap |= (1 << sh);
3082 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3083 start, (u32)(bitmap & 0xFFFFFFFF));
3084 }
3085
fe01b477 3086 agg->bitmap = bitmap;
b481de9c
ZY		 3087 agg->start_idx = start;
3088 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3089 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 3090 agg->frame_count, agg->start_idx,
06501d29 3091 (unsigned long long)agg->bitmap);
b481de9c
ZY		 3092
3093 if (bitmap)
3094 agg->wait_for_ba = 1;
3095 }
3096 return 0;
3097}
3098#endif
b481de9c 3099
6440adb5
CB		 3100/**
3101 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3102 */
c79dd5b5 3103static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 3104 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3105{
bb8c093b 3106 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3107 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3108 int txq_id = SEQ_TO_QUEUE(sequence);
3109 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3110 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3111 struct ieee80211_tx_status *tx_status;
bb8c093b 3112 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3113 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 3114#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3115 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3116 struct ieee80211_hdr *hdr;
3117 __le16 *qc;
b481de9c
ZY		 3118#endif
3119
3120 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3121 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3122 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 3123 index, txq->q.n_bd, txq->q.write_ptr,
3124 txq->q.read_ptr);
b481de9c
ZY		 3125 return;
3126 }
3127
c8b0e6e1 3128#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3129 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3130 qc = ieee80211_get_qos_ctrl(hdr);
3131
3132 if (qc)
3133 tid = le16_to_cpu(*qc) & 0xf;
3134
3135 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3136 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3137 IWL_ERROR("Station not known\n");
3138 return;
3139 }
3140
b481de9c 3141 if (txq->sched_retry) {
bb8c093b 3142 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 3143 struct iwl4965_ht_agg *agg = NULL;
b481de9c 3144
fe01b477 3145 if (!qc)
b481de9c 3146 return;
b481de9c
ZY		 3147
3148 agg = &priv->stations[sta_id].tid[tid].agg;
3149
fe01b477
RR		 3150 iwl4965_tx_status_reply_tx(priv, agg,
3151 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 3152
3153 if ((tx_resp->frame_count == 1) &&
bb8c093b 3154 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 3155 /* TODO: send BAR */
3156 }
3157
fe01b477
RR		 3158 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3159 int freed;
c54b679d 3160 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 3161 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3162 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 3163 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3164 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3165
3166 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3167 txq_id >= 0 && priv->mac80211_registered &&
3168 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3169 ieee80211_wake_queue(priv->hw, txq_id);
3170
3171 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 3172 }
3173 } else {
c8b0e6e1 3174#endif /* CONFIG_IWL4965_HT */
fc4b6853 3175 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 3176
3177 tx_status->retry_count = tx_resp->failure_frame;
3178 tx_status->queue_number = status;
3179 tx_status->queue_length = tx_resp->bt_kill_count;
3180 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 3181 tx_status->flags =
bb8c093b 3182 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3183 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
3184 &tx_status->control);
b481de9c 3185
b481de9c 3186 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3187 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 3188 status, le32_to_cpu(tx_resp->rate_n_flags),
3189 tx_resp->failure_frame);
3190
3191 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 3192 if (index != -1) {
3193 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3194#ifdef CONFIG_IWL4965_HT
3195 if (tid != MAX_TID_COUNT)
3196 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3197 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3198 (txq_id >= 0) &&
3199 priv->mac80211_registered)
3200 ieee80211_wake_queue(priv->hw, txq_id);
3201 if (tid != MAX_TID_COUNT)
3202 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3203#endif
3204 }
c8b0e6e1 3205#ifdef CONFIG_IWL4965_HT
b481de9c 3206 }
c8b0e6e1 3207#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 3208
3209 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3210 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3211}
3212
3213
c79dd5b5 3214static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 3215 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3216{
bb8c093b
CH		 3217 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3218 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 3219 struct delayed_work *pwork;
3220
3221 palive = &pkt->u.alive_frame;
3222
3223 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3224 "0x%01X 0x%01X\n",
3225 palive->is_valid, palive->ver_type,
3226 palive->ver_subtype);
3227
3228 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3229 IWL_DEBUG_INFO("Initialization Alive received.\n");
3230 memcpy(&priv->card_alive_init,
3231 &pkt->u.alive_frame,
bb8c093b 3232 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 3233 pwork = &priv->init_alive_start;
3234 } else {
3235 IWL_DEBUG_INFO("Runtime Alive received.\n");
3236 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3237 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 3238 pwork = &priv->alive_start;
3239 }
3240
3241 /* We delay the ALIVE response by 5ms to
3242 * give the HW RF Kill time to activate... */
3243 if (palive->is_valid == UCODE_VALID_OK)
3244 queue_delayed_work(priv->workqueue, pwork,
3245 msecs_to_jiffies(5));
3246 else
3247 IWL_WARNING("uCode did not respond OK.\n");
3248}
3249
c79dd5b5 3250static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 3251 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3252{
bb8c093b 3253 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3254
3255 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3256 return;
3257}
3258
c79dd5b5 3259static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 3260 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3261{
bb8c093b 3262 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3263
3264 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3265 "seq 0x%04X ser 0x%08X\n",
3266 le32_to_cpu(pkt->u.err_resp.error_type),
3267 get_cmd_string(pkt->u.err_resp.cmd_id),
3268 pkt->u.err_resp.cmd_id,
3269 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3270 le32_to_cpu(pkt->u.err_resp.error_info));
3271}
3272
3273#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3274
c79dd5b5 3275static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3276{
bb8c093b
CH		 3277 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3278 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3279 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 3280 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3281 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3282 rxon->channel = csa->channel;
3283 priv->staging_rxon.channel = csa->channel;
3284}
3285
c79dd5b5 3286static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 3287 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3288{
c8b0e6e1 3289#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 3290 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3291 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 3292
3293 if (!report->state) {
3294 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3295 "Spectrum Measure Notification: Start\n");
3296 return;
3297 }
3298
3299 memcpy(&priv->measure_report, report, sizeof(*report));
3300 priv->measurement_status |= MEASUREMENT_READY;
3301#endif
3302}
3303
c79dd5b5 3304static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 3305 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3306{
0a6857e7 3307#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3308 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3309 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 3310 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3311 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3312#endif
3313}
3314
c79dd5b5 3315static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 3316 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3317{
bb8c093b 3318 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3319 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3320 "notification for %s:\n",
3321 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 3322 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 3323}
3324
bb8c093b 3325static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3326{
c79dd5b5
TW		 3327 struct iwl_priv *priv =
3328 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 3329 struct sk_buff *beacon;
3330
3331 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 3332 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 3333
3334 if (!beacon) {
3335 IWL_ERROR("update beacon failed\n");
3336 return;
3337 }
3338
3339 mutex_lock(&priv->mutex);
3340 /* new beacon skb is allocated every time; dispose previous.*/
3341 if (priv->ibss_beacon)
3342 dev_kfree_skb(priv->ibss_beacon);
3343
3344 priv->ibss_beacon = beacon;
3345 mutex_unlock(&priv->mutex);
3346
bb8c093b 3347 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 3348}
3349
c79dd5b5 3350static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 3351 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3352{
0a6857e7 3353#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3354 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3355 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3356 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 3357
3358 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3359 "tsf %d %d rate %d\n",
3360 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3361 beacon->beacon_notify_hdr.failure_frame,
3362 le32_to_cpu(beacon->ibss_mgr_status),
3363 le32_to_cpu(beacon->high_tsf),
3364 le32_to_cpu(beacon->low_tsf), rate);
3365#endif
3366
3367 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3368 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3369 queue_work(priv->workqueue, &priv->beacon_update);
3370}
3371
3372/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3373static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3374 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3375{
0a6857e7 3376#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3377 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3378 struct iwl4965_scanreq_notification *notif =
3379 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3380
3381 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3382#endif
3383}
3384
3385/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3386static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3387 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3388{
bb8c093b
CH		 3389 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3390 struct iwl4965_scanstart_notification *notif =
3391 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3392 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3393 IWL_DEBUG_SCAN("Scan start: "
3394 "%d [802.11%s] "
3395 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3396 notif->channel,
3397 notif->band ? "bg" : "a",
3398 notif->tsf_high,
3399 notif->tsf_low, notif->status, notif->beacon_timer);
3400}
3401
3402/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3403static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3404 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3405{
bb8c093b
CH		 3406 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3407 struct iwl4965_scanresults_notification *notif =
3408 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3409
3410 IWL_DEBUG_SCAN("Scan ch.res: "
3411 "%d [802.11%s] "
3412 "(TSF: 0x%08X:%08X) - %d "
3413 "elapsed=%lu usec (%dms since last)\n",
3414 notif->channel,
3415 notif->band ? "bg" : "a",
3416 le32_to_cpu(notif->tsf_high),
3417 le32_to_cpu(notif->tsf_low),
3418 le32_to_cpu(notif->statistics[0]),
3419 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3420 jiffies_to_msecs(elapsed_jiffies
3421 (priv->last_scan_jiffies, jiffies)));
3422
3423 priv->last_scan_jiffies = jiffies;
7878a5a4 3424 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3425}
3426
3427/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3428static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3429 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3430{
bb8c093b
CH		 3431 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3432 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 3433
3434 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3435 scan_notif->scanned_channels,
3436 scan_notif->tsf_low,
3437 scan_notif->tsf_high, scan_notif->status);
3438
3439 /* The HW is no longer scanning */
3440 clear_bit(STATUS_SCAN_HW, &priv->status);
3441
3442 /* The scan completion notification came in, so kill that timer... */
3443 cancel_delayed_work(&priv->scan_check);
3444
3445 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3446 (priv->scan_bands == 2) ? "2.4" : "5.2",
3447 jiffies_to_msecs(elapsed_jiffies
3448 (priv->scan_pass_start, jiffies)));
3449
3450 /* Remove this scanned band from the list
3451 * of pending bands to scan */
3452 priv->scan_bands--;
3453
3454 /* If a request to abort was given, or the scan did not succeed
3455 * then we reset the scan state machine and terminate,
3456 * re-queuing another scan if one has been requested */
3457 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3458 IWL_DEBUG_INFO("Aborted scan completed.\n");
3459 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3460 } else {
3461 /* If there are more bands on this scan pass reschedule */
3462 if (priv->scan_bands > 0)
3463 goto reschedule;
3464 }
3465
3466 priv->last_scan_jiffies = jiffies;
7878a5a4 3467 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3468 IWL_DEBUG_INFO("Setting scan to off\n");
3469
3470 clear_bit(STATUS_SCANNING, &priv->status);
3471
3472 IWL_DEBUG_INFO("Scan took %dms\n",
3473 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3474
3475 queue_work(priv->workqueue, &priv->scan_completed);
3476
3477 return;
3478
3479reschedule:
3480 priv->scan_pass_start = jiffies;
3481 queue_work(priv->workqueue, &priv->request_scan);
3482}
3483
3484/* Handle notification from uCode that card's power state is changing
3485 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3486static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3487 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3488{
bb8c093b 3489 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3490 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3491 unsigned long status = priv->status;
3492
3493 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3494 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3495 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3496
3497 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3498 RF_CARD_DISABLED)) {
3499
3395f6e9 3500 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3501 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3502
3395f6e9
TW		 3503 if (!iwl_grab_nic_access(priv)) {
3504 iwl_write_direct32(
b481de9c
ZY		 3505 priv, HBUS_TARG_MBX_C,
3506 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3507
3395f6e9 3508 iwl_release_nic_access(priv);
b481de9c
ZY		 3509 }
3510
3511 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 3512 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3513 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 3514 if (!iwl_grab_nic_access(priv)) {
3515 iwl_write_direct32(
b481de9c
ZY		 3516 priv, HBUS_TARG_MBX_C,
3517 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3518
3395f6e9 3519 iwl_release_nic_access(priv);
b481de9c
ZY		 3520 }
3521 }
3522
3523 if (flags & RF_CARD_DISABLED) {
3395f6e9 3524 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3525 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 3526 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3527 if (!iwl_grab_nic_access(priv))
3528 iwl_release_nic_access(priv);
b481de9c
ZY		 3529 }
3530 }
3531
3532 if (flags & HW_CARD_DISABLED)
3533 set_bit(STATUS_RF_KILL_HW, &priv->status);
3534 else
3535 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3536
3537
3538 if (flags & SW_CARD_DISABLED)
3539 set_bit(STATUS_RF_KILL_SW, &priv->status);
3540 else
3541 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3542
3543 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3544 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3545
3546 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3547 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3548 (test_bit(STATUS_RF_KILL_SW, &status) !=
3549 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3550 queue_work(priv->workqueue, &priv->rf_kill);
3551 else
3552 wake_up_interruptible(&priv->wait_command_queue);
3553}
3554
3555/**
bb8c093b 3556 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 3557 *
3558 * Setup the RX handlers for each of the reply types sent from the uCode
3559 * to the host.
3560 *
3561 * This function chains into the hardware specific files for them to setup
3562 * any hardware specific handlers as well.
3563 */
c79dd5b5 3564static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3565{
bb8c093b
CH		 3566 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3567 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3568 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3569 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3570 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 3571 iwl4965_rx_spectrum_measure_notif;
3572 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3573 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 3574 iwl4965_rx_pm_debug_statistics_notif;
3575 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3576
9fbab516
BC		 3577 /*
3578 * The same handler is used for both the REPLY to a discrete
3579 * statistics request from the host as well as for the periodic
3580 * statistics notifications (after received beacons) from the uCode.
b481de9c 3581 */
bb8c093b
CH		 3582 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3583 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3584
bb8c093b
CH		 3585 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3586 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3587 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3588 iwl4965_rx_scan_results_notif;
b481de9c 3589 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 3590 iwl4965_rx_scan_complete_notif;
3591 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3592 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3593
9fbab516 3594 /* Set up hardware specific Rx handlers */
bb8c093b 3595 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 3596}
3597
3598/**
bb8c093b 3599 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 3600 * @rxb: Rx buffer to reclaim
3601 *
3602 * If an Rx buffer has an async callback associated with it the callback
3603 * will be executed. The attached skb (if present) will only be freed
3604 * if the callback returns 1
3605 */
c79dd5b5 3606static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3607 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3608{
bb8c093b 3609 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3610 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3611 int txq_id = SEQ_TO_QUEUE(sequence);
3612 int index = SEQ_TO_INDEX(sequence);
3613 int huge = sequence & SEQ_HUGE_FRAME;
3614 int cmd_index;
857485c0 3615 struct iwl_cmd *cmd;
b481de9c
ZY		 3616
3617 /* If a Tx command is being handled and it isn't in the actual
3618 * command queue then there a command routing bug has been introduced
3619 * in the queue management code. */
3620 if (txq_id != IWL_CMD_QUEUE_NUM)
3621 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3622 txq_id, pkt->hdr.cmd);
3623 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3624
3625 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3626 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3627
3628 /* Input error checking is done when commands are added to queue. */
3629 if (cmd->meta.flags & CMD_WANT_SKB) {
3630 cmd->meta.source->u.skb = rxb->skb;
3631 rxb->skb = NULL;
3632 } else if (cmd->meta.u.callback &&
3633 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3634 rxb->skb = NULL;
3635
bb8c093b 3636 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3637
3638 if (!(cmd->meta.flags & CMD_ASYNC)) {
3639 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3640 wake_up_interruptible(&priv->wait_command_queue);
3641 }
3642}
3643
3644/************************** RX-FUNCTIONS ****************************/
3645/*
3646 * Rx theory of operation
3647 *
9fbab516
BC		 3648 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3649 * each of which point to Receive Buffers to be filled by 4965. These get
3650 * used not only for Rx frames, but for any command response or notification
3651 * from the 4965. The driver and 4965 manage the Rx buffers by means
3652 * of indexes into the circular buffer.
b481de9c
ZY		 3653 *
3654 * Rx Queue Indexes
3655 * The host/firmware share two index registers for managing the Rx buffers.
3656 *
3657 * The READ index maps to the first position that the firmware may be writing
3658 * to -- the driver can read up to (but not including) this position and get
3659 * good data.
3660 * The READ index is managed by the firmware once the card is enabled.
3661 *
3662 * The WRITE index maps to the last position the driver has read from -- the
3663 * position preceding WRITE is the last slot the firmware can place a packet.
3664 *
3665 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3666 * WRITE = READ.
3667 *
9fbab516 3668 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 3669 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3670 *
9fbab516 3671 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 3672 * and fire the RX interrupt. The driver can then query the READ index and
3673 * process as many packets as possible, moving the WRITE index forward as it
3674 * resets the Rx queue buffers with new memory.
3675 *
3676 * The management in the driver is as follows:
3677 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3678 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3679 * to replenish the iwl->rxq->rx_free.
bb8c093b 3680 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 3681 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3682 * 'processed' and 'read' driver indexes as well)
3683 * + A received packet is processed and handed to the kernel network stack,
3684 * detached from the iwl->rxq. The driver 'processed' index is updated.
3685 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3686 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3687 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3688 * were enough free buffers and RX_STALLED is set it is cleared.
3689 *
3690 *
3691 * Driver sequence:
3692 *
9fbab516
BC		 3693 * iwl4965_rx_queue_alloc() Allocates rx_free
3694 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3695 * iwl4965_rx_queue_restock
9fbab516 3696 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 3697 * queue, updates firmware pointers, and updates
3698 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3699 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 3700 *
3701 * -- enable interrupts --
9fbab516 3702 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 3703 * READ INDEX, detaching the SKB from the pool.
3704 * Moves the packet buffer from queue to rx_used.
bb8c093b 3705 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 3706 * slots.
3707 * ...
3708 *
3709 */
3710
3711/**
bb8c093b 3712 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3713 */
bb8c093b 3714static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 3715{
3716 int s = q->read - q->write;
3717 if (s <= 0)
3718 s += RX_QUEUE_SIZE;
3719 /* keep some buffer to not confuse full and empty queue */
3720 s -= 2;
3721 if (s < 0)
3722 s = 0;
3723 return s;
3724}
3725
3726/**
bb8c093b 3727 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3728 */
c79dd5b5 3729int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 3730{
3731 u32 reg = 0;
3732 int rc = 0;
3733 unsigned long flags;
3734
3735 spin_lock_irqsave(&q->lock, flags);
3736
3737 if (q->need_update == 0)
3738 goto exit_unlock;
3739
6440adb5 3740 /* If power-saving is in use, make sure device is awake */
b481de9c 3741 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395f6e9 3742 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 3743
3744 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3395f6e9 3745 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 3746 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3747 goto exit_unlock;
3748 }
3749
3395f6e9 3750 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3751 if (rc)
3752 goto exit_unlock;
3753
6440adb5 3754 /* Device expects a multiple of 8 */
3395f6e9 3755 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3756 q->write & ~0x7);
3395f6e9 3757 iwl_release_nic_access(priv);
6440adb5
CB		 3758
3759 /* Else device is assumed to be awake */
b481de9c 3760 } else
6440adb5 3761 /* Device expects a multiple of 8 */
3395f6e9 3762 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 3763
3764
3765 q->need_update = 0;
3766
3767 exit_unlock:
3768 spin_unlock_irqrestore(&q->lock, flags);
3769 return rc;
3770}
3771
3772/**
9fbab516 3773 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3774 */
c79dd5b5 3775static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY		 3776 dma_addr_t dma_addr)
3777{
3778 return cpu_to_le32((u32)(dma_addr >> 8));
3779}
3780
3781
3782/**
bb8c093b 3783 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3784 *
9fbab516 3785 * If there are slots in the RX queue that need to be restocked,
b481de9c 3786 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3787 * as we can, pulling from rx_free.
b481de9c
ZY		 3788 *
3789 * This moves the 'write' index forward to catch up with 'processed', and
3790 * also updates the memory address in the firmware to reference the new
3791 * target buffer.
3792 */
c79dd5b5 3793static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3794{
bb8c093b 3795 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3796 struct list_head *element;
bb8c093b 3797 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3798 unsigned long flags;
3799 int write, rc;
3800
3801 spin_lock_irqsave(&rxq->lock, flags);
3802 write = rxq->write & ~0x7;
bb8c093b 3803 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3804 /* Get next free Rx buffer, remove from free list */
b481de9c 3805 element = rxq->rx_free.next;
bb8c093b 3806 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3807 list_del(element);
6440adb5
CB		 3808
3809 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3810 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 3811 rxq->queue[rxq->write] = rxb;
3812 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3813 rxq->free_count--;
3814 }
3815 spin_unlock_irqrestore(&rxq->lock, flags);
3816 /* If the pre-allocated buffer pool is dropping low, schedule to
3817 * refill it */
3818 if (rxq->free_count <= RX_LOW_WATERMARK)
3819 queue_work(priv->workqueue, &priv->rx_replenish);
3820
3821
6440adb5
CB		 3822 /* If we've added more space for the firmware to place data, tell it.
3823 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 3824 if ((write != (rxq->write & ~0x7))
3825 || (abs(rxq->write - rxq->read) > 7)) {
3826 spin_lock_irqsave(&rxq->lock, flags);
3827 rxq->need_update = 1;
3828 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3829 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 3830 if (rc)
3831 return rc;
3832 }
3833
3834 return 0;
3835}
3836
3837/**
bb8c093b 3838 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 3839 *
3840 * When moving to rx_free an SKB is allocated for the slot.
3841 *
bb8c093b 3842 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3843 * This is called as a scheduled work item (except for during initialization)
b481de9c 3844 */
c79dd5b5 3845static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3846{
bb8c093b 3847 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3848 struct list_head *element;
bb8c093b 3849 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3850 unsigned long flags;
3851 spin_lock_irqsave(&rxq->lock, flags);
3852 while (!list_empty(&rxq->rx_used)) {
3853 element = rxq->rx_used.next;
bb8c093b 3854 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB		 3855
3856 /* Alloc a new receive buffer */
b481de9c 3857 rxb->skb =
9ee1ba47
RR		 3858 alloc_skb(priv->hw_setting.rx_buf_size,
3859 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 3860 if (!rxb->skb) {
3861 if (net_ratelimit())
3862 printk(KERN_CRIT DRV_NAME
3863 ": Can not allocate SKB buffers\n");
3864 /* We don't reschedule replenish work here -- we will
3865 * call the restock method and if it still needs
3866 * more buffers it will schedule replenish */
3867 break;
3868 }
3869 priv->alloc_rxb_skb++;
3870 list_del(element);
6440adb5
CB		 3871
3872 /* Get physical address of RB/SKB */
b481de9c
ZY		 3873 rxb->dma_addr =
3874 pci_map_single(priv->pci_dev, rxb->skb->data,
9ee1ba47 3875 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3876 list_add_tail(&rxb->list, &rxq->rx_free);
3877 rxq->free_count++;
3878 }
3879 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 3880}
3881
3882/*
3883 * this should be called while priv->lock is locked
3884*/
4fd1f841 3885static void __iwl4965_rx_replenish(void *data)
5c0eef96 3886{
c79dd5b5 3887 struct iwl_priv *priv = data;
5c0eef96
MA		 3888
3889 iwl4965_rx_allocate(priv);
3890 iwl4965_rx_queue_restock(priv);
3891}
3892
3893
3894void iwl4965_rx_replenish(void *data)
3895{
c79dd5b5 3896 struct iwl_priv *priv = data;
5c0eef96
MA		 3897 unsigned long flags;
3898
3899 iwl4965_rx_allocate(priv);
b481de9c
ZY		 3900
3901 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3902 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 3903 spin_unlock_irqrestore(&priv->lock, flags);
3904}
3905
3906/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3907 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 3908 * This free routine walks the list of POOL entries and if SKB is set to
3909 * non NULL it is unmapped and freed
3910 */
c79dd5b5 3911static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3912{
3913 int i;
3914 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3915 if (rxq->pool[i].skb != NULL) {
3916 pci_unmap_single(priv->pci_dev,
3917 rxq->pool[i].dma_addr,
9ee1ba47
RR		 3918 priv->hw_setting.rx_buf_size,
3919 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3920 dev_kfree_skb(rxq->pool[i].skb);
3921 }
3922 }
3923
3924 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3925 rxq->dma_addr);
3926 rxq->bd = NULL;
3927}
3928
c79dd5b5 3929int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3930{
bb8c093b 3931 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 3932 struct pci_dev *dev = priv->pci_dev;
3933 int i;
3934
3935 spin_lock_init(&rxq->lock);
3936 INIT_LIST_HEAD(&rxq->rx_free);
3937 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB		 3938
3939 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 3940 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3941 if (!rxq->bd)
3942 return -ENOMEM;
6440adb5 3943
b481de9c
ZY		 3944 /* Fill the rx_used queue with _all_ of the Rx buffers */
3945 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3946 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3947
b481de9c
ZY		 3948 /* Set us so that we have processed and used all buffers, but have
3949 * not restocked the Rx queue with fresh buffers */
3950 rxq->read = rxq->write = 0;
3951 rxq->free_count = 0;
3952 rxq->need_update = 0;
3953 return 0;
3954}
3955
c79dd5b5 3956void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3957{
3958 unsigned long flags;
3959 int i;
3960 spin_lock_irqsave(&rxq->lock, flags);
3961 INIT_LIST_HEAD(&rxq->rx_free);
3962 INIT_LIST_HEAD(&rxq->rx_used);
3963 /* Fill the rx_used queue with _all_ of the Rx buffers */
3964 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3965 /* In the reset function, these buffers may have been allocated
3966 * to an SKB, so we need to unmap and free potential storage */
3967 if (rxq->pool[i].skb != NULL) {
3968 pci_unmap_single(priv->pci_dev,
3969 rxq->pool[i].dma_addr,
9ee1ba47
RR		 3970 priv->hw_setting.rx_buf_size,
3971 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3972 priv->alloc_rxb_skb--;
3973 dev_kfree_skb(rxq->pool[i].skb);
3974 rxq->pool[i].skb = NULL;
3975 }
3976 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3977 }
3978
3979 /* Set us so that we have processed and used all buffers, but have
3980 * not restocked the Rx queue with fresh buffers */
3981 rxq->read = rxq->write = 0;
3982 rxq->free_count = 0;
3983 spin_unlock_irqrestore(&rxq->lock, flags);
3984}
3985
3986/* Convert linear signal-to-noise ratio into dB */
3987static u8 ratio2dB[100] = {
3988/* 0 1 2 3 4 5 6 7 8 9 */
3989 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3990 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3991 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3992 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3993 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3994 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3995 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3996 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3997 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3998 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3999};
4000
4001/* Calculates a relative dB value from a ratio of linear
4002 * (i.e. not dB) signal levels.
4003 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4004int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4005{
c899a575
AB		 4006 /* 1000:1 or higher just report as 60 dB */
4007 if (sig_ratio >= 1000)
b481de9c
ZY		 4008 return 60;
4009
c899a575 4010 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4011 * add 20 dB to make up for divide by 10 */
c899a575 4012 if (sig_ratio >= 100)
b481de9c
ZY		 4013 return (20 + (int)ratio2dB[sig_ratio/10]);
4014
4015 /* We shouldn't see this */
4016 if (sig_ratio < 1)
4017 return 0;
4018
4019 /* Use table for ratios 1:1 - 99:1 */
4020 return (int)ratio2dB[sig_ratio];
4021}
4022
4023#define PERFECT_RSSI (-20) /* dBm */
4024#define WORST_RSSI (-95) /* dBm */
4025#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4026
4027/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4028 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4029 * about formulas used below. */
bb8c093b 4030int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 4031{
4032 int sig_qual;
4033 int degradation = PERFECT_RSSI - rssi_dbm;
4034
4035 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4036 * as indicator; formula is (signal dbm - noise dbm).
4037 * SNR at or above 40 is a great signal (100%).
4038 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4039 * Weakest usable signal is usually 10 - 15 dB SNR. */
4040 if (noise_dbm) {
4041 if (rssi_dbm - noise_dbm >= 40)
4042 return 100;
4043 else if (rssi_dbm < noise_dbm)
4044 return 0;
4045 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4046
4047 /* Else use just the signal level.
4048 * This formula is a least squares fit of data points collected and
4049 * compared with a reference system that had a percentage (%) display
4050 * for signal quality. */
4051 } else
4052 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4053 (15 * RSSI_RANGE + 62 * degradation)) /
4054 (RSSI_RANGE * RSSI_RANGE);
4055
4056 if (sig_qual > 100)
4057 sig_qual = 100;
4058 else if (sig_qual < 1)
4059 sig_qual = 0;
4060
4061 return sig_qual;
4062}
4063
4064/**
9fbab516 4065 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 4066 *
4067 * Uses the priv->rx_handlers callback function array to invoke
4068 * the appropriate handlers, including command responses,
4069 * frame-received notifications, and other notifications.
4070 */
c79dd5b5 4071static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 4072{
bb8c093b
CH		 4073 struct iwl4965_rx_mem_buffer *rxb;
4074 struct iwl4965_rx_packet *pkt;
4075 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4076 u32 r, i;
4077 int reclaim;
4078 unsigned long flags;
5c0eef96 4079 u8 fill_rx = 0;
d68ab680 4080 u32 count = 8;
b481de9c 4081
6440adb5
CB		 4082 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4083 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4084 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 4085 i = rxq->read;
4086
4087 /* Rx interrupt, but nothing sent from uCode */
4088 if (i == r)
4089 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4090
5c0eef96
MA		 4091 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4092 fill_rx = 1;
4093
b481de9c
ZY		 4094 while (i != r) {
4095 rxb = rxq->queue[i];
4096
9fbab516 4097 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 4098 * then a bug has been introduced in the queue refilling
4099 * routines -- catch it here */
4100 BUG_ON(rxb == NULL);
4101
4102 rxq->queue[i] = NULL;
4103
4104 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
9ee1ba47 4105 priv->hw_setting.rx_buf_size,
b481de9c 4106 PCI_DMA_FROMDEVICE);
bb8c093b 4107 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4108
4109 /* Reclaim a command buffer only if this packet is a response
4110 * to a (driver-originated) command.
4111 * If the packet (e.g. Rx frame) originated from uCode,
4112 * there is no command buffer to reclaim.
4113 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4114 * but apparently a few don't get set; catch them here. */
4115 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4116 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 4117 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 4118 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 4119 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4120 (pkt->hdr.cmd != REPLY_TX);
4121
4122 /* Based on type of command response or notification,
4123 * handle those that need handling via function in
bb8c093b 4124 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 4125 if (priv->rx_handlers[pkt->hdr.cmd]) {
4126 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4127 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4128 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4129 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4130 } else {
4131 /* No handling needed */
4132 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4133 "r %d i %d No handler needed for %s, 0x%02x\n",
4134 r, i, get_cmd_string(pkt->hdr.cmd),
4135 pkt->hdr.cmd);
4136 }
4137
4138 if (reclaim) {
9fbab516 4139 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 4140 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 4141 * as we reclaim the driver command queue */
4142 if (rxb && rxb->skb)
bb8c093b 4143 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 4144 else
4145 IWL_WARNING("Claim null rxb?\n");
4146 }
4147
4148 /* For now we just don't re-use anything. We can tweak this
4149 * later to try and re-use notification packets and SKBs that
4150 * fail to Rx correctly */
4151 if (rxb->skb != NULL) {
4152 priv->alloc_rxb_skb--;
4153 dev_kfree_skb_any(rxb->skb);
4154 rxb->skb = NULL;
4155 }
4156
4157 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
9ee1ba47
RR		 4158 priv->hw_setting.rx_buf_size,
4159 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4160 spin_lock_irqsave(&rxq->lock, flags);
4161 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4162 spin_unlock_irqrestore(&rxq->lock, flags);
4163 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 4164 /* If there are a lot of unused frames,
4165 * restock the Rx queue so ucode wont assert. */
4166 if (fill_rx) {
4167 count++;
4168 if (count >= 8) {
4169 priv->rxq.read = i;
4170 __iwl4965_rx_replenish(priv);
4171 count = 0;
4172 }
4173 }
b481de9c
ZY		 4174 }
4175
4176 /* Backtrack one entry */
4177 priv->rxq.read = i;
bb8c093b 4178 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4179}
4180
6440adb5
CB		 4181/**
4182 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4183 */
c79dd5b5 4184static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 4185 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 4186{
4187 u32 reg = 0;
4188 int rc = 0;
4189 int txq_id = txq->q.id;
4190
4191 if (txq->need_update == 0)
4192 return rc;
4193
4194 /* if we're trying to save power */
4195 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4196 /* wake up nic if it's powered down ...
4197 * uCode will wake up, and interrupt us again, so next
4198 * time we'll skip this part. */
3395f6e9 4199 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4200
4201 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4202 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3395f6e9 4203 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4204 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4205 return rc;
4206 }
4207
4208 /* restore this queue's parameters in nic hardware. */
3395f6e9 4209 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4210 if (rc)
4211 return rc;
3395f6e9 4212 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4213 txq->q.write_ptr | (txq_id << 8));
3395f6e9 4214 iwl_release_nic_access(priv);
b481de9c
ZY		 4215
4216 /* else not in power-save mode, uCode will never sleep when we're
4217 * trying to tx (during RFKILL, we're not trying to tx). */
4218 } else
3395f6e9 4219 iwl_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4220 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 4221
4222 txq->need_update = 0;
4223
4224 return rc;
4225}
4226
0a6857e7 4227#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 4228static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4229{
0795af57
JP		 4230 DECLARE_MAC_BUF(mac);
4231
b481de9c 4232 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 4233 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 4234 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4235 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4236 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4237 le32_to_cpu(rxon->filter_flags));
4238 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4239 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4240 rxon->ofdm_basic_rates);
4241 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 4242 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4243 print_mac(mac, rxon->node_addr));
4244 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4245 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 4246 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4247}
4248#endif
4249
c79dd5b5 4250static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4251{
4252 IWL_DEBUG_ISR("Enabling interrupts\n");
4253 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 4254 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 4255}
4256
0359facc
MA		 4257/* call this function to flush any scheduled tasklet */
4258static inline void iwl_synchronize_irq(struct iwl_priv *priv)
4259{
4260 /* wait to make sure we flush pedding tasklet*/
4261 synchronize_irq(priv->pci_dev->irq);
4262 tasklet_kill(&priv->irq_tasklet);
4263}
4264
c79dd5b5 4265static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4266{
4267 clear_bit(STATUS_INT_ENABLED, &priv->status);
4268
4269 /* disable interrupts from uCode/NIC to host */
3395f6e9 4270 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4271
4272 /* acknowledge/clear/reset any interrupts still pending
4273 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW		 4274 iwl_write32(priv, CSR_INT, 0xffffffff);
4275 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 4276 IWL_DEBUG_ISR("Disabled interrupts\n");
4277}
4278
4279static const char *desc_lookup(int i)
4280{
4281 switch (i) {
4282 case 1:
4283 return "FAIL";
4284 case 2:
4285 return "BAD_PARAM";
4286 case 3:
4287 return "BAD_CHECKSUM";
4288 case 4:
4289 return "NMI_INTERRUPT";
4290 case 5:
4291 return "SYSASSERT";
4292 case 6:
4293 return "FATAL_ERROR";
4294 }
4295
4296 return "UNKNOWN";
4297}
4298
4299#define ERROR_START_OFFSET (1 * sizeof(u32))
4300#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4301
c79dd5b5 4302static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY		 4303{
4304 u32 data2, line;
4305 u32 desc, time, count, base, data1;
4306 u32 blink1, blink2, ilink1, ilink2;
4307 int rc;
4308
4309 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4310
57aab75a 4311 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4312 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4313 return;
4314 }
4315
3395f6e9 4316 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4317 if (rc) {
4318 IWL_WARNING("Can not read from adapter at this time.\n");
4319 return;
4320 }
4321
3395f6e9 4322 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY		 4323
4324 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4325 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 4326 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY		 4327 }
4328
3395f6e9
TW		 4329 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
4330 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
4331 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
4332 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
4333 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
4334 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
4335 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
4336 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
4337 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 4338
4339 IWL_ERROR("Desc Time "
4340 "data1 data2 line\n");
4341 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4342 desc_lookup(desc), desc, time, data1, data2, line);
4343 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4344 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4345 ilink1, ilink2);
4346
3395f6e9 4347 iwl_release_nic_access(priv);
b481de9c
ZY		 4348}
4349
4350#define EVENT_START_OFFSET (4 * sizeof(u32))
4351
4352/**
bb8c093b 4353 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4354 *
3395f6e9 4355 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 4356 */
c79dd5b5 4357static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY		 4358 u32 num_events, u32 mode)
4359{
4360 u32 i;
4361 u32 base; /* SRAM byte address of event log header */
4362 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4363 u32 ptr; /* SRAM byte address of log data */
4364 u32 ev, time, data; /* event log data */
4365
4366 if (num_events == 0)
4367 return;
4368
4369 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4370
4371 if (mode == 0)
4372 event_size = 2 * sizeof(u32);
4373 else
4374 event_size = 3 * sizeof(u32);
4375
4376 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4377
4378 /* "time" is actually "data" for mode 0 (no timestamp).
4379 * place event id # at far right for easier visual parsing. */
4380 for (i = 0; i < num_events; i++) {
3395f6e9 4381 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 4382 ptr += sizeof(u32);
3395f6e9 4383 time = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY		 4384 ptr += sizeof(u32);
4385 if (mode == 0)
4386 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4387 else {
3395f6e9 4388 data = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY		 4389 ptr += sizeof(u32);
4390 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4391 }
4392 }
4393}
4394
c79dd5b5 4395static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY		 4396{
4397 int rc;
4398 u32 base; /* SRAM byte address of event log header */
4399 u32 capacity; /* event log capacity in # entries */
4400 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4401 u32 num_wraps; /* # times uCode wrapped to top of log */
4402 u32 next_entry; /* index of next entry to be written by uCode */
4403 u32 size; /* # entries that we'll print */
4404
4405 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
57aab75a 4406 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4407 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4408 return;
4409 }
4410
3395f6e9 4411 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4412 if (rc) {
4413 IWL_WARNING("Can not read from adapter at this time.\n");
4414 return;
4415 }
4416
4417 /* event log header */
3395f6e9
TW		 4418 capacity = iwl_read_targ_mem(priv, base);
4419 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4420 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4421 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4422
4423 size = num_wraps ? capacity : next_entry;
4424
4425 /* bail out if nothing in log */
4426 if (size == 0) {
583fab37 4427 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
3395f6e9 4428 iwl_release_nic_access(priv);
b481de9c
ZY		 4429 return;
4430 }
4431
583fab37 4432 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4433 size, num_wraps);
4434
4435 /* if uCode has wrapped back to top of log, start at the oldest entry,
4436 * i.e the next one that uCode would fill. */
4437 if (num_wraps)
bb8c093b 4438 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 4439 capacity - next_entry, mode);
4440
4441 /* (then/else) start at top of log */
bb8c093b 4442 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4443
3395f6e9 4444 iwl_release_nic_access(priv);
b481de9c
ZY		 4445}
4446
4447/**
bb8c093b 4448 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4449 */
c79dd5b5 4450static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4451{
bb8c093b 4452 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 4453 set_bit(STATUS_FW_ERROR, &priv->status);
4454
4455 /* Cancel currently queued command. */
4456 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4457
0a6857e7
TW		 4458#ifdef CONFIG_IWLWIFI_DEBUG
4459 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH		 4460 iwl4965_dump_nic_error_log(priv);
4461 iwl4965_dump_nic_event_log(priv);
4462 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 4463 }
4464#endif
4465
4466 wake_up_interruptible(&priv->wait_command_queue);
4467
4468 /* Keep the restart process from trying to send host
4469 * commands by clearing the INIT status bit */
4470 clear_bit(STATUS_READY, &priv->status);
4471
4472 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4473 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4474 "Restarting adapter due to uCode error.\n");
4475
3109ece1 4476 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4477 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4478 sizeof(priv->recovery_rxon));
4479 priv->error_recovering = 1;
4480 }
4481 queue_work(priv->workqueue, &priv->restart);
4482 }
4483}
4484
c79dd5b5 4485static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 4486{
4487 unsigned long flags;
4488
4489 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4490 sizeof(priv->staging_rxon));
4491 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4492 iwl4965_commit_rxon(priv);
b481de9c 4493
bb8c093b 4494 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 4495
4496 spin_lock_irqsave(&priv->lock, flags);
4497 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4498 priv->error_recovering = 0;
4499 spin_unlock_irqrestore(&priv->lock, flags);
4500}
4501
c79dd5b5 4502static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 4503{
4504 u32 inta, handled = 0;
4505 u32 inta_fh;
4506 unsigned long flags;
0a6857e7 4507#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 4508 u32 inta_mask;
4509#endif
4510
4511 spin_lock_irqsave(&priv->lock, flags);
4512
4513 /* Ack/clear/reset pending uCode interrupts.
4514 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4515 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 4516 inta = iwl_read32(priv, CSR_INT);
4517 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 4518
4519 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4520 * Any new interrupts that happen after this, either while we're
4521 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 4522 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4523 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4524
0a6857e7
TW		 4525#ifdef CONFIG_IWLWIFI_DEBUG
4526 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 4527 /* just for debug */
3395f6e9 4528 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 4529 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4530 inta, inta_mask, inta_fh);
4531 }
4532#endif
4533
4534 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4535 * atomic, make sure that inta covers all the interrupts that
4536 * we've discovered, even if FH interrupt came in just after
4537 * reading CSR_INT. */
6f83eaa1 4538 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4539 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4540 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 4541 inta |= CSR_INT_BIT_FH_TX;
4542
4543 /* Now service all interrupt bits discovered above. */
4544 if (inta & CSR_INT_BIT_HW_ERR) {
4545 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4546
4547 /* Tell the device to stop sending interrupts */
bb8c093b 4548 iwl4965_disable_interrupts(priv);
b481de9c 4549
bb8c093b 4550 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4551
4552 handled |= CSR_INT_BIT_HW_ERR;
4553
4554 spin_unlock_irqrestore(&priv->lock, flags);
4555
4556 return;
4557 }
4558
0a6857e7
TW		 4559#ifdef CONFIG_IWLWIFI_DEBUG
4560 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4561 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 4562 if (inta & CSR_INT_BIT_SCD)
4563 IWL_DEBUG_ISR("Scheduler finished to transmit "
4564 "the frame/frames.\n");
b481de9c
ZY		 4565
4566 /* Alive notification via Rx interrupt will do the real work */
4567 if (inta & CSR_INT_BIT_ALIVE)
4568 IWL_DEBUG_ISR("Alive interrupt\n");
4569 }
4570#endif
4571 /* Safely ignore these bits for debug checks below */
25c03d8e 4572 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4573
9fbab516 4574 /* HW RF KILL switch toggled */
b481de9c
ZY		 4575 if (inta & CSR_INT_BIT_RF_KILL) {
4576 int hw_rf_kill = 0;
3395f6e9 4577 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 4578 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4579 hw_rf_kill = 1;
4580
4581 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4582 "RF_KILL bit toggled to %s.\n",
4583 hw_rf_kill ? "disable radio":"enable radio");
4584
4585 /* Queue restart only if RF_KILL switch was set to "kill"
4586 * when we loaded driver, and is now set to "enable".
4587 * After we're Alive, RF_KILL gets handled by
3230455d 4588 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 4589 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4590 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4591 queue_work(priv->workqueue, &priv->restart);
53e49093 4592 }
b481de9c
ZY		 4593
4594 handled |= CSR_INT_BIT_RF_KILL;
4595 }
4596
9fbab516 4597 /* Chip got too hot and stopped itself */
b481de9c
ZY		 4598 if (inta & CSR_INT_BIT_CT_KILL) {
4599 IWL_ERROR("Microcode CT kill error detected.\n");
4600 handled |= CSR_INT_BIT_CT_KILL;
4601 }
4602
4603 /* Error detected by uCode */
4604 if (inta & CSR_INT_BIT_SW_ERR) {
4605 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4606 inta);
bb8c093b 4607 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4608 handled |= CSR_INT_BIT_SW_ERR;
4609 }
4610
4611 /* uCode wakes up after power-down sleep */
4612 if (inta & CSR_INT_BIT_WAKEUP) {
4613 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 4614 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4615 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4616 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4617 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4618 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4619 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4620 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 4621
4622 handled |= CSR_INT_BIT_WAKEUP;
4623 }
4624
4625 /* All uCode command responses, including Tx command responses,
4626 * Rx "responses" (frame-received notification), and other
4627 * notifications from uCode come through here*/
4628 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4629 iwl4965_rx_handle(priv);
b481de9c
ZY		 4630 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4631 }
4632
4633 if (inta & CSR_INT_BIT_FH_TX) {
4634 IWL_DEBUG_ISR("Tx interrupt\n");
4635 handled |= CSR_INT_BIT_FH_TX;
4636 }
4637
4638 if (inta & ~handled)
4639 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4640
4641 if (inta & ~CSR_INI_SET_MASK) {
4642 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4643 inta & ~CSR_INI_SET_MASK);
4644 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4645 }
4646
4647 /* Re-enable all interrupts */
0359facc
MA		 4648 /* only Re-enable if diabled by irq */
4649 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4650 iwl4965_enable_interrupts(priv);
b481de9c 4651
0a6857e7
TW		 4652#ifdef CONFIG_IWLWIFI_DEBUG
4653 if (iwl_debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 4654 inta = iwl_read32(priv, CSR_INT);
4655 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4656 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4657 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4658 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4659 }
4660#endif
4661 spin_unlock_irqrestore(&priv->lock, flags);
4662}
4663
bb8c093b 4664static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4665{
c79dd5b5 4666 struct iwl_priv *priv = data;
b481de9c
ZY		 4667 u32 inta, inta_mask;
4668 u32 inta_fh;
4669 if (!priv)
4670 return IRQ_NONE;
4671
4672 spin_lock(&priv->lock);
4673
4674 /* Disable (but don't clear!) interrupts here to avoid
4675 * back-to-back ISRs and sporadic interrupts from our NIC.
4676 * If we have something to service, the tasklet will re-enable ints.
4677 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 4678 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4679 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4680
4681 /* Discover which interrupts are active/pending */
3395f6e9
TW		 4682 inta = iwl_read32(priv, CSR_INT);
4683 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4684
4685 /* Ignore interrupt if there's nothing in NIC to service.
4686 * This may be due to IRQ shared with another device,
4687 * or due to sporadic interrupts thrown from our NIC. */
4688 if (!inta && !inta_fh) {
4689 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4690 goto none;
4691 }
4692
4693 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 4694 /* Hardware disappeared. It might have already raised
4695 * an interrupt */
b481de9c 4696 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4697 goto unplugged;
b481de9c
ZY		 4698 }
4699
4700 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4701 inta, inta_mask, inta_fh);
4702
25c03d8e
JP		 4703 inta &= ~CSR_INT_BIT_SCD;
4704
bb8c093b 4705 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 4706 if (likely(inta || inta_fh))
4707 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4708
66fbb541
ON		 4709 unplugged:
4710 spin_unlock(&priv->lock);
b481de9c
ZY		 4711 return IRQ_HANDLED;
4712
4713 none:
4714 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 4715 /* only Re-enable if diabled by irq */
4716 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4717 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 4718 spin_unlock(&priv->lock);
4719 return IRQ_NONE;
4720}
4721
b481de9c
ZY		 4722/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4723 * sending probe req. This should be set long enough to hear probe responses
4724 * from more than one AP. */
4725#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4726#define IWL_ACTIVE_DWELL_TIME_52 (10)
4727
4728/* For faster active scanning, scan will move to the next channel if fewer than
4729 * PLCP_QUIET_THRESH packets are heard on this channel within
4730 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4731 * time if it's a quiet channel (nothing responded to our probe, and there's
4732 * no other traffic).
4733 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4734#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4735#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4736
4737/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4738 * Must be set longer than active dwell time.
4739 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4740#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4741#define IWL_PASSIVE_DWELL_TIME_52 (10)
4742#define IWL_PASSIVE_DWELL_BASE (100)
4743#define IWL_CHANNEL_TUNE_TIME 5
4744
c79dd5b5 4745static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4746 enum ieee80211_band band)
b481de9c 4747{
8318d78a 4748 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4749 return IWL_ACTIVE_DWELL_TIME_52;
4750 else
4751 return IWL_ACTIVE_DWELL_TIME_24;
4752}
4753
c79dd5b5 4754static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4755 enum ieee80211_band band)
b481de9c 4756{
8318d78a
JB		 4757 u16 active = iwl4965_get_active_dwell_time(priv, band);
4758 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 4759 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4760 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4761
3109ece1 4762 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4763 /* If we're associated, we clamp the maximum passive
4764 * dwell time to be 98% of the beacon interval (minus
4765 * 2 * channel tune time) */
4766 passive = priv->beacon_int;
4767 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4768 passive = IWL_PASSIVE_DWELL_BASE;
4769 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4770 }
4771
4772 if (passive <= active)
4773 passive = active + 1;
4774
4775 return passive;
4776}
4777
c79dd5b5 4778static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4779 enum ieee80211_band band,
b481de9c 4780 u8 is_active, u8 direct_mask,
bb8c093b 4781 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 4782{
4783 const struct ieee80211_channel *channels = NULL;
8318d78a 4784 const struct ieee80211_supported_band *sband;
bf85ea4f 4785 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 4786 u16 passive_dwell = 0;
4787 u16 active_dwell = 0;
4788 int added, i;
4789
8318d78a
JB		 4790 sband = iwl4965_get_hw_mode(priv, band);
4791 if (!sband)
b481de9c
ZY		 4792 return 0;
4793
8318d78a 4794 channels = sband->channels;
b481de9c 4795
8318d78a
JB		 4796 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4797 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4798
8318d78a 4799 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB		 4800 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4801 continue;
4802
8318d78a 4803 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
b481de9c 4804 le16_to_cpu(priv->active_rxon.channel)) {
3109ece1 4805 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4806 IWL_DEBUG_SCAN
4807 ("Skipping current channel %d\n",
4808 le16_to_cpu(priv->active_rxon.channel));
4809 continue;
4810 }
4811 } else if (priv->only_active_channel)
4812 continue;
4813
8318d78a 4814 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4815
8622e705 4816 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4817 scan_ch->channel);
b481de9c
ZY		 4818 if (!is_channel_valid(ch_info)) {
4819 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4820 scan_ch->channel);
4821 continue;
4822 }
4823
4824 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4825 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 4826 scan_ch->type = 0; /* passive */
4827 else
4828 scan_ch->type = 1; /* active */
4829
4830 if (scan_ch->type & 1)
4831 scan_ch->type |= (direct_mask << 1);
4832
4833 if (is_channel_narrow(ch_info))
4834 scan_ch->type |= (1 << 7);
4835
4836 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4837 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4838
9fbab516 4839 /* Set txpower levels to defaults */
b481de9c
ZY		 4840 scan_ch->tpc.dsp_atten = 110;
4841 /* scan_pwr_info->tpc.dsp_atten; */
4842
4843 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4844 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4845 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4846 else {
4847 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4848 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4849 * power level:
8a1b0245 4850 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 4851 */
4852 }
4853
4854 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4855 scan_ch->channel,
4856 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4857 (scan_ch->type & 1) ?
4858 active_dwell : passive_dwell);
4859
4860 scan_ch++;
4861 added++;
4862 }
4863
4864 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4865 return added;
4866}
4867
c79dd5b5 4868static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY		 4869 struct ieee80211_rate *rates)
4870{
4871 int i;
4872
4873 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB		 4874 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
4875 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4876 rates[i].hw_value_short = i;
4877 rates[i].flags = 0;
4878 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 4879 /*
8318d78a 4880 * If CCK != 1M then set short preamble rate flag.
b481de9c 4881 */
35cdeaf4
TW		 4882 rates[i].flags |=
4883 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4884 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 4885 }
b481de9c 4886 }
b481de9c
ZY		 4887}
4888
4889/**
bb8c093b 4890 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 4891 */
bf85ea4f 4892int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 4893{
bf85ea4f 4894 struct iwl_channel_info *ch;
8211ef78 4895 struct ieee80211_supported_band *sband;
b481de9c
ZY		 4896 struct ieee80211_channel *channels;
4897 struct ieee80211_channel *geo_ch;
4898 struct ieee80211_rate *rates;
4899 int i = 0;
b481de9c 4900
8318d78a
JB		 4901 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4902 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY		 4903 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4904 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4905 return 0;
4906 }
4907
b481de9c
ZY		 4908 channels = kzalloc(sizeof(struct ieee80211_channel) *
4909 priv->channel_count, GFP_KERNEL);
8318d78a 4910 if (!channels)
b481de9c 4911 return -ENOMEM;
b481de9c 4912
8211ef78 4913 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY		 4914 GFP_KERNEL);
4915 if (!rates) {
b481de9c
ZY		 4916 kfree(channels);
4917 return -ENOMEM;
4918 }
4919
b481de9c 4920 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78 4921 sband = &priv->bands[IEEE80211_BAND_5GHZ];
bf85ea4f 4922 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
8211ef78
TW		 4923 /* just OFDM */
4924 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4925 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 4926
1ea87396 4927 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 4928
8211ef78
TW		 4929 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4930 sband->channels = channels;
4931 /* OFDM & CCK */
4932 sband->bitrates = rates;
4933 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 4934
1ea87396 4935 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 4936
b481de9c
ZY		 4937 priv->ieee_channels = channels;
4938 priv->ieee_rates = rates;
4939
bb8c093b 4940 iwl4965_init_hw_rates(priv, rates);
b481de9c 4941
8211ef78 4942 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY		 4943 ch = &priv->channel_info[i];
4944
8211ef78
TW		 4945 /* FIXME: might be removed if scan is OK */
4946 if (!is_channel_valid(ch))
b481de9c 4947 continue;
b481de9c 4948
8211ef78
TW		 4949 if (is_channel_a_band(ch))
4950 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4951 else
4952 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 4953
8211ef78
TW		 4954 geo_ch = &sband->channels[sband->n_channels++];
4955
4956 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB		 4957 geo_ch->max_power = ch->max_power_avg;
4958 geo_ch->max_antenna_gain = 0xff;
7b72304d 4959 geo_ch->hw_value = ch->channel;
b481de9c
ZY		 4960
4961 if (is_channel_valid(ch)) {
8318d78a
JB		 4962 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4963 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 4964
8318d78a
JB		 4965 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4966 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY		 4967
4968 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 4969 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY		 4970
4971 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4972 priv->max_channel_txpower_limit =
4973 ch->max_power_avg;
8211ef78 4974 } else {
8318d78a 4975 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW		 4976 }
4977
4978 /* Save flags for reg domain usage */
4979 geo_ch->orig_flags = geo_ch->flags;
4980
4981 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4982 ch->channel, geo_ch->center_freq,
4983 is_channel_a_band(ch) ? "5.2" : "2.4",
4984 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4985 "restricted" : "valid",
4986 geo_ch->flags);
b481de9c
ZY		 4987 }
4988
82b9a121
TW		 4989 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4990 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY		 4991 printk(KERN_INFO DRV_NAME
4992 ": Incorrectly detected BG card as ABG. Please send "
4993 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4994 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 4995 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY		 4996 }
4997
4998 printk(KERN_INFO DRV_NAME
4999 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB		 5000 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5001 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 5002
e0e0a67e
JL		 5003 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5004 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5005 &priv->bands[IEEE80211_BAND_2GHZ];
5006 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5007 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5008 &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 5009
b481de9c
ZY		 5010 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5011
5012 return 0;
5013}
5014
849e0dce
RC		 5015/*
5016 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5017 */
bf85ea4f 5018void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 5019{
849e0dce
RC		 5020 kfree(priv->ieee_channels);
5021 kfree(priv->ieee_rates);
5022 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5023}
5024
b481de9c
ZY		 5025/******************************************************************************
5026 *
5027 * uCode download functions
5028 *
5029 ******************************************************************************/
5030
c79dd5b5 5031static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 5032{
98c92211
TW		 5033 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5034 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5035 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5036 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5037 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5038 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 5039}
5040
5041/**
bb8c093b 5042 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5043 * looking at all data.
5044 */
c79dd5b5 5045static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 5046 u32 len)
b481de9c
ZY		 5047{
5048 u32 val;
5049 u32 save_len = len;
5050 int rc = 0;
5051 u32 errcnt;
5052
5053 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5054
3395f6e9 5055 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 5056 if (rc)
5057 return rc;
5058
3395f6e9 5059 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY		 5060
5061 errcnt = 0;
5062 for (; len > 0; len -= sizeof(u32), image++) {
5063 /* read data comes through single port, auto-incr addr */
5064 /* NOTE: Use the debugless read so we don't flood kernel log
5065 * if IWL_DL_IO is set */
3395f6e9 5066 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5067 if (val != le32_to_cpu(*image)) {
5068 IWL_ERROR("uCode INST section is invalid at "
5069 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5070 save_len - len, val, le32_to_cpu(*image));
5071 rc = -EIO;
5072 errcnt++;
5073 if (errcnt >= 20)
5074 break;
5075 }
5076 }
5077
3395f6e9 5078 iwl_release_nic_access(priv);
b481de9c
ZY		 5079
5080 if (!errcnt)
5081 IWL_DEBUG_INFO
5082 ("ucode image in INSTRUCTION memory is good\n");
5083
5084 return rc;
5085}
5086
5087
5088/**
bb8c093b 5089 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5090 * using sample data 100 bytes apart. If these sample points are good,
5091 * it's a pretty good bet that everything between them is good, too.
5092 */
c79dd5b5 5093static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY		 5094{
5095 u32 val;
5096 int rc = 0;
5097 u32 errcnt = 0;
5098 u32 i;
5099
5100 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5101
3395f6e9 5102 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 5103 if (rc)
5104 return rc;
5105
5106 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5107 /* read data comes through single port, auto-incr addr */
5108 /* NOTE: Use the debugless read so we don't flood kernel log
5109 * if IWL_DL_IO is set */
3395f6e9 5110 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 5111 i + RTC_INST_LOWER_BOUND);
3395f6e9 5112 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5113 if (val != le32_to_cpu(*image)) {
5114#if 0 /* Enable this if you want to see details */
5115 IWL_ERROR("uCode INST section is invalid at "
5116 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5117 i, val, *image);
5118#endif
5119 rc = -EIO;
5120 errcnt++;
5121 if (errcnt >= 3)
5122 break;
5123 }
5124 }
5125
3395f6e9 5126 iwl_release_nic_access(priv);
b481de9c
ZY		 5127
5128 return rc;
5129}
5130
5131
5132/**
bb8c093b 5133 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY		 5134 * and verify its contents
5135 */
c79dd5b5 5136static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY		 5137{
5138 __le32 *image;
5139 u32 len;
5140 int rc = 0;
5141
5142 /* Try bootstrap */
5143 image = (__le32 *)priv->ucode_boot.v_addr;
5144 len = priv->ucode_boot.len;
bb8c093b 5145 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5146 if (rc == 0) {
5147 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5148 return 0;
5149 }
5150
5151 /* Try initialize */
5152 image = (__le32 *)priv->ucode_init.v_addr;
5153 len = priv->ucode_init.len;
bb8c093b 5154 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5155 if (rc == 0) {
5156 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5157 return 0;
5158 }
5159
5160 /* Try runtime/protocol */
5161 image = (__le32 *)priv->ucode_code.v_addr;
5162 len = priv->ucode_code.len;
bb8c093b 5163 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5164 if (rc == 0) {
5165 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5166 return 0;
5167 }
5168
5169 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5170
9fbab516
BC		 5171 /* Since nothing seems to match, show first several data entries in
5172 * instruction SRAM, so maybe visual inspection will give a clue.
5173 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY		 5174 image = (__le32 *)priv->ucode_boot.v_addr;
5175 len = priv->ucode_boot.len;
bb8c093b 5176 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY		 5177
5178 return rc;
5179}
5180
c79dd5b5 5181static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY		 5182{
5183 /* Remove all resets to allow NIC to operate */
3395f6e9 5184 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 5185}
5186
90e759d1 5187
b481de9c 5188/**
bb8c093b 5189 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 5190 *
5191 * Copy into buffers for card to fetch via bus-mastering
5192 */
c79dd5b5 5193static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 5194{
bb8c093b 5195 struct iwl4965_ucode *ucode;
90e759d1 5196 int ret;
b481de9c 5197 const struct firmware *ucode_raw;
4bf775cd 5198 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 5199 u8 *src;
5200 size_t len;
5201 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5202
5203 /* Ask kernel firmware_class module to get the boot firmware off disk.
5204 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 5205 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5206 if (ret < 0) {
5207 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5208 name, ret);
b481de9c
ZY		 5209 goto error;
5210 }
5211
5212 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5213 name, ucode_raw->size);
5214
5215 /* Make sure that we got at least our header! */
5216 if (ucode_raw->size < sizeof(*ucode)) {
5217 IWL_ERROR("File size way too small!\n");
90e759d1 5218 ret = -EINVAL;
b481de9c
ZY		 5219 goto err_release;
5220 }
5221
5222 /* Data from ucode file: header followed by uCode images */
5223 ucode = (void *)ucode_raw->data;
5224
5225 ver = le32_to_cpu(ucode->ver);
5226 inst_size = le32_to_cpu(ucode->inst_size);
5227 data_size = le32_to_cpu(ucode->data_size);
5228 init_size = le32_to_cpu(ucode->init_size);
5229 init_data_size = le32_to_cpu(ucode->init_data_size);
5230 boot_size = le32_to_cpu(ucode->boot_size);
5231
5232 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5233 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
5234 inst_size);
5235 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
5236 data_size);
5237 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
5238 init_size);
5239 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
5240 init_data_size);
5241 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
5242 boot_size);
5243
5244 /* Verify size of file vs. image size info in file's header */
5245 if (ucode_raw->size < sizeof(*ucode) +
5246 inst_size + data_size + init_size +
5247 init_data_size + boot_size) {
5248
5249 IWL_DEBUG_INFO("uCode file size %d too small\n",
5250 (int)ucode_raw->size);
90e759d1 5251 ret = -EINVAL;
b481de9c
ZY		 5252 goto err_release;
5253 }
5254
5255 /* Verify that uCode images will fit in card's SRAM */
5256 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW		 5257 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5258 inst_size);
5259 ret = -EINVAL;
b481de9c
ZY		 5260 goto err_release;
5261 }
5262
5263 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW		 5264 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5265 data_size);
5266 ret = -EINVAL;
b481de9c
ZY		 5267 goto err_release;
5268 }
5269 if (init_size > IWL_MAX_INST_SIZE) {
5270 IWL_DEBUG_INFO
90e759d1
TW		 5271 ("uCode init instr len %d too large to fit in\n",
5272 init_size);
5273 ret = -EINVAL;
b481de9c
ZY		 5274 goto err_release;
5275 }
5276 if (init_data_size > IWL_MAX_DATA_SIZE) {
5277 IWL_DEBUG_INFO
90e759d1
TW		 5278 ("uCode init data len %d too large to fit in\n",
5279 init_data_size);
5280 ret = -EINVAL;
b481de9c
ZY		 5281 goto err_release;
5282 }
5283 if (boot_size > IWL_MAX_BSM_SIZE) {
5284 IWL_DEBUG_INFO
90e759d1
TW		 5285 ("uCode boot instr len %d too large to fit in\n",
5286 boot_size);
5287 ret = -EINVAL;
b481de9c
ZY		 5288 goto err_release;
5289 }
5290
5291 /* Allocate ucode buffers for card's bus-master loading ... */
5292
5293 /* Runtime instructions and 2 copies of data:
5294 * 1) unmodified from disk
5295 * 2) backup cache for save/restore during power-downs */
5296 priv->ucode_code.len = inst_size;
98c92211 5297 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 5298
5299 priv->ucode_data.len = data_size;
98c92211 5300 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 5301
5302 priv->ucode_data_backup.len = data_size;
98c92211 5303 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 5304
5305 /* Initialization instructions and data */
90e759d1
TW		 5306 if (init_size && init_data_size) {
5307 priv->ucode_init.len = init_size;
98c92211 5308 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 5309
5310 priv->ucode_init_data.len = init_data_size;
98c92211 5311 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 5312
5313 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5314 goto err_pci_alloc;
5315 }
b481de9c
ZY		 5316
5317 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 5318 if (boot_size) {
5319 priv->ucode_boot.len = boot_size;
98c92211 5320 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 5321
90e759d1
TW		 5322 if (!priv->ucode_boot.v_addr)
5323 goto err_pci_alloc;
5324 }
b481de9c
ZY		 5325
5326 /* Copy images into buffers for card's bus-master reads ... */
5327
5328 /* Runtime instructions (first block of data in file) */
5329 src = &ucode->data[0];
5330 len = priv->ucode_code.len;
90e759d1 5331 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 5332 memcpy(priv->ucode_code.v_addr, src, len);
5333 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5334 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5335
5336 /* Runtime data (2nd block)
bb8c093b 5337 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 5338 src = &ucode->data[inst_size];
5339 len = priv->ucode_data.len;
90e759d1 5340 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 5341 memcpy(priv->ucode_data.v_addr, src, len);
5342 memcpy(priv->ucode_data_backup.v_addr, src, len);
5343
5344 /* Initialization instructions (3rd block) */
5345 if (init_size) {
5346 src = &ucode->data[inst_size + data_size];
5347 len = priv->ucode_init.len;
90e759d1
TW		 5348 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5349 len);
b481de9c
ZY		 5350 memcpy(priv->ucode_init.v_addr, src, len);
5351 }
5352
5353 /* Initialization data (4th block) */
5354 if (init_data_size) {
5355 src = &ucode->data[inst_size + data_size + init_size];
5356 len = priv->ucode_init_data.len;
90e759d1
TW		 5357 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
5358 len);
b481de9c
ZY		 5359 memcpy(priv->ucode_init_data.v_addr, src, len);
5360 }
5361
5362 /* Bootstrap instructions (5th block) */
5363 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5364 len = priv->ucode_boot.len;
90e759d1 5365 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 5366 memcpy(priv->ucode_boot.v_addr, src, len);
5367
5368 /* We have our copies now, allow OS release its copies */
5369 release_firmware(ucode_raw);
5370 return 0;
5371
5372 err_pci_alloc:
5373 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 5374 ret = -ENOMEM;
bb8c093b 5375 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 5376
5377 err_release:
5378 release_firmware(ucode_raw);
5379
5380 error:
90e759d1 5381 return ret;
b481de9c
ZY		 5382}
5383
5384
5385/**
bb8c093b 5386 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 5387 *
5388 * Tell initialization uCode where to find runtime uCode.
5389 *
5390 * BSM registers initially contain pointers to initialization uCode.
5391 * We need to replace them to load runtime uCode inst and data,
5392 * and to save runtime data when powering down.
5393 */
c79dd5b5 5394static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY		 5395{
5396 dma_addr_t pinst;
5397 dma_addr_t pdata;
5398 int rc = 0;
5399 unsigned long flags;
5400
5401 /* bits 35:4 for 4965 */
5402 pinst = priv->ucode_code.p_addr >> 4;
5403 pdata = priv->ucode_data_backup.p_addr >> 4;
5404
5405 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5406 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 5407 if (rc) {
5408 spin_unlock_irqrestore(&priv->lock, flags);
5409 return rc;
5410 }
5411
5412 /* Tell bootstrap uCode where to find image to load */
3395f6e9
TW		 5413 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5414 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5415 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 5416 priv->ucode_data.len);
5417
5418 /* Inst bytecount must be last to set up, bit 31 signals uCode
5419 * that all new ptr/size info is in place */
3395f6e9 5420 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 5421 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5422
3395f6e9 5423 iwl_release_nic_access(priv);
b481de9c
ZY		 5424
5425 spin_unlock_irqrestore(&priv->lock, flags);
5426
5427 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5428
5429 return rc;
5430}
5431
5432/**
bb8c093b 5433 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 5434 *
5435 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5436 *
5437 * The 4965 "initialize" ALIVE reply contains calibration data for:
5438 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
5439 * (3945 does not contain this data).
5440 *
5441 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5442*/
c79dd5b5 5443static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 5444{
5445 /* Check alive response for "valid" sign from uCode */
5446 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5447 /* We had an error bringing up the hardware, so take it
5448 * all the way back down so we can try again */
5449 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5450 goto restart;
5451 }
5452
5453 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5454 * This is a paranoid check, because we would not have gotten the
5455 * "initialize" alive if code weren't properly loaded. */
bb8c093b 5456 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 5457 /* Runtime instruction load was bad;
5458 * take it all the way back down so we can try again */
5459 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5460 goto restart;
5461 }
5462
5463 /* Calculate temperature */
5464 priv->temperature = iwl4965_get_temperature(priv);
5465
5466 /* Send pointers to protocol/runtime uCode image ... init code will
5467 * load and launch runtime uCode, which will send us another "Alive"
5468 * notification. */
5469 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 5470 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 5471 /* Runtime instruction load won't happen;
5472 * take it all the way back down so we can try again */
5473 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5474 goto restart;
5475 }
5476 return;
5477
5478 restart:
5479 queue_work(priv->workqueue, &priv->restart);
5480}
5481
5482
5483/**
bb8c093b 5484 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 5485 * from protocol/runtime uCode (initialization uCode's
bb8c093b 5486 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 5487 */
c79dd5b5 5488static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c 5489{
57aab75a 5490 int ret = 0;
b481de9c
ZY		 5491
5492 IWL_DEBUG_INFO("Runtime Alive received.\n");
5493
5494 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5495 /* We had an error bringing up the hardware, so take it
5496 * all the way back down so we can try again */
5497 IWL_DEBUG_INFO("Alive failed.\n");
5498 goto restart;
5499 }
5500
5501 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5502 * This is a paranoid check, because we would not have gotten the
5503 * "runtime" alive if code weren't properly loaded. */
bb8c093b 5504 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 5505 /* Runtime instruction load was bad;
5506 * take it all the way back down so we can try again */
5507 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5508 goto restart;
5509 }
5510
bf85ea4f 5511 iwlcore_clear_stations_table(priv);
b481de9c 5512
57aab75a
TW		 5513 ret = priv->cfg->ops->lib->alive_notify(priv);
5514 if (ret) {
b481de9c 5515 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 5516 ret);
b481de9c
ZY		 5517 goto restart;
5518 }
5519
9fbab516 5520 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 5521 set_bit(STATUS_ALIVE, &priv->status);
5522
5523 /* Clear out the uCode error bit if it is set */
5524 clear_bit(STATUS_FW_ERROR, &priv->status);
5525
fee1247a 5526 if (iwl_is_rfkill(priv))
b481de9c
ZY		 5527 return;
5528
5a66926a 5529 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 5530
5531 priv->active_rate = priv->rates_mask;
5532 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5533
bb8c093b 5534 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 5535
3109ece1 5536 if (iwl_is_associated(priv)) {
bb8c093b
CH		 5537 struct iwl4965_rxon_cmd *active_rxon =
5538 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 5539
5540 memcpy(&priv->staging_rxon, &priv->active_rxon,
5541 sizeof(priv->staging_rxon));
5542 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5543 } else {
5544 /* Initialize our rx_config data */
bb8c093b 5545 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 5546 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5547 }
5548
9fbab516 5549 /* Configure Bluetooth device coexistence support */
bb8c093b 5550 iwl4965_send_bt_config(priv);
b481de9c
ZY		 5551
5552 /* Configure the adapter for unassociated operation */
bb8c093b 5553 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5554
5555 /* At this point, the NIC is initialized and operational */
5556 priv->notif_missed_beacons = 0;
b481de9c
ZY		 5557
5558 iwl4965_rf_kill_ct_config(priv);
5a66926a 5559
fe00b5a5
RC		 5560 iwl_leds_register(priv);
5561
b481de9c 5562 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 5563 set_bit(STATUS_READY, &priv->status);
5a66926a 5564 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 5565
5566 if (priv->error_recovering)
bb8c093b 5567 iwl4965_error_recovery(priv);
b481de9c 5568
c8381fdc 5569 iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
84363e6e 5570 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY		 5571 return;
5572
5573 restart:
5574 queue_work(priv->workqueue, &priv->restart);
5575}
5576
c79dd5b5 5577static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 5578
c79dd5b5 5579static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 5580{
5581 unsigned long flags;
5582 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5583 struct ieee80211_conf *conf = NULL;
5584
5585 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5586
5587 conf = ieee80211_get_hw_conf(priv->hw);
5588
5589 if (!exit_pending)
5590 set_bit(STATUS_EXIT_PENDING, &priv->status);
5591
ab53d8af
MA		 5592 iwl_leds_unregister(priv);
5593
c8381fdc
MA		 5594 iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
5595
bf85ea4f 5596 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5597
5598 /* Unblock any waiting calls */
5599 wake_up_interruptible_all(&priv->wait_command_queue);
5600
b481de9c
ZY		 5601 /* Wipe out the EXIT_PENDING status bit if we are not actually
5602 * exiting the module */
5603 if (!exit_pending)
5604 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5605
5606 /* stop and reset the on-board processor */
3395f6e9 5607 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 5608
5609 /* tell the device to stop sending interrupts */
0359facc 5610 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 5611 iwl4965_disable_interrupts(priv);
0359facc
MA		 5612 spin_unlock_irqrestore(&priv->lock, flags);
5613 iwl_synchronize_irq(priv);
b481de9c
ZY		 5614
5615 if (priv->mac80211_registered)
5616 ieee80211_stop_queues(priv->hw);
5617
bb8c093b 5618 /* If we have not previously called iwl4965_init() then
b481de9c 5619 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 5620 if (!iwl_is_init(priv)) {
b481de9c
ZY		 5621 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5622 STATUS_RF_KILL_HW |
5623 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5624 STATUS_RF_KILL_SW |
9788864e
RC		 5625 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5626 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 5627 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5628 STATUS_IN_SUSPEND;
5629 goto exit;
5630 }
5631
5632 /* ...otherwise clear out all the status bits but the RF Kill and
5633 * SUSPEND bits and continue taking the NIC down. */
5634 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5635 STATUS_RF_KILL_HW |
5636 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5637 STATUS_RF_KILL_SW |
9788864e
RC		 5638 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5639 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 5640 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5641 STATUS_IN_SUSPEND |
5642 test_bit(STATUS_FW_ERROR, &priv->status) <<
5643 STATUS_FW_ERROR;
5644
5645 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 5646 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 5647 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 5648 spin_unlock_irqrestore(&priv->lock, flags);
5649
bb8c093b
CH		 5650 iwl4965_hw_txq_ctx_stop(priv);
5651 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 5652
5653 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 5654 if (!iwl_grab_nic_access(priv)) {
5655 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 5656 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 5657 iwl_release_nic_access(priv);
b481de9c
ZY		 5658 }
5659 spin_unlock_irqrestore(&priv->lock, flags);
5660
5661 udelay(5);
5662
bb8c093b 5663 iwl4965_hw_nic_stop_master(priv);
3395f6e9 5664 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
bb8c093b 5665 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 5666
5667 exit:
bb8c093b 5668 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 5669
5670 if (priv->ibss_beacon)
5671 dev_kfree_skb(priv->ibss_beacon);
5672 priv->ibss_beacon = NULL;
5673
5674 /* clear out any free frames */
bb8c093b 5675 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 5676}
5677
c79dd5b5 5678static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 5679{
5680 mutex_lock(&priv->mutex);
bb8c093b 5681 __iwl4965_down(priv);
b481de9c 5682 mutex_unlock(&priv->mutex);
b24d22b1 5683
bb8c093b 5684 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 5685}
5686
5687#define MAX_HW_RESTARTS 5
5688
c79dd5b5 5689static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 5690{
57aab75a
TW		 5691 int i;
5692 int ret;
b481de9c
ZY		 5693
5694 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5695 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5696 return -EIO;
5697 }
5698
5699 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5700 IWL_WARNING("Radio disabled by SW RF kill (module "
5701 "parameter)\n");
ad97edd2 5702 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY		 5703 return -ENODEV;
5704 }
5705
e903fbd4
RC		 5706 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5707 IWL_ERROR("ucode not available for device bringup\n");
5708 return -EIO;
5709 }
5710
e655b9f0 5711 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 5712 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY		 5713 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5714 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5715 else {
5716 set_bit(STATUS_RF_KILL_HW, &priv->status);
5717 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 5718 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY		 5719 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5720 return -ENODEV;
5721 }
b481de9c
ZY		 5722 }
5723
ad97edd2 5724 iwl_rfkill_set_hw_state(priv);
3395f6e9 5725 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5726
57aab75a
TW		 5727 ret = priv->cfg->ops->lib->hw_nic_init(priv);
5728 if (ret) {
5729 IWL_ERROR("Unable to init nic\n");
5730 return ret;
b481de9c
ZY		 5731 }
5732
5733 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 5734 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5735 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 5736 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5737
5738 /* clear (again), then enable host interrupts */
3395f6e9 5739 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 5740 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5741
5742 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 5743 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5744 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 5745
5746 /* Copy original ucode data image from disk into backup cache.
5747 * This will be used to initialize the on-board processor's
5748 * data SRAM for a clean start when the runtime program first loads. */
5749 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5750 priv->ucode_data.len);
b481de9c 5751
e655b9f0
ZY		 5752 /* We return success when we resume from suspend and rf_kill is on. */
5753 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5754 return 0;
b481de9c
ZY		 5755
5756 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5757
bf85ea4f 5758 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5759
5760 /* load bootstrap state machine,
5761 * load bootstrap program into processor's memory,
5762 * prepare to load the "initialize" uCode */
57aab75a 5763 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 5764
57aab75a
TW		 5765 if (ret) {
5766 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY		 5767 continue;
5768 }
5769
5770 /* start card; "initialize" will load runtime ucode */
bb8c093b 5771 iwl4965_nic_start(priv);
b481de9c 5772
b481de9c
ZY		 5773 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5774
5775 return 0;
5776 }
5777
5778 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5779 __iwl4965_down(priv);
b481de9c
ZY		 5780
5781 /* tried to restart and config the device for as long as our
5782 * patience could withstand */
5783 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5784 return -EIO;
5785}
5786
5787
5788/*****************************************************************************
5789 *
5790 * Workqueue callbacks
5791 *
5792 *****************************************************************************/
5793
bb8c093b 5794static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5795{
c79dd5b5
TW		 5796 struct iwl_priv *priv =
5797 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 5798
5799 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5800 return;
5801
5802 mutex_lock(&priv->mutex);
bb8c093b 5803 iwl4965_init_alive_start(priv);
b481de9c
ZY		 5804 mutex_unlock(&priv->mutex);
5805}
5806
bb8c093b 5807static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5808{
c79dd5b5
TW		 5809 struct iwl_priv *priv =
5810 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 5811
5812 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5813 return;
5814
5815 mutex_lock(&priv->mutex);
bb8c093b 5816 iwl4965_alive_start(priv);
b481de9c
ZY		 5817 mutex_unlock(&priv->mutex);
5818}
5819
bb8c093b 5820static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5821{
c79dd5b5 5822 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 5823
5824 wake_up_interruptible(&priv->wait_command_queue);
5825
5826 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5827 return;
5828
5829 mutex_lock(&priv->mutex);
5830
fee1247a 5831 if (!iwl_is_rfkill(priv)) {
b481de9c
ZY		 5832 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5833 "HW and/or SW RF Kill no longer active, restarting "
5834 "device\n");
5835 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5836 queue_work(priv->workqueue, &priv->restart);
5837 } else {
ad97edd2
MA		 5838 /* make sure mac80211 stop sending Tx frame */
5839 if (priv->mac80211_registered)
5840 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 5841
5842 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5843 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5844 "disabled by SW switch\n");
5845 else
5846 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5847 "Kill switch must be turned off for "
5848 "wireless networking to work.\n");
5849 }
ad97edd2
MA		 5850 iwl_rfkill_set_hw_state(priv);
5851
b481de9c
ZY		 5852 mutex_unlock(&priv->mutex);
5853}
5854
5855#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5856
bb8c093b 5857static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5858{
c79dd5b5
TW		 5859 struct iwl_priv *priv =
5860 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY		 5861
5862 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5863 return;
5864
5865 mutex_lock(&priv->mutex);
5866 if (test_bit(STATUS_SCANNING, &priv->status) ||
5867 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5868 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5869 "Scan completion watchdog resetting adapter (%dms)\n",
5870 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 5871
b481de9c 5872 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 5873 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 5874 }
5875 mutex_unlock(&priv->mutex);
5876}
5877
bb8c093b 5878static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 5879{
c79dd5b5
TW		 5880 struct iwl_priv *priv =
5881 container_of(data, struct iwl_priv, request_scan);
857485c0 5882 struct iwl_host_cmd cmd = {
b481de9c 5883 .id = REPLY_SCAN_CMD,
bb8c093b 5884 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 5885 .meta.flags = CMD_SIZE_HUGE,
5886 };
bb8c093b 5887 struct iwl4965_scan_cmd *scan;
b481de9c 5888 struct ieee80211_conf *conf = NULL;
78330fdd 5889 u16 cmd_len;
8318d78a 5890 enum ieee80211_band band;
78330fdd 5891 u8 direct_mask;
857485c0 5892 int ret = 0;
b481de9c
ZY		 5893
5894 conf = ieee80211_get_hw_conf(priv->hw);
5895
5896 mutex_lock(&priv->mutex);
5897
fee1247a 5898 if (!iwl_is_ready(priv)) {
b481de9c
ZY		 5899 IWL_WARNING("request scan called when driver not ready.\n");
5900 goto done;
5901 }
5902
5903 /* Make sure the scan wasn't cancelled before this queued work
5904 * was given the chance to run... */
5905 if (!test_bit(STATUS_SCANNING, &priv->status))
5906 goto done;
5907
5908 /* This should never be called or scheduled if there is currently
5909 * a scan active in the hardware. */
5910 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5911 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5912 "Ignoring second request.\n");
857485c0 5913 ret = -EIO;
b481de9c
ZY		 5914 goto done;
5915 }
5916
5917 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5918 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5919 goto done;
5920 }
5921
5922 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5923 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5924 goto done;
5925 }
5926
fee1247a 5927 if (iwl_is_rfkill(priv)) {
b481de9c
ZY		 5928 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5929 goto done;
5930 }
5931
5932 if (!test_bit(STATUS_READY, &priv->status)) {
5933 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5934 goto done;
5935 }
5936
5937 if (!priv->scan_bands) {
5938 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5939 goto done;
5940 }
5941
5942 if (!priv->scan) {
bb8c093b 5943 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 5944 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5945 if (!priv->scan) {
857485c0 5946 ret = -ENOMEM;
b481de9c
ZY		 5947 goto done;
5948 }
5949 }
5950 scan = priv->scan;
bb8c093b 5951 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 5952
5953 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5954 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5955
3109ece1 5956 if (iwl_is_associated(priv)) {
b481de9c
ZY		 5957 u16 interval = 0;
5958 u32 extra;
5959 u32 suspend_time = 100;
5960 u32 scan_suspend_time = 100;
5961 unsigned long flags;
5962
5963 IWL_DEBUG_INFO("Scanning while associated...\n");
5964
5965 spin_lock_irqsave(&priv->lock, flags);
5966 interval = priv->beacon_int;
5967 spin_unlock_irqrestore(&priv->lock, flags);
5968
5969 scan->suspend_time = 0;
052c4b9f 5970 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 5971 if (!interval)
5972 interval = suspend_time;
5973
5974 extra = (suspend_time / interval) << 22;
5975 scan_suspend_time = (extra |
5976 ((suspend_time % interval) * 1024));
5977 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5978 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5979 scan_suspend_time, interval);
5980 }
5981
5982 /* We should add the ability for user to lock to PASSIVE ONLY */
5983 if (priv->one_direct_scan) {
5984 IWL_DEBUG_SCAN
5985 ("Kicking off one direct scan for '%s'\n",
bb8c093b 5986 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 5987 priv->direct_ssid_len));
5988 scan->direct_scan[0].id = WLAN_EID_SSID;
5989 scan->direct_scan[0].len = priv->direct_ssid_len;
5990 memcpy(scan->direct_scan[0].ssid,
5991 priv->direct_ssid, priv->direct_ssid_len);
5992 direct_mask = 1;
3109ece1 5993 } else if (!iwl_is_associated(priv) && priv->essid_len) {
b481de9c
ZY		 5994 scan->direct_scan[0].id = WLAN_EID_SSID;
5995 scan->direct_scan[0].len = priv->essid_len;
5996 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
5997 direct_mask = 1;
857485c0 5998 } else {
b481de9c 5999 direct_mask = 0;
857485c0 6000 }
b481de9c 6001
b481de9c
ZY		 6002 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6003 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6004 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6005
b481de9c
ZY		 6006
6007 switch (priv->scan_bands) {
6008 case 2:
6009 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6010 scan->tx_cmd.rate_n_flags =
bb8c093b 6011 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 6012 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6013
6014 scan->good_CRC_th = 0;
8318d78a 6015 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 6016 break;
6017
6018 case 1:
6019 scan->tx_cmd.rate_n_flags =
bb8c093b 6020 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 6021 RATE_MCS_ANT_B_MSK);
6022 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 6023 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 6024 break;
6025
6026 default:
6027 IWL_WARNING("Invalid scan band count\n");
6028 goto done;
6029 }
6030
78330fdd
TW		 6031 /* We don't build a direct scan probe request; the uCode will do
6032 * that based on the direct_mask added to each channel entry */
6033 cmd_len = iwl4965_fill_probe_req(priv, band,
6034 (struct ieee80211_mgmt *)scan->data,
6035 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
6036
6037 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 6038 /* select Rx chains */
6039
6040 /* Force use of chains B and C (0x6) for scan Rx.
6041 * Avoid A (0x1) because of its off-channel reception on A-band.
6042 * MIMO is not used here, but value is required to make uCode happy. */
6043 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
6044 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
6045 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
6046 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
6047
6048 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6049 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6050
26c0f03f 6051 if (direct_mask) {
b481de9c
ZY		 6052 IWL_DEBUG_SCAN
6053 ("Initiating direct scan for %s.\n",
bb8c093b 6054 iwl4965_escape_essid(priv->essid, priv->essid_len));
26c0f03f
RC		 6055 scan->channel_count =
6056 iwl4965_get_channels_for_scan(
6057 priv, band, 1, /* active */
6058 direct_mask,
6059 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6060 } else {
b481de9c 6061 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
26c0f03f
RC		 6062 scan->channel_count =
6063 iwl4965_get_channels_for_scan(
6064 priv, band, 0, /* passive */
6065 direct_mask,
6066 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6067 }
b481de9c
ZY		 6068
6069 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 6070 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 6071 cmd.data = scan;
6072 scan->len = cpu_to_le16(cmd.len);
6073
6074 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW		 6075 ret = iwl_send_cmd_sync(priv, &cmd);
6076 if (ret)
b481de9c
ZY		 6077 goto done;
6078
6079 queue_delayed_work(priv->workqueue, &priv->scan_check,
6080 IWL_SCAN_CHECK_WATCHDOG);
6081
6082 mutex_unlock(&priv->mutex);
6083 return;
6084
6085 done:
01ebd063 6086 /* inform mac80211 scan aborted */
b481de9c
ZY		 6087 queue_work(priv->workqueue, &priv->scan_completed);
6088 mutex_unlock(&priv->mutex);
6089}
6090
bb8c093b 6091static void iwl4965_bg_up(struct work_struct *data)
b481de9c 6092{
c79dd5b5 6093 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 6094
6095 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6096 return;
6097
6098 mutex_lock(&priv->mutex);
bb8c093b 6099 __iwl4965_up(priv);
b481de9c
ZY		 6100 mutex_unlock(&priv->mutex);
6101}
6102
bb8c093b 6103static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 6104{
c79dd5b5 6105 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 6106
6107 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6108 return;
6109
bb8c093b 6110 iwl4965_down(priv);
b481de9c
ZY		 6111 queue_work(priv->workqueue, &priv->up);
6112}
6113
bb8c093b 6114static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 6115{
c79dd5b5
TW		 6116 struct iwl_priv *priv =
6117 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 6118
6119 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6120 return;
6121
6122 mutex_lock(&priv->mutex);
bb8c093b 6123 iwl4965_rx_replenish(priv);
b481de9c
ZY		 6124 mutex_unlock(&priv->mutex);
6125}
6126
7878a5a4
MA		 6127#define IWL_DELAY_NEXT_SCAN (HZ*2)
6128
bb8c093b 6129static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 6130{
c79dd5b5 6131 struct iwl_priv *priv = container_of(data, struct iwl_priv,
b481de9c 6132 post_associate.work);
b481de9c 6133 struct ieee80211_conf *conf = NULL;
857485c0 6134 int ret = 0;
0795af57 6135 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6136
6137 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6138 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6139 return;
6140 }
6141
0795af57
JP		 6142 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6143 priv->assoc_id,
6144 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 6145
6146
6147 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6148 return;
6149
6150 mutex_lock(&priv->mutex);
6151
32bfd35d 6152 if (!priv->vif || !priv->is_open) {
948c171c
MA		 6153 mutex_unlock(&priv->mutex);
6154 return;
6155 }
bb8c093b 6156 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 6157
b481de9c
ZY		 6158 conf = ieee80211_get_hw_conf(priv->hw);
6159
6160 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6161 iwl4965_commit_rxon(priv);
b481de9c 6162
bb8c093b
CH		 6163 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6164 iwl4965_setup_rxon_timing(priv);
857485c0 6165 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6166 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6167 if (ret)
b481de9c
ZY		 6168 IWL_WARNING("REPLY_RXON_TIMING failed - "
6169 "Attempting to continue.\n");
6170
6171 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6172
c8b0e6e1 6173#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 6174 if (priv->current_ht_config.is_ht)
6175 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 6176#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY		 6177 iwl4965_set_rxon_chain(priv);
6178 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6179
6180 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6181 priv->assoc_id, priv->beacon_int);
6182
6183 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6184 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6185 else
6186 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6187
6188 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6189 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6190 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6191 else
6192 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6193
6194 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6195 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6196
6197 }
6198
bb8c093b 6199 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6200
6201 switch (priv->iw_mode) {
6202 case IEEE80211_IF_TYPE_STA:
bb8c093b 6203 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 6204 break;
6205
6206 case IEEE80211_IF_TYPE_IBSS:
6207
6208 /* clear out the station table */
bf85ea4f 6209 iwlcore_clear_stations_table(priv);
b481de9c 6210
bb8c093b
CH		 6211 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
6212 iwl4965_rxon_add_station(priv, priv->bssid, 0);
6213 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
6214 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 6215
6216 break;
6217
6218 default:
6219 IWL_ERROR("%s Should not be called in %d mode\n",
6220 __FUNCTION__, priv->iw_mode);
6221 break;
6222 }
6223
bb8c093b 6224 iwl4965_sequence_reset(priv);
b481de9c 6225
c8b0e6e1 6226#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 6227 /* Enable Rx differential gain and sensitivity calibrations */
6228 iwl4965_chain_noise_reset(priv);
6229 priv->start_calib = 1;
c8b0e6e1 6230#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 6231
6232 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6233 priv->assoc_station_added = 1;
6234
bb8c093b 6235 iwl4965_activate_qos(priv, 0);
292ae174 6236
7878a5a4
MA		 6237 /* we have just associated, don't start scan too early */
6238 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
b481de9c
ZY		 6239 mutex_unlock(&priv->mutex);
6240}
6241
bb8c093b 6242static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 6243{
c79dd5b5 6244 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 6245
fee1247a 6246 if (!iwl_is_ready(priv))
b481de9c
ZY		 6247 return;
6248
6249 mutex_lock(&priv->mutex);
6250
6251 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 6252 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6253
6254 mutex_unlock(&priv->mutex);
6255}
6256
76bb77e0
ZY		 6257static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6258
bb8c093b 6259static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 6260{
c79dd5b5
TW		 6261 struct iwl_priv *priv =
6262 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY		 6263
6264 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6265
6266 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6267 return;
6268
a0646470
ZY		 6269 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6270 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 6271
b481de9c
ZY		 6272 ieee80211_scan_completed(priv->hw);
6273
6274 /* Since setting the TXPOWER may have been deferred while
6275 * performing the scan, fire one off */
6276 mutex_lock(&priv->mutex);
bb8c093b 6277 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 6278 mutex_unlock(&priv->mutex);
6279}
6280
6281/*****************************************************************************
6282 *
6283 * mac80211 entry point functions
6284 *
6285 *****************************************************************************/
6286
5a66926a
ZY		 6287#define UCODE_READY_TIMEOUT (2 * HZ)
6288
bb8c093b 6289static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 6290{
c79dd5b5 6291 struct iwl_priv *priv = hw->priv;
5a66926a 6292 int ret;
b481de9c
ZY		 6293
6294 IWL_DEBUG_MAC80211("enter\n");
6295
5a66926a
ZY		 6296 if (pci_enable_device(priv->pci_dev)) {
6297 IWL_ERROR("Fail to pci_enable_device\n");
6298 return -ENODEV;
6299 }
6300 pci_restore_state(priv->pci_dev);
6301 pci_enable_msi(priv->pci_dev);
6302
6303 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
6304 DRV_NAME, priv);
6305 if (ret) {
6306 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6307 goto out_disable_msi;
6308 }
6309
b481de9c
ZY		 6310 /* we should be verifying the device is ready to be opened */
6311 mutex_lock(&priv->mutex);
6312
5a66926a
ZY		 6313 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
6314 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6315 * ucode filename and max sizes are card-specific. */
b481de9c 6316
5a66926a
ZY		 6317 if (!priv->ucode_code.len) {
6318 ret = iwl4965_read_ucode(priv);
6319 if (ret) {
6320 IWL_ERROR("Could not read microcode: %d\n", ret);
6321 mutex_unlock(&priv->mutex);
6322 goto out_release_irq;
6323 }
6324 }
b481de9c 6325
e655b9f0 6326 ret = __iwl4965_up(priv);
5a66926a 6327
b481de9c 6328 mutex_unlock(&priv->mutex);
5a66926a 6329
e655b9f0
ZY		 6330 if (ret)
6331 goto out_release_irq;
6332
6333 IWL_DEBUG_INFO("Start UP work done.\n");
6334
6335 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6336 return 0;
6337
5a66926a
ZY		 6338 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6339 * mac80211 will not be run successfully. */
6340 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6341 test_bit(STATUS_READY, &priv->status),
6342 UCODE_READY_TIMEOUT);
6343 if (!ret) {
6344 if (!test_bit(STATUS_READY, &priv->status)) {
6345 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6346 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6347 ret = -ETIMEDOUT;
6348 goto out_release_irq;
6349 }
6350 }
6351
e655b9f0 6352 priv->is_open = 1;
b481de9c
ZY		 6353 IWL_DEBUG_MAC80211("leave\n");
6354 return 0;
5a66926a
ZY		 6355
6356out_release_irq:
6357 free_irq(priv->pci_dev->irq, priv);
6358out_disable_msi:
6359 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 6360 pci_disable_device(priv->pci_dev);
6361 priv->is_open = 0;
6362 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 6363 return ret;
b481de9c
ZY		 6364}
6365
bb8c093b 6366static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 6367{
c79dd5b5 6368 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6369
6370 IWL_DEBUG_MAC80211("enter\n");
948c171c 6371
e655b9f0
ZY		 6372 if (!priv->is_open) {
6373 IWL_DEBUG_MAC80211("leave - skip\n");
6374 return;
6375 }
6376
b481de9c 6377 priv->is_open = 0;
5a66926a 6378
fee1247a 6379 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 6380 /* stop mac, cancel any scan request and clear
6381 * RXON_FILTER_ASSOC_MSK BIT
6382 */
5a66926a
ZY		 6383 mutex_lock(&priv->mutex);
6384 iwl4965_scan_cancel_timeout(priv, 100);
6385 cancel_delayed_work(&priv->post_associate);
fde3571f 6386 mutex_unlock(&priv->mutex);
fde3571f
MA		 6387 }
6388
5a66926a
ZY		 6389 iwl4965_down(priv);
6390
6391 flush_workqueue(priv->workqueue);
6392 free_irq(priv->pci_dev->irq, priv);
6393 pci_disable_msi(priv->pci_dev);
6394 pci_save_state(priv->pci_dev);
6395 pci_disable_device(priv->pci_dev);
948c171c 6396
b481de9c 6397 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 6398}
6399
bb8c093b 6400static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 6401 struct ieee80211_tx_control *ctl)
6402{
c79dd5b5 6403 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6404
6405 IWL_DEBUG_MAC80211("enter\n");
6406
6407 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6408 IWL_DEBUG_MAC80211("leave - monitor\n");
6409 return -1;
6410 }
6411
6412 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 6413 ctl->tx_rate->bitrate);
b481de9c 6414
bb8c093b 6415 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 6416 dev_kfree_skb_any(skb);
6417
6418 IWL_DEBUG_MAC80211("leave\n");
6419 return 0;
6420}
6421
bb8c093b 6422static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 6423 struct ieee80211_if_init_conf *conf)
6424{
c79dd5b5 6425 struct iwl_priv *priv = hw->priv;
b481de9c 6426 unsigned long flags;
0795af57 6427 DECLARE_MAC_BUF(mac);
b481de9c 6428
32bfd35d 6429 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 6430
32bfd35d
JB		 6431 if (priv->vif) {
6432 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 6433 return -EOPNOTSUPP;
b481de9c
ZY		 6434 }
6435
6436 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 6437 priv->vif = conf->vif;
b481de9c
ZY		 6438
6439 spin_unlock_irqrestore(&priv->lock, flags);
6440
6441 mutex_lock(&priv->mutex);
864792e3
TW		 6442
6443 if (conf->mac_addr) {
6444 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
6445 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6446 }
b481de9c 6447
fee1247a 6448 if (iwl_is_ready(priv))
5a66926a
ZY		 6449 iwl4965_set_mode(priv, conf->type);
6450
b481de9c
ZY		 6451 mutex_unlock(&priv->mutex);
6452
5a66926a 6453 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 6454 return 0;
6455}
6456
6457/**
bb8c093b 6458 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 6459 *
6460 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6461 * be set inappropriately and the driver currently sets the hardware up to
6462 * use it whenever needed.
6463 */
bb8c093b 6464static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 6465{
c79dd5b5 6466 struct iwl_priv *priv = hw->priv;
bf85ea4f 6467 const struct iwl_channel_info *ch_info;
b481de9c 6468 unsigned long flags;
76bb77e0 6469 int ret = 0;
b481de9c
ZY		 6470
6471 mutex_lock(&priv->mutex);
8318d78a 6472 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 6473
12342c47
ZY		 6474 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6475
fee1247a 6476 if (!iwl_is_ready(priv)) {
b481de9c 6477 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 6478 ret = -EIO;
6479 goto out;
b481de9c
ZY		 6480 }
6481
1ea87396 6482 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 6483 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 6484 IWL_DEBUG_MAC80211("leave - scanning\n");
6485 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 6486 mutex_unlock(&priv->mutex);
a0646470 6487 return 0;
b481de9c
ZY		 6488 }
6489
6490 spin_lock_irqsave(&priv->lock, flags);
6491
8622e705 6492 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 6493 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6494 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 6495 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6496 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 6497 ret = -EINVAL;
6498 goto out;
b481de9c
ZY		 6499 }
6500
c8b0e6e1 6501#ifdef CONFIG_IWL4965_HT
78330fdd 6502 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 6503 * from any ht related info since 2.4 does not
6504 * support ht */
78330fdd 6505 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 6506#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6507 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
6508#endif
6509 )
6510 priv->staging_rxon.flags = 0;
c8b0e6e1 6511#endif /* CONFIG_IWL4965_HT */
b481de9c 6512
bf85ea4f 6513 iwlcore_set_rxon_channel(priv, conf->channel->band,
8318d78a 6514 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6515
8318d78a 6516 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 6517
6518 /* The list of supported rates and rate mask can be different
8318d78a 6519 * for each band; since the band may have changed, reset
b481de9c 6520 * the rate mask to what mac80211 lists */
bb8c093b 6521 iwl4965_set_rate(priv);
b481de9c
ZY		 6522
6523 spin_unlock_irqrestore(&priv->lock, flags);
6524
6525#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6526 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 6527 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 6528 goto out;
b481de9c
ZY		 6529 }
6530#endif
6531
ad97edd2
MA		 6532 if (priv->cfg->ops->lib->radio_kill_sw)
6533 priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 6534
6535 if (!conf->radio_enabled) {
6536 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 6537 goto out;
b481de9c
ZY		 6538 }
6539
fee1247a 6540 if (iwl_is_rfkill(priv)) {
b481de9c 6541 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 6542 ret = -EIO;
6543 goto out;
b481de9c
ZY		 6544 }
6545
bb8c093b 6546 iwl4965_set_rate(priv);
b481de9c
ZY		 6547
6548 if (memcmp(&priv->active_rxon,
6549 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 6550 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6551 else
6552 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6553
6554 IWL_DEBUG_MAC80211("leave\n");
6555
a0646470
ZY		 6556out:
6557 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 6558 mutex_unlock(&priv->mutex);
76bb77e0 6559 return ret;
b481de9c
ZY		 6560}
6561
c79dd5b5 6562static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 6563{
857485c0 6564 int ret = 0;
b481de9c 6565
d986bcd1 6566 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 6567 return;
6568
6569 /* The following should be done only at AP bring up */
6570 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6571
6572 /* RXON - unassoc (to set timing command) */
6573 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6574 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6575
6576 /* RXON Timing */
bb8c093b
CH		 6577 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6578 iwl4965_setup_rxon_timing(priv);
857485c0 6579 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6580 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6581 if (ret)
b481de9c
ZY		 6582 IWL_WARNING("REPLY_RXON_TIMING failed - "
6583 "Attempting to continue.\n");
6584
6585 iwl4965_set_rxon_chain(priv);
6586
6587 /* FIXME: what should be the assoc_id for AP? */
6588 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6589 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6590 priv->staging_rxon.flags |=
6591 RXON_FLG_SHORT_PREAMBLE_MSK;
6592 else
6593 priv->staging_rxon.flags &=
6594 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6595
6596 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6597 if (priv->assoc_capability &
6598 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6599 priv->staging_rxon.flags |=
6600 RXON_FLG_SHORT_SLOT_MSK;
6601 else
6602 priv->staging_rxon.flags &=
6603 ~RXON_FLG_SHORT_SLOT_MSK;
6604
6605 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6606 priv->staging_rxon.flags &=
6607 ~RXON_FLG_SHORT_SLOT_MSK;
6608 }
6609 /* restore RXON assoc */
6610 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 6611 iwl4965_commit_rxon(priv);
bb8c093b 6612 iwl4965_activate_qos(priv, 1);
bb8c093b 6613 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 6614 }
bb8c093b 6615 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 6616
6617 /* FIXME - we need to add code here to detect a totally new
6618 * configuration, reset the AP, unassoc, rxon timing, assoc,
6619 * clear sta table, add BCAST sta... */
6620}
6621
32bfd35d
JB		 6622static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
6623 struct ieee80211_vif *vif,
b481de9c
ZY		 6624 struct ieee80211_if_conf *conf)
6625{
c79dd5b5 6626 struct iwl_priv *priv = hw->priv;
0795af57 6627 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6628 unsigned long flags;
6629 int rc;
6630
6631 if (conf == NULL)
6632 return -EIO;
6633
b716bb91
EG		 6634 if (priv->vif != vif) {
6635 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6636 mutex_unlock(&priv->mutex);
6637 return 0;
6638 }
6639
b481de9c
ZY		 6640 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6641 (!conf->beacon || !conf->ssid_len)) {
6642 IWL_DEBUG_MAC80211
6643 ("Leaving in AP mode because HostAPD is not ready.\n");
6644 return 0;
6645 }
6646
fee1247a 6647 if (!iwl_is_alive(priv))
5a66926a
ZY		 6648 return -EAGAIN;
6649
b481de9c
ZY		 6650 mutex_lock(&priv->mutex);
6651
b481de9c 6652 if (conf->bssid)
0795af57
JP		 6653 IWL_DEBUG_MAC80211("bssid: %s\n",
6654 print_mac(mac, conf->bssid));
b481de9c 6655
4150c572
JB		 6656/*
6657 * very dubious code was here; the probe filtering flag is never set:
6658 *
b481de9c
ZY		 6659 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6660 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 6661 */
b481de9c
ZY		 6662
6663 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6664 if (!conf->bssid) {
6665 conf->bssid = priv->mac_addr;
6666 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 6667 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6668 print_mac(mac, conf->bssid));
b481de9c
ZY		 6669 }
6670 if (priv->ibss_beacon)
6671 dev_kfree_skb(priv->ibss_beacon);
6672
6673 priv->ibss_beacon = conf->beacon;
6674 }
6675
fee1247a 6676 if (iwl_is_rfkill(priv))
fde3571f
MA		 6677 goto done;
6678
b481de9c
ZY		 6679 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6680 !is_multicast_ether_addr(conf->bssid)) {
6681 /* If there is currently a HW scan going on in the background
6682 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6683 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 6684 IWL_WARNING("Aborted scan still in progress "
6685 "after 100ms\n");
6686 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6687 mutex_unlock(&priv->mutex);
6688 return -EAGAIN;
6689 }
6690 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6691
6692 /* TODO: Audit driver for usage of these members and see
6693 * if mac80211 deprecates them (priv->bssid looks like it
6694 * shouldn't be there, but I haven't scanned the IBSS code
6695 * to verify) - jpk */
6696 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6697
6698 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6699 iwl4965_config_ap(priv);
b481de9c 6700 else {
bb8c093b 6701 rc = iwl4965_commit_rxon(priv);
b481de9c 6702 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6703 iwl4965_rxon_add_station(
b481de9c
ZY		 6704 priv, priv->active_rxon.bssid_addr, 1);
6705 }
6706
6707 } else {
bb8c093b 6708 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6709 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6710 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6711 }
6712
fde3571f 6713 done:
b481de9c
ZY		 6714 spin_lock_irqsave(&priv->lock, flags);
6715 if (!conf->ssid_len)
6716 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6717 else
6718 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6719
6720 priv->essid_len = conf->ssid_len;
6721 spin_unlock_irqrestore(&priv->lock, flags);
6722
6723 IWL_DEBUG_MAC80211("leave\n");
6724 mutex_unlock(&priv->mutex);
6725
6726 return 0;
6727}
6728
bb8c093b 6729static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 6730 unsigned int changed_flags,
6731 unsigned int *total_flags,
6732 int mc_count, struct dev_addr_list *mc_list)
6733{
6734 /*
6735 * XXX: dummy
bb8c093b 6736 * see also iwl4965_connection_init_rx_config
4150c572
JB		 6737 */
6738 *total_flags = 0;
6739}
6740
bb8c093b 6741static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 6742 struct ieee80211_if_init_conf *conf)
6743{
c79dd5b5 6744 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6745
6746 IWL_DEBUG_MAC80211("enter\n");
6747
6748 mutex_lock(&priv->mutex);
948c171c 6749
fee1247a 6750 if (iwl_is_ready_rf(priv)) {
fde3571f
MA		 6751 iwl4965_scan_cancel_timeout(priv, 100);
6752 cancel_delayed_work(&priv->post_associate);
6753 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6754 iwl4965_commit_rxon(priv);
6755 }
32bfd35d
JB		 6756 if (priv->vif == conf->vif) {
6757 priv->vif = NULL;
b481de9c
ZY		 6758 memset(priv->bssid, 0, ETH_ALEN);
6759 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6760 priv->essid_len = 0;
6761 }
6762 mutex_unlock(&priv->mutex);
6763
6764 IWL_DEBUG_MAC80211("leave\n");
6765
6766}
471b3efd 6767
98952d5d
TW		 6768
6769#ifdef CONFIG_IWL4965_HT
6770static void iwl4965_ht_conf(struct iwl_priv *priv,
6771 struct ieee80211_bss_conf *bss_conf)
6772{
6773 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
6774 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
6775 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
6776
6777 IWL_DEBUG_MAC80211("enter: \n");
6778
6779 iwl_conf->is_ht = bss_conf->assoc_ht;
6780
6781 if (!iwl_conf->is_ht)
6782 return;
6783
6784 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
6785
6786 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
6787 iwl_conf->sgf |= 0x1;
6788 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
6789 iwl_conf->sgf |= 0x2;
6790
6791 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
6792 iwl_conf->max_amsdu_size =
6793 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
6794
6795 iwl_conf->supported_chan_width =
6796 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
6797 iwl_conf->extension_chan_offset =
6798 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
6799 /* If no above or below channel supplied disable FAT channel */
6800 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
6801 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
6802 iwl_conf->supported_chan_width = 0;
6803
6804 iwl_conf->tx_mimo_ps_mode =
6805 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
6806 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
6807
6808 iwl_conf->control_channel = ht_bss_conf->primary_channel;
6809 iwl_conf->tx_chan_width =
6810 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
6811 iwl_conf->ht_protection =
6812 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
6813 iwl_conf->non_GF_STA_present =
6814 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
6815
6816 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
6817 IWL_DEBUG_MAC80211("leave\n");
6818}
6819#else
6820static inline void iwl4965_ht_conf(struct iwl_priv *priv,
6821 struct ieee80211_bss_conf *bss_conf)
6822{
6823}
6824#endif
6825
3109ece1 6826#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB		 6827static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6828 struct ieee80211_vif *vif,
6829 struct ieee80211_bss_conf *bss_conf,
6830 u32 changes)
220173b0 6831{
c79dd5b5 6832 struct iwl_priv *priv = hw->priv;
220173b0 6833
3109ece1
TW		 6834 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6835
471b3efd 6836 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW		 6837 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6838 bss_conf->use_short_preamble);
471b3efd 6839 if (bss_conf->use_short_preamble)
220173b0
TW		 6840 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6841 else
6842 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6843 }
6844
471b3efd 6845 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 6846 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 6847 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 6848 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6849 else
6850 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6851 }
6852
98952d5d 6853 if (changes & BSS_CHANGED_HT) {
3109ece1 6854 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d
TW		 6855 iwl4965_ht_conf(priv, bss_conf);
6856 iwl4965_set_rxon_chain(priv);
6857 }
6858
471b3efd 6859 if (changes & BSS_CHANGED_ASSOC) {
3109ece1
TW		 6860 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6861 if (bss_conf->assoc) {
6862 priv->assoc_id = bss_conf->aid;
6863 priv->beacon_int = bss_conf->beacon_int;
6864 priv->timestamp = bss_conf->timestamp;
6865 priv->assoc_capability = bss_conf->assoc_capability;
6866 priv->next_scan_jiffies = jiffies +
6867 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6868 queue_work(priv->workqueue, &priv->post_associate.work);
6869 } else {
6870 priv->assoc_id = 0;
6871 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6872 }
6873 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
6874 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6875 iwl4965_send_rxon_assoc(priv);
471b3efd
JB		 6876 }
6877
220173b0 6878}
b481de9c 6879
bb8c093b 6880static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 6881{
6882 int rc = 0;
6883 unsigned long flags;
c79dd5b5 6884 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6885
6886 IWL_DEBUG_MAC80211("enter\n");
6887
052c4b9f 6888 mutex_lock(&priv->mutex);
b481de9c
ZY		 6889 spin_lock_irqsave(&priv->lock, flags);
6890
fee1247a 6891 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6892 rc = -EIO;
6893 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6894 goto out_unlock;
6895 }
6896
6897 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6898 rc = -EIO;
6899 IWL_ERROR("ERROR: APs don't scan\n");
6900 goto out_unlock;
6901 }
6902
7878a5a4
MA		 6903 /* we don't schedule scan within next_scan_jiffies period */
6904 if (priv->next_scan_jiffies &&
6905 time_after(priv->next_scan_jiffies, jiffies)) {
6906 rc = -EAGAIN;
6907 goto out_unlock;
6908 }
b481de9c 6909 /* if we just finished scan ask for delay */
7878a5a4
MA		 6910 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6911 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 6912 rc = -EAGAIN;
6913 goto out_unlock;
6914 }
6915 if (len) {
7878a5a4 6916 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6917 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 6918
6919 priv->one_direct_scan = 1;
6920 priv->direct_ssid_len = (u8)
6921 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6922 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 6923 } else
6924 priv->one_direct_scan = 0;
b481de9c 6925
bb8c093b 6926 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 6927
6928 IWL_DEBUG_MAC80211("leave\n");
6929
6930out_unlock:
6931 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6932 mutex_unlock(&priv->mutex);
b481de9c
ZY		 6933
6934 return rc;
6935}
6936
ab885f8c
EG		 6937static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6938 struct ieee80211_key_conf *keyconf, const u8 *addr,
6939 u32 iv32, u16 *phase1key)
6940{
6941 struct iwl_priv *priv = hw->priv;
6942 u8 sta_id = IWL_INVALID_STATION;
6943 unsigned long flags;
6944 __le16 key_flags = 0;
6945 int i;
6946 DECLARE_MAC_BUF(mac);
6947
6948 IWL_DEBUG_MAC80211("enter\n");
6949
6950 sta_id = iwl4965_hw_find_station(priv, addr);
6951 if (sta_id == IWL_INVALID_STATION) {
6952 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6953 print_mac(mac, addr));
6954 return;
6955 }
6956
6957 iwl4965_scan_cancel_timeout(priv, 100);
6958
6959 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
6960 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
6961 key_flags &= ~STA_KEY_FLG_INVALID;
6962
6963 if (sta_id == priv->hw_setting.bcast_sta_id)
6964 key_flags |= STA_KEY_MULTICAST_MSK;
6965
6966 spin_lock_irqsave(&priv->sta_lock, flags);
6967
6968 priv->stations[sta_id].sta.key.key_offset =
6969 (sta_id % STA_KEY_MAX_NUM);/* FIXME */
6970 priv->stations[sta_id].sta.key.key_flags = key_flags;
6971 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
6972
6973 for (i = 0; i < 5; i++)
6974 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
6975 cpu_to_le16(phase1key[i]);
6976
6977 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
6978 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
6979
6980 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6981
6982 spin_unlock_irqrestore(&priv->sta_lock, flags);
6983
6984 IWL_DEBUG_MAC80211("leave\n");
6985}
6986
bb8c093b 6987static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 6988 const u8 *local_addr, const u8 *addr,
6989 struct ieee80211_key_conf *key)
6990{
c79dd5b5 6991 struct iwl_priv *priv = hw->priv;
0795af57 6992 DECLARE_MAC_BUF(mac);
deb09c43
EG		 6993 int ret = 0;
6994 u8 sta_id = IWL_INVALID_STATION;
6974e363 6995 u8 is_default_wep_key = 0;
b481de9c
ZY		 6996
6997 IWL_DEBUG_MAC80211("enter\n");
6998
1ea87396 6999 if (!priv->cfg->mod_params->hw_crypto) {
b481de9c
ZY		 7000 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7001 return -EOPNOTSUPP;
7002 }
7003
7004 if (is_zero_ether_addr(addr))
7005 /* only support pairwise keys */
7006 return -EOPNOTSUPP;
7007
6974e363
EG		 7008 sta_id = iwl4965_hw_find_station(priv, addr);
7009 if (sta_id == IWL_INVALID_STATION) {
7010 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7011 print_mac(mac, addr));
7012 return -EINVAL;
b481de9c 7013
deb09c43 7014 }
b481de9c 7015
6974e363 7016 mutex_lock(&priv->mutex);
bb8c093b 7017 iwl4965_scan_cancel_timeout(priv, 100);
6974e363
EG		 7018 mutex_unlock(&priv->mutex);
7019
7020 /* If we are getting WEP group key and we didn't receive any key mapping
7021 * so far, we are in legacy wep mode (group key only), otherwise we are
7022 * in 1X mode.
7023 * In legacy wep mode, we use another host command to the uCode */
7024 if (key->alg == ALG_WEP && sta_id == priv->hw_setting.bcast_sta_id &&
7025 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7026 if (cmd == SET_KEY)
7027 is_default_wep_key = !priv->key_mapping_key;
7028 else
7029 is_default_wep_key = priv->default_wep_key;
7030 }
052c4b9f 7031
b481de9c 7032 switch (cmd) {
deb09c43 7033 case SET_KEY:
6974e363
EG		 7034 if (is_default_wep_key)
7035 ret = iwl_set_default_wep_key(priv, key);
deb09c43
EG		 7036 else
7037 ret = iwl4965_set_dynamic_key(priv, key, sta_id);
7038
7039 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 7040 break;
7041 case DISABLE_KEY:
6974e363
EG		 7042 if (is_default_wep_key)
7043 ret = iwl_remove_default_wep_key(priv, key);
deb09c43
EG		 7044 else
7045 ret = iwl4965_clear_sta_key_info(priv, sta_id);
7046
7047 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 7048 break;
7049 default:
deb09c43 7050 ret = -EINVAL;
b481de9c
ZY		 7051 }
7052
7053 IWL_DEBUG_MAC80211("leave\n");
b481de9c 7054
deb09c43 7055 return ret;
b481de9c
ZY		 7056}
7057
bb8c093b 7058static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 7059 const struct ieee80211_tx_queue_params *params)
7060{
c79dd5b5 7061 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7062 unsigned long flags;
7063 int q;
b481de9c
ZY		 7064
7065 IWL_DEBUG_MAC80211("enter\n");
7066
fee1247a 7067 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 7068 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7069 return -EIO;
7070 }
7071
7072 if (queue >= AC_NUM) {
7073 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7074 return 0;
7075 }
7076
b481de9c
ZY		 7077 if (!priv->qos_data.qos_enable) {
7078 priv->qos_data.qos_active = 0;
7079 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7080 return 0;
7081 }
7082 q = AC_NUM - 1 - queue;
7083
7084 spin_lock_irqsave(&priv->lock, flags);
7085
7086 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7087 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7088 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7089 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 7090 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 7091
7092 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7093 priv->qos_data.qos_active = 1;
7094
7095 spin_unlock_irqrestore(&priv->lock, flags);
7096
7097 mutex_lock(&priv->mutex);
7098 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 7099 iwl4965_activate_qos(priv, 1);
3109ece1 7100 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 7101 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 7102
7103 mutex_unlock(&priv->mutex);
7104
b481de9c
ZY		 7105 IWL_DEBUG_MAC80211("leave\n");
7106 return 0;
7107}
7108
bb8c093b 7109static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7110 struct ieee80211_tx_queue_stats *stats)
7111{
c79dd5b5 7112 struct iwl_priv *priv = hw->priv;
b481de9c 7113 int i, avail;
bb8c093b
CH		 7114 struct iwl4965_tx_queue *txq;
7115 struct iwl4965_queue *q;
b481de9c
ZY		 7116 unsigned long flags;
7117
7118 IWL_DEBUG_MAC80211("enter\n");
7119
fee1247a 7120 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 7121 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7122 return -EIO;
7123 }
7124
7125 spin_lock_irqsave(&priv->lock, flags);
7126
7127 for (i = 0; i < AC_NUM; i++) {
7128 txq = &priv->txq[i];
7129 q = &txq->q;
bb8c093b 7130 avail = iwl4965_queue_space(q);
b481de9c
ZY		 7131
7132 stats->data[i].len = q->n_window - avail;
7133 stats->data[i].limit = q->n_window - q->high_mark;
7134 stats->data[i].count = q->n_window;
7135
7136 }
7137 spin_unlock_irqrestore(&priv->lock, flags);
7138
7139 IWL_DEBUG_MAC80211("leave\n");
7140
7141 return 0;
7142}
7143
bb8c093b 7144static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7145 struct ieee80211_low_level_stats *stats)
7146{
7147 IWL_DEBUG_MAC80211("enter\n");
7148 IWL_DEBUG_MAC80211("leave\n");
7149
7150 return 0;
7151}
7152
bb8c093b 7153static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 7154{
7155 IWL_DEBUG_MAC80211("enter\n");
7156 IWL_DEBUG_MAC80211("leave\n");
7157
7158 return 0;
7159}
7160
bb8c093b 7161static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 7162{
c79dd5b5 7163 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7164 unsigned long flags;
7165
7166 mutex_lock(&priv->mutex);
7167 IWL_DEBUG_MAC80211("enter\n");
7168
7169 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 7170#ifdef CONFIG_IWL4965_HT
b481de9c 7171 spin_lock_irqsave(&priv->lock, flags);
fd105e79 7172 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 7173 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 7174#endif /* CONFIG_IWL4965_HT */
b481de9c 7175
bf85ea4f 7176 iwlcore_reset_qos(priv);
b481de9c
ZY		 7177
7178 cancel_delayed_work(&priv->post_associate);
7179
7180 spin_lock_irqsave(&priv->lock, flags);
7181 priv->assoc_id = 0;
7182 priv->assoc_capability = 0;
b481de9c
ZY		 7183 priv->assoc_station_added = 0;
7184
7185 /* new association get rid of ibss beacon skb */
7186 if (priv->ibss_beacon)
7187 dev_kfree_skb(priv->ibss_beacon);
7188
7189 priv->ibss_beacon = NULL;
7190
7191 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 7192 priv->timestamp = 0;
b481de9c
ZY		 7193 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7194 priv->beacon_int = 0;
7195
7196 spin_unlock_irqrestore(&priv->lock, flags);
7197
fee1247a 7198 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA		 7199 IWL_DEBUG_MAC80211("leave - not ready\n");
7200 mutex_unlock(&priv->mutex);
7201 return;
7202 }
7203
052c4b9f 7204 /* we are restarting association process
7205 * clear RXON_FILTER_ASSOC_MSK bit
7206 */
7207 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 7208 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7209 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7210 iwl4965_commit_rxon(priv);
052c4b9f 7211 }
7212
b481de9c
ZY		 7213 /* Per mac80211.h: This is only used in IBSS mode... */
7214 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 7215
b481de9c
ZY		 7216 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7217 mutex_unlock(&priv->mutex);
7218 return;
7219 }
7220
b481de9c
ZY		 7221 priv->only_active_channel = 0;
7222
bb8c093b 7223 iwl4965_set_rate(priv);
b481de9c
ZY		 7224
7225 mutex_unlock(&priv->mutex);
7226
7227 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7228}
7229
bb8c093b 7230static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7231 struct ieee80211_tx_control *control)
7232{
c79dd5b5 7233 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7234 unsigned long flags;
7235
7236 mutex_lock(&priv->mutex);
7237 IWL_DEBUG_MAC80211("enter\n");
7238
fee1247a 7239 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 7240 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7241 mutex_unlock(&priv->mutex);
7242 return -EIO;
7243 }
7244
7245 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7246 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7247 mutex_unlock(&priv->mutex);
7248 return -EIO;
7249 }
7250
7251 spin_lock_irqsave(&priv->lock, flags);
7252
7253 if (priv->ibss_beacon)
7254 dev_kfree_skb(priv->ibss_beacon);
7255
7256 priv->ibss_beacon = skb;
7257
7258 priv->assoc_id = 0;
7259
7260 IWL_DEBUG_MAC80211("leave\n");
7261 spin_unlock_irqrestore(&priv->lock, flags);
7262
bf85ea4f 7263 iwlcore_reset_qos(priv);
b481de9c
ZY		 7264
7265 queue_work(priv->workqueue, &priv->post_associate.work);
7266
7267 mutex_unlock(&priv->mutex);
7268
7269 return 0;
7270}
7271
b481de9c
ZY		 7272/*****************************************************************************
7273 *
7274 * sysfs attributes
7275 *
7276 *****************************************************************************/
7277
0a6857e7 7278#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 7279
7280/*
7281 * The following adds a new attribute to the sysfs representation
7282 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7283 * used for controlling the debug level.
7284 *
7285 * See the level definitions in iwl for details.
7286 */
7287
7288static ssize_t show_debug_level(struct device_driver *d, char *buf)
7289{
0a6857e7 7290 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY		 7291}
7292static ssize_t store_debug_level(struct device_driver *d,
7293 const char *buf, size_t count)
7294{
7295 char *p = (char *)buf;
7296 u32 val;
7297
7298 val = simple_strtoul(p, &p, 0);
7299 if (p == buf)
7300 printk(KERN_INFO DRV_NAME
7301 ": %s is not in hex or decimal form.\n", buf);
7302 else
0a6857e7 7303 iwl_debug_level = val;
b481de9c
ZY		 7304
7305 return strnlen(buf, count);
7306}
7307
7308static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7309 show_debug_level, store_debug_level);
7310
0a6857e7 7311#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 7312
b481de9c
ZY		 7313
7314static ssize_t show_temperature(struct device *d,
7315 struct device_attribute *attr, char *buf)
7316{
c79dd5b5 7317 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 7318
fee1247a 7319 if (!iwl_is_alive(priv))
b481de9c
ZY		 7320 return -EAGAIN;
7321
bb8c093b 7322 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 7323}
7324
7325static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7326
7327static ssize_t show_rs_window(struct device *d,
7328 struct device_attribute *attr,
7329 char *buf)
7330{
c79dd5b5 7331 struct iwl_priv *priv = d->driver_data;
bb8c093b 7332 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 7333}
7334static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7335
7336static ssize_t show_tx_power(struct device *d,
7337 struct device_attribute *attr, char *buf)
7338{
c79dd5b5 7339 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7340 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7341}
7342
7343static ssize_t store_tx_power(struct device *d,
7344 struct device_attribute *attr,
7345 const char *buf, size_t count)
7346{
c79dd5b5 7347 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7348 char *p = (char *)buf;
7349 u32 val;
7350
7351 val = simple_strtoul(p, &p, 10);
7352 if (p == buf)
7353 printk(KERN_INFO DRV_NAME
7354 ": %s is not in decimal form.\n", buf);
7355 else
bb8c093b 7356 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 7357
7358 return count;
7359}
7360
7361static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7362
7363static ssize_t show_flags(struct device *d,
7364 struct device_attribute *attr, char *buf)
7365{
c79dd5b5 7366 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7367
7368 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7369}
7370
7371static ssize_t store_flags(struct device *d,
7372 struct device_attribute *attr,
7373 const char *buf, size_t count)
7374{
c79dd5b5 7375 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7376 u32 flags = simple_strtoul(buf, NULL, 0);
7377
7378 mutex_lock(&priv->mutex);
7379 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7380 /* Cancel any currently running scans... */
bb8c093b 7381 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 7382 IWL_WARNING("Could not cancel scan.\n");
7383 else {
7384 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7385 flags);
7386 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 7387 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7388 }
7389 }
7390 mutex_unlock(&priv->mutex);
7391
7392 return count;
7393}
7394
7395static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7396
7397static ssize_t show_filter_flags(struct device *d,
7398 struct device_attribute *attr, char *buf)
7399{
c79dd5b5 7400 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7401
7402 return sprintf(buf, "0x%04X\n",
7403 le32_to_cpu(priv->active_rxon.filter_flags));
7404}
7405
7406static ssize_t store_filter_flags(struct device *d,
7407 struct device_attribute *attr,
7408 const char *buf, size_t count)
7409{
c79dd5b5 7410 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7411 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7412
7413 mutex_lock(&priv->mutex);
7414 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7415 /* Cancel any currently running scans... */
bb8c093b 7416 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 7417 IWL_WARNING("Could not cancel scan.\n");
7418 else {
7419 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7420 "0x%04X\n", filter_flags);
7421 priv->staging_rxon.filter_flags =
7422 cpu_to_le32(filter_flags);
bb8c093b 7423 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7424 }
7425 }
7426 mutex_unlock(&priv->mutex);
7427
7428 return count;
7429}
7430
7431static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7432 store_filter_flags);
7433
c8b0e6e1 7434#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 7435
7436static ssize_t show_measurement(struct device *d,
7437 struct device_attribute *attr, char *buf)
7438{
c79dd5b5 7439 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7440 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 7441 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7442 u8 *data = (u8 *) & measure_report;
7443 unsigned long flags;
7444
7445 spin_lock_irqsave(&priv->lock, flags);
7446 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7447 spin_unlock_irqrestore(&priv->lock, flags);
7448 return 0;
7449 }
7450 memcpy(&measure_report, &priv->measure_report, size);
7451 priv->measurement_status = 0;
7452 spin_unlock_irqrestore(&priv->lock, flags);
7453
7454 while (size && (PAGE_SIZE - len)) {
7455 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7456 PAGE_SIZE - len, 1);
7457 len = strlen(buf);
7458 if (PAGE_SIZE - len)
7459 buf[len++] = '\n';
7460
7461 ofs += 16;
7462 size -= min(size, 16U);
7463 }
7464
7465 return len;
7466}
7467
7468static ssize_t store_measurement(struct device *d,
7469 struct device_attribute *attr,
7470 const char *buf, size_t count)
7471{
c79dd5b5 7472 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7473 struct ieee80211_measurement_params params = {
7474 .channel = le16_to_cpu(priv->active_rxon.channel),
7475 .start_time = cpu_to_le64(priv->last_tsf),
7476 .duration = cpu_to_le16(1),
7477 };
7478 u8 type = IWL_MEASURE_BASIC;
7479 u8 buffer[32];
7480 u8 channel;
7481
7482 if (count) {
7483 char *p = buffer;
7484 strncpy(buffer, buf, min(sizeof(buffer), count));
7485 channel = simple_strtoul(p, NULL, 0);
7486 if (channel)
7487 params.channel = channel;
7488
7489 p = buffer;
7490 while (*p && *p != ' ')
7491 p++;
7492 if (*p)
7493 type = simple_strtoul(p + 1, NULL, 0);
7494 }
7495
7496 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7497 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 7498 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 7499
7500 return count;
7501}
7502
7503static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7504 show_measurement, store_measurement);
c8b0e6e1 7505#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 7506
7507static ssize_t store_retry_rate(struct device *d,
7508 struct device_attribute *attr,
7509 const char *buf, size_t count)
7510{
c79dd5b5 7511 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7512
7513 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7514 if (priv->retry_rate <= 0)
7515 priv->retry_rate = 1;
7516
7517 return count;
7518}
7519
7520static ssize_t show_retry_rate(struct device *d,
7521 struct device_attribute *attr, char *buf)
7522{
c79dd5b5 7523 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7524 return sprintf(buf, "%d", priv->retry_rate);
7525}
7526
7527static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7528 store_retry_rate);
7529
7530static ssize_t store_power_level(struct device *d,
7531 struct device_attribute *attr,
7532 const char *buf, size_t count)
7533{
c79dd5b5 7534 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7535 int rc;
7536 int mode;
7537
7538 mode = simple_strtoul(buf, NULL, 0);
7539 mutex_lock(&priv->mutex);
7540
fee1247a 7541 if (!iwl_is_ready(priv)) {
b481de9c
ZY		 7542 rc = -EAGAIN;
7543 goto out;
7544 }
7545
7546 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7547 mode = IWL_POWER_AC;
7548 else
7549 mode |= IWL_POWER_ENABLED;
7550
7551 if (mode != priv->power_mode) {
bb8c093b 7552 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY		 7553 if (rc) {
7554 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7555 goto out;
7556 }
7557 priv->power_mode = mode;
7558 }
7559
7560 rc = count;
7561
7562 out:
7563 mutex_unlock(&priv->mutex);
7564 return rc;
7565}
7566
7567#define MAX_WX_STRING 80
7568
7569/* Values are in microsecond */
7570static const s32 timeout_duration[] = {
7571 350000,
7572 250000,
7573 75000,
7574 37000,
7575 25000,
7576};
7577static const s32 period_duration[] = {
7578 400000,
7579 700000,
7580 1000000,
7581 1000000,
7582 1000000
7583};
7584
7585static ssize_t show_power_level(struct device *d,
7586 struct device_attribute *attr, char *buf)
7587{
c79dd5b5 7588 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7589 int level = IWL_POWER_LEVEL(priv->power_mode);
7590 char *p = buf;
7591
7592 p += sprintf(p, "%d ", level);
7593 switch (level) {
7594 case IWL_POWER_MODE_CAM:
7595 case IWL_POWER_AC:
7596 p += sprintf(p, "(AC)");
7597 break;
7598 case IWL_POWER_BATTERY:
7599 p += sprintf(p, "(BATTERY)");
7600 break;
7601 default:
7602 p += sprintf(p,
7603 "(Timeout %dms, Period %dms)",
7604 timeout_duration[level - 1] / 1000,
7605 period_duration[level - 1] / 1000);
7606 }
7607
7608 if (!(priv->power_mode & IWL_POWER_ENABLED))
7609 p += sprintf(p, " OFF\n");
7610 else
7611 p += sprintf(p, " \n");
7612
7613 return (p - buf + 1);
7614
7615}
7616
7617static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7618 store_power_level);
7619
7620static ssize_t show_channels(struct device *d,
7621 struct device_attribute *attr, char *buf)
7622{
8318d78a
JB		 7623 /* all this shit doesn't belong into sysfs anyway */
7624 return 0;
b481de9c
ZY		 7625}
7626
7627static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7628
7629static ssize_t show_statistics(struct device *d,
7630 struct device_attribute *attr, char *buf)
7631{
c79dd5b5 7632 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7633 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 7634 u32 len = 0, ofs = 0;
7635 u8 *data = (u8 *) & priv->statistics;
7636 int rc = 0;
7637
fee1247a 7638 if (!iwl_is_alive(priv))
b481de9c
ZY		 7639 return -EAGAIN;
7640
7641 mutex_lock(&priv->mutex);
bb8c093b 7642 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY		 7643 mutex_unlock(&priv->mutex);
7644
7645 if (rc) {
7646 len = sprintf(buf,
7647 "Error sending statistics request: 0x%08X\n", rc);
7648 return len;
7649 }
7650
7651 while (size && (PAGE_SIZE - len)) {
7652 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7653 PAGE_SIZE - len, 1);
7654 len = strlen(buf);
7655 if (PAGE_SIZE - len)
7656 buf[len++] = '\n';
7657
7658 ofs += 16;
7659 size -= min(size, 16U);
7660 }
7661
7662 return len;
7663}
7664
7665static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7666
7667static ssize_t show_antenna(struct device *d,
7668 struct device_attribute *attr, char *buf)
7669{
c79dd5b5 7670 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 7671
fee1247a 7672 if (!iwl_is_alive(priv))
b481de9c
ZY		 7673 return -EAGAIN;
7674
7675 return sprintf(buf, "%d\n", priv->antenna);
7676}
7677
7678static ssize_t store_antenna(struct device *d,
7679 struct device_attribute *attr,
7680 const char *buf, size_t count)
7681{
7682 int ant;
c79dd5b5 7683 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7684
7685 if (count == 0)
7686 return 0;
7687
7688 if (sscanf(buf, "%1i", &ant) != 1) {
7689 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7690 return count;
7691 }
7692
7693 if ((ant >= 0) && (ant <= 2)) {
7694 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 7695 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY		 7696 } else
7697 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7698
7699
7700 return count;
7701}
7702
7703static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7704
7705static ssize_t show_status(struct device *d,
7706 struct device_attribute *attr, char *buf)
7707{
c79dd5b5 7708 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 7709 if (!iwl_is_alive(priv))
b481de9c
ZY		 7710 return -EAGAIN;
7711 return sprintf(buf, "0x%08x\n", (int)priv->status);
7712}
7713
7714static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7715
7716static ssize_t dump_error_log(struct device *d,
7717 struct device_attribute *attr,
7718 const char *buf, size_t count)
7719{
7720 char *p = (char *)buf;
7721
7722 if (p[0] == '1')
c79dd5b5 7723 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 7724
7725 return strnlen(buf, count);
7726}
7727
7728static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7729
7730static ssize_t dump_event_log(struct device *d,
7731 struct device_attribute *attr,
7732 const char *buf, size_t count)
7733{
7734 char *p = (char *)buf;
7735
7736 if (p[0] == '1')
c79dd5b5 7737 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 7738
7739 return strnlen(buf, count);
7740}
7741
7742static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7743
7744/*****************************************************************************
7745 *
7746 * driver setup and teardown
7747 *
7748 *****************************************************************************/
7749
c79dd5b5 7750static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 7751{
7752 priv->workqueue = create_workqueue(DRV_NAME);
7753
7754 init_waitqueue_head(&priv->wait_command_queue);
7755
bb8c093b
CH		 7756 INIT_WORK(&priv->up, iwl4965_bg_up);
7757 INIT_WORK(&priv->restart, iwl4965_bg_restart);
7758 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
7759 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
7760 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
7761 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
7762 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
7763 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7764 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7765 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7766 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7767 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7768
7769 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 7770
7771 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7772 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 7773}
7774
c79dd5b5 7775static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7776{
bb8c093b 7777 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7778
3ae6a054 7779 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 7780 cancel_delayed_work(&priv->scan_check);
7781 cancel_delayed_work(&priv->alive_start);
7782 cancel_delayed_work(&priv->post_associate);
7783 cancel_work_sync(&priv->beacon_update);
7784}
7785
bb8c093b 7786static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 7787 &dev_attr_antenna.attr,
7788 &dev_attr_channels.attr,
7789 &dev_attr_dump_errors.attr,
7790 &dev_attr_dump_events.attr,
7791 &dev_attr_flags.attr,
7792 &dev_attr_filter_flags.attr,
c8b0e6e1 7793#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 7794 &dev_attr_measurement.attr,
7795#endif
7796 &dev_attr_power_level.attr,
7797 &dev_attr_retry_rate.attr,
b481de9c
ZY		 7798 &dev_attr_rs_window.attr,
7799 &dev_attr_statistics.attr,
7800 &dev_attr_status.attr,
7801 &dev_attr_temperature.attr,
b481de9c
ZY		 7802 &dev_attr_tx_power.attr,
7803
7804 NULL
7805};
7806
bb8c093b 7807static struct attribute_group iwl4965_attribute_group = {
b481de9c 7808 .name = NULL, /* put in device directory */
bb8c093b 7809 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 7810};
7811
bb8c093b
CH		 7812static struct ieee80211_ops iwl4965_hw_ops = {
7813 .tx = iwl4965_mac_tx,
7814 .start = iwl4965_mac_start,
7815 .stop = iwl4965_mac_stop,
7816 .add_interface = iwl4965_mac_add_interface,
7817 .remove_interface = iwl4965_mac_remove_interface,
7818 .config = iwl4965_mac_config,
7819 .config_interface = iwl4965_mac_config_interface,
7820 .configure_filter = iwl4965_configure_filter,
7821 .set_key = iwl4965_mac_set_key,
ab885f8c 7822 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH		 7823 .get_stats = iwl4965_mac_get_stats,
7824 .get_tx_stats = iwl4965_mac_get_tx_stats,
7825 .conf_tx = iwl4965_mac_conf_tx,
7826 .get_tsf = iwl4965_mac_get_tsf,
7827 .reset_tsf = iwl4965_mac_reset_tsf,
7828 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7829 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7830#ifdef CONFIG_IWL4965_HT
9ab46173 7831 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7832#endif /* CONFIG_IWL4965_HT */
bb8c093b 7833 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 7834};
7835
bb8c093b 7836static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 7837{
7838 int err = 0;
c79dd5b5 7839 struct iwl_priv *priv;
b481de9c 7840 struct ieee80211_hw *hw;
82b9a121 7841 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 7842 unsigned long flags;
5a66926a 7843 DECLARE_MAC_BUF(mac);
b481de9c 7844
316c30d9
AK		 7845 /************************
7846 * 1. Allocating HW data
7847 ************************/
7848
6440adb5
CB		 7849 /* Disabling hardware scan means that mac80211 will perform scans
7850 * "the hard way", rather than using device's scan. */
1ea87396 7851 if (cfg->mod_params->disable_hw_scan) {
b481de9c 7852 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 7853 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 7854 }
7855
1d0a082d
AK		 7856 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
7857 if (!hw) {
b481de9c
ZY		 7858 err = -ENOMEM;
7859 goto out;
7860 }
1d0a082d
AK		 7861 priv = hw->priv;
7862 /* At this point both hw and priv are allocated. */
7863
b481de9c
ZY		 7864 SET_IEEE80211_DEV(hw, &pdev->dev);
7865
7866 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 7867 priv->cfg = cfg;
b481de9c 7868 priv->pci_dev = pdev;
316c30d9 7869
0a6857e7 7870#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 7871 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 7872 atomic_set(&priv->restrict_refcnt, 0);
7873#endif
b481de9c 7874
316c30d9
AK		 7875 /**************************
7876 * 2. Initializing PCI bus
7877 **************************/
7878 if (pci_enable_device(pdev)) {
7879 err = -ENODEV;
7880 goto out_ieee80211_free_hw;
7881 }
7882
7883 pci_set_master(pdev);
7884
7885 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7886 if (!err)
7887 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7888 if (err) {
7889 printk(KERN_WARNING DRV_NAME
7890 ": No suitable DMA available.\n");
7891 goto out_pci_disable_device;
7892 }
7893
7894 err = pci_request_regions(pdev, DRV_NAME);
7895 if (err)
7896 goto out_pci_disable_device;
7897
7898 pci_set_drvdata(pdev, priv);
7899
7900 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7901 * PCI Tx retries from interfering with C3 CPU state */
7902 pci_write_config_byte(pdev, 0x41, 0x00);
7903
7904 /***********************
7905 * 3. Read REV register
7906 ***********************/
7907 priv->hw_base = pci_iomap(pdev, 0, 0);
7908 if (!priv->hw_base) {
7909 err = -ENODEV;
7910 goto out_pci_release_regions;
7911 }
7912
7913 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7914 (unsigned long long) pci_resource_len(pdev, 0));
7915 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7916
7917 printk(KERN_INFO DRV_NAME
7918 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7919
7920 /*****************
7921 * 4. Read EEPROM
7922 *****************/
7923 /* nic init */
3395f6e9 7924 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
316c30d9
AK		 7925 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7926
3395f6e9
TW		 7927 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7928 err = iwl_poll_bit(priv, CSR_GP_CNTRL,
316c30d9
AK		 7929 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
7930 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7931 if (err < 0) {
7932 IWL_DEBUG_INFO("Failed to init the card\n");
7933 goto out_iounmap;
7934 }
7935 /* Read the EEPROM */
7936 err = iwl_eeprom_init(priv);
7937 if (err) {
7938 IWL_ERROR("Unable to init EEPROM\n");
7939 goto out_iounmap;
7940 }
7941 /* MAC Address location in EEPROM same for 3945/4965 */
7942 iwl_eeprom_get_mac(priv, priv->mac_addr);
7943 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
7944 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7945
7946 /************************
7947 * 5. Setup HW constants
7948 ************************/
7949 /* Device-specific setup */
7950 if (iwl4965_hw_set_hw_setting(priv)) {
7951 IWL_ERROR("failed to set hw settings\n");
7952 goto out_iounmap;
7953 }
7954
7955 /*******************
7956 * 6. Setup hw/priv
7957 *******************/
b481de9c 7958
bf85ea4f
AK		 7959 err = iwl_setup(priv);
7960 if (err)
316c30d9 7961 goto out_unset_hw_settings;
bf85ea4f 7962 /* At this point both hw and priv are initialized. */
316c30d9
AK		 7963
7964 /**********************************
7965 * 7. Initialize module parameters
7966 **********************************/
7967
7968 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 7969 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 7970 set_bit(STATUS_RF_KILL_SW, &priv->status);
7971 IWL_DEBUG_INFO("Radio disabled.\n");
7972 }
7973
1ea87396 7974 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK		 7975 priv->qos_data.qos_enable = 1;
7976
7977 /********************
7978 * 8. Setup services
7979 ********************/
0359facc 7980 spin_lock_irqsave(&priv->lock, flags);
316c30d9 7981 iwl4965_disable_interrupts(priv);
0359facc 7982 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK		 7983
7984 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
7985 if (err) {
7986 IWL_ERROR("failed to create sysfs device attributes\n");
bf85ea4f 7987 goto out_unset_hw_settings;
316c30d9
AK		 7988 }
7989
7990 err = iwl_dbgfs_register(priv, DRV_NAME);
7991 if (err) {
7992 IWL_ERROR("failed to create debugfs files\n");
7993 goto out_remove_sysfs;
7994 }
7995
7996 iwl4965_setup_deferred_work(priv);
7997 iwl4965_setup_rx_handlers(priv);
7998
7999 /********************
8000 * 9. Conclude
8001 ********************/
5a66926a
ZY		 8002 pci_save_state(pdev);
8003 pci_disable_device(pdev);
b481de9c 8004
c8381fdc
MA		 8005 /* notify iwlcore to init */
8006 iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
b481de9c
ZY		 8007 return 0;
8008
316c30d9
AK		 8009 out_remove_sysfs:
8010 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
316c30d9 8011 out_unset_hw_settings:
bb8c093b 8012 iwl4965_unset_hw_setting(priv);
b481de9c
ZY		 8013 out_iounmap:
8014 pci_iounmap(pdev, priv->hw_base);
8015 out_pci_release_regions:
8016 pci_release_regions(pdev);
316c30d9 8017 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 8018 out_pci_disable_device:
8019 pci_disable_device(pdev);
b481de9c
ZY		 8020 out_ieee80211_free_hw:
8021 ieee80211_free_hw(priv->hw);
8022 out:
8023 return err;
8024}
8025
c83dbf68 8026static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 8027{
c79dd5b5 8028 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 8029 struct list_head *p, *q;
8030 int i;
0359facc 8031 unsigned long flags;
b481de9c
ZY		 8032
8033 if (!priv)
8034 return;
8035
8036 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8037
c4f55232
RR		 8038 if (priv->mac80211_registered) {
8039 ieee80211_unregister_hw(priv->hw);
8040 priv->mac80211_registered = 0;
8041 }
8042
b481de9c 8043 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 8044
bb8c093b 8045 iwl4965_down(priv);
b481de9c 8046
0359facc
MA		 8047 /* make sure we flush any pending irq or
8048 * tasklet for the driver
8049 */
8050 spin_lock_irqsave(&priv->lock, flags);
8051 iwl4965_disable_interrupts(priv);
8052 spin_unlock_irqrestore(&priv->lock, flags);
8053
8054 iwl_synchronize_irq(priv);
8055
b481de9c
ZY		 8056 /* Free MAC hash list for ADHOC */
8057 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8058 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8059 list_del(p);
bb8c093b 8060 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 8061 }
8062 }
8063
c8381fdc 8064 iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
712b6cf5 8065 iwl_dbgfs_unregister(priv);
bb8c093b 8066 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 8067
bb8c093b 8068 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 8069
8070 if (priv->rxq.bd)
bb8c093b
CH		 8071 iwl4965_rx_queue_free(priv, &priv->rxq);
8072 iwl4965_hw_txq_ctx_free(priv);
b481de9c 8073
bb8c093b 8074 iwl4965_unset_hw_setting(priv);
bf85ea4f 8075 iwlcore_clear_stations_table(priv);
b481de9c 8076
b481de9c 8077
948c171c
MA		 8078 /*netif_stop_queue(dev); */
8079 flush_workqueue(priv->workqueue);
8080
bb8c093b 8081 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 8082 * priv->workqueue... so we can't take down the workqueue
8083 * until now... */
8084 destroy_workqueue(priv->workqueue);
8085 priv->workqueue = NULL;
8086
b481de9c
ZY		 8087 pci_iounmap(pdev, priv->hw_base);
8088 pci_release_regions(pdev);
8089 pci_disable_device(pdev);
8090 pci_set_drvdata(pdev, NULL);
8091
bf85ea4f 8092 iwl_free_channel_map(priv);
849e0dce 8093 iwl4965_free_geos(priv);
b481de9c
ZY		 8094
8095 if (priv->ibss_beacon)
8096 dev_kfree_skb(priv->ibss_beacon);
8097
8098 ieee80211_free_hw(priv->hw);
8099}
8100
8101#ifdef CONFIG_PM
8102
bb8c093b 8103static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 8104{
c79dd5b5 8105 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8106
e655b9f0
ZY		 8107 if (priv->is_open) {
8108 set_bit(STATUS_IN_SUSPEND, &priv->status);
8109 iwl4965_mac_stop(priv->hw);
8110 priv->is_open = 1;
8111 }
b481de9c 8112
b481de9c
ZY		 8113 pci_set_power_state(pdev, PCI_D3hot);
8114
b481de9c
ZY		 8115 return 0;
8116}
8117
bb8c093b 8118static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 8119{
c79dd5b5 8120 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8121
b481de9c 8122 pci_set_power_state(pdev, PCI_D0);
b481de9c 8123
e655b9f0
ZY		 8124 if (priv->is_open)
8125 iwl4965_mac_start(priv->hw);
b481de9c 8126
e655b9f0 8127 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 8128 return 0;
8129}
8130
8131#endif /* CONFIG_PM */
8132
8133/*****************************************************************************
8134 *
8135 * driver and module entry point
8136 *
8137 *****************************************************************************/
8138
bb8c093b 8139static struct pci_driver iwl4965_driver = {
b481de9c 8140 .name = DRV_NAME,
bb8c093b
CH		 8141 .id_table = iwl4965_hw_card_ids,
8142 .probe = iwl4965_pci_probe,
8143 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 8144#ifdef CONFIG_PM
bb8c093b
CH		 8145 .suspend = iwl4965_pci_suspend,
8146 .resume = iwl4965_pci_resume,
b481de9c
ZY		 8147#endif
8148};
8149
bb8c093b 8150static int __init iwl4965_init(void)
b481de9c
ZY		 8151{
8152
8153 int ret;
8154 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8155 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC		 8156
8157 ret = iwl4965_rate_control_register();
8158 if (ret) {
8159 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8160 return ret;
8161 }
8162
bb8c093b 8163 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY		 8164 if (ret) {
8165 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 8166 goto error_register;
b481de9c 8167 }
0a6857e7 8168#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8169 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 8170 if (ret) {
8171 IWL_ERROR("Unable to create driver sysfs file\n");
897e1cf2 8172 goto error_debug;
b481de9c
ZY		 8173 }
8174#endif
8175
8176 return ret;
897e1cf2
RC		 8177
8178#ifdef CONFIG_IWLWIFI_DEBUG
8179error_debug:
8180 pci_unregister_driver(&iwl4965_driver);
8181#endif
8182error_register:
8183 iwl4965_rate_control_unregister();
8184 return ret;
b481de9c
ZY		 8185}
8186
bb8c093b 8187static void __exit iwl4965_exit(void)
b481de9c 8188{
0a6857e7 8189#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8190 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 8191#endif
bb8c093b 8192 pci_unregister_driver(&iwl4965_driver);
897e1cf2 8193 iwl4965_rate_control_unregister();
b481de9c
ZY		 8194}
8195
bb8c093b
CH		 8196module_exit(iwl4965_exit);
8197module_init(iwl4965_init);
Linux kernel - Deliverables
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