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iwlwifi: remove 49 prefix from general CSR values
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
b481de9c 49#include "iwl-4965.h"
fee1247a 50#include "iwl-core.h"
3395f6e9 51#include "iwl-io.h"
b481de9c 52#include "iwl-helpers.h"
6974e363 53#include "iwl-sta.h"
f0832f13 54#include "iwl-calib.h"
b481de9c 55
c79dd5b5 56static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 57 struct iwl4965_tx_queue *txq);
416e1438 58
b481de9c
ZY		 59/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
b481de9c
ZY		 65/*
66 * module name, copyright, version, etc.
67 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
68 */
69
70#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
71
0a6857e7 72#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 73#define VD "d"
74#else
75#define VD
76#endif
77
c8b0e6e1 78#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 79#define VS "s"
80#else
81#define VS
82#endif
83
df48c323 84#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 85
b481de9c
ZY		 86
87MODULE_DESCRIPTION(DRV_DESCRIPTION);
88MODULE_VERSION(DRV_VERSION);
89MODULE_AUTHOR(DRV_COPYRIGHT);
90MODULE_LICENSE("GPL");
91
92__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
93{
94 u16 fc = le16_to_cpu(hdr->frame_control);
95 int hdr_len = ieee80211_get_hdrlen(fc);
96
97 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
98 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
99 return NULL;
100}
101
d1141dfb 102static const struct ieee80211_supported_band *iwl_get_hw_mode(
c79dd5b5 103 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 104{
8318d78a 105 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 106}
107
bb8c093b 108static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 109{
110 /* Single white space is for Linksys APs */
111 if (essid_len == 1 && essid[0] == ' ')
112 return 1;
113
114 /* Otherwise, if the entire essid is 0, we assume it is hidden */
115 while (essid_len) {
116 essid_len--;
117 if (essid[essid_len] != '\0')
118 return 0;
119 }
120
121 return 1;
122}
123
bb8c093b 124static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 125{
126 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
127 const char *s = essid;
128 char *d = escaped;
129
bb8c093b 130 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 131 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
132 return escaped;
133 }
134
135 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
136 while (essid_len--) {
137 if (*s == '\0') {
138 *d++ = '\\';
139 *d++ = '0';
140 s++;
141 } else
142 *d++ = *s++;
143 }
144 *d = '\0';
145 return escaped;
146}
147
b481de9c
ZY		 148/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
149 * DMA services
150 *
151 * Theory of operation
152 *
6440adb5
CB		 153 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
154 * of buffer descriptors, each of which points to one or more data buffers for
155 * the device to read from or fill. Driver and device exchange status of each
156 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
157 * entries in each circular buffer, to protect against confusing empty and full
158 * queue states.
159 *
160 * The device reads or writes the data in the queues via the device's several
161 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 162 *
163 * For Tx queue, there are low mark and high mark limits. If, after queuing
164 * the packet for Tx, free space become < low mark, Tx queue stopped. When
165 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
166 * Tx queue resumed.
167 *
6440adb5
CB		 168 * The 4965 operates with up to 17 queues: One receive queue, one transmit
169 * queue (#4) for sending commands to the device firmware, and 15 other
170 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 171 *
172 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 173 ***************************************************/
174
fe01b477 175int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 176{
fc4b6853 177 int s = q->read_ptr - q->write_ptr;
b481de9c 178
fc4b6853 179 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 180 s -= q->n_bd;
181
182 if (s <= 0)
183 s += q->n_window;
184 /* keep some reserve to not confuse empty and full situations */
185 s -= 2;
186 if (s < 0)
187 s = 0;
188 return s;
189}
190
b481de9c 191
bb8c093b 192static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 193{
fc4b6853
TW		 194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 197}
198
bb8c093b 199static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 200{
6440adb5 201 /* This is for scan command, the big buffer at end of command array */
b481de9c 202 if (is_huge)
6440adb5 203 return q->n_window; /* must be power of 2 */
b481de9c 204
6440adb5 205 /* Otherwise, use normal size buffers */
b481de9c
ZY		 206 return index & (q->n_window - 1);
207}
208
6440adb5
CB		 209/**
210 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
211 */
c79dd5b5 212static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 213 int count, int slots_num, u32 id)
214{
215 q->n_bd = count;
216 q->n_window = slots_num;
217 q->id = id;
218
c54b679d
TW		 219 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
220 * and iwl_queue_dec_wrap are broken. */
b481de9c
ZY		 221 BUG_ON(!is_power_of_2(count));
222
223 /* slots_num must be power-of-two size, otherwise
224 * get_cmd_index is broken. */
225 BUG_ON(!is_power_of_2(slots_num));
226
227 q->low_mark = q->n_window / 4;
228 if (q->low_mark < 4)
229 q->low_mark = 4;
230
231 q->high_mark = q->n_window / 8;
232 if (q->high_mark < 2)
233 q->high_mark = 2;
234
fc4b6853 235 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 236
237 return 0;
238}
239
6440adb5
CB		 240/**
241 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
242 */
c79dd5b5 243static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 244 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 245{
246 struct pci_dev *dev = priv->pci_dev;
247
6440adb5
CB		 248 /* Driver private data, only for Tx (not command) queues,
249 * not shared with device. */
b481de9c
ZY		 250 if (id != IWL_CMD_QUEUE_NUM) {
251 txq->txb = kmalloc(sizeof(txq->txb[0]) *
252 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
253 if (!txq->txb) {
01ebd063 254 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 255 "structures failed\n");
256 goto error;
257 }
258 } else
259 txq->txb = NULL;
260
6440adb5
CB		 261 /* Circular buffer of transmit frame descriptors (TFDs),
262 * shared with device */
b481de9c
ZY		 263 txq->bd = pci_alloc_consistent(dev,
264 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
265 &txq->q.dma_addr);
266
267 if (!txq->bd) {
268 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
269 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
270 goto error;
271 }
272 txq->q.id = id;
273
274 return 0;
275
276 error:
277 if (txq->txb) {
278 kfree(txq->txb);
279 txq->txb = NULL;
280 }
281
282 return -ENOMEM;
283}
284
8b6eaea8
CB		 285/**
286 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
287 */
c79dd5b5 288int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 289 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 290{
291 struct pci_dev *dev = priv->pci_dev;
292 int len;
293 int rc = 0;
294
8b6eaea8
CB		 295 /*
296 * Alloc buffer array for commands (Tx or other types of commands).
297 * For the command queue (#4), allocate command space + one big
298 * command for scan, since scan command is very huge; the system will
299 * not have two scans at the same time, so only one is needed.
bb54244b 300 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
CB		 301 * space is needed.
302 */
857485c0 303 len = sizeof(struct iwl_cmd) * slots_num;
b481de9c
ZY		 304 if (txq_id == IWL_CMD_QUEUE_NUM)
305 len += IWL_MAX_SCAN_SIZE;
306 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
307 if (!txq->cmd)
308 return -ENOMEM;
309
8b6eaea8 310 /* Alloc driver data array and TFD circular buffer */
bb8c093b 311 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 312 if (rc) {
313 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
314
315 return -ENOMEM;
316 }
317 txq->need_update = 0;
318
319 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 320 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 321 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
CB		 322
323 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 324 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 325
8b6eaea8 326 /* Tell device where to find queue */
bb8c093b 327 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 328
329 return 0;
330}
331
332/**
bb8c093b 333 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 334 * @txq: Transmit queue to deallocate.
335 *
336 * Empty queue by removing and destroying all BD's.
6440adb5
CB		 337 * Free all buffers.
338 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 339 */
c79dd5b5 340void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 341{
bb8c093b 342 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345
346 if (q->n_bd == 0)
347 return;
348
349 /* first, empty all BD's */
fc4b6853 350 for (; q->write_ptr != q->read_ptr;
c54b679d 351 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 352 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 353
857485c0 354 len = sizeof(struct iwl_cmd) * q->n_window;
b481de9c
ZY		 355 if (q->id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357
6440adb5 358 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 359 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
360
6440adb5 361 /* De-alloc circular buffer of TFDs */
b481de9c 362 if (txq->q.n_bd)
bb8c093b 363 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 364 txq->q.n_bd, txq->bd, txq->q.dma_addr);
365
6440adb5 366 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 367 if (txq->txb) {
368 kfree(txq->txb);
369 txq->txb = NULL;
370 }
371
6440adb5 372 /* 0-fill queue descriptor structure */
b481de9c
ZY		 373 memset(txq, 0, sizeof(*txq));
374}
375
bb8c093b 376const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 377
378/*************** STATION TABLE MANAGEMENT ****
9fbab516 379 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 380 * the functionality provided here
381 */
382
383/**************************************************************/
384
01ebd063 385#if 0 /* temporary disable till we add real remove station */
6440adb5
CB		 386/**
387 * iwl4965_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
c79dd5b5 391static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 392{
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
5425e490 402 index = priv->hw_params.bcast_sta_id;
b481de9c 403 else
5425e490 404 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
b481de9c
ZY		 405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425}
556f8db7 426#endif
b481de9c 427
6440adb5
CB		 428/**
429 * iwl4965_add_station_flags - Add station to tables in driver and device
430 */
c79dd5b5 431u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 432 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 433{
434 int i;
435 int index = IWL_INVALID_STATION;
bb8c093b 436 struct iwl4965_station_entry *station;
b481de9c 437 unsigned long flags_spin;
0795af57 438 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 439
440 spin_lock_irqsave(&priv->sta_lock, flags_spin);
441 if (is_ap)
442 index = IWL_AP_ID;
443 else if (is_broadcast_ether_addr(addr))
5425e490 444 index = priv->hw_params.bcast_sta_id;
b481de9c 445 else
5425e490 446 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
b481de9c
ZY		 447 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
448 addr)) {
449 index = i;
450 break;
451 }
452
453 if (!priv->stations[i].used &&
454 index == IWL_INVALID_STATION)
455 index = i;
456 }
457
458
9fbab516
BC		 459 /* These two conditions have the same outcome, but keep them separate
460 since they have different meanings */
b481de9c
ZY		 461 if (unlikely(index == IWL_INVALID_STATION)) {
462 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
463 return index;
464 }
465
466 if (priv->stations[index].used &&
467 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
468 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
469 return index;
470 }
471
472
0795af57 473 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 474 station = &priv->stations[index];
475 station->used = 1;
476 priv->num_stations++;
477
6440adb5 478 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 479 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 480 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
481 station->sta.mode = 0;
482 station->sta.sta.sta_id = index;
483 station->sta.station_flags = 0;
484
c8b0e6e1 485#ifdef CONFIG_IWL4965_HT
b481de9c 486 /* BCAST station and IBSS stations do not work in HT mode */
5425e490 487 if (index != priv->hw_params.bcast_sta_id &&
b481de9c 488 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 489 iwl4965_set_ht_add_station(priv, index,
490 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 491#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 492
493 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
CB		 494
495 /* Add station to device's station table */
bb8c093b 496 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 497 return index;
498
499}
500
b481de9c 501
b481de9c
ZY		 502
503/*************** HOST COMMAND QUEUE FUNCTIONS *****/
504
b481de9c 505/**
bb8c093b 506 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 507 * @priv: device private data point
508 * @cmd: a point to the ucode command structure
509 *
510 * The function returns < 0 values to indicate the operation is
511 * failed. On success, it turns the index (> 0) of command in the
512 * command queue.
513 */
857485c0 514int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 515{
bb8c093b
CH		 516 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
517 struct iwl4965_queue *q = &txq->q;
518 struct iwl4965_tfd_frame *tfd;
b481de9c 519 u32 *control_flags;
857485c0 520 struct iwl_cmd *out_cmd;
b481de9c
ZY		 521 u32 idx;
522 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
523 dma_addr_t phys_addr;
524 int ret;
525 unsigned long flags;
526
527 /* If any of the command structures end up being larger than
528 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
529 * we will need to increase the size of the TFD entries */
530 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
531 !(cmd->meta.flags & CMD_SIZE_HUGE));
532
fee1247a 533 if (iwl_is_rfkill(priv)) {
c342a1b9
GG		 534 IWL_DEBUG_INFO("Not sending command - RF KILL");
535 return -EIO;
536 }
537
bb8c093b 538 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 539 IWL_ERROR("No space for Tx\n");
540 return -ENOSPC;
541 }
542
543 spin_lock_irqsave(&priv->hcmd_lock, flags);
544
fc4b6853 545 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 546 memset(tfd, 0, sizeof(*tfd));
547
548 control_flags = (u32 *) tfd;
549
fc4b6853 550 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 551 out_cmd = &txq->cmd[idx];
552
553 out_cmd->hdr.cmd = cmd->id;
554 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
555 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
556
557 /* At this point, the out_cmd now has all of the incoming cmd
558 * information */
559
560 out_cmd->hdr.flags = 0;
561 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 562 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 563 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
564 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
565
566 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 567 offsetof(struct iwl_cmd, hdr);
bb8c093b 568 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 569
570 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
571 "%d bytes at %d[%d]:%d\n",
572 get_cmd_string(out_cmd->hdr.cmd),
573 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 574 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 575
576 txq->need_update = 1;
6440adb5
CB		 577
578 /* Set up entry in queue's byte count circular buffer */
e2a722eb 579 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
6440adb5
CB		 580
581 /* Increment and update queue's write index */
c54b679d 582 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
e2a722eb 583 ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 584
585 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
586 return ret ? ret : idx;
587}
588
deb09c43
EG		 589static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
590{
591 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
592
593 if (hw_decrypt)
594 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
595 else
596 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
597
598}
599
b481de9c 600/**
bb8c093b 601 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 602 *
603 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 604 * NOTE: mutex must be held before calling this fnction
605 */
c79dd5b5 606static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY		 607 const u8 *addr, int is_ap)
608{
556f8db7 609 u8 sta_id;
b481de9c 610
6440adb5 611 /* Add station to device's station table */
67d62035
RR		 612#ifdef CONFIG_IWL4965_HT
613 struct ieee80211_conf *conf = &priv->hw->conf;
614 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
615
616 if ((is_ap) &&
617 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
618 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
619 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
620 0, cur_ht_config);
621 else
622#endif /* CONFIG_IWL4965_HT */
623 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
624 0, NULL);
6440adb5
CB		 625
626 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 627 iwl4965_add_station(priv, addr, is_ap);
628
556f8db7 629 return sta_id;
b481de9c
ZY		 630}
631
b481de9c 632/**
bb8c093b 633 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 634 *
635 * NOTE: This is really only useful during development and can eventually
636 * be #ifdef'd out once the driver is stable and folks aren't actively
637 * making changes
638 */
bb8c093b 639static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 640{
641 int error = 0;
642 int counter = 1;
643
644 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
645 error |= le32_to_cpu(rxon->flags &
646 (RXON_FLG_TGJ_NARROW_BAND_MSK |
647 RXON_FLG_RADAR_DETECT_MSK));
648 if (error)
649 IWL_WARNING("check 24G fields %d | %d\n",
650 counter++, error);
651 } else {
652 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
653 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
654 if (error)
655 IWL_WARNING("check 52 fields %d | %d\n",
656 counter++, error);
657 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
658 if (error)
659 IWL_WARNING("check 52 CCK %d | %d\n",
660 counter++, error);
661 }
662 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
663 if (error)
664 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
665
666 /* make sure basic rates 6Mbps and 1Mbps are supported */
667 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
668 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
669 if (error)
670 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
671
672 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
673 if (error)
674 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
675
676 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
677 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
678 if (error)
679 IWL_WARNING("check CCK and short slot %d | %d\n",
680 counter++, error);
681
682 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
683 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
684 if (error)
685 IWL_WARNING("check CCK & auto detect %d | %d\n",
686 counter++, error);
687
688 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
689 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
690 if (error)
691 IWL_WARNING("check TGG and auto detect %d | %d\n",
692 counter++, error);
693
694 if (error)
695 IWL_WARNING("Tuning to channel %d\n",
696 le16_to_cpu(rxon->channel));
697
698 if (error) {
bb8c093b 699 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 700 return -1;
701 }
702 return 0;
703}
704
705/**
9fbab516 706 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 707 * @priv: staging_rxon is compared to active_rxon
b481de9c 708 *
9fbab516
BC		 709 * If the RXON structure is changing enough to require a new tune,
710 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
711 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 712 */
c79dd5b5 713static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 714{
715
716 /* These items are only settable from the full RXON command */
717 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
718 compare_ether_addr(priv->staging_rxon.bssid_addr,
719 priv->active_rxon.bssid_addr) ||
720 compare_ether_addr(priv->staging_rxon.node_addr,
721 priv->active_rxon.node_addr) ||
722 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
723 priv->active_rxon.wlap_bssid_addr) ||
724 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
725 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
726 (priv->staging_rxon.air_propagation !=
727 priv->active_rxon.air_propagation) ||
728 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
729 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
730 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
731 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
732 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
733 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
734 return 1;
735
736 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
737 * be updated with the RXON_ASSOC command -- however only some
738 * flag transitions are allowed using RXON_ASSOC */
739
740 /* Check if we are not switching bands */
741 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
742 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
743 return 1;
744
745 /* Check if we are switching association toggle */
746 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
747 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
748 return 1;
749
750 return 0;
751}
752
b481de9c 753/**
bb8c093b 754 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 755 *
01ebd063 756 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 757 * the active_rxon structure is updated with the new data. This
758 * function correctly transitions out of the RXON_ASSOC_MSK state if
759 * a HW tune is required based on the RXON structure changes.
760 */
c79dd5b5 761static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 762{
763 /* cast away the const for active_rxon in this function */
bb8c093b 764 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 765 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 766 int rc = 0;
767
fee1247a 768 if (!iwl_is_alive(priv))
b481de9c
ZY		 769 return -1;
770
771 /* always get timestamp with Rx frame */
772 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
773
bb8c093b 774 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 775 if (rc) {
776 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
777 return -EINVAL;
778 }
779
780 /* If we don't need to send a full RXON, we can use
bb8c093b 781 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 782 * and other flags for the current radio configuration. */
bb8c093b 783 if (!iwl4965_full_rxon_required(priv)) {
7e8c519e 784 rc = iwl_send_rxon_assoc(priv);
b481de9c
ZY		 785 if (rc) {
786 IWL_ERROR("Error setting RXON_ASSOC "
787 "configuration (%d).\n", rc);
788 return rc;
789 }
790
791 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
792
793 return 0;
794 }
795
796 /* station table will be cleared */
797 priv->assoc_station_added = 0;
798
b481de9c
ZY		 799 /* If we are currently associated and the new config requires
800 * an RXON_ASSOC and the new config wants the associated mask enabled,
801 * we must clear the associated from the active configuration
802 * before we apply the new config */
3109ece1 803 if (iwl_is_associated(priv) &&
b481de9c
ZY		 804 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
805 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
806 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
807
857485c0 808 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 809 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 810 &priv->active_rxon);
811
812 /* If the mask clearing failed then we set
813 * active_rxon back to what it was previously */
814 if (rc) {
815 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
816 IWL_ERROR("Error clearing ASSOC_MSK on current "
817 "configuration (%d).\n", rc);
818 return rc;
819 }
b481de9c
ZY		 820 }
821
822 IWL_DEBUG_INFO("Sending RXON\n"
823 "* with%s RXON_FILTER_ASSOC_MSK\n"
824 "* channel = %d\n"
0795af57 825 "* bssid = %s\n",
b481de9c
ZY		 826 ((priv->staging_rxon.filter_flags &
827 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
828 le16_to_cpu(priv->staging_rxon.channel),
0795af57 829 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 830
099b40b7 831 iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
b481de9c 832 /* Apply the new configuration */
857485c0 833 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 834 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 835 if (rc) {
836 IWL_ERROR("Error setting new configuration (%d).\n", rc);
837 return rc;
838 }
839
bf85ea4f 840 iwlcore_clear_stations_table(priv);
556f8db7 841
b481de9c
ZY		 842 if (!priv->error_recovering)
843 priv->start_calib = 0;
844
f0832f13 845 iwl_init_sensitivity(priv);
b481de9c
ZY		 846
847 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
848
849 /* If we issue a new RXON command which required a tune then we must
850 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 851 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 852 if (rc) {
853 IWL_ERROR("Error setting Tx power (%d).\n", rc);
854 return rc;
855 }
856
857 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 858 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 859 IWL_INVALID_STATION) {
860 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
861 return -EIO;
862 }
863
864 /* If we have set the ASSOC_MSK and we are in BSS mode then
865 * add the IWL_AP_ID to the station rate table */
3109ece1 866 if (iwl_is_associated(priv) &&
b481de9c 867 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 868 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 869 == IWL_INVALID_STATION) {
870 IWL_ERROR("Error adding AP address for transmit.\n");
871 return -EIO;
872 }
873 priv->assoc_station_added = 1;
6974e363
EG		 874 if (priv->default_wep_key &&
875 iwl_send_static_wepkey_cmd(priv, 0))
876 IWL_ERROR("Could not send WEP static key.\n");
b481de9c
ZY		 877 }
878
879 return 0;
880}
881
5da4b55f
MA		 882void iwl4965_update_chain_flags(struct iwl_priv *priv)
883{
884
c7de35cd 885 iwl_set_rxon_chain(priv);
5da4b55f
MA		 886 iwl4965_commit_rxon(priv);
887}
888
c79dd5b5 889static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 890{
bb8c093b 891 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 892 .flags = 3,
893 .lead_time = 0xAA,
894 .max_kill = 1,
895 .kill_ack_mask = 0,
896 .kill_cts_mask = 0,
897 };
898
857485c0 899 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 900 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 901}
902
c79dd5b5 903static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY		 904{
905 int rc = 0;
bb8c093b 906 struct iwl4965_rx_packet *res;
857485c0 907 struct iwl_host_cmd cmd = {
b481de9c
ZY		 908 .id = REPLY_SCAN_ABORT_CMD,
909 .meta.flags = CMD_WANT_SKB,
910 };
911
912 /* If there isn't a scan actively going on in the hardware
913 * then we are in between scan bands and not actually
914 * actively scanning, so don't send the abort command */
915 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
916 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
917 return 0;
918 }
919
857485c0 920 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 921 if (rc) {
922 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
923 return rc;
924 }
925
bb8c093b 926 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 927 if (res->u.status != CAN_ABORT_STATUS) {
928 /* The scan abort will return 1 for success or
929 * 2 for "failure". A failure condition can be
930 * due to simply not being in an active scan which
931 * can occur if we send the scan abort before we
932 * the microcode has notified us that a scan is
933 * completed. */
934 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
935 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
936 clear_bit(STATUS_SCAN_HW, &priv->status);
937 }
938
939 dev_kfree_skb_any(cmd.meta.u.skb);
940
941 return rc;
942}
943
b481de9c
ZY		 944/*
945 * CARD_STATE_CMD
946 *
9fbab516 947 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 948 *
949 * When in the 'enable' state the card operates as normal.
950 * When in the 'disable' state, the card enters into a low power mode.
951 * When in the 'halt' state, the card is shut down and must be fully
952 * restarted to come back on.
953 */
c79dd5b5 954static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 955{
857485c0 956 struct iwl_host_cmd cmd = {
b481de9c
ZY		 957 .id = REPLY_CARD_STATE_CMD,
958 .len = sizeof(u32),
959 .data = &flags,
960 .meta.flags = meta_flag,
961 };
962
857485c0 963 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 964}
965
c79dd5b5 966int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 967 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 968{
bb8c093b 969 struct iwl4965_rx_packet *res = NULL;
b481de9c 970 int rc = 0;
857485c0 971 struct iwl_host_cmd cmd = {
b481de9c 972 .id = REPLY_ADD_STA,
bb8c093b 973 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 974 .meta.flags = flags,
975 .data = sta,
976 };
977
9e5b806c 978 if (!(flags & CMD_ASYNC))
b481de9c
ZY		 979 cmd.meta.flags |= CMD_WANT_SKB;
980
857485c0 981 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 982
983 if (rc || (flags & CMD_ASYNC))
984 return rc;
985
bb8c093b 986 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 987 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
988 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
989 res->hdr.flags);
990 rc = -EIO;
991 }
992
993 if (rc == 0) {
994 switch (res->u.add_sta.status) {
995 case ADD_STA_SUCCESS_MSK:
996 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
997 break;
998 default:
999 rc = -EIO;
1000 IWL_WARNING("REPLY_ADD_STA failed\n");
1001 break;
1002 }
1003 }
1004
1005 priv->alloc_rxb_skb--;
1006 dev_kfree_skb_any(cmd.meta.u.skb);
1007
1008 return rc;
1009}
1010
c79dd5b5 1011static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 1012{
1013 struct list_head *element;
1014
1015 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1016 priv->frames_count);
1017
1018 while (!list_empty(&priv->free_frames)) {
1019 element = priv->free_frames.next;
1020 list_del(element);
bb8c093b 1021 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1022 priv->frames_count--;
1023 }
1024
1025 if (priv->frames_count) {
1026 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1027 priv->frames_count);
1028 priv->frames_count = 0;
1029 }
1030}
1031
c79dd5b5 1032static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1033{
bb8c093b 1034 struct iwl4965_frame *frame;
b481de9c
ZY		 1035 struct list_head *element;
1036 if (list_empty(&priv->free_frames)) {
1037 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1038 if (!frame) {
1039 IWL_ERROR("Could not allocate frame!\n");
1040 return NULL;
1041 }
1042
1043 priv->frames_count++;
1044 return frame;
1045 }
1046
1047 element = priv->free_frames.next;
1048 list_del(element);
bb8c093b 1049 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1050}
1051
c79dd5b5 1052static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1053{
1054 memset(frame, 0, sizeof(*frame));
1055 list_add(&frame->list, &priv->free_frames);
1056}
1057
c79dd5b5 1058unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY		 1059 struct ieee80211_hdr *hdr,
1060 const u8 *dest, int left)
1061{
1062
3109ece1 1063 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1064 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1065 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1066 return 0;
1067
1068 if (priv->ibss_beacon->len > left)
1069 return 0;
1070
1071 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1072
1073 return priv->ibss_beacon->len;
1074}
1075
39e88504 1076static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv)
b481de9c 1077{
39e88504
GC		 1078 int i;
1079 int rate_mask;
1080
1081 /* Set rate mask*/
1082 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1083 rate_mask = priv->active_rate_basic & 0xF;
1084 else
1085 rate_mask = priv->active_rate_basic & 0xFF0;
b481de9c 1086
39e88504 1087 /* Find lowest valid rate */
b481de9c 1088 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
39e88504 1089 i = iwl4965_rates[i].next_ieee) {
b481de9c 1090 if (rate_mask & (1 << i))
bb8c093b 1091 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1092 }
1093
39e88504
GC		 1094 /* No valid rate was found. Assign the lowest one */
1095 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
1096 return IWL_RATE_1M_PLCP;
1097 else
1098 return IWL_RATE_6M_PLCP;
b481de9c
ZY		 1099}
1100
c79dd5b5 1101static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1102{
bb8c093b 1103 struct iwl4965_frame *frame;
b481de9c
ZY		 1104 unsigned int frame_size;
1105 int rc;
1106 u8 rate;
1107
bb8c093b 1108 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1109
1110 if (!frame) {
1111 IWL_ERROR("Could not obtain free frame buffer for beacon "
1112 "command.\n");
1113 return -ENOMEM;
1114 }
1115
39e88504 1116 rate = iwl4965_rate_get_lowest_plcp(priv);
b481de9c 1117
bb8c093b 1118 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1119
857485c0 1120 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1121 &frame->u.cmd[0]);
1122
bb8c093b 1123 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1124
1125 return rc;
1126}
1127
b481de9c
ZY		 1128/******************************************************************************
1129 *
1130 * Misc. internal state and helper functions
1131 *
1132 ******************************************************************************/
b481de9c 1133
b481de9c 1134/**
bb8c093b 1135 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1136 *
1137 * return : set the bit for each supported rate insert in ie
1138 */
bb8c093b 1139static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1140 u16 basic_rate, int *left)
b481de9c
ZY		 1141{
1142 u16 ret_rates = 0, bit;
1143 int i;
c7c46676
TW		 1144 u8 *cnt = ie;
1145 u8 *rates = ie + 1;
b481de9c
ZY		 1146
1147 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1148 if (bit & supported_rate) {
1149 ret_rates |= bit;
bb8c093b 1150 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1151 ((bit & basic_rate) ? 0x80 : 0x00);
1152 (*cnt)++;
1153 (*left)--;
1154 if ((*left <= 0) ||
1155 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1156 break;
1157 }
1158 }
1159
1160 return ret_rates;
1161}
1162
d1141dfb
EG		 1163#ifdef CONFIG_IWL4965_HT
1164static void iwl4965_ht_conf(struct iwl_priv *priv,
1165 struct ieee80211_bss_conf *bss_conf)
1166{
1167 struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
1168 struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
1169 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
1170
1171 IWL_DEBUG_MAC80211("enter: \n");
1172
1173 iwl_conf->is_ht = bss_conf->assoc_ht;
1174
1175 if (!iwl_conf->is_ht)
1176 return;
1177
1178 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1179
1180 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
1181 iwl_conf->sgf |= 0x1;
1182 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
1183 iwl_conf->sgf |= 0x2;
1184
1185 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
1186 iwl_conf->max_amsdu_size =
1187 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
1188
1189 iwl_conf->supported_chan_width =
1190 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
1191 iwl_conf->extension_chan_offset =
1192 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
1193 /* If no above or below channel supplied disable FAT channel */
1194 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
1195 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
1196 iwl_conf->supported_chan_width = 0;
1197
1198 iwl_conf->tx_mimo_ps_mode =
1199 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
1200 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
1201
1202 iwl_conf->control_channel = ht_bss_conf->primary_channel;
1203 iwl_conf->tx_chan_width =
1204 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
1205 iwl_conf->ht_protection =
1206 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
1207 iwl_conf->non_GF_STA_present =
1208 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
1209
1210 IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
1211 IWL_DEBUG_MAC80211("leave\n");
1212}
1213
1214static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1215 u8 *pos, int *left)
1216{
1217 struct ieee80211_ht_cap *ht_cap;
1218
1219 if (!sband || !sband->ht_info.ht_supported)
1220 return;
1221
1222 if (*left < sizeof(struct ieee80211_ht_cap))
1223 return;
1224
1225 *pos++ = sizeof(struct ieee80211_ht_cap);
1226 ht_cap = (struct ieee80211_ht_cap *) pos;
1227
1228 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1229 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1230 ht_cap->ampdu_params_info =
1231 (sband->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
1232 ((sband->ht_info.ampdu_density << 2) &
1233 IEEE80211_HT_CAP_AMPDU_DENSITY);
1234 *left -= sizeof(struct ieee80211_ht_cap);
1235}
1236#else
1237static inline void iwl4965_ht_conf(struct iwl_priv *priv,
1238 struct ieee80211_bss_conf *bss_conf)
1239{
1240}
1241static void iwl_ht_cap_to_ie(const struct ieee80211_supported_band *sband,
1242 u8 *pos, int *left)
1243{
1244}
1245#endif
1246
1247
b481de9c 1248/**
bb8c093b 1249 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1250 */
c79dd5b5 1251static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW		 1252 enum ieee80211_band band,
1253 struct ieee80211_mgmt *frame,
1254 int left, int is_direct)
b481de9c
ZY		 1255{
1256 int len = 0;
1257 u8 *pos = NULL;
bee488db 1258 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
78330fdd 1259 const struct ieee80211_supported_band *sband =
d1141dfb 1260 iwl_get_hw_mode(priv, band);
b481de9c
ZY		 1261
1262 /* Make sure there is enough space for the probe request,
1263 * two mandatory IEs and the data */
1264 left -= 24;
1265 if (left < 0)
1266 return 0;
1267 len += 24;
1268
1269 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1270 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1271 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1272 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1273 frame->seq_ctrl = 0;
1274
1275 /* fill in our indirect SSID IE */
1276 /* ...next IE... */
1277
1278 left -= 2;
1279 if (left < 0)
1280 return 0;
1281 len += 2;
1282 pos = &(frame->u.probe_req.variable[0]);
1283 *pos++ = WLAN_EID_SSID;
1284 *pos++ = 0;
1285
1286 /* fill in our direct SSID IE... */
1287 if (is_direct) {
1288 /* ...next IE... */
1289 left -= 2 + priv->essid_len;
1290 if (left < 0)
1291 return 0;
1292 /* ... fill it in... */
1293 *pos++ = WLAN_EID_SSID;
1294 *pos++ = priv->essid_len;
1295 memcpy(pos, priv->essid, priv->essid_len);
1296 pos += priv->essid_len;
1297 len += 2 + priv->essid_len;
1298 }
1299
1300 /* fill in supported rate */
1301 /* ...next IE... */
1302 left -= 2;
1303 if (left < 0)
1304 return 0;
c7c46676 1305
b481de9c
ZY		 1306 /* ... fill it in... */
1307 *pos++ = WLAN_EID_SUPP_RATES;
1308 *pos = 0;
c7c46676 1309
bee488db 1310 /* exclude 60M rate */
1311 active_rates = priv->rates_mask;
1312 active_rates &= ~IWL_RATE_60M_MASK;
1313
1314 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1315
c7c46676 1316 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1317 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1318 active_rate_basic, &left);
c7c46676
TW		 1319 active_rates &= ~ret_rates;
1320
bb8c093b 1321 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1322 active_rate_basic, &left);
c7c46676
TW		 1323 active_rates &= ~ret_rates;
1324
b481de9c
ZY		 1325 len += 2 + *pos;
1326 pos += (*pos) + 1;
c7c46676 1327 if (active_rates == 0)
b481de9c
ZY		 1328 goto fill_end;
1329
1330 /* fill in supported extended rate */
1331 /* ...next IE... */
1332 left -= 2;
1333 if (left < 0)
1334 return 0;
1335 /* ... fill it in... */
1336 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1337 *pos = 0;
bb8c093b 1338 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1339 active_rate_basic, &left);
b481de9c
ZY		 1340 if (*pos > 0)
1341 len += 2 + *pos;
1342
b481de9c 1343 fill_end:
d1141dfb
EG		 1344 /* fill in HT IE */
1345 left -= 2;
1346 if (left < 0)
1347 return 0;
1348
1349 *pos++ = WLAN_EID_HT_CAPABILITY;
1350 *pos = 0;
1351
1352 iwl_ht_cap_to_ie(sband, pos, &left);
1353
1354 if (*pos > 0)
1355 len += 2 + *pos;
b481de9c
ZY		 1356 return (u16)len;
1357}
1358
1359/*
1360 * QoS support
1361*/
c79dd5b5 1362static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1363 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 1364{
1365
857485c0 1366 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1367 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 1368}
1369
c79dd5b5 1370static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY		 1371{
1372 unsigned long flags;
1373
b481de9c
ZY		 1374 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1375 return;
1376
1377 if (!priv->qos_data.qos_enable)
1378 return;
1379
1380 spin_lock_irqsave(&priv->lock, flags);
1381 priv->qos_data.def_qos_parm.qos_flags = 0;
1382
1383 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1384 !priv->qos_data.qos_cap.q_AP.txop_request)
1385 priv->qos_data.def_qos_parm.qos_flags |=
1386 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 1387 if (priv->qos_data.qos_active)
1388 priv->qos_data.def_qos_parm.qos_flags |=
1389 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1390
c8b0e6e1 1391#ifdef CONFIG_IWL4965_HT
fd105e79 1392 if (priv->current_ht_config.is_ht)
f1f1f5c7 1393 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1394#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1395
b481de9c
ZY		 1396 spin_unlock_irqrestore(&priv->lock, flags);
1397
3109ece1 1398 if (force || iwl_is_associated(priv)) {
f1f1f5c7
TW		 1399 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1400 priv->qos_data.qos_active,
1401 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1402
bb8c093b 1403 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 1404 &(priv->qos_data.def_qos_parm));
1405 }
1406}
1407
c79dd5b5 1408int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 1409{
1410 /* Filter incoming packets to determine if they are targeted toward
1411 * this network, discarding packets coming from ourselves */
1412 switch (priv->iw_mode) {
1413 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1414 /* packets from our adapter are dropped (echo) */
1415 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1416 return 0;
1417 /* {broad,multi}cast packets to our IBSS go through */
1418 if (is_multicast_ether_addr(header->addr1))
1419 return !compare_ether_addr(header->addr3, priv->bssid);
1420 /* packets to our adapter go through */
1421 return !compare_ether_addr(header->addr1, priv->mac_addr);
1422 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1423 /* packets from our adapter are dropped (echo) */
1424 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1425 return 0;
1426 /* {broad,multi}cast packets to our BSS go through */
1427 if (is_multicast_ether_addr(header->addr1))
1428 return !compare_ether_addr(header->addr2, priv->bssid);
1429 /* packets to our adapter go through */
1430 return !compare_ether_addr(header->addr1, priv->mac_addr);
69dc5d9d
TW		 1431 default:
1432 break;
b481de9c
ZY		 1433 }
1434
1435 return 1;
1436}
1437
1438#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1439
bb8c093b 1440static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 1441{
1442 switch (status & TX_STATUS_MSK) {
1443 case TX_STATUS_SUCCESS:
1444 return "SUCCESS";
1445 TX_STATUS_ENTRY(SHORT_LIMIT);
1446 TX_STATUS_ENTRY(LONG_LIMIT);
1447 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1448 TX_STATUS_ENTRY(MGMNT_ABORT);
1449 TX_STATUS_ENTRY(NEXT_FRAG);
1450 TX_STATUS_ENTRY(LIFE_EXPIRE);
1451 TX_STATUS_ENTRY(DEST_PS);
1452 TX_STATUS_ENTRY(ABORTED);
1453 TX_STATUS_ENTRY(BT_RETRY);
1454 TX_STATUS_ENTRY(STA_INVALID);
1455 TX_STATUS_ENTRY(FRAG_DROPPED);
1456 TX_STATUS_ENTRY(TID_DISABLE);
1457 TX_STATUS_ENTRY(FRAME_FLUSHED);
1458 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1459 TX_STATUS_ENTRY(TX_LOCKED);
1460 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1461 }
1462
1463 return "UNKNOWN";
1464}
1465
1466/**
bb8c093b 1467 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 1468 *
1469 * NOTE: priv->mutex is not required before calling this function
1470 */
c79dd5b5 1471static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY		 1472{
1473 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1474 clear_bit(STATUS_SCANNING, &priv->status);
1475 return 0;
1476 }
1477
1478 if (test_bit(STATUS_SCANNING, &priv->status)) {
1479 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1480 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1481 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1482 queue_work(priv->workqueue, &priv->abort_scan);
1483
1484 } else
1485 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1486
1487 return test_bit(STATUS_SCANNING, &priv->status);
1488 }
1489
1490 return 0;
1491}
1492
1493/**
bb8c093b 1494 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 1495 * @ms: amount of time to wait (in milliseconds) for scan to abort
1496 *
1497 * NOTE: priv->mutex must be held before calling this function
1498 */
c79dd5b5 1499static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY		 1500{
1501 unsigned long now = jiffies;
1502 int ret;
1503
bb8c093b 1504 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 1505 if (ret && ms) {
1506 mutex_unlock(&priv->mutex);
1507 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1508 test_bit(STATUS_SCANNING, &priv->status))
1509 msleep(1);
1510 mutex_lock(&priv->mutex);
1511
1512 return test_bit(STATUS_SCANNING, &priv->status);
1513 }
1514
1515 return ret;
1516}
1517
c79dd5b5 1518static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY		 1519{
1520 /* Reset ieee stats */
1521
1522 /* We don't reset the net_device_stats (ieee->stats) on
1523 * re-association */
1524
1525 priv->last_seq_num = -1;
1526 priv->last_frag_num = -1;
1527 priv->last_packet_time = 0;
1528
bb8c093b 1529 iwl4965_scan_cancel(priv);
b481de9c
ZY		 1530}
1531
1532#define MAX_UCODE_BEACON_INTERVAL 4096
1533#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1534
bb8c093b 1535static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 1536{
1537 u16 new_val = 0;
1538 u16 beacon_factor = 0;
1539
1540 beacon_factor =
1541 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1542 / MAX_UCODE_BEACON_INTERVAL;
1543 new_val = beacon_val / beacon_factor;
1544
1545 return cpu_to_le16(new_val);
1546}
1547
c79dd5b5 1548static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY		 1549{
1550 u64 interval_tm_unit;
1551 u64 tsf, result;
1552 unsigned long flags;
1553 struct ieee80211_conf *conf = NULL;
1554 u16 beacon_int = 0;
1555
1556 conf = ieee80211_get_hw_conf(priv->hw);
1557
1558 spin_lock_irqsave(&priv->lock, flags);
3109ece1
TW		 1559 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
1560 priv->rxon_timing.timestamp.dw[0] =
1561 cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
b481de9c
ZY		 1562
1563 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1564
3109ece1 1565 tsf = priv->timestamp;
b481de9c
ZY		 1566
1567 beacon_int = priv->beacon_int;
1568 spin_unlock_irqrestore(&priv->lock, flags);
1569
1570 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1571 if (beacon_int == 0) {
1572 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1573 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1574 } else {
1575 priv->rxon_timing.beacon_interval =
1576 cpu_to_le16(beacon_int);
1577 priv->rxon_timing.beacon_interval =
bb8c093b 1578 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 1579 le16_to_cpu(priv->rxon_timing.beacon_interval));
1580 }
1581
1582 priv->rxon_timing.atim_window = 0;
1583 } else {
1584 priv->rxon_timing.beacon_interval =
bb8c093b 1585 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 1586 /* TODO: we need to get atim_window from upper stack
1587 * for now we set to 0 */
1588 priv->rxon_timing.atim_window = 0;
1589 }
1590
1591 interval_tm_unit =
1592 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1593 result = do_div(tsf, interval_tm_unit);
1594 priv->rxon_timing.beacon_init_val =
1595 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1596
1597 IWL_DEBUG_ASSOC
1598 ("beacon interval %d beacon timer %d beacon tim %d\n",
1599 le16_to_cpu(priv->rxon_timing.beacon_interval),
1600 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1601 le16_to_cpu(priv->rxon_timing.atim_window));
1602}
1603
c79dd5b5 1604static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY		 1605{
1606 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1607 IWL_ERROR("APs don't scan.\n");
1608 return 0;
1609 }
1610
fee1247a 1611 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 1612 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1613 return -EIO;
1614 }
1615
1616 if (test_bit(STATUS_SCANNING, &priv->status)) {
1617 IWL_DEBUG_SCAN("Scan already in progress.\n");
1618 return -EAGAIN;
1619 }
1620
1621 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1622 IWL_DEBUG_SCAN("Scan request while abort pending. "
1623 "Queuing.\n");
1624 return -EAGAIN;
1625 }
1626
1627 IWL_DEBUG_INFO("Starting scan...\n");
1628 priv->scan_bands = 2;
1629 set_bit(STATUS_SCANNING, &priv->status);
1630 priv->scan_start = jiffies;
1631 priv->scan_pass_start = priv->scan_start;
1632
1633 queue_work(priv->workqueue, &priv->request_scan);
1634
1635 return 0;
1636}
1637
b481de9c 1638
c79dd5b5 1639static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 1640 enum ieee80211_band band)
b481de9c 1641{
8318d78a 1642 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 1643 priv->staging_rxon.flags &=
1644 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1645 | RXON_FLG_CCK_MSK);
1646 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1647 } else {
508e32e1 1648 /* Copied from iwl4965_post_associate() */
b481de9c
ZY		 1649 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1650 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1651 else
1652 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1653
1654 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
1655 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1656
1657 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1658 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1659 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1660 }
1661}
1662
1663/*
01ebd063 1664 * initialize rxon structure with default values from eeprom
b481de9c 1665 */
c79dd5b5 1666static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 1667{
bf85ea4f 1668 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 1669
1670 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1671
1672 switch (priv->iw_mode) {
1673 case IEEE80211_IF_TYPE_AP:
1674 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1675 break;
1676
1677 case IEEE80211_IF_TYPE_STA:
1678 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1679 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1680 break;
1681
1682 case IEEE80211_IF_TYPE_IBSS:
1683 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1684 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1685 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1686 RXON_FILTER_ACCEPT_GRP_MSK;
1687 break;
1688
1689 case IEEE80211_IF_TYPE_MNTR:
1690 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1691 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1692 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1693 break;
69dc5d9d
TW		 1694 default:
1695 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
1696 break;
b481de9c
ZY		 1697 }
1698
1699#if 0
1700 /* TODO: Figure out when short_preamble would be set and cache from
1701 * that */
1702 if (!hw_to_local(priv->hw)->short_preamble)
1703 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1704 else
1705 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1706#endif
1707
8622e705 1708 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY		 1709 le16_to_cpu(priv->staging_rxon.channel));
1710
1711 if (!ch_info)
1712 ch_info = &priv->channel_info[0];
1713
1714 /*
1715 * in some case A channels are all non IBSS
1716 * in this case force B/G channel
1717 */
1718 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
1719 !(is_channel_ibss(ch_info)))
1720 ch_info = &priv->channel_info[0];
1721
1722 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 1723 priv->band = ch_info->band;
b481de9c 1724
8318d78a 1725 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 1726
1727 priv->staging_rxon.ofdm_basic_rates =
1728 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1729 priv->staging_rxon.cck_basic_rates =
1730 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1731
1732 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
1733 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
1734 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1735 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1736 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1737 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
c7de35cd 1738 iwl_set_rxon_chain(priv);
b481de9c
ZY		 1739}
1740
c79dd5b5 1741static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 1742{
b481de9c 1743 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 1744 const struct iwl_channel_info *ch_info;
b481de9c 1745
8622e705 1746 ch_info = iwl_get_channel_info(priv,
8318d78a 1747 priv->band,
b481de9c
ZY		 1748 le16_to_cpu(priv->staging_rxon.channel));
1749
1750 if (!ch_info || !is_channel_ibss(ch_info)) {
1751 IWL_ERROR("channel %d not IBSS channel\n",
1752 le16_to_cpu(priv->staging_rxon.channel));
1753 return -EINVAL;
1754 }
1755 }
1756
b481de9c
ZY		 1757 priv->iw_mode = mode;
1758
bb8c093b 1759 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 1760 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1761
bf85ea4f 1762 iwlcore_clear_stations_table(priv);
b481de9c 1763
fde3571f 1764 /* dont commit rxon if rf-kill is on*/
fee1247a 1765 if (!iwl_is_ready_rf(priv))
fde3571f
MA		 1766 return -EAGAIN;
1767
1768 cancel_delayed_work(&priv->scan_check);
1769 if (iwl4965_scan_cancel_timeout(priv, 100)) {
1770 IWL_WARNING("Aborted scan still in progress after 100ms\n");
1771 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
1772 return -EAGAIN;
1773 }
1774
bb8c093b 1775 iwl4965_commit_rxon(priv);
b481de9c
ZY		 1776
1777 return 0;
1778}
1779
c79dd5b5 1780static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 1781 struct ieee80211_tx_control *ctl,
857485c0 1782 struct iwl_cmd *cmd,
b481de9c 1783 struct sk_buff *skb_frag,
deb09c43 1784 int sta_id)
b481de9c 1785{
deb09c43 1786 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
6974e363
EG		 1787 struct iwl_wep_key *wepkey;
1788 int keyidx = 0;
1789
1c014420 1790 BUG_ON(ctl->hw_key->hw_key_idx > 3);
b481de9c
ZY		 1791
1792 switch (keyinfo->alg) {
1793 case ALG_CCMP:
1794 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
1795 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS		 1796 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
1797 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY		 1798 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
1799 break;
1800
1801 case ALG_TKIP:
b481de9c 1802 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG		 1803 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
1804 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
1805 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY		 1806 break;
1807
1808 case ALG_WEP:
1c014420 1809 wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx];
6974e363
EG		 1810 cmd->cmd.tx.sec_ctl = 0;
1811 if (priv->default_wep_key) {
1812 /* the WEP key was sent as static */
1c014420 1813 keyidx = ctl->hw_key->hw_key_idx;
6974e363
EG		 1814 memcpy(&cmd->cmd.tx.key[3], wepkey->key,
1815 wepkey->key_size);
1816 if (wepkey->key_size == WEP_KEY_LEN_128)
1817 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
1818 } else {
0211ddda
EG		 1819 /* the WEP key was sent as dynamic */
1820 keyidx = keyinfo->keyidx;
1821 memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
1822 keyinfo->keylen);
1823 if (keyinfo->keylen == WEP_KEY_LEN_128)
1824 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
6974e363 1825 }
b481de9c 1826
6974e363
EG		 1827 cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
1828 (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
b481de9c
ZY		 1829
1830 IWL_DEBUG_TX("Configuring packet for WEP encryption "
6974e363 1831 "with key %d\n", keyidx);
b481de9c
ZY		 1832 break;
1833
b481de9c
ZY		 1834 default:
1835 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
1836 break;
1837 }
1838}
1839
1840/*
1841 * handle build REPLY_TX command notification.
1842 */
c79dd5b5 1843static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 1844 struct iwl_cmd *cmd,
b481de9c
ZY		 1845 struct ieee80211_tx_control *ctrl,
1846 struct ieee80211_hdr *hdr,
1847 int is_unicast, u8 std_id)
1848{
1849 __le16 *qc;
1850 u16 fc = le16_to_cpu(hdr->frame_control);
1851 __le32 tx_flags = cmd->cmd.tx.tx_flags;
1852
1853 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1854 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
1855 tx_flags |= TX_CMD_FLG_ACK_MSK;
1856 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
1857 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1858 if (ieee80211_is_probe_response(fc) &&
1859 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1860 tx_flags |= TX_CMD_FLG_TSF_MSK;
1861 } else {
1862 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1863 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1864 }
1865
87e4f7df
TW		 1866 if (ieee80211_is_back_request(fc))
1867 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1868
1869
b481de9c
ZY		 1870 cmd->cmd.tx.sta_id = std_id;
1871 if (ieee80211_get_morefrag(hdr))
1872 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1873
1874 qc = ieee80211_get_qos_ctrl(hdr);
1875 if (qc) {
1876 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
1877 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1878 } else
1879 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1880
1881 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
1882 tx_flags |= TX_CMD_FLG_RTS_MSK;
1883 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
1884 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
1885 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1886 tx_flags |= TX_CMD_FLG_CTS_MSK;
1887 }
1888
1889 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
1890 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
1891
1892 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1893 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1894 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
1895 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 1896 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 1897 else
bc434dd2 1898 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
ab53d8af 1899 } else {
b481de9c 1900 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
ab53d8af 1901 }
b481de9c
ZY		 1902
1903 cmd->cmd.tx.driver_txop = 0;
1904 cmd->cmd.tx.tx_flags = tx_flags;
1905 cmd->cmd.tx.next_frame_len = 0;
1906}
19758bef
TW		 1907static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
1908{
1909 /* 0 - mgmt, 1 - cnt, 2 - data */
1910 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
1911 priv->tx_stats[idx].cnt++;
1912 priv->tx_stats[idx].bytes += len;
1913}
6440adb5
CB		 1914/**
1915 * iwl4965_get_sta_id - Find station's index within station table
1916 *
1917 * If new IBSS station, create new entry in station table
1918 */
c79dd5b5 1919static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 1920 struct ieee80211_hdr *hdr)
b481de9c
ZY		 1921{
1922 int sta_id;
1923 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 1924 DECLARE_MAC_BUF(mac);
b481de9c 1925
6440adb5 1926 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 1927 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
1928 is_multicast_ether_addr(hdr->addr1))
5425e490 1929 return priv->hw_params.bcast_sta_id;
b481de9c
ZY		 1930
1931 switch (priv->iw_mode) {
1932
6440adb5
CB		 1933 /* If we are a client station in a BSS network, use the special
1934 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 1935 case IEEE80211_IF_TYPE_STA:
1936 return IWL_AP_ID;
1937
1938 /* If we are an AP, then find the station, or use BCAST */
1939 case IEEE80211_IF_TYPE_AP:
947b13a7 1940 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY		 1941 if (sta_id != IWL_INVALID_STATION)
1942 return sta_id;
5425e490 1943 return priv->hw_params.bcast_sta_id;
b481de9c 1944
6440adb5
CB		 1945 /* If this frame is going out to an IBSS network, find the station,
1946 * or create a new station table entry */
b481de9c 1947 case IEEE80211_IF_TYPE_IBSS:
947b13a7 1948 sta_id = iwl_find_station(priv, hdr->addr1);
b481de9c
ZY		 1949 if (sta_id != IWL_INVALID_STATION)
1950 return sta_id;
1951
6440adb5 1952 /* Create new station table entry */
67d62035
RR		 1953 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
1954 0, CMD_ASYNC, NULL);
b481de9c
ZY		 1955
1956 if (sta_id != IWL_INVALID_STATION)
1957 return sta_id;
1958
0795af57 1959 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 1960 "Defaulting to broadcast...\n",
0795af57 1961 print_mac(mac, hdr->addr1));
0a6857e7 1962 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
5425e490 1963 return priv->hw_params.bcast_sta_id;
b481de9c
ZY		 1964
1965 default:
01ebd063 1966 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
5425e490 1967 return priv->hw_params.bcast_sta_id;
b481de9c
ZY		 1968 }
1969}
1970
1971/*
1972 * start REPLY_TX command process
1973 */
c79dd5b5 1974static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY		 1975 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
1976{
1977 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 1978 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 1979 u32 *control_flags;
1980 int txq_id = ctl->queue;
bb8c093b
CH		 1981 struct iwl4965_tx_queue *txq = NULL;
1982 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 1983 dma_addr_t phys_addr;
1984 dma_addr_t txcmd_phys;
87e4f7df 1985 dma_addr_t scratch_phys;
857485c0 1986 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY		 1987 u16 len, idx, len_org;
1988 u8 id, hdr_len, unicast;
1989 u8 sta_id;
1990 u16 seq_number = 0;
1991 u16 fc;
1992 __le16 *qc;
1993 u8 wait_write_ptr = 0;
1994 unsigned long flags;
1995 int rc;
1996
1997 spin_lock_irqsave(&priv->lock, flags);
fee1247a 1998 if (iwl_is_rfkill(priv)) {
b481de9c
ZY		 1999 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2000 goto drop_unlock;
2001 }
2002
32bfd35d
JB		 2003 if (!priv->vif) {
2004 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2005 goto drop_unlock;
2006 }
2007
8318d78a 2008 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2009 IWL_ERROR("ERROR: No TX rate available.\n");
2010 goto drop_unlock;
2011 }
2012
2013 unicast = !is_multicast_ether_addr(hdr->addr1);
2014 id = 0;
2015
2016 fc = le16_to_cpu(hdr->frame_control);
2017
0a6857e7 2018#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2019 if (ieee80211_is_auth(fc))
2020 IWL_DEBUG_TX("Sending AUTH frame\n");
2021 else if (ieee80211_is_assoc_request(fc))
2022 IWL_DEBUG_TX("Sending ASSOC frame\n");
2023 else if (ieee80211_is_reassoc_request(fc))
2024 IWL_DEBUG_TX("Sending REASSOC frame\n");
2025#endif
2026
7878a5a4 2027 /* drop all data frame if we are not associated */
76f3915b 2028 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
3109ece1 2029 (!iwl_is_associated(priv) ||
a6477249 2030 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2031 !priv->assoc_station_added)) {
3109ece1 2032 IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
b481de9c
ZY		 2033 goto drop_unlock;
2034 }
2035
2036 spin_unlock_irqrestore(&priv->lock, flags);
2037
2038 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
CB		 2039
2040 /* Find (or create) index into station table for destination station */
bb8c093b 2041 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2042 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2043 DECLARE_MAC_BUF(mac);
2044
2045 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2046 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2047 goto drop;
2048 }
2049
07bc28ed 2050 IWL_DEBUG_TX("station Id %d\n", sta_id);
b481de9c
ZY		 2051
2052 qc = ieee80211_get_qos_ctrl(hdr);
2053 if (qc) {
2054 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2055 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2056 IEEE80211_SCTL_SEQ;
2057 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2058 (hdr->seq_ctrl &
2059 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2060 seq_number += 0x10;
c8b0e6e1 2061#ifdef CONFIG_IWL4965_HT
b481de9c 2062 /* aggregation is on for this <sta,tid> */
fe01b477 2063 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2064 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2065 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2066#endif /* CONFIG_IWL4965_HT */
b481de9c 2067 }
6440adb5
CB		 2068
2069 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2070 txq = &priv->txq[txq_id];
2071 q = &txq->q;
2072
2073 spin_lock_irqsave(&priv->lock, flags);
2074
6440adb5 2075 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2076 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2077 memset(tfd, 0, sizeof(*tfd));
2078 control_flags = (u32 *) tfd;
fc4b6853 2079 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2080
6440adb5 2081 /* Set up driver data for this TFD */
bb8c093b 2082 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2083 txq->txb[q->write_ptr].skb[0] = skb;
2084 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2085 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
CB		 2086
2087 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2088 out_cmd = &txq->cmd[idx];
2089 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2090 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
CB		 2091
2092 /*
2093 * Set up the Tx-command (not MAC!) header.
2094 * Store the chosen Tx queue and TFD index within the sequence field;
2095 * after Tx, uCode's Tx response will return this value so driver can
2096 * locate the frame within the tx queue and do post-tx processing.
2097 */
b481de9c
ZY		 2098 out_cmd->hdr.cmd = REPLY_TX;
2099 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2100 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
CB		 2101
2102 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 2103 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2104
6440adb5
CB		 2105 /*
2106 * Use the first empty entry in this queue's command buffer array
2107 * to contain the Tx command and MAC header concatenated together
2108 * (payload data will be in another buffer).
2109 * Size of this varies, due to varying MAC header length.
2110 * If end is not dword aligned, we'll have 2 extra bytes at the end
2111 * of the MAC header (device reads on dword boundaries).
2112 * We'll tell device about this padding later.
2113 */
5425e490 2114 len = priv->hw_params.tx_cmd_len +
857485c0 2115 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY		 2116
2117 len_org = len;
2118 len = (len + 3) & ~3;
2119
2120 if (len_org != len)
2121 len_org = 1;
2122 else
2123 len_org = 0;
2124
6440adb5
CB		 2125 /* Physical address of this Tx command's header (not MAC header!),
2126 * within command buffer array. */
857485c0
TW		 2127 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2128 offsetof(struct iwl_cmd, hdr);
b481de9c 2129
6440adb5
CB		 2130 /* Add buffer containing Tx command and MAC(!) header to TFD's
2131 * first entry */
bb8c093b 2132 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 2133
2134 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2135 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2136
6440adb5
CB		 2137 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2138 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 2139 len = skb->len - hdr_len;
2140 if (len) {
2141 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2142 len, PCI_DMA_TODEVICE);
bb8c093b 2143 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 2144 }
2145
6440adb5 2146 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 2147 if (len_org)
2148 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2149
6440adb5 2150 /* Total # bytes to be transmitted */
b481de9c
ZY		 2151 len = (u16)skb->len;
2152 out_cmd->cmd.tx.len = cpu_to_le16(len);
2153
2154 /* TODO need this for burst mode later on */
bb8c093b 2155 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 2156
2157 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2158 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2159
19758bef
TW		 2160 iwl_update_tx_stats(priv, fc, len);
2161
857485c0 2162 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW		 2163 offsetof(struct iwl4965_tx_cmd, scratch);
2164 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2165 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2166
b481de9c
ZY		 2167 if (!ieee80211_get_morefrag(hdr)) {
2168 txq->need_update = 1;
2169 if (qc) {
2170 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2171 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2172 }
2173 } else {
2174 wait_write_ptr = 1;
2175 txq->need_update = 0;
2176 }
2177
0a6857e7 2178 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 2179 sizeof(out_cmd->cmd.tx));
2180
0a6857e7 2181 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 2182 ieee80211_get_hdrlen(fc));
2183
6440adb5 2184 /* Set up entry for this TFD in Tx byte-count array */
e2a722eb 2185 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
b481de9c 2186
6440adb5 2187 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2188 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2189 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2190 spin_unlock_irqrestore(&priv->lock, flags);
2191
2192 if (rc)
2193 return rc;
2194
bb8c093b 2195 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 2196 && priv->mac80211_registered) {
2197 if (wait_write_ptr) {
2198 spin_lock_irqsave(&priv->lock, flags);
2199 txq->need_update = 1;
bb8c093b 2200 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2201 spin_unlock_irqrestore(&priv->lock, flags);
2202 }
2203
2204 ieee80211_stop_queue(priv->hw, ctl->queue);
2205 }
2206
2207 return 0;
2208
2209drop_unlock:
2210 spin_unlock_irqrestore(&priv->lock, flags);
2211drop:
2212 return -1;
2213}
2214
c79dd5b5 2215static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2216{
8318d78a 2217 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 2218 struct ieee80211_rate *rate;
2219 int i;
2220
d1141dfb 2221 hw = iwl_get_hw_mode(priv, priv->band);
c4ba9621
SA		 2222 if (!hw) {
2223 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2224 return;
2225 }
b481de9c
ZY		 2226
2227 priv->active_rate = 0;
2228 priv->active_rate_basic = 0;
2229
8318d78a
JB		 2230 for (i = 0; i < hw->n_bitrates; i++) {
2231 rate = &(hw->bitrates[i]);
2232 if (rate->hw_value < IWL_RATE_COUNT)
2233 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 2234 }
2235
2236 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2237 priv->active_rate, priv->active_rate_basic);
2238
2239 /*
2240 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2241 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2242 * OFDM
2243 */
2244 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2245 priv->staging_rxon.cck_basic_rates =
2246 ((priv->active_rate_basic &
2247 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2248 else
2249 priv->staging_rxon.cck_basic_rates =
2250 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2251
2252 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2253 priv->staging_rxon.ofdm_basic_rates =
2254 ((priv->active_rate_basic &
2255 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2256 IWL_FIRST_OFDM_RATE) & 0xFF;
2257 else
2258 priv->staging_rxon.ofdm_basic_rates =
2259 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2260}
2261
ad97edd2 2262void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY		 2263{
2264 unsigned long flags;
2265
2266 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2267 return;
2268
2269 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2270 disable_radio ? "OFF" : "ON");
2271
2272 if (disable_radio) {
bb8c093b 2273 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2274 /* FIXME: This is a workaround for AP */
2275 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2276 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2277 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 2278 CSR_UCODE_SW_BIT_RFKILL);
2279 spin_unlock_irqrestore(&priv->lock, flags);
ad97edd2 2280 /* call the host command only if no hw rf-kill set */
59003835
MA		 2281 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
2282 iwl_is_ready(priv))
ad97edd2
MA		 2283 iwl4965_send_card_state(priv,
2284 CARD_STATE_CMD_DISABLE,
2285 0);
b481de9c 2286 set_bit(STATUS_RF_KILL_SW, &priv->status);
ad97edd2
MA		 2287
2288 /* make sure mac80211 stop sending Tx frame */
2289 if (priv->mac80211_registered)
2290 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 2291 }
2292 return;
2293 }
2294
2295 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 2296 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2297
2298 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2299 spin_unlock_irqrestore(&priv->lock, flags);
2300
2301 /* wake up ucode */
2302 msleep(10);
2303
2304 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 2305 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2306 if (!iwl_grab_nic_access(priv))
2307 iwl_release_nic_access(priv);
b481de9c
ZY		 2308 spin_unlock_irqrestore(&priv->lock, flags);
2309
2310 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2311 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2312 "disabled by HW switch\n");
2313 return;
2314 }
2315
2316 queue_work(priv->workqueue, &priv->restart);
2317 return;
2318}
2319
b481de9c
ZY		 2320#define IWL_PACKET_RETRY_TIME HZ
2321
c79dd5b5 2322int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2323{
2324 u16 sc = le16_to_cpu(header->seq_ctrl);
2325 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2326 u16 frag = sc & IEEE80211_SCTL_FRAG;
2327 u16 *last_seq, *last_frag;
2328 unsigned long *last_time;
2329
2330 switch (priv->iw_mode) {
2331 case IEEE80211_IF_TYPE_IBSS:{
2332 struct list_head *p;
bb8c093b 2333 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 2334 u8 *mac = header->addr2;
2335 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2336
2337 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2338 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 2339 if (!compare_ether_addr(entry->mac, mac))
2340 break;
2341 }
2342 if (p == &priv->ibss_mac_hash[index]) {
2343 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2344 if (!entry) {
bc434dd2 2345 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 2346 return 0;
2347 }
2348 memcpy(entry->mac, mac, ETH_ALEN);
2349 entry->seq_num = seq;
2350 entry->frag_num = frag;
2351 entry->packet_time = jiffies;
bc434dd2 2352 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 2353 return 0;
2354 }
2355 last_seq = &entry->seq_num;
2356 last_frag = &entry->frag_num;
2357 last_time = &entry->packet_time;
2358 break;
2359 }
2360 case IEEE80211_IF_TYPE_STA:
2361 last_seq = &priv->last_seq_num;
2362 last_frag = &priv->last_frag_num;
2363 last_time = &priv->last_packet_time;
2364 break;
2365 default:
2366 return 0;
2367 }
2368 if ((*last_seq == seq) &&
2369 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2370 if (*last_frag == frag)
2371 goto drop;
2372 if (*last_frag + 1 != frag)
2373 /* out-of-order fragment */
2374 goto drop;
2375 } else
2376 *last_seq = seq;
2377
2378 *last_frag = frag;
2379 *last_time = jiffies;
2380 return 0;
2381
2382 drop:
2383 return 1;
2384}
2385
c8b0e6e1 2386#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 2387
2388#include "iwl-spectrum.h"
2389
2390#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2391#define BEACON_TIME_MASK_HIGH 0xFF000000
2392#define TIME_UNIT 1024
2393
2394/*
2395 * extended beacon time format
2396 * time in usec will be changed into a 32-bit value in 8:24 format
2397 * the high 1 byte is the beacon counts
2398 * the lower 3 bytes is the time in usec within one beacon interval
2399 */
2400
bb8c093b 2401static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 2402{
2403 u32 quot;
2404 u32 rem;
2405 u32 interval = beacon_interval * 1024;
2406
2407 if (!interval || !usec)
2408 return 0;
2409
2410 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2411 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2412
2413 return (quot << 24) + rem;
2414}
2415
2416/* base is usually what we get from ucode with each received frame,
2417 * the same as HW timer counter counting down
2418 */
2419
bb8c093b 2420static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 2421{
2422 u32 base_low = base & BEACON_TIME_MASK_LOW;
2423 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2424 u32 interval = beacon_interval * TIME_UNIT;
2425 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2426 (addon & BEACON_TIME_MASK_HIGH);
2427
2428 if (base_low > addon_low)
2429 res += base_low - addon_low;
2430 else if (base_low < addon_low) {
2431 res += interval + base_low - addon_low;
2432 res += (1 << 24);
2433 } else
2434 res += (1 << 24);
2435
2436 return cpu_to_le32(res);
2437}
2438
c79dd5b5 2439static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY		 2440 struct ieee80211_measurement_params *params,
2441 u8 type)
2442{
bb8c093b
CH		 2443 struct iwl4965_spectrum_cmd spectrum;
2444 struct iwl4965_rx_packet *res;
857485c0 2445 struct iwl_host_cmd cmd = {
b481de9c
ZY		 2446 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2447 .data = (void *)&spectrum,
2448 .meta.flags = CMD_WANT_SKB,
2449 };
2450 u32 add_time = le64_to_cpu(params->start_time);
2451 int rc;
2452 int spectrum_resp_status;
2453 int duration = le16_to_cpu(params->duration);
2454
3109ece1 2455 if (iwl_is_associated(priv))
b481de9c 2456 add_time =
bb8c093b 2457 iwl4965_usecs_to_beacons(
b481de9c
ZY		 2458 le64_to_cpu(params->start_time) - priv->last_tsf,
2459 le16_to_cpu(priv->rxon_timing.beacon_interval));
2460
2461 memset(&spectrum, 0, sizeof(spectrum));
2462
2463 spectrum.channel_count = cpu_to_le16(1);
2464 spectrum.flags =
2465 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2466 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2467 cmd.len = sizeof(spectrum);
2468 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2469
3109ece1 2470 if (iwl_is_associated(priv))
b481de9c 2471 spectrum.start_time =
bb8c093b 2472 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 2473 add_time,
2474 le16_to_cpu(priv->rxon_timing.beacon_interval));
2475 else
2476 spectrum.start_time = 0;
2477
2478 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2479 spectrum.channels[0].channel = params->channel;
2480 spectrum.channels[0].type = type;
2481 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2482 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2483 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2484
857485c0 2485 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 2486 if (rc)
2487 return rc;
2488
bb8c093b 2489 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 2490 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2491 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2492 rc = -EIO;
2493 }
2494
2495 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2496 switch (spectrum_resp_status) {
2497 case 0: /* Command will be handled */
2498 if (res->u.spectrum.id != 0xff) {
2499 IWL_DEBUG_INFO
2500 ("Replaced existing measurement: %d\n",
2501 res->u.spectrum.id);
2502 priv->measurement_status &= ~MEASUREMENT_READY;
2503 }
2504 priv->measurement_status |= MEASUREMENT_ACTIVE;
2505 rc = 0;
2506 break;
2507
2508 case 1: /* Command will not be handled */
2509 rc = -EAGAIN;
2510 break;
2511 }
2512
2513 dev_kfree_skb_any(cmd.meta.u.skb);
2514
2515 return rc;
2516}
2517#endif
2518
c79dd5b5 2519static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2520 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 2521{
2522
2523 tx_sta->status.ack_signal = 0;
2524 tx_sta->status.excessive_retries = 0;
2525 tx_sta->status.queue_length = 0;
2526 tx_sta->status.queue_number = 0;
2527
2528 if (in_interrupt())
2529 ieee80211_tx_status_irqsafe(priv->hw,
2530 tx_sta->skb[0], &(tx_sta->status));
2531 else
2532 ieee80211_tx_status(priv->hw,
2533 tx_sta->skb[0], &(tx_sta->status));
2534
2535 tx_sta->skb[0] = NULL;
2536}
2537
2538/**
6440adb5 2539 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2540 *
6440adb5
CB		 2541 * When FW advances 'R' index, all entries between old and new 'R' index
2542 * need to be reclaimed. As result, some free space forms. If there is
2543 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2544 */
c79dd5b5 2545int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2546{
bb8c093b
CH		 2547 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2548 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 2549 int nfreed = 0;
2550
2551 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2552 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2553 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2554 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 2555 return 0;
2556 }
2557
c54b679d 2558 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2559 q->read_ptr != index;
c54b679d 2560 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2561 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2562 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2563 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2564 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 2565 } else if (nfreed > 1) {
2566 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2567 q->write_ptr, q->read_ptr);
b481de9c
ZY		 2568 queue_work(priv->workqueue, &priv->restart);
2569 }
2570 nfreed++;
2571 }
2572
fe01b477 2573/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 2574 (txq_id != IWL_CMD_QUEUE_NUM) &&
2575 priv->mac80211_registered)
fe01b477 2576 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY		 2577
2578
2579 return nfreed;
2580}
2581
bb8c093b 2582static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 2583{
2584 status &= TX_STATUS_MSK;
2585 return (status == TX_STATUS_SUCCESS)
2586 || (status == TX_STATUS_DIRECT_DONE);
2587}
2588
2589/******************************************************************************
2590 *
2591 * Generic RX handler implementations
2592 *
2593 ******************************************************************************/
c8b0e6e1 2594#ifdef CONFIG_IWL4965_HT
b481de9c 2595
c79dd5b5 2596static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY		 2597 struct ieee80211_hdr *hdr)
2598{
2599 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2600 return IWL_AP_ID;
2601 else {
2602 u8 *da = ieee80211_get_DA(hdr);
947b13a7 2603 return iwl_find_station(priv, da);
b481de9c
ZY		 2604 }
2605}
2606
bb8c093b 2607static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2608 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY		 2609{
2610 if (priv->txq[txq_id].txb[idx].skb[0])
2611 return (struct ieee80211_hdr *)priv->txq[txq_id].
2612 txb[idx].skb[0]->data;
2613 return NULL;
2614}
2615
bb8c093b 2616static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 2617{
2618 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2619 tx_resp->frame_count);
2620 return le32_to_cpu(*scd_ssn) & MAX_SN;
2621
2622}
6440adb5
CB		 2623
2624/**
2625 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2626 */
c79dd5b5 2627static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2628 struct iwl4965_ht_agg *agg,
fe01b477 2629 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 2630 u16 start_idx)
2631{
fe01b477
RR		 2632 u16 status;
2633 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 2634 struct ieee80211_tx_status *tx_status = NULL;
2635 struct ieee80211_hdr *hdr = NULL;
2636 int i, sh;
2637 int txq_id, idx;
2638 u16 seq;
2639
2640 if (agg->wait_for_ba)
6440adb5 2641 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 2642
2643 agg->frame_count = tx_resp->frame_count;
2644 agg->start_idx = start_idx;
2645 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2646 agg->bitmap = 0;
b481de9c 2647
6440adb5 2648 /* # frames attempted by Tx command */
b481de9c 2649 if (agg->frame_count == 1) {
6440adb5 2650 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 2651 status = le16_to_cpu(frame_status[0].status);
2652 seq = le16_to_cpu(frame_status[0].sequence);
2653 idx = SEQ_TO_INDEX(seq);
2654 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 2655
b481de9c 2656 /* FIXME: code repetition */
fe01b477
RR		 2657 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2658 agg->frame_count, agg->start_idx, idx);
b481de9c 2659
fe01b477 2660 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY		 2661 tx_status->retry_count = tx_resp->failure_frame;
2662 tx_status->queue_number = status & 0xff;
fe01b477
RR		 2663 tx_status->queue_length = tx_resp->failure_rts;
2664 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 2665 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 2666 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 2667 iwl4965_hwrate_to_tx_control(priv,
2668 le32_to_cpu(tx_resp->rate_n_flags),
2669 &tx_status->control);
b481de9c
ZY		 2670 /* FIXME: code repetition end */
2671
2672 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2673 status & 0xff, tx_resp->failure_frame);
2674 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 2675 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 2676
2677 agg->wait_for_ba = 0;
2678 } else {
6440adb5 2679 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 2680 u64 bitmap = 0;
2681 int start = agg->start_idx;
2682
6440adb5 2683 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 2684 for (i = 0; i < agg->frame_count; i++) {
2685 u16 sc;
fe01b477
RR		 2686 status = le16_to_cpu(frame_status[i].status);
2687 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 2688 idx = SEQ_TO_INDEX(seq);
2689 txq_id = SEQ_TO_QUEUE(seq);
2690
2691 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2692 AGG_TX_STATE_ABORT_MSK))
2693 continue;
2694
2695 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2696 agg->frame_count, txq_id, idx);
2697
bb8c093b 2698 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 2699
2700 sc = le16_to_cpu(hdr->seq_ctrl);
2701 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2702 IWL_ERROR("BUG_ON idx doesn't match seq control"
2703 " idx=%d, seq_idx=%d, seq=%d\n",
2704 idx, SEQ_TO_SN(sc),
2705 hdr->seq_ctrl);
2706 return -1;
2707 }
2708
2709 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2710 i, idx, SEQ_TO_SN(sc));
2711
2712 sh = idx - start;
2713 if (sh > 64) {
2714 sh = (start - idx) + 0xff;
2715 bitmap = bitmap << sh;
2716 sh = 0;
2717 start = idx;
2718 } else if (sh < -64)
2719 sh = 0xff - (start - idx);
2720 else if (sh < 0) {
2721 sh = start - idx;
2722 start = idx;
2723 bitmap = bitmap << sh;
2724 sh = 0;
2725 }
2726 bitmap |= (1 << sh);
2727 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2728 start, (u32)(bitmap & 0xFFFFFFFF));
2729 }
2730
fe01b477 2731 agg->bitmap = bitmap;
b481de9c
ZY		 2732 agg->start_idx = start;
2733 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 2734 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 2735 agg->frame_count, agg->start_idx,
06501d29 2736 (unsigned long long)agg->bitmap);
b481de9c
ZY		 2737
2738 if (bitmap)
2739 agg->wait_for_ba = 1;
2740 }
2741 return 0;
2742}
2743#endif
b481de9c 2744
6440adb5
CB		 2745/**
2746 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2747 */
c79dd5b5 2748static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 2749 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2750{
bb8c093b 2751 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2752 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2753 int txq_id = SEQ_TO_QUEUE(sequence);
2754 int index = SEQ_TO_INDEX(sequence);
bb8c093b 2755 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 2756 struct ieee80211_tx_status *tx_status;
bb8c093b 2757 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 2758 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 2759#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 2760 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2761 struct ieee80211_hdr *hdr;
2762 __le16 *qc;
b481de9c
ZY		 2763#endif
2764
2765 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
2766 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2767 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 2768 index, txq->q.n_bd, txq->q.write_ptr,
2769 txq->q.read_ptr);
b481de9c
ZY		 2770 return;
2771 }
2772
c8b0e6e1 2773#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 2774 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
2775 qc = ieee80211_get_qos_ctrl(hdr);
2776
2777 if (qc)
2778 tid = le16_to_cpu(*qc) & 0xf;
2779
2780 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
2781 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2782 IWL_ERROR("Station not known\n");
2783 return;
2784 }
2785
b481de9c 2786 if (txq->sched_retry) {
bb8c093b 2787 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 2788 struct iwl4965_ht_agg *agg = NULL;
b481de9c 2789
fe01b477 2790 if (!qc)
b481de9c 2791 return;
b481de9c
ZY		 2792
2793 agg = &priv->stations[sta_id].tid[tid].agg;
2794
fe01b477
RR		 2795 iwl4965_tx_status_reply_tx(priv, agg,
2796 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 2797
2798 if ((tx_resp->frame_count == 1) &&
bb8c093b 2799 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 2800 /* TODO: send BAR */
2801 }
2802
fe01b477
RR		 2803 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2804 int freed;
c54b679d 2805 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 2806 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2807 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 2808 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2809 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2810
2811 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2812 txq_id >= 0 && priv->mac80211_registered &&
2813 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
2814 ieee80211_wake_queue(priv->hw, txq_id);
2815
2816 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 2817 }
2818 } else {
c8b0e6e1 2819#endif /* CONFIG_IWL4965_HT */
fc4b6853 2820 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 2821
2822 tx_status->retry_count = tx_resp->failure_frame;
2823 tx_status->queue_number = status;
2824 tx_status->queue_length = tx_resp->bt_kill_count;
2825 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 2826 tx_status->flags =
bb8c093b 2827 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 2828 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
2829 &tx_status->control);
b481de9c 2830
b481de9c 2831 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 2832 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 2833 status, le32_to_cpu(tx_resp->rate_n_flags),
2834 tx_resp->failure_frame);
2835
2836 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 2837 if (index != -1) {
2838 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
2839#ifdef CONFIG_IWL4965_HT
2840 if (tid != MAX_TID_COUNT)
2841 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2842 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
2843 (txq_id >= 0) &&
2844 priv->mac80211_registered)
2845 ieee80211_wake_queue(priv->hw, txq_id);
2846 if (tid != MAX_TID_COUNT)
2847 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
2848#endif
2849 }
c8b0e6e1 2850#ifdef CONFIG_IWL4965_HT
b481de9c 2851 }
c8b0e6e1 2852#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 2853
2854 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2855 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2856}
2857
2858
c79dd5b5 2859static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 2860 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2861{
bb8c093b
CH		 2862 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2863 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 2864 struct delayed_work *pwork;
2865
2866 palive = &pkt->u.alive_frame;
2867
2868 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2869 "0x%01X 0x%01X\n",
2870 palive->is_valid, palive->ver_type,
2871 palive->ver_subtype);
2872
2873 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2874 IWL_DEBUG_INFO("Initialization Alive received.\n");
2875 memcpy(&priv->card_alive_init,
2876 &pkt->u.alive_frame,
bb8c093b 2877 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 2878 pwork = &priv->init_alive_start;
2879 } else {
2880 IWL_DEBUG_INFO("Runtime Alive received.\n");
2881 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 2882 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 2883 pwork = &priv->alive_start;
2884 }
2885
2886 /* We delay the ALIVE response by 5ms to
2887 * give the HW RF Kill time to activate... */
2888 if (palive->is_valid == UCODE_VALID_OK)
2889 queue_delayed_work(priv->workqueue, pwork,
2890 msecs_to_jiffies(5));
2891 else
2892 IWL_WARNING("uCode did not respond OK.\n");
2893}
2894
c79dd5b5 2895static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 2896 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2897{
bb8c093b 2898 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2899
2900 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2901 return;
2902}
2903
c79dd5b5 2904static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 2905 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2906{
bb8c093b 2907 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2908
2909 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2910 "seq 0x%04X ser 0x%08X\n",
2911 le32_to_cpu(pkt->u.err_resp.error_type),
2912 get_cmd_string(pkt->u.err_resp.cmd_id),
2913 pkt->u.err_resp.cmd_id,
2914 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2915 le32_to_cpu(pkt->u.err_resp.error_info));
2916}
2917
2918#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2919
c79dd5b5 2920static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2921{
bb8c093b
CH		 2922 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2923 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
2924 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 2925 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2926 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2927 rxon->channel = csa->channel;
2928 priv->staging_rxon.channel = csa->channel;
2929}
2930
c79dd5b5 2931static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 2932 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2933{
c8b0e6e1 2934#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 2935 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2936 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 2937
2938 if (!report->state) {
2939 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2940 "Spectrum Measure Notification: Start\n");
2941 return;
2942 }
2943
2944 memcpy(&priv->measure_report, report, sizeof(*report));
2945 priv->measurement_status |= MEASUREMENT_READY;
2946#endif
2947}
2948
c79dd5b5 2949static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 2950 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2951{
0a6857e7 2952#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 2953 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2954 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 2955 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2956 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2957#endif
2958}
2959
c79dd5b5 2960static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 2961 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2962{
bb8c093b 2963 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 2964 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2965 "notification for %s:\n",
2966 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 2967 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 2968}
2969
bb8c093b 2970static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 2971{
c79dd5b5
TW		 2972 struct iwl_priv *priv =
2973 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 2974 struct sk_buff *beacon;
2975
2976 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 2977 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 2978
2979 if (!beacon) {
2980 IWL_ERROR("update beacon failed\n");
2981 return;
2982 }
2983
2984 mutex_lock(&priv->mutex);
2985 /* new beacon skb is allocated every time; dispose previous.*/
2986 if (priv->ibss_beacon)
2987 dev_kfree_skb(priv->ibss_beacon);
2988
2989 priv->ibss_beacon = beacon;
2990 mutex_unlock(&priv->mutex);
2991
bb8c093b 2992 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 2993}
2994
c79dd5b5 2995static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 2996 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 2997{
0a6857e7 2998#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 2999 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3000 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3001 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 3002
3003 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3004 "tsf %d %d rate %d\n",
3005 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3006 beacon->beacon_notify_hdr.failure_frame,
3007 le32_to_cpu(beacon->ibss_mgr_status),
3008 le32_to_cpu(beacon->high_tsf),
3009 le32_to_cpu(beacon->low_tsf), rate);
3010#endif
3011
3012 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3013 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3014 queue_work(priv->workqueue, &priv->beacon_update);
3015}
3016
3017/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3018static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3019 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3020{
0a6857e7 3021#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3022 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3023 struct iwl4965_scanreq_notification *notif =
3024 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3025
3026 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3027#endif
3028}
3029
3030/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3031static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3032 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3033{
bb8c093b
CH		 3034 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3035 struct iwl4965_scanstart_notification *notif =
3036 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3037 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3038 IWL_DEBUG_SCAN("Scan start: "
3039 "%d [802.11%s] "
3040 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3041 notif->channel,
3042 notif->band ? "bg" : "a",
3043 notif->tsf_high,
3044 notif->tsf_low, notif->status, notif->beacon_timer);
3045}
3046
3047/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3048static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3049 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3050{
bb8c093b
CH		 3051 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3052 struct iwl4965_scanresults_notification *notif =
3053 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3054
3055 IWL_DEBUG_SCAN("Scan ch.res: "
3056 "%d [802.11%s] "
3057 "(TSF: 0x%08X:%08X) - %d "
3058 "elapsed=%lu usec (%dms since last)\n",
3059 notif->channel,
3060 notif->band ? "bg" : "a",
3061 le32_to_cpu(notif->tsf_high),
3062 le32_to_cpu(notif->tsf_low),
3063 le32_to_cpu(notif->statistics[0]),
3064 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3065 jiffies_to_msecs(elapsed_jiffies
3066 (priv->last_scan_jiffies, jiffies)));
3067
3068 priv->last_scan_jiffies = jiffies;
7878a5a4 3069 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3070}
3071
3072/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3073static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3074 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3075{
bb8c093b
CH		 3076 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3077 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 3078
3079 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3080 scan_notif->scanned_channels,
3081 scan_notif->tsf_low,
3082 scan_notif->tsf_high, scan_notif->status);
3083
3084 /* The HW is no longer scanning */
3085 clear_bit(STATUS_SCAN_HW, &priv->status);
3086
3087 /* The scan completion notification came in, so kill that timer... */
3088 cancel_delayed_work(&priv->scan_check);
3089
3090 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3091 (priv->scan_bands == 2) ? "2.4" : "5.2",
3092 jiffies_to_msecs(elapsed_jiffies
3093 (priv->scan_pass_start, jiffies)));
3094
3095 /* Remove this scanned band from the list
3096 * of pending bands to scan */
3097 priv->scan_bands--;
3098
3099 /* If a request to abort was given, or the scan did not succeed
3100 * then we reset the scan state machine and terminate,
3101 * re-queuing another scan if one has been requested */
3102 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3103 IWL_DEBUG_INFO("Aborted scan completed.\n");
3104 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3105 } else {
3106 /* If there are more bands on this scan pass reschedule */
3107 if (priv->scan_bands > 0)
3108 goto reschedule;
3109 }
3110
3111 priv->last_scan_jiffies = jiffies;
7878a5a4 3112 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3113 IWL_DEBUG_INFO("Setting scan to off\n");
3114
3115 clear_bit(STATUS_SCANNING, &priv->status);
3116
3117 IWL_DEBUG_INFO("Scan took %dms\n",
3118 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3119
3120 queue_work(priv->workqueue, &priv->scan_completed);
3121
3122 return;
3123
3124reschedule:
3125 priv->scan_pass_start = jiffies;
3126 queue_work(priv->workqueue, &priv->request_scan);
3127}
3128
3129/* Handle notification from uCode that card's power state is changing
3130 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3131static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3132 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3133{
bb8c093b 3134 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3135 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3136 unsigned long status = priv->status;
3137
3138 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3139 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3140 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3141
3142 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3143 RF_CARD_DISABLED)) {
3144
3395f6e9 3145 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3146 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3147
3395f6e9
TW		 3148 if (!iwl_grab_nic_access(priv)) {
3149 iwl_write_direct32(
b481de9c
ZY		 3150 priv, HBUS_TARG_MBX_C,
3151 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3152
3395f6e9 3153 iwl_release_nic_access(priv);
b481de9c
ZY		 3154 }
3155
3156 if (!(flags & RXON_CARD_DISABLED)) {
3395f6e9 3157 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3158 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3395f6e9
TW		 3159 if (!iwl_grab_nic_access(priv)) {
3160 iwl_write_direct32(
b481de9c
ZY		 3161 priv, HBUS_TARG_MBX_C,
3162 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3163
3395f6e9 3164 iwl_release_nic_access(priv);
b481de9c
ZY		 3165 }
3166 }
3167
3168 if (flags & RF_CARD_DISABLED) {
3395f6e9 3169 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3170 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3395f6e9
TW		 3171 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3172 if (!iwl_grab_nic_access(priv))
3173 iwl_release_nic_access(priv);
b481de9c
ZY		 3174 }
3175 }
3176
3177 if (flags & HW_CARD_DISABLED)
3178 set_bit(STATUS_RF_KILL_HW, &priv->status);
3179 else
3180 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3181
3182
3183 if (flags & SW_CARD_DISABLED)
3184 set_bit(STATUS_RF_KILL_SW, &priv->status);
3185 else
3186 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3187
3188 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3189 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3190
3191 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3192 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3193 (test_bit(STATUS_RF_KILL_SW, &status) !=
3194 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3195 queue_work(priv->workqueue, &priv->rf_kill);
3196 else
3197 wake_up_interruptible(&priv->wait_command_queue);
3198}
3199
3200/**
bb8c093b 3201 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 3202 *
3203 * Setup the RX handlers for each of the reply types sent from the uCode
3204 * to the host.
3205 *
3206 * This function chains into the hardware specific files for them to setup
3207 * any hardware specific handlers as well.
3208 */
c79dd5b5 3209static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3210{
bb8c093b
CH		 3211 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3212 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3213 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3214 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3215 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 3216 iwl4965_rx_spectrum_measure_notif;
3217 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3218 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 3219 iwl4965_rx_pm_debug_statistics_notif;
3220 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3221
9fbab516
BC		 3222 /*
3223 * The same handler is used for both the REPLY to a discrete
3224 * statistics request from the host as well as for the periodic
3225 * statistics notifications (after received beacons) from the uCode.
b481de9c 3226 */
bb8c093b
CH		 3227 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3228 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3229
bb8c093b
CH		 3230 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3231 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3232 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3233 iwl4965_rx_scan_results_notif;
b481de9c 3234 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 3235 iwl4965_rx_scan_complete_notif;
3236 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3237 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3238
9fbab516 3239 /* Set up hardware specific Rx handlers */
bb8c093b 3240 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 3241}
3242
3243/**
bb8c093b 3244 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 3245 * @rxb: Rx buffer to reclaim
3246 *
3247 * If an Rx buffer has an async callback associated with it the callback
3248 * will be executed. The attached skb (if present) will only be freed
3249 * if the callback returns 1
3250 */
c79dd5b5 3251static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3252 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3253{
bb8c093b 3254 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3255 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3256 int txq_id = SEQ_TO_QUEUE(sequence);
3257 int index = SEQ_TO_INDEX(sequence);
3258 int huge = sequence & SEQ_HUGE_FRAME;
3259 int cmd_index;
857485c0 3260 struct iwl_cmd *cmd;
b481de9c
ZY		 3261
3262 /* If a Tx command is being handled and it isn't in the actual
3263 * command queue then there a command routing bug has been introduced
3264 * in the queue management code. */
3265 if (txq_id != IWL_CMD_QUEUE_NUM)
3266 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3267 txq_id, pkt->hdr.cmd);
3268 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3269
3270 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3271 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3272
3273 /* Input error checking is done when commands are added to queue. */
3274 if (cmd->meta.flags & CMD_WANT_SKB) {
3275 cmd->meta.source->u.skb = rxb->skb;
3276 rxb->skb = NULL;
3277 } else if (cmd->meta.u.callback &&
3278 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3279 rxb->skb = NULL;
3280
bb8c093b 3281 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3282
3283 if (!(cmd->meta.flags & CMD_ASYNC)) {
3284 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3285 wake_up_interruptible(&priv->wait_command_queue);
3286 }
3287}
3288
3289/************************** RX-FUNCTIONS ****************************/
3290/*
3291 * Rx theory of operation
3292 *
9fbab516
BC		 3293 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3294 * each of which point to Receive Buffers to be filled by 4965. These get
3295 * used not only for Rx frames, but for any command response or notification
3296 * from the 4965. The driver and 4965 manage the Rx buffers by means
3297 * of indexes into the circular buffer.
b481de9c
ZY		 3298 *
3299 * Rx Queue Indexes
3300 * The host/firmware share two index registers for managing the Rx buffers.
3301 *
3302 * The READ index maps to the first position that the firmware may be writing
3303 * to -- the driver can read up to (but not including) this position and get
3304 * good data.
3305 * The READ index is managed by the firmware once the card is enabled.
3306 *
3307 * The WRITE index maps to the last position the driver has read from -- the
3308 * position preceding WRITE is the last slot the firmware can place a packet.
3309 *
3310 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3311 * WRITE = READ.
3312 *
9fbab516 3313 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 3314 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3315 *
9fbab516 3316 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 3317 * and fire the RX interrupt. The driver can then query the READ index and
3318 * process as many packets as possible, moving the WRITE index forward as it
3319 * resets the Rx queue buffers with new memory.
3320 *
3321 * The management in the driver is as follows:
3322 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3323 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3324 * to replenish the iwl->rxq->rx_free.
bb8c093b 3325 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 3326 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3327 * 'processed' and 'read' driver indexes as well)
3328 * + A received packet is processed and handed to the kernel network stack,
3329 * detached from the iwl->rxq. The driver 'processed' index is updated.
3330 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3331 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3332 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3333 * were enough free buffers and RX_STALLED is set it is cleared.
3334 *
3335 *
3336 * Driver sequence:
3337 *
9fbab516
BC		 3338 * iwl4965_rx_queue_alloc() Allocates rx_free
3339 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3340 * iwl4965_rx_queue_restock
9fbab516 3341 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 3342 * queue, updates firmware pointers, and updates
3343 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3344 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 3345 *
3346 * -- enable interrupts --
9fbab516 3347 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 3348 * READ INDEX, detaching the SKB from the pool.
3349 * Moves the packet buffer from queue to rx_used.
bb8c093b 3350 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 3351 * slots.
3352 * ...
3353 *
3354 */
3355
3356/**
bb8c093b 3357 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3358 */
bb8c093b 3359static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 3360{
3361 int s = q->read - q->write;
3362 if (s <= 0)
3363 s += RX_QUEUE_SIZE;
3364 /* keep some buffer to not confuse full and empty queue */
3365 s -= 2;
3366 if (s < 0)
3367 s = 0;
3368 return s;
3369}
3370
3371/**
bb8c093b 3372 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3373 */
c79dd5b5 3374int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 3375{
3376 u32 reg = 0;
3377 int rc = 0;
3378 unsigned long flags;
3379
3380 spin_lock_irqsave(&q->lock, flags);
3381
3382 if (q->need_update == 0)
3383 goto exit_unlock;
3384
6440adb5 3385 /* If power-saving is in use, make sure device is awake */
b481de9c 3386 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395f6e9 3387 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 3388
3389 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3395f6e9 3390 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 3391 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3392 goto exit_unlock;
3393 }
3394
3395f6e9 3395 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3396 if (rc)
3397 goto exit_unlock;
3398
6440adb5 3399 /* Device expects a multiple of 8 */
3395f6e9 3400 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3401 q->write & ~0x7);
3395f6e9 3402 iwl_release_nic_access(priv);
6440adb5
CB		 3403
3404 /* Else device is assumed to be awake */
b481de9c 3405 } else
6440adb5 3406 /* Device expects a multiple of 8 */
3395f6e9 3407 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 3408
3409
3410 q->need_update = 0;
3411
3412 exit_unlock:
3413 spin_unlock_irqrestore(&q->lock, flags);
3414 return rc;
3415}
3416
3417/**
9fbab516 3418 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3419 */
c79dd5b5 3420static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY		 3421 dma_addr_t dma_addr)
3422{
3423 return cpu_to_le32((u32)(dma_addr >> 8));
3424}
3425
3426
3427/**
bb8c093b 3428 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3429 *
9fbab516 3430 * If there are slots in the RX queue that need to be restocked,
b481de9c 3431 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3432 * as we can, pulling from rx_free.
b481de9c
ZY		 3433 *
3434 * This moves the 'write' index forward to catch up with 'processed', and
3435 * also updates the memory address in the firmware to reference the new
3436 * target buffer.
3437 */
c79dd5b5 3438static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3439{
bb8c093b 3440 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3441 struct list_head *element;
bb8c093b 3442 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3443 unsigned long flags;
3444 int write, rc;
3445
3446 spin_lock_irqsave(&rxq->lock, flags);
3447 write = rxq->write & ~0x7;
bb8c093b 3448 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3449 /* Get next free Rx buffer, remove from free list */
b481de9c 3450 element = rxq->rx_free.next;
bb8c093b 3451 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3452 list_del(element);
6440adb5
CB		 3453
3454 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3455 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 3456 rxq->queue[rxq->write] = rxb;
3457 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3458 rxq->free_count--;
3459 }
3460 spin_unlock_irqrestore(&rxq->lock, flags);
3461 /* If the pre-allocated buffer pool is dropping low, schedule to
3462 * refill it */
3463 if (rxq->free_count <= RX_LOW_WATERMARK)
3464 queue_work(priv->workqueue, &priv->rx_replenish);
3465
3466
6440adb5
CB		 3467 /* If we've added more space for the firmware to place data, tell it.
3468 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 3469 if ((write != (rxq->write & ~0x7))
3470 || (abs(rxq->write - rxq->read) > 7)) {
3471 spin_lock_irqsave(&rxq->lock, flags);
3472 rxq->need_update = 1;
3473 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3474 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 3475 if (rc)
3476 return rc;
3477 }
3478
3479 return 0;
3480}
3481
3482/**
bb8c093b 3483 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 3484 *
3485 * When moving to rx_free an SKB is allocated for the slot.
3486 *
bb8c093b 3487 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3488 * This is called as a scheduled work item (except for during initialization)
b481de9c 3489 */
c79dd5b5 3490static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3491{
bb8c093b 3492 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3493 struct list_head *element;
bb8c093b 3494 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3495 unsigned long flags;
3496 spin_lock_irqsave(&rxq->lock, flags);
3497 while (!list_empty(&rxq->rx_used)) {
3498 element = rxq->rx_used.next;
bb8c093b 3499 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
CB		 3500
3501 /* Alloc a new receive buffer */
b481de9c 3502 rxb->skb =
5425e490 3503 alloc_skb(priv->hw_params.rx_buf_size,
9ee1ba47 3504 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 3505 if (!rxb->skb) {
3506 if (net_ratelimit())
3507 printk(KERN_CRIT DRV_NAME
3508 ": Can not allocate SKB buffers\n");
3509 /* We don't reschedule replenish work here -- we will
3510 * call the restock method and if it still needs
3511 * more buffers it will schedule replenish */
3512 break;
3513 }
3514 priv->alloc_rxb_skb++;
3515 list_del(element);
6440adb5
CB		 3516
3517 /* Get physical address of RB/SKB */
b481de9c
ZY		 3518 rxb->dma_addr =
3519 pci_map_single(priv->pci_dev, rxb->skb->data,
5425e490 3520 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3521 list_add_tail(&rxb->list, &rxq->rx_free);
3522 rxq->free_count++;
3523 }
3524 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 3525}
3526
3527/*
3528 * this should be called while priv->lock is locked
3529*/
4fd1f841 3530static void __iwl4965_rx_replenish(void *data)
5c0eef96 3531{
c79dd5b5 3532 struct iwl_priv *priv = data;
5c0eef96
MA		 3533
3534 iwl4965_rx_allocate(priv);
3535 iwl4965_rx_queue_restock(priv);
3536}
3537
3538
3539void iwl4965_rx_replenish(void *data)
3540{
c79dd5b5 3541 struct iwl_priv *priv = data;
5c0eef96
MA		 3542 unsigned long flags;
3543
3544 iwl4965_rx_allocate(priv);
b481de9c
ZY		 3545
3546 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3547 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 3548 spin_unlock_irqrestore(&priv->lock, flags);
3549}
3550
3551/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3552 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 3553 * This free routine walks the list of POOL entries and if SKB is set to
3554 * non NULL it is unmapped and freed
3555 */
c79dd5b5 3556static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3557{
3558 int i;
3559 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3560 if (rxq->pool[i].skb != NULL) {
3561 pci_unmap_single(priv->pci_dev,
3562 rxq->pool[i].dma_addr,
5425e490 3563 priv->hw_params.rx_buf_size,
9ee1ba47 3564 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3565 dev_kfree_skb(rxq->pool[i].skb);
3566 }
3567 }
3568
3569 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3570 rxq->dma_addr);
3571 rxq->bd = NULL;
3572}
3573
c79dd5b5 3574int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3575{
bb8c093b 3576 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 3577 struct pci_dev *dev = priv->pci_dev;
3578 int i;
3579
3580 spin_lock_init(&rxq->lock);
3581 INIT_LIST_HEAD(&rxq->rx_free);
3582 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
CB		 3583
3584 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 3585 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3586 if (!rxq->bd)
3587 return -ENOMEM;
6440adb5 3588
b481de9c
ZY		 3589 /* Fill the rx_used queue with _all_ of the Rx buffers */
3590 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3591 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3592
b481de9c
ZY		 3593 /* Set us so that we have processed and used all buffers, but have
3594 * not restocked the Rx queue with fresh buffers */
3595 rxq->read = rxq->write = 0;
3596 rxq->free_count = 0;
3597 rxq->need_update = 0;
3598 return 0;
3599}
3600
c79dd5b5 3601void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3602{
3603 unsigned long flags;
3604 int i;
3605 spin_lock_irqsave(&rxq->lock, flags);
3606 INIT_LIST_HEAD(&rxq->rx_free);
3607 INIT_LIST_HEAD(&rxq->rx_used);
3608 /* Fill the rx_used queue with _all_ of the Rx buffers */
3609 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3610 /* In the reset function, these buffers may have been allocated
3611 * to an SKB, so we need to unmap and free potential storage */
3612 if (rxq->pool[i].skb != NULL) {
3613 pci_unmap_single(priv->pci_dev,
3614 rxq->pool[i].dma_addr,
5425e490 3615 priv->hw_params.rx_buf_size,
9ee1ba47 3616 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3617 priv->alloc_rxb_skb--;
3618 dev_kfree_skb(rxq->pool[i].skb);
3619 rxq->pool[i].skb = NULL;
3620 }
3621 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3622 }
3623
3624 /* Set us so that we have processed and used all buffers, but have
3625 * not restocked the Rx queue with fresh buffers */
3626 rxq->read = rxq->write = 0;
3627 rxq->free_count = 0;
3628 spin_unlock_irqrestore(&rxq->lock, flags);
3629}
3630
3631/* Convert linear signal-to-noise ratio into dB */
3632static u8 ratio2dB[100] = {
3633/* 0 1 2 3 4 5 6 7 8 9 */
3634 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3635 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3636 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3637 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3638 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3639 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3640 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3641 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3642 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3643 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3644};
3645
3646/* Calculates a relative dB value from a ratio of linear
3647 * (i.e. not dB) signal levels.
3648 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 3649int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 3650{
c899a575
AB		 3651 /* 1000:1 or higher just report as 60 dB */
3652 if (sig_ratio >= 1000)
b481de9c
ZY		 3653 return 60;
3654
c899a575 3655 /* 100:1 or higher, divide by 10 and use table,
b481de9c 3656 * add 20 dB to make up for divide by 10 */
c899a575 3657 if (sig_ratio >= 100)
b481de9c
ZY		 3658 return (20 + (int)ratio2dB[sig_ratio/10]);
3659
3660 /* We shouldn't see this */
3661 if (sig_ratio < 1)
3662 return 0;
3663
3664 /* Use table for ratios 1:1 - 99:1 */
3665 return (int)ratio2dB[sig_ratio];
3666}
3667
3668#define PERFECT_RSSI (-20) /* dBm */
3669#define WORST_RSSI (-95) /* dBm */
3670#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3671
3672/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3673 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3674 * about formulas used below. */
bb8c093b 3675int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 3676{
3677 int sig_qual;
3678 int degradation = PERFECT_RSSI - rssi_dbm;
3679
3680 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3681 * as indicator; formula is (signal dbm - noise dbm).
3682 * SNR at or above 40 is a great signal (100%).
3683 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3684 * Weakest usable signal is usually 10 - 15 dB SNR. */
3685 if (noise_dbm) {
3686 if (rssi_dbm - noise_dbm >= 40)
3687 return 100;
3688 else if (rssi_dbm < noise_dbm)
3689 return 0;
3690 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3691
3692 /* Else use just the signal level.
3693 * This formula is a least squares fit of data points collected and
3694 * compared with a reference system that had a percentage (%) display
3695 * for signal quality. */
3696 } else
3697 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3698 (15 * RSSI_RANGE + 62 * degradation)) /
3699 (RSSI_RANGE * RSSI_RANGE);
3700
3701 if (sig_qual > 100)
3702 sig_qual = 100;
3703 else if (sig_qual < 1)
3704 sig_qual = 0;
3705
3706 return sig_qual;
3707}
3708
3709/**
9fbab516 3710 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 3711 *
3712 * Uses the priv->rx_handlers callback function array to invoke
3713 * the appropriate handlers, including command responses,
3714 * frame-received notifications, and other notifications.
3715 */
c79dd5b5 3716static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 3717{
bb8c093b
CH		 3718 struct iwl4965_rx_mem_buffer *rxb;
3719 struct iwl4965_rx_packet *pkt;
3720 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 3721 u32 r, i;
3722 int reclaim;
3723 unsigned long flags;
5c0eef96 3724 u8 fill_rx = 0;
d68ab680 3725 u32 count = 8;
b481de9c 3726
6440adb5
CB		 3727 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3728 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 3729 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 3730 i = rxq->read;
3731
3732 /* Rx interrupt, but nothing sent from uCode */
3733 if (i == r)
3734 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3735
5c0eef96
MA		 3736 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3737 fill_rx = 1;
3738
b481de9c
ZY		 3739 while (i != r) {
3740 rxb = rxq->queue[i];
3741
9fbab516 3742 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 3743 * then a bug has been introduced in the queue refilling
3744 * routines -- catch it here */
3745 BUG_ON(rxb == NULL);
3746
3747 rxq->queue[i] = NULL;
3748
3749 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
5425e490 3750 priv->hw_params.rx_buf_size,
b481de9c 3751 PCI_DMA_FROMDEVICE);
bb8c093b 3752 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3753
3754 /* Reclaim a command buffer only if this packet is a response
3755 * to a (driver-originated) command.
3756 * If the packet (e.g. Rx frame) originated from uCode,
3757 * there is no command buffer to reclaim.
3758 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3759 * but apparently a few don't get set; catch them here. */
3760 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3761 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 3762 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 3763 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 3764 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3765 (pkt->hdr.cmd != REPLY_TX);
3766
3767 /* Based on type of command response or notification,
3768 * handle those that need handling via function in
bb8c093b 3769 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 3770 if (priv->rx_handlers[pkt->hdr.cmd]) {
3771 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3772 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3773 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3774 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3775 } else {
3776 /* No handling needed */
3777 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3778 "r %d i %d No handler needed for %s, 0x%02x\n",
3779 r, i, get_cmd_string(pkt->hdr.cmd),
3780 pkt->hdr.cmd);
3781 }
3782
3783 if (reclaim) {
9fbab516 3784 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 3785 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 3786 * as we reclaim the driver command queue */
3787 if (rxb && rxb->skb)
bb8c093b 3788 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 3789 else
3790 IWL_WARNING("Claim null rxb?\n");
3791 }
3792
3793 /* For now we just don't re-use anything. We can tweak this
3794 * later to try and re-use notification packets and SKBs that
3795 * fail to Rx correctly */
3796 if (rxb->skb != NULL) {
3797 priv->alloc_rxb_skb--;
3798 dev_kfree_skb_any(rxb->skb);
3799 rxb->skb = NULL;
3800 }
3801
3802 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5425e490 3803 priv->hw_params.rx_buf_size,
9ee1ba47 3804 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3805 spin_lock_irqsave(&rxq->lock, flags);
3806 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3807 spin_unlock_irqrestore(&rxq->lock, flags);
3808 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 3809 /* If there are a lot of unused frames,
3810 * restock the Rx queue so ucode wont assert. */
3811 if (fill_rx) {
3812 count++;
3813 if (count >= 8) {
3814 priv->rxq.read = i;
3815 __iwl4965_rx_replenish(priv);
3816 count = 0;
3817 }
3818 }
b481de9c
ZY		 3819 }
3820
3821 /* Backtrack one entry */
3822 priv->rxq.read = i;
bb8c093b 3823 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 3824}
3825
6440adb5
CB		 3826/**
3827 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
3828 */
c79dd5b5 3829static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 3830 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 3831{
3832 u32 reg = 0;
3833 int rc = 0;
3834 int txq_id = txq->q.id;
3835
3836 if (txq->need_update == 0)
3837 return rc;
3838
3839 /* if we're trying to save power */
3840 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3841 /* wake up nic if it's powered down ...
3842 * uCode will wake up, and interrupt us again, so next
3843 * time we'll skip this part. */
3395f6e9 3844 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 3845
3846 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3847 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3395f6e9 3848 iwl_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 3849 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3850 return rc;
3851 }
3852
3853 /* restore this queue's parameters in nic hardware. */
3395f6e9 3854 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3855 if (rc)
3856 return rc;
3395f6e9 3857 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 3858 txq->q.write_ptr | (txq_id << 8));
3395f6e9 3859 iwl_release_nic_access(priv);
b481de9c
ZY		 3860
3861 /* else not in power-save mode, uCode will never sleep when we're
3862 * trying to tx (during RFKILL, we're not trying to tx). */
3863 } else
3395f6e9 3864 iwl_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 3865 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 3866
3867 txq->need_update = 0;
3868
3869 return rc;
3870}
3871
0a6857e7 3872#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 3873static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 3874{
0795af57
JP		 3875 DECLARE_MAC_BUF(mac);
3876
b481de9c 3877 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 3878 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 3879 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3880 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3881 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3882 le32_to_cpu(rxon->filter_flags));
3883 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3884 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3885 rxon->ofdm_basic_rates);
3886 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 3887 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
3888 print_mac(mac, rxon->node_addr));
3889 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
3890 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 3891 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3892}
3893#endif
3894
c79dd5b5 3895static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 3896{
3897 IWL_DEBUG_ISR("Enabling interrupts\n");
3898 set_bit(STATUS_INT_ENABLED, &priv->status);
3395f6e9 3899 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 3900}
3901
0359facc
MA		 3902/* call this function to flush any scheduled tasklet */
3903static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3904{
3905 /* wait to make sure we flush pedding tasklet*/
3906 synchronize_irq(priv->pci_dev->irq);
3907 tasklet_kill(&priv->irq_tasklet);
3908}
3909
c79dd5b5 3910static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 3911{
3912 clear_bit(STATUS_INT_ENABLED, &priv->status);
3913
3914 /* disable interrupts from uCode/NIC to host */
3395f6e9 3915 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 3916
3917 /* acknowledge/clear/reset any interrupts still pending
3918 * from uCode or flow handler (Rx/Tx DMA) */
3395f6e9
TW		 3919 iwl_write32(priv, CSR_INT, 0xffffffff);
3920 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 3921 IWL_DEBUG_ISR("Disabled interrupts\n");
3922}
3923
3924static const char *desc_lookup(int i)
3925{
3926 switch (i) {
3927 case 1:
3928 return "FAIL";
3929 case 2:
3930 return "BAD_PARAM";
3931 case 3:
3932 return "BAD_CHECKSUM";
3933 case 4:
3934 return "NMI_INTERRUPT";
3935 case 5:
3936 return "SYSASSERT";
3937 case 6:
3938 return "FATAL_ERROR";
3939 }
3940
3941 return "UNKNOWN";
3942}
3943
3944#define ERROR_START_OFFSET (1 * sizeof(u32))
3945#define ERROR_ELEM_SIZE (7 * sizeof(u32))
3946
c79dd5b5 3947static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY		 3948{
3949 u32 data2, line;
3950 u32 desc, time, count, base, data1;
3951 u32 blink1, blink2, ilink1, ilink2;
3952 int rc;
3953
3954 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3955
57aab75a 3956 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY		 3957 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
3958 return;
3959 }
3960
3395f6e9 3961 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 3962 if (rc) {
3963 IWL_WARNING("Can not read from adapter at this time.\n");
3964 return;
3965 }
3966
3395f6e9 3967 count = iwl_read_targ_mem(priv, base);
b481de9c
ZY		 3968
3969 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3970 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 3971 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY		 3972 }
3973
3395f6e9
TW		 3974 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
3975 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
3976 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
3977 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
3978 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
3979 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
3980 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
3981 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
3982 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 3983
3984 IWL_ERROR("Desc Time "
3985 "data1 data2 line\n");
3986 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
3987 desc_lookup(desc), desc, time, data1, data2, line);
3988 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
3989 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
3990 ilink1, ilink2);
3991
3395f6e9 3992 iwl_release_nic_access(priv);
b481de9c
ZY		 3993}
3994
3995#define EVENT_START_OFFSET (4 * sizeof(u32))
3996
3997/**
bb8c093b 3998 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 3999 *
3395f6e9 4000 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
b481de9c 4001 */
c79dd5b5 4002static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY		 4003 u32 num_events, u32 mode)
4004{
4005 u32 i;
4006 u32 base; /* SRAM byte address of event log header */
4007 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4008 u32 ptr; /* SRAM byte address of log data */
4009 u32 ev, time, data; /* event log data */
4010
4011 if (num_events == 0)
4012 return;
4013
4014 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4015
4016 if (mode == 0)
4017 event_size = 2 * sizeof(u32);
4018 else
4019 event_size = 3 * sizeof(u32);
4020
4021 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4022
4023 /* "time" is actually "data" for mode 0 (no timestamp).
4024 * place event id # at far right for easier visual parsing. */
4025 for (i = 0; i < num_events; i++) {
3395f6e9 4026 ev = iwl_read_targ_mem(priv, ptr);
b481de9c 4027 ptr += sizeof(u32);
3395f6e9 4028 time = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY		 4029 ptr += sizeof(u32);
4030 if (mode == 0)
4031 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4032 else {
3395f6e9 4033 data = iwl_read_targ_mem(priv, ptr);
b481de9c
ZY		 4034 ptr += sizeof(u32);
4035 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4036 }
4037 }
4038}
4039
c79dd5b5 4040static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY		 4041{
4042 int rc;
4043 u32 base; /* SRAM byte address of event log header */
4044 u32 capacity; /* event log capacity in # entries */
4045 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4046 u32 num_wraps; /* # times uCode wrapped to top of log */
4047 u32 next_entry; /* index of next entry to be written by uCode */
4048 u32 size; /* # entries that we'll print */
4049
4050 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
57aab75a 4051 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4052 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4053 return;
4054 }
4055
3395f6e9 4056 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4057 if (rc) {
4058 IWL_WARNING("Can not read from adapter at this time.\n");
4059 return;
4060 }
4061
4062 /* event log header */
3395f6e9
TW		 4063 capacity = iwl_read_targ_mem(priv, base);
4064 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4065 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4066 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4067
4068 size = num_wraps ? capacity : next_entry;
4069
4070 /* bail out if nothing in log */
4071 if (size == 0) {
583fab37 4072 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
3395f6e9 4073 iwl_release_nic_access(priv);
b481de9c
ZY		 4074 return;
4075 }
4076
583fab37 4077 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4078 size, num_wraps);
4079
4080 /* if uCode has wrapped back to top of log, start at the oldest entry,
4081 * i.e the next one that uCode would fill. */
4082 if (num_wraps)
bb8c093b 4083 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 4084 capacity - next_entry, mode);
4085
4086 /* (then/else) start at top of log */
bb8c093b 4087 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4088
3395f6e9 4089 iwl_release_nic_access(priv);
b481de9c
ZY		 4090}
4091
4092/**
bb8c093b 4093 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4094 */
c79dd5b5 4095static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4096{
bb8c093b 4097 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 4098 set_bit(STATUS_FW_ERROR, &priv->status);
4099
4100 /* Cancel currently queued command. */
4101 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4102
0a6857e7
TW		 4103#ifdef CONFIG_IWLWIFI_DEBUG
4104 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH		 4105 iwl4965_dump_nic_error_log(priv);
4106 iwl4965_dump_nic_event_log(priv);
4107 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 4108 }
4109#endif
4110
4111 wake_up_interruptible(&priv->wait_command_queue);
4112
4113 /* Keep the restart process from trying to send host
4114 * commands by clearing the INIT status bit */
4115 clear_bit(STATUS_READY, &priv->status);
4116
4117 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4118 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4119 "Restarting adapter due to uCode error.\n");
4120
3109ece1 4121 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4122 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4123 sizeof(priv->recovery_rxon));
4124 priv->error_recovering = 1;
4125 }
4126 queue_work(priv->workqueue, &priv->restart);
4127 }
4128}
4129
c79dd5b5 4130static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 4131{
4132 unsigned long flags;
4133
4134 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4135 sizeof(priv->staging_rxon));
4136 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4137 iwl4965_commit_rxon(priv);
b481de9c 4138
bb8c093b 4139 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 4140
4141 spin_lock_irqsave(&priv->lock, flags);
4142 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4143 priv->error_recovering = 0;
4144 spin_unlock_irqrestore(&priv->lock, flags);
4145}
4146
c79dd5b5 4147static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 4148{
4149 u32 inta, handled = 0;
4150 u32 inta_fh;
4151 unsigned long flags;
0a6857e7 4152#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 4153 u32 inta_mask;
4154#endif
4155
4156 spin_lock_irqsave(&priv->lock, flags);
4157
4158 /* Ack/clear/reset pending uCode interrupts.
4159 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4160 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
3395f6e9
TW		 4161 inta = iwl_read32(priv, CSR_INT);
4162 iwl_write32(priv, CSR_INT, inta);
b481de9c
ZY		 4163
4164 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4165 * Any new interrupts that happen after this, either while we're
4166 * in this tasklet, or later, will show up in next ISR/tasklet. */
3395f6e9
TW		 4167 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4168 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4169
0a6857e7
TW		 4170#ifdef CONFIG_IWLWIFI_DEBUG
4171 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516 4172 /* just for debug */
3395f6e9 4173 inta_mask = iwl_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 4174 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4175 inta, inta_mask, inta_fh);
4176 }
4177#endif
4178
4179 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4180 * atomic, make sure that inta covers all the interrupts that
4181 * we've discovered, even if FH interrupt came in just after
4182 * reading CSR_INT. */
6f83eaa1 4183 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4184 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4185 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 4186 inta |= CSR_INT_BIT_FH_TX;
4187
4188 /* Now service all interrupt bits discovered above. */
4189 if (inta & CSR_INT_BIT_HW_ERR) {
4190 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4191
4192 /* Tell the device to stop sending interrupts */
bb8c093b 4193 iwl4965_disable_interrupts(priv);
b481de9c 4194
bb8c093b 4195 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4196
4197 handled |= CSR_INT_BIT_HW_ERR;
4198
4199 spin_unlock_irqrestore(&priv->lock, flags);
4200
4201 return;
4202 }
4203
0a6857e7
TW		 4204#ifdef CONFIG_IWLWIFI_DEBUG
4205 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4206 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 4207 if (inta & CSR_INT_BIT_SCD)
4208 IWL_DEBUG_ISR("Scheduler finished to transmit "
4209 "the frame/frames.\n");
b481de9c
ZY		 4210
4211 /* Alive notification via Rx interrupt will do the real work */
4212 if (inta & CSR_INT_BIT_ALIVE)
4213 IWL_DEBUG_ISR("Alive interrupt\n");
4214 }
4215#endif
4216 /* Safely ignore these bits for debug checks below */
25c03d8e 4217 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4218
9fbab516 4219 /* HW RF KILL switch toggled */
b481de9c
ZY		 4220 if (inta & CSR_INT_BIT_RF_KILL) {
4221 int hw_rf_kill = 0;
3395f6e9 4222 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 4223 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4224 hw_rf_kill = 1;
4225
4226 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4227 "RF_KILL bit toggled to %s.\n",
4228 hw_rf_kill ? "disable radio":"enable radio");
4229
4230 /* Queue restart only if RF_KILL switch was set to "kill"
4231 * when we loaded driver, and is now set to "enable".
4232 * After we're Alive, RF_KILL gets handled by
3230455d 4233 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 4234 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4235 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4236 queue_work(priv->workqueue, &priv->restart);
53e49093 4237 }
b481de9c
ZY		 4238
4239 handled |= CSR_INT_BIT_RF_KILL;
4240 }
4241
9fbab516 4242 /* Chip got too hot and stopped itself */
b481de9c
ZY		 4243 if (inta & CSR_INT_BIT_CT_KILL) {
4244 IWL_ERROR("Microcode CT kill error detected.\n");
4245 handled |= CSR_INT_BIT_CT_KILL;
4246 }
4247
4248 /* Error detected by uCode */
4249 if (inta & CSR_INT_BIT_SW_ERR) {
4250 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4251 inta);
bb8c093b 4252 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4253 handled |= CSR_INT_BIT_SW_ERR;
4254 }
4255
4256 /* uCode wakes up after power-down sleep */
4257 if (inta & CSR_INT_BIT_WAKEUP) {
4258 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 4259 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4260 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4261 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4262 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4263 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4264 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4265 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 4266
4267 handled |= CSR_INT_BIT_WAKEUP;
4268 }
4269
4270 /* All uCode command responses, including Tx command responses,
4271 * Rx "responses" (frame-received notification), and other
4272 * notifications from uCode come through here*/
4273 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4274 iwl4965_rx_handle(priv);
b481de9c
ZY		 4275 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4276 }
4277
4278 if (inta & CSR_INT_BIT_FH_TX) {
4279 IWL_DEBUG_ISR("Tx interrupt\n");
4280 handled |= CSR_INT_BIT_FH_TX;
4281 }
4282
4283 if (inta & ~handled)
4284 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4285
4286 if (inta & ~CSR_INI_SET_MASK) {
4287 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4288 inta & ~CSR_INI_SET_MASK);
4289 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4290 }
4291
4292 /* Re-enable all interrupts */
0359facc
MA		 4293 /* only Re-enable if diabled by irq */
4294 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4295 iwl4965_enable_interrupts(priv);
b481de9c 4296
0a6857e7
TW		 4297#ifdef CONFIG_IWLWIFI_DEBUG
4298 if (iwl_debug_level & (IWL_DL_ISR)) {
3395f6e9
TW		 4299 inta = iwl_read32(priv, CSR_INT);
4300 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4301 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4302 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4303 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4304 }
4305#endif
4306 spin_unlock_irqrestore(&priv->lock, flags);
4307}
4308
bb8c093b 4309static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4310{
c79dd5b5 4311 struct iwl_priv *priv = data;
b481de9c
ZY		 4312 u32 inta, inta_mask;
4313 u32 inta_fh;
4314 if (!priv)
4315 return IRQ_NONE;
4316
4317 spin_lock(&priv->lock);
4318
4319 /* Disable (but don't clear!) interrupts here to avoid
4320 * back-to-back ISRs and sporadic interrupts from our NIC.
4321 * If we have something to service, the tasklet will re-enable ints.
4322 * If we *don't* have something, we'll re-enable before leaving here. */
3395f6e9
TW		 4323 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4324 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4325
4326 /* Discover which interrupts are active/pending */
3395f6e9
TW		 4327 inta = iwl_read32(priv, CSR_INT);
4328 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4329
4330 /* Ignore interrupt if there's nothing in NIC to service.
4331 * This may be due to IRQ shared with another device,
4332 * or due to sporadic interrupts thrown from our NIC. */
4333 if (!inta && !inta_fh) {
4334 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4335 goto none;
4336 }
4337
4338 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 4339 /* Hardware disappeared. It might have already raised
4340 * an interrupt */
b481de9c 4341 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4342 goto unplugged;
b481de9c
ZY		 4343 }
4344
4345 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4346 inta, inta_mask, inta_fh);
4347
25c03d8e
JP		 4348 inta &= ~CSR_INT_BIT_SCD;
4349
bb8c093b 4350 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 4351 if (likely(inta || inta_fh))
4352 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4353
66fbb541
ON		 4354 unplugged:
4355 spin_unlock(&priv->lock);
b481de9c
ZY		 4356 return IRQ_HANDLED;
4357
4358 none:
4359 /* re-enable interrupts here since we don't have anything to service. */
0359facc
MA		 4360 /* only Re-enable if diabled by irq */
4361 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4362 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 4363 spin_unlock(&priv->lock);
4364 return IRQ_NONE;
4365}
4366
b481de9c
ZY		 4367/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4368 * sending probe req. This should be set long enough to hear probe responses
4369 * from more than one AP. */
4370#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4371#define IWL_ACTIVE_DWELL_TIME_52 (10)
4372
4373/* For faster active scanning, scan will move to the next channel if fewer than
4374 * PLCP_QUIET_THRESH packets are heard on this channel within
4375 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4376 * time if it's a quiet channel (nothing responded to our probe, and there's
4377 * no other traffic).
4378 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4379#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4380#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4381
4382/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4383 * Must be set longer than active dwell time.
4384 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4385#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4386#define IWL_PASSIVE_DWELL_TIME_52 (10)
4387#define IWL_PASSIVE_DWELL_BASE (100)
4388#define IWL_CHANNEL_TUNE_TIME 5
4389
c79dd5b5 4390static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4391 enum ieee80211_band band)
b481de9c 4392{
8318d78a 4393 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4394 return IWL_ACTIVE_DWELL_TIME_52;
4395 else
4396 return IWL_ACTIVE_DWELL_TIME_24;
4397}
4398
c79dd5b5 4399static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4400 enum ieee80211_band band)
b481de9c 4401{
8318d78a
JB		 4402 u16 active = iwl4965_get_active_dwell_time(priv, band);
4403 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 4404 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4405 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4406
3109ece1 4407 if (iwl_is_associated(priv)) {
b481de9c
ZY		 4408 /* If we're associated, we clamp the maximum passive
4409 * dwell time to be 98% of the beacon interval (minus
4410 * 2 * channel tune time) */
4411 passive = priv->beacon_int;
4412 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4413 passive = IWL_PASSIVE_DWELL_BASE;
4414 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4415 }
4416
4417 if (passive <= active)
4418 passive = active + 1;
4419
4420 return passive;
4421}
4422
c79dd5b5 4423static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4424 enum ieee80211_band band,
b481de9c 4425 u8 is_active, u8 direct_mask,
bb8c093b 4426 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 4427{
4428 const struct ieee80211_channel *channels = NULL;
8318d78a 4429 const struct ieee80211_supported_band *sband;
bf85ea4f 4430 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 4431 u16 passive_dwell = 0;
4432 u16 active_dwell = 0;
4433 int added, i;
4434
d1141dfb 4435 sband = iwl_get_hw_mode(priv, band);
8318d78a 4436 if (!sband)
b481de9c
ZY		 4437 return 0;
4438
8318d78a 4439 channels = sband->channels;
b481de9c 4440
8318d78a
JB		 4441 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4442 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4443
8318d78a 4444 for (i = 0, added = 0; i < sband->n_channels; i++) {
182e2e66
JB		 4445 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4446 continue;
4447
8318d78a 4448 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4449
8622e705 4450 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4451 scan_ch->channel);
b481de9c
ZY		 4452 if (!is_channel_valid(ch_info)) {
4453 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4454 scan_ch->channel);
4455 continue;
4456 }
4457
4458 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4459 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 4460 scan_ch->type = 0; /* passive */
4461 else
4462 scan_ch->type = 1; /* active */
4463
4464 if (scan_ch->type & 1)
4465 scan_ch->type |= (direct_mask << 1);
4466
b481de9c
ZY		 4467 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4468 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4469
9fbab516 4470 /* Set txpower levels to defaults */
b481de9c
ZY		 4471 scan_ch->tpc.dsp_atten = 110;
4472 /* scan_pwr_info->tpc.dsp_atten; */
4473
4474 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4475 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4476 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4477 else {
4478 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4479 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4480 * power level:
8a1b0245 4481 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 4482 */
4483 }
4484
4485 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4486 scan_ch->channel,
4487 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4488 (scan_ch->type & 1) ?
4489 active_dwell : passive_dwell);
4490
4491 scan_ch++;
4492 added++;
4493 }
4494
4495 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4496 return added;
4497}
4498
b481de9c
ZY		 4499/******************************************************************************
4500 *
4501 * uCode download functions
4502 *
4503 ******************************************************************************/
4504
c79dd5b5 4505static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 4506{
98c92211
TW		 4507 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4508 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4509 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4510 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4511 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4512 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 4513}
4514
c79dd5b5 4515static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY		 4516{
4517 /* Remove all resets to allow NIC to operate */
3395f6e9 4518 iwl_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 4519}
4520
90e759d1 4521
b481de9c 4522/**
bb8c093b 4523 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 4524 *
4525 * Copy into buffers for card to fetch via bus-mastering
4526 */
c79dd5b5 4527static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 4528{
bb8c093b 4529 struct iwl4965_ucode *ucode;
90e759d1 4530 int ret;
b481de9c 4531 const struct firmware *ucode_raw;
4bf775cd 4532 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 4533 u8 *src;
4534 size_t len;
4535 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
4536
4537 /* Ask kernel firmware_class module to get the boot firmware off disk.
4538 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 4539 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
4540 if (ret < 0) {
4541 IWL_ERROR("%s firmware file req failed: Reason %d\n",
4542 name, ret);
b481de9c
ZY		 4543 goto error;
4544 }
4545
4546 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4547 name, ucode_raw->size);
4548
4549 /* Make sure that we got at least our header! */
4550 if (ucode_raw->size < sizeof(*ucode)) {
4551 IWL_ERROR("File size way too small!\n");
90e759d1 4552 ret = -EINVAL;
b481de9c
ZY		 4553 goto err_release;
4554 }
4555
4556 /* Data from ucode file: header followed by uCode images */
4557 ucode = (void *)ucode_raw->data;
4558
4559 ver = le32_to_cpu(ucode->ver);
4560 inst_size = le32_to_cpu(ucode->inst_size);
4561 data_size = le32_to_cpu(ucode->data_size);
4562 init_size = le32_to_cpu(ucode->init_size);
4563 init_data_size = le32_to_cpu(ucode->init_data_size);
4564 boot_size = le32_to_cpu(ucode->boot_size);
4565
4566 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
4567 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
4568 inst_size);
4569 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
4570 data_size);
4571 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
4572 init_size);
4573 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
4574 init_data_size);
4575 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
4576 boot_size);
4577
4578 /* Verify size of file vs. image size info in file's header */
4579 if (ucode_raw->size < sizeof(*ucode) +
4580 inst_size + data_size + init_size +
4581 init_data_size + boot_size) {
4582
4583 IWL_DEBUG_INFO("uCode file size %d too small\n",
4584 (int)ucode_raw->size);
90e759d1 4585 ret = -EINVAL;
b481de9c
ZY		 4586 goto err_release;
4587 }
4588
4589 /* Verify that uCode images will fit in card's SRAM */
099b40b7 4590 if (inst_size > priv->hw_params.max_inst_size) {
90e759d1
TW		 4591 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
4592 inst_size);
4593 ret = -EINVAL;
b481de9c
ZY		 4594 goto err_release;
4595 }
4596
099b40b7 4597 if (data_size > priv->hw_params.max_data_size) {
90e759d1
TW		 4598 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
4599 data_size);
4600 ret = -EINVAL;
b481de9c
ZY		 4601 goto err_release;
4602 }
099b40b7 4603 if (init_size > priv->hw_params.max_inst_size) {
b481de9c 4604 IWL_DEBUG_INFO
90e759d1
TW		 4605 ("uCode init instr len %d too large to fit in\n",
4606 init_size);
4607 ret = -EINVAL;
b481de9c
ZY		 4608 goto err_release;
4609 }
099b40b7 4610 if (init_data_size > priv->hw_params.max_data_size) {
b481de9c 4611 IWL_DEBUG_INFO
90e759d1
TW		 4612 ("uCode init data len %d too large to fit in\n",
4613 init_data_size);
4614 ret = -EINVAL;
b481de9c
ZY		 4615 goto err_release;
4616 }
099b40b7 4617 if (boot_size > priv->hw_params.max_bsm_size) {
b481de9c 4618 IWL_DEBUG_INFO
90e759d1
TW		 4619 ("uCode boot instr len %d too large to fit in\n",
4620 boot_size);
4621 ret = -EINVAL;
b481de9c
ZY		 4622 goto err_release;
4623 }
4624
4625 /* Allocate ucode buffers for card's bus-master loading ... */
4626
4627 /* Runtime instructions and 2 copies of data:
4628 * 1) unmodified from disk
4629 * 2) backup cache for save/restore during power-downs */
4630 priv->ucode_code.len = inst_size;
98c92211 4631 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 4632
4633 priv->ucode_data.len = data_size;
98c92211 4634 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 4635
4636 priv->ucode_data_backup.len = data_size;
98c92211 4637 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 4638
4639 /* Initialization instructions and data */
90e759d1
TW		 4640 if (init_size && init_data_size) {
4641 priv->ucode_init.len = init_size;
98c92211 4642 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 4643
4644 priv->ucode_init_data.len = init_data_size;
98c92211 4645 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 4646
4647 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
4648 goto err_pci_alloc;
4649 }
b481de9c
ZY		 4650
4651 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 4652 if (boot_size) {
4653 priv->ucode_boot.len = boot_size;
98c92211 4654 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 4655
90e759d1
TW		 4656 if (!priv->ucode_boot.v_addr)
4657 goto err_pci_alloc;
4658 }
b481de9c
ZY		 4659
4660 /* Copy images into buffers for card's bus-master reads ... */
4661
4662 /* Runtime instructions (first block of data in file) */
4663 src = &ucode->data[0];
4664 len = priv->ucode_code.len;
90e759d1 4665 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 4666 memcpy(priv->ucode_code.v_addr, src, len);
4667 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4668 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
4669
4670 /* Runtime data (2nd block)
bb8c093b 4671 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 4672 src = &ucode->data[inst_size];
4673 len = priv->ucode_data.len;
90e759d1 4674 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 4675 memcpy(priv->ucode_data.v_addr, src, len);
4676 memcpy(priv->ucode_data_backup.v_addr, src, len);
4677
4678 /* Initialization instructions (3rd block) */
4679 if (init_size) {
4680 src = &ucode->data[inst_size + data_size];
4681 len = priv->ucode_init.len;
90e759d1
TW		 4682 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
4683 len);
b481de9c
ZY		 4684 memcpy(priv->ucode_init.v_addr, src, len);
4685 }
4686
4687 /* Initialization data (4th block) */
4688 if (init_data_size) {
4689 src = &ucode->data[inst_size + data_size + init_size];
4690 len = priv->ucode_init_data.len;
90e759d1
TW		 4691 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
4692 len);
b481de9c
ZY		 4693 memcpy(priv->ucode_init_data.v_addr, src, len);
4694 }
4695
4696 /* Bootstrap instructions (5th block) */
4697 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
4698 len = priv->ucode_boot.len;
90e759d1 4699 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 4700 memcpy(priv->ucode_boot.v_addr, src, len);
4701
4702 /* We have our copies now, allow OS release its copies */
4703 release_firmware(ucode_raw);
4704 return 0;
4705
4706 err_pci_alloc:
4707 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 4708 ret = -ENOMEM;
bb8c093b 4709 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 4710
4711 err_release:
4712 release_firmware(ucode_raw);
4713
4714 error:
90e759d1 4715 return ret;
b481de9c
ZY		 4716}
4717
4718
4719/**
bb8c093b 4720 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 4721 *
4722 * Tell initialization uCode where to find runtime uCode.
4723 *
4724 * BSM registers initially contain pointers to initialization uCode.
4725 * We need to replace them to load runtime uCode inst and data,
4726 * and to save runtime data when powering down.
4727 */
c79dd5b5 4728static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY		 4729{
4730 dma_addr_t pinst;
4731 dma_addr_t pdata;
4732 int rc = 0;
4733 unsigned long flags;
4734
4735 /* bits 35:4 for 4965 */
4736 pinst = priv->ucode_code.p_addr >> 4;
4737 pdata = priv->ucode_data_backup.p_addr >> 4;
4738
4739 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 4740 rc = iwl_grab_nic_access(priv);
b481de9c
ZY		 4741 if (rc) {
4742 spin_unlock_irqrestore(&priv->lock, flags);
4743 return rc;
4744 }
4745
4746 /* Tell bootstrap uCode where to find image to load */
3395f6e9
TW		 4747 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
4748 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
4749 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 4750 priv->ucode_data.len);
4751
4752 /* Inst bytecount must be last to set up, bit 31 signals uCode
4753 * that all new ptr/size info is in place */
3395f6e9 4754 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 4755 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
4756
3395f6e9 4757 iwl_release_nic_access(priv);
b481de9c
ZY		 4758
4759 spin_unlock_irqrestore(&priv->lock, flags);
4760
4761 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
4762
4763 return rc;
4764}
4765
4766/**
bb8c093b 4767 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 4768 *
4769 * Called after REPLY_ALIVE notification received from "initialize" uCode.
4770 *
4771 * The 4965 "initialize" ALIVE reply contains calibration data for:
4772 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
4773 * (3945 does not contain this data).
4774 *
4775 * Tell "initialize" uCode to go ahead and load the runtime uCode.
4776*/
c79dd5b5 4777static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 4778{
4779 /* Check alive response for "valid" sign from uCode */
4780 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
4781 /* We had an error bringing up the hardware, so take it
4782 * all the way back down so we can try again */
4783 IWL_DEBUG_INFO("Initialize Alive failed.\n");
4784 goto restart;
4785 }
4786
4787 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
4788 * This is a paranoid check, because we would not have gotten the
4789 * "initialize" alive if code weren't properly loaded. */
b0692f2f 4790 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 4791 /* Runtime instruction load was bad;
4792 * take it all the way back down so we can try again */
4793 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
4794 goto restart;
4795 }
4796
4797 /* Calculate temperature */
4798 priv->temperature = iwl4965_get_temperature(priv);
4799
4800 /* Send pointers to protocol/runtime uCode image ... init code will
4801 * load and launch runtime uCode, which will send us another "Alive"
4802 * notification. */
4803 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 4804 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 4805 /* Runtime instruction load won't happen;
4806 * take it all the way back down so we can try again */
4807 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
4808 goto restart;
4809 }
4810 return;
4811
4812 restart:
4813 queue_work(priv->workqueue, &priv->restart);
4814}
4815
4816
4817/**
bb8c093b 4818 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 4819 * from protocol/runtime uCode (initialization uCode's
bb8c093b 4820 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 4821 */
c79dd5b5 4822static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c 4823{
57aab75a 4824 int ret = 0;
b481de9c
ZY		 4825
4826 IWL_DEBUG_INFO("Runtime Alive received.\n");
4827
4828 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
4829 /* We had an error bringing up the hardware, so take it
4830 * all the way back down so we can try again */
4831 IWL_DEBUG_INFO("Alive failed.\n");
4832 goto restart;
4833 }
4834
4835 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
4836 * This is a paranoid check, because we would not have gotten the
4837 * "runtime" alive if code weren't properly loaded. */
b0692f2f 4838 if (iwl_verify_ucode(priv)) {
b481de9c
ZY		 4839 /* Runtime instruction load was bad;
4840 * take it all the way back down so we can try again */
4841 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
4842 goto restart;
4843 }
4844
bf85ea4f 4845 iwlcore_clear_stations_table(priv);
b481de9c 4846
57aab75a
TW		 4847 ret = priv->cfg->ops->lib->alive_notify(priv);
4848 if (ret) {
b481de9c 4849 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
57aab75a 4850 ret);
b481de9c
ZY		 4851 goto restart;
4852 }
4853
9fbab516 4854 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 4855 set_bit(STATUS_ALIVE, &priv->status);
4856
4857 /* Clear out the uCode error bit if it is set */
4858 clear_bit(STATUS_FW_ERROR, &priv->status);
4859
fee1247a 4860 if (iwl_is_rfkill(priv))
b481de9c
ZY		 4861 return;
4862
5a66926a 4863 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 4864
4865 priv->active_rate = priv->rates_mask;
4866 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
4867
3109ece1 4868 if (iwl_is_associated(priv)) {
bb8c093b
CH		 4869 struct iwl4965_rxon_cmd *active_rxon =
4870 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 4871
4872 memcpy(&priv->staging_rxon, &priv->active_rxon,
4873 sizeof(priv->staging_rxon));
4874 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4875 } else {
4876 /* Initialize our rx_config data */
bb8c093b 4877 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 4878 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
4879 }
4880
9fbab516 4881 /* Configure Bluetooth device coexistence support */
bb8c093b 4882 iwl4965_send_bt_config(priv);
b481de9c
ZY		 4883
4884 /* Configure the adapter for unassociated operation */
bb8c093b 4885 iwl4965_commit_rxon(priv);
b481de9c
ZY		 4886
4887 /* At this point, the NIC is initialized and operational */
4888 priv->notif_missed_beacons = 0;
b481de9c
ZY		 4889
4890 iwl4965_rf_kill_ct_config(priv);
5a66926a 4891
fe00b5a5
RC		 4892 iwl_leds_register(priv);
4893
b481de9c 4894 IWL_DEBUG_INFO("ALIVE processing complete.\n");
a9f46786 4895 set_bit(STATUS_READY, &priv->status);
5a66926a 4896 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 4897
4898 if (priv->error_recovering)
bb8c093b 4899 iwl4965_error_recovery(priv);
b481de9c 4900
c8381fdc 4901 iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
84363e6e 4902 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
b481de9c
ZY		 4903 return;
4904
4905 restart:
4906 queue_work(priv->workqueue, &priv->restart);
4907}
4908
c79dd5b5 4909static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 4910
c79dd5b5 4911static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 4912{
4913 unsigned long flags;
4914 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
4915 struct ieee80211_conf *conf = NULL;
4916
4917 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
4918
4919 conf = ieee80211_get_hw_conf(priv->hw);
4920
4921 if (!exit_pending)
4922 set_bit(STATUS_EXIT_PENDING, &priv->status);
4923
ab53d8af
MA		 4924 iwl_leds_unregister(priv);
4925
c8381fdc
MA		 4926 iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
4927
bf85ea4f 4928 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 4929
4930 /* Unblock any waiting calls */
4931 wake_up_interruptible_all(&priv->wait_command_queue);
4932
b481de9c
ZY		 4933 /* Wipe out the EXIT_PENDING status bit if we are not actually
4934 * exiting the module */
4935 if (!exit_pending)
4936 clear_bit(STATUS_EXIT_PENDING, &priv->status);
4937
4938 /* stop and reset the on-board processor */
3395f6e9 4939 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 4940
4941 /* tell the device to stop sending interrupts */
0359facc 4942 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4943 iwl4965_disable_interrupts(priv);
0359facc
MA		 4944 spin_unlock_irqrestore(&priv->lock, flags);
4945 iwl_synchronize_irq(priv);
b481de9c
ZY		 4946
4947 if (priv->mac80211_registered)
4948 ieee80211_stop_queues(priv->hw);
4949
bb8c093b 4950 /* If we have not previously called iwl4965_init() then
b481de9c 4951 * clear all bits but the RF Kill and SUSPEND bits and return */
fee1247a 4952 if (!iwl_is_init(priv)) {
b481de9c
ZY		 4953 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
4954 STATUS_RF_KILL_HW |
4955 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
4956 STATUS_RF_KILL_SW |
9788864e
RC		 4957 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
4958 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 4959 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
4960 STATUS_IN_SUSPEND;
4961 goto exit;
4962 }
4963
4964 /* ...otherwise clear out all the status bits but the RF Kill and
4965 * SUSPEND bits and continue taking the NIC down. */
4966 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
4967 STATUS_RF_KILL_HW |
4968 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
4969 STATUS_RF_KILL_SW |
9788864e
RC		 4970 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
4971 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 4972 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
4973 STATUS_IN_SUSPEND |
4974 test_bit(STATUS_FW_ERROR, &priv->status) <<
4975 STATUS_FW_ERROR;
4976
4977 spin_lock_irqsave(&priv->lock, flags);
3395f6e9 4978 iwl_clear_bit(priv, CSR_GP_CNTRL,
9fbab516 4979 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 4980 spin_unlock_irqrestore(&priv->lock, flags);
4981
bb8c093b
CH		 4982 iwl4965_hw_txq_ctx_stop(priv);
4983 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 4984
4985 spin_lock_irqsave(&priv->lock, flags);
3395f6e9
TW		 4986 if (!iwl_grab_nic_access(priv)) {
4987 iwl_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 4988 APMG_CLK_VAL_DMA_CLK_RQT);
3395f6e9 4989 iwl_release_nic_access(priv);
b481de9c
ZY		 4990 }
4991 spin_unlock_irqrestore(&priv->lock, flags);
4992
4993 udelay(5);
4994
bb8c093b 4995 iwl4965_hw_nic_stop_master(priv);
3395f6e9 4996 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
bb8c093b 4997 iwl4965_hw_nic_reset(priv);
399f4900 4998 priv->cfg->ops->lib->free_shared_mem(priv);
b481de9c
ZY		 4999
5000 exit:
bb8c093b 5001 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 5002
5003 if (priv->ibss_beacon)
5004 dev_kfree_skb(priv->ibss_beacon);
5005 priv->ibss_beacon = NULL;
5006
5007 /* clear out any free frames */
bb8c093b 5008 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 5009}
5010
c79dd5b5 5011static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 5012{
5013 mutex_lock(&priv->mutex);
bb8c093b 5014 __iwl4965_down(priv);
b481de9c 5015 mutex_unlock(&priv->mutex);
b24d22b1 5016
bb8c093b 5017 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 5018}
5019
5020#define MAX_HW_RESTARTS 5
5021
c79dd5b5 5022static int __iwl4965_up(struct iwl_priv *priv)
b481de9c 5023{
57aab75a
TW		 5024 int i;
5025 int ret;
b481de9c
ZY		 5026
5027 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5028 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5029 return -EIO;
5030 }
5031
5032 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5033 IWL_WARNING("Radio disabled by SW RF kill (module "
5034 "parameter)\n");
ad97edd2 5035 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY		 5036 return -ENODEV;
5037 }
5038
e903fbd4
RC		 5039 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5040 IWL_ERROR("ucode not available for device bringup\n");
5041 return -EIO;
5042 }
5043
e655b9f0 5044 /* If platform's RF_KILL switch is NOT set to KILL */
3395f6e9 5045 if (iwl_read32(priv, CSR_GP_CNTRL) &
e655b9f0
ZY		 5046 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5047 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5048 else {
5049 set_bit(STATUS_RF_KILL_HW, &priv->status);
5050 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
ad97edd2 5051 iwl_rfkill_set_hw_state(priv);
e655b9f0
ZY		 5052 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5053 return -ENODEV;
5054 }
b481de9c
ZY		 5055 }
5056
ad97edd2 5057 iwl_rfkill_set_hw_state(priv);
3395f6e9 5058 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5059
399f4900
RR		 5060 ret = priv->cfg->ops->lib->alloc_shared_mem(priv);
5061 if (ret) {
5062 IWL_ERROR("Unable to allocate shared memory\n");
5063 return ret;
5064 }
5065
57aab75a
TW		 5066 ret = priv->cfg->ops->lib->hw_nic_init(priv);
5067 if (ret) {
5068 IWL_ERROR("Unable to init nic\n");
5069 return ret;
b481de9c
ZY		 5070 }
5071
5072 /* make sure rfkill handshake bits are cleared */
3395f6e9
TW		 5073 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5074 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 5075 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5076
5077 /* clear (again), then enable host interrupts */
3395f6e9 5078 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
bb8c093b 5079 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5080
5081 /* really make sure rfkill handshake bits are cleared */
3395f6e9
TW		 5082 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5083 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 5084
5085 /* Copy original ucode data image from disk into backup cache.
5086 * This will be used to initialize the on-board processor's
5087 * data SRAM for a clean start when the runtime program first loads. */
5088 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5089 priv->ucode_data.len);
b481de9c 5090
e655b9f0
ZY		 5091 /* We return success when we resume from suspend and rf_kill is on. */
5092 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5093 return 0;
b481de9c
ZY		 5094
5095 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5096
bf85ea4f 5097 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5098
5099 /* load bootstrap state machine,
5100 * load bootstrap program into processor's memory,
5101 * prepare to load the "initialize" uCode */
57aab75a 5102 ret = priv->cfg->ops->lib->load_ucode(priv);
b481de9c 5103
57aab75a
TW		 5104 if (ret) {
5105 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
b481de9c
ZY		 5106 continue;
5107 }
5108
5109 /* start card; "initialize" will load runtime ucode */
bb8c093b 5110 iwl4965_nic_start(priv);
b481de9c 5111
b481de9c
ZY		 5112 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5113
5114 return 0;
5115 }
5116
5117 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5118 __iwl4965_down(priv);
b481de9c
ZY		 5119
5120 /* tried to restart and config the device for as long as our
5121 * patience could withstand */
5122 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5123 return -EIO;
5124}
5125
5126
5127/*****************************************************************************
5128 *
5129 * Workqueue callbacks
5130 *
5131 *****************************************************************************/
5132
bb8c093b 5133static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5134{
c79dd5b5
TW		 5135 struct iwl_priv *priv =
5136 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 5137
5138 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5139 return;
5140
5141 mutex_lock(&priv->mutex);
bb8c093b 5142 iwl4965_init_alive_start(priv);
b481de9c
ZY		 5143 mutex_unlock(&priv->mutex);
5144}
5145
bb8c093b 5146static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5147{
c79dd5b5
TW		 5148 struct iwl_priv *priv =
5149 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 5150
5151 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5152 return;
5153
5154 mutex_lock(&priv->mutex);
bb8c093b 5155 iwl4965_alive_start(priv);
b481de9c
ZY		 5156 mutex_unlock(&priv->mutex);
5157}
5158
bb8c093b 5159static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5160{
c79dd5b5 5161 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 5162
5163 wake_up_interruptible(&priv->wait_command_queue);
5164
5165 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5166 return;
5167
5168 mutex_lock(&priv->mutex);
5169
fee1247a 5170 if (!iwl_is_rfkill(priv)) {
b481de9c
ZY		 5171 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5172 "HW and/or SW RF Kill no longer active, restarting "
5173 "device\n");
5174 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5175 queue_work(priv->workqueue, &priv->restart);
5176 } else {
ad97edd2
MA		 5177 /* make sure mac80211 stop sending Tx frame */
5178 if (priv->mac80211_registered)
5179 ieee80211_stop_queues(priv->hw);
b481de9c
ZY		 5180
5181 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5182 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5183 "disabled by SW switch\n");
5184 else
5185 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5186 "Kill switch must be turned off for "
5187 "wireless networking to work.\n");
5188 }
ad97edd2
MA		 5189 iwl_rfkill_set_hw_state(priv);
5190
b481de9c
ZY		 5191 mutex_unlock(&priv->mutex);
5192}
5193
5194#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5195
bb8c093b 5196static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5197{
c79dd5b5
TW		 5198 struct iwl_priv *priv =
5199 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY		 5200
5201 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5202 return;
5203
5204 mutex_lock(&priv->mutex);
5205 if (test_bit(STATUS_SCANNING, &priv->status) ||
5206 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5207 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5208 "Scan completion watchdog resetting adapter (%dms)\n",
5209 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 5210
b481de9c 5211 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 5212 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 5213 }
5214 mutex_unlock(&priv->mutex);
5215}
5216
bb8c093b 5217static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 5218{
c79dd5b5
TW		 5219 struct iwl_priv *priv =
5220 container_of(data, struct iwl_priv, request_scan);
857485c0 5221 struct iwl_host_cmd cmd = {
b481de9c 5222 .id = REPLY_SCAN_CMD,
bb8c093b 5223 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 5224 .meta.flags = CMD_SIZE_HUGE,
5225 };
bb8c093b 5226 struct iwl4965_scan_cmd *scan;
b481de9c 5227 struct ieee80211_conf *conf = NULL;
78330fdd 5228 u16 cmd_len;
8318d78a 5229 enum ieee80211_band band;
78330fdd 5230 u8 direct_mask;
857485c0 5231 int ret = 0;
b481de9c
ZY		 5232
5233 conf = ieee80211_get_hw_conf(priv->hw);
5234
5235 mutex_lock(&priv->mutex);
5236
fee1247a 5237 if (!iwl_is_ready(priv)) {
b481de9c
ZY		 5238 IWL_WARNING("request scan called when driver not ready.\n");
5239 goto done;
5240 }
5241
5242 /* Make sure the scan wasn't cancelled before this queued work
5243 * was given the chance to run... */
5244 if (!test_bit(STATUS_SCANNING, &priv->status))
5245 goto done;
5246
5247 /* This should never be called or scheduled if there is currently
5248 * a scan active in the hardware. */
5249 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5250 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5251 "Ignoring second request.\n");
857485c0 5252 ret = -EIO;
b481de9c
ZY		 5253 goto done;
5254 }
5255
5256 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5257 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5258 goto done;
5259 }
5260
5261 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5262 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5263 goto done;
5264 }
5265
fee1247a 5266 if (iwl_is_rfkill(priv)) {
b481de9c
ZY		 5267 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5268 goto done;
5269 }
5270
5271 if (!test_bit(STATUS_READY, &priv->status)) {
5272 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5273 goto done;
5274 }
5275
5276 if (!priv->scan_bands) {
5277 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5278 goto done;
5279 }
5280
5281 if (!priv->scan) {
bb8c093b 5282 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 5283 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5284 if (!priv->scan) {
857485c0 5285 ret = -ENOMEM;
b481de9c
ZY		 5286 goto done;
5287 }
5288 }
5289 scan = priv->scan;
bb8c093b 5290 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 5291
5292 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5293 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5294
3109ece1 5295 if (iwl_is_associated(priv)) {
b481de9c
ZY		 5296 u16 interval = 0;
5297 u32 extra;
5298 u32 suspend_time = 100;
5299 u32 scan_suspend_time = 100;
5300 unsigned long flags;
5301
5302 IWL_DEBUG_INFO("Scanning while associated...\n");
5303
5304 spin_lock_irqsave(&priv->lock, flags);
5305 interval = priv->beacon_int;
5306 spin_unlock_irqrestore(&priv->lock, flags);
5307
5308 scan->suspend_time = 0;
052c4b9f 5309 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 5310 if (!interval)
5311 interval = suspend_time;
5312
5313 extra = (suspend_time / interval) << 22;
5314 scan_suspend_time = (extra |
5315 ((suspend_time % interval) * 1024));
5316 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5317 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5318 scan_suspend_time, interval);
5319 }
5320
5321 /* We should add the ability for user to lock to PASSIVE ONLY */
5322 if (priv->one_direct_scan) {
5323 IWL_DEBUG_SCAN
5324 ("Kicking off one direct scan for '%s'\n",
bb8c093b 5325 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 5326 priv->direct_ssid_len));
5327 scan->direct_scan[0].id = WLAN_EID_SSID;
5328 scan->direct_scan[0].len = priv->direct_ssid_len;
5329 memcpy(scan->direct_scan[0].ssid,
5330 priv->direct_ssid, priv->direct_ssid_len);
5331 direct_mask = 1;
3109ece1 5332 } else if (!iwl_is_associated(priv) && priv->essid_len) {
786b4557
BM		 5333 IWL_DEBUG_SCAN
5334 ("Kicking off one direct scan for '%s' when not associated\n",
5335 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY		 5336 scan->direct_scan[0].id = WLAN_EID_SSID;
5337 scan->direct_scan[0].len = priv->essid_len;
5338 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
5339 direct_mask = 1;
857485c0 5340 } else {
786b4557 5341 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
b481de9c 5342 direct_mask = 0;
857485c0 5343 }
b481de9c 5344
b481de9c 5345 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5425e490 5346 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
b481de9c
ZY		 5347 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5348
b481de9c
ZY		 5349
5350 switch (priv->scan_bands) {
5351 case 2:
5352 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5353 scan->tx_cmd.rate_n_flags =
bb8c093b 5354 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 5355 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
5356
5357 scan->good_CRC_th = 0;
8318d78a 5358 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 5359 break;
5360
5361 case 1:
5362 scan->tx_cmd.rate_n_flags =
bb8c093b 5363 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 5364 RATE_MCS_ANT_B_MSK);
5365 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 5366 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 5367 break;
5368
5369 default:
5370 IWL_WARNING("Invalid scan band count\n");
5371 goto done;
5372 }
5373
78330fdd
TW		 5374 /* We don't build a direct scan probe request; the uCode will do
5375 * that based on the direct_mask added to each channel entry */
5376 cmd_len = iwl4965_fill_probe_req(priv, band,
5377 (struct ieee80211_mgmt *)scan->data,
5378 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
5379
5380 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 5381 /* select Rx chains */
5382
5383 /* Force use of chains B and C (0x6) for scan Rx.
5384 * Avoid A (0x1) because of its off-channel reception on A-band.
5385 * MIMO is not used here, but value is required to make uCode happy. */
5386 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
5387 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
5388 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
5389 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
5390
5391 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
5392 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5393
786b4557 5394 if (direct_mask)
26c0f03f
RC		 5395 scan->channel_count =
5396 iwl4965_get_channels_for_scan(
5397 priv, band, 1, /* active */
5398 direct_mask,
5399 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
786b4557 5400 else
26c0f03f
RC		 5401 scan->channel_count =
5402 iwl4965_get_channels_for_scan(
5403 priv, band, 0, /* passive */
5404 direct_mask,
5405 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
b481de9c 5406
5da4b55f
MA		 5407 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
5408 RXON_FILTER_BCON_AWARE_MSK);
b481de9c 5409 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 5410 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 5411 cmd.data = scan;
5412 scan->len = cpu_to_le16(cmd.len);
5413
5414 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW		 5415 ret = iwl_send_cmd_sync(priv, &cmd);
5416 if (ret)
b481de9c
ZY		 5417 goto done;
5418
5419 queue_delayed_work(priv->workqueue, &priv->scan_check,
5420 IWL_SCAN_CHECK_WATCHDOG);
5421
5422 mutex_unlock(&priv->mutex);
5423 return;
5424
5425 done:
01ebd063 5426 /* inform mac80211 scan aborted */
b481de9c
ZY		 5427 queue_work(priv->workqueue, &priv->scan_completed);
5428 mutex_unlock(&priv->mutex);
5429}
5430
bb8c093b 5431static void iwl4965_bg_up(struct work_struct *data)
b481de9c 5432{
c79dd5b5 5433 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 5434
5435 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5436 return;
5437
5438 mutex_lock(&priv->mutex);
bb8c093b 5439 __iwl4965_up(priv);
b481de9c
ZY		 5440 mutex_unlock(&priv->mutex);
5441}
5442
bb8c093b 5443static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 5444{
c79dd5b5 5445 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 5446
5447 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5448 return;
5449
bb8c093b 5450 iwl4965_down(priv);
b481de9c
ZY		 5451 queue_work(priv->workqueue, &priv->up);
5452}
5453
bb8c093b 5454static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 5455{
c79dd5b5
TW		 5456 struct iwl_priv *priv =
5457 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 5458
5459 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5460 return;
5461
5462 mutex_lock(&priv->mutex);
bb8c093b 5463 iwl4965_rx_replenish(priv);
b481de9c
ZY		 5464 mutex_unlock(&priv->mutex);
5465}
5466
7878a5a4
MA		 5467#define IWL_DELAY_NEXT_SCAN (HZ*2)
5468
508e32e1 5469static void iwl4965_post_associate(struct iwl_priv *priv)
b481de9c 5470{
b481de9c 5471 struct ieee80211_conf *conf = NULL;
857485c0 5472 int ret = 0;
0795af57 5473 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 5474
5475 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
5476 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
5477 return;
5478 }
5479
0795af57
JP		 5480 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
5481 priv->assoc_id,
5482 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 5483
5484
5485 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5486 return;
5487
b481de9c 5488
508e32e1 5489 if (!priv->vif || !priv->is_open)
948c171c 5490 return;
508e32e1 5491
bb8c093b 5492 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 5493
b481de9c
ZY		 5494 conf = ieee80211_get_hw_conf(priv->hw);
5495
5496 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5497 iwl4965_commit_rxon(priv);
b481de9c 5498
bb8c093b
CH		 5499 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5500 iwl4965_setup_rxon_timing(priv);
857485c0 5501 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5502 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5503 if (ret)
b481de9c
ZY		 5504 IWL_WARNING("REPLY_RXON_TIMING failed - "
5505 "Attempting to continue.\n");
5506
5507 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5508
c8b0e6e1 5509#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 5510 if (priv->current_ht_config.is_ht)
5511 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 5512#endif /* CONFIG_IWL4965_HT*/
c7de35cd 5513 iwl_set_rxon_chain(priv);
b481de9c
ZY		 5514 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5515
5516 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5517 priv->assoc_id, priv->beacon_int);
5518
5519 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5520 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5521 else
5522 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5523
5524 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5525 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5526 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5527 else
5528 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5529
5530 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5531 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5532
5533 }
5534
bb8c093b 5535 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5536
5537 switch (priv->iw_mode) {
5538 case IEEE80211_IF_TYPE_STA:
bb8c093b 5539 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 5540 break;
5541
5542 case IEEE80211_IF_TYPE_IBSS:
5543
5544 /* clear out the station table */
bf85ea4f 5545 iwlcore_clear_stations_table(priv);
b481de9c 5546
bb8c093b
CH		 5547 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
5548 iwl4965_rxon_add_station(priv, priv->bssid, 0);
5549 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
5550 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 5551
5552 break;
5553
5554 default:
5555 IWL_ERROR("%s Should not be called in %d mode\n",
5556 __FUNCTION__, priv->iw_mode);
5557 break;
5558 }
5559
bb8c093b 5560 iwl4965_sequence_reset(priv);
b481de9c 5561
b481de9c 5562 /* Enable Rx differential gain and sensitivity calibrations */
f0832f13 5563 iwl_chain_noise_reset(priv);
b481de9c 5564 priv->start_calib = 1;
b481de9c
ZY		 5565
5566 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5567 priv->assoc_station_added = 1;
5568
bb8c093b 5569 iwl4965_activate_qos(priv, 0);
292ae174 5570
5da4b55f 5571 iwl_power_update_mode(priv, 0);
7878a5a4
MA		 5572 /* we have just associated, don't start scan too early */
5573 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
508e32e1
RC		 5574}
5575
5576
5577static void iwl4965_bg_post_associate(struct work_struct *data)
5578{
5579 struct iwl_priv *priv = container_of(data, struct iwl_priv,
5580 post_associate.work);
5581
5582 mutex_lock(&priv->mutex);
5583 iwl4965_post_associate(priv);
b481de9c 5584 mutex_unlock(&priv->mutex);
508e32e1 5585
b481de9c
ZY		 5586}
5587
bb8c093b 5588static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 5589{
c79dd5b5 5590 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 5591
fee1247a 5592 if (!iwl_is_ready(priv))
b481de9c
ZY		 5593 return;
5594
5595 mutex_lock(&priv->mutex);
5596
5597 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 5598 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 5599
5600 mutex_unlock(&priv->mutex);
5601}
5602
76bb77e0
ZY		 5603static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
5604
bb8c093b 5605static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 5606{
c79dd5b5
TW		 5607 struct iwl_priv *priv =
5608 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY		 5609
5610 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
5611
5612 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5613 return;
5614
a0646470
ZY		 5615 if (test_bit(STATUS_CONF_PENDING, &priv->status))
5616 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 5617
b481de9c
ZY		 5618 ieee80211_scan_completed(priv->hw);
5619
5620 /* Since setting the TXPOWER may have been deferred while
5621 * performing the scan, fire one off */
5622 mutex_lock(&priv->mutex);
bb8c093b 5623 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 5624 mutex_unlock(&priv->mutex);
5625}
5626
5627/*****************************************************************************
5628 *
5629 * mac80211 entry point functions
5630 *
5631 *****************************************************************************/
5632
5a66926a
ZY		 5633#define UCODE_READY_TIMEOUT (2 * HZ)
5634
bb8c093b 5635static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 5636{
c79dd5b5 5637 struct iwl_priv *priv = hw->priv;
5a66926a 5638 int ret;
b481de9c
ZY		 5639
5640 IWL_DEBUG_MAC80211("enter\n");
5641
5a66926a
ZY		 5642 if (pci_enable_device(priv->pci_dev)) {
5643 IWL_ERROR("Fail to pci_enable_device\n");
5644 return -ENODEV;
5645 }
5646 pci_restore_state(priv->pci_dev);
5647 pci_enable_msi(priv->pci_dev);
5648
5649 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
5650 DRV_NAME, priv);
5651 if (ret) {
5652 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
5653 goto out_disable_msi;
5654 }
5655
b481de9c
ZY		 5656 /* we should be verifying the device is ready to be opened */
5657 mutex_lock(&priv->mutex);
5658
5a66926a
ZY		 5659 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
5660 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
5661 * ucode filename and max sizes are card-specific. */
b481de9c 5662
5a66926a
ZY		 5663 if (!priv->ucode_code.len) {
5664 ret = iwl4965_read_ucode(priv);
5665 if (ret) {
5666 IWL_ERROR("Could not read microcode: %d\n", ret);
5667 mutex_unlock(&priv->mutex);
5668 goto out_release_irq;
5669 }
5670 }
b481de9c 5671
e655b9f0 5672 ret = __iwl4965_up(priv);
5a66926a 5673
b481de9c 5674 mutex_unlock(&priv->mutex);
5a66926a 5675
e655b9f0
ZY		 5676 if (ret)
5677 goto out_release_irq;
5678
5679 IWL_DEBUG_INFO("Start UP work done.\n");
5680
5681 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
5682 return 0;
5683
5a66926a
ZY		 5684 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
5685 * mac80211 will not be run successfully. */
5686 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
5687 test_bit(STATUS_READY, &priv->status),
5688 UCODE_READY_TIMEOUT);
5689 if (!ret) {
5690 if (!test_bit(STATUS_READY, &priv->status)) {
5691 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
5692 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5693 ret = -ETIMEDOUT;
5694 goto out_release_irq;
5695 }
5696 }
5697
e655b9f0 5698 priv->is_open = 1;
b481de9c
ZY		 5699 IWL_DEBUG_MAC80211("leave\n");
5700 return 0;
5a66926a
ZY		 5701
5702out_release_irq:
5703 free_irq(priv->pci_dev->irq, priv);
5704out_disable_msi:
5705 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 5706 pci_disable_device(priv->pci_dev);
5707 priv->is_open = 0;
5708 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 5709 return ret;
b481de9c
ZY		 5710}
5711
bb8c093b 5712static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 5713{
c79dd5b5 5714 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 5715
5716 IWL_DEBUG_MAC80211("enter\n");
948c171c 5717
e655b9f0
ZY		 5718 if (!priv->is_open) {
5719 IWL_DEBUG_MAC80211("leave - skip\n");
5720 return;
5721 }
5722
b481de9c 5723 priv->is_open = 0;
5a66926a 5724
fee1247a 5725 if (iwl_is_ready_rf(priv)) {
e655b9f0
ZY		 5726 /* stop mac, cancel any scan request and clear
5727 * RXON_FILTER_ASSOC_MSK BIT
5728 */
5a66926a
ZY		 5729 mutex_lock(&priv->mutex);
5730 iwl4965_scan_cancel_timeout(priv, 100);
5731 cancel_delayed_work(&priv->post_associate);
fde3571f 5732 mutex_unlock(&priv->mutex);
fde3571f
MA		 5733 }
5734
5a66926a
ZY		 5735 iwl4965_down(priv);
5736
5737 flush_workqueue(priv->workqueue);
5738 free_irq(priv->pci_dev->irq, priv);
5739 pci_disable_msi(priv->pci_dev);
5740 pci_save_state(priv->pci_dev);
5741 pci_disable_device(priv->pci_dev);
948c171c 5742
b481de9c 5743 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 5744}
5745
bb8c093b 5746static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 5747 struct ieee80211_tx_control *ctl)
5748{
c79dd5b5 5749 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 5750
5751 IWL_DEBUG_MAC80211("enter\n");
5752
5753 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
5754 IWL_DEBUG_MAC80211("leave - monitor\n");
5755 return -1;
5756 }
5757
5758 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 5759 ctl->tx_rate->bitrate);
b481de9c 5760
bb8c093b 5761 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 5762 dev_kfree_skb_any(skb);
5763
5764 IWL_DEBUG_MAC80211("leave\n");
5765 return 0;
5766}
5767
bb8c093b 5768static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 5769 struct ieee80211_if_init_conf *conf)
5770{
c79dd5b5 5771 struct iwl_priv *priv = hw->priv;
b481de9c 5772 unsigned long flags;
0795af57 5773 DECLARE_MAC_BUF(mac);
b481de9c 5774
32bfd35d 5775 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 5776
32bfd35d
JB		 5777 if (priv->vif) {
5778 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 5779 return -EOPNOTSUPP;
b481de9c
ZY		 5780 }
5781
5782 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 5783 priv->vif = conf->vif;
b481de9c
ZY		 5784
5785 spin_unlock_irqrestore(&priv->lock, flags);
5786
5787 mutex_lock(&priv->mutex);
864792e3
TW		 5788
5789 if (conf->mac_addr) {
5790 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
5791 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
5792 }
b481de9c 5793
fee1247a 5794 if (iwl_is_ready(priv))
5a66926a
ZY		 5795 iwl4965_set_mode(priv, conf->type);
5796
b481de9c
ZY		 5797 mutex_unlock(&priv->mutex);
5798
5a66926a 5799 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 5800 return 0;
5801}
5802
5803/**
bb8c093b 5804 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 5805 *
5806 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
5807 * be set inappropriately and the driver currently sets the hardware up to
5808 * use it whenever needed.
5809 */
bb8c093b 5810static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 5811{
c79dd5b5 5812 struct iwl_priv *priv = hw->priv;
bf85ea4f 5813 const struct iwl_channel_info *ch_info;
b481de9c 5814 unsigned long flags;
76bb77e0 5815 int ret = 0;
b481de9c
ZY		 5816
5817 mutex_lock(&priv->mutex);
8318d78a 5818 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 5819
12342c47
ZY		 5820 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
5821
fee1247a 5822 if (!iwl_is_ready(priv)) {
b481de9c 5823 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 5824 ret = -EIO;
5825 goto out;
b481de9c
ZY		 5826 }
5827
1ea87396 5828 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 5829 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 5830 IWL_DEBUG_MAC80211("leave - scanning\n");
5831 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 5832 mutex_unlock(&priv->mutex);
a0646470 5833 return 0;
b481de9c
ZY		 5834 }
5835
5836 spin_lock_irqsave(&priv->lock, flags);
5837
8622e705 5838 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 5839 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 5840 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 5841 IWL_DEBUG_MAC80211("leave - invalid channel\n");
5842 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 5843 ret = -EINVAL;
5844 goto out;
b481de9c
ZY		 5845 }
5846
c8b0e6e1 5847#ifdef CONFIG_IWL4965_HT
78330fdd 5848 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 5849 * from any ht related info since 2.4 does not
5850 * support ht */
78330fdd 5851 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 5852#ifdef IEEE80211_CONF_CHANNEL_SWITCH
5853 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
5854#endif
5855 )
5856 priv->staging_rxon.flags = 0;
c8b0e6e1 5857#endif /* CONFIG_IWL4965_HT */
b481de9c 5858
c7de35cd 5859 iwl_set_rxon_channel(priv, conf->channel->band,
8318d78a 5860 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 5861
8318d78a 5862 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 5863
5864 /* The list of supported rates and rate mask can be different
8318d78a 5865 * for each band; since the band may have changed, reset
b481de9c 5866 * the rate mask to what mac80211 lists */
bb8c093b 5867 iwl4965_set_rate(priv);
b481de9c
ZY		 5868
5869 spin_unlock_irqrestore(&priv->lock, flags);
5870
5871#ifdef IEEE80211_CONF_CHANNEL_SWITCH
5872 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 5873 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 5874 goto out;
b481de9c
ZY		 5875 }
5876#endif
5877
ad97edd2
MA		 5878 if (priv->cfg->ops->lib->radio_kill_sw)
5879 priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 5880
5881 if (!conf->radio_enabled) {
5882 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 5883 goto out;
b481de9c
ZY		 5884 }
5885
fee1247a 5886 if (iwl_is_rfkill(priv)) {
b481de9c 5887 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 5888 ret = -EIO;
5889 goto out;
b481de9c
ZY		 5890 }
5891
bb8c093b 5892 iwl4965_set_rate(priv);
b481de9c
ZY		 5893
5894 if (memcmp(&priv->active_rxon,
5895 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 5896 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5897 else
5898 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
5899
5900 IWL_DEBUG_MAC80211("leave\n");
5901
a0646470
ZY		 5902out:
5903 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 5904 mutex_unlock(&priv->mutex);
76bb77e0 5905 return ret;
b481de9c
ZY		 5906}
5907
c79dd5b5 5908static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 5909{
857485c0 5910 int ret = 0;
b481de9c 5911
d986bcd1 5912 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 5913 return;
5914
5915 /* The following should be done only at AP bring up */
5916 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
5917
5918 /* RXON - unassoc (to set timing command) */
5919 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5920 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5921
5922 /* RXON Timing */
bb8c093b
CH		 5923 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
5924 iwl4965_setup_rxon_timing(priv);
857485c0 5925 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 5926 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 5927 if (ret)
b481de9c
ZY		 5928 IWL_WARNING("REPLY_RXON_TIMING failed - "
5929 "Attempting to continue.\n");
5930
c7de35cd 5931 iwl_set_rxon_chain(priv);
b481de9c
ZY		 5932
5933 /* FIXME: what should be the assoc_id for AP? */
5934 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5935 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5936 priv->staging_rxon.flags |=
5937 RXON_FLG_SHORT_PREAMBLE_MSK;
5938 else
5939 priv->staging_rxon.flags &=
5940 ~RXON_FLG_SHORT_PREAMBLE_MSK;
5941
5942 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5943 if (priv->assoc_capability &
5944 WLAN_CAPABILITY_SHORT_SLOT_TIME)
5945 priv->staging_rxon.flags |=
5946 RXON_FLG_SHORT_SLOT_MSK;
5947 else
5948 priv->staging_rxon.flags &=
5949 ~RXON_FLG_SHORT_SLOT_MSK;
5950
5951 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
5952 priv->staging_rxon.flags &=
5953 ~RXON_FLG_SHORT_SLOT_MSK;
5954 }
5955 /* restore RXON assoc */
5956 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 5957 iwl4965_commit_rxon(priv);
bb8c093b 5958 iwl4965_activate_qos(priv, 1);
bb8c093b 5959 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 5960 }
bb8c093b 5961 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 5962
5963 /* FIXME - we need to add code here to detect a totally new
5964 * configuration, reset the AP, unassoc, rxon timing, assoc,
5965 * clear sta table, add BCAST sta... */
5966}
5967
32bfd35d
JB		 5968static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
5969 struct ieee80211_vif *vif,
b481de9c
ZY		 5970 struct ieee80211_if_conf *conf)
5971{
c79dd5b5 5972 struct iwl_priv *priv = hw->priv;
0795af57 5973 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 5974 unsigned long flags;
5975 int rc;
5976
5977 if (conf == NULL)
5978 return -EIO;
5979
b716bb91
EG		 5980 if (priv->vif != vif) {
5981 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
b716bb91
EG		 5982 return 0;
5983 }
5984
b481de9c
ZY		 5985 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
5986 (!conf->beacon || !conf->ssid_len)) {
5987 IWL_DEBUG_MAC80211
5988 ("Leaving in AP mode because HostAPD is not ready.\n");
5989 return 0;
5990 }
5991
fee1247a 5992 if (!iwl_is_alive(priv))
5a66926a
ZY		 5993 return -EAGAIN;
5994
b481de9c
ZY		 5995 mutex_lock(&priv->mutex);
5996
b481de9c 5997 if (conf->bssid)
0795af57
JP		 5998 IWL_DEBUG_MAC80211("bssid: %s\n",
5999 print_mac(mac, conf->bssid));
b481de9c 6000
4150c572
JB		 6001/*
6002 * very dubious code was here; the probe filtering flag is never set:
6003 *
b481de9c
ZY		 6004 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6005 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 6006 */
b481de9c
ZY		 6007
6008 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6009 if (!conf->bssid) {
6010 conf->bssid = priv->mac_addr;
6011 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 6012 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6013 print_mac(mac, conf->bssid));
b481de9c
ZY		 6014 }
6015 if (priv->ibss_beacon)
6016 dev_kfree_skb(priv->ibss_beacon);
6017
6018 priv->ibss_beacon = conf->beacon;
6019 }
6020
fee1247a 6021 if (iwl_is_rfkill(priv))
fde3571f
MA		 6022 goto done;
6023
b481de9c
ZY		 6024 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6025 !is_multicast_ether_addr(conf->bssid)) {
6026 /* If there is currently a HW scan going on in the background
6027 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6028 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 6029 IWL_WARNING("Aborted scan still in progress "
6030 "after 100ms\n");
6031 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6032 mutex_unlock(&priv->mutex);
6033 return -EAGAIN;
6034 }
6035 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6036
6037 /* TODO: Audit driver for usage of these members and see
6038 * if mac80211 deprecates them (priv->bssid looks like it
6039 * shouldn't be there, but I haven't scanned the IBSS code
6040 * to verify) - jpk */
6041 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6042
6043 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6044 iwl4965_config_ap(priv);
b481de9c 6045 else {
bb8c093b 6046 rc = iwl4965_commit_rxon(priv);
b481de9c 6047 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6048 iwl4965_rxon_add_station(
b481de9c
ZY		 6049 priv, priv->active_rxon.bssid_addr, 1);
6050 }
6051
6052 } else {
bb8c093b 6053 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6054 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6055 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6056 }
6057
fde3571f 6058 done:
b481de9c
ZY		 6059 spin_lock_irqsave(&priv->lock, flags);
6060 if (!conf->ssid_len)
6061 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6062 else
6063 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6064
6065 priv->essid_len = conf->ssid_len;
6066 spin_unlock_irqrestore(&priv->lock, flags);
6067
6068 IWL_DEBUG_MAC80211("leave\n");
6069 mutex_unlock(&priv->mutex);
6070
6071 return 0;
6072}
6073
bb8c093b 6074static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 6075 unsigned int changed_flags,
6076 unsigned int *total_flags,
6077 int mc_count, struct dev_addr_list *mc_list)
6078{
6079 /*
6080 * XXX: dummy
bb8c093b 6081 * see also iwl4965_connection_init_rx_config
4150c572
JB		 6082 */
6083 *total_flags = 0;
6084}
6085
bb8c093b 6086static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 6087 struct ieee80211_if_init_conf *conf)
6088{
c79dd5b5 6089 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6090
6091 IWL_DEBUG_MAC80211("enter\n");
6092
6093 mutex_lock(&priv->mutex);
948c171c 6094
fee1247a 6095 if (iwl_is_ready_rf(priv)) {
fde3571f
MA		 6096 iwl4965_scan_cancel_timeout(priv, 100);
6097 cancel_delayed_work(&priv->post_associate);
6098 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6099 iwl4965_commit_rxon(priv);
6100 }
32bfd35d
JB		 6101 if (priv->vif == conf->vif) {
6102 priv->vif = NULL;
b481de9c
ZY		 6103 memset(priv->bssid, 0, ETH_ALEN);
6104 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6105 priv->essid_len = 0;
6106 }
6107 mutex_unlock(&priv->mutex);
6108
6109 IWL_DEBUG_MAC80211("leave\n");
6110
6111}
471b3efd 6112
3109ece1 6113#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
471b3efd
JB		 6114static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6115 struct ieee80211_vif *vif,
6116 struct ieee80211_bss_conf *bss_conf,
6117 u32 changes)
220173b0 6118{
c79dd5b5 6119 struct iwl_priv *priv = hw->priv;
220173b0 6120
3109ece1
TW		 6121 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6122
471b3efd 6123 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
3109ece1
TW		 6124 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6125 bss_conf->use_short_preamble);
471b3efd 6126 if (bss_conf->use_short_preamble)
220173b0
TW		 6127 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6128 else
6129 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6130 }
6131
471b3efd 6132 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
3109ece1 6133 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
8318d78a 6134 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 6135 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6136 else
6137 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6138 }
6139
98952d5d 6140 if (changes & BSS_CHANGED_HT) {
3109ece1 6141 IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
98952d5d 6142 iwl4965_ht_conf(priv, bss_conf);
c7de35cd 6143 iwl_set_rxon_chain(priv);
98952d5d
TW		 6144 }
6145
471b3efd 6146 if (changes & BSS_CHANGED_ASSOC) {
3109ece1 6147 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
508e32e1
RC		 6148 /* This should never happen as this function should
6149 * never be called from interrupt context. */
6150 if (WARN_ON_ONCE(in_interrupt()))
6151 return;
3109ece1
TW		 6152 if (bss_conf->assoc) {
6153 priv->assoc_id = bss_conf->aid;
6154 priv->beacon_int = bss_conf->beacon_int;
6155 priv->timestamp = bss_conf->timestamp;
6156 priv->assoc_capability = bss_conf->assoc_capability;
6157 priv->next_scan_jiffies = jiffies +
6158 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
508e32e1
RC		 6159 mutex_lock(&priv->mutex);
6160 iwl4965_post_associate(priv);
6161 mutex_unlock(&priv->mutex);
3109ece1
TW		 6162 } else {
6163 priv->assoc_id = 0;
6164 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6165 }
6166 } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
6167 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
7e8c519e 6168 iwl_send_rxon_assoc(priv);
471b3efd
JB		 6169 }
6170
220173b0 6171}
b481de9c 6172
bb8c093b 6173static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 6174{
6175 int rc = 0;
6176 unsigned long flags;
c79dd5b5 6177 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6178
6179 IWL_DEBUG_MAC80211("enter\n");
6180
052c4b9f 6181 mutex_lock(&priv->mutex);
b481de9c
ZY		 6182 spin_lock_irqsave(&priv->lock, flags);
6183
fee1247a 6184 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6185 rc = -EIO;
6186 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6187 goto out_unlock;
6188 }
6189
6190 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6191 rc = -EIO;
6192 IWL_ERROR("ERROR: APs don't scan\n");
6193 goto out_unlock;
6194 }
6195
7878a5a4
MA		 6196 /* we don't schedule scan within next_scan_jiffies period */
6197 if (priv->next_scan_jiffies &&
6198 time_after(priv->next_scan_jiffies, jiffies)) {
6199 rc = -EAGAIN;
6200 goto out_unlock;
6201 }
b481de9c 6202 /* if we just finished scan ask for delay */
7878a5a4
MA		 6203 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6204 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 6205 rc = -EAGAIN;
6206 goto out_unlock;
6207 }
6208 if (len) {
7878a5a4 6209 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6210 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 6211
6212 priv->one_direct_scan = 1;
6213 priv->direct_ssid_len = (u8)
6214 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6215 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 6216 } else
6217 priv->one_direct_scan = 0;
b481de9c 6218
bb8c093b 6219 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 6220
6221 IWL_DEBUG_MAC80211("leave\n");
6222
6223out_unlock:
6224 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6225 mutex_unlock(&priv->mutex);
b481de9c
ZY		 6226
6227 return rc;
6228}
6229
ab885f8c
EG		 6230static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6231 struct ieee80211_key_conf *keyconf, const u8 *addr,
6232 u32 iv32, u16 *phase1key)
6233{
6234 struct iwl_priv *priv = hw->priv;
6235 u8 sta_id = IWL_INVALID_STATION;
6236 unsigned long flags;
6237 __le16 key_flags = 0;
6238 int i;
6239 DECLARE_MAC_BUF(mac);
6240
6241 IWL_DEBUG_MAC80211("enter\n");
6242
947b13a7 6243 sta_id = iwl_find_station(priv, addr);
ab885f8c
EG		 6244 if (sta_id == IWL_INVALID_STATION) {
6245 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6246 print_mac(mac, addr));
6247 return;
6248 }
6249
6250 iwl4965_scan_cancel_timeout(priv, 100);
6251
6252 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
6253 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
6254 key_flags &= ~STA_KEY_FLG_INVALID;
6255
5425e490 6256 if (sta_id == priv->hw_params.bcast_sta_id)
ab885f8c
EG		 6257 key_flags |= STA_KEY_MULTICAST_MSK;
6258
6259 spin_lock_irqsave(&priv->sta_lock, flags);
6260
ab885f8c
EG		 6261 priv->stations[sta_id].sta.key.key_flags = key_flags;
6262 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
6263
6264 for (i = 0; i < 5; i++)
6265 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
6266 cpu_to_le16(phase1key[i]);
6267
6268 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
6269 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
6270
6271 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
6272
6273 spin_unlock_irqrestore(&priv->sta_lock, flags);
6274
6275 IWL_DEBUG_MAC80211("leave\n");
6276}
6277
bb8c093b 6278static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 6279 const u8 *local_addr, const u8 *addr,
6280 struct ieee80211_key_conf *key)
6281{
c79dd5b5 6282 struct iwl_priv *priv = hw->priv;
0795af57 6283 DECLARE_MAC_BUF(mac);
deb09c43
EG		 6284 int ret = 0;
6285 u8 sta_id = IWL_INVALID_STATION;
6974e363 6286 u8 is_default_wep_key = 0;
b481de9c
ZY		 6287
6288 IWL_DEBUG_MAC80211("enter\n");
6289
099b40b7 6290 if (priv->hw_params.sw_crypto) {
b481de9c
ZY		 6291 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6292 return -EOPNOTSUPP;
6293 }
6294
6295 if (is_zero_ether_addr(addr))
6296 /* only support pairwise keys */
6297 return -EOPNOTSUPP;
6298
947b13a7 6299 sta_id = iwl_find_station(priv, addr);
6974e363
EG		 6300 if (sta_id == IWL_INVALID_STATION) {
6301 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
6302 print_mac(mac, addr));
6303 return -EINVAL;
b481de9c 6304
deb09c43 6305 }
b481de9c 6306
6974e363 6307 mutex_lock(&priv->mutex);
bb8c093b 6308 iwl4965_scan_cancel_timeout(priv, 100);
6974e363
EG		 6309 mutex_unlock(&priv->mutex);
6310
6311 /* If we are getting WEP group key and we didn't receive any key mapping
6312 * so far, we are in legacy wep mode (group key only), otherwise we are
6313 * in 1X mode.
6314 * In legacy wep mode, we use another host command to the uCode */
5425e490 6315 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
6974e363
EG		 6316 priv->iw_mode != IEEE80211_IF_TYPE_AP) {
6317 if (cmd == SET_KEY)
6318 is_default_wep_key = !priv->key_mapping_key;
6319 else
6320 is_default_wep_key = priv->default_wep_key;
6321 }
052c4b9f 6322
b481de9c 6323 switch (cmd) {
deb09c43 6324 case SET_KEY:
6974e363
EG		 6325 if (is_default_wep_key)
6326 ret = iwl_set_default_wep_key(priv, key);
deb09c43 6327 else
7480513f 6328 ret = iwl_set_dynamic_key(priv, key, sta_id);
deb09c43
EG		 6329
6330 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 6331 break;
6332 case DISABLE_KEY:
6974e363
EG		 6333 if (is_default_wep_key)
6334 ret = iwl_remove_default_wep_key(priv, key);
deb09c43 6335 else
3ec47732 6336 ret = iwl_remove_dynamic_key(priv, key, sta_id);
deb09c43
EG		 6337
6338 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 6339 break;
6340 default:
deb09c43 6341 ret = -EINVAL;
b481de9c
ZY		 6342 }
6343
6344 IWL_DEBUG_MAC80211("leave\n");
b481de9c 6345
deb09c43 6346 return ret;
b481de9c
ZY		 6347}
6348
bb8c093b 6349static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 6350 const struct ieee80211_tx_queue_params *params)
6351{
c79dd5b5 6352 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6353 unsigned long flags;
6354 int q;
b481de9c
ZY		 6355
6356 IWL_DEBUG_MAC80211("enter\n");
6357
fee1247a 6358 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6359 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6360 return -EIO;
6361 }
6362
6363 if (queue >= AC_NUM) {
6364 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6365 return 0;
6366 }
6367
b481de9c
ZY		 6368 if (!priv->qos_data.qos_enable) {
6369 priv->qos_data.qos_active = 0;
6370 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
6371 return 0;
6372 }
6373 q = AC_NUM - 1 - queue;
6374
6375 spin_lock_irqsave(&priv->lock, flags);
6376
6377 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6378 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6379 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6380 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 6381 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 6382
6383 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6384 priv->qos_data.qos_active = 1;
6385
6386 spin_unlock_irqrestore(&priv->lock, flags);
6387
6388 mutex_lock(&priv->mutex);
6389 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6390 iwl4965_activate_qos(priv, 1);
3109ece1 6391 else if (priv->assoc_id && iwl_is_associated(priv))
bb8c093b 6392 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 6393
6394 mutex_unlock(&priv->mutex);
6395
b481de9c
ZY		 6396 IWL_DEBUG_MAC80211("leave\n");
6397 return 0;
6398}
6399
bb8c093b 6400static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 6401 struct ieee80211_tx_queue_stats *stats)
6402{
c79dd5b5 6403 struct iwl_priv *priv = hw->priv;
b481de9c 6404 int i, avail;
bb8c093b
CH		 6405 struct iwl4965_tx_queue *txq;
6406 struct iwl4965_queue *q;
b481de9c
ZY		 6407 unsigned long flags;
6408
6409 IWL_DEBUG_MAC80211("enter\n");
6410
fee1247a 6411 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6412 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6413 return -EIO;
6414 }
6415
6416 spin_lock_irqsave(&priv->lock, flags);
6417
6418 for (i = 0; i < AC_NUM; i++) {
6419 txq = &priv->txq[i];
6420 q = &txq->q;
bb8c093b 6421 avail = iwl4965_queue_space(q);
b481de9c
ZY		 6422
6423 stats->data[i].len = q->n_window - avail;
6424 stats->data[i].limit = q->n_window - q->high_mark;
6425 stats->data[i].count = q->n_window;
6426
6427 }
6428 spin_unlock_irqrestore(&priv->lock, flags);
6429
6430 IWL_DEBUG_MAC80211("leave\n");
6431
6432 return 0;
6433}
6434
bb8c093b 6435static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 6436 struct ieee80211_low_level_stats *stats)
6437{
6438 IWL_DEBUG_MAC80211("enter\n");
6439 IWL_DEBUG_MAC80211("leave\n");
6440
6441 return 0;
6442}
6443
bb8c093b 6444static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 6445{
6446 IWL_DEBUG_MAC80211("enter\n");
6447 IWL_DEBUG_MAC80211("leave\n");
6448
6449 return 0;
6450}
6451
bb8c093b 6452static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 6453{
c79dd5b5 6454 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6455 unsigned long flags;
6456
6457 mutex_lock(&priv->mutex);
6458 IWL_DEBUG_MAC80211("enter\n");
6459
6460 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 6461#ifdef CONFIG_IWL4965_HT
b481de9c 6462 spin_lock_irqsave(&priv->lock, flags);
fd105e79 6463 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 6464 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 6465#endif /* CONFIG_IWL4965_HT */
b481de9c 6466
c7de35cd 6467 iwl_reset_qos(priv);
b481de9c
ZY		 6468
6469 cancel_delayed_work(&priv->post_associate);
6470
6471 spin_lock_irqsave(&priv->lock, flags);
6472 priv->assoc_id = 0;
6473 priv->assoc_capability = 0;
b481de9c
ZY		 6474 priv->assoc_station_added = 0;
6475
6476 /* new association get rid of ibss beacon skb */
6477 if (priv->ibss_beacon)
6478 dev_kfree_skb(priv->ibss_beacon);
6479
6480 priv->ibss_beacon = NULL;
6481
6482 priv->beacon_int = priv->hw->conf.beacon_int;
3109ece1 6483 priv->timestamp = 0;
b481de9c
ZY		 6484 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
6485 priv->beacon_int = 0;
6486
6487 spin_unlock_irqrestore(&priv->lock, flags);
6488
fee1247a 6489 if (!iwl_is_ready_rf(priv)) {
fde3571f
MA		 6490 IWL_DEBUG_MAC80211("leave - not ready\n");
6491 mutex_unlock(&priv->mutex);
6492 return;
6493 }
6494
052c4b9f 6495 /* we are restarting association process
6496 * clear RXON_FILTER_ASSOC_MSK bit
6497 */
6498 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 6499 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 6500 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6501 iwl4965_commit_rxon(priv);
052c4b9f 6502 }
6503
5da4b55f
MA		 6504 iwl_power_update_mode(priv, 0);
6505
b481de9c
ZY		 6506 /* Per mac80211.h: This is only used in IBSS mode... */
6507 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 6508
b481de9c
ZY		 6509 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6510 mutex_unlock(&priv->mutex);
6511 return;
6512 }
6513
bb8c093b 6514 iwl4965_set_rate(priv);
b481de9c
ZY		 6515
6516 mutex_unlock(&priv->mutex);
6517
6518 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 6519}
6520
bb8c093b 6521static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 6522 struct ieee80211_tx_control *control)
6523{
c79dd5b5 6524 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6525 unsigned long flags;
6526
6527 mutex_lock(&priv->mutex);
6528 IWL_DEBUG_MAC80211("enter\n");
6529
fee1247a 6530 if (!iwl_is_ready_rf(priv)) {
b481de9c
ZY		 6531 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6532 mutex_unlock(&priv->mutex);
6533 return -EIO;
6534 }
6535
6536 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
6537 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6538 mutex_unlock(&priv->mutex);
6539 return -EIO;
6540 }
6541
6542 spin_lock_irqsave(&priv->lock, flags);
6543
6544 if (priv->ibss_beacon)
6545 dev_kfree_skb(priv->ibss_beacon);
6546
6547 priv->ibss_beacon = skb;
6548
6549 priv->assoc_id = 0;
6550
6551 IWL_DEBUG_MAC80211("leave\n");
6552 spin_unlock_irqrestore(&priv->lock, flags);
6553
c7de35cd 6554 iwl_reset_qos(priv);
b481de9c
ZY		 6555
6556 queue_work(priv->workqueue, &priv->post_associate.work);
6557
6558 mutex_unlock(&priv->mutex);
6559
6560 return 0;
6561}
6562
b481de9c
ZY		 6563/*****************************************************************************
6564 *
6565 * sysfs attributes
6566 *
6567 *****************************************************************************/
6568
0a6857e7 6569#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 6570
6571/*
6572 * The following adds a new attribute to the sysfs representation
6573 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6574 * used for controlling the debug level.
6575 *
6576 * See the level definitions in iwl for details.
6577 */
6578
6579static ssize_t show_debug_level(struct device_driver *d, char *buf)
6580{
0a6857e7 6581 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY		 6582}
6583static ssize_t store_debug_level(struct device_driver *d,
6584 const char *buf, size_t count)
6585{
6586 char *p = (char *)buf;
6587 u32 val;
6588
6589 val = simple_strtoul(p, &p, 0);
6590 if (p == buf)
6591 printk(KERN_INFO DRV_NAME
6592 ": %s is not in hex or decimal form.\n", buf);
6593 else
0a6857e7 6594 iwl_debug_level = val;
b481de9c
ZY		 6595
6596 return strnlen(buf, count);
6597}
6598
6599static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
6600 show_debug_level, store_debug_level);
6601
0a6857e7 6602#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c 6603
b481de9c
ZY		 6604
6605static ssize_t show_temperature(struct device *d,
6606 struct device_attribute *attr, char *buf)
6607{
c79dd5b5 6608 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 6609
fee1247a 6610 if (!iwl_is_alive(priv))
b481de9c
ZY		 6611 return -EAGAIN;
6612
bb8c093b 6613 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 6614}
6615
6616static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6617
6618static ssize_t show_rs_window(struct device *d,
6619 struct device_attribute *attr,
6620 char *buf)
6621{
c79dd5b5 6622 struct iwl_priv *priv = d->driver_data;
bb8c093b 6623 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 6624}
6625static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
6626
6627static ssize_t show_tx_power(struct device *d,
6628 struct device_attribute *attr, char *buf)
6629{
c79dd5b5 6630 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6631 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6632}
6633
6634static ssize_t store_tx_power(struct device *d,
6635 struct device_attribute *attr,
6636 const char *buf, size_t count)
6637{
c79dd5b5 6638 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6639 char *p = (char *)buf;
6640 u32 val;
6641
6642 val = simple_strtoul(p, &p, 10);
6643 if (p == buf)
6644 printk(KERN_INFO DRV_NAME
6645 ": %s is not in decimal form.\n", buf);
6646 else
bb8c093b 6647 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 6648
6649 return count;
6650}
6651
6652static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6653
6654static ssize_t show_flags(struct device *d,
6655 struct device_attribute *attr, char *buf)
6656{
c79dd5b5 6657 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6658
6659 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
6660}
6661
6662static ssize_t store_flags(struct device *d,
6663 struct device_attribute *attr,
6664 const char *buf, size_t count)
6665{
c79dd5b5 6666 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6667 u32 flags = simple_strtoul(buf, NULL, 0);
6668
6669 mutex_lock(&priv->mutex);
6670 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
6671 /* Cancel any currently running scans... */
bb8c093b 6672 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 6673 IWL_WARNING("Could not cancel scan.\n");
6674 else {
6675 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6676 flags);
6677 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 6678 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6679 }
6680 }
6681 mutex_unlock(&priv->mutex);
6682
6683 return count;
6684}
6685
6686static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
6687
6688static ssize_t show_filter_flags(struct device *d,
6689 struct device_attribute *attr, char *buf)
6690{
c79dd5b5 6691 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6692
6693 return sprintf(buf, "0x%04X\n",
6694 le32_to_cpu(priv->active_rxon.filter_flags));
6695}
6696
6697static ssize_t store_filter_flags(struct device *d,
6698 struct device_attribute *attr,
6699 const char *buf, size_t count)
6700{
c79dd5b5 6701 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 6702 u32 filter_flags = simple_strtoul(buf, NULL, 0);
6703
6704 mutex_lock(&priv->mutex);
6705 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
6706 /* Cancel any currently running scans... */
bb8c093b 6707 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 6708 IWL_WARNING("Could not cancel scan.\n");
6709 else {
6710 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
6711 "0x%04X\n", filter_flags);
6712 priv->staging_rxon.filter_flags =
6713 cpu_to_le32(filter_flags);
bb8c093b 6714 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6715 }
6716 }
6717 mutex_unlock(&priv->mutex);
6718
6719 return count;
6720}
6721
6722static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
6723 store_filter_flags);
6724
c8b0e6e1 6725#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 6726
6727static ssize_t show_measurement(struct device *d,
6728 struct device_attribute *attr, char *buf)
6729{
c79dd5b5 6730 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 6731 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 6732 u32 size = sizeof(measure_report), len = 0, ofs = 0;
6733 u8 *data = (u8 *) & measure_report;
6734 unsigned long flags;
6735
6736 spin_lock_irqsave(&priv->lock, flags);
6737 if (!(priv->measurement_status & MEASUREMENT_READY)) {
6738 spin_unlock_irqrestore(&priv->lock, flags);
6739 return 0;
6740 }
6741 memcpy(&measure_report, &priv->measure_report, size);
6742 priv->measurement_status = 0;
6743 spin_unlock_irqrestore(&priv->lock, flags);
6744
6745 while (size && (PAGE_SIZE - len)) {
6746 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
6747 PAGE_SIZE - len, 1);
6748 len = strlen(buf);
6749 if (PAGE_SIZE - len)
6750 buf[len++] = '\n';
6751
6752 ofs += 16;
6753 size -= min(size, 16U);
6754 }
6755
6756 return len;
6757}
6758
6759static ssize_t store_measurement(struct device *d,
6760 struct device_attribute *attr,
6761 const char *buf, size_t count)
6762{
c79dd5b5 6763 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6764 struct ieee80211_measurement_params params = {
6765 .channel = le16_to_cpu(priv->active_rxon.channel),
6766 .start_time = cpu_to_le64(priv->last_tsf),
6767 .duration = cpu_to_le16(1),
6768 };
6769 u8 type = IWL_MEASURE_BASIC;
6770 u8 buffer[32];
6771 u8 channel;
6772
6773 if (count) {
6774 char *p = buffer;
6775 strncpy(buffer, buf, min(sizeof(buffer), count));
6776 channel = simple_strtoul(p, NULL, 0);
6777 if (channel)
6778 params.channel = channel;
6779
6780 p = buffer;
6781 while (*p && *p != ' ')
6782 p++;
6783 if (*p)
6784 type = simple_strtoul(p + 1, NULL, 0);
6785 }
6786
6787 IWL_DEBUG_INFO("Invoking measurement of type %d on "
6788 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 6789 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 6790
6791 return count;
6792}
6793
6794static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
6795 show_measurement, store_measurement);
c8b0e6e1 6796#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 6797
6798static ssize_t store_retry_rate(struct device *d,
6799 struct device_attribute *attr,
6800 const char *buf, size_t count)
6801{
c79dd5b5 6802 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6803
6804 priv->retry_rate = simple_strtoul(buf, NULL, 0);
6805 if (priv->retry_rate <= 0)
6806 priv->retry_rate = 1;
6807
6808 return count;
6809}
6810
6811static ssize_t show_retry_rate(struct device *d,
6812 struct device_attribute *attr, char *buf)
6813{
c79dd5b5 6814 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6815 return sprintf(buf, "%d", priv->retry_rate);
6816}
6817
6818static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
6819 store_retry_rate);
6820
6821static ssize_t store_power_level(struct device *d,
6822 struct device_attribute *attr,
6823 const char *buf, size_t count)
6824{
c79dd5b5 6825 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 6826 int rc;
6827 int mode;
6828
6829 mode = simple_strtoul(buf, NULL, 0);
6830 mutex_lock(&priv->mutex);
6831
fee1247a 6832 if (!iwl_is_ready(priv)) {
b481de9c
ZY		 6833 rc = -EAGAIN;
6834 goto out;
6835 }
6836
5da4b55f
MA		 6837 rc = iwl_power_set_user_mode(priv, mode);
6838 if (rc) {
6839 IWL_DEBUG_MAC80211("failed setting power mode.\n");
6840 goto out;
b481de9c 6841 }
b481de9c
ZY		 6842 rc = count;
6843
6844 out:
6845 mutex_unlock(&priv->mutex);
6846 return rc;
6847}
6848
6849#define MAX_WX_STRING 80
6850
6851/* Values are in microsecond */
6852static const s32 timeout_duration[] = {
6853 350000,
6854 250000,
6855 75000,
6856 37000,
6857 25000,
6858};
6859static const s32 period_duration[] = {
6860 400000,
6861 700000,
6862 1000000,
6863 1000000,
6864 1000000
6865};
6866
6867static ssize_t show_power_level(struct device *d,
6868 struct device_attribute *attr, char *buf)
6869{
c79dd5b5 6870 struct iwl_priv *priv = dev_get_drvdata(d);
5da4b55f 6871 int level = priv->power_data.power_mode;
b481de9c
ZY		 6872 char *p = buf;
6873
6874 p += sprintf(p, "%d ", level);
6875 switch (level) {
6876 case IWL_POWER_MODE_CAM:
6877 case IWL_POWER_AC:
6878 p += sprintf(p, "(AC)");
6879 break;
6880 case IWL_POWER_BATTERY:
6881 p += sprintf(p, "(BATTERY)");
6882 break;
6883 default:
6884 p += sprintf(p,
6885 "(Timeout %dms, Period %dms)",
6886 timeout_duration[level - 1] / 1000,
6887 period_duration[level - 1] / 1000);
6888 }
5da4b55f 6889/*
b481de9c
ZY		 6890 if (!(priv->power_mode & IWL_POWER_ENABLED))
6891 p += sprintf(p, " OFF\n");
6892 else
6893 p += sprintf(p, " \n");
5da4b55f
MA		 6894*/
6895 p += sprintf(p, " \n");
b481de9c 6896 return (p - buf + 1);
b481de9c
ZY		 6897}
6898
6899static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
6900 store_power_level);
6901
6902static ssize_t show_channels(struct device *d,
6903 struct device_attribute *attr, char *buf)
6904{
8318d78a
JB		 6905 /* all this shit doesn't belong into sysfs anyway */
6906 return 0;
b481de9c
ZY		 6907}
6908
6909static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
6910
6911static ssize_t show_statistics(struct device *d,
6912 struct device_attribute *attr, char *buf)
6913{
c79dd5b5 6914 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 6915 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 6916 u32 len = 0, ofs = 0;
6917 u8 *data = (u8 *) & priv->statistics;
6918 int rc = 0;
6919
fee1247a 6920 if (!iwl_is_alive(priv))
b481de9c
ZY		 6921 return -EAGAIN;
6922
6923 mutex_lock(&priv->mutex);
49ea8596 6924 rc = iwl_send_statistics_request(priv, 0);
b481de9c
ZY		 6925 mutex_unlock(&priv->mutex);
6926
6927 if (rc) {
6928 len = sprintf(buf,
6929 "Error sending statistics request: 0x%08X\n", rc);
6930 return len;
6931 }
6932
6933 while (size && (PAGE_SIZE - len)) {
6934 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
6935 PAGE_SIZE - len, 1);
6936 len = strlen(buf);
6937 if (PAGE_SIZE - len)
6938 buf[len++] = '\n';
6939
6940 ofs += 16;
6941 size -= min(size, 16U);
6942 }
6943
6944 return len;
6945}
6946
6947static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
6948
b481de9c
ZY		 6949static ssize_t show_status(struct device *d,
6950 struct device_attribute *attr, char *buf)
6951{
c79dd5b5 6952 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
fee1247a 6953 if (!iwl_is_alive(priv))
b481de9c
ZY		 6954 return -EAGAIN;
6955 return sprintf(buf, "0x%08x\n", (int)priv->status);
6956}
6957
6958static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
6959
6960static ssize_t dump_error_log(struct device *d,
6961 struct device_attribute *attr,
6962 const char *buf, size_t count)
6963{
6964 char *p = (char *)buf;
6965
6966 if (p[0] == '1')
c79dd5b5 6967 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 6968
6969 return strnlen(buf, count);
6970}
6971
6972static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
6973
6974static ssize_t dump_event_log(struct device *d,
6975 struct device_attribute *attr,
6976 const char *buf, size_t count)
6977{
6978 char *p = (char *)buf;
6979
6980 if (p[0] == '1')
c79dd5b5 6981 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 6982
6983 return strnlen(buf, count);
6984}
6985
6986static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
6987
6988/*****************************************************************************
6989 *
6990 * driver setup and teardown
6991 *
6992 *****************************************************************************/
6993
c79dd5b5 6994static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 6995{
6996 priv->workqueue = create_workqueue(DRV_NAME);
6997
6998 init_waitqueue_head(&priv->wait_command_queue);
6999
bb8c093b
CH		 7000 INIT_WORK(&priv->up, iwl4965_bg_up);
7001 INIT_WORK(&priv->restart, iwl4965_bg_restart);
7002 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
7003 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
7004 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
7005 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
7006 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
7007 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7008 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7009 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7010 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7011 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7012
7013 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 7014
7015 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7016 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 7017}
7018
c79dd5b5 7019static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7020{
bb8c093b 7021 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7022
3ae6a054 7023 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 7024 cancel_delayed_work(&priv->scan_check);
7025 cancel_delayed_work(&priv->alive_start);
7026 cancel_delayed_work(&priv->post_associate);
7027 cancel_work_sync(&priv->beacon_update);
7028}
7029
bb8c093b 7030static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 7031 &dev_attr_channels.attr,
7032 &dev_attr_dump_errors.attr,
7033 &dev_attr_dump_events.attr,
7034 &dev_attr_flags.attr,
7035 &dev_attr_filter_flags.attr,
c8b0e6e1 7036#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 7037 &dev_attr_measurement.attr,
7038#endif
7039 &dev_attr_power_level.attr,
7040 &dev_attr_retry_rate.attr,
b481de9c
ZY		 7041 &dev_attr_rs_window.attr,
7042 &dev_attr_statistics.attr,
7043 &dev_attr_status.attr,
7044 &dev_attr_temperature.attr,
b481de9c
ZY		 7045 &dev_attr_tx_power.attr,
7046
7047 NULL
7048};
7049
bb8c093b 7050static struct attribute_group iwl4965_attribute_group = {
b481de9c 7051 .name = NULL, /* put in device directory */
bb8c093b 7052 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 7053};
7054
bb8c093b
CH		 7055static struct ieee80211_ops iwl4965_hw_ops = {
7056 .tx = iwl4965_mac_tx,
7057 .start = iwl4965_mac_start,
7058 .stop = iwl4965_mac_stop,
7059 .add_interface = iwl4965_mac_add_interface,
7060 .remove_interface = iwl4965_mac_remove_interface,
7061 .config = iwl4965_mac_config,
7062 .config_interface = iwl4965_mac_config_interface,
7063 .configure_filter = iwl4965_configure_filter,
7064 .set_key = iwl4965_mac_set_key,
ab885f8c 7065 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH		 7066 .get_stats = iwl4965_mac_get_stats,
7067 .get_tx_stats = iwl4965_mac_get_tx_stats,
7068 .conf_tx = iwl4965_mac_conf_tx,
7069 .get_tsf = iwl4965_mac_get_tsf,
7070 .reset_tsf = iwl4965_mac_reset_tsf,
7071 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7072 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7073#ifdef CONFIG_IWL4965_HT
9ab46173 7074 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7075#endif /* CONFIG_IWL4965_HT */
bb8c093b 7076 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 7077};
7078
bb8c093b 7079static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 7080{
7081 int err = 0;
c79dd5b5 7082 struct iwl_priv *priv;
b481de9c 7083 struct ieee80211_hw *hw;
82b9a121 7084 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
0359facc 7085 unsigned long flags;
5a66926a 7086 DECLARE_MAC_BUF(mac);
b481de9c 7087
316c30d9
AK		 7088 /************************
7089 * 1. Allocating HW data
7090 ************************/
7091
6440adb5
CB		 7092 /* Disabling hardware scan means that mac80211 will perform scans
7093 * "the hard way", rather than using device's scan. */
1ea87396 7094 if (cfg->mod_params->disable_hw_scan) {
b481de9c 7095 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 7096 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 7097 }
7098
1d0a082d
AK		 7099 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
7100 if (!hw) {
b481de9c
ZY		 7101 err = -ENOMEM;
7102 goto out;
7103 }
1d0a082d
AK		 7104 priv = hw->priv;
7105 /* At this point both hw and priv are allocated. */
7106
b481de9c
ZY		 7107 SET_IEEE80211_DEV(hw, &pdev->dev);
7108
7109 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 7110 priv->cfg = cfg;
b481de9c 7111 priv->pci_dev = pdev;
316c30d9 7112
0a6857e7 7113#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 7114 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 7115 atomic_set(&priv->restrict_refcnt, 0);
7116#endif
b481de9c 7117
316c30d9
AK		 7118 /**************************
7119 * 2. Initializing PCI bus
7120 **************************/
7121 if (pci_enable_device(pdev)) {
7122 err = -ENODEV;
7123 goto out_ieee80211_free_hw;
7124 }
7125
7126 pci_set_master(pdev);
7127
cc2a8ea8 7128 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
316c30d9 7129 if (!err)
cc2a8ea8
RR		 7130 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
7131 if (err) {
7132 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7133 if (!err)
7134 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7135 /* both attempts failed: */
316c30d9 7136 if (err) {
cc2a8ea8
RR		 7137 printk(KERN_WARNING "%s: No suitable DMA available.\n",
7138 DRV_NAME);
316c30d9 7139 goto out_pci_disable_device;
cc2a8ea8 7140 }
316c30d9
AK		 7141 }
7142
7143 err = pci_request_regions(pdev, DRV_NAME);
7144 if (err)
7145 goto out_pci_disable_device;
7146
7147 pci_set_drvdata(pdev, priv);
7148
7149 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7150 * PCI Tx retries from interfering with C3 CPU state */
7151 pci_write_config_byte(pdev, 0x41, 0x00);
7152
7153 /***********************
7154 * 3. Read REV register
7155 ***********************/
7156 priv->hw_base = pci_iomap(pdev, 0, 0);
7157 if (!priv->hw_base) {
7158 err = -ENODEV;
7159 goto out_pci_release_regions;
7160 }
7161
7162 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7163 (unsigned long long) pci_resource_len(pdev, 0));
7164 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7165
b661c819 7166 iwl_hw_detect(priv);
316c30d9 7167 printk(KERN_INFO DRV_NAME
b661c819
TW		 7168 ": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
7169 priv->cfg->name, priv->hw_rev);
316c30d9 7170
91238714
TW		 7171 /* amp init */
7172 err = priv->cfg->ops->lib->apm_ops.init(priv);
316c30d9 7173 if (err < 0) {
91238714 7174 IWL_DEBUG_INFO("Failed to init APMG\n");
316c30d9
AK		 7175 goto out_iounmap;
7176 }
91238714
TW		 7177 /*****************
7178 * 4. Read EEPROM
7179 *****************/
316c30d9
AK		 7180 /* Read the EEPROM */
7181 err = iwl_eeprom_init(priv);
7182 if (err) {
7183 IWL_ERROR("Unable to init EEPROM\n");
7184 goto out_iounmap;
7185 }
8614f360
TW		 7186 err = iwl_eeprom_check_version(priv);
7187 if (err)
7188 goto out_iounmap;
7189
316c30d9
AK		 7190 /* MAC Address location in EEPROM same for 3945/4965 */
7191 iwl_eeprom_get_mac(priv, priv->mac_addr);
7192 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
7193 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7194
7195 /************************
7196 * 5. Setup HW constants
7197 ************************/
7198 /* Device-specific setup */
5425e490
TW		 7199 if (priv->cfg->ops->lib->set_hw_params(priv)) {
7200 IWL_ERROR("failed to set hw parameters\n");
073d3f5f 7201 goto out_free_eeprom;
316c30d9
AK		 7202 }
7203
7204 /*******************
7205 * 6. Setup hw/priv
7206 *******************/
b481de9c 7207
bf85ea4f
AK		 7208 err = iwl_setup(priv);
7209 if (err)
399f4900 7210 goto out_free_eeprom;
bf85ea4f 7211 /* At this point both hw and priv are initialized. */
316c30d9
AK		 7212
7213 /**********************************
7214 * 7. Initialize module parameters
7215 **********************************/
7216
7217 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 7218 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 7219 set_bit(STATUS_RF_KILL_SW, &priv->status);
7220 IWL_DEBUG_INFO("Radio disabled.\n");
7221 }
7222
1ea87396 7223 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK		 7224 priv->qos_data.qos_enable = 1;
7225
7226 /********************
7227 * 8. Setup services
7228 ********************/
0359facc 7229 spin_lock_irqsave(&priv->lock, flags);
316c30d9 7230 iwl4965_disable_interrupts(priv);
0359facc 7231 spin_unlock_irqrestore(&priv->lock, flags);
316c30d9
AK		 7232
7233 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
7234 if (err) {
7235 IWL_ERROR("failed to create sysfs device attributes\n");
399f4900 7236 goto out_free_eeprom;
316c30d9
AK		 7237 }
7238
7239 err = iwl_dbgfs_register(priv, DRV_NAME);
7240 if (err) {
7241 IWL_ERROR("failed to create debugfs files\n");
7242 goto out_remove_sysfs;
7243 }
7244
7245 iwl4965_setup_deferred_work(priv);
7246 iwl4965_setup_rx_handlers(priv);
7247
7248 /********************
7249 * 9. Conclude
7250 ********************/
5a66926a
ZY		 7251 pci_save_state(pdev);
7252 pci_disable_device(pdev);
b481de9c 7253
c8381fdc
MA		 7254 /* notify iwlcore to init */
7255 iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
b481de9c
ZY		 7256 return 0;
7257
316c30d9
AK		 7258 out_remove_sysfs:
7259 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
073d3f5f
TW		 7260 out_free_eeprom:
7261 iwl_eeprom_free(priv);
b481de9c
ZY		 7262 out_iounmap:
7263 pci_iounmap(pdev, priv->hw_base);
7264 out_pci_release_regions:
7265 pci_release_regions(pdev);
316c30d9 7266 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 7267 out_pci_disable_device:
7268 pci_disable_device(pdev);
b481de9c
ZY		 7269 out_ieee80211_free_hw:
7270 ieee80211_free_hw(priv->hw);
7271 out:
7272 return err;
7273}
7274
c83dbf68 7275static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 7276{
c79dd5b5 7277 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 7278 struct list_head *p, *q;
7279 int i;
0359facc 7280 unsigned long flags;
b481de9c
ZY		 7281
7282 if (!priv)
7283 return;
7284
7285 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7286
c4f55232
RR		 7287 if (priv->mac80211_registered) {
7288 ieee80211_unregister_hw(priv->hw);
7289 priv->mac80211_registered = 0;
7290 }
7291
b481de9c 7292 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 7293
bb8c093b 7294 iwl4965_down(priv);
b481de9c 7295
0359facc
MA		 7296 /* make sure we flush any pending irq or
7297 * tasklet for the driver
7298 */
7299 spin_lock_irqsave(&priv->lock, flags);
7300 iwl4965_disable_interrupts(priv);
7301 spin_unlock_irqrestore(&priv->lock, flags);
7302
7303 iwl_synchronize_irq(priv);
7304
b481de9c
ZY		 7305 /* Free MAC hash list for ADHOC */
7306 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
7307 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
7308 list_del(p);
bb8c093b 7309 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 7310 }
7311 }
7312
c8381fdc 7313 iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
712b6cf5 7314 iwl_dbgfs_unregister(priv);
bb8c093b 7315 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 7316
bb8c093b 7317 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 7318
7319 if (priv->rxq.bd)
bb8c093b
CH		 7320 iwl4965_rx_queue_free(priv, &priv->rxq);
7321 iwl4965_hw_txq_ctx_free(priv);
b481de9c 7322
bf85ea4f 7323 iwlcore_clear_stations_table(priv);
073d3f5f 7324 iwl_eeprom_free(priv);
b481de9c 7325
b481de9c 7326
948c171c
MA		 7327 /*netif_stop_queue(dev); */
7328 flush_workqueue(priv->workqueue);
7329
bb8c093b 7330 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 7331 * priv->workqueue... so we can't take down the workqueue
7332 * until now... */
7333 destroy_workqueue(priv->workqueue);
7334 priv->workqueue = NULL;
7335
b481de9c
ZY		 7336 pci_iounmap(pdev, priv->hw_base);
7337 pci_release_regions(pdev);
7338 pci_disable_device(pdev);
7339 pci_set_drvdata(pdev, NULL);
7340
bf85ea4f 7341 iwl_free_channel_map(priv);
c7de35cd 7342 iwlcore_free_geos(priv);
b481de9c
ZY		 7343
7344 if (priv->ibss_beacon)
7345 dev_kfree_skb(priv->ibss_beacon);
7346
7347 ieee80211_free_hw(priv->hw);
7348}
7349
7350#ifdef CONFIG_PM
7351
bb8c093b 7352static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 7353{
c79dd5b5 7354 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7355
e655b9f0
ZY		 7356 if (priv->is_open) {
7357 set_bit(STATUS_IN_SUSPEND, &priv->status);
7358 iwl4965_mac_stop(priv->hw);
7359 priv->is_open = 1;
7360 }
b481de9c 7361
b481de9c
ZY		 7362 pci_set_power_state(pdev, PCI_D3hot);
7363
b481de9c
ZY		 7364 return 0;
7365}
7366
bb8c093b 7367static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 7368{
c79dd5b5 7369 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 7370
b481de9c 7371 pci_set_power_state(pdev, PCI_D0);
b481de9c 7372
e655b9f0
ZY		 7373 if (priv->is_open)
7374 iwl4965_mac_start(priv->hw);
b481de9c 7375
e655b9f0 7376 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 7377 return 0;
7378}
7379
7380#endif /* CONFIG_PM */
7381
7382/*****************************************************************************
7383 *
7384 * driver and module entry point
7385 *
7386 *****************************************************************************/
7387
fed9017e
RR		 7388/* Hardware specific file defines the PCI IDs table for that hardware module */
7389static struct pci_device_id iwl_hw_card_ids[] = {
7390 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
7391 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
7392 {0}
7393};
7394MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
7395
7396static struct pci_driver iwl_driver = {
b481de9c 7397 .name = DRV_NAME,
fed9017e 7398 .id_table = iwl_hw_card_ids,
bb8c093b
CH		 7399 .probe = iwl4965_pci_probe,
7400 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 7401#ifdef CONFIG_PM
bb8c093b
CH		 7402 .suspend = iwl4965_pci_suspend,
7403 .resume = iwl4965_pci_resume,
b481de9c
ZY		 7404#endif
7405};
7406
bb8c093b 7407static int __init iwl4965_init(void)
b481de9c
ZY		 7408{
7409
7410 int ret;
7411 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7412 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
897e1cf2
RC		 7413
7414 ret = iwl4965_rate_control_register();
7415 if (ret) {
7416 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
7417 return ret;
7418 }
7419
fed9017e 7420 ret = pci_register_driver(&iwl_driver);
b481de9c
ZY		 7421 if (ret) {
7422 IWL_ERROR("Unable to initialize PCI module\n");
897e1cf2 7423 goto error_register;
b481de9c 7424 }
0a6857e7 7425#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7426 ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 7427 if (ret) {
7428 IWL_ERROR("Unable to create driver sysfs file\n");
897e1cf2 7429 goto error_debug;
b481de9c
ZY		 7430 }
7431#endif
7432
7433 return ret;
897e1cf2
RC		 7434
7435#ifdef CONFIG_IWLWIFI_DEBUG
7436error_debug:
fed9017e 7437 pci_unregister_driver(&iwl_driver);
897e1cf2
RC		 7438#endif
7439error_register:
7440 iwl4965_rate_control_unregister();
7441 return ret;
b481de9c
ZY		 7442}
7443
bb8c093b 7444static void __exit iwl4965_exit(void)
b481de9c 7445{
0a6857e7 7446#ifdef CONFIG_IWLWIFI_DEBUG
fed9017e 7447 driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
b481de9c 7448#endif
fed9017e 7449 pci_unregister_driver(&iwl_driver);
897e1cf2 7450 iwl4965_rate_control_unregister();
b481de9c
ZY		 7451}
7452
bb8c093b
CH		 7453module_exit(iwl4965_exit);
7454module_init(iwl4965_init);
Linux kernel - Deliverables
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